llvm/test/CodeGen/X86/pr49162.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64

define ptr @PR49162(ptr %base, ptr %ptr160) {
; X86-LABEL: PR49162:
; X86:       # %bb.0:
; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
; X86-NEXT:    movl 8(%eax), %ecx
; X86-NEXT:    shll $16, %ecx
; X86-NEXT:    movl %ecx, %eax
; X86-NEXT:    sarl $31, %eax
; X86-NEXT:    shldl $16, %ecx, %eax
; X86-NEXT:    shll $2, %eax
; X86-NEXT:    addl {{[0-9]+}}(%esp), %eax
; X86-NEXT:    retl
;
; X64-LABEL: PR49162:
; X64:       # %bb.0:
; X64-NEXT:    movswq 8(%rsi), %rax
; X64-NEXT:    leaq (%rdi,%rax,4), %rax
; X64-NEXT:    retq
  %load160 = load i160, ptr %ptr160, align 4
  %shl = shl i160 %load160, 80
  %ashr160 = ashr i160 %shl, 112
  %trunc = trunc i160 %ashr160 to i64
  %ashr64 = ashr i64 %trunc, 32
  %gep = getelementptr inbounds i32, ptr %base, i64 %ashr64
  ret ptr %gep
}