llvm/test/CodeGen/X86/cmp-shrink-unsigned.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86
; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64

declare void @ext()

define void @gt_u8(i32 %a, i32 %b) {
; X86-LABEL: gt_u8:
; X86:       # %bb.0: # %entry
; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT:    cmpb {{[0-9]+}}(%esp), %al
; X86-NEXT:    ja ext@PLT # TAILCALL
; X86-NEXT:  # %bb.1: # %end
; X86-NEXT:    retl
;
; X64-LABEL: gt_u8:
; X64:       # %bb.0: # %entry
; X64-NEXT:    cmpb %sil, %dil
; X64-NEXT:    ja ext@PLT # TAILCALL
; X64-NEXT:  # %bb.1: # %end
; X64-NEXT:    retq
entry:
  %ca = and i32 %a, 255
  %cb = and i32 %b, 255
  %cmp = icmp ugt i32 %ca, %cb
  br i1 %cmp, label %then, label %end
then:
  tail call void @ext()
  br label %end
end:
  ret void
}

define void @gt_u16(i32 %a, i32 %b) {
; X86-LABEL: gt_u16:
; X86:       # %bb.0: # %entry
; X86-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT:    movzwl {{[0-9]+}}(%esp), %ecx
; X86-NEXT:    cmpl %eax, %ecx
; X86-NEXT:    ja ext@PLT # TAILCALL
; X86-NEXT:  # %bb.1: # %end
; X86-NEXT:    retl
;
; X64-LABEL: gt_u16:
; X64:       # %bb.0: # %entry
; X64-NEXT:    cmpw %si, %di
; X64-NEXT:    ja ext@PLT # TAILCALL
; X64-NEXT:  # %bb.1: # %end
; X64-NEXT:    retq
entry:
  %ca = and i32 %a, 65535
  %cb = and i32 %b, 65535
  %cmp = icmp ugt i32 %ca, %cb
  br i1 %cmp, label %then, label %end
then:
  tail call void @ext()
  br label %end
end:
  ret void
}

define void @gt_u16_zext(i16 %a, i16 %b) {
; X86-LABEL: gt_u16_zext:
; X86:       # %bb.0: # %entry
; X86-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT:    movzwl {{[0-9]+}}(%esp), %ecx
; X86-NEXT:    cmpl %eax, %ecx
; X86-NEXT:    ja ext@PLT # TAILCALL
; X86-NEXT:  # %bb.1: # %end
; X86-NEXT:    retl
;
; X64-LABEL: gt_u16_zext:
; X64:       # %bb.0: # %entry
; X64-NEXT:    cmpw %si, %di
; X64-NEXT:    ja ext@PLT # TAILCALL
; X64-NEXT:  # %bb.1: # %end
; X64-NEXT:    retq
entry:
  %za = zext i16 %a to i32
  %zb = zext i16 %b to i32
  %cmp = icmp ugt i32 %za, %zb
  br i1 %cmp, label %then, label %end
then:
  tail call void @ext()
  br label %end
end:
  ret void
}

define void @gt_u16_wide_mask(i32 %a, i32 %b) {
; X86-LABEL: gt_u16_wide_mask:
; X86:       # %bb.0: # %entry
; X86-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT:    movzwl {{[0-9]+}}(%esp), %ecx
; X86-NEXT:    cmpl %eax, %ecx
; X86-NEXT:    ja ext@PLT # TAILCALL
; X86-NEXT:  # %bb.1: # %end
; X86-NEXT:    retl
;
; X64-LABEL: gt_u16_wide_mask:
; X64:       # %bb.0: # %entry
; X64-NEXT:    cmpw %si, %di
; X64-NEXT:    ja ext@PLT # TAILCALL
; X64-NEXT:  # %bb.1: # %end
; X64-NEXT:    retq
entry:
  %a16 = and i32 %a, 65535
  %ca = and i32 %a16, 131071     ; 0x1FFFF (17 trailing 1 bits)
  %cb = and i32 %b, 65535
  %cmp = icmp ugt i32 %ca, %cb
  br i1 %cmp, label %then, label %end
then:
  tail call void @ext()
  br label %end
end:
  ret void
}