llvm/test/CodeGen/X86/bswap-inline-asm.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s

; bswap inline assembly should be preserved as-is.

define i64 @foo(i64 %x) nounwind {
; CHECK-LABEL: foo:
; CHECK:       ## %bb.0:
; CHECK-NEXT:    movq %rdi, %rax
; CHECK-NEXT:    ## InlineAsm Start
; CHECK-NEXT:    bswapq %rax
; CHECK-NEXT:    ## InlineAsm End
; CHECK-NEXT:    retq
	%asmtmp = tail call i64 asm "bswap $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i64 %x) nounwind
	ret i64 %asmtmp
}

define i64 @bar(i64 %x) nounwind {
; CHECK-LABEL: bar:
; CHECK:       ## %bb.0:
; CHECK-NEXT:    movq %rdi, %rax
; CHECK-NEXT:    ## InlineAsm Start
; CHECK-NEXT:    bswapq %rax
; CHECK-NEXT:    ## InlineAsm End
; CHECK-NEXT:    retq
	%asmtmp = tail call i64 asm "bswapq ${0:q}", "=r,0,~{dirflag},~{fpsr},~{flags}"(i64 %x) nounwind
	ret i64 %asmtmp
}

define i32 @pen(i32 %x) nounwind {
; CHECK-LABEL: pen:
; CHECK:       ## %bb.0:
; CHECK-NEXT:    movl %edi, %eax
; CHECK-NEXT:    ## InlineAsm Start
; CHECK-NEXT:    bswapl %eax
; CHECK-NEXT:    ## InlineAsm End
; CHECK-NEXT:    retq
	%asmtmp = tail call i32 asm "bswapl ${0:k}", "=r,0,~{dirflag},~{fpsr},~{flags}"(i32 %x) nounwind
	ret i32 %asmtmp
}

define zeroext i16 @s16(i16 zeroext %x) nounwind {
; CHECK-LABEL: s16:
; CHECK:       ## %bb.0:
; CHECK-NEXT:    ## InlineAsm Start
; CHECK-NEXT:    rorw $8, %di
; CHECK-NEXT:    ## InlineAsm End
; CHECK-NEXT:    movzwl %di, %eax
; CHECK-NEXT:    retq
  %asmtmp = tail call i16 asm "rorw $$8, ${0:w}", "=r,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i16 %x) nounwind
  ret i16 %asmtmp
}

define zeroext i16 @t16(i16 zeroext %x) nounwind {
; CHECK-LABEL: t16:
; CHECK:       ## %bb.0:
; CHECK-NEXT:    ## InlineAsm Start
; CHECK-NEXT:    rorw $8, %di
; CHECK-NEXT:    ## InlineAsm End
; CHECK-NEXT:    movzwl %di, %eax
; CHECK-NEXT:    retq
  %asmtmp = tail call i16 asm "rorw $$8, ${0:w}", "=r,0,~{cc},~{dirflag},~{fpsr},~{flags}"(i16 %x) nounwind
  ret i16 %asmtmp
}

define zeroext i16 @u16(i16 zeroext %x) nounwind {
; CHECK-LABEL: u16:
; CHECK:       ## %bb.0:
; CHECK-NEXT:    ## InlineAsm Start
; CHECK-NEXT:    rolw $8, %di
; CHECK-NEXT:    ## InlineAsm End
; CHECK-NEXT:    movzwl %di, %eax
; CHECK-NEXT:    retq
  %asmtmp = tail call i16 asm "rolw $$8, ${0:w}", "=r,0,~{dirflag},~{fpsr},~{flags},~{cc}"(i16 %x) nounwind
  ret i16 %asmtmp
}

define zeroext i16 @v16(i16 zeroext %x) nounwind {
; CHECK-LABEL: v16:
; CHECK:       ## %bb.0:
; CHECK-NEXT:    ## InlineAsm Start
; CHECK-NEXT:    rolw $8, %di
; CHECK-NEXT:    ## InlineAsm End
; CHECK-NEXT:    movzwl %di, %eax
; CHECK-NEXT:    retq
  %asmtmp = tail call i16 asm "rolw $$8, ${0:w}", "=r,0,~{cc},~{dirflag},~{fpsr},~{flags}"(i16 %x) nounwind
  ret i16 %asmtmp
}

define i32 @s32(i32 %x) nounwind {
; CHECK-LABEL: s32:
; CHECK:       ## %bb.0:
; CHECK-NEXT:    movl %edi, %eax
; CHECK-NEXT:    ## InlineAsm Start
; CHECK-NEXT:    bswapl %eax
; CHECK-NEXT:    ## InlineAsm End
; CHECK-NEXT:    retq
  %asmtmp = tail call i32 asm "bswap $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i32 %x) nounwind
  ret i32 %asmtmp
}

define i32 @t32(i32 %x) nounwind {
; CHECK-LABEL: t32:
; CHECK:       ## %bb.0:
; CHECK-NEXT:    movl %edi, %eax
; CHECK-NEXT:    ## InlineAsm Start
; CHECK-NEXT:    bswapl %eax
; CHECK-NEXT:    ## InlineAsm End
; CHECK-NEXT:    retq
  %asmtmp = tail call i32 asm "bswap $0", "=r,0,~{dirflag},~{flags},~{fpsr}"(i32 %x) nounwind
  ret i32 %asmtmp
}

define i32 @u32(i32 %x) nounwind {
; CHECK-LABEL: u32:
; CHECK:       ## %bb.0:
; CHECK-NEXT:    movl %edi, %eax
; CHECK-NEXT:    ## InlineAsm Start
; CHECK-NEXT:    rorw $8, %ax
; CHECK-NEXT:    rorl $16, %eax
; CHECK-NEXT:    rorw $8, %ax
; CHECK-NEXT:    ## InlineAsm End
; CHECK-NEXT:    retq
  %asmtmp = tail call i32 asm "rorw $$8, ${0:w};rorl $$16, $0;rorw $$8, ${0:w}", "=r,0,~{cc},~{dirflag},~{flags},~{fpsr}"(i32 %x) nounwind
  ret i32 %asmtmp
}

define i64 @s64(i64 %x) nounwind {
; CHECK-LABEL: s64:
; CHECK:       ## %bb.0:
; CHECK-NEXT:    movq %rdi, %rax
; CHECK-NEXT:    ## InlineAsm Start
; CHECK-NEXT:    bswapq %rax
; CHECK-NEXT:    ## InlineAsm End
; CHECK-NEXT:    retq
  %asmtmp = tail call i64 asm "bswap ${0:q}", "=r,0,~{dirflag},~{fpsr},~{flags}"(i64 %x) nounwind
  ret i64 %asmtmp
}

define i64 @t64(i64 %x) nounwind {
; CHECK-LABEL: t64:
; CHECK:       ## %bb.0:
; CHECK-NEXT:    movq %rdi, %rax
; CHECK-NEXT:    ## InlineAsm Start
; CHECK-NEXT:    bswapq %rax
; CHECK-NEXT:    ## InlineAsm End
; CHECK-NEXT:    retq
  %asmtmp = tail call i64 asm "bswap ${0:q}", "=r,0,~{fpsr},~{dirflag},~{flags}"(i64 %x) nounwind
  ret i64 %asmtmp
}