llvm/test/CodeGen/SystemZ/vec-perm-12.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; Test inserting a truncated value into a vector element
;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | \
; RUN:   FileCheck -check-prefix=CHECK-CODE %s
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | \
; RUN:   FileCheck -check-prefix=CHECK-VECTOR %s

define <4 x i32> @f1(<4 x i32> %x, i64 %y) {
; CHECK-CODE-LABEL: f1:
; CHECK-CODE:       # %bb.0:
; CHECK-CODE-NEXT:    larl %r1, .LCPI0_0
; CHECK-CODE-NEXT:    vl %v1, 0(%r1), 3
; CHECK-CODE-NEXT:    vlvgf %v0, %r2, 0
; CHECK-CODE-NEXT:    vperm %v24, %v24, %v0, %v1
; CHECK-CODE-NEXT:    br %r14
;
; CHECK-VECTOR-LABEL: f1:
; CHECK-VECTOR:       # %bb.0:
; CHECK-VECTOR-NEXT:    larl %r1, .LCPI0_0
; CHECK-VECTOR-NEXT:    vl %v1, 0(%r1), 3
; CHECK-VECTOR-NEXT:    vlvgf %v0, %r2, 0
; CHECK-VECTOR-NEXT:    vperm %v24, %v24, %v0, %v1
; CHECK-VECTOR-NEXT:    br %r14


  %elt0 = extractelement <4 x i32> %x, i32 3
  %elt1 = extractelement <4 x i32> %x, i32 2
  %elt2 = extractelement <4 x i32> %x, i32 1
  %elt3 = trunc i64 %y to i32
  %vec0 = insertelement <4 x i32> undef, i32 %elt0, i32 0
  %vec1 = insertelement <4 x i32> %vec0, i32 %elt1, i32 1
  %vec2 = insertelement <4 x i32> %vec1, i32 %elt2, i32 2
  %vec3 = insertelement <4 x i32> %vec2, i32 %elt3, i32 3
  ret <4 x i32> %vec3
}