llvm/test/CodeGen/SystemZ/vec-args-02.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; Test the handling of unnamed vector arguments.
;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s -check-prefix=CHECK-VEC
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s -check-prefix=CHECK-STACK

; This routine is called with two named vector argument (passed
; in %v24 and %v26) and two unnamed vector arguments (passed
; in the double-wide stack slots at 160 and 176).
declare void @bar(<4 x i32>, <4 x i32>, ...)

define void @foo() {
; CHECK-VEC-LABEL: foo:
; CHECK-VEC:       # %bb.0:
; CHECK-VEC-NEXT:    stmg %r14, %r15, 112(%r15)
; CHECK-VEC-NEXT:    .cfi_offset %r14, -48
; CHECK-VEC-NEXT:    .cfi_offset %r15, -40
; CHECK-VEC-NEXT:    aghi %r15, -192
; CHECK-VEC-NEXT:    .cfi_def_cfa_offset 352
; CHECK-VEC-NEXT:    vrepif %v0, 4
; CHECK-VEC-NEXT:    vst %v0, 176(%r15), 3
; CHECK-VEC-NEXT:    vrepif %v0, 3
; CHECK-VEC-NEXT:    vrepif %v24, 1
; CHECK-VEC-NEXT:    vrepif %v26, 2
; CHECK-VEC-NEXT:    vst %v0, 160(%r15), 3
; CHECK-VEC-NEXT:    brasl %r14, bar@PLT
; CHECK-VEC-NEXT:    lmg %r14, %r15, 304(%r15)
; CHECK-VEC-NEXT:    br %r14
;
; CHECK-STACK-LABEL: foo:
; CHECK-STACK:       # %bb.0:
; CHECK-STACK-NEXT:    stmg %r14, %r15, 112(%r15)
; CHECK-STACK-NEXT:    .cfi_offset %r14, -48
; CHECK-STACK-NEXT:    .cfi_offset %r15, -40
; CHECK-STACK-NEXT:    aghi %r15, -192
; CHECK-STACK-NEXT:    .cfi_def_cfa_offset 352
; CHECK-STACK-NEXT:    vrepif %v0, 4
; CHECK-STACK-NEXT:    vst %v0, 176(%r15), 3
; CHECK-STACK-NEXT:    vrepif %v0, 3
; CHECK-STACK-NEXT:    vrepif %v24, 1
; CHECK-STACK-NEXT:    vrepif %v26, 2
; CHECK-STACK-NEXT:    vst %v0, 160(%r15), 3
; CHECK-STACK-NEXT:    brasl %r14, bar@PLT
; CHECK-STACK-NEXT:    lmg %r14, %r15, 304(%r15)
; CHECK-STACK-NEXT:    br %r14

  call void (<4 x i32>, <4 x i32>, ...) @bar
              (<4 x i32> <i32 1, i32 1, i32 1, i32 1>,
               <4 x i32> <i32 2, i32 2, i32 2, i32 2>,
               <4 x i32> <i32 3, i32 3, i32 3, i32 3>,
               <4 x i32> <i32 4, i32 4, i32 4, i32 4>)
  ret void
}