llvm/test/CodeGen/SystemZ/regcoal_undefsrc.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
# RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 -start-before=livevars -stop-after=register-coalescer %s -o - | FileCheck %s
# Test that coalesing of an empty live range (undef) does not cause failure.

---
name:            fun
tracksRegLiveness: true
body:             |
  ; CHECK-LABEL: name: fun
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
  ; CHECK-NEXT:   liveins: $r2d, $r3d
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:addr64bit = COPY $r3d
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:addr64bit = COPY $r2d
  ; CHECK-NEXT:   [[LHIMux:%[0-9]+]]:grx32bit = LHIMux 1
  ; CHECK-NEXT:   [[LHIMux1:%[0-9]+]]:grx32bit = LHIMux 0
  ; CHECK-NEXT:   CHIMux [[LHIMux1]], 0, implicit-def $cc
  ; CHECK-NEXT:   BRC 14, 6, %bb.2, implicit $cc
  ; CHECK-NEXT:   J %bb.1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[LMux:%[0-9]+]]:gr32bit = LMux [[COPY1]], 0, $noreg :: (load (s32))
  ; CHECK-NEXT:   undef [[LLILL:%[0-9]+]].subreg_h64:gr128bit = LLILL 0
  ; CHECK-NEXT:   [[LLILL:%[0-9]+]]:gr128bit = DLR [[LLILL]], [[LMux]]
  ; CHECK-NEXT:   [[LHIMux:%[0-9]+]]:grx32bit = COPY [[LLILL]].subreg_ll32
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   STMux [[LHIMux]], [[COPY]], 0, $noreg :: (store (s32))
  ; CHECK-NEXT:   Return
  bb.0:
    liveins: $r2d, $r3d

    %5:addr64bit = COPY $r3d
    %4:addr64bit = COPY $r2d
    %6:grx32bit = LHIMux 1
    %7:grx32bit = LHIMux 0
    CHIMux killed %7, 0, implicit-def $cc
    BRC 14, 6, %bb.2, implicit $cc
    J %bb.1

  bb.1:
    %1:gr32bit = LMux %4, 0, $noreg :: (load (s32))
    %15:gr64bit = LLILL 0
    %14:gr128bit = INSERT_SUBREG undef %13:gr128bit, %15, %subreg.subreg_h64
    %11:gr128bit = INSERT_SUBREG %14, undef %9:gr64bit, %subreg.subreg_l64
    %12:gr128bit = DLR %11, %1
    %2:grx32bit = COPY %12.subreg_ll32

  bb.2:
    %3:grx32bit = PHI %6, %bb.0, %2, %bb.1
    STMux %3, %5, 0, $noreg :: (store (s32))
    Return

...
## NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
# CHECK: {{.*}}