| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6 | |
| ; RUN: llc < %s -mtriple=sparc-unknown-linux-gnu | FileCheck %s --check-prefix=BE | |
| ; RUN: llc < %s -mtriple=sparcel-unknown-linux-gnu | FileCheck %s --check-prefix=LE | |
| ; %bb sees the zero %v only as an ISD::BUILD_PAIR of known-zero parts, because | |
| ; cross-block values are passed in parts. Operand 0 is the low half on | |
| ; big-endian targets too, so the shift folds either way. | |
| define i128 @knownbits_build_pair_shl(i128 %a0, i128 %a1, i1 %a2) nounwind { | |
| ; BE-LABEL: knownbits_build_pair_shl: | |
| ; BE: ! %bb.0: ! %entry | |
| ; BE-NEXT: ld [%sp+100], %o0 | |
| ; BE-NEXT: andcc %o0, 1, %g0 | |
| ; BE-NEXT: mov %g0, %o0 | |
| ; BE-NEXT: mov %g0, %o1 | |
| ; BE-NEXT: mov %g0, %o2 | |
| ; BE-NEXT: retl | |
| ; BE-NEXT: mov %g0, %o3 | |
| ; | |
| ; LE-LABEL: knownbits_build_pair_shl: | |
| ; LE: ! %bb.0: ! %entry | |
| ; LE-NEXT: ld [%sp+100], %o0 | |
| ; LE-NEXT: andcc %o0, 1, %g0 | |
| ; LE-NEXT: mov %g0, %o0 | |
| ; LE-NEXT: mov %g0, %o1 | |
| ; LE-NEXT: mov %g0, %o2 | |
| ; LE-NEXT: retl | |
| ; LE-NEXT: mov %g0, %o3 | |
| entry: | |
| %v = and i128 %a0, 0 | |
| br i1 %a2, label %bb, label %exit | |
| bb: | |
| %s = shl i128 %v, %a1 | |
| ret i128 %s | |
| exit: | |
| ret i128 0 | |
| } |