llvm/test/CodeGen/PowerPC/phi-eliminate.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 %s -o - \
# RUN:   -run-pass=livevars,phi-node-elimination | FileCheck %s
# RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 %s -o - \
# RUN:   --passes='require<live-vars>,phi-node-elimination' | FileCheck %s

--- |
  define void @phi_eliminate(i32 %0, i32 %1, ptr %2) {
    %scevgep3 = getelementptr i8, ptr %2, i64 undef
    call void @llvm.set.loop.iterations.i64(i64 undef)
    br label %4

  4:                                                ; preds = %4, %3
    %5 = phi i32 [ %8, %4 ], [ %0, %3 ]
    %6 = phi ptr [ %scevgep3, %3 ], [ %7, %4 ]
    %7 = getelementptr i8, ptr %6, i64 -1
    %8 = sdiv i32 %5, %1
    %9 = mul nsw i32 %8, %1
    %10 = sub nsw i32 %5, %9
    %11 = icmp ult i32 %10, 10
    %12 = trunc i32 %10 to i8
    %13 = select i1 %11, i8 48, i8 55
    %14 = add i8 %13, %12
    store i8 %14, ptr %7, align 1
    %15 = call i1 @llvm.loop.decrement.i64(i64 1)
    br i1 %15, label %4, label %16

  16:                                               ; preds = %4
    ret void
  }

  declare void @llvm.set.loop.iterations.i64(i64)

  declare i1 @llvm.loop.decrement.i64(i64)

  declare void @llvm.stackprotector(ptr, ptr)
...
---
name:            phi_eliminate
alignment:       16
exposesReturnsTwice: false
legalized:       false
regBankSelected: false
selected:        false
failedISel:      false
tracksRegLiveness: true
hasWinCFI:       false
registers:
  - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' }
  - { id: 1, class: gprc, preferred-register: '' }
  - { id: 2, class: g8rc_and_g8rc_nox0, preferred-register: '' }
  - { id: 3, class: g8rc, preferred-register: '' }
  - { id: 4, class: gprc, preferred-register: '' }
  - { id: 5, class: g8rc, preferred-register: '' }
  - { id: 6, class: g8rc, preferred-register: '' }
  - { id: 7, class: g8rc, preferred-register: '' }
  - { id: 8, class: gprc, preferred-register: '' }
  - { id: 9, class: gprc, preferred-register: '' }
  - { id: 10, class: g8rc, preferred-register: '' }
  - { id: 11, class: gprc, preferred-register: '' }
  - { id: 12, class: gprc, preferred-register: '' }
  - { id: 13, class: crrc, preferred-register: '' }
  - { id: 14, class: gprc_and_gprc_nor0, preferred-register: '' }
  - { id: 15, class: gprc_and_gprc_nor0, preferred-register: '' }
  - { id: 16, class: gprc, preferred-register: '' }
  - { id: 17, class: gprc, preferred-register: '' }
  - { id: 18, class: g8rc_and_g8rc_nox0, preferred-register: '' }
  - { id: 19, class: gprc, preferred-register: '' }
  - { id: 20, class: gprc, preferred-register: '' }
  - { id: 21, class: gprc, preferred-register: '' }
  - { id: 22, class: crrc, preferred-register: '' }
  - { id: 23, class: gprc, preferred-register: '' }
  - { id: 24, class: gprc, preferred-register: '' }
  - { id: 25, class: g8rc_and_g8rc_nox0, preferred-register: '' }
  - { id: 26, class: gprc, preferred-register: '' }
  - { id: 27, class: g8rc_and_g8rc_nox0, preferred-register: '' }
  - { id: 28, class: gprc, preferred-register: '' }
  - { id: 29, class: gprc, preferred-register: '' }
  - { id: 30, class: gprc, preferred-register: '' }
  - { id: 31, class: crrc, preferred-register: '' }
  - { id: 32, class: gprc, preferred-register: '' }
  - { id: 33, class: gprc, preferred-register: '' }
  - { id: 34, class: g8rc_and_g8rc_nox0, preferred-register: '' }
  - { id: 35, class: gprc, preferred-register: '' }
  - { id: 36, class: gprc, preferred-register: '' }
  - { id: 37, class: gprc, preferred-register: '' }
  - { id: 38, class: g8rc_and_g8rc_nox0, preferred-register: '' }
  - { id: 39, class: g8rc, preferred-register: '' }
  - { id: 40, class: gprc, preferred-register: '' }
  - { id: 41, class: gprc, preferred-register: '' }
  - { id: 42, class: g8rc_and_g8rc_nox0, preferred-register: '' }
  - { id: 43, class: gprc, preferred-register: '' }
  - { id: 44, class: g8rc_and_g8rc_nox0, preferred-register: '' }
  - { id: 45, class: gprc, preferred-register: '' }
  - { id: 46, class: gprc, preferred-register: '' }
  - { id: 47, class: crrc, preferred-register: '' }
  - { id: 48, class: gprc, preferred-register: '' }
  - { id: 49, class: gprc, preferred-register: '' }
  - { id: 50, class: g8rc_and_g8rc_nox0, preferred-register: '' }
  - { id: 51, class: g8rc, preferred-register: '' }
  - { id: 52, class: gprc, preferred-register: '' }
  - { id: 53, class: gprc, preferred-register: '' }
  - { id: 54, class: g8rc_and_g8rc_nox0, preferred-register: '' }
  - { id: 55, class: gprc, preferred-register: '' }
  - { id: 56, class: gprc, preferred-register: '' }
liveins:
  - { reg: '$x3', virtual-reg: '%5' }
  - { reg: '$x4', virtual-reg: '%6' }
frameInfo:
  isFrameAddressTaken: false
  isReturnAddressTaken: false
  hasStackMap:     false
  hasPatchPoint:   false
  stackSize:       0
  offsetAdjustment: 0
  maxAlignment:    1
  adjustsStack:    false
  hasCalls:        false
  stackProtector:  ''
  maxCallFrameSize: 4294967295
  cvBytesOfCalleeSavedRegisters: 0
  hasOpaqueSPAdjustment: false
  hasVAStart:      false
  hasMustTailInVarArgFunc: false
  localFrameSize:  0
  savePoint:       []
  restorePoint:    []
fixedStack:      []
stack:           []
callSites:       []
constants:       []
machineFunctionInfo: {}
body:             |
  ; CHECK-LABEL: name: phi_eliminate
  ; CHECK: bb.0 (%ir-block.3):
  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
  ; CHECK-NEXT:   liveins: $x3, $x4
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:g8rc = COPY killed $x4
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:g8rc = COPY killed $x3
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:gprc = COPY killed [[COPY]].sub_32
  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:gprc = COPY killed [[COPY1]].sub_32
  ; CHECK-NEXT:   MTCTR8loop undef %10:g8rc, implicit-def dead $ctr8
  ; CHECK-NEXT:   [[LI:%[0-9]+]]:gprc_and_gprc_nor0 = LI 55
  ; CHECK-NEXT:   [[LI1:%[0-9]+]]:gprc_and_gprc_nor0 = LI 48
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1 (%ir-block.4):
  ; CHECK-NEXT:   successors: %bb.2(0x40000000), %bb.5(0x40000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[DIVW:%[0-9]+]]:gprc = DIVW [[COPY3]], [[COPY2]]
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:gprc = COPY [[COPY3]]
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:g8rc_and_g8rc_nox0 = IMPLICIT_DEF
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:gprc = COPY [[DIVW]]
  ; CHECK-NEXT:   BDZ8 %bb.5, implicit-def $ctr8, implicit $ctr8
  ; CHECK-NEXT:   B %bb.2
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2 (%ir-block.4):
  ; CHECK-NEXT:   successors: %bb.3(0x40000000), %bb.4(0x40000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[MULLW:%[0-9]+]]:gprc = nsw MULLW [[DIVW]], [[COPY2]]
  ; CHECK-NEXT:   [[SUBF:%[0-9]+]]:gprc = SUBF killed [[MULLW]], killed [[COPY3]]
  ; CHECK-NEXT:   [[CMPLWI:%[0-9]+]]:crrc = CMPLWI [[SUBF]], 10
  ; CHECK-NEXT:   [[ISEL:%[0-9]+]]:gprc = ISEL [[LI1]], [[LI]], killed [[CMPLWI]].sub_lt
  ; CHECK-NEXT:   [[ADD4_:%[0-9]+]]:gprc = ADD4 killed [[ISEL]], killed [[SUBF]]
  ; CHECK-NEXT:   [[STBU:%[0-9]+]]:g8rc_and_g8rc_nox0 = STBU killed [[ADD4_]], -1, undef %0:g8rc_and_g8rc_nox0 :: (store (s8) into %ir.7)
  ; CHECK-NEXT:   [[DIVW1:%[0-9]+]]:gprc = DIVW [[DIVW]], [[COPY2]]
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:gprc = COPY [[DIVW1]]
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:gprc = COPY [[DIVW]]
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY [[STBU]]
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:gprc = COPY [[DIVW]]
  ; CHECK-NEXT:   BDZ8 %bb.4, implicit-def $ctr8, implicit $ctr8
  ; CHECK-NEXT:   B %bb.3
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.3 (%ir-block.4):
  ; CHECK-NEXT:   successors: %bb.3(0x7c000000), %bb.4(0x04000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY10:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY [[COPY8]]
  ; CHECK-NEXT:   [[COPY11:%[0-9]+]]:gprc = COPY [[COPY6]]
  ; CHECK-NEXT:   [[COPY12:%[0-9]+]]:gprc = COPY [[COPY7]]
  ; CHECK-NEXT:   [[COPY13:%[0-9]+]]:gprc = COPY [[COPY6]]
  ; CHECK-NEXT:   [[COPY14:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY killed [[COPY10]]
  ; CHECK-NEXT:   [[COPY15:%[0-9]+]]:gprc = COPY [[COPY13]]
  ; CHECK-NEXT:   [[DIVW2:%[0-9]+]]:gprc = DIVW [[COPY15]], [[COPY2]]
  ; CHECK-NEXT:   [[MULLW1:%[0-9]+]]:gprc = nsw MULLW killed [[COPY11]], [[COPY2]]
  ; CHECK-NEXT:   [[SUBF1:%[0-9]+]]:gprc = SUBF killed [[MULLW1]], killed [[COPY12]]
  ; CHECK-NEXT:   [[CMPLWI1:%[0-9]+]]:crrc = CMPLWI [[SUBF1]], 10
  ; CHECK-NEXT:   [[ISEL1:%[0-9]+]]:gprc = ISEL [[LI1]], [[LI]], killed [[CMPLWI1]].sub_lt
  ; CHECK-NEXT:   [[ADD4_1:%[0-9]+]]:gprc = ADD4 killed [[ISEL1]], killed [[SUBF1]]
  ; CHECK-NEXT:   [[STBU1:%[0-9]+]]:g8rc_and_g8rc_nox0 = STBU killed [[ADD4_1]], -1, killed [[COPY14]] :: (store unknown-size into %ir.7, align 1)
  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:gprc = COPY [[DIVW2]]
  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:gprc = COPY [[COPY13]]
  ; CHECK-NEXT:   [[COPY8:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY [[STBU1]]
  ; CHECK-NEXT:   [[COPY9:%[0-9]+]]:gprc = COPY [[COPY15]]
  ; CHECK-NEXT:   BDNZ8 %bb.3, implicit-def $ctr8, implicit $ctr8
  ; CHECK-NEXT:   B %bb.4
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.4:
  ; CHECK-NEXT:   successors: %bb.5(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY16:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY [[COPY8]]
  ; CHECK-NEXT:   [[COPY17:%[0-9]+]]:gprc = COPY [[COPY6]]
  ; CHECK-NEXT:   [[COPY18:%[0-9]+]]:gprc = COPY [[COPY9]]
  ; CHECK-NEXT:   [[COPY19:%[0-9]+]]:g8rc = COPY killed [[COPY16]]
  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:gprc = COPY [[COPY18]]
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY [[COPY19]]
  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:gprc = COPY [[COPY17]]
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.5:
  ; CHECK-NEXT:   successors: %bb.6(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY20:%[0-9]+]]:gprc = COPY [[COPY5]]
  ; CHECK-NEXT:   [[COPY21:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY [[DEF]]
  ; CHECK-NEXT:   [[COPY22:%[0-9]+]]:gprc = COPY [[COPY4]]
  ; CHECK-NEXT:   [[MULLW2:%[0-9]+]]:gprc = nsw MULLW killed [[COPY20]], killed [[COPY2]]
  ; CHECK-NEXT:   [[SUBF2:%[0-9]+]]:gprc = SUBF killed [[MULLW2]], killed [[COPY22]]
  ; CHECK-NEXT:   [[CMPLWI2:%[0-9]+]]:crrc = CMPLWI [[SUBF2]], 10
  ; CHECK-NEXT:   [[ISEL2:%[0-9]+]]:gprc = ISEL killed [[LI1]], killed [[LI]], killed [[CMPLWI2]].sub_lt
  ; CHECK-NEXT:   [[ADD4_2:%[0-9]+]]:gprc = ADD4 killed [[ISEL2]], killed [[SUBF2]]
  ; CHECK-NEXT:   dead [[STBU2:%[0-9]+]]:g8rc_and_g8rc_nox0 = STBU killed [[ADD4_2]], -1, killed [[COPY21]] :: (store unknown-size into %ir.7, align 1)
  ; CHECK-NEXT:   B %bb.6
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.6 (%ir-block.16):
  ; CHECK-NEXT:   BLR8 implicit $lr8, implicit $rm








  bb.0 (%ir-block.3):
    successors: %bb.1(0x80000000)
    liveins: $x3, $x4

    %6:g8rc = COPY killed $x4
    %5:g8rc = COPY killed $x3
    %9:gprc = COPY killed %6.sub_32
    %8:gprc = COPY killed %5.sub_32
    MTCTR8loop undef %10:g8rc, implicit-def dead $ctr8
    %14:gprc_and_gprc_nor0 = LI 55
    %15:gprc_and_gprc_nor0 = LI 48

  bb.1 (%ir-block.4):
    successors: %bb.2(0x40000000), %bb.5(0x40000000)

    %19:gprc = DIVW %8, %9
    BDZ8 %bb.5, implicit-def $ctr8, implicit $ctr8
    B %bb.2

  bb.2 (%ir-block.4):
    successors: %bb.3(0x40000000), %bb.4(0x40000000)

    %20:gprc = nsw MULLW %19, %9
    %21:gprc = SUBF killed %20, killed %8
    %22:crrc = CMPLWI %21, 10
    %23:gprc = ISEL %15, %14, killed %22.sub_lt
    %24:gprc = ADD4 killed %23, killed %21
    %25:g8rc_and_g8rc_nox0 = STBU killed %24, -1, undef %0:g8rc_and_g8rc_nox0 :: (store (s8) into %ir.7)
    %26:gprc = DIVW %19, %9
    BDZ8 %bb.4, implicit-def $ctr8, implicit $ctr8
    B %bb.3

  bb.3 (%ir-block.4):
    successors: %bb.3(0x7c000000), %bb.4(0x04000000)

    %35:gprc = PHI %26, %bb.2, %28, %bb.3
    %36:gprc = PHI %19, %bb.2, %35, %bb.3
    %37:gprc = PHI %26, %bb.2, %28, %bb.3
    %38:g8rc_and_g8rc_nox0 = PHI %25, %bb.2, %34, %bb.3
    %27:g8rc_and_g8rc_nox0 = COPY killed %38
    %56:gprc = COPY %35
    %28:gprc = DIVW %56, %9
    %29:gprc = nsw MULLW killed %37, %9
    %30:gprc = SUBF killed %29, killed %36
    %31:crrc = CMPLWI %30, 10
    %32:gprc = ISEL %15, %14, killed %31.sub_lt
    %33:gprc = ADD4 killed %32, killed %30
    %34:g8rc_and_g8rc_nox0 = STBU killed %33, -1, killed %27 :: (store unknown-size into %ir.7, align 1)
    BDNZ8 %bb.3, implicit-def $ctr8, implicit $ctr8
    B %bb.4

  bb.4:
    successors: %bb.5(0x80000000)

    %41:gprc = PHI %19, %bb.2, %56, %bb.3
    %43:gprc = PHI %26, %bb.2, %28, %bb.3
    %44:g8rc_and_g8rc_nox0 = PHI %25, %bb.2, %34, %bb.3
    %39:g8rc = COPY killed %44

  bb.5:
    successors: %bb.6(0x80000000)

    %53:gprc = PHI %8, %bb.1, %41, %bb.4
    %54:g8rc_and_g8rc_nox0 = PHI undef %0:g8rc_and_g8rc_nox0, %bb.1, %39, %bb.4
    %55:gprc = PHI %19, %bb.1, %43, %bb.4
    %45:gprc = nsw MULLW killed %55, killed %9
    %46:gprc = SUBF killed %45, killed %53
    %47:crrc = CMPLWI %46, 10
    %48:gprc = ISEL killed %15, killed %14, killed %47.sub_lt
    %49:gprc = ADD4 killed %48, killed %46
    dead %50:g8rc_and_g8rc_nox0 = STBU killed %49, -1, killed %54 :: (store unknown-size into %ir.7, align 1)
    B %bb.6

  bb.6 (%ir-block.16):
    BLR8 implicit $lr8, implicit $rm

...