llvm/test/CodeGen/AMDGPU/v-cmp-cse-across-loop.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -mtriple=amdgpu12.00--amdpal -mattr=+wavefrontsize64 -run-pass=machine-cse -verify-machineinstrs %s -o - | FileCheck %s
# Check that V_CMP is not eliminated across the loop.

---
name:              v_cmp_cse_across_loop
tracksRegLiveness: true
legalized:         true
regBankSelected:   true
selected:          true
body:              |
  ; CHECK-LABEL: name: v_cmp_cse_across_loop
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
  ; CHECK-NEXT:   liveins: $vgpr0, $sgpr0, $sgpr2_sgpr3
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3
  ; CHECK-NEXT:   S_BRANCH %bb.1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[V_CMP_GT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[COPY]], [[COPY1]], implicit $exec
  ; CHECK-NEXT:   [[SI_IF_BREAK:%[0-9]+]]:sreg_64 = SI_IF_BREAK killed [[V_CMP_GT_U32_e64_]], [[COPY2]], implicit-def dead $scc
  ; CHECK-NEXT:   SI_LOOP [[SI_IF_BREAK]], %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
  ; CHECK-NEXT:   S_BRANCH %bb.2
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   SI_END_CF [[SI_IF_BREAK]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
  ; CHECK-NEXT:   [[V_CMP_GT_U32_e64_1:%[0-9]+]]:sreg_64 = V_CMP_GT_U32_e64 [[COPY]], [[COPY1]], implicit $exec
  ; CHECK-NEXT:   [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[V_CMP_GT_U32_e64_1]], $exec, implicit-def $scc
  ; CHECK-NEXT:   S_BRANCH %bb.3
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.3:
  ; CHECK-NEXT:   S_ENDPGM 0
  bb.0:
    successors: %bb.1(0x80000000)
    liveins: $vgpr0, $sgpr0, $sgpr2_sgpr3

    %0:vgpr_32 = COPY $vgpr0
    %1:sreg_32 = COPY $sgpr0
    %2:sreg_64 = COPY $sgpr2_sgpr3
    S_BRANCH %bb.1

  bb.1:
    successors: %bb.1(0x40000000), %bb.2(0x40000000)

    %3:sreg_64 = V_CMP_GT_U32_e64 %0:vgpr_32, %1:sreg_32, implicit $exec
    %4:sreg_64 = SI_IF_BREAK killed %3:sreg_64, %2:sreg_64, implicit-def dead $scc
    SI_LOOP %4:sreg_64, %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
    S_BRANCH %bb.2

  bb.2:
    successors: %bb.3(0x80000000)

    SI_END_CF %4:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
    %5:sreg_64 = V_CMP_GT_U32_e64 %0:vgpr_32, %1:sreg_32, implicit $exec
    %6:sreg_64 = S_AND_B64 %5:sreg_64, $exec, implicit-def $scc
    S_BRANCH %bb.3

  bb.3:
    S_ENDPGM 0
...