llvm/test/CodeGen/AMDGPU/lower-module-lds-constantexpr.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -S -mtriple=amdgpu-- -amdgpu-lower-module-lds --amdgpu-lower-module-lds-strategy=module < %s | FileCheck %s
; RUN: opt -S -mtriple=amdgpu-- -passes=amdgpu-lower-module-lds --amdgpu-lower-module-lds-strategy=module < %s | FileCheck %s

; CHECK: %llvm.amdgcn.module.lds.t = type { float, float }
; CHECK: %llvm.amdgcn.kernel.timestwo.lds.t = type { float, float }

@a_func = addrspace(3) global float poison, align 4

@kern = addrspace(3) global float poison, align 4

; @a_func is only used from a non-kernel function so is rewritten
; @b_both is used from a non-kernel function so is rewritten
; sorted both < func, so @b_both at null and @a_func at 4
@b_both = addrspace(3) global float poison, align 4


define i32 @get_func() local_unnamed_addr #0 {
; CHECK-LABEL: define i32 @get_func() local_unnamed_addr {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    [[TMP0:%.*]] = addrspacecast ptr addrspace(3) @llvm.amdgcn.module.lds to ptr
; CHECK-NEXT:    [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64
; CHECK-NEXT:    [[TMP2:%.*]] = add i64 [[TMP1]], [[TMP1]]
; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr
; CHECK-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
; CHECK-NEXT:    ret i32 [[TMP4]]
;
entry:
  %0 = load i32, ptr inttoptr (i64 add (i64 ptrtoint (ptr addrspacecast (ptr addrspace(3) @a_func to ptr) to i64), i64 ptrtoint (ptr addrspacecast (ptr addrspace(3) @a_func to ptr) to i64)) to ptr), align 4
  ret i32 %0
}

define void @set_func(i32 %x) {
; CHECK-LABEL: define void @set_func(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    [[TMP0:%.*]] = addrspacecast ptr addrspace(3) getelementptr inbounds (i8, ptr addrspace(3) @llvm.amdgcn.module.lds, i32 4) to ptr
; CHECK-NEXT:    [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64
; CHECK-NEXT:    [[TMP2:%.*]] = add i64 [[TMP1]], [[TMP1]]
; CHECK-NEXT:    [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr
; CHECK-NEXT:    store i32 [[X]], ptr [[TMP3]], align 4
; CHECK-NEXT:    ret void
;
entry:
  store i32 %x, ptr inttoptr (i64 add (i64 ptrtoint (ptr addrspacecast (ptr addrspace(3) @b_both to ptr) to i64), i64 ptrtoint (ptr addrspacecast (ptr addrspace(3) @b_both to ptr) to i64)) to ptr), align 4
  ret void
}


define amdgpu_kernel void @timestwo() {
; CHECK-LABEL: define amdgpu_kernel void @timestwo(
; CHECK-SAME: ) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT:    [[TMP1:%.*]] = addrspacecast ptr addrspace(3) @llvm.amdgcn.kernel.timestwo.lds to ptr
; CHECK-NEXT:    [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64
; CHECK-NEXT:    [[TMP3:%.*]] = addrspacecast ptr addrspace(3) getelementptr inbounds (i8, ptr addrspace(3) @llvm.amdgcn.kernel.timestwo.lds, i32 4) to ptr
; CHECK-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[TMP3]] to i64
; CHECK-NEXT:    [[TMP5:%.*]] = add i64 [[TMP2]], [[TMP4]]
; CHECK-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
; CHECK-NEXT:    [[LD:%.*]] = load i32, ptr [[TMP6]], align 4
; CHECK-NEXT:    [[MUL:%.*]] = mul i32 [[LD]], 2
; CHECK-NEXT:    [[TMP7:%.*]] = addrspacecast ptr addrspace(3) getelementptr inbounds (i8, ptr addrspace(3) @llvm.amdgcn.kernel.timestwo.lds, i32 4) to ptr
; CHECK-NEXT:    [[TMP8:%.*]] = ptrtoint ptr [[TMP7]] to i64
; CHECK-NEXT:    [[TMP9:%.*]] = addrspacecast ptr addrspace(3) @llvm.amdgcn.kernel.timestwo.lds to ptr
; CHECK-NEXT:    [[TMP10:%.*]] = ptrtoint ptr [[TMP9]] to i64
; CHECK-NEXT:    [[TMP11:%.*]] = add i64 [[TMP8]], [[TMP10]]
; CHECK-NEXT:    [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr
; CHECK-NEXT:    store i32 [[MUL]], ptr [[TMP12]], align 4
; CHECK-NEXT:    ret void
;
  %ld = load i32, ptr inttoptr (i64 add (i64 ptrtoint (ptr addrspacecast (ptr addrspace(3) @b_both to ptr) to i64), i64 ptrtoint (ptr addrspacecast (ptr addrspace(3) @kern to ptr) to i64)) to ptr), align 4
  %mul = mul i32 %ld, 2
  store i32 %mul, ptr inttoptr (i64 add (i64 ptrtoint (ptr addrspacecast (ptr addrspace(3) @kern to ptr) to i64), i64 ptrtoint (ptr addrspacecast (ptr addrspace(3) @b_both to ptr) to i64)) to ptr), align 4
  ret void
}

define amdgpu_kernel void @through_functions() {
; CHECK-LABEL: define amdgpu_kernel void @through_functions(
; CHECK-SAME: ) #[[ATTR0]] {
; CHECK-NEXT:    call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.module.lds) ]
; CHECK-NEXT:    [[LD:%.*]] = call i32 @get_func()
; CHECK-NEXT:    [[MUL:%.*]] = mul i32 [[LD]], 4
; CHECK-NEXT:    call void @set_func(i32 [[MUL]])
; CHECK-NEXT:    ret void
;
  %ld = call i32 @get_func()
  %mul = mul i32 %ld, 4
  call void @set_func(i32 %mul)
  ret void
}

; CHECK: attributes #0 = { "amdgpu-lds-size"="8" }