llvm/test/CodeGen/AMDGPU/lower-kernargs-lds-ptr.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals all --version 6
; RUN: opt -mtriple=amdgpu7.00-amd-amdhsa -S -o - -passes=amdgpu-lower-kernel-arguments %s | FileCheck -check-prefixes=GFX7-HSA %s
; RUN: opt -mtriple=amdgpu7.00-- -S -o - -passes=amdgpu-lower-kernel-arguments %s | FileCheck -check-prefixes=GFX7-MESA %s
; RUN: opt -mtriple=amdgpu6.00-amd-amdhsa -S -o - -passes=amdgpu-lower-kernel-arguments %s | FileCheck -check-prefixes=GFX6-HSA %s
; RUN: opt -mtriple=amdgpu6.00-- -S -o - -passes=amdgpu-lower-kernel-arguments %s | FileCheck -check-prefixes=GFX6-MESA %s

; Lowering of an LDS pointer kernel argument is skipped on gfx6 as an
; optmization hack. The kernarg segment size also differs by OS.

define amdgpu_kernel void @kern_lds_ptr(ptr addrspace(3) %lds) {
; GFX7-HSA-LABEL: define amdgpu_kernel void @kern_lds_ptr(
; GFX7-HSA-SAME: ptr addrspace(3) [[LDS:%.*]]) {
; GFX7-HSA-NEXT:    [[KERN_LDS_PTR_KERNARG_SEGMENT:%.*]] = call nonnull align 16 dereferenceable(264) ptr addrspace(4) @llvm.amdgcn.kernarg.segment.ptr()
; GFX7-HSA-NEXT:    [[LDS_KERNARG_OFFSET:%.*]] = getelementptr inbounds i8, ptr addrspace(4) [[KERN_LDS_PTR_KERNARG_SEGMENT]], i64 0
; GFX7-HSA-NEXT:    [[LDS_LOAD:%.*]] = load ptr addrspace(3), ptr addrspace(4) [[LDS_KERNARG_OFFSET]], align 16, !invariant.load [[META0:![0-9]+]]
; GFX7-HSA-NEXT:    store i32 0, ptr addrspace(3) [[LDS_LOAD]], align 4
; GFX7-HSA-NEXT:    ret void
;
; GFX7-MESA-LABEL: define amdgpu_kernel void @kern_lds_ptr(
; GFX7-MESA-SAME: ptr addrspace(3) [[LDS:%.*]]) {
; GFX7-MESA-NEXT:    [[KERN_LDS_PTR_KERNARG_SEGMENT:%.*]] = call nonnull align 16 dereferenceable(260) ptr addrspace(4) @llvm.amdgcn.kernarg.segment.ptr()
; GFX7-MESA-NEXT:    [[LDS_KERNARG_OFFSET:%.*]] = getelementptr inbounds i8, ptr addrspace(4) [[KERN_LDS_PTR_KERNARG_SEGMENT]], i64 36
; GFX7-MESA-NEXT:    [[LDS_LOAD:%.*]] = load ptr addrspace(3), ptr addrspace(4) [[LDS_KERNARG_OFFSET]], align 4, !invariant.load [[META0:![0-9]+]]
; GFX7-MESA-NEXT:    store i32 0, ptr addrspace(3) [[LDS_LOAD]], align 4
; GFX7-MESA-NEXT:    ret void
;
; GFX6-HSA-LABEL: define amdgpu_kernel void @kern_lds_ptr(
; GFX6-HSA-SAME: ptr addrspace(3) [[LDS:%.*]]) {
; GFX6-HSA-NEXT:    [[KERN_LDS_PTR_KERNARG_SEGMENT:%.*]] = call nonnull align 16 dereferenceable(264) ptr addrspace(4) @llvm.amdgcn.kernarg.segment.ptr()
; GFX6-HSA-NEXT:    store i32 0, ptr addrspace(3) [[LDS]], align 4
; GFX6-HSA-NEXT:    ret void
;
; GFX6-MESA-LABEL: define amdgpu_kernel void @kern_lds_ptr(
; GFX6-MESA-SAME: ptr addrspace(3) [[LDS:%.*]]) {
; GFX6-MESA-NEXT:    [[KERN_LDS_PTR_KERNARG_SEGMENT:%.*]] = call nonnull align 16 dereferenceable(260) ptr addrspace(4) @llvm.amdgcn.kernarg.segment.ptr()
; GFX6-MESA-NEXT:    store i32 0, ptr addrspace(3) [[LDS]], align 4
; GFX6-MESA-NEXT:    ret void
;
  store i32 0, ptr addrspace(3) %lds, align 4
  ret void
}
;.
; GFX7-HSA: attributes #[[ATTR0:[0-9]+]] = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
;.
; GFX7-MESA: attributes #[[ATTR0:[0-9]+]] = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
;.
; GFX7-HSA: [[META0]] = !{}
;.
; GFX7-MESA: [[META0]] = !{}
;.
; GFX6-HSA: attributes #[[ATTR0:[0-9]+]] = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
;.
; GFX6-MESA: attributes #[[ATTR0:[0-9]+]] = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
;.