llvm/test/CodeGen/AMDGPU/load-global-i8.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=amdgpu6.00 < %s | FileCheck -allow-deprecated-dag-overlap --check-prefix=GCN-NOHSA-SI %s
; RUN: llc -mtriple=amdgpu7.00--amdhsa < %s | FileCheck -allow-deprecated-dag-overlap --check-prefix=GCN-HSA %s
; RUN: llc -mtriple=amdgpu8.02 -mattr=-flat-for-global < %s | FileCheck -allow-deprecated-dag-overlap --check-prefix=GCN-NOHSA-VI %s
; RUN: llc -mtriple=r600 -mcpu=redwood < %s | FileCheck -allow-deprecated-dag-overlap --check-prefix=EG %s
; RUN: llc -mtriple=r600 -mcpu=cayman < %s | FileCheck -allow-deprecated-dag-overlap --check-prefix=CM %s

; TODO: NOT AND
define amdgpu_kernel void @global_load_i8(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_load_i8:
; GCN-NOHSA-SI:       ; %bb.0: ; %entry
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-SI-NEXT:    buffer_load_ubyte v0, off, s[8:11], 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    buffer_store_byte v0, off, s[4:7], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_load_i8:
; GCN-HSA:       ; %bb.0: ; %entry
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    flat_load_ubyte v2, v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    flat_store_byte v[0:1], v2
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_load_i8:
; GCN-NOHSA-VI:       ; %bb.0: ; %entry
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-VI-NEXT:    buffer_load_ubyte v0, off, s[8:11], 0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    buffer_store_byte v0, off, s[4:7], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_load_i8:
; EG:       ; %bb.0: ; %entry
; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 11, @9, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT MSKOR T0.XW, T1.X
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_8 T0.X, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     MOV * T0.X, KC0[2].Z,
; EG-NEXT:    ALU clause starting at 9:
; EG-NEXT:     AND_INT T0.W, KC0[2].Y, literal.x,
; EG-NEXT:     AND_INT * T1.W, T0.X, literal.y,
; EG-NEXT:    3(4.203895e-45), 255(3.573311e-43)
; EG-NEXT:     LSHL * T0.W, PV.W, literal.x,
; EG-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; EG-NEXT:     LSHL T0.X, T1.W, PV.W,
; EG-NEXT:     LSHL * T0.W, literal.x, PV.W,
; EG-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; EG-NEXT:     MOV T0.Y, 0.0,
; EG-NEXT:     MOV * T0.Z, 0.0,
; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
;
; CM-LABEL: global_load_i8:
; CM:       ; %bb.0: ; %entry
; CM-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 11, @9, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT MSKOR T0.XW, T1.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_8 T0.X, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     MOV * T0.X, KC0[2].Z,
; CM-NEXT:    ALU clause starting at 9:
; CM-NEXT:     AND_INT * T0.W, KC0[2].Y, literal.x,
; CM-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, T0.X, literal.x,
; CM-NEXT:     LSHL * T0.W, PV.W, literal.y,
; CM-NEXT:    255(3.573311e-43), 3(4.203895e-45)
; CM-NEXT:     LSHL T0.X, PV.Z, PV.W,
; CM-NEXT:     LSHL * T0.W, literal.x, PV.W,
; CM-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; CM-NEXT:     MOV T0.Y, 0.0,
; CM-NEXT:     MOV * T0.Z, 0.0,
; CM-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
entry:
  %ld = load i8, ptr addrspace(1) %in
  store i8 %ld, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_load_v2i8(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_load_v2i8:
; GCN-NOHSA-SI:       ; %bb.0: ; %entry
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-SI-NEXT:    buffer_load_ushort v0, off, s[8:11], 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    buffer_store_short v0, off, s[4:7], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_load_v2i8:
; GCN-HSA:       ; %bb.0: ; %entry
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    flat_load_ushort v2, v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    flat_store_short v[0:1], v2
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_load_v2i8:
; GCN-NOHSA-VI:       ; %bb.0: ; %entry
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-VI-NEXT:    buffer_load_ushort v0, off, s[8:11], 0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    buffer_store_short v0, off, s[4:7], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_load_v2i8:
; EG:       ; %bb.0: ; %entry
; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 11, @9, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT MSKOR T0.XW, T1.X
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_16 T0.X, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     MOV * T0.X, KC0[2].Z,
; EG-NEXT:    ALU clause starting at 9:
; EG-NEXT:     AND_INT T0.W, KC0[2].Y, literal.x,
; EG-NEXT:     AND_INT * T1.W, T0.X, literal.y,
; EG-NEXT:    3(4.203895e-45), 65535(9.183409e-41)
; EG-NEXT:     LSHL * T0.W, PV.W, literal.x,
; EG-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; EG-NEXT:     LSHL T0.X, T1.W, PV.W,
; EG-NEXT:     LSHL * T0.W, literal.x, PV.W,
; EG-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; EG-NEXT:     MOV T0.Y, 0.0,
; EG-NEXT:     MOV * T0.Z, 0.0,
; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
;
; CM-LABEL: global_load_v2i8:
; CM:       ; %bb.0: ; %entry
; CM-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 11, @9, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT MSKOR T0.XW, T1.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_16 T0.X, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     MOV * T0.X, KC0[2].Z,
; CM-NEXT:    ALU clause starting at 9:
; CM-NEXT:     AND_INT * T0.W, KC0[2].Y, literal.x,
; CM-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, T0.X, literal.x,
; CM-NEXT:     LSHL * T0.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 3(4.203895e-45)
; CM-NEXT:     LSHL T0.X, PV.Z, PV.W,
; CM-NEXT:     LSHL * T0.W, literal.x, PV.W,
; CM-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; CM-NEXT:     MOV T0.Y, 0.0,
; CM-NEXT:     MOV * T0.Z, 0.0,
; CM-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
entry:
  %ld = load <2 x i8>, ptr addrspace(1) %in
  store <2 x i8> %ld, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_load_v3i8(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_load_v3i8:
; GCN-NOHSA-SI:       ; %bb.0: ; %entry
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[2:3]
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dword v0, v[0:1], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v1, 16, v0
; GCN-NOHSA-SI-NEXT:    buffer_store_short v0, off, s[4:7], 0
; GCN-NOHSA-SI-NEXT:    buffer_store_byte v1, off, s[4:7], 0 offset:2
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_load_v3i8:
; GCN-HSA:       ; %bb.0: ; %entry
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dword v2, v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT:    s_add_u32 s0, s0, 2
; GCN-HSA-NEXT:    s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v3, 16, v2
; GCN-HSA-NEXT:    flat_store_short v[0:1], v2
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT:    flat_store_byte v[0:1], v3
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_load_v3i8:
; GCN-NOHSA-VI:       ; %bb.0: ; %entry
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dword v0, v[0:1]
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v1, 16, v0
; GCN-NOHSA-VI-NEXT:    buffer_store_short v0, off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    buffer_store_byte v1, off, s[0:3], 0 offset:2
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_load_v3i8:
; EG:       ; %bb.0: ; %entry
; EG-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 27, @11, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT MSKOR T6.XW, T8.X
; EG-NEXT:    MEM_RAT MSKOR T7.XW, T0.X
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 11:
; EG-NEXT:     MOV * T2.X, T0.X,
; EG-NEXT:     MOV T0.Y, PV.X,
; EG-NEXT:     ADD_INT * T0.W, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     AND_INT T1.W, PV.W, literal.x,
; EG-NEXT:     MOV * T2.W, literal.y,
; EG-NEXT:    3(4.203895e-45), 8(1.121039e-44)
; EG-NEXT:     BFE_UINT T2.W, T0.Y, literal.x, PS,
; EG-NEXT:     LSHL * T1.W, PV.W, literal.y,
; EG-NEXT:    16(2.242078e-44), 3(4.203895e-45)
; EG-NEXT:     LSHL T6.X, PV.W, PS,
; EG-NEXT:     LSHL * T6.W, literal.x, PS,
; EG-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; EG-NEXT:     MOV T6.Y, 0.0,
; EG-NEXT:     AND_INT T1.W, KC0[2].Y, literal.x,
; EG-NEXT:     AND_INT * T2.W, T0.X, literal.y,
; EG-NEXT:    3(4.203895e-45), 65535(9.183409e-41)
; EG-NEXT:     LSHL * T1.W, PV.W, literal.x,
; EG-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; EG-NEXT:     LSHL T7.X, T2.W, PV.W,
; EG-NEXT:     LSHL * T7.W, literal.x, PV.W,
; EG-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; EG-NEXT:     MOV T7.Y, 0.0,
; EG-NEXT:     MOV T6.Z, 0.0,
; EG-NEXT:     MOV * T7.Z, 0.0,
; EG-NEXT:     LSHR T0.X, KC0[2].Y, literal.x,
; EG-NEXT:     LSHR * T8.X, T0.W, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
;
; CM-LABEL: global_load_v3i8:
; CM:       ; %bb.0: ; %entry
; CM-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 28, @11, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT MSKOR T6.XW, T8.X
; CM-NEXT:    MEM_RAT MSKOR T7.XW, T0.X
; CM-NEXT:    CF_END
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 11:
; CM-NEXT:     MOV * T2.X, T0.X,
; CM-NEXT:     MOV T0.Y, PV.X,
; CM-NEXT:     ADD_INT * T0.W, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.W, literal.x,
; CM-NEXT:     MOV * T1.W, literal.y,
; CM-NEXT:    3(4.203895e-45), 8(1.121039e-44)
; CM-NEXT:     BFE_UINT T1.Z, T0.Y, literal.x, PV.W,
; CM-NEXT:     LSHL * T1.W, PV.Z, literal.y,
; CM-NEXT:    16(2.242078e-44), 3(4.203895e-45)
; CM-NEXT:     LSHL T6.X, PV.Z, PV.W,
; CM-NEXT:     LSHL * T6.W, literal.x, PV.W,
; CM-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; CM-NEXT:     MOV T6.Y, 0.0,
; CM-NEXT:     AND_INT * T1.W, KC0[2].Y, literal.x,
; CM-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, T0.X, literal.x,
; CM-NEXT:     LSHL * T1.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 3(4.203895e-45)
; CM-NEXT:     LSHL T7.X, PV.Z, PV.W,
; CM-NEXT:     LSHL * T7.W, literal.x, PV.W,
; CM-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; CM-NEXT:     MOV T7.Y, 0.0,
; CM-NEXT:     MOV * T6.Z, 0.0,
; CM-NEXT:     MOV * T7.Z, 0.0,
; CM-NEXT:     LSHR * T0.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; CM-NEXT:     LSHR * T8.X, T0.W, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
entry:
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <3 x i8>, ptr addrspace(1) %in, i32 %tid
  %ld = load <3 x i8>, ptr addrspace(1) %in.tid
  store <3 x i8> %ld, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_load_v4i8(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_load_v4i8:
; GCN-NOHSA-SI:       ; %bb.0: ; %entry
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[2:3]
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dword v0, v[0:1], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    buffer_store_dword v0, off, s[4:7], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_load_v4i8:
; GCN-HSA:       ; %bb.0: ; %entry
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dword v2, v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    flat_store_dword v[0:1], v2
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_load_v4i8:
; GCN-NOHSA-VI:       ; %bb.0: ; %entry
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dword v0, v[0:1]
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    buffer_store_dword v0, off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_load_v4i8:
; EG:       ; %bb.0: ; %entry
; EG-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 1, @11, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 11:
; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
;
; CM-LABEL: global_load_v4i8:
; CM:       ; %bb.0: ; %entry
; CM-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 1, @11, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0.X, T1.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 11:
; CM-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
entry:
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <4 x i8>, ptr addrspace(1) %in, i32 %tid
  %ld = load <4 x i8>, ptr addrspace(1) %in.tid
  store <4 x i8> %ld, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_load_v8i8(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_load_v8i8:
; GCN-NOHSA-SI:       ; %bb.0: ; %entry
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[2:3]
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx2 v[0:1], v[0:1], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_load_v8i8:
; GCN-HSA:       ; %bb.0: ; %entry
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dwordx2 v[0:1], v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v3, s1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    flat_store_dwordx2 v[2:3], v[0:1]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_load_v8i8:
; GCN-NOHSA-VI:       ; %bb.0: ; %entry
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx2 v[0:1], v[0:1]
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_load_v8i8:
; EG:       ; %bb.0: ; %entry
; EG-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 1, @11, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_64 T0.XY, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 11:
; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
;
; CM-LABEL: global_load_v8i8:
; CM:       ; %bb.0: ; %entry
; CM-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 1, @11, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0, T1.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_64 T0.XY, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x,
; CM-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 11:
; CM-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
entry:
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <8 x i8>, ptr addrspace(1) %in, i32 %tid
  %ld = load <8 x i8>, ptr addrspace(1) %in.tid
  store <8 x i8> %ld, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_load_v16i8(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_load_v16i8:
; GCN-NOHSA-SI:       ; %bb.0: ; %entry
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[2:3]
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx4 v[0:3], v[0:1], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_load_v16i8:
; GCN-HSA:       ; %bb.0: ; %entry
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v4, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v5, s1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_load_v16i8:
; GCN-NOHSA-VI:       ; %bb.0: ; %entry
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_load_v16i8:
; EG:       ; %bb.0: ; %entry
; EG-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 1, @11, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T1.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    4(5.605194e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 11:
; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
;
; CM-LABEL: global_load_v16i8:
; CM:       ; %bb.0: ; %entry
; CM-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 1, @11, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0, T1.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x,
; CM-NEXT:    4(5.605194e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 11:
; CM-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
entry:
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <16 x i8>, ptr addrspace(1) %in, i32 %tid
  %ld = load <16 x i8>, ptr addrspace(1) %in.tid
  store <16 x i8> %ld, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_zextload_i8_to_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_zextload_i8_to_i32:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-SI-NEXT:    buffer_load_ubyte v0, off, s[8:11], 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    buffer_store_dword v0, off, s[4:7], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_zextload_i8_to_i32:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    flat_load_ubyte v2, v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    flat_store_dword v[0:1], v2
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_zextload_i8_to_i32:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-VI-NEXT:    buffer_load_ubyte v0, off, s[8:11], 0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    buffer_store_dword v0, off, s[4:7], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_zextload_i8_to_i32:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 1, @9, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_8 T0.X, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     MOV * T0.X, KC0[2].Z,
; EG-NEXT:    ALU clause starting at 9:
; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
;
; CM-LABEL: global_zextload_i8_to_i32:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 1, @9, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0.X, T1.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_8 T0.X, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     MOV * T0.X, KC0[2].Z,
; CM-NEXT:    ALU clause starting at 9:
; CM-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
  %a = load i8, ptr addrspace(1) %in
  %ext = zext i8 %a to i32
  store i32 %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_sextload_i8_to_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_sextload_i8_to_i32:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-SI-NEXT:    buffer_load_sbyte v0, off, s[8:11], 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    buffer_store_dword v0, off, s[4:7], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_sextload_i8_to_i32:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    flat_load_sbyte v2, v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    flat_store_dword v[0:1], v2
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_sextload_i8_to_i32:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-VI-NEXT:    buffer_load_sbyte v0, off, s[8:11], 0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    buffer_store_dword v0, off, s[4:7], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_sextload_i8_to_i32:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 2, @9, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_8 T0.X, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     MOV * T0.X, KC0[2].Z,
; EG-NEXT:    ALU clause starting at 9:
; EG-NEXT:     BFE_INT T0.X, T0.X, 0.0, literal.x,
; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.y,
; EG-NEXT:    8(1.121039e-44), 2(2.802597e-45)
;
; CM-LABEL: global_sextload_i8_to_i32:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 3, @9, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0.X, T1.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_8 T0.X, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     MOV * T0.X, KC0[2].Z,
; CM-NEXT:    ALU clause starting at 9:
; CM-NEXT:     BFE_INT * T0.X, T0.X, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
  %ld = load i8, ptr addrspace(1) %in
  %ext = sext i8 %ld to i32
  store i32 %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_zextload_v1i8_to_v1i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_zextload_v1i8_to_v1i32:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-SI-NEXT:    buffer_load_ubyte v0, off, s[8:11], 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    buffer_store_dword v0, off, s[4:7], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_zextload_v1i8_to_v1i32:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    flat_load_ubyte v2, v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    flat_store_dword v[0:1], v2
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_zextload_v1i8_to_v1i32:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-VI-NEXT:    buffer_load_ubyte v0, off, s[8:11], 0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    buffer_store_dword v0, off, s[4:7], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_zextload_v1i8_to_v1i32:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 1, @9, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_8 T0.X, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     MOV * T0.X, KC0[2].Z,
; EG-NEXT:    ALU clause starting at 9:
; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
;
; CM-LABEL: global_zextload_v1i8_to_v1i32:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 1, @9, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0.X, T1.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_8 T0.X, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     MOV * T0.X, KC0[2].Z,
; CM-NEXT:    ALU clause starting at 9:
; CM-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
  %load = load <1 x i8>, ptr addrspace(1) %in
  %ext = zext <1 x i8> %load to <1 x i32>
  store <1 x i32> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_sextload_v1i8_to_v1i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_sextload_v1i8_to_v1i32:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-SI-NEXT:    buffer_load_sbyte v0, off, s[8:11], 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    buffer_store_dword v0, off, s[4:7], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_sextload_v1i8_to_v1i32:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    flat_load_sbyte v2, v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    flat_store_dword v[0:1], v2
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_sextload_v1i8_to_v1i32:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-VI-NEXT:    buffer_load_sbyte v0, off, s[8:11], 0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    buffer_store_dword v0, off, s[4:7], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_sextload_v1i8_to_v1i32:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 2, @9, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_8 T0.X, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     MOV * T0.X, KC0[2].Z,
; EG-NEXT:    ALU clause starting at 9:
; EG-NEXT:     BFE_INT T0.X, T0.X, 0.0, literal.x,
; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.y,
; EG-NEXT:    8(1.121039e-44), 2(2.802597e-45)
;
; CM-LABEL: global_sextload_v1i8_to_v1i32:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 3, @9, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0.X, T1.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_8 T0.X, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     MOV * T0.X, KC0[2].Z,
; CM-NEXT:    ALU clause starting at 9:
; CM-NEXT:     BFE_INT * T0.X, T0.X, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
  %load = load <1 x i8>, ptr addrspace(1) %in
  %ext = sext <1 x i8> %load to <1 x i32>
  store <1 x i32> %ext, ptr addrspace(1) %out
  ret void
}

; TODO: EG/CM  should use DST, but for some there are redundant MOVs
define amdgpu_kernel void @global_zextload_v2i8_to_v2i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_zextload_v2i8_to_v2i32:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-SI-NEXT:    buffer_load_ushort v0, off, s[8:11], 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v1, 8, v0
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v0, 0xff, v0
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_zextload_v2i8_to_v2i32:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    flat_load_ushort v2, v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v3, 8, v2
; GCN-HSA-NEXT:    v_and_b32_e32 v2, 0xff, v2
; GCN-HSA-NEXT:    flat_store_dwordx2 v[0:1], v[2:3]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_zextload_v2i8_to_v2i32:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-VI-NEXT:    buffer_load_ushort v0, off, s[8:11], 0
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, 8
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_sdwa v1, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v0, 0xff, v0
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_zextload_v2i8_to_v2i32:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 1, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 12, @10, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T4.XY, T5.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_16 T4.X, T4.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     MOV * T0.Y, T2.X,
; EG-NEXT:     MOV * T4.X, KC0[2].Z,
; EG-NEXT:    ALU clause starting at 10:
; EG-NEXT:     AND_INT T0.W, T4.X, literal.x,
; EG-NEXT:     AND_INT * T1.W, T0.Y, literal.y,
; EG-NEXT:    65535(9.183409e-41), -65536(nan)
; EG-NEXT:     OR_INT * T0.W, PS, PV.W,
; EG-NEXT:     MOV * T2.X, PV.W,
; EG-NEXT:     MOV T0.Y, PV.X,
; EG-NEXT:     MOV * T1.W, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT * T4.Y, PV.Y, literal.x, PV.W,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T4.X, T0.W, literal.x,
; EG-NEXT:     LSHR * T5.X, KC0[2].Y, literal.y,
; EG-NEXT:    255(3.573311e-43), 2(2.802597e-45)
;
; CM-LABEL: global_zextload_v2i8_to_v2i32:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 1, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 13, @10, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T4, T5.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_16 T4.X, T4.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     MOV * T0.Y, T2.X,
; CM-NEXT:     MOV * T4.X, KC0[2].Z,
; CM-NEXT:    ALU clause starting at 10:
; CM-NEXT:     AND_INT T0.Z, T4.X, literal.x,
; CM-NEXT:     AND_INT * T0.W, T0.Y, literal.y,
; CM-NEXT:    65535(9.183409e-41), -65536(nan)
; CM-NEXT:     OR_INT * T0.W, PV.W, PV.Z,
; CM-NEXT:     MOV * T2.X, PV.W,
; CM-NEXT:     MOV T0.Y, PV.X,
; CM-NEXT:     MOV * T1.W, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT * T4.Y, PV.Y, literal.x, PV.W,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT * T4.X, T0.W, literal.x,
; CM-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; CM-NEXT:     LSHR * T5.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
  %load = load <2 x i8>, ptr addrspace(1) %in
  %ext = zext <2 x i8> %load to <2 x i32>
  store <2 x i32> %ext, ptr addrspace(1) %out
  ret void
}

; TODO: EG/CM should use DST, but for some there are redundant MOVs
define amdgpu_kernel void @global_sextload_v2i8_to_v2i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_sextload_v2i8_to_v2i32:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-SI-NEXT:    buffer_load_ushort v0, off, s[8:11], 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v1, v0, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v0, v0, 0, 8
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_sextload_v2i8_to_v2i32:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    flat_load_ushort v2, v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_bfe_i32 v3, v2, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v2, v2, 0, 8
; GCN-HSA-NEXT:    flat_store_dwordx2 v[0:1], v[2:3]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_sextload_v2i8_to_v2i32:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-VI-NEXT:    buffer_load_ushort v0, off, s[8:11], 0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v1, v0, 8, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v0, v0, 0, 8
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_sextload_v2i8_to_v2i32:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 1, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 11, @10, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T4.XY, T5.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_16 T4.X, T4.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     MOV * T0.Y, T2.X,
; EG-NEXT:     MOV * T4.X, KC0[2].Z,
; EG-NEXT:    ALU clause starting at 10:
; EG-NEXT:     AND_INT T0.W, T4.X, literal.x,
; EG-NEXT:     AND_INT * T1.W, T0.Y, literal.y,
; EG-NEXT:    65535(9.183409e-41), -65536(nan)
; EG-NEXT:     OR_INT * T0.W, PS, PV.W,
; EG-NEXT:     MOV * T2.X, PV.W,
; EG-NEXT:     MOV * T0.Y, PV.X,
; EG-NEXT:     BFE_INT T4.X, T0.W, 0.0, literal.x,
; EG-NEXT:     LSHR T0.W, PV.Y, literal.x,
; EG-NEXT:     LSHR * T5.X, KC0[2].Y, literal.y,
; EG-NEXT:    8(1.121039e-44), 2(2.802597e-45)
; EG-NEXT:     BFE_INT * T4.Y, PV.W, 0.0, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
;
; CM-LABEL: global_sextload_v2i8_to_v2i32:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 1, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 11, @10, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T4, T5.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_16 T4.X, T4.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     MOV * T0.Y, T2.X,
; CM-NEXT:     MOV * T4.X, KC0[2].Z,
; CM-NEXT:    ALU clause starting at 10:
; CM-NEXT:     AND_INT T0.Z, T4.X, literal.x,
; CM-NEXT:     AND_INT * T0.W, T0.Y, literal.y,
; CM-NEXT:    65535(9.183409e-41), -65536(nan)
; CM-NEXT:     OR_INT * T0.W, PV.W, PV.Z,
; CM-NEXT:     MOV * T2.X, PV.W,
; CM-NEXT:     MOV * T0.Y, PV.X,
; CM-NEXT:     BFE_INT T4.X, T0.W, 0.0, literal.x,
; CM-NEXT:     LSHR * T0.W, PV.Y, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     LSHR T5.X, KC0[2].Y, literal.x,
; CM-NEXT:     BFE_INT * T4.Y, PV.W, 0.0, literal.y,
; CM-NEXT:    2(2.802597e-45), 8(1.121039e-44)
  %load = load <2 x i8>, ptr addrspace(1) %in
  %ext = sext <2 x i8> %load to <2 x i32>
  store <2 x i32> %ext, ptr addrspace(1) %out
  ret void
}

; TODO: EG/CM should use DST, but for some there are redundant MOVs
define amdgpu_kernel void @global_zextload_v3i8_to_v3i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_zextload_v3i8_to_v3i32:
; GCN-NOHSA-SI:       ; %bb.0: ; %entry
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s3
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[6:7]
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dword v2, v[0:1], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v1, v2, 8, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v0, 0xff, v2
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v2, v2, 16, 8
; GCN-NOHSA-SI-NEXT:    buffer_store_dword v2, off, s[0:3], 0 offset:8
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_zextload_v3i8_to_v3i32:
; GCN-HSA:       ; %bb.0: ; %entry
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dword v2, v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v3, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v4, s1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_bfe_u32 v1, v2, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v0, 0xff, v2
; GCN-HSA-NEXT:    v_bfe_u32 v2, v2, 16, 8
; GCN-HSA-NEXT:    flat_store_dwordx3 v[3:4], v[0:2]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_zextload_v3i8_to_v3i32:
; GCN-NOHSA-VI:       ; %bb.0: ; %entry
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dword v1, v[0:1]
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v0, 0xff, v1
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v2, v1, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v1, v1, 8, 8
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx3 v[0:2], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_zextload_v3i8_to_v3i32:
; EG:       ; %bb.0: ; %entry
; EG-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 10, @11, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.X, T7.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T5.XY, T6.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 11:
; EG-NEXT:     MOV * T0.W, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT * T5.Y, T0.X, literal.x, PV.W,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT * T5.X, T0.X, literal.x,
; EG-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T0.X, T0.X, literal.x, T0.W,
; EG-NEXT:     LSHR * T6.X, KC0[2].Y, literal.y,
; EG-NEXT:    16(2.242078e-44), 2(2.802597e-45)
; EG-NEXT:     ADD_INT * T7.X, PS, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
;
; CM-LABEL: global_zextload_v3i8_to_v3i32:
; CM:       ; %bb.0: ; %entry
; CM-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 10, @11, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0, T6.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T5.X, T7.X
; CM-NEXT:    CF_END
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 11:
; CM-NEXT:     MOV * T0.W, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT * T5.X, T0.X, literal.x, PV.W,
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     LSHR * T6.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT T7.X, PV.X, literal.x,
; CM-NEXT:     BFE_UINT * T0.Y, T0.X, literal.y, T0.W,
; CM-NEXT:    2(2.802597e-45), 8(1.121039e-44)
; CM-NEXT:     AND_INT * T0.X, T0.X, literal.x,
; CM-NEXT:    255(3.573311e-43), 0(0.000000e+00)
entry:
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <3 x i8>, ptr addrspace(1) %in, i32 %tid
  %ld = load <3 x i8>, ptr addrspace(1) %in.tid
  %ext = zext <3 x i8> %ld to <3 x i32>
  store <3 x i32> %ext, ptr addrspace(1) %out
  ret void
}

; TODO: EG/CM should use DST, but for some there are redundant MOVs
define amdgpu_kernel void @global_sextload_v3i8_to_v3i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_sextload_v3i8_to_v3i32:
; GCN-NOHSA-SI:       ; %bb.0: ; %entry
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s3
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[6:7]
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dword v2, v[0:1], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v1, v2, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v0, v2, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v2, v2, 16, 8
; GCN-NOHSA-SI-NEXT:    buffer_store_dword v2, off, s[0:3], 0 offset:8
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_sextload_v3i8_to_v3i32:
; GCN-HSA:       ; %bb.0: ; %entry
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dword v0, v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v3, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v4, s1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_bfe_i32 v2, v0, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v1, v0, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v0, v0, 0, 8
; GCN-HSA-NEXT:    flat_store_dwordx3 v[3:4], v[0:2]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_sextload_v3i8_to_v3i32:
; GCN-NOHSA-VI:       ; %bb.0: ; %entry
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dword v0, v[0:1]
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v2, v0, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v1, v0, 8, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v0, v0, 0, 8
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx3 v[0:2], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_sextload_v3i8_to_v3i32:
; EG:       ; %bb.0: ; %entry
; EG-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 11, @11, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T5.X, T0.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T6.XY, T7.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 11:
; EG-NEXT:     LSHR * T0.W, T0.X, literal.x,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT * T5.X, PV.W, 0.0, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T6.X, T0.X, 0.0, literal.x,
; EG-NEXT:     LSHR * T7.X, KC0[2].Y, literal.y,
; EG-NEXT:    8(1.121039e-44), 2(2.802597e-45)
; EG-NEXT:     LSHR * T0.W, T0.X, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T0.X, T7.X, literal.x,
; EG-NEXT:     BFE_INT * T6.Y, PV.W, 0.0, literal.y,
; EG-NEXT:    2(2.802597e-45), 8(1.121039e-44)
;
; CM-LABEL: global_sextload_v3i8_to_v3i32:
; CM:       ; %bb.0: ; %entry
; CM-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 11, @11, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T6, T7.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T5.X, T0.X
; CM-NEXT:    CF_END
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 11:
; CM-NEXT:     LSHR * T0.W, T0.X, literal.x,
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T5.X, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T6.X, T0.X, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     LSHR T7.X, KC0[2].Y, literal.x,
; CM-NEXT:     LSHR * T0.W, T0.X, literal.y,
; CM-NEXT:    2(2.802597e-45), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T0.X, PV.X, literal.x,
; CM-NEXT:     BFE_INT * T6.Y, PV.W, 0.0, literal.y,
; CM-NEXT:    2(2.802597e-45), 8(1.121039e-44)
entry:
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <3 x i8>, ptr addrspace(1) %in, i32 %tid
  %ld = load <3 x i8>, ptr addrspace(1) %in.tid
  %ext = sext <3 x i8> %ld to <3 x i32>
  store <3 x i32> %ext, ptr addrspace(1) %out
  ret void
}

; TODO: EG/CM should use DST, but for some there are redundant MOVs
define amdgpu_kernel void @global_zextload_v4i8_to_v4i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_zextload_v4i8_to_v4i32:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s3
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[6:7]
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dword v2, v[0:1], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v3, 24, v2
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v1, v2, 8, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v0, 0xff, v2
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v2, v2, 16, 8
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_zextload_v4i8_to_v4i32:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dword v2, v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v4, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v5, s1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v3, 24, v2
; GCN-HSA-NEXT:    v_bfe_u32 v1, v2, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v0, 0xff, v2
; GCN-HSA-NEXT:    v_bfe_u32 v2, v2, 16, 8
; GCN-HSA-NEXT:    flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_zextload_v4i8_to_v4i32:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dword v1, v[0:1]
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v3, 24, v1
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v0, 0xff, v1
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v2, v1, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v1, v1, 8, 8
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_zextload_v4i8_to_v4i32:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 9, @11, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T5.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 11:
; EG-NEXT:     MOV * T0.W, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT * T0.Z, T0.X, literal.x, PV.W,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T0.Y, T0.X, literal.x, T0.W,
; EG-NEXT:     LSHR * T0.W, T0.X, literal.y,
; EG-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; EG-NEXT:     AND_INT T0.X, T0.X, literal.x,
; EG-NEXT:     LSHR * T5.X, KC0[2].Y, literal.y,
; EG-NEXT:    255(3.573311e-43), 2(2.802597e-45)
;
; CM-LABEL: global_zextload_v4i8_to_v4i32:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 10, @11, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0, T5.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 11:
; CM-NEXT:     MOV * T0.W, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT * T0.Z, T0.X, literal.x, PV.W,
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT T0.Y, T0.X, literal.x, T0.W,
; CM-NEXT:     LSHR * T0.W, T0.X, literal.y,
; CM-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; CM-NEXT:     AND_INT * T0.X, T0.X, literal.x,
; CM-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; CM-NEXT:     LSHR * T5.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <4 x i8>, ptr addrspace(1) %in, i32 %tid
  %load = load <4 x i8>, ptr addrspace(1) %in.tid
  %ext = zext <4 x i8> %load to <4 x i32>
  store <4 x i32> %ext, ptr addrspace(1) %out
  ret void
}

; TODO: EG/CM should use DST, but for some there are redundant MOVs
define amdgpu_kernel void @global_sextload_v4i8_to_v4i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_sextload_v4i8_to_v4i32:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s3
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[6:7]
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dword v0, v[0:1], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v3, 24, v0
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v2, v0, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v1, v0, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v0, v0, 0, 8
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_sextload_v4i8_to_v4i32:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dword v0, v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v4, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v5, s1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v3, 24, v0
; GCN-HSA-NEXT:    v_bfe_i32 v2, v0, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v1, v0, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v0, v0, 0, 8
; GCN-HSA-NEXT:    flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_sextload_v4i8_to_v4i32:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dword v0, v[0:1]
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v3, 24, v0
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v2, v0, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v1, v0, 8, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v0, v0, 0, 8
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_sextload_v4i8_to_v4i32:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 11, @11, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T5.XYZW, T0.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 11:
; EG-NEXT:     BFE_INT T5.X, T0.X, 0.0, literal.x,
; EG-NEXT:     LSHR * T0.W, T0.X, literal.y,
; EG-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; EG-NEXT:     BFE_INT T5.W, PV.W, 0.0, literal.x,
; EG-NEXT:     LSHR * T0.W, T0.X, literal.y,
; EG-NEXT:    8(1.121039e-44), 16(2.242078e-44)
; EG-NEXT:     BFE_INT T5.Z, PS, 0.0, literal.x,
; EG-NEXT:     LSHR * T0.W, T0.X, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     LSHR T0.X, KC0[2].Y, literal.x,
; EG-NEXT:     BFE_INT * T5.Y, PV.W, 0.0, literal.y,
; EG-NEXT:    2(2.802597e-45), 8(1.121039e-44)
;
; CM-LABEL: global_sextload_v4i8_to_v4i32:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 11, @11, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T5, T0.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 11:
; CM-NEXT:     BFE_INT T5.X, T0.X, 0.0, literal.x,
; CM-NEXT:     LSHR * T0.W, T0.X, literal.y,
; CM-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; CM-NEXT:     LSHR T0.Z, T0.X, literal.x,
; CM-NEXT:     BFE_INT * T5.W, PV.W, 0.0, literal.y,
; CM-NEXT:    16(2.242078e-44), 8(1.121039e-44)
; CM-NEXT:     BFE_INT T5.Z, PV.Z, 0.0, literal.x,
; CM-NEXT:     LSHR * T0.W, T0.X, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     LSHR T0.X, KC0[2].Y, literal.x,
; CM-NEXT:     BFE_INT * T5.Y, PV.W, 0.0, literal.y,
; CM-NEXT:    2(2.802597e-45), 8(1.121039e-44)
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <4 x i8>, ptr addrspace(1) %in, i32 %tid
  %load = load <4 x i8>, ptr addrspace(1) %in.tid
  %ext = sext <4 x i8> %load to <4 x i32>
  store <4 x i32> %ext, ptr addrspace(1) %out
  ret void
}

; TODO: EG/CM should use DST, but for some there are redundant MOVs
define amdgpu_kernel void @global_zextload_v8i8_to_v8i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_zextload_v8i8_to_v8i32:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s3
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[6:7]
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx2 v[8:9], v[0:1], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v7, 24, v9
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v5, v9, 8, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v4, 0xff, v9
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v6, v9, 16, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v3, 24, v8
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v1, v8, 8, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v0, 0xff, v8
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v2, v8, 16, 8
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_zextload_v8i8_to_v8i32:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dwordx2 v[8:9], v[0:1]
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 16
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v13, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v12, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v11, s1
; GCN-HSA-NEXT:    v_mov_b32_e32 v10, s0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v7, 24, v9
; GCN-HSA-NEXT:    v_bfe_u32 v5, v9, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v4, 0xff, v9
; GCN-HSA-NEXT:    v_bfe_u32 v6, v9, 16, 8
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v3, 24, v8
; GCN-HSA-NEXT:    v_bfe_u32 v1, v8, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v0, 0xff, v8
; GCN-HSA-NEXT:    v_bfe_u32 v2, v8, 16, 8
; GCN-HSA-NEXT:    flat_store_dwordx4 v[12:13], v[4:7]
; GCN-HSA-NEXT:    flat_store_dwordx4 v[10:11], v[0:3]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_zextload_v8i8_to_v8i32:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx2 v[6:7], v[0:1]
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v3, 24, v7
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v0, 0xff, v7
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v1, 8, v7
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v2, v7, 16, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v7, 24, v6
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v5, 8, v6
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v4, 0xff, v6
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v6, v6, 16, 8
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_zextload_v8i8_to_v8i32:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 17, @11, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T7.XYZW, T8.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T6.XYZW, T0.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_64 T0.XY, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 11:
; EG-NEXT:     MOV * T0.W, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT * T6.Z, T0.X, literal.x, PV.W,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T6.Y, T0.X, literal.x, T0.W,
; EG-NEXT:     BFE_UINT * T7.Z, T0.Y, literal.y, T0.W,
; EG-NEXT:    8(1.121039e-44), 16(2.242078e-44)
; EG-NEXT:     BFE_UINT T7.Y, T0.Y, literal.x, T0.W,
; EG-NEXT:     LSHR * T6.W, T0.X, literal.y,
; EG-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; EG-NEXT:     AND_INT T6.X, T0.X, literal.x,
; EG-NEXT:     LSHR T7.W, T0.Y, literal.y,
; EG-NEXT:     AND_INT * T7.X, T0.Y, literal.x,
; EG-NEXT:    255(3.573311e-43), 24(3.363116e-44)
; EG-NEXT:     LSHR * T0.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T8.X, PV.X, literal.x,
; EG-NEXT:    4(5.605194e-45), 0(0.000000e+00)
;
; CM-LABEL: global_zextload_v8i8_to_v8i32:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 17, @11, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0, T7.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T6, T8.X
; CM-NEXT:    CF_END
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_64 T0.XY, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x,
; CM-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 11:
; CM-NEXT:     MOV * T0.W, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT * T6.Z, T0.Y, literal.x, PV.W,
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT T6.Y, T0.Y, literal.x, T0.W,
; CM-NEXT:     LSHR * T6.W, T0.Y, literal.y,
; CM-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; CM-NEXT:     AND_INT T6.X, T0.Y, literal.x,
; CM-NEXT:     BFE_UINT * T0.Z, T0.X, literal.y, T0.W,
; CM-NEXT:    255(3.573311e-43), 16(2.242078e-44)
; CM-NEXT:     LSHR T7.X, KC0[2].Y, literal.x,
; CM-NEXT:     BFE_UINT * T0.Y, T0.X, literal.y, T0.W,
; CM-NEXT:    2(2.802597e-45), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T8.X, PV.X, literal.x,
; CM-NEXT:     LSHR * T0.W, T0.X, literal.y,
; CM-NEXT:    4(5.605194e-45), 24(3.363116e-44)
; CM-NEXT:     AND_INT * T0.X, T0.X, literal.x,
; CM-NEXT:    255(3.573311e-43), 0(0.000000e+00)
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <8 x i8>, ptr addrspace(1) %in, i32 %tid
  %load = load <8 x i8>, ptr addrspace(1) %in.tid
  %ext = zext <8 x i8> %load to <8 x i32>
  store <8 x i32> %ext, ptr addrspace(1) %out
  ret void
}

; TODO: EG/CM should use DST, but for some there are redundant MOVs
define amdgpu_kernel void @global_sextload_v8i8_to_v8i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_sextload_v8i8_to_v8i32:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s3
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[6:7]
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx2 v[7:8], v[0:1], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v3, 24, v7
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v2, v7, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v1, v7, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v0, v7, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v7, 24, v8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v6, v8, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v5, v8, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v4, v8, 0, 8
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_sextload_v8i8_to_v8i32:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dwordx2 v[7:8], v[0:1]
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 16
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v12, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v11, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v10, s1
; GCN-HSA-NEXT:    v_mov_b32_e32 v9, s0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v3, 24, v7
; GCN-HSA-NEXT:    v_bfe_i32 v2, v7, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v1, v7, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v0, v7, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v7, 24, v8
; GCN-HSA-NEXT:    v_bfe_i32 v6, v8, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v5, v8, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v4, v8, 0, 8
; GCN-HSA-NEXT:    flat_store_dwordx4 v[11:12], v[4:7]
; GCN-HSA-NEXT:    flat_store_dwordx4 v[9:10], v[0:3]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_sextload_v8i8_to_v8i32:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx2 v[4:5], v[0:1]
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v8, 8, v4
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v1, 8, v5
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v3, 24, v5
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v2, v5, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v0, v5, 0, 8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v7, 24, v4
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v6, v4, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v4, v4, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v5, v8, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v1, v1, 0, 8
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_sextload_v8i8_to_v8i32:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 21, @11, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T7.XYZW, T8.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T6.XYZW, T0.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_64 T0.XY, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 11:
; EG-NEXT:     BFE_INT T6.X, T0.X, 0.0, literal.x,
; EG-NEXT:     LSHR * T0.W, T0.X, literal.y,
; EG-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; EG-NEXT:     BFE_INT T7.X, T0.Y, 0.0, literal.x,
; EG-NEXT:     LSHR T0.Z, T0.Y, literal.y,
; EG-NEXT:     BFE_INT T6.W, PV.W, 0.0, literal.x,
; EG-NEXT:     LSHR * T0.W, T0.X, literal.z,
; EG-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     LSHR T1.Y, T0.Y, literal.x,
; EG-NEXT:     BFE_INT T6.Z, PS, 0.0, literal.y,
; EG-NEXT:     BFE_INT T7.W, PV.Z, 0.0, literal.y,
; EG-NEXT:     LSHR * T0.W, T0.X, literal.y,
; EG-NEXT:    16(2.242078e-44), 8(1.121039e-44)
; EG-NEXT:     LSHR T0.X, KC0[2].Y, literal.x,
; EG-NEXT:     BFE_INT T6.Y, PS, 0.0, literal.y,
; EG-NEXT:     BFE_INT T7.Z, PV.Y, 0.0, literal.y,
; EG-NEXT:     LSHR * T0.W, T0.Y, literal.y,
; EG-NEXT:    2(2.802597e-45), 8(1.121039e-44)
; EG-NEXT:     ADD_INT T8.X, PV.X, literal.x,
; EG-NEXT:     BFE_INT * T7.Y, PV.W, 0.0, literal.y,
; EG-NEXT:    4(5.605194e-45), 8(1.121039e-44)
;
; CM-LABEL: global_sextload_v8i8_to_v8i32:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 21, @11, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T7, T9.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T6, T0.X
; CM-NEXT:    CF_END
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_64 T0.XY, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x,
; CM-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 11:
; CM-NEXT:     BFE_INT T6.X, T0.Y, 0.0, literal.x,
; CM-NEXT:     LSHR * T0.W, T0.Y, literal.y,
; CM-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; CM-NEXT:     BFE_INT T7.X, T0.X, 0.0, literal.x,
; CM-NEXT:     LSHR T1.Y, T0.X, literal.y,
; CM-NEXT:     LSHR T0.Z, T0.Y, literal.z,
; CM-NEXT:     BFE_INT * T6.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     LSHR T8.X, T0.X, literal.x,
; CM-NEXT:     LSHR T0.Y, T0.Y, literal.y,
; CM-NEXT:     BFE_INT T6.Z, PV.Z, 0.0, literal.y,
; CM-NEXT:     BFE_INT * T7.W, PV.Y, 0.0, literal.y,
; CM-NEXT:    16(2.242078e-44), 8(1.121039e-44)
; CM-NEXT:     LSHR T9.X, KC0[2].Y, literal.x,
; CM-NEXT:     BFE_INT T6.Y, PV.Y, 0.0, literal.y,
; CM-NEXT:     BFE_INT T7.Z, PV.X, 0.0, literal.y,
; CM-NEXT:     LSHR * T0.W, T0.X, literal.y,
; CM-NEXT:    2(2.802597e-45), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T0.X, PV.X, literal.x,
; CM-NEXT:     BFE_INT * T7.Y, PV.W, 0.0, literal.y,
; CM-NEXT:    4(5.605194e-45), 8(1.121039e-44)
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <8 x i8>, ptr addrspace(1) %in, i32 %tid
  %load = load <8 x i8>, ptr addrspace(1) %in.tid
  %ext = sext <8 x i8> %load to <8 x i32>
  store <8 x i32> %ext, ptr addrspace(1) %out
  ret void
}

; TODO: EG/CM should use DST, but for some there are redundant MOVs
define amdgpu_kernel void @global_zextload_v16i8_to_v16i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_zextload_v16i8_to_v16i32:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s3
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[6:7]
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx4 v[0:3], v[0:1], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v19, 24, v3
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v17, v3, 8, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v16, 0xff, v3
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v18, v3, 16, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v7, 24, v0
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v5, v0, 8, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v11, 24, v1
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v9, v1, 8, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v15, 24, v2
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v13, v2, 8, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v4, 0xff, v0
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v6, v0, 16, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v8, 0xff, v1
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v10, v1, 16, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v12, 0xff, v2
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v14, v2, 16, 8
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:48
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:32
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:16
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_zextload_v16i8_to_v16i32:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 48
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v12, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v11, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 32
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, s1
; GCN-HSA-NEXT:    v_mov_b32_e32 v15, s0
; GCN-HSA-NEXT:    s_add_u32 s0, s0, 16
; GCN-HSA-NEXT:    v_mov_b32_e32 v18, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v17, s2
; GCN-HSA-NEXT:    s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v10, 24, v3
; GCN-HSA-NEXT:    v_bfe_u32 v8, v3, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v7, 0xff, v3
; GCN-HSA-NEXT:    v_bfe_u32 v9, v3, 16, 8
; GCN-HSA-NEXT:    flat_store_dwordx4 v[11:12], v[7:10]
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v14, 24, v2
; GCN-HSA-NEXT:    v_bfe_u32 v12, v2, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v11, 0xff, v2
; GCN-HSA-NEXT:    v_bfe_u32 v13, v2, 16, 8
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v6, 24, v0
; GCN-HSA-NEXT:    v_bfe_u32 v4, v0, 8, 8
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v10, 24, v1
; GCN-HSA-NEXT:    v_bfe_u32 v8, v1, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v3, 0xff, v0
; GCN-HSA-NEXT:    v_bfe_u32 v5, v0, 16, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v7, 0xff, v1
; GCN-HSA-NEXT:    v_bfe_u32 v9, v1, 16, 8
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT:    flat_store_dwordx4 v[17:18], v[11:14]
; GCN-HSA-NEXT:    flat_store_dwordx4 v[0:1], v[7:10]
; GCN-HSA-NEXT:    flat_store_dwordx4 v[15:16], v[3:6]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_zextload_v16i8_to_v16i32:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v19, 24, v3
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v16, 0xff, v3
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v17, 8, v3
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v18, v3, 16, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v7, 24, v0
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v4, 0xff, v0
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v5, 8, v0
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v6, v0, 16, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v11, 24, v1
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v8, 0xff, v1
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v9, 8, v1
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v10, v1, 16, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v15, 24, v2
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v12, 0xff, v2
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v13, 8, v2
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v14, v2, 16, 8
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:48
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:32
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:16
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_zextload_v16i8_to_v16i32:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @10, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @8
; EG-NEXT:    ALU 33, @13, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T12.XYZW, T14.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T10.XYZW, T13.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T9.XYZW, T11.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T8.XYZW, T0.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 8:
; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 10:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    4(5.605194e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 13:
; EG-NEXT:     MOV * T1.W, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT * T8.Z, T0.X, literal.x, PV.W,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T8.Y, T0.X, literal.x, T1.W,
; EG-NEXT:     BFE_UINT * T9.Z, T0.Y, literal.y, T1.W,
; EG-NEXT:    8(1.121039e-44), 16(2.242078e-44)
; EG-NEXT:     BFE_UINT T9.Y, T0.Y, literal.x, T1.W,
; EG-NEXT:     LSHR * T8.W, T0.X, literal.y,
; EG-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; EG-NEXT:     AND_INT T8.X, T0.X, literal.x,
; EG-NEXT:     LSHR T9.W, T0.Y, literal.y,
; EG-NEXT:     AND_INT * T9.X, T0.Y, literal.x,
; EG-NEXT:    255(3.573311e-43), 24(3.363116e-44)
; EG-NEXT:     BFE_UINT * T10.Z, T0.Z, literal.x, T1.W,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     LSHR T0.X, KC0[2].Y, literal.x,
; EG-NEXT:     BFE_UINT * T10.Y, T0.Z, literal.y, T1.W,
; EG-NEXT:    2(2.802597e-45), 8(1.121039e-44)
; EG-NEXT:     ADD_INT T11.X, PV.X, literal.x,
; EG-NEXT:     BFE_UINT T12.Z, T0.W, literal.y, T1.W,
; EG-NEXT:     LSHR T10.W, T0.Z, literal.z,
; EG-NEXT:     AND_INT * T10.X, T0.Z, literal.w,
; EG-NEXT:    4(5.605194e-45), 16(2.242078e-44)
; EG-NEXT:    24(3.363116e-44), 255(3.573311e-43)
; EG-NEXT:     BFE_UINT * T12.Y, T0.W, literal.x, T1.W,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T13.X, T0.X, literal.x,
; EG-NEXT:     LSHR T12.W, T0.W, literal.y,
; EG-NEXT:     AND_INT * T12.X, T0.W, literal.z,
; EG-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; EG-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T14.X, T0.X, literal.x,
; EG-NEXT:    12(1.681558e-44), 0(0.000000e+00)
;
; CM-LABEL: global_zextload_v16i8_to_v16i32:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 2, @10, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @8
; CM-NEXT:    ALU 33, @13, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0, T10.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T12, T14.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T9, T13.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T8, T11.X
; CM-NEXT:    CF_END
; CM-NEXT:    Fetch clause starting at 8:
; CM-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 10:
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x,
; CM-NEXT:    4(5.605194e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 13:
; CM-NEXT:     MOV * T1.W, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT * T8.Z, T0.W, literal.x, PV.W,
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT T8.Y, T0.W, literal.x, T1.W,
; CM-NEXT:     LSHR * T8.W, T0.W, literal.y,
; CM-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; CM-NEXT:     AND_INT T8.X, T0.W, literal.x,
; CM-NEXT:     BFE_UINT * T9.Z, T0.Z, literal.y, T1.W,
; CM-NEXT:    255(3.573311e-43), 16(2.242078e-44)
; CM-NEXT:     LSHR T10.X, KC0[2].Y, literal.x,
; CM-NEXT:     BFE_UINT * T9.Y, T0.Z, literal.y, T1.W,
; CM-NEXT:    2(2.802597e-45), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T11.X, PV.X, literal.x,
; CM-NEXT:     BFE_UINT T12.Z, T0.Y, literal.y, T1.W,
; CM-NEXT:     LSHR * T9.W, T0.Z, literal.z,
; CM-NEXT:    12(1.681558e-44), 16(2.242078e-44)
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T9.X, T0.Z, literal.x,
; CM-NEXT:     BFE_UINT * T12.Y, T0.Y, literal.y, T1.W,
; CM-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T13.X, T10.X, literal.x,
; CM-NEXT:     BFE_UINT T0.Z, T0.X, literal.y, T1.W, BS:VEC_120/SCL_212
; CM-NEXT:     LSHR * T12.W, T0.Y, literal.z,
; CM-NEXT:    8(1.121039e-44), 16(2.242078e-44)
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T12.X, T0.Y, literal.x,
; CM-NEXT:     BFE_UINT * T0.Y, T0.X, literal.y, T1.W,
; CM-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T14.X, T10.X, literal.x,
; CM-NEXT:     LSHR * T0.W, T0.X, literal.y, BS:VEC_120/SCL_212
; CM-NEXT:    4(5.605194e-45), 24(3.363116e-44)
; CM-NEXT:     AND_INT * T0.X, T0.X, literal.x,
; CM-NEXT:    255(3.573311e-43), 0(0.000000e+00)
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <16 x i8>, ptr addrspace(1) %in, i32 %tid
  %load = load <16 x i8>, ptr addrspace(1) %in.tid
  %ext = zext <16 x i8> %load to <16 x i32>
  store <16 x i32> %ext, ptr addrspace(1) %out
  ret void
}

; TODO: EG/CM should use DST, but for some there are redundant MOVs
define amdgpu_kernel void @global_sextload_v16i8_to_v16i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_sextload_v16i8_to_v16i32:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s3
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[6:7]
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx4 v[0:3], v[0:1], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v19, 24, v3
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v18, v3, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v17, v3, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v16, v3, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v7, 24, v0
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v6, v0, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v5, v0, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v4, v0, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v11, 24, v1
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v10, v1, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v9, v1, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v8, v1, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v15, 24, v2
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v14, v2, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v13, v2, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v12, v2, 0, 8
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:48
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:32
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:16
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_sextload_v16i8_to_v16i32:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 48
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v13, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v12, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 32
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v17, s1
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, s0
; GCN-HSA-NEXT:    s_add_u32 s0, s0, 16
; GCN-HSA-NEXT:    v_mov_b32_e32 v19, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v18, s2
; GCN-HSA-NEXT:    s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v11, 24, v3
; GCN-HSA-NEXT:    v_bfe_i32 v10, v3, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v9, v3, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v8, v3, 0, 8
; GCN-HSA-NEXT:    flat_store_dwordx4 v[12:13], v[8:11]
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v15, 24, v2
; GCN-HSA-NEXT:    v_bfe_i32 v14, v2, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v13, v2, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v12, v2, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v7, 24, v0
; GCN-HSA-NEXT:    v_bfe_i32 v6, v0, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v5, v0, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v4, v0, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v11, 24, v1
; GCN-HSA-NEXT:    v_bfe_i32 v10, v1, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v9, v1, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v8, v1, 0, 8
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT:    flat_store_dwordx4 v[18:19], v[12:15]
; GCN-HSA-NEXT:    flat_store_dwordx4 v[0:1], v[8:11]
; GCN-HSA-NEXT:    flat_store_dwordx4 v[16:17], v[4:7]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_sextload_v16i8_to_v16i32:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v19, 24, v3
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v18, v3, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v16, v3, 0, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v3, 8, v3
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v7, 24, v0
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v6, v0, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v4, v0, 0, 8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v11, 24, v1
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v10, v1, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v8, v1, 0, 8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v15, 24, v2
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v14, v2, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v12, v2, 0, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v2, 8, v2
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v1, 8, v1
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v0, 8, v0
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v17, v3, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v5, v0, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v9, v1, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v13, v2, 0, 8
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:48
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:32
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:16
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_sextload_v16i8_to_v16i32:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @10, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @8
; EG-NEXT:    ALU 41, @13, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T8.XYZW, T14.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T11.XYZW, T13.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T10.XYZW, T12.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T9.XYZW, T0.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 8:
; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 10:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    4(5.605194e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 13:
; EG-NEXT:     BFE_INT * T8.X, T0.W, 0.0, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T9.X, T0.X, 0.0, literal.x,
; EG-NEXT:     LSHR T1.Y, T0.W, literal.y,
; EG-NEXT:     LSHR T1.Z, T0.W, literal.z,
; EG-NEXT:     LSHR T1.W, T0.Z, literal.y,
; EG-NEXT:     LSHR * T2.W, T0.X, literal.z,
; EG-NEXT:    8(1.121039e-44), 16(2.242078e-44)
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T10.X, T0.Y, 0.0, literal.x,
; EG-NEXT:     LSHR T2.Y, T0.Z, literal.y,
; EG-NEXT:     LSHR T2.Z, T0.Y, literal.y,
; EG-NEXT:     BFE_INT T9.W, PS, 0.0, literal.x,
; EG-NEXT:     LSHR * T2.W, T0.X, literal.z,
; EG-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T11.X, T0.Z, 0.0, literal.x,
; EG-NEXT:     LSHR T3.Y, T0.Y, literal.y,
; EG-NEXT:     BFE_INT T9.Z, PS, 0.0, literal.x,
; EG-NEXT:     BFE_INT T10.W, PV.Z, 0.0, literal.x,
; EG-NEXT:     LSHR * T2.W, T0.X, literal.x,
; EG-NEXT:    8(1.121039e-44), 16(2.242078e-44)
; EG-NEXT:     LSHR T0.X, KC0[2].Y, literal.x,
; EG-NEXT:     BFE_INT T9.Y, PS, 0.0, literal.y,
; EG-NEXT:     BFE_INT T10.Z, PV.Y, 0.0, literal.y,
; EG-NEXT:     BFE_INT T11.W, T2.Y, 0.0, literal.y,
; EG-NEXT:     LSHR * T2.W, T0.Y, literal.y,
; EG-NEXT:    2(2.802597e-45), 8(1.121039e-44)
; EG-NEXT:     ADD_INT T12.X, PV.X, literal.x,
; EG-NEXT:     BFE_INT T10.Y, PS, 0.0, literal.y,
; EG-NEXT:     BFE_INT T11.Z, T1.W, 0.0, literal.y,
; EG-NEXT:     BFE_INT T8.W, T1.Z, 0.0, literal.y,
; EG-NEXT:     LSHR * T1.W, T0.Z, literal.y,
; EG-NEXT:    4(5.605194e-45), 8(1.121039e-44)
; EG-NEXT:     ADD_INT T13.X, T0.X, literal.x,
; EG-NEXT:     BFE_INT T11.Y, PS, 0.0, literal.x,
; EG-NEXT:     BFE_INT T8.Z, T1.Y, 0.0, literal.x,
; EG-NEXT:     LSHR T0.W, T0.W, literal.x,
; EG-NEXT:     ADD_INT * T14.X, T0.X, literal.y,
; EG-NEXT:    8(1.121039e-44), 12(1.681558e-44)
; EG-NEXT:     BFE_INT * T8.Y, PV.W, 0.0, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
;
; CM-LABEL: global_sextload_v16i8_to_v16i32:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 2, @10, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @8
; CM-NEXT:    ALU 43, @13, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T8, T12.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T11, T0.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T10, T14.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T9, T13.X
; CM-NEXT:    CF_END
; CM-NEXT:    Fetch clause starting at 8:
; CM-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 10:
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x,
; CM-NEXT:    4(5.605194e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 13:
; CM-NEXT:     LSHR T1.Z, T0.X, literal.x,
; CM-NEXT:     LSHR * T1.W, T0.Y, literal.y,
; CM-NEXT:    16(2.242078e-44), 8(1.121039e-44)
; CM-NEXT:     BFE_INT T8.X, T0.X, 0.0, literal.x,
; CM-NEXT:     LSHR T1.Y, T0.X, literal.y,
; CM-NEXT:     LSHR T2.Z, T0.Y, literal.z,
; CM-NEXT:     LSHR * T2.W, T0.Z, literal.x,
; CM-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T9.X, T0.W, 0.0, literal.x,
; CM-NEXT:     LSHR T2.Y, T0.Y, literal.y,
; CM-NEXT:     LSHR T3.Z, T0.Z, literal.z,
; CM-NEXT:     LSHR * T3.W, T0.W, literal.y,
; CM-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T10.X, T0.Z, 0.0, literal.x,
; CM-NEXT:     LSHR T3.Y, T0.Z, literal.y,
; CM-NEXT:     LSHR T0.Z, T0.W, literal.z,
; CM-NEXT:     BFE_INT * T9.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T11.X, T0.Y, 0.0, literal.x,
; CM-NEXT:     LSHR T0.Y, T0.W, literal.x,
; CM-NEXT:     BFE_INT T9.Z, PV.Z, 0.0, literal.x,
; CM-NEXT:     BFE_INT * T10.W, PV.Y, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     LSHR T12.X, KC0[2].Y, literal.x,
; CM-NEXT:     BFE_INT T9.Y, PV.Y, 0.0, literal.y,
; CM-NEXT:     BFE_INT T10.Z, T3.Z, 0.0, literal.y,
; CM-NEXT:     BFE_INT * T11.W, T2.Y, 0.0, literal.y,
; CM-NEXT:    2(2.802597e-45), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T13.X, PV.X, literal.x,
; CM-NEXT:     BFE_INT T10.Y, T2.W, 0.0, literal.y,
; CM-NEXT:     BFE_INT T11.Z, T2.Z, 0.0, literal.y,
; CM-NEXT:     BFE_INT * T8.W, T1.Y, 0.0, literal.y,
; CM-NEXT:    12(1.681558e-44), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T14.X, T12.X, literal.x,
; CM-NEXT:     BFE_INT T11.Y, T1.W, 0.0, literal.x,
; CM-NEXT:     BFE_INT T8.Z, T1.Z, 0.0, literal.x,
; CM-NEXT:     LSHR * T0.W, T0.X, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT T0.X, T12.X, literal.x,
; CM-NEXT:     BFE_INT * T8.Y, PV.W, 0.0, literal.y,
; CM-NEXT:    4(5.605194e-45), 8(1.121039e-44)
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <16 x i8>, ptr addrspace(1) %in, i32 %tid
  %load = load <16 x i8>, ptr addrspace(1) %in.tid
  %ext = sext <16 x i8> %load to <16 x i32>
  store <16 x i32> %ext, ptr addrspace(1) %out
  ret void
}

; TODO: EG/CM should use DST, but for some there are redundant MOVs
define amdgpu_kernel void @global_zextload_v32i8_to_v32i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_zextload_v32i8_to_v32i32:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s3
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[6:7]
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx4 v[4:7], v[0:1], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx4 v[8:11], v[0:1], s[8:11], 0 addr64 offset:16
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(1)
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v3, 24, v4
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v35, 24, v11
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v33, v11, 8, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v32, 0xff, v11
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v34, v11, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v1, v4, 8, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v15, 24, v5
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v13, v5, 8, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v19, 24, v6
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v17, v6, 8, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v23, 24, v7
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v21, v7, 8, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v0, 0xff, v4
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v2, v4, 16, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v12, 0xff, v5
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v14, v5, 16, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v16, 0xff, v6
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v18, v6, 16, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v20, 0xff, v7
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v22, v7, 16, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v7, 24, v8
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v5, v8, 8, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v27, 24, v9
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v25, v9, 8, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v31, 24, v10
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v29, v10, 8, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v4, 0xff, v8
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v6, v8, 16, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v24, 0xff, v9
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v26, v9, 16, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v28, 0xff, v10
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v30, v10, 16, 8
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:112
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:96
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:80
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:64
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:48
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:32
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:16
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_zextload_v32i8_to_v32i32:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dwordx4 v[4:7], v[0:1]
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, 16, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 48
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v15, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v14, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 32
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v17, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 16
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v19, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v18, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0x70
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v13, s1
; GCN-HSA-NEXT:    v_mov_b32_e32 v12, s0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(1)
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v11, 24, v7
; GCN-HSA-NEXT:    v_bfe_u32 v9, v7, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v8, 0xff, v7
; GCN-HSA-NEXT:    v_bfe_u32 v10, v7, 16, 8
; GCN-HSA-NEXT:    flat_store_dwordx4 v[14:15], v[8:11]
; GCN-HSA-NEXT:    v_mov_b32_e32 v15, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v14, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0x60
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v10, 24, v6
; GCN-HSA-NEXT:    v_bfe_u32 v8, v6, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v7, 0xff, v6
; GCN-HSA-NEXT:    v_bfe_u32 v9, v6, 16, 8
; GCN-HSA-NEXT:    flat_store_dwordx4 v[16:17], v[7:10]
; GCN-HSA-NEXT:    v_mov_b32_e32 v17, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0x50
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v9, 24, v5
; GCN-HSA-NEXT:    v_bfe_u32 v7, v5, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v6, 0xff, v5
; GCN-HSA-NEXT:    v_bfe_u32 v8, v5, 16, 8
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[18:19], v[6:9]
; GCN-HSA-NEXT:    v_and_b32_e32 v5, 0xff, v4
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v8, 24, v4
; GCN-HSA-NEXT:    v_bfe_u32 v6, v4, 8, 8
; GCN-HSA-NEXT:    v_bfe_u32 v7, v4, 16, 8
; GCN-HSA-NEXT:    s_add_u32 s0, s0, 64
; GCN-HSA-NEXT:    flat_store_dwordx4 v[12:13], v[5:8]
; GCN-HSA-NEXT:    s_waitcnt vmcnt(4)
; GCN-HSA-NEXT:    v_and_b32_e32 v4, 0xff, v3
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v7, 24, v3
; GCN-HSA-NEXT:    v_bfe_u32 v5, v3, 8, 8
; GCN-HSA-NEXT:    v_bfe_u32 v6, v3, 16, 8
; GCN-HSA-NEXT:    s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[14:15], v[4:7]
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v15, 24, v2
; GCN-HSA-NEXT:    v_bfe_u32 v13, v2, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v12, 0xff, v2
; GCN-HSA-NEXT:    v_bfe_u32 v14, v2, 16, 8
; GCN-HSA-NEXT:    v_mov_b32_e32 v19, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v18, s2
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v11, 24, v0
; GCN-HSA-NEXT:    v_bfe_u32 v9, v0, 8, 8
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v6, 24, v1
; GCN-HSA-NEXT:    v_bfe_u32 v4, v1, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v8, 0xff, v0
; GCN-HSA-NEXT:    v_bfe_u32 v10, v0, 16, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v3, 0xff, v1
; GCN-HSA-NEXT:    v_bfe_u32 v5, v1, 16, 8
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT:    flat_store_dwordx4 v[16:17], v[12:15]
; GCN-HSA-NEXT:    flat_store_dwordx4 v[18:19], v[3:6]
; GCN-HSA-NEXT:    flat_store_dwordx4 v[0:1], v[8:11]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_zextload_v32i8_to_v32i32:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v4, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx4 v[0:3], v[4:5]
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v4, vcc, 16, v4
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx4 v[4:7], v[4:5]
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(1)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v23, 24, v3
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v20, 0xff, v3
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v21, 8, v3
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v22, v3, 16, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v11, 24, v0
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v8, 0xff, v0
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v9, 8, v0
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v10, v0, 16, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v15, 24, v1
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v12, 0xff, v1
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v13, 8, v1
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v14, v1, 16, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v19, 24, v2
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v16, 0xff, v2
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v17, 8, v2
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v18, v2, 16, 8
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v3, 24, v4
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v0, 0xff, v4
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v1, 8, v4
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v2, v4, 16, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v27, 24, v5
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v24, 0xff, v5
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v25, 8, v5
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v26, v5, 16, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v31, 24, v6
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v28, 0xff, v6
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v29, 8, v6
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v30, v6, 16, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v35, 24, v7
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v32, 0xff, v7
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v33, 8, v7
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v34, v7, 16, 8
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:48
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:32
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:16
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:112
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:96
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:80
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_zextload_v32i8_to_v32i32:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @16, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 1 @12
; EG-NEXT:    ALU 64, @19, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T24.XYZW, T26.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T22.XYZW, T25.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T21.XYZW, T23.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T19.XYZW, T12.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T17.XYZW, T20.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T15.XYZW, T18.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T14.XYZW, T16.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T13.XYZW, T0.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 12:
; EG-NEXT:     VTX_READ_128 T12.XYZW, T0.X, 16, #1
; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 16:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    5(7.006492e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 19:
; EG-NEXT:     MOV * T1.W, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT * T13.Z, T0.X, literal.x, PV.W,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T13.Y, T0.X, literal.x, T1.W,
; EG-NEXT:     BFE_UINT * T14.Z, T0.Y, literal.y, T1.W,
; EG-NEXT:    8(1.121039e-44), 16(2.242078e-44)
; EG-NEXT:     BFE_UINT T14.Y, T0.Y, literal.x, T1.W,
; EG-NEXT:     LSHR * T13.W, T0.X, literal.y,
; EG-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; EG-NEXT:     AND_INT T13.X, T0.X, literal.x,
; EG-NEXT:     LSHR T14.W, T0.Y, literal.y,
; EG-NEXT:     AND_INT * T14.X, T0.Y, literal.x,
; EG-NEXT:    255(3.573311e-43), 24(3.363116e-44)
; EG-NEXT:     BFE_UINT * T15.Z, T0.Z, literal.x, T1.W,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     LSHR T0.X, KC0[2].Y, literal.x,
; EG-NEXT:     BFE_UINT * T15.Y, T0.Z, literal.y, T1.W,
; EG-NEXT:    2(2.802597e-45), 8(1.121039e-44)
; EG-NEXT:     ADD_INT T16.X, PV.X, literal.x,
; EG-NEXT:     BFE_UINT T17.Z, T0.W, literal.y, T1.W,
; EG-NEXT:     LSHR T15.W, T0.Z, literal.z,
; EG-NEXT:     AND_INT * T15.X, T0.Z, literal.w,
; EG-NEXT:    4(5.605194e-45), 16(2.242078e-44)
; EG-NEXT:    24(3.363116e-44), 255(3.573311e-43)
; EG-NEXT:     BFE_UINT * T17.Y, T0.W, literal.x, T1.W,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T18.X, T0.X, literal.x,
; EG-NEXT:     BFE_UINT T19.Z, T12.X, literal.y, T1.W, BS:VEC_120/SCL_212
; EG-NEXT:     LSHR T17.W, T0.W, literal.z, BS:VEC_120/SCL_212
; EG-NEXT:     AND_INT * T17.X, T0.W, literal.w,
; EG-NEXT:    8(1.121039e-44), 16(2.242078e-44)
; EG-NEXT:    24(3.363116e-44), 255(3.573311e-43)
; EG-NEXT:     BFE_UINT * T19.Y, T12.X, literal.x, T1.W,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T20.X, T0.X, literal.x,
; EG-NEXT:     BFE_UINT T21.Z, T12.Y, literal.y, T1.W,
; EG-NEXT:     LSHR T19.W, T12.X, literal.z, BS:VEC_120/SCL_212
; EG-NEXT:     AND_INT * T19.X, T12.X, literal.w,
; EG-NEXT:    12(1.681558e-44), 16(2.242078e-44)
; EG-NEXT:    24(3.363116e-44), 255(3.573311e-43)
; EG-NEXT:     BFE_UINT * T21.Y, T12.Y, literal.x, T1.W,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T12.X, T0.X, literal.x,
; EG-NEXT:     BFE_UINT T22.Z, T12.Z, literal.x, T1.W,
; EG-NEXT:     LSHR T21.W, T12.Y, literal.y,
; EG-NEXT:     AND_INT * T21.X, T12.Y, literal.z,
; EG-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; EG-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT * T22.Y, T12.Z, literal.x, T1.W,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T23.X, T0.X, literal.x,
; EG-NEXT:     BFE_UINT T24.Z, T12.W, literal.y, T1.W,
; EG-NEXT:     LSHR T22.W, T12.Z, literal.z,
; EG-NEXT:     AND_INT * T22.X, T12.Z, literal.w,
; EG-NEXT:    20(2.802597e-44), 16(2.242078e-44)
; EG-NEXT:    24(3.363116e-44), 255(3.573311e-43)
; EG-NEXT:     BFE_UINT * T24.Y, T12.W, literal.x, T1.W,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T25.X, T0.X, literal.x,
; EG-NEXT:     LSHR T24.W, T12.W, literal.x,
; EG-NEXT:     AND_INT * T24.X, T12.W, literal.y,
; EG-NEXT:    24(3.363116e-44), 255(3.573311e-43)
; EG-NEXT:     ADD_INT * T26.X, T0.X, literal.x,
; EG-NEXT:    28(3.923636e-44), 0(0.000000e+00)
;
; CM-LABEL: global_zextload_v32i8_to_v32i32:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 2, @16, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 1 @12
; CM-NEXT:    ALU 63, @19, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T12, T15.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T24, T26.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T22, T25.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T20, T23.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0, T21.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T17, T19.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T14, T18.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T13, T16.X
; CM-NEXT:    CF_END
; CM-NEXT:    Fetch clause starting at 12:
; CM-NEXT:     VTX_READ_128 T12.XYZW, T0.X, 0, #1
; CM-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 16, #1
; CM-NEXT:    ALU clause starting at 16:
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x,
; CM-NEXT:    5(7.006492e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 19:
; CM-NEXT:     MOV * T1.W, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT * T13.Z, T0.W, literal.x, PV.W,
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT T13.Y, T0.W, literal.x, T1.W,
; CM-NEXT:     LSHR * T13.W, T0.W, literal.y,
; CM-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; CM-NEXT:     AND_INT T13.X, T0.W, literal.x,
; CM-NEXT:     BFE_UINT * T14.Z, T0.Z, literal.y, T1.W,
; CM-NEXT:    255(3.573311e-43), 16(2.242078e-44)
; CM-NEXT:     LSHR T15.X, KC0[2].Y, literal.x,
; CM-NEXT:     BFE_UINT * T14.Y, T0.Z, literal.y, T1.W,
; CM-NEXT:    2(2.802597e-45), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T16.X, PV.X, literal.x,
; CM-NEXT:     BFE_UINT T17.Z, T0.Y, literal.y, T1.W,
; CM-NEXT:     LSHR * T14.W, T0.Z, literal.z,
; CM-NEXT:    28(3.923636e-44), 16(2.242078e-44)
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T14.X, T0.Z, literal.x,
; CM-NEXT:     BFE_UINT * T17.Y, T0.Y, literal.y, T1.W,
; CM-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T18.X, T15.X, literal.x,
; CM-NEXT:     BFE_UINT T0.Z, T0.X, literal.y, T1.W, BS:VEC_120/SCL_212
; CM-NEXT:     LSHR * T17.W, T0.Y, literal.x,
; CM-NEXT:    24(3.363116e-44), 16(2.242078e-44)
; CM-NEXT:     AND_INT T17.X, T0.Y, literal.x,
; CM-NEXT:     BFE_UINT * T0.Y, T0.X, literal.y, T1.W,
; CM-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T19.X, T15.X, literal.x,
; CM-NEXT:     BFE_UINT T20.Z, T12.W, literal.y, T1.W,
; CM-NEXT:     LSHR * T0.W, T0.X, literal.z, BS:VEC_120/SCL_212
; CM-NEXT:    20(2.802597e-44), 16(2.242078e-44)
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.X, T0.X, literal.x,
; CM-NEXT:     BFE_UINT * T20.Y, T12.W, literal.y, T1.W,
; CM-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T21.X, T15.X, literal.x,
; CM-NEXT:     BFE_UINT T22.Z, T12.Z, literal.x, T1.W,
; CM-NEXT:     LSHR * T20.W, T12.W, literal.y,
; CM-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; CM-NEXT:     AND_INT T20.X, T12.W, literal.x,
; CM-NEXT:     BFE_UINT * T22.Y, T12.Z, literal.y, T1.W,
; CM-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T23.X, T15.X, literal.x,
; CM-NEXT:     BFE_UINT T24.Z, T12.Y, literal.y, T1.W,
; CM-NEXT:     LSHR * T22.W, T12.Z, literal.z,
; CM-NEXT:    12(1.681558e-44), 16(2.242078e-44)
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T22.X, T12.Z, literal.x,
; CM-NEXT:     BFE_UINT * T24.Y, T12.Y, literal.y, T1.W,
; CM-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T25.X, T15.X, literal.x,
; CM-NEXT:     BFE_UINT T12.Z, T12.X, literal.y, T1.W, BS:VEC_120/SCL_212
; CM-NEXT:     LSHR * T24.W, T12.Y, literal.z,
; CM-NEXT:    8(1.121039e-44), 16(2.242078e-44)
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T24.X, T12.Y, literal.x,
; CM-NEXT:     BFE_UINT * T12.Y, T12.X, literal.y, T1.W,
; CM-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T26.X, T15.X, literal.x,
; CM-NEXT:     LSHR * T12.W, T12.X, literal.y, BS:VEC_120/SCL_212
; CM-NEXT:    4(5.605194e-45), 24(3.363116e-44)
; CM-NEXT:     AND_INT * T12.X, T12.X, literal.x,
; CM-NEXT:    255(3.573311e-43), 0(0.000000e+00)
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <32 x i8>, ptr addrspace(1) %in, i32 %tid
  %load = load <32 x i8>, ptr addrspace(1) %in.tid
  %ext = zext <32 x i8> %load to <32 x i32>
  store <32 x i32> %ext, ptr addrspace(1) %out
  ret void
}

; TODO: EG/CM should use DST, but for some there are redundant MOVs
define amdgpu_kernel void @global_sextload_v32i8_to_v32i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_sextload_v32i8_to_v32i32:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s3
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v4, 5, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[6:7]
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v5, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx4 v[0:3], v[4:5], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx4 v[4:7], v[4:5], s[8:11], 0 addr64 offset:16
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(1)
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v11, 24, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v35, 24, v7
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v34, v7, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v33, v7, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v32, v7, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v10, v0, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v9, v0, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v8, v0, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v15, 24, v1
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v14, v1, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v13, v1, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v12, v1, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v19, 24, v2
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v18, v2, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v17, v2, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v16, v2, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v23, 24, v3
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v22, v3, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v21, v3, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v20, v3, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v3, 24, v4
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v2, v4, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v1, v4, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v0, v4, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v27, 24, v5
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v26, v5, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v25, v5, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v24, v5, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v31, 24, v6
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v30, v6, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v29, v6, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v28, v6, 0, 8
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:112
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:96
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:80
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:48
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:32
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:16
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_sextload_v32i8_to_v32i32:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dwordx4 v[4:7], v[0:1]
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, 16, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 48
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v15, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v14, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 32
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v17, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 16
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v19, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v18, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0x70
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v13, s1
; GCN-HSA-NEXT:    v_mov_b32_e32 v12, s0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(1)
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v10, 24, v7
; GCN-HSA-NEXT:    v_bfe_i32 v9, v7, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v8, v7, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v7, v7, 0, 8
; GCN-HSA-NEXT:    flat_store_dwordx4 v[14:15], v[7:10]
; GCN-HSA-NEXT:    v_mov_b32_e32 v15, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v14, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0x60
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v9, 24, v6
; GCN-HSA-NEXT:    v_bfe_i32 v8, v6, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v7, v6, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v6, v6, 0, 8
; GCN-HSA-NEXT:    flat_store_dwordx4 v[16:17], v[6:9]
; GCN-HSA-NEXT:    v_mov_b32_e32 v17, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0x50
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v8, 24, v5
; GCN-HSA-NEXT:    v_bfe_i32 v7, v5, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v6, v5, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v5, v5, 0, 8
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[18:19], v[5:8]
; GCN-HSA-NEXT:    s_add_u32 s0, s0, 64
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v7, 24, v4
; GCN-HSA-NEXT:    v_bfe_i32 v6, v4, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v5, v4, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v4, v4, 0, 8
; GCN-HSA-NEXT:    flat_store_dwordx4 v[12:13], v[4:7]
; GCN-HSA-NEXT:    s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(4)
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v6, 24, v3
; GCN-HSA-NEXT:    v_bfe_i32 v5, v3, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v4, v3, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v3, v3, 0, 8
; GCN-HSA-NEXT:    flat_store_dwordx4 v[14:15], v[3:6]
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v15, 24, v2
; GCN-HSA-NEXT:    v_bfe_i32 v14, v2, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v13, v2, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v12, v2, 0, 8
; GCN-HSA-NEXT:    v_mov_b32_e32 v19, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v18, s2
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v11, 24, v0
; GCN-HSA-NEXT:    v_bfe_i32 v10, v0, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v9, v0, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v8, v0, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v6, 24, v1
; GCN-HSA-NEXT:    v_bfe_i32 v5, v1, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v4, v1, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v3, v1, 0, 8
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT:    flat_store_dwordx4 v[16:17], v[12:15]
; GCN-HSA-NEXT:    flat_store_dwordx4 v[18:19], v[3:6]
; GCN-HSA-NEXT:    flat_store_dwordx4 v[0:1], v[8:11]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_sextload_v32i8_to_v32i32:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v4, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx4 v[0:3], v[4:5]
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v4, vcc, 16, v4
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx4 v[4:7], v[4:5]
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(1)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v9, 8, v3
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v17, v9, 0, 8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v19, 24, v3
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v18, v3, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v16, v3, 0, 8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v15, 24, v1
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v14, v1, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v12, v1, 0, 8
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:48
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v1, 8, v1
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v19, 24, v2
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v18, v2, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v16, v2, 0, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v2, 8, v2
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v9, 8, v0
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v17, v2, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v13, v1, 0, 8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v11, 24, v0
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v10, v0, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v8, v0, 0, 8
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:32
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:16
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(3)
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v19, 24, v6
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v15, 24, v5
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v14, v5, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v12, v5, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v18, v6, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v16, v6, 0, 8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v23, 24, v7
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v22, v7, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v20, v7, 0, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v7, 8, v7
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v6, 8, v6
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v5, 8, v5
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v1, 8, v4
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v9, v9, 0, 8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v3, 24, v4
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v2, v4, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v0, v4, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v1, v1, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v13, v5, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v17, v6, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v21, v7, 0, 8
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:112
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:96
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:80
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_sextload_v32i8_to_v32i32:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @18, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @14
; EG-NEXT:    ALU 9, @21, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @16
; EG-NEXT:    ALU 73, @31, KC0[], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T24.XYZW, T26.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T23.XYZW, T25.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T17.XYZW, T12.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T22.XYZW, T0.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T21.XYZW, T16.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T20.XYZW, T15.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T19.XYZW, T14.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T18.XYZW, T13.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 14:
; EG-NEXT:     VTX_READ_128 T12.XYZW, T0.X, 16, #1
; EG-NEXT:    Fetch clause starting at 16:
; EG-NEXT:     VTX_READ_128 T17.XYZW, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 18:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    5(7.006492e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 21:
; EG-NEXT:     LSHR * T13.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T14.X, PV.X, literal.x,
; EG-NEXT:     ADD_INT * T15.X, PV.X, literal.y,
; EG-NEXT:    4(5.605194e-45), 8(1.121039e-44)
; EG-NEXT:     ADD_INT T16.X, T13.X, literal.x,
; EG-NEXT:     LSHR T0.W, T12.W, literal.y,
; EG-NEXT:     LSHR * T1.W, T12.W, literal.z,
; EG-NEXT:    12(1.681558e-44), 16(2.242078e-44)
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; EG-NEXT:    ALU clause starting at 31:
; EG-NEXT:     LSHR T2.W, T12.Z, literal.x,
; EG-NEXT:     LSHR * T3.W, T12.Z, literal.y,
; EG-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; EG-NEXT:     ADD_INT T0.X, T13.X, literal.x,
; EG-NEXT:     LSHR T0.Y, T12.Y, literal.x,
; EG-NEXT:     LSHR T0.Z, T12.Y, literal.y,
; EG-NEXT:     LSHR T4.W, T12.X, literal.x, BS:VEC_120/SCL_212
; EG-NEXT:     LSHR * T5.W, T12.X, literal.y,
; EG-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; EG-NEXT:     BFE_INT T18.X, T17.X, 0.0, literal.x,
; EG-NEXT:     LSHR T1.Y, T17.W, literal.y,
; EG-NEXT:     LSHR T1.Z, T17.W, literal.z,
; EG-NEXT:     LSHR T6.W, T17.Z, literal.y,
; EG-NEXT:     LSHR * T7.W, T17.X, literal.z,
; EG-NEXT:    8(1.121039e-44), 16(2.242078e-44)
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T19.X, T17.Y, 0.0, literal.x,
; EG-NEXT:     LSHR T2.Y, T17.Z, literal.y,
; EG-NEXT:     LSHR T2.Z, T17.Y, literal.y,
; EG-NEXT:     BFE_INT T18.W, PS, 0.0, literal.x,
; EG-NEXT:     LSHR * T7.W, T17.X, literal.z,
; EG-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T20.X, T17.Z, 0.0, literal.x,
; EG-NEXT:     LSHR T3.Y, T17.Y, literal.y,
; EG-NEXT:     BFE_INT T18.Z, PS, 0.0, literal.x,
; EG-NEXT:     BFE_INT T19.W, PV.Z, 0.0, literal.x,
; EG-NEXT:     LSHR * T7.W, T17.X, literal.x,
; EG-NEXT:    8(1.121039e-44), 16(2.242078e-44)
; EG-NEXT:     BFE_INT T21.X, T17.W, 0.0, literal.x,
; EG-NEXT:     BFE_INT T18.Y, PS, 0.0, literal.x,
; EG-NEXT:     BFE_INT T19.Z, PV.Y, 0.0, literal.x,
; EG-NEXT:     BFE_INT T20.W, T2.Y, 0.0, literal.x,
; EG-NEXT:     LSHR * T7.W, T17.Y, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T22.X, T12.X, 0.0, literal.x,
; EG-NEXT:     BFE_INT T19.Y, PS, 0.0, literal.x,
; EG-NEXT:     BFE_INT T20.Z, T6.W, 0.0, literal.x,
; EG-NEXT:     BFE_INT T21.W, T1.Z, 0.0, literal.x,
; EG-NEXT:     LSHR * T6.W, T17.Z, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T17.X, T12.Y, 0.0, literal.x,
; EG-NEXT:     BFE_INT T20.Y, PS, 0.0, literal.x,
; EG-NEXT:     BFE_INT T21.Z, T1.Y, 0.0, literal.x, BS:VEC_120/SCL_212
; EG-NEXT:     BFE_INT T22.W, T5.W, 0.0, literal.x,
; EG-NEXT:     LSHR * T5.W, T17.W, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T23.X, T12.Z, 0.0, literal.x,
; EG-NEXT:     BFE_INT T21.Y, PS, 0.0, literal.x,
; EG-NEXT:     BFE_INT T22.Z, T4.W, 0.0, literal.x,
; EG-NEXT:     BFE_INT T17.W, T0.Z, 0.0, literal.x, BS:VEC_120/SCL_212
; EG-NEXT:     LSHR * T4.W, T12.X, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T24.X, T12.W, 0.0, literal.x,
; EG-NEXT:     BFE_INT T22.Y, PS, 0.0, literal.x,
; EG-NEXT:     BFE_INT T17.Z, T0.Y, 0.0, literal.x,
; EG-NEXT:     BFE_INT T23.W, T3.W, 0.0, literal.x, BS:VEC_120/SCL_212
; EG-NEXT:     LSHR * T3.W, T12.Y, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T12.X, T13.X, literal.x,
; EG-NEXT:     BFE_INT T17.Y, PS, 0.0, literal.y,
; EG-NEXT:     BFE_INT T23.Z, T2.W, 0.0, literal.y,
; EG-NEXT:     BFE_INT T24.W, T1.W, 0.0, literal.y, BS:VEC_120/SCL_212
; EG-NEXT:     LSHR * T1.W, T12.Z, literal.y,
; EG-NEXT:    20(2.802597e-44), 8(1.121039e-44)
; EG-NEXT:     ADD_INT T25.X, T13.X, literal.x,
; EG-NEXT:     BFE_INT T23.Y, PS, 0.0, literal.y,
; EG-NEXT:     BFE_INT T24.Z, T0.W, 0.0, literal.y,
; EG-NEXT:     LSHR T0.W, T12.W, literal.y, BS:VEC_120/SCL_212
; EG-NEXT:     ADD_INT * T26.X, T13.X, literal.z,
; EG-NEXT:    24(3.363116e-44), 8(1.121039e-44)
; EG-NEXT:    28(3.923636e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT * T24.Y, PV.W, 0.0, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
;
; CM-LABEL: global_sextload_v32i8_to_v32i32:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 2, @18, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @14
; CM-NEXT:    ALU 8, @21, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @16
; CM-NEXT:    ALU 78, @30, KC0[], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T24, T13.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T23, T12.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T22, T26.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T21, T25.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T14, T17.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T20, T16.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T19, T15.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T18, T0.X
; CM-NEXT:    CF_END
; CM-NEXT:    Fetch clause starting at 14:
; CM-NEXT:     VTX_READ_128 T12.XYZW, T0.X, 0, #1
; CM-NEXT:    Fetch clause starting at 16:
; CM-NEXT:     VTX_READ_128 T14.XYZW, T0.X, 16, #1
; CM-NEXT:    ALU clause starting at 18:
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x,
; CM-NEXT:    5(7.006492e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 21:
; CM-NEXT:     LSHR T0.Z, T12.X, literal.x,
; CM-NEXT:     LSHR * T0.W, T12.Y, literal.y,
; CM-NEXT:    16(2.242078e-44), 8(1.121039e-44)
; CM-NEXT:     LSHR T13.X, KC0[2].Y, literal.x,
; CM-NEXT:     LSHR T0.Y, T12.X, literal.y,
; CM-NEXT:     LSHR T1.Z, T12.Y, literal.z,
; CM-NEXT:     LSHR * T1.W, T12.Z, literal.w,
; CM-NEXT:    2(2.802597e-45), 24(3.363116e-44)
; CM-NEXT:    16(2.242078e-44), 8(1.121039e-44)
; CM-NEXT:    ALU clause starting at 30:
; CM-NEXT:     ADD_INT T0.X, T13.X, literal.x,
; CM-NEXT:     LSHR T1.Y, T12.Y, literal.y,
; CM-NEXT:     LSHR T2.Z, T12.Z, literal.z,
; CM-NEXT:     LSHR * T2.W, T12.W, literal.w,
; CM-NEXT:    28(3.923636e-44), 24(3.363116e-44)
; CM-NEXT:    16(2.242078e-44), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T15.X, T13.X, literal.x,
; CM-NEXT:     LSHR T2.Y, T12.Z, literal.x,
; CM-NEXT:     LSHR T3.Z, T12.W, literal.y,
; CM-NEXT:     LSHR * T3.W, T14.X, literal.z, BS:VEC_120/SCL_212
; CM-NEXT:    24(3.363116e-44), 16(2.242078e-44)
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT T16.X, T13.X, literal.x,
; CM-NEXT:     LSHR T3.Y, T12.W, literal.y,
; CM-NEXT:     LSHR T4.Z, T14.X, literal.z, BS:VEC_120/SCL_212
; CM-NEXT:     LSHR * T4.W, T14.Y, literal.w,
; CM-NEXT:    20(2.802597e-44), 24(3.363116e-44)
; CM-NEXT:    16(2.242078e-44), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T17.X, T13.X, literal.x,
; CM-NEXT:     LSHR T4.Y, T14.X, literal.y, BS:VEC_120/SCL_212
; CM-NEXT:     LSHR T5.Z, T14.Y, literal.x,
; CM-NEXT:     LSHR * T5.W, T14.Z, literal.z,
; CM-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T18.X, T14.W, 0.0, literal.x,
; CM-NEXT:     LSHR T5.Y, T14.Y, literal.y,
; CM-NEXT:     LSHR T6.Z, T14.Z, literal.z,
; CM-NEXT:     LSHR * T6.W, T14.W, literal.y,
; CM-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T19.X, T14.Z, 0.0, literal.x,
; CM-NEXT:     LSHR T6.Y, T14.Z, literal.y,
; CM-NEXT:     LSHR T7.Z, T14.W, literal.z,
; CM-NEXT:     BFE_INT * T18.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T20.X, T14.Y, 0.0, literal.x,
; CM-NEXT:     LSHR T7.Y, T14.W, literal.x,
; CM-NEXT:     BFE_INT T18.Z, PV.Z, 0.0, literal.x,
; CM-NEXT:     BFE_INT * T19.W, PV.Y, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T14.X, T14.X, 0.0, literal.x,
; CM-NEXT:     BFE_INT T18.Y, PV.Y, 0.0, literal.x,
; CM-NEXT:     BFE_INT T19.Z, T6.Z, 0.0, literal.x,
; CM-NEXT:     BFE_INT * T20.W, T5.Y, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T21.X, T12.W, 0.0, literal.x,
; CM-NEXT:     BFE_INT T19.Y, T5.W, 0.0, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:     BFE_INT T20.Z, T5.Z, 0.0, literal.x,
; CM-NEXT:     BFE_INT * T14.W, T4.Y, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T22.X, T12.Z, 0.0, literal.x,
; CM-NEXT:     BFE_INT T20.Y, T4.W, 0.0, literal.x,
; CM-NEXT:     BFE_INT T14.Z, T4.Z, 0.0, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:     BFE_INT * T21.W, T3.Y, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T23.X, T12.Y, 0.0, literal.x,
; CM-NEXT:     BFE_INT T14.Y, T3.W, 0.0, literal.x,
; CM-NEXT:     BFE_INT T21.Z, T3.Z, 0.0, literal.x,
; CM-NEXT:     BFE_INT * T22.W, T2.Y, 0.0, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T24.X, T12.X, 0.0, literal.x,
; CM-NEXT:     BFE_INT T21.Y, T2.W, 0.0, literal.x,
; CM-NEXT:     BFE_INT T22.Z, T2.Z, 0.0, literal.x,
; CM-NEXT:     BFE_INT * T23.W, T1.Y, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT T25.X, T13.X, literal.x,
; CM-NEXT:     BFE_INT T22.Y, T1.W, 0.0, literal.y,
; CM-NEXT:     BFE_INT T23.Z, T1.Z, 0.0, literal.y,
; CM-NEXT:     BFE_INT * T24.W, T0.Y, 0.0, literal.y,
; CM-NEXT:    12(1.681558e-44), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T26.X, T13.X, literal.x,
; CM-NEXT:     BFE_INT T23.Y, T0.W, 0.0, literal.x,
; CM-NEXT:     BFE_INT T24.Z, T0.Z, 0.0, literal.x,
; CM-NEXT:     LSHR * T0.W, T12.X, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT T12.X, T13.X, literal.x,
; CM-NEXT:     BFE_INT * T24.Y, PV.W, 0.0, literal.y,
; CM-NEXT:    4(5.605194e-45), 8(1.121039e-44)
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <32 x i8>, ptr addrspace(1) %in, i32 %tid
  %load = load <32 x i8>, ptr addrspace(1) %in.tid
  %ext = sext <32 x i8> %load to <32 x i32>
  store <32 x i32> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_zextload_v64i8_to_v64i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_zextload_v64i8_to_v64i32:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s12, SCRATCH_RSRC_DWORD0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s13, SCRATCH_RSRC_DWORD1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s14, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s15, 0xe8f000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-SI-NEXT:    s_add_u32 s12, s12, s11
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s3
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[6:7]
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v0, 6, v0
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx4 v[16:19], v[0:1], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx4 v[32:35], v[0:1], s[8:11], 0 addr64 offset:16
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx4 v[36:39], v[0:1], s[8:11], 0 addr64 offset:32
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx4 v[40:43], v[0:1], s[8:11], 0 addr64 offset:48
; GCN-NOHSA-SI-NEXT:    s_addc_u32 s13, s13, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(3)
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v3, 24, v17
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v1, v17, 8, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v0, 0xff, v17
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v2, v17, 16, 8
; GCN-NOHSA-SI-NEXT:    buffer_store_dword v0, off, s[12:15], 0 ; 4-byte Folded Spill
; GCN-NOHSA-SI-NEXT:    buffer_store_dword v1, off, s[12:15], 0 offset:4 ; 4-byte Folded Spill
; GCN-NOHSA-SI-NEXT:    buffer_store_dword v2, off, s[12:15], 0 offset:8 ; 4-byte Folded Spill
; GCN-NOHSA-SI-NEXT:    buffer_store_dword v3, off, s[12:15], 0 offset:12 ; 4-byte Folded Spill
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(4) expcnt(0)
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v3, 24, v42
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v1, v42, 8, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v0, 0xff, v42
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v2, v42, 16, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v7, 24, v16
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v5, v16, 8, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v11, 24, v19
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v9, v19, 8, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v15, 24, v18
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v13, v18, 8, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v4, 0xff, v16
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v6, v16, 16, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v8, 0xff, v19
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v10, v19, 16, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v12, 0xff, v18
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v14, v18, 16, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v19, 24, v33
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v17, v33, 8, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v23, 24, v32
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v21, v32, 8, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v27, 24, v35
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v25, v35, 8, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v31, 24, v34
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v29, v34, 8, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v16, 0xff, v33
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v18, v33, 16, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v20, 0xff, v32
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v22, v32, 16, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v24, 0xff, v35
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v26, v35, 16, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v28, 0xff, v34
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v30, v34, 16, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v35, 24, v37
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v33, v37, 8, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v47, 24, v36
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v45, v36, 8, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v51, 24, v39
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v49, v39, 8, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v55, 24, v38
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v53, v38, 8, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v32, 0xff, v37
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v34, v37, 16, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v44, 0xff, v36
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v46, v36, 16, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v48, 0xff, v39
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v50, v39, 16, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v52, 0xff, v38
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v54, v38, 16, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v39, 24, v41
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v37, v41, 8, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v59, 24, v40
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v57, v40, 8, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v63, 24, v43
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v61, v43, 8, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v36, 0xff, v41
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v38, v41, 16, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v56, 0xff, v40
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v58, v40, 16, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v60, 0xff, v43
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v62, v43, 16, 8
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:224
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[60:63], off, s[0:3], 0 offset:240
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[56:59], off, s[0:3], 0 offset:192
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[36:39], off, s[0:3], 0 offset:208
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[52:55], off, s[0:3], 0 offset:160
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[48:51], off, s[0:3], 0 offset:176
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[44:47], off, s[0:3], 0 offset:128
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:144
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:96
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:112
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:64
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:80
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:32
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:48
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dword v0, off, s[12:15], 0 ; 4-byte Folded Reload
; GCN-NOHSA-SI-NEXT:    buffer_load_dword v1, off, s[12:15], 0 offset:4 ; 4-byte Folded Reload
; GCN-NOHSA-SI-NEXT:    buffer_load_dword v2, off, s[12:15], 0 offset:8 ; 4-byte Folded Reload
; GCN-NOHSA-SI-NEXT:    buffer_load_dword v3, off, s[12:15], 0 offset:12 ; 4-byte Folded Reload
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_zextload_v64i8_to_v64i32:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 6, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v4, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dwordx4 v[12:15], v[4:5]
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, 48, v4
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v5, vcc
; GCN-HSA-NEXT:    flat_load_dwordx4 v[8:11], v[0:1]
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, 16, v4
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v5, vcc
; GCN-HSA-NEXT:    v_add_i32_e32 v4, vcc, 32, v4
; GCN-HSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
; GCN-HSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCN-HSA-NEXT:    flat_load_dwordx4 v[4:7], v[4:5]
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 32
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v21, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v20, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 48
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(3)
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v19, 24, v14
; GCN-HSA-NEXT:    v_bfe_u32 v17, v14, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v16, 0xff, v14
; GCN-HSA-NEXT:    v_bfe_u32 v18, v14, 16, 8
; GCN-HSA-NEXT:    flat_store_dwordx4 v[20:21], v[16:19]
; GCN-HSA-NEXT:    v_mov_b32_e32 v14, s2
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v19, 24, v15
; GCN-HSA-NEXT:    v_bfe_u32 v17, v15, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v16, 0xff, v15
; GCN-HSA-NEXT:    v_bfe_u32 v18, v15, 16, 8
; GCN-HSA-NEXT:    v_mov_b32_e32 v15, s3
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 16
; GCN-HSA-NEXT:    flat_store_dwordx4 v[14:15], v[16:19]
; GCN-HSA-NEXT:    v_bfe_u32 v15, v12, 8, 8
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v17, 24, v12
; GCN-HSA-NEXT:    v_and_b32_e32 v14, 0xff, v12
; GCN-HSA-NEXT:    v_bfe_u32 v16, v12, 16, 8
; GCN-HSA-NEXT:    v_mov_b32_e32 v19, s1
; GCN-HSA-NEXT:    v_mov_b32_e32 v18, s0
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[18:19], v[14:17]
; GCN-HSA-NEXT:    v_mov_b32_e32 v12, s2
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v17, 24, v13
; GCN-HSA-NEXT:    v_bfe_u32 v15, v13, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v14, 0xff, v13
; GCN-HSA-NEXT:    v_bfe_u32 v16, v13, 16, 8
; GCN-HSA-NEXT:    v_mov_b32_e32 v13, s3
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0xe0
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v19, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v18, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0xf0
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[12:13], v[14:17]
; GCN-HSA-NEXT:    s_waitcnt vmcnt(6)
; GCN-HSA-NEXT:    v_bfe_u32 v13, v10, 8, 8
; GCN-HSA-NEXT:    v_mov_b32_e32 v17, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0xc0
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v15, 24, v10
; GCN-HSA-NEXT:    v_and_b32_e32 v12, 0xff, v10
; GCN-HSA-NEXT:    v_bfe_u32 v14, v10, 16, 8
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[18:19], v[12:15]
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v18, 24, v8
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v15, 24, v11
; GCN-HSA-NEXT:    v_bfe_u32 v13, v11, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v12, 0xff, v11
; GCN-HSA-NEXT:    v_bfe_u32 v14, v11, 16, 8
; GCN-HSA-NEXT:    flat_store_dwordx4 v[16:17], v[12:15]
; GCN-HSA-NEXT:    v_bfe_u32 v16, v8, 8, 8
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v14, 24, v9
; GCN-HSA-NEXT:    v_bfe_u32 v12, v9, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v11, 0xff, v9
; GCN-HSA-NEXT:    v_bfe_u32 v13, v9, 16, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v15, 0xff, v8
; GCN-HSA-NEXT:    v_bfe_u32 v17, v8, 16, 8
; GCN-HSA-NEXT:    v_mov_b32_e32 v9, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v8, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0xd0
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v20, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v19, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0xa0
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[8:9], v[15:18]
; GCN-HSA-NEXT:    flat_store_dwordx4 v[19:20], v[11:14]
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v15, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0xb0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(8)
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v14, 24, v6
; GCN-HSA-NEXT:    v_bfe_u32 v12, v6, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v11, 0xff, v6
; GCN-HSA-NEXT:    v_bfe_u32 v13, v6, 16, 8
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[15:16], v[11:14]
; GCN-HSA-NEXT:    v_mov_b32_e32 v6, s2
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v14, 24, v7
; GCN-HSA-NEXT:    v_bfe_u32 v12, v7, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v11, 0xff, v7
; GCN-HSA-NEXT:    v_bfe_u32 v13, v7, 16, 8
; GCN-HSA-NEXT:    v_mov_b32_e32 v7, s3
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0x80
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[6:7], v[11:14]
; GCN-HSA-NEXT:    v_mov_b32_e32 v7, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v6, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0x90
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v14, 24, v4
; GCN-HSA-NEXT:    v_bfe_u32 v12, v4, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v11, 0xff, v4
; GCN-HSA-NEXT:    v_bfe_u32 v13, v4, 16, 8
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v18, 24, v5
; GCN-HSA-NEXT:    v_bfe_u32 v16, v5, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v15, 0xff, v5
; GCN-HSA-NEXT:    v_bfe_u32 v17, v5, 16, 8
; GCN-HSA-NEXT:    v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0x60
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v10, 24, v1
; GCN-HSA-NEXT:    v_bfe_u32 v8, v1, 8, 8
; GCN-HSA-NEXT:    flat_store_dwordx4 v[6:7], v[11:14]
; GCN-HSA-NEXT:    v_and_b32_e32 v7, 0xff, v1
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v14, 24, v0
; GCN-HSA-NEXT:    v_bfe_u32 v12, v0, 8, 8
; GCN-HSA-NEXT:    v_bfe_u32 v9, v1, 16, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v11, 0xff, v0
; GCN-HSA-NEXT:    v_bfe_u32 v13, v0, 16, 8
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0x70
; GCN-HSA-NEXT:    flat_store_dwordx4 v[4:5], v[15:18]
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v6, 24, v2
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v18, 24, v3
; GCN-HSA-NEXT:    v_bfe_u32 v16, v3, 8, 8
; GCN-HSA-NEXT:    v_bfe_u32 v4, v2, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v15, 0xff, v3
; GCN-HSA-NEXT:    v_bfe_u32 v17, v3, 16, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v3, 0xff, v2
; GCN-HSA-NEXT:    v_bfe_u32 v5, v2, 16, 8
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[0:1], v[3:6]
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 64
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    s_add_u32 s0, s0, 0x50
; GCN-HSA-NEXT:    flat_store_dwordx4 v[0:1], v[15:18]
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[0:1], v[11:14]
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT:    flat_store_dwordx4 v[0:1], v[7:10]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_zextload_v64i8_to_v64i32:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 6, v0
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v4, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v6, vcc, 16, v4
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v7, vcc, 0, v5, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx4 v[0:3], v[4:5]
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx4 v[12:15], v[6:7]
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v6, vcc, 32, v4
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v7, vcc, 0, v5, vcc
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v4, vcc, 48, v4
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx4 v[36:39], v[6:7]
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx4 v[40:43], v[4:5]
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(3)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v51, 24, v2
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v48, 0xff, v2
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v49, 8, v2
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v50, v2, 16, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v27, 24, v1
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v24, 0xff, v1
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v25, 8, v1
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v26, v1, 16, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v35, 24, v0
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v32, 0xff, v0
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v33, 8, v0
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v34, v0, 16, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v47, 24, v3
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v44, 0xff, v3
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v45, 8, v3
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v46, v3, 16, 8
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(2)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v3, 24, v13
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v0, 0xff, v13
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v1, 8, v13
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v2, v13, 16, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v7, 24, v12
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v4, 0xff, v12
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v5, 8, v12
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v6, v12, 16, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v11, 24, v15
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v8, 0xff, v15
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v9, 8, v15
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v10, v15, 16, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v15, 24, v14
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v12, 0xff, v14
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v13, 8, v14
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v14, v14, 16, 8
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(1)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v19, 24, v37
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v16, 0xff, v37
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v17, 8, v37
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v18, v37, 16, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v23, 24, v36
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v20, 0xff, v36
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v21, 8, v36
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v22, v36, 16, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v31, 24, v39
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v28, 0xff, v39
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v29, 8, v39
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v30, v39, 16, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v39, 24, v38
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v36, 0xff, v38
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v37, 8, v38
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v38, v38, 16, 8
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v55, 24, v41
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v52, 0xff, v41
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v53, 8, v41
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v54, v41, 16, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v59, 24, v40
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v56, 0xff, v40
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v57, 8, v40
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v58, v40, 16, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v63, 24, v43
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v60, 0xff, v43
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v61, 8, v43
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v62, v43, 16, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v43, 24, v42
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v40, 0xff, v42
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v41, 8, v42
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v42, v42, 16, 8
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[48:51], off, s[0:3], 0 offset:32
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[44:47], off, s[0:3], 0 offset:48
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[32:35], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:16
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[40:43], off, s[0:3], 0 offset:224
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[60:63], off, s[0:3], 0 offset:240
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[56:59], off, s[0:3], 0 offset:192
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[52:55], off, s[0:3], 0 offset:208
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[36:39], off, s[0:3], 0 offset:160
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:176
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:128
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:144
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:96
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:112
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:64
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_zextload_v64i8_to_v64i32:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @30, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 1 @22
; EG-NEXT:    ALU 37, @33, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 1 @26
; EG-NEXT:    ALU 92, @71, KC0[], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T48.XYZW, T50.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T47.XYZW, T49.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T45.XYZW, T29.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T43.XYZW, T46.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T41.XYZW, T44.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T40.XYZW, T42.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T38.XYZW, T30.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T36.XYZW, T39.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T34.XYZW, T37.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T33.XYZW, T35.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T31.XYZW, T22.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T21.XYZW, T32.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T27.XYZW, T28.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T25.XYZW, T23.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T20.XYZW, T24.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T26.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 22:
; EG-NEXT:     VTX_READ_128 T22.XYZW, T21.X, 16, #1
; EG-NEXT:     VTX_READ_128 T23.XYZW, T21.X, 0, #1
; EG-NEXT:    Fetch clause starting at 26:
; EG-NEXT:     VTX_READ_128 T29.XYZW, T21.X, 48, #1
; EG-NEXT:     VTX_READ_128 T30.XYZW, T21.X, 32, #1
; EG-NEXT:    ALU clause starting at 30:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    6(8.407791e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T21.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 33:
; EG-NEXT:     MOV * T1.W, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT * T0.Z, T23.Y, literal.x, PV.W,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T0.Y, T23.Y, literal.x, T1.W,
; EG-NEXT:     LSHR * T0.W, T23.Y, literal.y,
; EG-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; EG-NEXT:     AND_INT T0.X, T23.Y, literal.x,
; EG-NEXT:     BFE_UINT T20.Z, T23.X, literal.y, T1.W,
; EG-NEXT:     LSHR * T24.X, KC0[2].Y, literal.z,
; EG-NEXT:    255(3.573311e-43), 16(2.242078e-44)
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T20.Y, T23.X, literal.x, T1.W,
; EG-NEXT:     BFE_UINT * T25.Z, T23.W, literal.y, T1.W,
; EG-NEXT:    8(1.121039e-44), 16(2.242078e-44)
; EG-NEXT:     ADD_INT T26.X, T24.X, literal.x,
; EG-NEXT:     BFE_UINT T25.Y, T23.W, literal.y, T1.W,
; EG-NEXT:     LSHR T20.W, T23.X, literal.z, BS:VEC_120/SCL_212
; EG-NEXT:     AND_INT * T20.X, T23.X, literal.w,
; EG-NEXT:    4(5.605194e-45), 8(1.121039e-44)
; EG-NEXT:    24(3.363116e-44), 255(3.573311e-43)
; EG-NEXT:     BFE_UINT T27.Z, T23.Z, literal.x, T1.W,
; EG-NEXT:     LSHR * T25.W, T23.W, literal.y,
; EG-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; EG-NEXT:     AND_INT T25.X, T23.W, literal.x,
; EG-NEXT:     BFE_UINT T27.Y, T23.Z, literal.y, T1.W,
; EG-NEXT:     ADD_INT * T23.X, T24.X, literal.z,
; EG-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; EG-NEXT:    12(1.681558e-44), 0(0.000000e+00)
; EG-NEXT:     LSHR * T27.W, T23.Z, literal.x,
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T27.X, T23.Z, literal.x,
; EG-NEXT:     BFE_UINT T21.Z, T22.Y, literal.y, T1.W,
; EG-NEXT:     ADD_INT * T28.X, T24.X, literal.z,
; EG-NEXT:    255(3.573311e-43), 16(2.242078e-44)
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT * T21.Y, T22.Y, literal.x, T1.W,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:    ALU clause starting at 71:
; EG-NEXT:     BFE_UINT T31.Z, T22.X, literal.x, T1.W,
; EG-NEXT:     LSHR * T21.W, T22.Y, literal.y,
; EG-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; EG-NEXT:     AND_INT T21.X, T22.Y, literal.x,
; EG-NEXT:     BFE_UINT T31.Y, T22.X, literal.y, T1.W,
; EG-NEXT:     ADD_INT * T32.X, T24.X, literal.z,
; EG-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; EG-NEXT:    20(2.802597e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T33.Z, T22.W, literal.x, T1.W,
; EG-NEXT:     LSHR * T31.W, T22.X, literal.y,
; EG-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; EG-NEXT:     AND_INT T31.X, T22.X, literal.x,
; EG-NEXT:     BFE_UINT T33.Y, T22.W, literal.y, T1.W,
; EG-NEXT:     ADD_INT * T22.X, T24.X, literal.z,
; EG-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T34.Z, T22.Z, literal.x, T1.W,
; EG-NEXT:     LSHR * T33.W, T22.W, literal.y,
; EG-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; EG-NEXT:     AND_INT T33.X, T22.W, literal.x,
; EG-NEXT:     BFE_UINT T34.Y, T22.Z, literal.y, T1.W,
; EG-NEXT:     ADD_INT * T35.X, T24.X, literal.z,
; EG-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; EG-NEXT:    28(3.923636e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T36.Z, T30.Y, literal.x, T1.W,
; EG-NEXT:     LSHR * T34.W, T22.Z, literal.y,
; EG-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; EG-NEXT:     AND_INT T34.X, T22.Z, literal.x,
; EG-NEXT:     BFE_UINT T36.Y, T30.Y, literal.y, T1.W,
; EG-NEXT:     ADD_INT * T37.X, T24.X, literal.z,
; EG-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T38.Z, T30.X, literal.x, T1.W,
; EG-NEXT:     LSHR * T36.W, T30.Y, literal.y,
; EG-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; EG-NEXT:     AND_INT T36.X, T30.Y, literal.x,
; EG-NEXT:     BFE_UINT T38.Y, T30.X, literal.y, T1.W,
; EG-NEXT:     ADD_INT * T39.X, T24.X, literal.z,
; EG-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; EG-NEXT:    36(5.044674e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T40.Z, T30.W, literal.x, T1.W,
; EG-NEXT:     LSHR * T38.W, T30.X, literal.y,
; EG-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; EG-NEXT:     AND_INT T38.X, T30.X, literal.x,
; EG-NEXT:     BFE_UINT T40.Y, T30.W, literal.y, T1.W,
; EG-NEXT:     ADD_INT * T30.X, T24.X, literal.z,
; EG-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; EG-NEXT:    32(4.484155e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T41.Z, T30.Z, literal.x, T1.W,
; EG-NEXT:     LSHR * T40.W, T30.W, literal.y,
; EG-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; EG-NEXT:     AND_INT T40.X, T30.W, literal.x,
; EG-NEXT:     BFE_UINT T41.Y, T30.Z, literal.y, T1.W,
; EG-NEXT:     ADD_INT * T42.X, T24.X, literal.z,
; EG-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; EG-NEXT:    44(6.165713e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T43.Z, T29.Y, literal.x, T1.W,
; EG-NEXT:     LSHR * T41.W, T30.Z, literal.y,
; EG-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; EG-NEXT:     AND_INT T41.X, T30.Z, literal.x,
; EG-NEXT:     BFE_UINT T43.Y, T29.Y, literal.y, T1.W,
; EG-NEXT:     ADD_INT * T44.X, T24.X, literal.z,
; EG-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; EG-NEXT:    40(5.605194e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T45.Z, T29.X, literal.x, T1.W,
; EG-NEXT:     LSHR * T43.W, T29.Y, literal.y,
; EG-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; EG-NEXT:     AND_INT T43.X, T29.Y, literal.x,
; EG-NEXT:     BFE_UINT T45.Y, T29.X, literal.y, T1.W,
; EG-NEXT:     ADD_INT * T46.X, T24.X, literal.z,
; EG-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; EG-NEXT:    52(7.286752e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T47.Z, T29.W, literal.x, T1.W,
; EG-NEXT:     LSHR * T45.W, T29.X, literal.y,
; EG-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; EG-NEXT:     AND_INT T45.X, T29.X, literal.x,
; EG-NEXT:     BFE_UINT T47.Y, T29.W, literal.y, T1.W,
; EG-NEXT:     ADD_INT * T29.X, T24.X, literal.z,
; EG-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; EG-NEXT:    48(6.726233e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T48.Z, T29.Z, literal.x, T1.W,
; EG-NEXT:     LSHR * T47.W, T29.W, literal.y,
; EG-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; EG-NEXT:     AND_INT T47.X, T29.W, literal.x,
; EG-NEXT:     BFE_UINT T48.Y, T29.Z, literal.y, T1.W,
; EG-NEXT:     ADD_INT * T49.X, T24.X, literal.z,
; EG-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; EG-NEXT:    60(8.407791e-44), 0(0.000000e+00)
; EG-NEXT:     LSHR * T48.W, T29.Z, literal.x,
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T48.X, T29.Z, literal.x,
; EG-NEXT:     ADD_INT * T50.X, T24.X, literal.y,
; EG-NEXT:    255(3.573311e-43), 56(7.847271e-44)
;
; CM-LABEL: global_zextload_v64i8_to_v64i32:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 2, @30, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 1 @22
; CM-NEXT:    ALU 36, @33, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 1 @26
; CM-NEXT:    ALU 91, @70, KC0[], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T49, T30.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T48, T24.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T46, T50.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T44, T47.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T43, T45.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T41, T31.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T39, T42.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T37, T40.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T36, T38.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T34, T20.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T32, T35.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T29, T33.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T28, T0.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T26, T21.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T23, T27.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T22, T25.X
; CM-NEXT:    CF_END
; CM-NEXT:    Fetch clause starting at 22:
; CM-NEXT:     VTX_READ_128 T20.XYZW, T0.X, 32, #1
; CM-NEXT:     VTX_READ_128 T21.XYZW, T0.X, 48, #1
; CM-NEXT:    Fetch clause starting at 26:
; CM-NEXT:     VTX_READ_128 T30.XYZW, T0.X, 0, #1
; CM-NEXT:     VTX_READ_128 T31.XYZW, T0.X, 16, #1
; CM-NEXT:    ALU clause starting at 30:
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x,
; CM-NEXT:    6(8.407791e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 33:
; CM-NEXT:     MOV * T0.W, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT * T22.Z, T21.Z, literal.x, PV.W,
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT T22.Y, T21.Z, literal.x, T0.W,
; CM-NEXT:     LSHR * T22.W, T21.Z, literal.y,
; CM-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; CM-NEXT:     AND_INT T22.X, T21.Z, literal.x,
; CM-NEXT:     BFE_UINT * T23.Z, T21.W, literal.y, T0.W,
; CM-NEXT:    255(3.573311e-43), 16(2.242078e-44)
; CM-NEXT:     LSHR T24.X, KC0[2].Y, literal.x,
; CM-NEXT:     BFE_UINT * T23.Y, T21.W, literal.y, T0.W,
; CM-NEXT:    2(2.802597e-45), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T25.X, PV.X, literal.x,
; CM-NEXT:     BFE_UINT T26.Z, T21.X, literal.y, T0.W,
; CM-NEXT:     LSHR * T23.W, T21.W, literal.z,
; CM-NEXT:    56(7.847271e-44), 16(2.242078e-44)
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T23.X, T21.W, literal.x,
; CM-NEXT:     BFE_UINT * T26.Y, T21.X, literal.y, T0.W,
; CM-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T27.X, T24.X, literal.x,
; CM-NEXT:     BFE_UINT T28.Z, T21.Y, literal.y, T0.W,
; CM-NEXT:     LSHR * T26.W, T21.X, literal.z, BS:VEC_120/SCL_212
; CM-NEXT:    60(8.407791e-44), 16(2.242078e-44)
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T26.X, T21.X, literal.x,
; CM-NEXT:     BFE_UINT * T28.Y, T21.Y, literal.y, T0.W,
; CM-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T21.X, T24.X, literal.x,
; CM-NEXT:     BFE_UINT T29.Z, T20.Z, literal.y, T0.W,
; CM-NEXT:     LSHR * T28.W, T21.Y, literal.z,
; CM-NEXT:    48(6.726233e-44), 16(2.242078e-44)
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T28.X, T21.Y, literal.x,
; CM-NEXT:     BFE_UINT * T29.Y, T20.Z, literal.y, T0.W,
; CM-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; CM-NEXT:    ALU clause starting at 70:
; CM-NEXT:     ADD_INT T0.X, T24.X, literal.x,
; CM-NEXT:     BFE_UINT T32.Z, T20.W, literal.y, T0.W,
; CM-NEXT:     LSHR * T29.W, T20.Z, literal.z,
; CM-NEXT:    52(7.286752e-44), 16(2.242078e-44)
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T29.X, T20.Z, literal.x,
; CM-NEXT:     BFE_UINT * T32.Y, T20.W, literal.y, T0.W,
; CM-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T33.X, T24.X, literal.x,
; CM-NEXT:     BFE_UINT T34.Z, T20.X, literal.y, T0.W, BS:VEC_120/SCL_212
; CM-NEXT:     LSHR * T32.W, T20.W, literal.z, BS:VEC_120/SCL_212
; CM-NEXT:    40(5.605194e-44), 16(2.242078e-44)
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T32.X, T20.W, literal.x,
; CM-NEXT:     BFE_UINT * T34.Y, T20.X, literal.y, T0.W,
; CM-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T35.X, T24.X, literal.x,
; CM-NEXT:     BFE_UINT T36.Z, T20.Y, literal.y, T0.W,
; CM-NEXT:     LSHR * T34.W, T20.X, literal.z, BS:VEC_120/SCL_212
; CM-NEXT:    44(6.165713e-44), 16(2.242078e-44)
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T34.X, T20.X, literal.x,
; CM-NEXT:     BFE_UINT * T36.Y, T20.Y, literal.y, T0.W,
; CM-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T20.X, T24.X, literal.x,
; CM-NEXT:     BFE_UINT T37.Z, T31.Z, literal.y, T0.W,
; CM-NEXT:     LSHR * T36.W, T20.Y, literal.z,
; CM-NEXT:    32(4.484155e-44), 16(2.242078e-44)
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T36.X, T20.Y, literal.x,
; CM-NEXT:     BFE_UINT * T37.Y, T31.Z, literal.y, T0.W,
; CM-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T38.X, T24.X, literal.x,
; CM-NEXT:     BFE_UINT T39.Z, T31.W, literal.y, T0.W,
; CM-NEXT:     LSHR * T37.W, T31.Z, literal.z,
; CM-NEXT:    36(5.044674e-44), 16(2.242078e-44)
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T37.X, T31.Z, literal.x,
; CM-NEXT:     BFE_UINT * T39.Y, T31.W, literal.y, T0.W,
; CM-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T40.X, T24.X, literal.x,
; CM-NEXT:     BFE_UINT T41.Z, T31.X, literal.y, T0.W, BS:VEC_120/SCL_212
; CM-NEXT:     LSHR * T39.W, T31.W, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:    24(3.363116e-44), 16(2.242078e-44)
; CM-NEXT:     AND_INT T39.X, T31.W, literal.x,
; CM-NEXT:     BFE_UINT * T41.Y, T31.X, literal.y, T0.W,
; CM-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T42.X, T24.X, literal.x,
; CM-NEXT:     BFE_UINT T43.Z, T31.Y, literal.y, T0.W,
; CM-NEXT:     LSHR * T41.W, T31.X, literal.z, BS:VEC_120/SCL_212
; CM-NEXT:    28(3.923636e-44), 16(2.242078e-44)
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T41.X, T31.X, literal.x,
; CM-NEXT:     BFE_UINT * T43.Y, T31.Y, literal.y, T0.W,
; CM-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T31.X, T24.X, literal.x,
; CM-NEXT:     BFE_UINT T44.Z, T30.Z, literal.x, T0.W,
; CM-NEXT:     LSHR * T43.W, T31.Y, literal.y,
; CM-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; CM-NEXT:     AND_INT T43.X, T31.Y, literal.x,
; CM-NEXT:     BFE_UINT * T44.Y, T30.Z, literal.y, T0.W,
; CM-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T45.X, T24.X, literal.x,
; CM-NEXT:     BFE_UINT T46.Z, T30.W, literal.y, T0.W,
; CM-NEXT:     LSHR * T44.W, T30.Z, literal.z,
; CM-NEXT:    20(2.802597e-44), 16(2.242078e-44)
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T44.X, T30.Z, literal.x,
; CM-NEXT:     BFE_UINT * T46.Y, T30.W, literal.y, T0.W,
; CM-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T47.X, T24.X, literal.x,
; CM-NEXT:     BFE_UINT T48.Z, T30.X, literal.y, T0.W, BS:VEC_120/SCL_212
; CM-NEXT:     LSHR * T46.W, T30.W, literal.z, BS:VEC_120/SCL_212
; CM-NEXT:    8(1.121039e-44), 16(2.242078e-44)
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T46.X, T30.W, literal.x,
; CM-NEXT:     BFE_UINT T48.Y, T30.X, literal.y, T0.W,
; CM-NEXT:     BFE_UINT * T49.Z, T30.Y, literal.z, T0.W,
; CM-NEXT:    255(3.573311e-43), 8(1.121039e-44)
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT T50.X, T24.X, literal.x,
; CM-NEXT:     BFE_UINT T49.Y, T30.Y, literal.y, T0.W,
; CM-NEXT:     LSHR * T48.W, T30.X, literal.z, BS:VEC_120/SCL_212
; CM-NEXT:    12(1.681558e-44), 8(1.121039e-44)
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T48.X, T30.X, literal.x,
; CM-NEXT:     LSHR * T49.W, T30.Y, literal.y,
; CM-NEXT:    255(3.573311e-43), 24(3.363116e-44)
; CM-NEXT:     AND_INT * T49.X, T30.Y, literal.x,
; CM-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T30.X, T24.X, literal.x,
; CM-NEXT:    4(5.605194e-45), 0(0.000000e+00)
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <64 x i8>, ptr addrspace(1) %in, i32 %tid
  %load = load <64 x i8>, ptr addrspace(1) %in.tid
  %ext = zext <64 x i8> %load to <64 x i32>
  store <64 x i32> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_sextload_v64i8_to_v64i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_sextload_v64i8_to_v64i32:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s12, SCRATCH_RSRC_DWORD0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s13, SCRATCH_RSRC_DWORD1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s14, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s15, 0xe8f000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-SI-NEXT:    s_add_u32 s12, s12, s11
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s3
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[6:7]
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v0, 6, v0
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx4 v[10:13], v[0:1], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx4 v[26:29], v[0:1], s[8:11], 0 addr64 offset:16
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx4 v[32:35], v[0:1], s[8:11], 0 addr64 offset:32
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx4 v[36:39], v[0:1], s[8:11], 0 addr64 offset:48
; GCN-NOHSA-SI-NEXT:    s_addc_u32 s13, s13, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(3)
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v3, 24, v11
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v2, v11, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v1, v11, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v0, v11, 0, 8
; GCN-NOHSA-SI-NEXT:    buffer_store_dword v0, off, s[12:15], 0 ; 4-byte Folded Spill
; GCN-NOHSA-SI-NEXT:    buffer_store_dword v1, off, s[12:15], 0 offset:4 ; 4-byte Folded Spill
; GCN-NOHSA-SI-NEXT:    buffer_store_dword v2, off, s[12:15], 0 offset:8 ; 4-byte Folded Spill
; GCN-NOHSA-SI-NEXT:    buffer_store_dword v3, off, s[12:15], 0 offset:12 ; 4-byte Folded Spill
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(4) expcnt(0)
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v3, 24, v38
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v2, v38, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v1, v38, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v0, v38, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v7, 24, v10
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v6, v10, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v5, v10, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v4, v10, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v11, 24, v13
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v10, v13, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v9, v13, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v8, v13, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v15, 24, v12
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v14, v12, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v13, v12, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v12, v12, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v19, 24, v27
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v18, v27, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v17, v27, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v16, v27, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v23, 24, v26
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v22, v26, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v21, v26, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v20, v26, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v27, 24, v29
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v26, v29, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v25, v29, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v24, v29, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v31, 24, v28
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v30, v28, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v29, v28, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v28, v28, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v43, 24, v33
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v42, v33, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v41, v33, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v40, v33, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v47, 24, v32
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v46, v32, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v45, v32, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v44, v32, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v51, 24, v35
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v50, v35, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v49, v35, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v48, v35, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v55, 24, v34
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v54, v34, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v53, v34, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v52, v34, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v35, 24, v37
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v34, v37, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v33, v37, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v32, v37, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v59, 24, v36
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v58, v36, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v57, v36, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v56, v36, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v63, 24, v39
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v62, v39, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v61, v39, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v60, v39, 0, 8
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:224
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[60:63], off, s[0:3], 0 offset:240
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[56:59], off, s[0:3], 0 offset:192
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[32:35], off, s[0:3], 0 offset:208
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[52:55], off, s[0:3], 0 offset:160
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[48:51], off, s[0:3], 0 offset:176
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[44:47], off, s[0:3], 0 offset:128
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[40:43], off, s[0:3], 0 offset:144
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:96
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:112
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:64
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:80
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:32
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:48
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dword v0, off, s[12:15], 0 ; 4-byte Folded Reload
; GCN-NOHSA-SI-NEXT:    buffer_load_dword v1, off, s[12:15], 0 offset:4 ; 4-byte Folded Reload
; GCN-NOHSA-SI-NEXT:    buffer_load_dword v2, off, s[12:15], 0 offset:8 ; 4-byte Folded Reload
; GCN-NOHSA-SI-NEXT:    buffer_load_dword v3, off, s[12:15], 0 offset:12 ; 4-byte Folded Reload
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_sextload_v64i8_to_v64i32:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 6, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v4, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dwordx4 v[12:15], v[4:5]
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, 48, v4
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v5, vcc
; GCN-HSA-NEXT:    flat_load_dwordx4 v[8:11], v[0:1]
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, 16, v4
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v5, vcc
; GCN-HSA-NEXT:    v_add_i32_e32 v4, vcc, 32, v4
; GCN-HSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
; GCN-HSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCN-HSA-NEXT:    flat_load_dwordx4 v[4:7], v[4:5]
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 32
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v21, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v20, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 48
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(3)
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v19, 24, v14
; GCN-HSA-NEXT:    v_bfe_i32 v18, v14, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v17, v14, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v16, v14, 0, 8
; GCN-HSA-NEXT:    flat_store_dwordx4 v[20:21], v[16:19]
; GCN-HSA-NEXT:    v_mov_b32_e32 v20, s3
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v18, 24, v15
; GCN-HSA-NEXT:    v_bfe_i32 v17, v15, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v16, v15, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v15, v15, 0, 8
; GCN-HSA-NEXT:    v_mov_b32_e32 v19, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 16
; GCN-HSA-NEXT:    flat_store_dwordx4 v[19:20], v[15:18]
; GCN-HSA-NEXT:    v_bfe_i32 v14, v12, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v17, 24, v12
; GCN-HSA-NEXT:    v_bfe_i32 v16, v12, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v15, v12, 8, 8
; GCN-HSA-NEXT:    v_mov_b32_e32 v19, s1
; GCN-HSA-NEXT:    v_mov_b32_e32 v18, s0
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[18:19], v[14:17]
; GCN-HSA-NEXT:    v_mov_b32_e32 v18, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v17, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0xe0
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v20, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v19, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0xf0
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v16, 24, v13
; GCN-HSA-NEXT:    v_bfe_i32 v15, v13, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v14, v13, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v13, v13, 0, 8
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[17:18], v[13:16]
; GCN-HSA-NEXT:    v_mov_b32_e32 v17, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0xc0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(6)
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v15, 24, v10
; GCN-HSA-NEXT:    v_bfe_i32 v14, v10, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v13, v10, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v12, v10, 0, 8
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[19:20], v[12:15]
; GCN-HSA-NEXT:    v_bfe_i32 v10, v8, 16, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v14, 24, v11
; GCN-HSA-NEXT:    v_bfe_i32 v13, v11, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v12, v11, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v11, v11, 0, 8
; GCN-HSA-NEXT:    flat_store_dwordx4 v[16:17], v[11:14]
; GCN-HSA-NEXT:    v_mov_b32_e32 v17, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0xd0
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v19, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v18, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0xa0
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v15, 24, v9
; GCN-HSA-NEXT:    v_bfe_i32 v14, v9, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v13, v9, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v12, v9, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v11, 24, v8
; GCN-HSA-NEXT:    v_bfe_i32 v9, v8, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v8, v8, 0, 8
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[16:17], v[8:11]
; GCN-HSA-NEXT:    v_mov_b32_e32 v17, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0xb0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[18:19], v[12:15]
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(8)
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v15, 24, v6
; GCN-HSA-NEXT:    v_bfe_i32 v14, v6, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v13, v6, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v12, v6, 0, 8
; GCN-HSA-NEXT:    flat_store_dwordx4 v[16:17], v[12:15]
; GCN-HSA-NEXT:    v_mov_b32_e32 v6, s2
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v15, 24, v7
; GCN-HSA-NEXT:    v_bfe_i32 v14, v7, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v13, v7, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v12, v7, 0, 8
; GCN-HSA-NEXT:    v_mov_b32_e32 v7, s3
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0x80
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[6:7], v[12:15]
; GCN-HSA-NEXT:    v_mov_b32_e32 v7, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v6, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0x90
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v15, 24, v4
; GCN-HSA-NEXT:    v_bfe_i32 v14, v4, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v13, v4, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v12, v4, 0, 8
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v11, 24, v1
; GCN-HSA-NEXT:    v_bfe_i32 v10, v1, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v9, v1, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v8, v1, 0, 8
; GCN-HSA-NEXT:    flat_store_dwordx4 v[6:7], v[12:15]
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v15, 24, v0
; GCN-HSA-NEXT:    v_bfe_i32 v14, v0, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v13, v0, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v12, v0, 0, 8
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0x60
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v19, 24, v5
; GCN-HSA-NEXT:    v_bfe_i32 v18, v5, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v17, v5, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v16, v5, 0, 8
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[0:1], v[16:19]
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0x70
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v19, 24, v2
; GCN-HSA-NEXT:    v_bfe_i32 v18, v2, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v17, v2, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v16, v2, 0, 8
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[0:1], v[16:19]
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 64
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v6, 24, v3
; GCN-HSA-NEXT:    v_bfe_i32 v5, v3, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v4, v3, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v3, v3, 0, 8
; GCN-HSA-NEXT:    s_add_u32 s0, s0, 0x50
; GCN-HSA-NEXT:    flat_store_dwordx4 v[0:1], v[3:6]
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[0:1], v[12:15]
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT:    flat_store_dwordx4 v[0:1], v[8:11]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_sextload_v64i8_to_v64i32:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 6, v0
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx4 v[12:15], v[0:1]
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v2, vcc, 48, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v3, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx4 v[8:11], v[2:3]
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v2, vcc, 32, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v3, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx4 v[4:7], v[2:3]
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v0, vcc, 16, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(3)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v16, 8, v14
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v17, v16, 0, 8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v19, 24, v14
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v18, v14, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v16, v14, 0, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v14, 8, v15
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:32
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(2)
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v21, 24, v6
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v16, v14, 0, 8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v18, 24, v15
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v17, v15, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v15, v15, 0, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v14, 8, v12
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[15:18], off, s[0:3], 0 offset:48
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v20, v6, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v15, v14, 0, 8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v17, 24, v12
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v16, v12, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v14, v12, 0, 8
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[14:17], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v12, v13, 0, 8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v15, 24, v13
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v14, v13, 16, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v13, 8, v13
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v16, 8, v10
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v13, v13, 0, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v17, 8, v11
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:16
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v18, 8, v6
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v15, 24, v10
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v14, v10, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v12, v10, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v13, v16, 0, 8
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:224
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v10, v9, 0, 8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v13, 24, v9
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v12, v9, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v15, v17, 0, 8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v17, 24, v11
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v16, v11, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v14, v11, 0, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v9, 8, v9
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:240
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v11, v9, 0, 8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v17, 24, v8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v16, v8, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v14, v8, 0, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v8, 8, v8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v19, v18, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v18, v6, 0, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v6, 8, v7
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v9, 8, v4
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v15, v8, 0, 8
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:208
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v8, v4, 0, 8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v11, 24, v4
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v10, v4, 16, 8
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[18:21], off, s[0:3], 0 offset:160
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v12, 8, v5
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v21, 24, v7
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v20, v7, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v18, v7, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v19, v6, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v9, v9, 0, 8
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:192
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[18:21], off, s[0:3], 0 offset:176
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v17, 24, v5
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v16, v5, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v14, v5, 0, 8
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(10)
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v7, 24, v1
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v6, v1, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v4, v1, 0, 8
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:128
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v21, 24, v3
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v11, 24, v0
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v10, v0, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v8, v0, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v20, v3, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v18, v3, 0, 8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v25, 24, v2
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v24, v2, 16, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v22, v2, 0, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v2, 8, v2
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v3, 8, v3
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v0, 8, v0
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v1, 8, v1
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v15, v12, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v5, v1, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v9, v0, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v19, v3, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v23, v2, 0, 8
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:144
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[22:25], off, s[0:3], 0 offset:96
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[18:21], off, s[0:3], 0 offset:112
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:64
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:80
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_sextload_v64i8_to_v64i32:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @32, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @24
; EG-NEXT:    ALU 16, @35, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 2 @26
; EG-NEXT:    ALU 76, @52, KC0[], KC1[]
; EG-NEXT:    ALU 71, @129, KC0[], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T48.XYZW, T50.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T47.XYZW, T49.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T46.XYZW, T0.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T20.XYZW, T35.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T45.XYZW, T34.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T44.XYZW, T33.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T43.XYZW, T32.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T30.XYZW, T31.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T42.XYZW, T28.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T41.XYZW, T27.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T40.XYZW, T26.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T29.XYZW, T25.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T39.XYZW, T24.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T38.XYZW, T23.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T37.XYZW, T21.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T36.XYZW, T22.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 24:
; EG-NEXT:     VTX_READ_128 T0.XYZW, T20.X, 48, #1
; EG-NEXT:    Fetch clause starting at 26:
; EG-NEXT:     VTX_READ_128 T29.XYZW, T20.X, 0, #1
; EG-NEXT:     VTX_READ_128 T30.XYZW, T20.X, 16, #1
; EG-NEXT:     VTX_READ_128 T20.XYZW, T20.X, 32, #1
; EG-NEXT:    ALU clause starting at 32:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    6(8.407791e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T20.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 35:
; EG-NEXT:     LSHR * T21.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T22.X, PV.X, literal.x,
; EG-NEXT:     ADD_INT * T23.X, PV.X, literal.y,
; EG-NEXT:    4(5.605194e-45), 12(1.681558e-44)
; EG-NEXT:     ADD_INT T24.X, T21.X, literal.x,
; EG-NEXT:     ADD_INT * T25.X, T21.X, literal.y,
; EG-NEXT:    8(1.121039e-44), 20(2.802597e-44)
; EG-NEXT:     ADD_INT T26.X, T21.X, literal.x,
; EG-NEXT:     ADD_INT * T27.X, T21.X, literal.y,
; EG-NEXT:    16(2.242078e-44), 28(3.923636e-44)
; EG-NEXT:     ADD_INT T28.X, T21.X, literal.x,
; EG-NEXT:     LSHR T1.Y, T0.Z, literal.y,
; EG-NEXT:     LSHR T1.Z, T0.Z, literal.x,
; EG-NEXT:     LSHR T1.W, T0.W, literal.y,
; EG-NEXT:     LSHR * T2.W, T0.W, literal.x,
; EG-NEXT:    24(3.363116e-44), 16(2.242078e-44)
; EG-NEXT:    ALU clause starting at 52:
; EG-NEXT:     ADD_INT T31.X, T21.X, literal.x,
; EG-NEXT:     LSHR T2.Y, T0.X, literal.y, BS:VEC_120/SCL_212
; EG-NEXT:     LSHR T2.Z, T0.X, literal.z, BS:VEC_120/SCL_212
; EG-NEXT:     LSHR T3.W, T0.Y, literal.y,
; EG-NEXT:     LSHR * T4.W, T0.Y, literal.z,
; EG-NEXT:    36(5.044674e-44), 16(2.242078e-44)
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T32.X, T21.X, literal.x,
; EG-NEXT:     LSHR T3.Y, T20.Z, literal.y,
; EG-NEXT:     LSHR T3.Z, T20.Z, literal.z,
; EG-NEXT:     LSHR T5.W, T20.W, literal.y,
; EG-NEXT:     LSHR * T6.W, T20.W, literal.z,
; EG-NEXT:    32(4.484155e-44), 16(2.242078e-44)
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T33.X, T21.X, literal.x,
; EG-NEXT:     LSHR T4.Y, T20.X, literal.y, BS:VEC_120/SCL_212
; EG-NEXT:     LSHR T4.Z, T20.X, literal.z, BS:VEC_120/SCL_212
; EG-NEXT:     LSHR T7.W, T20.Y, literal.y,
; EG-NEXT:     LSHR * T8.W, T20.Y, literal.z,
; EG-NEXT:    44(6.165713e-44), 16(2.242078e-44)
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T34.X, T21.X, literal.x,
; EG-NEXT:     LSHR T5.Y, T30.Z, literal.y,
; EG-NEXT:     LSHR T5.Z, T30.Z, literal.z,
; EG-NEXT:     LSHR T9.W, T30.W, literal.y,
; EG-NEXT:     LSHR * T10.W, T30.W, literal.z,
; EG-NEXT:    40(5.605194e-44), 16(2.242078e-44)
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T35.X, T21.X, literal.x,
; EG-NEXT:     LSHR T6.Y, T30.X, literal.y, BS:VEC_120/SCL_212
; EG-NEXT:     LSHR T6.Z, T30.X, literal.z, BS:VEC_120/SCL_212
; EG-NEXT:     LSHR T11.W, T30.Y, literal.y,
; EG-NEXT:     LSHR * T12.W, T30.Y, literal.z,
; EG-NEXT:    52(7.286752e-44), 16(2.242078e-44)
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T36.X, T29.Y, 0.0, literal.x,
; EG-NEXT:     LSHR T7.Y, T29.Z, literal.y,
; EG-NEXT:     LSHR T7.Z, T29.Z, literal.z,
; EG-NEXT:     LSHR T13.W, T29.W, literal.y,
; EG-NEXT:     LSHR * T14.W, T29.Y, literal.z,
; EG-NEXT:    8(1.121039e-44), 16(2.242078e-44)
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T37.X, T29.X, 0.0, literal.x,
; EG-NEXT:     LSHR T8.Y, T29.W, literal.y,
; EG-NEXT:     LSHR T8.Z, T29.X, literal.y,
; EG-NEXT:     BFE_INT T36.W, PS, 0.0, literal.x,
; EG-NEXT:     LSHR * T14.W, T29.Y, literal.z,
; EG-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T38.X, T29.W, 0.0, literal.x,
; EG-NEXT:     LSHR T9.Y, T29.X, literal.y,
; EG-NEXT:     BFE_INT T36.Z, PS, 0.0, literal.x,
; EG-NEXT:     BFE_INT T37.W, PV.Z, 0.0, literal.x,
; EG-NEXT:     LSHR * T14.W, T29.Y, literal.x,
; EG-NEXT:    8(1.121039e-44), 16(2.242078e-44)
; EG-NEXT:     BFE_INT T39.X, T29.Z, 0.0, literal.x,
; EG-NEXT:     BFE_INT T36.Y, PS, 0.0, literal.x,
; EG-NEXT:     BFE_INT T37.Z, PV.Y, 0.0, literal.x,
; EG-NEXT:     BFE_INT T38.W, T8.Y, 0.0, literal.x,
; EG-NEXT:     LSHR * T14.W, T29.X, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T29.X, T30.Y, 0.0, literal.x,
; EG-NEXT:     BFE_INT T37.Y, PS, 0.0, literal.x,
; EG-NEXT:     BFE_INT T38.Z, T13.W, 0.0, literal.x,
; EG-NEXT:     BFE_INT T39.W, T7.Z, 0.0, literal.x,
; EG-NEXT:     LSHR * T13.W, T29.W, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T40.X, T30.X, 0.0, literal.x,
; EG-NEXT:     BFE_INT T38.Y, PS, 0.0, literal.x,
; EG-NEXT:     BFE_INT T39.Z, T7.Y, 0.0, literal.x,
; EG-NEXT:     BFE_INT T29.W, T12.W, 0.0, literal.x,
; EG-NEXT:     LSHR * T12.W, T29.Z, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T41.X, T30.W, 0.0, literal.x,
; EG-NEXT:     BFE_INT T39.Y, PS, 0.0, literal.x,
; EG-NEXT:     BFE_INT * T29.Z, T11.W, 0.0, literal.x, BS:VEC_120/SCL_212
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:    ALU clause starting at 129:
; EG-NEXT:     BFE_INT T40.W, T6.Z, 0.0, literal.x,
; EG-NEXT:     LSHR * T11.W, T30.Y, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T42.X, T30.Z, 0.0, literal.x,
; EG-NEXT:     BFE_INT T29.Y, PS, 0.0, literal.x,
; EG-NEXT:     BFE_INT T40.Z, T6.Y, 0.0, literal.x,
; EG-NEXT:     BFE_INT T41.W, T10.W, 0.0, literal.x,
; EG-NEXT:     LSHR * T10.W, T30.X, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T30.X, T20.Y, 0.0, literal.x,
; EG-NEXT:     BFE_INT T40.Y, PS, 0.0, literal.x,
; EG-NEXT:     BFE_INT T41.Z, T9.W, 0.0, literal.x,
; EG-NEXT:     BFE_INT T42.W, T5.Z, 0.0, literal.x,
; EG-NEXT:     LSHR * T9.W, T30.W, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T43.X, T20.X, 0.0, literal.x,
; EG-NEXT:     BFE_INT T41.Y, PS, 0.0, literal.x,
; EG-NEXT:     BFE_INT T42.Z, T5.Y, 0.0, literal.x,
; EG-NEXT:     BFE_INT T30.W, T8.W, 0.0, literal.x,
; EG-NEXT:     LSHR * T8.W, T30.Z, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T44.X, T20.W, 0.0, literal.x,
; EG-NEXT:     BFE_INT T42.Y, PS, 0.0, literal.x,
; EG-NEXT:     BFE_INT T30.Z, T7.W, 0.0, literal.x, BS:VEC_120/SCL_212
; EG-NEXT:     BFE_INT T43.W, T4.Z, 0.0, literal.x,
; EG-NEXT:     LSHR * T7.W, T20.Y, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T45.X, T20.Z, 0.0, literal.x,
; EG-NEXT:     BFE_INT T30.Y, PS, 0.0, literal.x,
; EG-NEXT:     BFE_INT T43.Z, T4.Y, 0.0, literal.x,
; EG-NEXT:     BFE_INT T44.W, T6.W, 0.0, literal.x,
; EG-NEXT:     LSHR * T6.W, T20.X, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T20.X, T0.Y, 0.0, literal.x,
; EG-NEXT:     BFE_INT T43.Y, PS, 0.0, literal.x,
; EG-NEXT:     BFE_INT T44.Z, T5.W, 0.0, literal.x,
; EG-NEXT:     BFE_INT T45.W, T3.Z, 0.0, literal.x,
; EG-NEXT:     LSHR * T5.W, T20.W, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T46.X, T0.X, 0.0, literal.x,
; EG-NEXT:     BFE_INT T44.Y, PS, 0.0, literal.x,
; EG-NEXT:     BFE_INT T45.Z, T3.Y, 0.0, literal.x,
; EG-NEXT:     BFE_INT T20.W, T4.W, 0.0, literal.x,
; EG-NEXT:     LSHR * T4.W, T20.Z, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T47.X, T0.W, 0.0, literal.x,
; EG-NEXT:     BFE_INT T45.Y, PS, 0.0, literal.x,
; EG-NEXT:     BFE_INT T20.Z, T3.W, 0.0, literal.x, BS:VEC_120/SCL_212
; EG-NEXT:     BFE_INT T46.W, T2.Z, 0.0, literal.x,
; EG-NEXT:     LSHR * T3.W, T0.Y, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T48.X, T0.Z, 0.0, literal.x,
; EG-NEXT:     BFE_INT T20.Y, PS, 0.0, literal.x,
; EG-NEXT:     BFE_INT T46.Z, T2.Y, 0.0, literal.x,
; EG-NEXT:     BFE_INT T47.W, T2.W, 0.0, literal.x,
; EG-NEXT:     LSHR * T2.W, T0.X, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T0.X, T21.X, literal.x,
; EG-NEXT:     BFE_INT T46.Y, PS, 0.0, literal.y,
; EG-NEXT:     BFE_INT T47.Z, T1.W, 0.0, literal.y,
; EG-NEXT:     BFE_INT T48.W, T1.Z, 0.0, literal.y,
; EG-NEXT:     LSHR * T0.W, T0.W, literal.y,
; EG-NEXT:    48(6.726233e-44), 8(1.121039e-44)
; EG-NEXT:     ADD_INT T49.X, T21.X, literal.x,
; EG-NEXT:     BFE_INT T47.Y, PS, 0.0, literal.y,
; EG-NEXT:     BFE_INT T48.Z, T1.Y, 0.0, literal.y,
; EG-NEXT:     LSHR T0.W, T0.Z, literal.y,
; EG-NEXT:     ADD_INT * T50.X, T21.X, literal.z,
; EG-NEXT:    60(8.407791e-44), 8(1.121039e-44)
; EG-NEXT:    56(7.847271e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT * T48.Y, PV.W, 0.0, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
;
; CM-LABEL: global_sextload_v64i8_to_v64i32:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 2, @32, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @24
; CM-NEXT:    ALU 17, @35, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 2 @26
; CM-NEXT:    ALU 84, @53, KC0[], KC1[]
; CM-NEXT:    ALU 72, @138, KC0[], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0, T50.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T47, T21.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T46, T49.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T45, T48.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T44, T35.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T20, T34.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T43, T33.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T42, T32.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T41, T31.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T25, T30.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T40, T29.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T39, T28.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T38, T27.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T24, T26.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T37, T23.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T36, T22.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 24:
; CM-NEXT:     VTX_READ_128 T0.XYZW, T20.X, 0, #1
; CM-NEXT:    Fetch clause starting at 26:
; CM-NEXT:     VTX_READ_128 T24.XYZW, T20.X, 48, #1
; CM-NEXT:     VTX_READ_128 T25.XYZW, T20.X, 32, #1
; CM-NEXT:     VTX_READ_128 T20.XYZW, T20.X, 16, #1
; CM-NEXT:    ALU clause starting at 32:
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x,
; CM-NEXT:    6(8.407791e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T20.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 35:
; CM-NEXT:     LSHR T21.X, KC0[2].Y, literal.x,
; CM-NEXT:     LSHR T1.Y, T0.Y, literal.y,
; CM-NEXT:     LSHR T1.Z, T0.X, literal.z,
; CM-NEXT:     LSHR * T1.W, T0.Y, literal.w,
; CM-NEXT:    2(2.802597e-45), 16(2.242078e-44)
; CM-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; CM-NEXT:     ADD_INT T22.X, PV.X, literal.x,
; CM-NEXT:     LSHR T2.Y, T0.X, literal.y,
; CM-NEXT:     LSHR T2.Z, T0.W, literal.z,
; CM-NEXT:     LSHR * T2.W, T0.X, literal.w,
; CM-NEXT:    56(7.847271e-44), 16(2.242078e-44)
; CM-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; CM-NEXT:     ADD_INT T23.X, T21.X, literal.x,
; CM-NEXT:     LSHR T3.Y, T0.W, literal.y,
; CM-NEXT:     LSHR T3.Z, T0.Z, literal.z,
; CM-NEXT:     LSHR * T3.W, T0.W, literal.w,
; CM-NEXT:    60(8.407791e-44), 16(2.242078e-44)
; CM-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; CM-NEXT:    ALU clause starting at 53:
; CM-NEXT:     LSHR T4.Z, T0.Z, literal.x,
; CM-NEXT:     LSHR * T4.W, T20.Y, literal.y,
; CM-NEXT:    16(2.242078e-44), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T26.X, T21.X, literal.x,
; CM-NEXT:     LSHR T4.Y, T0.Z, literal.y,
; CM-NEXT:     LSHR T5.Z, T20.Y, literal.z,
; CM-NEXT:     LSHR * T5.W, T20.X, literal.w, BS:VEC_120/SCL_212
; CM-NEXT:    48(6.726233e-44), 24(3.363116e-44)
; CM-NEXT:    16(2.242078e-44), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T27.X, T21.X, literal.x,
; CM-NEXT:     LSHR T5.Y, T20.Y, literal.y,
; CM-NEXT:     LSHR T6.Z, T20.X, literal.z, BS:VEC_120/SCL_212
; CM-NEXT:     LSHR * T6.W, T20.W, literal.w,
; CM-NEXT:    52(7.286752e-44), 24(3.363116e-44)
; CM-NEXT:    16(2.242078e-44), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T28.X, T21.X, literal.x,
; CM-NEXT:     LSHR T6.Y, T20.X, literal.y, BS:VEC_120/SCL_212
; CM-NEXT:     LSHR T7.Z, T20.W, literal.z,
; CM-NEXT:     LSHR * T7.W, T20.Z, literal.w,
; CM-NEXT:    40(5.605194e-44), 24(3.363116e-44)
; CM-NEXT:    16(2.242078e-44), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T29.X, T21.X, literal.x,
; CM-NEXT:     LSHR T7.Y, T20.W, literal.y,
; CM-NEXT:     LSHR T8.Z, T20.Z, literal.z,
; CM-NEXT:     LSHR * T8.W, T25.Y, literal.w,
; CM-NEXT:    44(6.165713e-44), 24(3.363116e-44)
; CM-NEXT:    16(2.242078e-44), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T30.X, T21.X, literal.x,
; CM-NEXT:     LSHR T8.Y, T20.Z, literal.y,
; CM-NEXT:     LSHR T9.Z, T25.Y, literal.z,
; CM-NEXT:     LSHR * T9.W, T25.X, literal.w, BS:VEC_120/SCL_212
; CM-NEXT:    32(4.484155e-44), 24(3.363116e-44)
; CM-NEXT:    16(2.242078e-44), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T31.X, T21.X, literal.x,
; CM-NEXT:     LSHR T9.Y, T25.Y, literal.y,
; CM-NEXT:     LSHR T10.Z, T25.X, literal.z, BS:VEC_120/SCL_212
; CM-NEXT:     LSHR * T10.W, T25.W, literal.w,
; CM-NEXT:    36(5.044674e-44), 24(3.363116e-44)
; CM-NEXT:    16(2.242078e-44), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T32.X, T21.X, literal.x,
; CM-NEXT:     LSHR T10.Y, T25.X, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:     LSHR T11.Z, T25.W, literal.y,
; CM-NEXT:     LSHR * T11.W, T25.Z, literal.z,
; CM-NEXT:    24(3.363116e-44), 16(2.242078e-44)
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT T33.X, T21.X, literal.x,
; CM-NEXT:     LSHR T11.Y, T25.W, literal.y,
; CM-NEXT:     LSHR T12.Z, T25.Z, literal.z,
; CM-NEXT:     LSHR * T12.W, T24.Y, literal.w,
; CM-NEXT:    28(3.923636e-44), 24(3.363116e-44)
; CM-NEXT:    16(2.242078e-44), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T34.X, T21.X, literal.x,
; CM-NEXT:     LSHR T12.Y, T25.Z, literal.y,
; CM-NEXT:     LSHR T13.Z, T24.Y, literal.x,
; CM-NEXT:     LSHR * T13.W, T24.X, literal.z, BS:VEC_120/SCL_212
; CM-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT T35.X, T21.X, literal.x,
; CM-NEXT:     LSHR T13.Y, T24.Y, literal.y,
; CM-NEXT:     LSHR T14.Z, T24.X, literal.z, BS:VEC_120/SCL_212
; CM-NEXT:     LSHR * T14.W, T24.W, literal.w,
; CM-NEXT:    20(2.802597e-44), 24(3.363116e-44)
; CM-NEXT:    16(2.242078e-44), 8(1.121039e-44)
; CM-NEXT:     BFE_INT T36.X, T24.Z, 0.0, literal.x,
; CM-NEXT:     LSHR T14.Y, T24.X, literal.y,
; CM-NEXT:     LSHR T15.Z, T24.W, literal.z,
; CM-NEXT:     LSHR * T15.W, T24.Z, literal.y,
; CM-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T37.X, T24.W, 0.0, literal.x,
; CM-NEXT:     LSHR T15.Y, T24.W, literal.y,
; CM-NEXT:     LSHR T16.Z, T24.Z, literal.z,
; CM-NEXT:     BFE_INT * T36.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T24.X, T24.X, 0.0, literal.x,
; CM-NEXT:     LSHR T16.Y, T24.Z, literal.x,
; CM-NEXT:     BFE_INT T36.Z, PV.Z, 0.0, literal.x,
; CM-NEXT:     BFE_INT * T37.W, PV.Y, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T38.X, T24.Y, 0.0, literal.x,
; CM-NEXT:     BFE_INT T36.Y, PV.Y, 0.0, literal.x,
; CM-NEXT:     BFE_INT T37.Z, T15.Z, 0.0, literal.x,
; CM-NEXT:     BFE_INT * T24.W, T14.Y, 0.0, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:    ALU clause starting at 138:
; CM-NEXT:     BFE_INT T39.X, T25.Z, 0.0, literal.x,
; CM-NEXT:     BFE_INT T37.Y, T14.W, 0.0, literal.x,
; CM-NEXT:     BFE_INT T24.Z, T14.Z, 0.0, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:     BFE_INT * T38.W, T13.Y, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T40.X, T25.W, 0.0, literal.x,
; CM-NEXT:     BFE_INT T24.Y, T13.W, 0.0, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:     BFE_INT T38.Z, T13.Z, 0.0, literal.x,
; CM-NEXT:     BFE_INT * T39.W, T12.Y, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T25.X, T25.X, 0.0, literal.x,
; CM-NEXT:     BFE_INT T38.Y, T12.W, 0.0, literal.x,
; CM-NEXT:     BFE_INT T39.Z, T12.Z, 0.0, literal.x,
; CM-NEXT:     BFE_INT * T40.W, T11.Y, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T41.X, T25.Y, 0.0, literal.x,
; CM-NEXT:     BFE_INT T39.Y, T11.W, 0.0, literal.x,
; CM-NEXT:     BFE_INT T40.Z, T11.Z, 0.0, literal.x,
; CM-NEXT:     BFE_INT * T25.W, T10.Y, 0.0, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T42.X, T20.Z, 0.0, literal.x,
; CM-NEXT:     BFE_INT T40.Y, T10.W, 0.0, literal.x,
; CM-NEXT:     BFE_INT T25.Z, T10.Z, 0.0, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:     BFE_INT * T41.W, T9.Y, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T43.X, T20.W, 0.0, literal.x,
; CM-NEXT:     BFE_INT T25.Y, T9.W, 0.0, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:     BFE_INT T41.Z, T9.Z, 0.0, literal.x,
; CM-NEXT:     BFE_INT * T42.W, T8.Y, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T20.X, T20.X, 0.0, literal.x,
; CM-NEXT:     BFE_INT T41.Y, T8.W, 0.0, literal.x,
; CM-NEXT:     BFE_INT T42.Z, T8.Z, 0.0, literal.x,
; CM-NEXT:     BFE_INT * T43.W, T7.Y, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T44.X, T20.Y, 0.0, literal.x,
; CM-NEXT:     BFE_INT T42.Y, T7.W, 0.0, literal.x,
; CM-NEXT:     BFE_INT T43.Z, T7.Z, 0.0, literal.x,
; CM-NEXT:     BFE_INT * T20.W, T6.Y, 0.0, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T45.X, T0.Z, 0.0, literal.x,
; CM-NEXT:     BFE_INT T43.Y, T6.W, 0.0, literal.x,
; CM-NEXT:     BFE_INT T20.Z, T6.Z, 0.0, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:     BFE_INT * T44.W, T5.Y, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T46.X, T0.W, 0.0, literal.x,
; CM-NEXT:     BFE_INT T20.Y, T5.W, 0.0, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:     BFE_INT T44.Z, T5.Z, 0.0, literal.x,
; CM-NEXT:     BFE_INT * T45.W, T4.Y, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T47.X, T0.X, 0.0, literal.x,
; CM-NEXT:     BFE_INT T44.Y, T4.W, 0.0, literal.x,
; CM-NEXT:     BFE_INT T45.Z, T4.Z, 0.0, literal.x,
; CM-NEXT:     BFE_INT * T46.W, T3.W, 0.0, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T0.X, T0.Y, 0.0, literal.x,
; CM-NEXT:     BFE_INT T45.Y, T3.Z, 0.0, literal.x,
; CM-NEXT:     BFE_INT T46.Z, T3.Y, 0.0, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:     BFE_INT * T47.W, T2.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT T48.X, T21.X, literal.x,
; CM-NEXT:     BFE_INT T46.Y, T2.Z, 0.0, literal.x,
; CM-NEXT:     BFE_INT T47.Z, T2.Y, 0.0, literal.x,
; CM-NEXT:     BFE_INT * T0.W, T1.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT T49.X, T21.X, literal.x,
; CM-NEXT:     BFE_INT T47.Y, T1.Z, 0.0, literal.y,
; CM-NEXT:     BFE_INT T0.Z, T1.Y, 0.0, literal.y,
; CM-NEXT:     LSHR * T1.W, T0.Y, literal.y, BS:VEC_120/SCL_212
; CM-NEXT:    12(1.681558e-44), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T50.X, T21.X, literal.x,
; CM-NEXT:     BFE_INT * T0.Y, PV.W, 0.0, literal.y,
; CM-NEXT:    4(5.605194e-45), 8(1.121039e-44)
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <64 x i8>, ptr addrspace(1) %in, i32 %tid
  %load = load <64 x i8>, ptr addrspace(1) %in.tid
  %ext = sext <64 x i8> %load to <64 x i32>
  store <64 x i32> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_zextload_i8_to_i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_zextload_i8_to_i64:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-SI-NEXT:    buffer_load_ubyte v0, off, s[8:11], 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_zextload_i8_to_i64:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    flat_load_ubyte v0, v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v3, s1
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, 0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    flat_store_dwordx2 v[2:3], v[0:1]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_zextload_i8_to_i64:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-VI-NEXT:    buffer_load_ubyte v0, off, s[8:11], 0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_zextload_i8_to_i64:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 2, @9, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_8 T0.X, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     MOV * T0.X, KC0[2].Z,
; EG-NEXT:    ALU clause starting at 9:
; EG-NEXT:     MOV * T0.Y, 0.0,
; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
;
; CM-LABEL: global_zextload_i8_to_i64:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 2, @9, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0, T1.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_8 T0.X, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     MOV * T0.X, KC0[2].Z,
; CM-NEXT:    ALU clause starting at 9:
; CM-NEXT:     MOV * T0.Y, 0.0,
; CM-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
  %a = load i8, ptr addrspace(1) %in
  %ext = zext i8 %a to i64
  store i64 %ext, ptr addrspace(1) %out
  ret void
}

; TODO: EG Why 31 not 7 ?
define amdgpu_kernel void @global_sextload_i8_to_i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_sextload_i8_to_i64:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-SI-NEXT:    buffer_load_sbyte v0, off, s[8:11], 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_sextload_i8_to_i64:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    flat_load_sbyte v0, v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v3, s1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
; GCN-HSA-NEXT:    flat_store_dwordx2 v[2:3], v[0:1]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_sextload_i8_to_i64:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-VI-NEXT:    buffer_load_sbyte v0, off, s[8:11], 0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v0, v0, 0, 16
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_sextload_i8_to_i64:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 4, @9, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_8 T0.X, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     MOV * T0.X, KC0[2].Z,
; EG-NEXT:    ALU clause starting at 9:
; EG-NEXT:     BFE_INT T0.X, T0.X, 0.0, literal.x,
; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.y,
; EG-NEXT:    8(1.121039e-44), 2(2.802597e-45)
; EG-NEXT:     ASHR * T0.Y, PV.X, literal.x,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
;
; CM-LABEL: global_sextload_i8_to_i64:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 4, @9, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0, T1.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_8 T0.X, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     MOV * T0.X, KC0[2].Z,
; CM-NEXT:    ALU clause starting at 9:
; CM-NEXT:     BFE_INT * T0.X, T0.X, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     LSHR T1.X, KC0[2].Y, literal.x,
; CM-NEXT:     ASHR * T0.Y, PV.X, literal.y,
; CM-NEXT:    2(2.802597e-45), 31(4.344025e-44)
  %a = load i8, ptr addrspace(1) %in
  %ext = sext i8 %a to i64
  store i64 %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_zextload_v1i8_to_v1i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_zextload_v1i8_to_v1i64:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-SI-NEXT:    buffer_load_ubyte v0, off, s[8:11], 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_zextload_v1i8_to_v1i64:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    flat_load_ubyte v0, v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v3, s1
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, 0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    flat_store_dwordx2 v[2:3], v[0:1]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_zextload_v1i8_to_v1i64:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-VI-NEXT:    buffer_load_ubyte v0, off, s[8:11], 0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_zextload_v1i8_to_v1i64:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 2, @9, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_8 T0.X, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     MOV * T0.X, KC0[2].Z,
; EG-NEXT:    ALU clause starting at 9:
; EG-NEXT:     MOV * T0.Y, 0.0,
; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
;
; CM-LABEL: global_zextload_v1i8_to_v1i64:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 2, @9, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0, T1.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_8 T0.X, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     MOV * T0.X, KC0[2].Z,
; CM-NEXT:    ALU clause starting at 9:
; CM-NEXT:     MOV * T0.Y, 0.0,
; CM-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
  %load = load <1 x i8>, ptr addrspace(1) %in
  %ext = zext <1 x i8> %load to <1 x i64>
  store <1 x i64> %ext, ptr addrspace(1) %out
  ret void
}

; TODO: EG Why 31 not 7 ?
define amdgpu_kernel void @global_sextload_v1i8_to_v1i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_sextload_v1i8_to_v1i64:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-SI-NEXT:    buffer_load_sbyte v0, off, s[8:11], 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_sextload_v1i8_to_v1i64:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    flat_load_sbyte v0, v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v3, s1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
; GCN-HSA-NEXT:    flat_store_dwordx2 v[2:3], v[0:1]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_sextload_v1i8_to_v1i64:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-VI-NEXT:    buffer_load_sbyte v0, off, s[8:11], 0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v0, v0, 0, 16
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_sextload_v1i8_to_v1i64:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 4, @9, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_8 T0.X, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     MOV * T0.X, KC0[2].Z,
; EG-NEXT:    ALU clause starting at 9:
; EG-NEXT:     BFE_INT T0.X, T0.X, 0.0, literal.x,
; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.y,
; EG-NEXT:    8(1.121039e-44), 2(2.802597e-45)
; EG-NEXT:     ASHR * T0.Y, PV.X, literal.x,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
;
; CM-LABEL: global_sextload_v1i8_to_v1i64:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 4, @9, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0, T1.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_8 T0.X, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     MOV * T0.X, KC0[2].Z,
; CM-NEXT:    ALU clause starting at 9:
; CM-NEXT:     BFE_INT * T0.X, T0.X, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     LSHR T1.X, KC0[2].Y, literal.x,
; CM-NEXT:     ASHR * T0.Y, PV.X, literal.y,
; CM-NEXT:    2(2.802597e-45), 31(4.344025e-44)
  %load = load <1 x i8>, ptr addrspace(1) %in
  %ext = sext <1 x i8> %load to <1 x i64>
  store <1 x i64> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_zextload_v2i8_to_v2i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_zextload_v2i8_to_v2i64:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-SI-NEXT:    buffer_load_ushort v0, off, s[8:11], 0
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v3, v1
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v2, 8, v0
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v0, 0xff, v0
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_zextload_v2i8_to_v2i64:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    flat_load_ushort v0, v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v4, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v5, s1
; GCN-HSA-NEXT:    v_mov_b32_e32 v3, v1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v2, 8, v0
; GCN-HSA-NEXT:    v_and_b32_e32 v0, 0xff, v0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_zextload_v2i8_to_v2i64:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-VI-NEXT:    buffer_load_ushort v0, off, s[8:11], 0
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v2, 8
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v3, v1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_sdwa v2, v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v0, 0xff, v0
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_zextload_v2i8_to_v2i64:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 1, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 14, @10, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T4.XYZW, T5.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_16 T4.X, T4.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     MOV * T0.Y, T2.X,
; EG-NEXT:     MOV * T4.X, KC0[2].Z,
; EG-NEXT:    ALU clause starting at 10:
; EG-NEXT:     AND_INT T0.W, T4.X, literal.x,
; EG-NEXT:     AND_INT * T1.W, T0.Y, literal.y,
; EG-NEXT:    65535(9.183409e-41), -65536(nan)
; EG-NEXT:     OR_INT * T0.W, PS, PV.W,
; EG-NEXT:     MOV * T2.X, PV.W,
; EG-NEXT:     MOV T0.Y, PV.X,
; EG-NEXT:     MOV * T1.W, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT * T4.Z, PV.Y, literal.x, PV.W,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T4.X, T0.W, literal.x,
; EG-NEXT:     MOV T4.Y, 0.0,
; EG-NEXT:     MOV T4.W, 0.0,
; EG-NEXT:     LSHR * T5.X, KC0[2].Y, literal.y,
; EG-NEXT:    255(3.573311e-43), 2(2.802597e-45)
;
; CM-LABEL: global_zextload_v2i8_to_v2i64:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 1, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 15, @10, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T4, T5.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_16 T4.X, T4.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     MOV * T0.Y, T2.X,
; CM-NEXT:     MOV * T4.X, KC0[2].Z,
; CM-NEXT:    ALU clause starting at 10:
; CM-NEXT:     AND_INT T0.Z, T4.X, literal.x,
; CM-NEXT:     AND_INT * T0.W, T0.Y, literal.y,
; CM-NEXT:    65535(9.183409e-41), -65536(nan)
; CM-NEXT:     OR_INT * T0.W, PV.W, PV.Z,
; CM-NEXT:     MOV * T2.X, PV.W,
; CM-NEXT:     MOV T0.Y, PV.X,
; CM-NEXT:     MOV * T1.W, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT * T4.Z, PV.Y, literal.x, PV.W,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T4.X, T0.W, literal.x,
; CM-NEXT:     MOV T4.Y, 0.0,
; CM-NEXT:     MOV * T4.W, 0.0,
; CM-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; CM-NEXT:     LSHR * T5.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
  %load = load <2 x i8>, ptr addrspace(1) %in
  %ext = zext <2 x i8> %load to <2 x i64>
  store <2 x i64> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_sextload_v2i8_to_v2i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_sextload_v2i8_to_v2i64:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, s2
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s3
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s8, s6
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s9, s7
; GCN-NOHSA-SI-NEXT:    buffer_load_ushort v0, off, s[8:11], 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v2, 8, v0
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v0, v0, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v2, v2, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v3, 31, v2
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_sextload_v2i8_to_v2i64:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    flat_load_ushort v0, v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v4, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v5, s1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v2, 8, v0
; GCN-HSA-NEXT:    v_bfe_i32 v0, v0, 0, 8
; GCN-HSA-NEXT:    v_bfe_i32 v2, v2, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v3, 31, v2
; GCN-HSA-NEXT:    flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_sextload_v2i8_to_v2i64:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s10, s2
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s11, s3
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s8, s6
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s9, s7
; GCN-NOHSA-VI-NEXT:    buffer_load_ushort v0, off, s[8:11], 0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s0, s4
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s1, s5
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v2, 8, v0
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v0, v0, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v2, v2, 0, 8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v3, 31, v2
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_sextload_v2i8_to_v2i64:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 1, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 15, @10, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T4.XYZW, T5.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_16 T4.X, T4.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     MOV * T0.Y, T2.X,
; EG-NEXT:     MOV * T4.X, KC0[2].Z,
; EG-NEXT:    ALU clause starting at 10:
; EG-NEXT:     AND_INT T0.W, T4.X, literal.x,
; EG-NEXT:     AND_INT * T1.W, T0.Y, literal.y,
; EG-NEXT:    65535(9.183409e-41), -65536(nan)
; EG-NEXT:     OR_INT * T0.W, PS, PV.W,
; EG-NEXT:     MOV * T2.X, PV.W,
; EG-NEXT:     MOV * T0.Y, PV.X,
; EG-NEXT:     BFE_INT * T4.X, T0.W, 0.0, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     ASHR T4.Y, PV.X, literal.x,
; EG-NEXT:     LSHR * T0.W, T0.Y, literal.y,
; EG-NEXT:    31(4.344025e-44), 8(1.121039e-44)
; EG-NEXT:     BFE_INT * T4.Z, PV.W, 0.0, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     LSHR T5.X, KC0[2].Y, literal.x,
; EG-NEXT:     ASHR * T4.W, PV.Z, literal.y,
; EG-NEXT:    2(2.802597e-45), 31(4.344025e-44)
;
; CM-LABEL: global_sextload_v2i8_to_v2i64:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 1, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 15, @10, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T4, T5.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_16 T4.X, T4.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     MOV * T0.Y, T2.X,
; CM-NEXT:     MOV * T4.X, KC0[2].Z,
; CM-NEXT:    ALU clause starting at 10:
; CM-NEXT:     AND_INT T0.Z, T4.X, literal.x,
; CM-NEXT:     AND_INT * T0.W, T0.Y, literal.y,
; CM-NEXT:    65535(9.183409e-41), -65536(nan)
; CM-NEXT:     OR_INT * T0.W, PV.W, PV.Z,
; CM-NEXT:     MOV * T2.X, PV.W,
; CM-NEXT:     MOV * T0.Y, PV.X,
; CM-NEXT:     BFE_INT * T4.X, T0.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     ASHR T4.Y, PV.X, literal.x,
; CM-NEXT:     LSHR * T0.W, T0.Y, literal.y,
; CM-NEXT:    31(4.344025e-44), 8(1.121039e-44)
; CM-NEXT:     BFE_INT * T4.Z, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     LSHR T5.X, KC0[2].Y, literal.x,
; CM-NEXT:     ASHR * T4.W, PV.Z, literal.y,
; CM-NEXT:    2(2.802597e-45), 31(4.344025e-44)
  %load = load <2 x i8>, ptr addrspace(1) %in
  %ext = sext <2 x i8> %load to <2 x i64>
  store <2 x i64> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_zextload_v4i8_to_v4i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_zextload_v4i8_to_v4i64:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s3
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[6:7]
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dword v0, v[0:1], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v3, v1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v5, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v7, v1
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v6, v0, 8, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v2, 24, v0
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v4, 0xff, v0
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v0, v0, 16, 8
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_zextload_v4i8_to_v4i64:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dword v0, v[0:1]
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 16
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, 0
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v3, v1
; GCN-HSA-NEXT:    v_mov_b32_e32 v11, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v10, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v5, v1
; GCN-HSA-NEXT:    v_mov_b32_e32 v7, v1
; GCN-HSA-NEXT:    v_mov_b32_e32 v9, s1
; GCN-HSA-NEXT:    v_mov_b32_e32 v8, s0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_bfe_u32 v6, v0, 8, 8
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v2, 24, v0
; GCN-HSA-NEXT:    v_and_b32_e32 v4, 0xff, v0
; GCN-HSA-NEXT:    v_bfe_u32 v0, v0, 16, 8
; GCN-HSA-NEXT:    flat_store_dwordx4 v[10:11], v[0:3]
; GCN-HSA-NEXT:    flat_store_dwordx4 v[8:9], v[4:7]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_zextload_v4i8_to_v4i64:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dword v0, v[0:1]
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v3, v1
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v5, v1
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v7, v1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v2, 24, v0
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v4, 0xff, v0
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v6, 8, v0
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v0, v0, 16, 8
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_zextload_v4i8_to_v4i64:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 16, @11, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T5.XYZW, T7.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T6.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 11:
; EG-NEXT:     MOV * T0.W, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T5.X, T0.X, literal.x, PV.W,
; EG-NEXT:     LSHR * T5.Z, T0.X, literal.y,
; EG-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; EG-NEXT:     MOV T5.Y, 0.0,
; EG-NEXT:     BFE_UINT * T0.Z, T0.X, literal.x, T0.W,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T0.X, T0.X, literal.x,
; EG-NEXT:     MOV T0.Y, 0.0,
; EG-NEXT:     MOV T5.W, 0.0,
; EG-NEXT:     MOV * T0.W, 0.0,
; EG-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; EG-NEXT:     LSHR * T6.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T7.X, PV.X, literal.x,
; EG-NEXT:    4(5.605194e-45), 0(0.000000e+00)
;
; CM-LABEL: global_zextload_v4i8_to_v4i64:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 16, @11, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T5, T0.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T6, T7.X
; CM-NEXT:    CF_END
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 11:
; CM-NEXT:     MOV * T0.W, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT * T5.Z, T0.X, literal.x, PV.W,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T5.X, T0.X, literal.x,
; CM-NEXT:     MOV * T5.Y, 0.0,
; CM-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT T6.X, T0.X, literal.x, T0.W,
; CM-NEXT:     LSHR * T6.Z, T0.X, literal.y,
; CM-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; CM-NEXT:     MOV T6.Y, 0.0,
; CM-NEXT:     MOV * T5.W, 0.0,
; CM-NEXT:     MOV * T6.W, 0.0,
; CM-NEXT:     LSHR * T0.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T7.X, PV.X, literal.x,
; CM-NEXT:    4(5.605194e-45), 0(0.000000e+00)
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <4 x i8>, ptr addrspace(1) %in, i32 %tid
  %load = load <4 x i8>, ptr addrspace(1) %in.tid
  %ext = zext <4 x i8> %load to <4 x i64>
  store <4 x i64> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_sextload_v4i8_to_v4i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_sextload_v4i8_to_v4i64:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s3
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[6:7]
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dword v0, v[0:1], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v3, 16, v0
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v4, 24, v0
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v2, 8, v0
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v6, v4, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v4, v3, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v0, v0, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v2, v2, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v7, 31, v6
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v5, 31, v4
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v3, 31, v2
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_sextload_v4i8_to_v4i64:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dword v0, v[0:1]
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 16
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v11, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v10, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v9, s1
; GCN-HSA-NEXT:    v_mov_b32_e32 v8, s0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v3, 16, v0
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v4, 24, v0
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v2, 8, v0
; GCN-HSA-NEXT:    v_bfe_i32 v6, v4, 0, 8
; GCN-HSA-NEXT:    v_bfe_i32 v4, v3, 0, 8
; GCN-HSA-NEXT:    v_bfe_i32 v0, v0, 0, 8
; GCN-HSA-NEXT:    v_bfe_i32 v2, v2, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v7, 31, v6
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v5, 31, v4
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v3, 31, v2
; GCN-HSA-NEXT:    flat_store_dwordx4 v[10:11], v[4:7]
; GCN-HSA-NEXT:    flat_store_dwordx4 v[8:9], v[0:3]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_sextload_v4i8_to_v4i64:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dword v0, v[0:1]
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v3, 16, v0
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v4, 24, v0
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v2, 8, v0
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v6, v4, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v4, v3, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v0, v0, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v2, v2, 0, 8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v7, 31, v6
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v5, 31, v4
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v3, 31, v2
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_sextload_v4i8_to_v4i64:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 18, @11, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T5.XYZW, T7.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T6.XYZW, T0.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 11:
; EG-NEXT:     ASHR * T5.W, T0.X, literal.x,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T6.X, T0.X, 0.0, literal.x,
; EG-NEXT:     ASHR T5.Z, T0.X, literal.y,
; EG-NEXT:     LSHR * T0.W, T0.X, literal.z,
; EG-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T5.X, PV.W, 0.0, literal.x,
; EG-NEXT:     ASHR T6.Y, PV.X, literal.y,
; EG-NEXT:     LSHR T0.W, T0.X, literal.x,
; EG-NEXT:     LSHR * T0.X, KC0[2].Y, literal.z,
; EG-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     BFE_INT * T6.Z, PV.W, 0.0, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T7.X, T0.X, literal.x,
; EG-NEXT:     ASHR T5.Y, T5.X, literal.y, BS:VEC_120/SCL_212
; EG-NEXT:     ASHR * T6.W, PV.Z, literal.y,
; EG-NEXT:    4(5.605194e-45), 31(4.344025e-44)
;
; CM-LABEL: global_sextload_v4i8_to_v4i64:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 17, @11, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T6, T0.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T5, T7.X
; CM-NEXT:    CF_END
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 11:
; CM-NEXT:     ASHR * T5.W, T0.X, literal.x,
; CM-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T6.X, T0.X, 0.0, literal.x,
; CM-NEXT:     ASHR T5.Z, T0.X, literal.y,
; CM-NEXT:     LSHR * T0.W, T0.X, literal.z,
; CM-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T5.X, PV.W, 0.0, literal.x,
; CM-NEXT:     ASHR T6.Y, PV.X, literal.y,
; CM-NEXT:     LSHR * T0.W, T0.X, literal.x,
; CM-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; CM-NEXT:     LSHR T0.X, KC0[2].Y, literal.x,
; CM-NEXT:     BFE_INT * T6.Z, PV.W, 0.0, literal.y,
; CM-NEXT:    2(2.802597e-45), 8(1.121039e-44)
; CM-NEXT:     ADD_INT T7.X, PV.X, literal.x,
; CM-NEXT:     ASHR T5.Y, T5.X, literal.y,
; CM-NEXT:     ASHR * T6.W, PV.Z, literal.y,
; CM-NEXT:    4(5.605194e-45), 31(4.344025e-44)
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <4 x i8>, ptr addrspace(1) %in, i32 %tid
  %load = load <4 x i8>, ptr addrspace(1) %in.tid
  %ext = sext <4 x i8> %load to <4 x i64>
  store <4 x i64> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_zextload_v8i8_to_v8i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_zextload_v8i8_to_v8i64:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s3
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[6:7]
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx2 v[16:17], v[0:1], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v3, v1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v5, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v7, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v9, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v11, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v13, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v15, v1
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v2, 24, v17
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v0, v17, 16, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v6, 24, v16
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v10, v17, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v14, v16, 8, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v12, 0xff, v16
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v8, 0xff, v17
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v4, v16, 16, 8
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:32
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_zextload_v8i8_to_v8i64:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dwordx2 v[15:16], v[0:1]
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 48
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v18, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v17, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 16
; GCN-HSA-NEXT:    v_mov_b32_e32 v3, v1
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v4, v1
; GCN-HSA-NEXT:    v_mov_b32_e32 v6, v1
; GCN-HSA-NEXT:    v_mov_b32_e32 v8, v1
; GCN-HSA-NEXT:    v_mov_b32_e32 v10, v1
; GCN-HSA-NEXT:    v_mov_b32_e32 v12, v1
; GCN-HSA-NEXT:    v_mov_b32_e32 v14, v1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v2, 24, v16
; GCN-HSA-NEXT:    v_bfe_u32 v0, v16, 16, 8
; GCN-HSA-NEXT:    flat_store_dwordx4 v[17:18], v[0:3]
; GCN-HSA-NEXT:    v_mov_b32_e32 v18, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT:    s_add_u32 s0, s0, 32
; GCN-HSA-NEXT:    v_mov_b32_e32 v17, s2
; GCN-HSA-NEXT:    s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v5, 24, v15
; GCN-HSA-NEXT:    v_bfe_u32 v3, v15, 16, 8
; GCN-HSA-NEXT:    v_mov_b32_e32 v20, s1
; GCN-HSA-NEXT:    v_mov_b32_e32 v19, s0
; GCN-HSA-NEXT:    v_bfe_u32 v9, v16, 8, 8
; GCN-HSA-NEXT:    v_bfe_u32 v13, v15, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v11, 0xff, v15
; GCN-HSA-NEXT:    v_and_b32_e32 v7, 0xff, v16
; GCN-HSA-NEXT:    flat_store_dwordx4 v[17:18], v[3:6]
; GCN-HSA-NEXT:    flat_store_dwordx4 v[19:20], v[7:10]
; GCN-HSA-NEXT:    flat_store_dwordx4 v[0:1], v[11:14]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_zextload_v8i8_to_v8i64:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx2 v[16:17], v[0:1]
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v3, v1
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v5, v1
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v7, v1
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v9, v1
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v11, v1
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v13, v1
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v15, v1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v2, 24, v17
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v0, v17, 16, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v6, 24, v16
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v12, 0xff, v17
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v14, 8, v17
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v8, 0xff, v16
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v10, 8, v16
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v4, v16, 16, 8
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:32
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_zextload_v8i8_to_v8i64:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @10, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @8
; EG-NEXT:    ALU 30, @13, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T6.XYZW, T12.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T7.XYZW, T11.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T8.XYZW, T10.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T9.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 8:
; EG-NEXT:     VTX_READ_64 T0.XY, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 10:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 13:
; EG-NEXT:     MOV * T0.W, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T6.X, T0.Y, literal.x, PV.W,
; EG-NEXT:     LSHR * T6.Z, T0.Y, literal.y,
; EG-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; EG-NEXT:     MOV T6.Y, 0.0,
; EG-NEXT:     BFE_UINT * T7.Z, T0.Y, literal.x, T0.W,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T7.X, T0.Y, literal.x,
; EG-NEXT:     MOV * T7.Y, 0.0,
; EG-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T8.X, T0.X, literal.x, T0.W,
; EG-NEXT:     LSHR * T8.Z, T0.X, literal.y,
; EG-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; EG-NEXT:     MOV T8.Y, 0.0,
; EG-NEXT:     BFE_UINT * T0.Z, T0.X, literal.x, T0.W,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T0.X, T0.X, literal.x,
; EG-NEXT:     MOV T0.Y, 0.0,
; EG-NEXT:     MOV T6.W, 0.0,
; EG-NEXT:     MOV * T7.W, 0.0,
; EG-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; EG-NEXT:     MOV T8.W, 0.0,
; EG-NEXT:     MOV * T0.W, 0.0,
; EG-NEXT:     LSHR * T9.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T10.X, PV.X, literal.x,
; EG-NEXT:     ADD_INT * T11.X, PV.X, literal.y,
; EG-NEXT:    4(5.605194e-45), 8(1.121039e-44)
; EG-NEXT:     ADD_INT * T12.X, T9.X, literal.x,
; EG-NEXT:    12(1.681558e-44), 0(0.000000e+00)
;
; CM-LABEL: global_zextload_v8i8_to_v8i64:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 2, @10, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @8
; CM-NEXT:    ALU 31, @13, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T6, T9.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T7, T12.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T8, T11.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0, T10.X
; CM-NEXT:    CF_END
; CM-NEXT:    Fetch clause starting at 8:
; CM-NEXT:     VTX_READ_64 T0.XY, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 10:
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x,
; CM-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 13:
; CM-NEXT:     MOV * T0.W, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT * T6.Z, T0.X, literal.x, PV.W,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T6.X, T0.X, literal.x,
; CM-NEXT:     MOV * T6.Y, 0.0,
; CM-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT T7.X, T0.X, literal.x, T0.W,
; CM-NEXT:     LSHR * T7.Z, T0.X, literal.y,
; CM-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; CM-NEXT:     MOV T7.Y, 0.0,
; CM-NEXT:     BFE_UINT * T8.Z, T0.Y, literal.x, T0.W,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T8.X, T0.Y, literal.x,
; CM-NEXT:     MOV * T8.Y, 0.0,
; CM-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT T0.X, T0.Y, literal.x, T0.W,
; CM-NEXT:     LSHR * T0.Z, T0.Y, literal.y,
; CM-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; CM-NEXT:     MOV T0.Y, 0.0,
; CM-NEXT:     MOV * T6.W, 0.0,
; CM-NEXT:     MOV * T7.W, 0.0,
; CM-NEXT:     MOV * T8.W, 0.0,
; CM-NEXT:     MOV * T0.W, 0.0,
; CM-NEXT:     LSHR * T9.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T10.X, PV.X, literal.x,
; CM-NEXT:    12(1.681558e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T11.X, T9.X, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T12.X, T9.X, literal.x,
; CM-NEXT:    4(5.605194e-45), 0(0.000000e+00)
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <8 x i8>, ptr addrspace(1) %in, i32 %tid
  %load = load <8 x i8>, ptr addrspace(1) %in.tid
  %ext = zext <8 x i8> %load to <8 x i64>
  store <8 x i64> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_sextload_v8i8_to_v8i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_sextload_v8i8_to_v8i64:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s3
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[6:7]
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx2 v[0:1], v[0:1], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v3, 16, v1
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v6, 8, v1
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v5, 16, v0
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v7, 24, v0
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v2, 8, v0
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v8, v3, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v0, v0, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v4, v1, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v11, 31, v1
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v10, 24, v1
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v2, v2, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v14, v7, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v12, v5, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v6, v6, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v9, 31, v8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v5, 31, v4
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v3, 31, v2
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v15, 31, v14
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v13, 31, v12
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v7, 31, v6
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:48
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:32
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:16
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_sextload_v8i8_to_v8i64:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dwordx2 v[4:5], v[0:1]
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 48
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v7, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v6, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 32
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v13, s1
; GCN-HSA-NEXT:    v_mov_b32_e32 v12, s0
; GCN-HSA-NEXT:    s_add_u32 s0, s0, 16
; GCN-HSA-NEXT:    v_mov_b32_e32 v15, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v14, s2
; GCN-HSA-NEXT:    s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v17, s1
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, s0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v0, 16, v5
; GCN-HSA-NEXT:    v_bfe_i32 v0, v0, 0, 8
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v9, 8, v5
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v3, 31, v5
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v2, 24, v5
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v8, 16, v4
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v10, 24, v4
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v11, 8, v4
; GCN-HSA-NEXT:    flat_store_dwordx4 v[6:7], v[0:3]
; GCN-HSA-NEXT:    v_bfe_i32 v6, v9, 0, 8
; GCN-HSA-NEXT:    v_bfe_i32 v0, v4, 0, 8
; GCN-HSA-NEXT:    v_bfe_i32 v4, v5, 0, 8
; GCN-HSA-NEXT:    v_bfe_i32 v2, v11, 0, 8
; GCN-HSA-NEXT:    v_bfe_i32 v10, v10, 0, 8
; GCN-HSA-NEXT:    v_bfe_i32 v8, v8, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v5, 31, v4
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v7, 31, v6
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v3, 31, v2
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v11, 31, v10
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v9, 31, v8
; GCN-HSA-NEXT:    flat_store_dwordx4 v[14:15], v[4:7]
; GCN-HSA-NEXT:    flat_store_dwordx4 v[16:17], v[8:11]
; GCN-HSA-NEXT:    flat_store_dwordx4 v[12:13], v[0:3]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_sextload_v8i8_to_v8i64:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx2 v[1:2], v[0:1]
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v3, 16, v2
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v8, 24, v1
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v7, 16, v1
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v6, 8, v1
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v5, 8, v2
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v14, v8, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v8, v3, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v0, v2, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v4, v1, 0, 8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v11, 31, v2
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v10, 24, v2
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v2, v5, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v6, v6, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v12, v7, 0, 8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v9, 31, v8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v5, 31, v4
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v3, 31, v2
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v7, 31, v6
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v15, 31, v14
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v13, 31, v12
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:48
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:16
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_sextload_v8i8_to_v8i64:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @10, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @8
; EG-NEXT:    ALU 34, @13, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T12.XYZW, T0.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T6.XYZW, T9.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T10.XYZW, T8.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T11.XYZW, T7.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 8:
; EG-NEXT:     VTX_READ_64 T0.XY, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 10:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 13:
; EG-NEXT:     BFE_INT T6.X, T0.Y, 0.0, literal.x,
; EG-NEXT:     LSHR * T7.X, KC0[2].Y, literal.y,
; EG-NEXT:    8(1.121039e-44), 2(2.802597e-45)
; EG-NEXT:     ADD_INT T8.X, PS, literal.x,
; EG-NEXT:     ASHR T6.Y, PV.X, literal.y,
; EG-NEXT:     LSHR T0.W, T0.Y, literal.z,
; EG-NEXT:     ADD_INT * T9.X, PS, literal.z,
; EG-NEXT:    4(5.605194e-45), 31(4.344025e-44)
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T6.Z, PV.W, 0.0, literal.x,
; EG-NEXT:     ASHR * T10.W, T0.X, literal.y,
; EG-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; EG-NEXT:     BFE_INT T11.X, T0.X, 0.0, literal.x,
; EG-NEXT:     ASHR T10.Z, T0.X, literal.y,
; EG-NEXT:     LSHR T0.W, T0.X, literal.z,
; EG-NEXT:     ASHR * T12.W, T0.Y, literal.w,
; EG-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; EG-NEXT:    16(2.242078e-44), 31(4.344025e-44)
; EG-NEXT:     BFE_INT T10.X, PV.W, 0.0, literal.x,
; EG-NEXT:     ASHR T11.Y, PV.X, literal.y,
; EG-NEXT:     ASHR T12.Z, T0.Y, literal.z,
; EG-NEXT:     LSHR T0.W, T0.X, literal.x,
; EG-NEXT:     LSHR * T1.W, T0.Y, literal.w,
; EG-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; EG-NEXT:    24(3.363116e-44), 16(2.242078e-44)
; EG-NEXT:     BFE_INT T12.X, PS, 0.0, literal.x,
; EG-NEXT:     ASHR T10.Y, PV.X, literal.y,
; EG-NEXT:     BFE_INT T11.Z, PV.W, 0.0, literal.x,
; EG-NEXT:     ADD_INT * T0.X, T7.X, literal.z,
; EG-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; EG-NEXT:    12(1.681558e-44), 0(0.000000e+00)
; EG-NEXT:     ASHR T12.Y, PV.X, literal.x,
; EG-NEXT:     ASHR T11.W, PV.Z, literal.x,
; EG-NEXT:     ASHR * T6.W, T6.Z, literal.x,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
;
; CM-LABEL: global_sextload_v8i8_to_v8i64:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 2, @10, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @8
; CM-NEXT:    ALU 34, @13, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T11, T7.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0, T12.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T6, T9.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T10, T8.X
; CM-NEXT:    CF_END
; CM-NEXT:    Fetch clause starting at 8:
; CM-NEXT:     VTX_READ_64 T0.XY, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 10:
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x,
; CM-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 13:
; CM-NEXT:     BFE_INT * T6.X, T0.Y, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     LSHR * T7.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT T8.X, PV.X, literal.x,
; CM-NEXT:     ASHR T6.Y, T6.X, literal.y,
; CM-NEXT:     LSHR * T0.W, T0.Y, literal.z,
; CM-NEXT:    12(1.681558e-44), 31(4.344025e-44)
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT T9.X, T7.X, literal.x,
; CM-NEXT:     LSHR T1.Y, T0.X, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:     BFE_INT T6.Z, PV.W, 0.0, literal.x,
; CM-NEXT:     ASHR * T10.W, T0.Y, literal.y,
; CM-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; CM-NEXT:     BFE_INT T11.X, T0.X, 0.0, literal.x,
; CM-NEXT:     LSHR T2.Y, T0.Y, literal.y,
; CM-NEXT:     ASHR T10.Z, T0.Y, literal.z,
; CM-NEXT:     ASHR * T0.W, T0.X, literal.w,
; CM-NEXT:    8(1.121039e-44), 16(2.242078e-44)
; CM-NEXT:    24(3.363116e-44), 31(4.344025e-44)
; CM-NEXT:     BFE_INT T10.X, PV.Y, 0.0, literal.x,
; CM-NEXT:     ASHR T11.Y, PV.X, literal.y,
; CM-NEXT:     ASHR T0.Z, T0.X, literal.z,
; CM-NEXT:     LSHR * T1.W, T0.X, literal.w,
; CM-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; CM-NEXT:    24(3.363116e-44), 16(2.242078e-44)
; CM-NEXT:     BFE_INT T0.X, PV.W, 0.0, literal.x,
; CM-NEXT:     ASHR T10.Y, PV.X, literal.y,
; CM-NEXT:     BFE_INT T11.Z, T1.Y, 0.0, literal.x,
; CM-NEXT:     ASHR * T6.W, T6.Z, literal.y,
; CM-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; CM-NEXT:     ADD_INT T12.X, T7.X, literal.x,
; CM-NEXT:     ASHR T0.Y, PV.X, literal.y,
; CM-NEXT:     ASHR * T11.W, PV.Z, literal.y,
; CM-NEXT:    4(5.605194e-45), 31(4.344025e-44)
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <8 x i8>, ptr addrspace(1) %in, i32 %tid
  %load = load <8 x i8>, ptr addrspace(1) %in.tid
  %ext = sext <8 x i8> %load to <8 x i64>
  store <8 x i64> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_zextload_v16i8_to_v16i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_zextload_v16i8_to_v16i64:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s3
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[6:7]
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx4 v[3:6], v[0:1], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v32, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v34, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v28, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v30, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v24, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v26, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v20, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v22, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v16, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v18, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v8, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v10, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v12, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v14, v1
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v2, 24, v5
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v9, v3, 8, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v7, 0xff, v3
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v29, 24, v3
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v27, v3, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v0, v5, 16, 8
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v3, v1
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v13, v4, 8, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v11, 0xff, v4
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v17, v6, 8, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v15, 0xff, v6
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v21, v5, 8, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v19, 0xff, v5
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v25, 24, v4
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v23, v4, 16, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v33, 24, v6
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v31, v6, 16, 8
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[31:34], off, s[0:3], 0 offset:112
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[27:30], off, s[0:3], 0 offset:16
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[23:26], off, s[0:3], 0 offset:48
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:64
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[15:18], off, s[0:3], 0 offset:96
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[7:10], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[11:14], off, s[0:3], 0 offset:32
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_zextload_v16i8_to_v16i64:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0x50
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    s_add_u32 s4, s0, 0x70
; GCN-HSA-NEXT:    s_addc_u32 s5, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v5, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, s5
; GCN-HSA-NEXT:    v_mov_b32_e32 v15, s4
; GCN-HSA-NEXT:    s_add_u32 s4, s0, 16
; GCN-HSA-NEXT:    v_mov_b32_e32 v9, v5
; GCN-HSA-NEXT:    v_mov_b32_e32 v11, v5
; GCN-HSA-NEXT:    s_addc_u32 s5, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v12, v5
; GCN-HSA-NEXT:    v_mov_b32_e32 v14, v5
; GCN-HSA-NEXT:    v_mov_b32_e32 v17, v5
; GCN-HSA-NEXT:    v_mov_b32_e32 v7, v5
; GCN-HSA-NEXT:    v_mov_b32_e32 v18, v5
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v10, 24, v3
; GCN-HSA-NEXT:    v_bfe_u32 v8, v3, 16, 8
; GCN-HSA-NEXT:    flat_store_dwordx4 v[15:16], v[8:11]
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v13, 24, v0
; GCN-HSA-NEXT:    v_mov_b32_e32 v9, s5
; GCN-HSA-NEXT:    v_mov_b32_e32 v8, s4
; GCN-HSA-NEXT:    s_add_u32 s4, s0, 48
; GCN-HSA-NEXT:    v_bfe_u32 v11, v0, 16, 8
; GCN-HSA-NEXT:    s_addc_u32 s5, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[8:9], v[11:14]
; GCN-HSA-NEXT:    v_mov_b32_e32 v15, v5
; GCN-HSA-NEXT:    v_mov_b32_e32 v13, s5
; GCN-HSA-NEXT:    v_mov_b32_e32 v12, s4
; GCN-HSA-NEXT:    s_add_u32 s4, s0, 64
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v16, 24, v1
; GCN-HSA-NEXT:    v_bfe_u32 v14, v1, 16, 8
; GCN-HSA-NEXT:    s_addc_u32 s5, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v9, v5
; GCN-HSA-NEXT:    v_mov_b32_e32 v11, v5
; GCN-HSA-NEXT:    flat_store_dwordx4 v[12:13], v[14:17]
; GCN-HSA-NEXT:    v_bfe_u32 v10, v2, 8, 8
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, s5
; GCN-HSA-NEXT:    v_mov_b32_e32 v15, s4
; GCN-HSA-NEXT:    v_and_b32_e32 v8, 0xff, v2
; GCN-HSA-NEXT:    flat_store_dwordx4 v[15:16], v[8:11]
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v15, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0x60
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v6, 24, v2
; GCN-HSA-NEXT:    v_bfe_u32 v4, v2, 16, 8
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v12, v5
; GCN-HSA-NEXT:    v_mov_b32_e32 v14, v5
; GCN-HSA-NEXT:    v_mov_b32_e32 v8, v5
; GCN-HSA-NEXT:    v_mov_b32_e32 v10, v5
; GCN-HSA-NEXT:    flat_store_dwordx4 v[15:16], v[4:7]
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, v5
; GCN-HSA-NEXT:    v_mov_b32_e32 v5, s1
; GCN-HSA-NEXT:    v_mov_b32_e32 v4, s0
; GCN-HSA-NEXT:    s_add_u32 s0, s0, 32
; GCN-HSA-NEXT:    v_mov_b32_e32 v20, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v19, s2
; GCN-HSA-NEXT:    s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT:    v_bfe_u32 v13, v3, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v11, 0xff, v3
; GCN-HSA-NEXT:    v_bfe_u32 v9, v0, 8, 8
; GCN-HSA-NEXT:    v_bfe_u32 v17, v1, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v15, 0xff, v1
; GCN-HSA-NEXT:    v_and_b32_e32 v7, 0xff, v0
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT:    flat_store_dwordx4 v[19:20], v[11:14]
; GCN-HSA-NEXT:    flat_store_dwordx4 v[4:5], v[7:10]
; GCN-HSA-NEXT:    flat_store_dwordx4 v[0:1], v[15:18]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_zextload_v16i8_to_v16i64:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v29, 0
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v31, v29
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v25, v29
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v27, v29
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v21, v29
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v23, v29
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v17, v29
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v19, v29
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v13, v29
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v15, v29
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v9, v29
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v11, v29
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v5, v29
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v7, v29
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v30, 24, v3
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v28, v3, 16, 8
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v4, 0xff, v0
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v6, 8, v0
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v8, 0xff, v1
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v10, 8, v1
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v12, 0xff, v3
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v14, 8, v3
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v16, 0xff, v2
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v18, 8, v2
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v22, 24, v0
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v20, v0, 16, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v26, 24, v2
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v24, v2, 16, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v2, 24, v1
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v0, v1, 16, 8
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, v29
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v3, v29
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:112
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:80
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:16
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:64
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:96
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:32
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_zextload_v16i8_to_v16i64:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @14, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @12
; EG-NEXT:    ALU 58, @17, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T8.XYZW, T22.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T9.XYZW, T21.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T10.XYZW, T20.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T11.XYZW, T19.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T12.XYZW, T18.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T13.XYZW, T17.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T14.XYZW, T16.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T15.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 12:
; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 14:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    4(5.605194e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 17:
; EG-NEXT:     MOV * T1.W, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T8.X, T0.W, literal.x, PV.W,
; EG-NEXT:     LSHR * T8.Z, T0.W, literal.y,
; EG-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; EG-NEXT:     MOV T8.Y, 0.0,
; EG-NEXT:     BFE_UINT * T9.Z, T0.W, literal.x, T1.W,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T9.X, T0.W, literal.x,
; EG-NEXT:     MOV * T9.Y, 0.0,
; EG-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T10.X, T0.Z, literal.x, T1.W,
; EG-NEXT:     LSHR * T10.Z, T0.Z, literal.y,
; EG-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; EG-NEXT:     MOV T10.Y, 0.0,
; EG-NEXT:     BFE_UINT * T11.Z, T0.Z, literal.x, T1.W,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T11.X, T0.Z, literal.x,
; EG-NEXT:     MOV * T11.Y, 0.0,
; EG-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T12.X, T0.Y, literal.x, T1.W,
; EG-NEXT:     LSHR * T12.Z, T0.Y, literal.y,
; EG-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; EG-NEXT:     MOV T12.Y, 0.0,
; EG-NEXT:     BFE_UINT * T13.Z, T0.Y, literal.x, T1.W,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T13.X, T0.Y, literal.x,
; EG-NEXT:     MOV * T13.Y, 0.0,
; EG-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T14.X, T0.X, literal.x, T1.W,
; EG-NEXT:     LSHR * T14.Z, T0.X, literal.y,
; EG-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; EG-NEXT:     MOV T14.Y, 0.0,
; EG-NEXT:     BFE_UINT * T0.Z, T0.X, literal.x, T1.W,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T0.X, T0.X, literal.x,
; EG-NEXT:     MOV T0.Y, 0.0,
; EG-NEXT:     MOV T8.W, 0.0,
; EG-NEXT:     MOV * T9.W, 0.0,
; EG-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; EG-NEXT:     MOV T10.W, 0.0,
; EG-NEXT:     MOV * T11.W, 0.0,
; EG-NEXT:     MOV T12.W, 0.0,
; EG-NEXT:     MOV * T13.W, 0.0,
; EG-NEXT:     MOV T14.W, 0.0,
; EG-NEXT:     MOV * T0.W, 0.0,
; EG-NEXT:     LSHR * T15.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T16.X, PV.X, literal.x,
; EG-NEXT:     ADD_INT * T17.X, PV.X, literal.y,
; EG-NEXT:    4(5.605194e-45), 8(1.121039e-44)
; EG-NEXT:     ADD_INT T18.X, T15.X, literal.x,
; EG-NEXT:     ADD_INT * T19.X, T15.X, literal.y,
; EG-NEXT:    12(1.681558e-44), 16(2.242078e-44)
; EG-NEXT:     ADD_INT T20.X, T15.X, literal.x,
; EG-NEXT:     ADD_INT * T21.X, T15.X, literal.y,
; EG-NEXT:    20(2.802597e-44), 24(3.363116e-44)
; EG-NEXT:     ADD_INT * T22.X, T15.X, literal.x,
; EG-NEXT:    28(3.923636e-44), 0(0.000000e+00)
;
; CM-LABEL: global_zextload_v16i8_to_v16i64:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 2, @14, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @12
; CM-NEXT:    ALU 61, @17, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T8, T15.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T9, T22.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T10, T21.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T11, T20.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T12, T19.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0, T18.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T13, T17.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T14, T16.X
; CM-NEXT:    CF_END
; CM-NEXT:    Fetch clause starting at 12:
; CM-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 14:
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x,
; CM-NEXT:    4(5.605194e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 17:
; CM-NEXT:     MOV * T1.W, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT * T8.Z, T0.X, literal.x, PV.W,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T8.X, T0.X, literal.x,
; CM-NEXT:     MOV * T8.Y, 0.0,
; CM-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT T9.X, T0.X, literal.x, T1.W,
; CM-NEXT:     LSHR * T9.Z, T0.X, literal.y,
; CM-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; CM-NEXT:     MOV T9.Y, 0.0,
; CM-NEXT:     BFE_UINT * T10.Z, T0.Y, literal.x, T1.W,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T10.X, T0.Y, literal.x,
; CM-NEXT:     MOV * T10.Y, 0.0,
; CM-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT T11.X, T0.Y, literal.x, T1.W,
; CM-NEXT:     LSHR * T11.Z, T0.Y, literal.y,
; CM-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; CM-NEXT:     MOV T11.Y, 0.0,
; CM-NEXT:     BFE_UINT * T12.Z, T0.Z, literal.x, T1.W,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T12.X, T0.Z, literal.x,
; CM-NEXT:     MOV * T12.Y, 0.0,
; CM-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT T0.X, T0.Z, literal.x, T1.W,
; CM-NEXT:     LSHR * T0.Z, T0.Z, literal.y,
; CM-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; CM-NEXT:     MOV T0.Y, 0.0,
; CM-NEXT:     BFE_UINT * T13.Z, T0.W, literal.x, T1.W,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T13.X, T0.W, literal.x,
; CM-NEXT:     MOV * T13.Y, 0.0,
; CM-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT T14.X, T0.W, literal.x, T1.W,
; CM-NEXT:     LSHR * T14.Z, T0.W, literal.y,
; CM-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; CM-NEXT:     MOV T14.Y, 0.0,
; CM-NEXT:     MOV * T8.W, 0.0,
; CM-NEXT:     MOV * T9.W, 0.0,
; CM-NEXT:     MOV * T10.W, 0.0,
; CM-NEXT:     MOV * T11.W, 0.0,
; CM-NEXT:     MOV * T12.W, 0.0,
; CM-NEXT:     MOV * T0.W, 0.0,
; CM-NEXT:     MOV * T13.W, 0.0,
; CM-NEXT:     MOV * T14.W, 0.0,
; CM-NEXT:     LSHR * T15.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T16.X, PV.X, literal.x,
; CM-NEXT:    28(3.923636e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T17.X, T15.X, literal.x,
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T18.X, T15.X, literal.x,
; CM-NEXT:    20(2.802597e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T19.X, T15.X, literal.x,
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T20.X, T15.X, literal.x,
; CM-NEXT:    12(1.681558e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T21.X, T15.X, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T22.X, T15.X, literal.x,
; CM-NEXT:    4(5.605194e-45), 0(0.000000e+00)
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <16 x i8>, ptr addrspace(1) %in, i32 %tid
  %load = load <16 x i8>, ptr addrspace(1) %in.tid
  %ext = zext <16 x i8> %load to <16 x i64>
  store <16 x i64> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_sextload_v16i8_to_v16i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_sextload_v16i8_to_v16i64:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s3
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[6:7]
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx4 v[2:5], v[0:1], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v1, 16, v5
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v6, 8, v2
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v15, 16, v2
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v16, 24, v2
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v0, v2, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v2, v6, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v6, v1, 0, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v10, 8, v5
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v11, 16, v4
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v9, 31, v5
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v8, 24, v5
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v7, 31, v6
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v12, 24, v4
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[6:9], off, s[0:3], 0 offset:112
; GCN-NOHSA-SI-NEXT:    s_waitcnt expcnt(0)
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v6, v11, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v11, v10, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v9, v5, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v8, v12, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v10, 31, v9
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v12, 31, v11
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v1, 8, v4
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v13, 16, v3
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v14, 8, v3
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[9:12], off, s[0:3], 0 offset:96
; GCN-NOHSA-SI-NEXT:    s_waitcnt expcnt(0)
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v9, 31, v8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v7, 31, v6
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v17, v4, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v19, v1, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v5, v3, 0, 8
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[6:9], off, s[0:3], 0 offset:80
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v11, v16, 0, 8
; GCN-NOHSA-SI-NEXT:    s_waitcnt expcnt(0)
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v9, v15, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v7, v14, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v13, v13, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v18, 31, v17
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v20, 31, v19
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v16, 31, v3
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v15, 24, v3
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v6, 31, v5
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v3, 31, v2
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v12, 31, v11
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v10, 31, v9
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v8, 31, v7
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v14, 31, v13
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[17:20], off, s[0:3], 0 offset:64
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[13:16], off, s[0:3], 0 offset:48
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[5:8], off, s[0:3], 0 offset:32
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[9:12], off, s[0:3], 0 offset:16
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_sextload_v16i8_to_v16i64:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0x70
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v9, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v8, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0x60
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v11, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v10, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0x50
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v15, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v14, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 64
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v17, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 48
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v19, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v18, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 32
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v13, s1
; GCN-HSA-NEXT:    v_mov_b32_e32 v12, s0
; GCN-HSA-NEXT:    s_add_u32 s0, s0, 16
; GCN-HSA-NEXT:    v_mov_b32_e32 v21, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v20, s2
; GCN-HSA-NEXT:    s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v23, s1
; GCN-HSA-NEXT:    v_mov_b32_e32 v22, s0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v4, 16, v3
; GCN-HSA-NEXT:    v_bfe_i32 v4, v4, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v7, 31, v3
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v6, 24, v3
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v5, 31, v4
; GCN-HSA-NEXT:    flat_store_dwordx4 v[8:9], v[4:7]
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v8, 16, v0
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v4, 8, v3
; GCN-HSA-NEXT:    v_bfe_i32 v5, v4, 0, 8
; GCN-HSA-NEXT:    v_bfe_i32 v3, v3, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v4, 31, v3
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v6, 31, v5
; GCN-HSA-NEXT:    flat_store_dwordx4 v[10:11], v[3:6]
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v7, 8, v1
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v3, 16, v2
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v4, 24, v2
; GCN-HSA-NEXT:    v_bfe_i32 v5, v4, 0, 8
; GCN-HSA-NEXT:    v_bfe_i32 v3, v3, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v6, 31, v5
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v4, 31, v3
; GCN-HSA-NEXT:    flat_store_dwordx4 v[14:15], v[3:6]
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v9, 24, v0
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v3, 8, v2
; GCN-HSA-NEXT:    v_bfe_i32 v4, v3, 0, 8
; GCN-HSA-NEXT:    v_bfe_i32 v2, v2, 0, 8
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v6, 16, v1
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v3, 31, v2
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v5, 31, v4
; GCN-HSA-NEXT:    flat_store_dwordx4 v[16:17], v[2:5]
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v10, 8, v0
; GCN-HSA-NEXT:    v_bfe_i32 v2, v6, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v5, 31, v1
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v4, 24, v1
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v3, 31, v2
; GCN-HSA-NEXT:    flat_store_dwordx4 v[18:19], v[2:5]
; GCN-HSA-NEXT:    v_bfe_i32 v6, v7, 0, 8
; GCN-HSA-NEXT:    v_bfe_i32 v4, v1, 0, 8
; GCN-HSA-NEXT:    v_bfe_i32 v0, v0, 0, 8
; GCN-HSA-NEXT:    v_bfe_i32 v2, v10, 0, 8
; GCN-HSA-NEXT:    v_bfe_i32 v10, v9, 0, 8
; GCN-HSA-NEXT:    v_bfe_i32 v8, v8, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v5, 31, v4
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v7, 31, v6
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v3, 31, v2
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v11, 31, v10
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v9, 31, v8
; GCN-HSA-NEXT:    flat_store_dwordx4 v[20:21], v[4:7]
; GCN-HSA-NEXT:    flat_store_dwordx4 v[22:23], v[8:11]
; GCN-HSA-NEXT:    flat_store_dwordx4 v[12:13], v[0:3]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_sextload_v16i8_to_v16i64:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v4, 16, v3
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v4, v4, 0, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v8, 16, v2
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v9, 24, v2
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v7, 31, v3
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v6, 24, v3
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v5, 31, v4
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:112
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v10, 16, v1
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v6, v9, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v4, v8, 0, 8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v7, 31, v6
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v5, 31, v4
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:80
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v11, 16, v0
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v4, v10, 0, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v13, 24, v0
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v16, 8, v0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v7, 31, v1
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v6, 24, v1
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v5, 31, v4
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v14, 8, v3
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v15, 8, v2
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v12, 8, v1
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:48
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v18, v13, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v4, v2, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v2, v16, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v16, v11, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v0, v0, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v10, v12, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v8, v1, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v12, v3, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v6, v15, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v14, v14, 0, 8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v19, 31, v18
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v17, 31, v16
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v5, 31, v4
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v9, 31, v8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v13, 31, v12
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v3, 31, v2
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v11, 31, v10
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v7, 31, v6
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v15, 31, v14
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:16
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:96
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:64
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:32
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_sextload_v16i8_to_v16i64:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @14, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @12
; EG-NEXT:    ALU 67, @17, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T21.XYZW, T22.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T13.XYZW, T16.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T20.XYZW, T15.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T12.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T19.XYZW, T11.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T14.XYZW, T10.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T17.XYZW, T9.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T18.XYZW, T8.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 12:
; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 14:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    4(5.605194e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 17:
; EG-NEXT:     LSHR * T8.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T9.X, PV.X, literal.x,
; EG-NEXT:     ADD_INT * T10.X, PV.X, literal.y,
; EG-NEXT:    4(5.605194e-45), 8(1.121039e-44)
; EG-NEXT:     ADD_INT T11.X, T8.X, literal.x,
; EG-NEXT:     ADD_INT * T12.X, T8.X, literal.y,
; EG-NEXT:    12(1.681558e-44), 16(2.242078e-44)
; EG-NEXT:     BFE_INT * T13.X, T0.W, 0.0, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T14.X, T0.Y, 0.0, literal.x,
; EG-NEXT:     ASHR T13.Y, PV.X, literal.y,
; EG-NEXT:     LSHR T1.W, T0.W, literal.x,
; EG-NEXT:     ADD_INT * T15.X, T8.X, literal.z,
; EG-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; EG-NEXT:    20(2.802597e-44), 0(0.000000e+00)
; EG-NEXT:     ASHR T14.Y, PV.X, literal.x,
; EG-NEXT:     BFE_INT T13.Z, PV.W, 0.0, literal.y,
; EG-NEXT:     LSHR * T1.W, T0.Y, literal.y,
; EG-NEXT:    31(4.344025e-44), 8(1.121039e-44)
; EG-NEXT:     ADD_INT T16.X, T8.X, literal.x,
; EG-NEXT:     BFE_INT T14.Z, PV.W, 0.0, literal.y,
; EG-NEXT:     ASHR * T17.W, T0.X, literal.z, BS:VEC_120/SCL_212
; EG-NEXT:    24(3.363116e-44), 8(1.121039e-44)
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T18.X, T0.X, 0.0, literal.x,
; EG-NEXT:     ASHR T17.Z, T0.X, literal.y,
; EG-NEXT:     LSHR T1.W, T0.X, literal.z,
; EG-NEXT:     ASHR * T19.W, T0.Y, literal.w,
; EG-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; EG-NEXT:    16(2.242078e-44), 31(4.344025e-44)
; EG-NEXT:     BFE_INT T17.X, PV.W, 0.0, literal.x,
; EG-NEXT:     ASHR T18.Y, PV.X, literal.y,
; EG-NEXT:     ASHR T19.Z, T0.Y, literal.z,
; EG-NEXT:     LSHR T1.W, T0.X, literal.x,
; EG-NEXT:     LSHR * T2.W, T0.Y, literal.w,
; EG-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; EG-NEXT:    24(3.363116e-44), 16(2.242078e-44)
; EG-NEXT:     BFE_INT T19.X, PS, 0.0, literal.x,
; EG-NEXT:     ASHR T17.Y, PV.X, literal.y,
; EG-NEXT:     BFE_INT T18.Z, PV.W, 0.0, literal.x,
; EG-NEXT:     ASHR * T20.W, T0.Z, literal.y,
; EG-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; EG-NEXT:     BFE_INT T0.X, T0.Z, 0.0, literal.x,
; EG-NEXT:     ASHR T19.Y, PV.X, literal.y,
; EG-NEXT:     ASHR T20.Z, T0.Z, literal.z,
; EG-NEXT:     LSHR T1.W, T0.Z, literal.w,
; EG-NEXT:     ASHR * T21.W, T0.W, literal.y,
; EG-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; EG-NEXT:    24(3.363116e-44), 16(2.242078e-44)
; EG-NEXT:     BFE_INT T20.X, PV.W, 0.0, literal.x,
; EG-NEXT:     ASHR T0.Y, PV.X, literal.y,
; EG-NEXT:     ASHR T21.Z, T0.W, literal.z,
; EG-NEXT:     LSHR T1.W, T0.Z, literal.x,
; EG-NEXT:     LSHR * T0.W, T0.W, literal.w,
; EG-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; EG-NEXT:    24(3.363116e-44), 16(2.242078e-44)
; EG-NEXT:     BFE_INT T21.X, PS, 0.0, literal.x,
; EG-NEXT:     ASHR T20.Y, PV.X, literal.y,
; EG-NEXT:     BFE_INT T0.Z, PV.W, 0.0, literal.x,
; EG-NEXT:     ASHR T18.W, T18.Z, literal.y,
; EG-NEXT:     ASHR * T14.W, T14.Z, literal.y,
; EG-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; EG-NEXT:     ADD_INT T22.X, T8.X, literal.x,
; EG-NEXT:     ASHR T21.Y, PV.X, literal.y,
; EG-NEXT:     ASHR T0.W, PV.Z, literal.y,
; EG-NEXT:     ASHR * T13.W, T13.Z, literal.y,
; EG-NEXT:    28(3.923636e-44), 31(4.344025e-44)
;
; CM-LABEL: global_sextload_v16i8_to_v16i64:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 2, @14, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @12
; CM-NEXT:    ALU 69, @17, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T21, T8.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0, T22.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T13, T16.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T20, T15.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T18, T12.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T19, T11.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T14, T10.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T17, T9.X
; CM-NEXT:    CF_END
; CM-NEXT:    Fetch clause starting at 12:
; CM-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 14:
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x,
; CM-NEXT:    4(5.605194e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 17:
; CM-NEXT:     LSHR * T8.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T9.X, PV.X, literal.x,
; CM-NEXT:    28(3.923636e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T10.X, T8.X, literal.x,
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T11.X, T8.X, literal.x,
; CM-NEXT:    20(2.802597e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T12.X, T8.X, literal.x,
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T13.X, T0.Y, 0.0, literal.x,
; CM-NEXT:     LSHR T1.Y, T0.X, literal.x,
; CM-NEXT:     LSHR T1.Z, T0.X, literal.y,
; CM-NEXT:     LSHR * T1.W, T0.Y, literal.y,
; CM-NEXT:    8(1.121039e-44), 16(2.242078e-44)
; CM-NEXT:     BFE_INT T14.X, T0.W, 0.0, literal.x,
; CM-NEXT:     ASHR T13.Y, PV.X, literal.y,
; CM-NEXT:     LSHR T2.Z, T0.Z, literal.x,
; CM-NEXT:     LSHR * T2.W, T0.Y, literal.x,
; CM-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; CM-NEXT:     ADD_INT T15.X, T8.X, literal.x,
; CM-NEXT:     ASHR T14.Y, PV.X, literal.y,
; CM-NEXT:     BFE_INT T13.Z, PV.W, 0.0, literal.z,
; CM-NEXT:     LSHR * T2.W, T0.W, literal.z,
; CM-NEXT:    12(1.681558e-44), 31(4.344025e-44)
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT T16.X, T8.X, literal.x,
; CM-NEXT:     LSHR T2.Y, T0.Z, literal.y,
; CM-NEXT:     BFE_INT T14.Z, PV.W, 0.0, literal.x,
; CM-NEXT:     ASHR * T17.W, T0.W, literal.z,
; CM-NEXT:    8(1.121039e-44), 16(2.242078e-44)
; CM-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T18.X, T0.Z, 0.0, literal.x,
; CM-NEXT:     LSHR T3.Y, T0.W, literal.y,
; CM-NEXT:     ASHR T17.Z, T0.W, literal.z,
; CM-NEXT:     ASHR * T19.W, T0.Z, literal.w,
; CM-NEXT:    8(1.121039e-44), 16(2.242078e-44)
; CM-NEXT:    24(3.363116e-44), 31(4.344025e-44)
; CM-NEXT:     BFE_INT T17.X, PV.Y, 0.0, literal.x,
; CM-NEXT:     ASHR T18.Y, PV.X, literal.y,
; CM-NEXT:     ASHR T19.Z, T0.Z, literal.z,
; CM-NEXT:     ASHR * T14.W, T14.Z, literal.y, BS:VEC_120/SCL_212
; CM-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T19.X, T2.Y, 0.0, literal.x,
; CM-NEXT:     ASHR T17.Y, PV.X, literal.y,
; CM-NEXT:     BFE_INT T18.Z, T2.Z, 0.0, literal.x,
; CM-NEXT:     ASHR * T20.W, T0.Y, literal.y, BS:VEC_120/SCL_212
; CM-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; CM-NEXT:     BFE_INT T21.X, T0.X, 0.0, literal.x,
; CM-NEXT:     ASHR T19.Y, PV.X, literal.y,
; CM-NEXT:     ASHR T20.Z, T0.Y, literal.z,
; CM-NEXT:     ASHR * T0.W, T0.X, literal.y,
; CM-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T20.X, T1.W, 0.0, literal.x,
; CM-NEXT:     ASHR T21.Y, PV.X, literal.y,
; CM-NEXT:     ASHR T0.Z, T0.X, literal.z,
; CM-NEXT:     ASHR * T18.W, T18.Z, literal.y,
; CM-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T0.X, T1.Z, 0.0, literal.x,
; CM-NEXT:     ASHR T20.Y, PV.X, literal.y,
; CM-NEXT:     BFE_INT T21.Z, T1.Y, 0.0, literal.x,
; CM-NEXT:     ASHR * T13.W, T13.Z, literal.y, BS:VEC_120/SCL_212
; CM-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; CM-NEXT:     ADD_INT T22.X, T8.X, literal.x,
; CM-NEXT:     ASHR T0.Y, PV.X, literal.y,
; CM-NEXT:     ASHR * T21.W, PV.Z, literal.y,
; CM-NEXT:    4(5.605194e-45), 31(4.344025e-44)
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <16 x i8>, ptr addrspace(1) %in, i32 %tid
  %load = load <16 x i8>, ptr addrspace(1) %in.tid
  %ext = sext <16 x i8> %load to <16 x i64>
  store <16 x i64> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_zextload_v32i8_to_v32i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_zextload_v32i8_to_v32i64:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s3
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[6:7]
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx4 v[18:21], v[0:1], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx4 v[30:33], v[0:1], s[8:11], 0 addr64 offset:16
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v57, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v59, v1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v44, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v46, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v54, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v41, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v51, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v38, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v28, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v35, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v48, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v24, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v26, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v22, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v3, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v16, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v12, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v14, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v8, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v10, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v5, v1
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(1)
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v45, 24, v21
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v43, v21, 16, 8
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v58, 24, v32
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v56, v32, 16, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v42, 24, v20
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v40, v20, 16, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v55, 24, v31
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v53, v31, 16, 8
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[56:59], off, s[0:3], 0 offset:208
; GCN-NOHSA-SI-NEXT:    s_waitcnt expcnt(0)
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v56, v1
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[43:46], off, s[0:3], 0 offset:112
; GCN-NOHSA-SI-NEXT:    s_waitcnt expcnt(0)
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v43, v1
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v9, v19, 8, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v7, 0xff, v19
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v17, v21, 8, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v15, 0xff, v21
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v39, 24, v19
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v37, v19, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v21, v30, 8, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v19, 0xff, v30
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v29, v32, 8, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v27, 0xff, v32
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v52, 24, v30
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v50, v30, 16, 8
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[53:56], off, s[0:3], 0 offset:176
; GCN-NOHSA-SI-NEXT:    s_waitcnt expcnt(0)
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v53, v1
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[40:43], off, s[0:3], 0 offset:80
; GCN-NOHSA-SI-NEXT:    s_waitcnt expcnt(0)
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v40, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v30, v1
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v6, v18, 8, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v4, 0xff, v18
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v13, v20, 8, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v11, 0xff, v20
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v36, 24, v18
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v34, v18, 16, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v2, 24, v33
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v25, v31, 8, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v23, 0xff, v31
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v49, v33, 8, 8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v47, 0xff, v33
; GCN-NOHSA-SI-NEXT:    v_bfe_u32 v0, v33, 16, 8
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[50:53], off, s[0:3], 0 offset:144
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[37:40], off, s[0:3], 0 offset:48
; GCN-NOHSA-SI-NEXT:    s_waitcnt expcnt(0)
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v37, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v50, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v20, v1
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v18, v1
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[27:30], off, s[0:3], 0 offset:192
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[23:26], off, s[0:3], 0 offset:160
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:128
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:240
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[15:18], off, s[0:3], 0 offset:96
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[11:14], off, s[0:3], 0 offset:64
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[7:10], off, s[0:3], 0 offset:32
; GCN-NOHSA-SI-NEXT:    s_waitcnt expcnt(0)
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v7, v1
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[34:37], off, s[0:3], 0 offset:16
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[47:50], off, s[0:3], 0 offset:224
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_zextload_v32i8_to_v32i64:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dwordx4 v[2:5], v[0:1]
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, 16, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dwordx4 v[6:9], v[0:1]
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0x70
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    s_add_u32 s4, s0, 0x50
; GCN-HSA-NEXT:    s_addc_u32 s5, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v15, s5
; GCN-HSA-NEXT:    v_mov_b32_e32 v14, s4
; GCN-HSA-NEXT:    s_add_u32 s4, s0, 48
; GCN-HSA-NEXT:    v_mov_b32_e32 v11, v1
; GCN-HSA-NEXT:    v_mov_b32_e32 v13, v1
; GCN-HSA-NEXT:    s_addc_u32 s5, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v17, v1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(1)
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v12, 24, v4
; GCN-HSA-NEXT:    v_bfe_u32 v10, v4, 16, 8
; GCN-HSA-NEXT:    flat_store_dwordx4 v[14:15], v[10:13]
; GCN-HSA-NEXT:    v_mov_b32_e32 v15, s5
; GCN-HSA-NEXT:    v_mov_b32_e32 v14, s4
; GCN-HSA-NEXT:    s_add_u32 s4, s0, 16
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v12, 24, v3
; GCN-HSA-NEXT:    v_bfe_u32 v10, v3, 16, 8
; GCN-HSA-NEXT:    s_addc_u32 s5, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[14:15], v[10:13]
; GCN-HSA-NEXT:    v_mov_b32_e32 v15, s5
; GCN-HSA-NEXT:    v_mov_b32_e32 v14, s4
; GCN-HSA-NEXT:    s_add_u32 s4, s0, 0xf0
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v12, 24, v2
; GCN-HSA-NEXT:    v_bfe_u32 v10, v2, 16, 8
; GCN-HSA-NEXT:    s_addc_u32 s5, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[14:15], v[10:13]
; GCN-HSA-NEXT:    v_mov_b32_e32 v15, s5
; GCN-HSA-NEXT:    v_mov_b32_e32 v14, s4
; GCN-HSA-NEXT:    s_add_u32 s4, s0, 0xd0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(3)
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v12, 24, v9
; GCN-HSA-NEXT:    v_bfe_u32 v10, v9, 16, 8
; GCN-HSA-NEXT:    s_addc_u32 s5, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[14:15], v[10:13]
; GCN-HSA-NEXT:    v_mov_b32_e32 v15, s5
; GCN-HSA-NEXT:    v_mov_b32_e32 v14, s4
; GCN-HSA-NEXT:    s_add_u32 s4, s0, 0xb0
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v12, 24, v8
; GCN-HSA-NEXT:    v_bfe_u32 v10, v8, 16, 8
; GCN-HSA-NEXT:    s_addc_u32 s5, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[14:15], v[10:13]
; GCN-HSA-NEXT:    v_mov_b32_e32 v15, s5
; GCN-HSA-NEXT:    v_mov_b32_e32 v14, s4
; GCN-HSA-NEXT:    s_add_u32 s4, s0, 0x90
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v12, 24, v7
; GCN-HSA-NEXT:    v_bfe_u32 v10, v7, 16, 8
; GCN-HSA-NEXT:    s_addc_u32 s5, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[14:15], v[10:13]
; GCN-HSA-NEXT:    v_mov_b32_e32 v15, s5
; GCN-HSA-NEXT:    v_mov_b32_e32 v14, s4
; GCN-HSA-NEXT:    s_add_u32 s4, s0, 0x60
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v12, 24, v6
; GCN-HSA-NEXT:    v_bfe_u32 v10, v6, 16, 8
; GCN-HSA-NEXT:    s_addc_u32 s5, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[14:15], v[10:13]
; GCN-HSA-NEXT:    v_mov_b32_e32 v15, s5
; GCN-HSA-NEXT:    v_mov_b32_e32 v14, s4
; GCN-HSA-NEXT:    s_add_u32 s4, s0, 64
; GCN-HSA-NEXT:    v_bfe_u32 v12, v5, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v10, 0xff, v5
; GCN-HSA-NEXT:    s_addc_u32 s5, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[14:15], v[10:13]
; GCN-HSA-NEXT:    v_mov_b32_e32 v15, s5
; GCN-HSA-NEXT:    v_mov_b32_e32 v14, s4
; GCN-HSA-NEXT:    s_add_u32 s4, s0, 32
; GCN-HSA-NEXT:    v_bfe_u32 v12, v4, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v10, 0xff, v4
; GCN-HSA-NEXT:    s_addc_u32 s5, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[14:15], v[10:13]
; GCN-HSA-NEXT:    v_mov_b32_e32 v4, s5
; GCN-HSA-NEXT:    v_bfe_u32 v12, v3, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v10, 0xff, v3
; GCN-HSA-NEXT:    v_mov_b32_e32 v3, s4
; GCN-HSA-NEXT:    s_add_u32 s4, s0, 0xe0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[3:4], v[10:13]
; GCN-HSA-NEXT:    v_mov_b32_e32 v3, s1
; GCN-HSA-NEXT:    v_bfe_u32 v12, v2, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v10, 0xff, v2
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, s0
; GCN-HSA-NEXT:    s_addc_u32 s5, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[2:3], v[10:13]
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, s4
; GCN-HSA-NEXT:    v_bfe_u32 v11, v9, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v9, 0xff, v9
; GCN-HSA-NEXT:    v_mov_b32_e32 v10, v1
; GCN-HSA-NEXT:    v_mov_b32_e32 v12, v1
; GCN-HSA-NEXT:    v_mov_b32_e32 v3, s5
; GCN-HSA-NEXT:    flat_store_dwordx4 v[2:3], v[9:12]
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v2, 24, v5
; GCN-HSA-NEXT:    v_bfe_u32 v0, v5, 16, 8
; GCN-HSA-NEXT:    v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0xc0
; GCN-HSA-NEXT:    v_mov_b32_e32 v3, v1
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT:    v_bfe_u32 v16, v8, 8, 8
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v3, s3
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0xa0
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    s_add_u32 s0, s0, 0x80
; GCN-HSA-NEXT:    v_and_b32_e32 v14, 0xff, v8
; GCN-HSA-NEXT:    v_mov_b32_e32 v15, v1
; GCN-HSA-NEXT:    s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT:    v_bfe_u32 v9, v7, 8, 8
; GCN-HSA-NEXT:    v_bfe_u32 v13, v6, 8, 8
; GCN-HSA-NEXT:    v_and_b32_e32 v11, 0xff, v6
; GCN-HSA-NEXT:    v_and_b32_e32 v7, 0xff, v7
; GCN-HSA-NEXT:    flat_store_dwordx4 v[2:3], v[14:17]
; GCN-HSA-NEXT:    v_mov_b32_e32 v8, v1
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v3, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v14, v1
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT:    flat_store_dwordx4 v[2:3], v[7:10]
; GCN-HSA-NEXT:    flat_store_dwordx4 v[0:1], v[11:14]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_zextload_v32i8_to_v32i64:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v2, vcc, 16, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v3, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx4 v[12:15], v[2:3]
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx4 v[38:41], v[0:1]
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(1)
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v6, 0xff, v14
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v8, 8, v14
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v33, 24, v14
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v31, v14, 16, 8
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v14, 0
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v32, v14
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v34, v14
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v30, 24, v12
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v28, v12, 16, 8
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[31:34], off, s[0:3], 0 offset:208
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v29, v14
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v31, v14
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v9, 0xff, v15
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(1)
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v25, 0xff, v40
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v27, 8, v40
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:144
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v26, v14
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v28, v14
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v0, 0xff, v12
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v2, 8, v12
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v3, 0xff, v13
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v5, 8, v13
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v11, 8, v15
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v44, 24, v13
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v42, v13, 16, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v47, 24, v15
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v45, v15, 16, 8
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v17, 0xff, v38
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v19, 8, v38
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v21, 0xff, v39
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v23, 8, v39
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v15, 24, v41
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v13, v41, 16, 8
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v22, v14
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v24, v14
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v18, v14
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v20, v14
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v16, v14
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v10, v14
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v12, v14
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v7, v14
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[25:28], off, s[0:3], 0 offset:64
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[21:24], off, s[0:3], 0 offset:32
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[17:20], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[13:16], off, s[0:3], 0 offset:112
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[9:12], off, s[0:3], 0 offset:224
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v35, 0xff, v41
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v9, v14
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v37, 8, v41
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v51, 24, v38
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v49, v38, 16, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v54, 24, v40
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v52, v40, 16, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v40, 24, v39
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v38, v39, 16, 8
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v39, v14
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v41, v14
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v46, v14
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v48, v14
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v53, v14
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v55, v14
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[6:9], off, s[0:3], 0 offset:192
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v4, v14
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v6, v14
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[38:41], off, s[0:3], 0 offset:48
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[45:48], off, s[0:3], 0 offset:240
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v43, v14
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v45, v14
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[52:55], off, s[0:3], 0 offset:80
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v50, v14
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v52, v14
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v36, v14
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v38, v14
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[3:6], off, s[0:3], 0 offset:160
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, v14
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v3, v14
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[42:45], off, s[0:3], 0 offset:176
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[49:52], off, s[0:3], 0 offset:16
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[35:38], off, s[0:3], 0 offset:96
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:128
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_zextload_v32i8_to_v32i64:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @26, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @22
; EG-NEXT:    ALU 12, @29, KC0[], KC1[]
; EG-NEXT:    TEX 0 @24
; EG-NEXT:    ALU 102, @42, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T42.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T14.XYZW, T41.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T15.XYZW, T40.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T16.XYZW, T39.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T17.XYZW, T38.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T18.XYZW, T37.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T19.XYZW, T36.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T13.XYZW, T35.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T20.XYZW, T34.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T21.XYZW, T33.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T22.XYZW, T32.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T23.XYZW, T31.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T24.XYZW, T30.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T25.XYZW, T29.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T26.XYZW, T28.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T12.XYZW, T27.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 22:
; EG-NEXT:     VTX_READ_128 T13.XYZW, T12.X, 16, #1
; EG-NEXT:    Fetch clause starting at 24:
; EG-NEXT:     VTX_READ_128 T12.XYZW, T12.X, 0, #1
; EG-NEXT:    ALU clause starting at 26:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    5(7.006492e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T12.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 29:
; EG-NEXT:     MOV * T0.W, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T0.X, T13.W, literal.x, PV.W,
; EG-NEXT:     LSHR * T0.Z, T13.W, literal.y,
; EG-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; EG-NEXT:     MOV T0.Y, 0.0,
; EG-NEXT:     BFE_UINT * T14.Z, T13.W, literal.x, T0.W,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T14.X, T13.W, literal.x,
; EG-NEXT:     MOV * T14.Y, 0.0,
; EG-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT * T15.X, T13.Z, literal.x, T0.W,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:    ALU clause starting at 42:
; EG-NEXT:     LSHR * T15.Z, T13.Z, literal.x,
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; EG-NEXT:     MOV T15.Y, 0.0,
; EG-NEXT:     BFE_UINT * T16.Z, T13.Z, literal.x, T0.W,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T16.X, T13.Z, literal.x,
; EG-NEXT:     MOV * T16.Y, 0.0,
; EG-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T17.X, T13.Y, literal.x, T0.W,
; EG-NEXT:     LSHR * T17.Z, T13.Y, literal.y,
; EG-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; EG-NEXT:     MOV T17.Y, 0.0,
; EG-NEXT:     BFE_UINT * T18.Z, T13.Y, literal.x, T0.W,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T18.X, T13.Y, literal.x,
; EG-NEXT:     MOV * T18.Y, 0.0,
; EG-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T19.X, T13.X, literal.x, T0.W,
; EG-NEXT:     LSHR * T19.Z, T13.X, literal.y,
; EG-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; EG-NEXT:     MOV T19.Y, 0.0,
; EG-NEXT:     BFE_UINT * T13.Z, T13.X, literal.x, T0.W,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T13.X, T13.X, literal.x,
; EG-NEXT:     MOV * T13.Y, 0.0,
; EG-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T20.X, T12.W, literal.x, T0.W,
; EG-NEXT:     LSHR * T20.Z, T12.W, literal.y,
; EG-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; EG-NEXT:     MOV T20.Y, 0.0,
; EG-NEXT:     BFE_UINT * T21.Z, T12.W, literal.x, T0.W,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T21.X, T12.W, literal.x,
; EG-NEXT:     MOV * T21.Y, 0.0,
; EG-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T22.X, T12.Z, literal.x, T0.W,
; EG-NEXT:     LSHR * T22.Z, T12.Z, literal.y,
; EG-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; EG-NEXT:     MOV T22.Y, 0.0,
; EG-NEXT:     BFE_UINT * T23.Z, T12.Z, literal.x, T0.W,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T23.X, T12.Z, literal.x,
; EG-NEXT:     MOV * T23.Y, 0.0,
; EG-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T24.X, T12.Y, literal.x, T0.W,
; EG-NEXT:     LSHR * T24.Z, T12.Y, literal.y,
; EG-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; EG-NEXT:     MOV T24.Y, 0.0,
; EG-NEXT:     BFE_UINT * T25.Z, T12.Y, literal.x, T0.W,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T25.X, T12.Y, literal.x,
; EG-NEXT:     MOV * T25.Y, 0.0,
; EG-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T26.X, T12.X, literal.x, T0.W,
; EG-NEXT:     LSHR * T26.Z, T12.X, literal.y,
; EG-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; EG-NEXT:     MOV T26.Y, 0.0,
; EG-NEXT:     BFE_UINT * T12.Z, T12.X, literal.x, T0.W,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T12.X, T12.X, literal.x,
; EG-NEXT:     MOV T12.Y, 0.0,
; EG-NEXT:     MOV T0.W, 0.0,
; EG-NEXT:     MOV * T14.W, 0.0,
; EG-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; EG-NEXT:     MOV T15.W, 0.0,
; EG-NEXT:     MOV * T16.W, 0.0,
; EG-NEXT:     MOV T17.W, 0.0,
; EG-NEXT:     MOV * T18.W, 0.0,
; EG-NEXT:     MOV T19.W, 0.0,
; EG-NEXT:     MOV * T13.W, 0.0,
; EG-NEXT:     MOV T20.W, 0.0,
; EG-NEXT:     MOV * T21.W, 0.0,
; EG-NEXT:     MOV T22.W, 0.0,
; EG-NEXT:     MOV * T23.W, 0.0,
; EG-NEXT:     MOV T24.W, 0.0,
; EG-NEXT:     MOV * T25.W, 0.0,
; EG-NEXT:     MOV T26.W, 0.0,
; EG-NEXT:     MOV * T12.W, 0.0,
; EG-NEXT:     LSHR * T27.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T28.X, PV.X, literal.x,
; EG-NEXT:     ADD_INT * T29.X, PV.X, literal.y,
; EG-NEXT:    4(5.605194e-45), 8(1.121039e-44)
; EG-NEXT:     ADD_INT T30.X, T27.X, literal.x,
; EG-NEXT:     ADD_INT * T31.X, T27.X, literal.y,
; EG-NEXT:    12(1.681558e-44), 16(2.242078e-44)
; EG-NEXT:     ADD_INT T32.X, T27.X, literal.x,
; EG-NEXT:     ADD_INT * T33.X, T27.X, literal.y,
; EG-NEXT:    20(2.802597e-44), 24(3.363116e-44)
; EG-NEXT:     ADD_INT T34.X, T27.X, literal.x,
; EG-NEXT:     ADD_INT * T35.X, T27.X, literal.y,
; EG-NEXT:    28(3.923636e-44), 32(4.484155e-44)
; EG-NEXT:     ADD_INT T36.X, T27.X, literal.x,
; EG-NEXT:     ADD_INT * T37.X, T27.X, literal.y,
; EG-NEXT:    36(5.044674e-44), 40(5.605194e-44)
; EG-NEXT:     ADD_INT T38.X, T27.X, literal.x,
; EG-NEXT:     ADD_INT * T39.X, T27.X, literal.y,
; EG-NEXT:    44(6.165713e-44), 48(6.726233e-44)
; EG-NEXT:     ADD_INT T40.X, T27.X, literal.x,
; EG-NEXT:     ADD_INT * T41.X, T27.X, literal.y,
; EG-NEXT:    52(7.286752e-44), 56(7.847271e-44)
; EG-NEXT:     ADD_INT * T42.X, T27.X, literal.x,
; EG-NEXT:    60(8.407791e-44), 0(0.000000e+00)
;
; CM-LABEL: global_zextload_v32i8_to_v32i64:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 2, @26, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @22
; CM-NEXT:    ALU 12, @29, KC0[], KC1[]
; CM-NEXT:    TEX 0 @24
; CM-NEXT:    ALU 108, @42, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0, T27.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T14, T42.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T12, T41.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T16, T40.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T17, T39.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T13, T38.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T18, T37.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T19, T36.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T20, T35.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T21, T34.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T22, T33.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T23, T32.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T24, T31.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T15, T30.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T25, T29.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T26, T28.X
; CM-NEXT:    CF_END
; CM-NEXT:    Fetch clause starting at 22:
; CM-NEXT:     VTX_READ_128 T13.XYZW, T12.X, 0, #1
; CM-NEXT:    Fetch clause starting at 24:
; CM-NEXT:     VTX_READ_128 T15.XYZW, T12.X, 16, #1
; CM-NEXT:    ALU clause starting at 26:
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x,
; CM-NEXT:    5(7.006492e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T12.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 29:
; CM-NEXT:     MOV * T0.W, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT * T0.Z, T13.X, literal.x, PV.W,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.X, T13.X, literal.x,
; CM-NEXT:     MOV * T0.Y, 0.0,
; CM-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT T14.X, T13.X, literal.x, T0.W,
; CM-NEXT:     LSHR * T14.Z, T13.X, literal.y,
; CM-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; CM-NEXT:     MOV T14.Y, 0.0,
; CM-NEXT:     BFE_UINT * T12.Z, T13.Y, literal.x, T0.W,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:    ALU clause starting at 42:
; CM-NEXT:     AND_INT T12.X, T13.Y, literal.x,
; CM-NEXT:     MOV * T12.Y, 0.0,
; CM-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT T16.X, T13.Y, literal.x, T0.W,
; CM-NEXT:     LSHR * T16.Z, T13.Y, literal.y,
; CM-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; CM-NEXT:     MOV T16.Y, 0.0,
; CM-NEXT:     BFE_UINT * T17.Z, T13.Z, literal.x, T0.W,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T17.X, T13.Z, literal.x,
; CM-NEXT:     MOV * T17.Y, 0.0,
; CM-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT T13.X, T13.Z, literal.x, T0.W,
; CM-NEXT:     LSHR * T13.Z, T13.Z, literal.y,
; CM-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; CM-NEXT:     MOV T13.Y, 0.0,
; CM-NEXT:     BFE_UINT * T18.Z, T13.W, literal.x, T0.W,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T18.X, T13.W, literal.x,
; CM-NEXT:     MOV * T18.Y, 0.0,
; CM-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT T19.X, T13.W, literal.x, T0.W,
; CM-NEXT:     LSHR * T19.Z, T13.W, literal.y,
; CM-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; CM-NEXT:     MOV T19.Y, 0.0,
; CM-NEXT:     BFE_UINT * T20.Z, T15.X, literal.x, T0.W,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T20.X, T15.X, literal.x,
; CM-NEXT:     MOV * T20.Y, 0.0,
; CM-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT T21.X, T15.X, literal.x, T0.W,
; CM-NEXT:     LSHR * T21.Z, T15.X, literal.y,
; CM-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; CM-NEXT:     MOV T21.Y, 0.0,
; CM-NEXT:     BFE_UINT * T22.Z, T15.Y, literal.x, T0.W,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T22.X, T15.Y, literal.x,
; CM-NEXT:     MOV * T22.Y, 0.0,
; CM-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT T23.X, T15.Y, literal.x, T0.W,
; CM-NEXT:     LSHR * T23.Z, T15.Y, literal.y,
; CM-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; CM-NEXT:     MOV T23.Y, 0.0,
; CM-NEXT:     BFE_UINT * T24.Z, T15.Z, literal.x, T0.W,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T24.X, T15.Z, literal.x,
; CM-NEXT:     MOV * T24.Y, 0.0,
; CM-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT T15.X, T15.Z, literal.x, T0.W,
; CM-NEXT:     LSHR * T15.Z, T15.Z, literal.y,
; CM-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; CM-NEXT:     MOV T15.Y, 0.0,
; CM-NEXT:     BFE_UINT * T25.Z, T15.W, literal.x, T0.W,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T25.X, T15.W, literal.x,
; CM-NEXT:     MOV * T25.Y, 0.0,
; CM-NEXT:    255(3.573311e-43), 0(0.000000e+00)
; CM-NEXT:     BFE_UINT T26.X, T15.W, literal.x, T0.W,
; CM-NEXT:     LSHR * T26.Z, T15.W, literal.y,
; CM-NEXT:    16(2.242078e-44), 24(3.363116e-44)
; CM-NEXT:     MOV T26.Y, 0.0,
; CM-NEXT:     MOV * T0.W, 0.0,
; CM-NEXT:     MOV * T14.W, 0.0,
; CM-NEXT:     MOV * T12.W, 0.0,
; CM-NEXT:     MOV * T16.W, 0.0,
; CM-NEXT:     MOV * T17.W, 0.0,
; CM-NEXT:     MOV * T13.W, 0.0,
; CM-NEXT:     MOV * T18.W, 0.0,
; CM-NEXT:     MOV * T19.W, 0.0,
; CM-NEXT:     MOV * T20.W, 0.0,
; CM-NEXT:     MOV * T21.W, 0.0,
; CM-NEXT:     MOV * T22.W, 0.0,
; CM-NEXT:     MOV * T23.W, 0.0,
; CM-NEXT:     MOV * T24.W, 0.0,
; CM-NEXT:     MOV * T15.W, 0.0,
; CM-NEXT:     MOV * T25.W, 0.0,
; CM-NEXT:     MOV * T26.W, 0.0,
; CM-NEXT:     LSHR * T27.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T28.X, PV.X, literal.x,
; CM-NEXT:    60(8.407791e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T29.X, T27.X, literal.x,
; CM-NEXT:    56(7.847271e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T30.X, T27.X, literal.x,
; CM-NEXT:    52(7.286752e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T31.X, T27.X, literal.x,
; CM-NEXT:    48(6.726233e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T32.X, T27.X, literal.x,
; CM-NEXT:    44(6.165713e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T33.X, T27.X, literal.x,
; CM-NEXT:    40(5.605194e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T34.X, T27.X, literal.x,
; CM-NEXT:    36(5.044674e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T35.X, T27.X, literal.x,
; CM-NEXT:    32(4.484155e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T36.X, T27.X, literal.x,
; CM-NEXT:    28(3.923636e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T37.X, T27.X, literal.x,
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T38.X, T27.X, literal.x,
; CM-NEXT:    20(2.802597e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T39.X, T27.X, literal.x,
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T40.X, T27.X, literal.x,
; CM-NEXT:    12(1.681558e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T41.X, T27.X, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T42.X, T27.X, literal.x,
; CM-NEXT:    4(5.605194e-45), 0(0.000000e+00)
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <32 x i8>, ptr addrspace(1) %in, i32 %tid
  %load = load <32 x i8>, ptr addrspace(1) %in.tid
  %ext = zext <32 x i8> %load to <32 x i64>
  store <32 x i64> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_sextload_v32i8_to_v32i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_sextload_v32i8_to_v32i64:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s3
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[6:7]
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx4 v[4:7], v[0:1], s[8:11], 0 addr64 offset:16
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx4 v[0:3], v[0:1], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(1)
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v12, 16, v7
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v12, v12, 0, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v16, 8, v7
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v15, 31, v7
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v14, 24, v7
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v13, 31, v12
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:240
; GCN-NOHSA-SI-NEXT:    s_waitcnt expcnt(0)
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v14, v16, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v12, v7, 0, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v17, 16, v6
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v18, 24, v6
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v13, 31, v12
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v15, 31, v14
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:224
; GCN-NOHSA-SI-NEXT:    s_waitcnt expcnt(0)
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v14, v18, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v12, v17, 0, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v19, 8, v6
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v15, 31, v14
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v13, 31, v12
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v11, 16, v5
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:208
; GCN-NOHSA-SI-NEXT:    s_waitcnt expcnt(0)
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v14, v19, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v12, v6, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v13, 31, v12
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v15, 31, v14
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v11, v11, 0, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v10, 8, v5
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v8, 16, v4
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v9, 24, v4
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:192
; GCN-NOHSA-SI-NEXT:    s_waitcnt expcnt(0)
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v14, 31, v5
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v13, 24, v5
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v12, 31, v11
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[11:14], off, s[0:3], 0 offset:176
; GCN-NOHSA-SI-NEXT:    s_waitcnt expcnt(0)
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v12, v10, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v10, v5, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v7, v9, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v5, v8, 0, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v20, 8, v4
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v8, 31, v7
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v6, 31, v5
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v11, 31, v10
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v13, 31, v12
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[5:8], off, s[0:3], 0 offset:144
; GCN-NOHSA-SI-NEXT:    s_waitcnt expcnt(0)
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v7, v4, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v9, v20, 0, 8
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(6)
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v16, 16, v3
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:160
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v8, 31, v7
; GCN-NOHSA-SI-NEXT:    s_waitcnt expcnt(0)
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v10, 31, v9
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[7:10], off, s[0:3], 0 offset:128
; GCN-NOHSA-SI-NEXT:    s_waitcnt expcnt(0)
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v7, v16, 0, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v17, 8, v3
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v11, 16, v0
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v10, 31, v3
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v9, 24, v3
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v8, 31, v7
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[7:10], off, s[0:3], 0 offset:112
; GCN-NOHSA-SI-NEXT:    s_waitcnt expcnt(0)
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v8, v11, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v13, v17, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v11, v3, 0, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v18, 16, v2
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v15, 24, v2
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v12, 31, v11
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v14, 31, v13
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[11:14], off, s[0:3], 0 offset:96
; GCN-NOHSA-SI-NEXT:    s_waitcnt expcnt(0)
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v13, v15, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v11, v18, 0, 8
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v19, 16, v1
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v14, 31, v13
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v12, 31, v11
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v21, 8, v1
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[11:14], off, s[0:3], 0 offset:80
; GCN-NOHSA-SI-NEXT:    s_waitcnt expcnt(0)
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v12, v1, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v16, v19, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v19, 31, v1
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v18, 24, v1
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v1, 8, v2
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v5, 24, v0
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v6, 8, v0
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v4, v0, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v0, v2, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v2, v1, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v6, v6, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v10, v5, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v14, v21, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v3, 31, v2
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v5, 31, v4
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v7, 31, v6
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v11, 31, v10
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v9, 31, v8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v13, 31, v12
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v15, 31, v14
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v17, 31, v16
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:48
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:32
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:16
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_sextload_v32i8_to_v32i64:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dwordx4 v[4:7], v[0:1]
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, 16, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0x70
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v13, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v12, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0x60
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v15, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v14, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0x50
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v17, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 64
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v19, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v18, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 48
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(1)
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v8, 16, v7
; GCN-HSA-NEXT:    v_bfe_i32 v8, v8, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v11, 31, v7
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v10, 24, v7
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v9, 31, v8
; GCN-HSA-NEXT:    flat_store_dwordx4 v[12:13], v[8:11]
; GCN-HSA-NEXT:    v_mov_b32_e32 v12, s3
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v8, 8, v7
; GCN-HSA-NEXT:    v_bfe_i32 v9, v8, 0, 8
; GCN-HSA-NEXT:    v_bfe_i32 v7, v7, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v8, 31, v7
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v10, 31, v9
; GCN-HSA-NEXT:    flat_store_dwordx4 v[14:15], v[7:10]
; GCN-HSA-NEXT:    v_mov_b32_e32 v11, s2
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v7, 16, v6
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v8, 24, v6
; GCN-HSA-NEXT:    v_bfe_i32 v9, v8, 0, 8
; GCN-HSA-NEXT:    v_bfe_i32 v7, v7, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v10, 31, v9
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v8, 31, v7
; GCN-HSA-NEXT:    flat_store_dwordx4 v[16:17], v[7:10]
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 32
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v7, 8, v6
; GCN-HSA-NEXT:    v_bfe_i32 v8, v7, 0, 8
; GCN-HSA-NEXT:    v_bfe_i32 v6, v6, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v7, 31, v6
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v9, 31, v8
; GCN-HSA-NEXT:    flat_store_dwordx4 v[18:19], v[6:9]
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v10, 8, v5
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v6, 16, v5
; GCN-HSA-NEXT:    v_bfe_i32 v6, v6, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v9, 31, v5
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v8, 24, v5
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v7, 31, v6
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[11:12], v[6:9]
; GCN-HSA-NEXT:    v_bfe_i32 v5, v5, 0, 8
; GCN-HSA-NEXT:    v_bfe_i32 v7, v10, 0, 8
; GCN-HSA-NEXT:    v_mov_b32_e32 v14, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v13, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 16
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v17, 16, v4
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v9, 24, v4
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v6, 31, v5
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v8, 31, v7
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[13:14], v[5:8]
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, s3
; GCN-HSA-NEXT:    v_bfe_i32 v7, v9, 0, 8
; GCN-HSA-NEXT:    v_bfe_i32 v5, v17, 0, 8
; GCN-HSA-NEXT:    v_mov_b32_e32 v15, s2
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v11, 8, v4
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v8, 31, v7
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v6, 31, v5
; GCN-HSA-NEXT:    v_bfe_i32 v4, v4, 0, 8
; GCN-HSA-NEXT:    flat_store_dwordx4 v[15:16], v[5:8]
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0xf0
; GCN-HSA-NEXT:    v_bfe_i32 v6, v11, 0, 8
; GCN-HSA-NEXT:    s_waitcnt vmcnt(7)
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v10, 16, v3
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v5, 31, v4
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v7, 31, v6
; GCN-HSA-NEXT:    v_mov_b32_e32 v9, s1
; GCN-HSA-NEXT:    v_mov_b32_e32 v8, s0
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[8:9], v[4:7]
; GCN-HSA-NEXT:    v_mov_b32_e32 v9, s3
; GCN-HSA-NEXT:    v_bfe_i32 v4, v10, 0, 8
; GCN-HSA-NEXT:    v_mov_b32_e32 v8, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0xe0
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v12, 8, v3
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v5, 31, v4
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v7, 31, v3
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v6, 24, v3
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[8:9], v[4:7]
; GCN-HSA-NEXT:    v_bfe_i32 v3, v3, 0, 8
; GCN-HSA-NEXT:    v_bfe_i32 v5, v12, 0, 8
; GCN-HSA-NEXT:    v_mov_b32_e32 v8, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v7, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0xd0
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v13, 16, v2
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v14, 24, v2
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v4, 31, v3
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v6, 31, v5
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[7:8], v[3:6]
; GCN-HSA-NEXT:    v_bfe_i32 v7, v14, 0, 8
; GCN-HSA-NEXT:    v_bfe_i32 v5, v13, 0, 8
; GCN-HSA-NEXT:    v_mov_b32_e32 v10, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v9, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0xc0
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v17, 8, v2
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v15, 16, v0
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v16, 24, v0
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v8, 31, v7
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v6, 31, v5
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[9:10], v[5:8]
; GCN-HSA-NEXT:    v_bfe_i32 v13, v16, 0, 8
; GCN-HSA-NEXT:    v_bfe_i32 v7, v2, 0, 8
; GCN-HSA-NEXT:    v_bfe_i32 v11, v15, 0, 8
; GCN-HSA-NEXT:    v_bfe_i32 v9, v17, 0, 8
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v15, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0xb0
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v18, 16, v1
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v8, 31, v7
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v10, 31, v9
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v19, 8, v1
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v20, 8, v0
; GCN-HSA-NEXT:    v_bfe_i32 v3, v0, 0, 8
; GCN-HSA-NEXT:    flat_store_dwordx4 v[15:16], v[7:10]
; GCN-HSA-NEXT:    v_bfe_i32 v15, v18, 0, 8
; GCN-HSA-NEXT:    v_bfe_i32 v7, v1, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v18, 31, v1
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v17, 24, v1
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0xa0
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v16, 31, v15
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[0:1], v[15:18]
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 0x90
; GCN-HSA-NEXT:    v_bfe_i32 v9, v19, 0, 8
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v8, 31, v7
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v10, 31, v9
; GCN-HSA-NEXT:    s_add_u32 s0, s0, 0x80
; GCN-HSA-NEXT:    v_bfe_i32 v5, v20, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v14, 31, v13
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v12, 31, v11
; GCN-HSA-NEXT:    flat_store_dwordx4 v[0:1], v[7:10]
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v4, 31, v3
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v6, 31, v5
; GCN-HSA-NEXT:    flat_store_dwordx4 v[0:1], v[11:14]
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT:    flat_store_dwordx4 v[0:1], v[3:6]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_sextload_v32i8_to_v32i64:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v4, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx4 v[0:3], v[4:5]
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v4, vcc, 16, v4
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx4 v[4:7], v[4:5]
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(1)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v10, 16, v3
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v10, v10, 0, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v14, 16, v2
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v15, 24, v2
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v13, 31, v3
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v12, 24, v3
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v11, 31, v10
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:112
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v16, 16, v1
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v12, v15, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v10, v14, 0, 8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v13, 31, v12
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v11, 31, v10
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:80
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v17, 16, v0
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v10, v16, 0, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v18, 24, v0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v13, 31, v1
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v12, 24, v1
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v11, 31, v10
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:48
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v19, 8, v3
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v13, v18, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v11, v17, 0, 8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v14, 31, v13
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v12, 31, v11
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[11:14], off, s[0:3], 0 offset:16
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v9, 8, v2
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v11, v3, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v13, v19, 0, 8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v12, 31, v11
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v14, 31, v13
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v8, 8, v1
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v10, v2, 0, 8
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[11:14], off, s[0:3], 0 offset:96
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v16, v8, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v14, v1, 0, 8
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(5)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v1, 16, v7
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v12, v9, 0, 8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v11, 31, v10
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v13, 31, v12
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v8, v1, 0, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v2, 16, v6
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v3, 24, v6
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:64
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v9, 31, v8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v11, 31, v7
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v10, 24, v7
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:240
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v12, 16, v5
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v10, v3, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v8, v2, 0, 8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v11, 31, v10
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v9, 31, v8
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:208
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v13, 16, v4
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v8, v12, 0, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v18, 24, v4
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v15, 31, v14
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v17, 31, v16
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v11, 31, v5
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v10, 24, v5
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v9, 31, v8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v2, 8, v7
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v20, 8, v5
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:32
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:176
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v16, v2, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v10, v18, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v8, v13, 0, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v2, 8, v0
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v19, 8, v6
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v14, 8, v4
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v11, 31, v10
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v9, 31, v8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v12, v20, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v18, v0, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v20, v2, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v1, v4, 0, 8
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:144
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v6, v6, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v3, v14, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v8, v19, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v10, v5, 0, 8
; GCN-NOHSA-VI-NEXT:    v_bfe_i32 v14, v7, 0, 8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v19, 31, v18
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v21, 31, v20
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v2, 31, v1
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v7, 31, v6
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v4, 31, v3
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v11, 31, v10
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v13, 31, v12
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v9, 31, v8
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v15, 31, v14
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v17, 31, v16
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[18:21], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[14:17], off, s[0:3], 0 offset:224
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[6:9], off, s[0:3], 0 offset:192
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:160
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[1:4], off, s[0:3], 0 offset:128
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_sextload_v32i8_to_v32i64:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @26, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 1 @22
; EG-NEXT:    ALU 83, @29, KC0[CB0:0-32], KC1[]
; EG-NEXT:    ALU 50, @113, KC0[], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T41.XYZW, T42.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T26.XYZW, T31.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T40.XYZW, T30.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T25.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T39.XYZW, T24.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T27.XYZW, T23.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T12.XYZW, T22.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T28.XYZW, T21.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T37.XYZW, T20.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T29.XYZW, T19.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T35.XYZW, T18.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T33.XYZW, T17.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T34.XYZW, T16.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T38.XYZW, T15.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T32.XYZW, T14.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T36.XYZW, T13.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 22:
; EG-NEXT:     VTX_READ_128 T12.XYZW, T0.X, 0, #1
; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 16, #1
; EG-NEXT:    ALU clause starting at 26:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    5(7.006492e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 29:
; EG-NEXT:     LSHR * T13.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T14.X, PV.X, literal.x,
; EG-NEXT:     ADD_INT * T15.X, PV.X, literal.y,
; EG-NEXT:    4(5.605194e-45), 8(1.121039e-44)
; EG-NEXT:     ADD_INT T16.X, T13.X, literal.x,
; EG-NEXT:     ADD_INT * T17.X, T13.X, literal.y,
; EG-NEXT:    12(1.681558e-44), 16(2.242078e-44)
; EG-NEXT:     ADD_INT T18.X, T13.X, literal.x,
; EG-NEXT:     ADD_INT * T19.X, T13.X, literal.y,
; EG-NEXT:    20(2.802597e-44), 24(3.363116e-44)
; EG-NEXT:     ADD_INT T20.X, T13.X, literal.x,
; EG-NEXT:     ADD_INT * T21.X, T13.X, literal.y,
; EG-NEXT:    28(3.923636e-44), 32(4.484155e-44)
; EG-NEXT:     ADD_INT T22.X, T13.X, literal.x,
; EG-NEXT:     ADD_INT * T23.X, T13.X, literal.y,
; EG-NEXT:    36(5.044674e-44), 40(5.605194e-44)
; EG-NEXT:     ADD_INT T24.X, T13.X, literal.x,
; EG-NEXT:     ADD_INT * T25.X, T13.X, literal.y,
; EG-NEXT:    44(6.165713e-44), 48(6.726233e-44)
; EG-NEXT:     BFE_INT * T26.X, T0.W, 0.0, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T27.X, T0.Y, 0.0, literal.x,
; EG-NEXT:     ASHR T26.Y, PV.X, literal.y,
; EG-NEXT:     LSHR * T1.W, T0.W, literal.x,
; EG-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; EG-NEXT:     BFE_INT T28.X, T0.X, 0.0, literal.x,
; EG-NEXT:     ASHR T27.Y, PV.X, literal.y,
; EG-NEXT:     BFE_INT T26.Z, PV.W, 0.0, literal.x,
; EG-NEXT:     LSHR * T1.W, T0.Y, literal.x,
; EG-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; EG-NEXT:     BFE_INT T29.X, T12.W, 0.0, literal.x,
; EG-NEXT:     ASHR T28.Y, PV.X, literal.y,
; EG-NEXT:     BFE_INT T27.Z, PV.W, 0.0, literal.x,
; EG-NEXT:     LSHR T1.W, T0.X, literal.x,
; EG-NEXT:     ADD_INT * T30.X, T13.X, literal.z,
; EG-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; EG-NEXT:    52(7.286752e-44), 0(0.000000e+00)
; EG-NEXT:     ASHR T29.Y, PV.X, literal.x,
; EG-NEXT:     BFE_INT T28.Z, PV.W, 0.0, literal.y,
; EG-NEXT:     LSHR * T1.W, T12.W, literal.y,
; EG-NEXT:    31(4.344025e-44), 8(1.121039e-44)
; EG-NEXT:     ADD_INT T31.X, T13.X, literal.x,
; EG-NEXT:     BFE_INT T29.Z, PV.W, 0.0, literal.y,
; EG-NEXT:     ASHR * T32.W, T12.X, literal.z, BS:VEC_120/SCL_212
; EG-NEXT:    56(7.847271e-44), 8(1.121039e-44)
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T33.X, T12.Z, 0.0, literal.x,
; EG-NEXT:     LSHR T1.Y, T0.Z, literal.x, BS:VEC_120/SCL_212
; EG-NEXT:     ASHR T32.Z, T12.X, literal.y,
; EG-NEXT:     LSHR T1.W, T12.X, literal.z,
; EG-NEXT:     ASHR * T34.W, T12.Y, literal.w,
; EG-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; EG-NEXT:    16(2.242078e-44), 31(4.344025e-44)
; EG-NEXT:     BFE_INT T32.X, PV.W, 0.0, literal.x,
; EG-NEXT:     ASHR T33.Y, PV.X, literal.y,
; EG-NEXT:     ASHR T34.Z, T12.Y, literal.z,
; EG-NEXT:     LSHR T1.W, T12.Z, literal.x,
; EG-NEXT:     LSHR * T2.W, T12.Y, literal.w,
; EG-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; EG-NEXT:    24(3.363116e-44), 16(2.242078e-44)
; EG-NEXT:     BFE_INT T34.X, PS, 0.0, literal.x,
; EG-NEXT:     ASHR T32.Y, PV.X, literal.y,
; EG-NEXT:     BFE_INT T33.Z, PV.W, 0.0, literal.x,
; EG-NEXT:     LSHR T1.W, T0.W, literal.z,
; EG-NEXT:     ASHR * T35.W, T12.Z, literal.y,
; EG-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T36.X, T12.X, 0.0, literal.x,
; EG-NEXT:     ASHR T34.Y, PV.X, literal.y,
; EG-NEXT:     ASHR T35.Z, T12.Z, literal.z,
; EG-NEXT:     LSHR T2.W, T12.Z, literal.w,
; EG-NEXT:     ASHR * T37.W, T12.W, literal.y,
; EG-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; EG-NEXT:    24(3.363116e-44), 16(2.242078e-44)
; EG-NEXT:     BFE_INT T35.X, PV.W, 0.0, literal.x,
; EG-NEXT:     ASHR T36.Y, PV.X, literal.y,
; EG-NEXT:     ASHR T37.Z, T12.W, literal.z,
; EG-NEXT:     LSHR T2.W, T12.X, literal.x,
; EG-NEXT:     LSHR * T3.W, T12.W, literal.w,
; EG-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; EG-NEXT:    24(3.363116e-44), 16(2.242078e-44)
; EG-NEXT:     BFE_INT * T37.X, PS, 0.0, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:    ALU clause starting at 113:
; EG-NEXT:     ASHR T35.Y, T35.X, literal.x,
; EG-NEXT:     BFE_INT T36.Z, T2.W, 0.0, literal.y,
; EG-NEXT:     LSHR T2.W, T0.Z, literal.z,
; EG-NEXT:     ASHR * T12.W, T0.X, literal.x,
; EG-NEXT:    31(4.344025e-44), 8(1.121039e-44)
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T38.X, T12.Y, 0.0, literal.x,
; EG-NEXT:     ASHR T37.Y, T37.X, literal.y,
; EG-NEXT:     ASHR T12.Z, T0.X, literal.z, BS:VEC_120/SCL_212
; EG-NEXT:     LSHR T3.W, T0.X, literal.w, BS:VEC_120/SCL_212
; EG-NEXT:     ASHR * T39.W, T0.Y, literal.y,
; EG-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; EG-NEXT:    24(3.363116e-44), 16(2.242078e-44)
; EG-NEXT:     BFE_INT T12.X, PV.W, 0.0, literal.x,
; EG-NEXT:     ASHR T38.Y, PV.X, literal.y,
; EG-NEXT:     ASHR T39.Z, T0.Y, literal.z,
; EG-NEXT:     LSHR T3.W, T12.Y, literal.x, BS:VEC_120/SCL_212
; EG-NEXT:     LSHR * T4.W, T0.Y, literal.w,
; EG-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; EG-NEXT:    24(3.363116e-44), 16(2.242078e-44)
; EG-NEXT:     BFE_INT T39.X, PS, 0.0, literal.x,
; EG-NEXT:     ASHR T12.Y, PV.X, literal.y,
; EG-NEXT:     BFE_INT T38.Z, PV.W, 0.0, literal.x,
; EG-NEXT:     ASHR T36.W, T36.Z, literal.y,
; EG-NEXT:     ASHR * T40.W, T0.Z, literal.y,
; EG-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; EG-NEXT:     BFE_INT T0.X, T0.Z, 0.0, literal.x,
; EG-NEXT:     ASHR T39.Y, PV.X, literal.y,
; EG-NEXT:     ASHR T40.Z, T0.Z, literal.z,
; EG-NEXT:     ASHR T38.W, PV.Z, literal.y,
; EG-NEXT:     ASHR * T41.W, T0.W, literal.y,
; EG-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T40.X, T2.W, 0.0, literal.x,
; EG-NEXT:     ASHR T0.Y, PV.X, literal.y,
; EG-NEXT:     ASHR T41.Z, T0.W, literal.z, BS:VEC_120/SCL_212
; EG-NEXT:     ASHR T33.W, T33.Z, literal.y,
; EG-NEXT:     ASHR * T29.W, T29.Z, literal.y,
; EG-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T41.X, T1.W, 0.0, literal.x,
; EG-NEXT:     ASHR T40.Y, PV.X, literal.y,
; EG-NEXT:     BFE_INT T0.Z, T1.Y, 0.0, literal.x,
; EG-NEXT:     ASHR T28.W, T28.Z, literal.y,
; EG-NEXT:     ASHR * T27.W, T27.Z, literal.y,
; EG-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; EG-NEXT:     ADD_INT T42.X, T13.X, literal.x,
; EG-NEXT:     ASHR T41.Y, PV.X, literal.y,
; EG-NEXT:     ASHR T0.W, PV.Z, literal.y,
; EG-NEXT:     ASHR * T26.W, T26.Z, literal.y,
; EG-NEXT:    60(8.407791e-44), 31(4.344025e-44)
;
; CM-LABEL: global_sextload_v32i8_to_v32i64:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 2, @26, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 1 @22
; CM-NEXT:    ALU 86, @29, KC0[CB0:0-32], KC1[]
; CM-NEXT:    ALU 52, @116, KC0[], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T41, T13.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0, T42.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T28, T31.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T40, T30.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T38, T25.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T39, T24.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T36, T23.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T37, T22.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T33, T21.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T12, T20.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T29, T19.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T35, T18.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T27, T17.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T34, T16.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T26, T15.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T32, T14.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 22:
; CM-NEXT:     VTX_READ_128 T12.XYZW, T0.X, 16, #1
; CM-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 26:
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x,
; CM-NEXT:    5(7.006492e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 29:
; CM-NEXT:     LSHR * T13.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T14.X, PV.X, literal.x,
; CM-NEXT:    60(8.407791e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T15.X, T13.X, literal.x,
; CM-NEXT:    56(7.847271e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T16.X, T13.X, literal.x,
; CM-NEXT:    52(7.286752e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T17.X, T13.X, literal.x,
; CM-NEXT:    48(6.726233e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T18.X, T13.X, literal.x,
; CM-NEXT:    44(6.165713e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T19.X, T13.X, literal.x,
; CM-NEXT:    40(5.605194e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T20.X, T13.X, literal.x,
; CM-NEXT:    36(5.044674e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T21.X, T13.X, literal.x,
; CM-NEXT:    32(4.484155e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T22.X, T13.X, literal.x,
; CM-NEXT:    28(3.923636e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT T23.X, T13.X, literal.x,
; CM-NEXT:     LSHR T1.Z, T0.X, literal.y, BS:VEC_120/SCL_212
; CM-NEXT:     LSHR * T1.W, T0.X, literal.z, BS:VEC_120/SCL_212
; CM-NEXT:    24(3.363116e-44), 8(1.121039e-44)
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT T24.X, T13.X, literal.x,
; CM-NEXT:     LSHR T1.Y, T0.Y, literal.y,
; CM-NEXT:     LSHR T2.Z, T0.Z, literal.z,
; CM-NEXT:     LSHR * T2.W, T0.Z, literal.y,
; CM-NEXT:    20(2.802597e-44), 16(2.242078e-44)
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT T25.X, T13.X, literal.x,
; CM-NEXT:     LSHR T2.Y, T0.W, literal.x,
; CM-NEXT:     LSHR T3.Z, T0.W, literal.y,
; CM-NEXT:     LSHR * T3.W, T12.X, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:    16(2.242078e-44), 8(1.121039e-44)
; CM-NEXT:     BFE_INT T26.X, T12.W, 0.0, literal.x,
; CM-NEXT:     LSHR T3.Y, T12.Y, literal.y,
; CM-NEXT:     LSHR T4.Z, T12.X, literal.x,
; CM-NEXT:     LSHR * T4.W, T12.Y, literal.x,
; CM-NEXT:    8(1.121039e-44), 16(2.242078e-44)
; CM-NEXT:     BFE_INT T27.X, T12.Z, 0.0, literal.x,
; CM-NEXT:     ASHR T26.Y, PV.X, literal.y,
; CM-NEXT:     LSHR T5.Z, T0.Y, literal.x,
; CM-NEXT:     LSHR * T5.W, T12.W, literal.x,
; CM-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; CM-NEXT:     BFE_INT T28.X, T0.Y, 0.0, literal.x,
; CM-NEXT:     ASHR T27.Y, PV.X, literal.y,
; CM-NEXT:     BFE_INT T26.Z, PV.W, 0.0, literal.x,
; CM-NEXT:     LSHR * T5.W, T12.Z, literal.x,
; CM-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; CM-NEXT:     BFE_INT T29.X, T12.Y, 0.0, literal.x,
; CM-NEXT:     ASHR T28.Y, PV.X, literal.y,
; CM-NEXT:     BFE_INT T27.Z, PV.W, 0.0, literal.x,
; CM-NEXT:     ASHR * T26.W, PV.Z, literal.y,
; CM-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; CM-NEXT:     ADD_INT T30.X, T13.X, literal.x,
; CM-NEXT:     ASHR T29.Y, PV.X, literal.y,
; CM-NEXT:     BFE_INT T28.Z, T5.Z, 0.0, literal.z,
; CM-NEXT:     ASHR * T27.W, PV.Z, literal.y,
; CM-NEXT:    12(1.681558e-44), 31(4.344025e-44)
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT T31.X, T13.X, literal.x,
; CM-NEXT:     LSHR T4.Y, T12.Z, literal.y,
; CM-NEXT:     BFE_INT T29.Z, T4.W, 0.0, literal.x,
; CM-NEXT:     ASHR * T32.W, T12.W, literal.z, BS:VEC_120/SCL_212
; CM-NEXT:    8(1.121039e-44), 16(2.242078e-44)
; CM-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T33.X, T12.X, 0.0, literal.x,
; CM-NEXT:     LSHR T5.Y, T12.W, literal.y,
; CM-NEXT:     ASHR T32.Z, T12.W, literal.z,
; CM-NEXT:     ASHR * T34.W, T12.Z, literal.w,
; CM-NEXT:    8(1.121039e-44), 16(2.242078e-44)
; CM-NEXT:    24(3.363116e-44), 31(4.344025e-44)
; CM-NEXT:     BFE_INT T32.X, PV.Y, 0.0, literal.x,
; CM-NEXT:     ASHR T33.Y, PV.X, literal.y,
; CM-NEXT:     ASHR T34.Z, T12.Z, literal.z,
; CM-NEXT:     ASHR * T29.W, T29.Z, literal.y, BS:VEC_120/SCL_212
; CM-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T34.X, T4.Y, 0.0, literal.x,
; CM-NEXT:     ASHR T32.Y, PV.X, literal.y,
; CM-NEXT:     BFE_INT T33.Z, T4.Z, 0.0, literal.x,
; CM-NEXT:     ASHR * T35.W, T12.Y, literal.y, BS:VEC_120/SCL_212
; CM-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; CM-NEXT:     BFE_INT * T36.X, T0.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:    ALU clause starting at 116:
; CM-NEXT:     ASHR T34.Y, T34.X, literal.x,
; CM-NEXT:     ASHR T35.Z, T12.Y, literal.y,
; CM-NEXT:     ASHR * T12.W, T12.X, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:    31(4.344025e-44), 24(3.363116e-44)
; CM-NEXT:     BFE_INT T35.X, T3.Y, 0.0, literal.x,
; CM-NEXT:     ASHR T36.Y, T36.X, literal.y,
; CM-NEXT:     ASHR T12.Z, T12.X, literal.z, BS:VEC_120/SCL_212
; CM-NEXT:     ASHR * T33.W, T33.Z, literal.y,
; CM-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T12.X, T3.W, 0.0, literal.x,
; CM-NEXT:     ASHR T35.Y, PV.X, literal.y,
; CM-NEXT:     BFE_INT T36.Z, T3.Z, 0.0, literal.x,
; CM-NEXT:     ASHR * T37.W, T0.W, literal.y, BS:VEC_120/SCL_212
; CM-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; CM-NEXT:     BFE_INT T38.X, T0.Z, 0.0, literal.x,
; CM-NEXT:     ASHR T12.Y, PV.X, literal.y,
; CM-NEXT:     ASHR T37.Z, T0.W, literal.z,
; CM-NEXT:     ASHR * T39.W, T0.Z, literal.y,
; CM-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T37.X, T2.Y, 0.0, literal.x,
; CM-NEXT:     ASHR T38.Y, PV.X, literal.y,
; CM-NEXT:     ASHR T39.Z, T0.Z, literal.z,
; CM-NEXT:     ASHR * T36.W, T36.Z, literal.y, BS:VEC_120/SCL_212
; CM-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T39.X, T2.W, 0.0, literal.x,
; CM-NEXT:     ASHR T37.Y, PV.X, literal.y,
; CM-NEXT:     BFE_INT T38.Z, T2.Z, 0.0, literal.x,
; CM-NEXT:     ASHR * T40.W, T0.Y, literal.y,
; CM-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; CM-NEXT:     BFE_INT T41.X, T0.X, 0.0, literal.x,
; CM-NEXT:     ASHR T39.Y, PV.X, literal.y,
; CM-NEXT:     ASHR T40.Z, T0.Y, literal.z,
; CM-NEXT:     ASHR * T0.W, T0.X, literal.y,
; CM-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T40.X, T1.Y, 0.0, literal.x,
; CM-NEXT:     ASHR T41.Y, PV.X, literal.y,
; CM-NEXT:     ASHR T0.Z, T0.X, literal.z,
; CM-NEXT:     ASHR * T38.W, T38.Z, literal.y,
; CM-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T0.X, T1.W, 0.0, literal.x,
; CM-NEXT:     ASHR T40.Y, PV.X, literal.y,
; CM-NEXT:     BFE_INT T41.Z, T1.Z, 0.0, literal.x,
; CM-NEXT:     ASHR * T28.W, T28.Z, literal.y, BS:VEC_120/SCL_212
; CM-NEXT:    8(1.121039e-44), 31(4.344025e-44)
; CM-NEXT:     ADD_INT T42.X, T13.X, literal.x,
; CM-NEXT:     ASHR T0.Y, PV.X, literal.y,
; CM-NEXT:     ASHR * T41.W, PV.Z, literal.y,
; CM-NEXT:    4(5.605194e-45), 31(4.344025e-44)
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <32 x i8>, ptr addrspace(1) %in, i32 %tid
  %load = load <32 x i8>, ptr addrspace(1) %in.tid
  %ext = sext <32 x i8> %load to <32 x i64>
  store <32 x i64> %ext, ptr addrspace(1) %out
  ret void
}

; XFUNC-LABEL: {{^}}global_zextload_v64i8_to_v64i64:
; define amdgpu_kernel void @global_zextload_v64i8_to_v64i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
;   %load = load <64 x i8>, ptr addrspace(1) %in
;   %ext = zext <64 x i8> %load to <64 x i64>
;   store <64 x i64> %ext, ptr addrspace(1) %out
;   ret void
; }

; XFUNC-LABEL: {{^}}global_sextload_v64i8_to_v64i64:
; define amdgpu_kernel void @global_sextload_v64i8_to_v64i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
;   %load = load <64 x i8>, ptr addrspace(1) %in
;   %ext = sext <64 x i8> %load to <64 x i64>
;   store <64 x i64> %ext, ptr addrspace(1) %out
;   ret void
; }

define amdgpu_kernel void @global_zextload_i8_to_i16(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_zextload_i8_to_i16:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-SI-NEXT:    buffer_load_ubyte v0, off, s[8:11], 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    buffer_store_short v0, off, s[4:7], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_zextload_i8_to_i16:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    flat_load_ubyte v2, v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    flat_store_short v[0:1], v2
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_zextload_i8_to_i16:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-VI-NEXT:    buffer_load_ubyte v0, off, s[8:11], 0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    buffer_store_short v0, off, s[4:7], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_zextload_i8_to_i16:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 10, @9, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT MSKOR T0.XW, T1.X
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_8 T0.X, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     MOV * T0.X, KC0[2].Z,
; EG-NEXT:    ALU clause starting at 9:
; EG-NEXT:     AND_INT * T0.W, KC0[2].Y, literal.x,
; EG-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; EG-NEXT:     LSHL * T0.W, PV.W, literal.x,
; EG-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; EG-NEXT:     LSHL T0.X, T0.X, PV.W,
; EG-NEXT:     LSHL * T0.W, literal.x, PV.W,
; EG-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; EG-NEXT:     MOV T0.Y, 0.0,
; EG-NEXT:     MOV * T0.Z, 0.0,
; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
;
; CM-LABEL: global_zextload_i8_to_i16:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 10, @9, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT MSKOR T0.XW, T1.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_8 T0.X, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     MOV * T0.X, KC0[2].Z,
; CM-NEXT:    ALU clause starting at 9:
; CM-NEXT:     AND_INT * T0.W, KC0[2].Y, literal.x,
; CM-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; CM-NEXT:     LSHL * T0.W, PV.W, literal.x,
; CM-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; CM-NEXT:     LSHL T0.X, T0.X, PV.W,
; CM-NEXT:     LSHL * T0.W, literal.x, PV.W,
; CM-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; CM-NEXT:     MOV T0.Y, 0.0,
; CM-NEXT:     MOV * T0.Z, 0.0,
; CM-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
  %a = load i8, ptr addrspace(1) %in
  %ext = zext i8 %a to i16
  store i16 %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_sextload_i8_to_i16(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_sextload_i8_to_i16:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-SI-NEXT:    buffer_load_sbyte v0, off, s[8:11], 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    buffer_store_short v0, off, s[4:7], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_sextload_i8_to_i16:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    flat_load_sbyte v2, v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    flat_store_short v[0:1], v2
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_sextload_i8_to_i16:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-VI-NEXT:    buffer_load_sbyte v0, off, s[8:11], 0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    buffer_store_short v0, off, s[4:7], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_sextload_i8_to_i16:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 12, @9, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT MSKOR T0.XW, T1.X
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_8 T0.X, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     MOV * T0.X, KC0[2].Z,
; EG-NEXT:    ALU clause starting at 9:
; EG-NEXT:     BFE_INT T0.W, T0.X, 0.0, literal.x,
; EG-NEXT:     AND_INT * T1.W, KC0[2].Y, literal.y,
; EG-NEXT:    8(1.121039e-44), 3(4.203895e-45)
; EG-NEXT:     AND_INT T0.W, PV.W, literal.x,
; EG-NEXT:     LSHL * T1.W, PS, literal.y,
; EG-NEXT:    65535(9.183409e-41), 3(4.203895e-45)
; EG-NEXT:     LSHL T0.X, PV.W, PS,
; EG-NEXT:     LSHL * T0.W, literal.x, PS,
; EG-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; EG-NEXT:     MOV T0.Y, 0.0,
; EG-NEXT:     MOV * T0.Z, 0.0,
; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
;
; CM-LABEL: global_sextload_i8_to_i16:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 12, @9, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT MSKOR T0.XW, T1.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_8 T0.X, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     MOV * T0.X, KC0[2].Z,
; CM-NEXT:    ALU clause starting at 9:
; CM-NEXT:     AND_INT T0.Z, KC0[2].Y, literal.x,
; CM-NEXT:     BFE_INT * T0.W, T0.X, 0.0, literal.y,
; CM-NEXT:    3(4.203895e-45), 8(1.121039e-44)
; CM-NEXT:     AND_INT T1.Z, PV.W, literal.x,
; CM-NEXT:     LSHL * T0.W, PV.Z, literal.y,
; CM-NEXT:    65535(9.183409e-41), 3(4.203895e-45)
; CM-NEXT:     LSHL T0.X, PV.Z, PV.W,
; CM-NEXT:     LSHL * T0.W, literal.x, PV.W,
; CM-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; CM-NEXT:     MOV T0.Y, 0.0,
; CM-NEXT:     MOV * T0.Z, 0.0,
; CM-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
  %a = load i8, ptr addrspace(1) %in
  %ext = sext i8 %a to i16
  store i16 %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_zextload_v1i8_to_v1i16(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_zextload_v1i8_to_v1i16:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-SI-NEXT:    buffer_load_ubyte v0, off, s[8:11], 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    buffer_store_short v0, off, s[4:7], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_zextload_v1i8_to_v1i16:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    flat_load_ubyte v2, v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    flat_store_short v[0:1], v2
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_zextload_v1i8_to_v1i16:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-VI-NEXT:    buffer_load_ubyte v0, off, s[8:11], 0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    buffer_store_short v0, off, s[4:7], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_zextload_v1i8_to_v1i16:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 10, @9, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT MSKOR T0.XW, T1.X
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_8 T0.X, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     MOV * T0.X, KC0[2].Z,
; EG-NEXT:    ALU clause starting at 9:
; EG-NEXT:     AND_INT * T0.W, KC0[2].Y, literal.x,
; EG-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; EG-NEXT:     LSHL * T0.W, PV.W, literal.x,
; EG-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; EG-NEXT:     LSHL T0.X, T0.X, PV.W,
; EG-NEXT:     LSHL * T0.W, literal.x, PV.W,
; EG-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; EG-NEXT:     MOV T0.Y, 0.0,
; EG-NEXT:     MOV * T0.Z, 0.0,
; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
;
; CM-LABEL: global_zextload_v1i8_to_v1i16:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 10, @9, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT MSKOR T0.XW, T1.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_8 T0.X, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     MOV * T0.X, KC0[2].Z,
; CM-NEXT:    ALU clause starting at 9:
; CM-NEXT:     AND_INT * T0.W, KC0[2].Y, literal.x,
; CM-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; CM-NEXT:     LSHL * T0.W, PV.W, literal.x,
; CM-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; CM-NEXT:     LSHL T0.X, T0.X, PV.W,
; CM-NEXT:     LSHL * T0.W, literal.x, PV.W,
; CM-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; CM-NEXT:     MOV T0.Y, 0.0,
; CM-NEXT:     MOV * T0.Z, 0.0,
; CM-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
  %load = load <1 x i8>, ptr addrspace(1) %in
  %ext = zext <1 x i8> %load to <1 x i16>
  store <1 x i16> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_sextload_v1i8_to_v1i16(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_sextload_v1i8_to_v1i16:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-SI-NEXT:    buffer_load_sbyte v0, off, s[8:11], 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    buffer_store_short v0, off, s[4:7], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_sextload_v1i8_to_v1i16:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    flat_load_sbyte v2, v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    flat_store_short v[0:1], v2
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_sextload_v1i8_to_v1i16:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-VI-NEXT:    buffer_load_sbyte v0, off, s[8:11], 0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    buffer_store_short v0, off, s[4:7], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_sextload_v1i8_to_v1i16:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 12, @9, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT MSKOR T0.XW, T1.X
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_8 T0.X, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     MOV * T0.X, KC0[2].Z,
; EG-NEXT:    ALU clause starting at 9:
; EG-NEXT:     BFE_INT T0.W, T0.X, 0.0, literal.x,
; EG-NEXT:     AND_INT * T1.W, KC0[2].Y, literal.y,
; EG-NEXT:    8(1.121039e-44), 3(4.203895e-45)
; EG-NEXT:     AND_INT T0.W, PV.W, literal.x,
; EG-NEXT:     LSHL * T1.W, PS, literal.y,
; EG-NEXT:    65535(9.183409e-41), 3(4.203895e-45)
; EG-NEXT:     LSHL T0.X, PV.W, PS,
; EG-NEXT:     LSHL * T0.W, literal.x, PS,
; EG-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; EG-NEXT:     MOV T0.Y, 0.0,
; EG-NEXT:     MOV * T0.Z, 0.0,
; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
;
; CM-LABEL: global_sextload_v1i8_to_v1i16:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 12, @9, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT MSKOR T0.XW, T1.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_8 T0.X, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     MOV * T0.X, KC0[2].Z,
; CM-NEXT:    ALU clause starting at 9:
; CM-NEXT:     AND_INT T0.Z, KC0[2].Y, literal.x,
; CM-NEXT:     BFE_INT * T0.W, T0.X, 0.0, literal.y,
; CM-NEXT:    3(4.203895e-45), 8(1.121039e-44)
; CM-NEXT:     AND_INT T1.Z, PV.W, literal.x,
; CM-NEXT:     LSHL * T0.W, PV.Z, literal.y,
; CM-NEXT:    65535(9.183409e-41), 3(4.203895e-45)
; CM-NEXT:     LSHL T0.X, PV.Z, PV.W,
; CM-NEXT:     LSHL * T0.W, literal.x, PV.W,
; CM-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; CM-NEXT:     MOV T0.Y, 0.0,
; CM-NEXT:     MOV * T0.Z, 0.0,
; CM-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
  %load = load <1 x i8>, ptr addrspace(1) %in
  %ext = sext <1 x i8> %load to <1 x i16>
  store <1 x i16> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_zextload_v2i8_to_v2i16(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_zextload_v2i8_to_v2i16:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-SI-NEXT:    buffer_load_ushort v0, off, s[8:11], 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v1, 8, v0
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v0, v0, v1
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v0, 0xff00ff, v0
; GCN-NOHSA-SI-NEXT:    buffer_store_dword v0, off, s[4:7], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_zextload_v2i8_to_v2i16:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    flat_load_ushort v2, v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v3, 8, v2
; GCN-HSA-NEXT:    v_or_b32_e32 v2, v2, v3
; GCN-HSA-NEXT:    v_and_b32_e32 v2, 0xff00ff, v2
; GCN-HSA-NEXT:    flat_store_dword v[0:1], v2
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_zextload_v2i8_to_v2i16:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-VI-NEXT:    buffer_load_ushort v0, off, s[8:11], 0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s0, 0xc060c00
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v1, 8, v0
; GCN-NOHSA-VI-NEXT:    v_perm_b32 v0, v1, v0, s0
; GCN-NOHSA-VI-NEXT:    buffer_store_dword v0, off, s[4:7], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_zextload_v2i8_to_v2i16:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 7, @9, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T5.X, T6.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_16 T5.X, T5.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     MOV * T5.X, KC0[2].Z,
; EG-NEXT:    ALU clause starting at 9:
; EG-NEXT:     LSHL * T0.W, T5.X, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T0.W, PV.W, literal.x,
; EG-NEXT:     AND_INT * T1.W, T5.X, literal.y,
; EG-NEXT:    16711680(2.341805e-38), 255(3.573311e-43)
; EG-NEXT:     OR_INT T5.X, PS, PV.W,
; EG-NEXT:     LSHR * T6.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
;
; CM-LABEL: global_zextload_v2i8_to_v2i16:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 0, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 7, @9, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T5.X, T6.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_16 T5.X, T5.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     MOV * T5.X, KC0[2].Z,
; CM-NEXT:    ALU clause starting at 9:
; CM-NEXT:     LSHL * T0.W, T5.X, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.W, literal.x,
; CM-NEXT:     AND_INT * T0.W, T5.X, literal.y,
; CM-NEXT:    16711680(2.341805e-38), 255(3.573311e-43)
; CM-NEXT:     OR_INT * T5.X, PV.W, PV.Z,
; CM-NEXT:     LSHR * T6.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
  %load = load <2 x i8>, ptr addrspace(1) %in
  %ext = zext <2 x i8> %load to <2 x i16>
  store <2 x i16> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_sextload_v2i8_to_v2i16(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_sextload_v2i8_to_v2i16:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-SI-NEXT:    buffer_load_ushort v0, off, s[8:11], 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v1, v0, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v0, v0, 0, 8
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v0, v0, v1
; GCN-NOHSA-SI-NEXT:    buffer_store_dword v0, off, s[4:7], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_sextload_v2i8_to_v2i16:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    flat_load_ushort v2, v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_bfe_i32 v3, v2, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v2, v2, 0, 8
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
; GCN-HSA-NEXT:    v_and_b32_e32 v2, 0xffff, v2
; GCN-HSA-NEXT:    v_or_b32_e32 v2, v2, v3
; GCN-HSA-NEXT:    flat_store_dword v[0:1], v2
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_sextload_v2i8_to_v2i16:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s7, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s6, -1
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s10, s6
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s11, s7
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s8, s2
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s9, s3
; GCN-NOHSA-VI-NEXT:    buffer_load_ushort v0, off, s[8:11], 0
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, 0xffff
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v2, 8
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s4, s0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s5, s1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v1, v1, sext(v0) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_sdwa v0, v2, sext(v0) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v0, 0xffff0000, v0
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v0, v1, v0
; GCN-NOHSA-VI-NEXT:    buffer_store_dword v0, off, s[4:7], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_sextload_v2i8_to_v2i16:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 1, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 16, @10, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T5.X, T6.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_16 T5.X, T5.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     MOV * T0.Y, T2.X,
; EG-NEXT:     MOV * T5.X, KC0[2].Z,
; EG-NEXT:    ALU clause starting at 10:
; EG-NEXT:     AND_INT T0.W, T5.X, literal.x,
; EG-NEXT:     AND_INT * T1.W, T0.Y, literal.y,
; EG-NEXT:    65535(9.183409e-41), -65536(nan)
; EG-NEXT:     OR_INT * T0.W, PS, PV.W,
; EG-NEXT:     MOV * T2.X, PV.W,
; EG-NEXT:     MOV * T0.Y, PV.X,
; EG-NEXT:     LSHR * T1.W, PV.Y, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T0.Z, T0.W, 0.0, literal.x,
; EG-NEXT:     BFE_INT * T0.W, PV.W, 0.0, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     LSHL T0.W, PV.W, literal.x,
; EG-NEXT:     AND_INT * T1.W, PV.Z, literal.y,
; EG-NEXT:    16(2.242078e-44), 65535(9.183409e-41)
; EG-NEXT:     OR_INT T5.X, PS, PV.W,
; EG-NEXT:     LSHR * T6.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
;
; CM-LABEL: global_sextload_v2i8_to_v2i16:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 1, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 16, @10, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T5.X, T6.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_16 T5.X, T5.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     MOV * T0.Y, T2.X,
; CM-NEXT:     MOV * T5.X, KC0[2].Z,
; CM-NEXT:    ALU clause starting at 10:
; CM-NEXT:     AND_INT T0.Z, T5.X, literal.x,
; CM-NEXT:     AND_INT * T0.W, T0.Y, literal.y,
; CM-NEXT:    65535(9.183409e-41), -65536(nan)
; CM-NEXT:     OR_INT * T0.W, PV.W, PV.Z,
; CM-NEXT:     MOV * T2.X, PV.W,
; CM-NEXT:     MOV * T0.Y, PV.X,
; CM-NEXT:     LSHR * T1.W, PV.Y, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT T0.Z, T0.W, 0.0, literal.x,
; CM-NEXT:     BFE_INT * T0.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     LSHL T1.Z, PV.W, literal.x,
; CM-NEXT:     AND_INT * T0.W, PV.Z, literal.y,
; CM-NEXT:    16(2.242078e-44), 65535(9.183409e-41)
; CM-NEXT:     OR_INT * T5.X, PV.W, PV.Z,
; CM-NEXT:     LSHR * T6.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
  %load = load <2 x i8>, ptr addrspace(1) %in
  %ext = sext <2 x i8> %load to <2 x i16>
  store <2 x i16> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_zextload_v4i8_to_v4i16(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_zextload_v4i8_to_v4i16:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s3
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[6:7]
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dword v0, v[0:1], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v1, 0xff00, v0
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v2, 24, v0
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v3, 0xff, v0
; GCN-NOHSA-SI-NEXT:    v_alignbit_b32 v0, v2, v0, 16
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v2, 8, v1
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v1, 0xff00ff, v0
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v0, v3, v2
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_zextload_v4i8_to_v4i16:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dword v2, v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_and_b32_e32 v3, 0xff00, v2
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v4, 24, v2
; GCN-HSA-NEXT:    v_and_b32_e32 v5, 0xff, v2
; GCN-HSA-NEXT:    v_alignbit_b32 v2, v4, v2, 16
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v4, 8, v3
; GCN-HSA-NEXT:    v_and_b32_e32 v3, 0xff00ff, v2
; GCN-HSA-NEXT:    v_or_b32_e32 v2, v5, v4
; GCN-HSA-NEXT:    flat_store_dwordx2 v[0:1], v[2:3]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_zextload_v4i8_to_v4i16:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s4, 0x5040c00
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dword v1, v[0:1]
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v2, 24, v1
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v0, v1, 8, 8
; GCN-NOHSA-VI-NEXT:    v_perm_b32 v0, v0, v1, s4
; GCN-NOHSA-VI-NEXT:    v_alignbit_b32 v1, v2, v1, 16
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v1, 0xff00ff, v1
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_zextload_v4i8_to_v4i16:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 3, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 31, @12, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T8.XY, T0.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     MOV T0.Y, T4.X,
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x, BS:VEC_120/SCL_212
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 12:
; EG-NEXT:     AND_INT T0.W, T0.X, literal.x,
; EG-NEXT:     AND_INT * T1.W, T0.Y, literal.y,
; EG-NEXT:    255(3.573311e-43), -65536(nan)
; EG-NEXT:     OR_INT * T0.W, PS, PV.W,
; EG-NEXT:     MOV * T4.X, PV.W,
; EG-NEXT:     MOV T0.Y, PV.X,
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T1.W, PV.Y, literal.x,
; EG-NEXT:     AND_INT * T0.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; EG-NEXT:     OR_INT * T0.W, PV.W, PS,
; EG-NEXT:     MOV T4.X, PV.W,
; EG-NEXT:     MOV T0.Y, T5.X,
; EG-NEXT:     MOV * T0.W, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T0.W, T0.X, literal.x, PV.W,
; EG-NEXT:     AND_INT * T1.W, PV.Y, literal.y,
; EG-NEXT:    16(2.242078e-44), -65536(nan)
; EG-NEXT:     OR_INT * T0.W, PS, PV.W,
; EG-NEXT:     MOV * T5.X, PV.W,
; EG-NEXT:     MOV T0.Y, PV.X,
; EG-NEXT:     LSHR * T0.W, T0.X, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T1.W, PV.Y, literal.x,
; EG-NEXT:     AND_INT * T0.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; EG-NEXT:     LSHR T0.X, KC0[2].Y, literal.x,
; EG-NEXT:     OR_INT * T8.Y, PV.W, PS,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     MOV T5.X, PV.Y,
; EG-NEXT:     MOV * T8.X, T4.X,
;
; CM-LABEL: global_zextload_v4i8_to_v4i16:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 3, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 31, @12, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T8, T0.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     MOV T0.Y, T4.X,
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 12:
; CM-NEXT:     AND_INT T0.Z, T0.X, literal.x,
; CM-NEXT:     AND_INT * T0.W, T0.Y, literal.y,
; CM-NEXT:    255(3.573311e-43), -65536(nan)
; CM-NEXT:     OR_INT * T0.W, PV.W, PV.Z,
; CM-NEXT:     MOV * T4.X, PV.W,
; CM-NEXT:     MOV T0.Y, PV.X,
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.Y, literal.x,
; CM-NEXT:     AND_INT * T0.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; CM-NEXT:     OR_INT * T0.W, PV.Z, PV.W,
; CM-NEXT:     MOV T4.X, PV.W,
; CM-NEXT:     MOV T0.Y, T5.X,
; CM-NEXT:     MOV * T0.W, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.Y, literal.x,
; CM-NEXT:     BFE_UINT * T0.W, T0.X, literal.y, PV.W,
; CM-NEXT:    -65536(nan), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T0.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T5.X, PV.W,
; CM-NEXT:     MOV T0.Y, PV.X,
; CM-NEXT:     LSHR * T0.W, T0.X, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.Y, literal.x,
; CM-NEXT:     AND_INT * T0.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; CM-NEXT:     LSHR T0.X, KC0[2].Y, literal.x,
; CM-NEXT:     OR_INT * T8.Y, PV.Z, PV.W,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; CM-NEXT:     MOV * T5.X, PV.Y,
; CM-NEXT:     MOV * T8.X, T4.X,
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <4 x i8>, ptr addrspace(1) %in, i32 %tid
  %load = load <4 x i8>, ptr addrspace(1) %in.tid
  %ext = zext <4 x i8> %load to <4 x i16>
  store <4 x i16> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_sextload_v4i8_to_v4i16(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_sextload_v4i8_to_v4i16:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s3
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[6:7]
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dword v0, v[0:1], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v1, 24, v0
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v2, v0, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v3, v0, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v0, v0, 0, 8
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v2, 0xffff, v2
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v1, v2, v1
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v0, v0, v3
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_sextload_v4i8_to_v4i16:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dword v2, v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v3, 24, v2
; GCN-HSA-NEXT:    v_bfe_i32 v4, v2, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v5, v2, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v2, v2, 0, 8
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
; GCN-HSA-NEXT:    v_and_b32_e32 v4, 0xffff, v4
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v5, 16, v5
; GCN-HSA-NEXT:    v_and_b32_e32 v2, 0xffff, v2
; GCN-HSA-NEXT:    v_or_b32_e32 v3, v4, v3
; GCN-HSA-NEXT:    v_or_b32_e32 v2, v2, v5
; GCN-HSA-NEXT:    flat_store_dwordx2 v[0:1], v[2:3]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_sextload_v4i8_to_v4i16:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v2, 8
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dword v0, v[0:1]
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, 0xffff
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v3, 16, v0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v4, 24, v0
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v5, v1, sext(v0) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i16_sdwa v0, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v2, 16, v4
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v1, v1, sext(v3) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v1, v1, v2
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v0, v5, v0
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_sextload_v4i8_to_v4i16:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 3, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 37, @12, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T8.XY, T0.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     MOV T0.Y, T4.X,
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x, BS:VEC_120/SCL_212
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 12:
; EG-NEXT:     BFE_INT * T0.W, T0.X, 0.0, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T0.W, PV.W, literal.x,
; EG-NEXT:     AND_INT * T1.W, T0.Y, literal.y,
; EG-NEXT:    65535(9.183409e-41), -65536(nan)
; EG-NEXT:     OR_INT * T0.W, PS, PV.W,
; EG-NEXT:     MOV * T4.X, PV.W,
; EG-NEXT:     MOV T0.Y, PV.X,
; EG-NEXT:     LSHR * T0.W, T0.X, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T0.W, PV.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T1.W, PV.Y, literal.y,
; EG-NEXT:    8(1.121039e-44), 65535(9.183409e-41)
; EG-NEXT:     LSHL * T0.W, PV.W, literal.x,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T0.W, T1.W, PV.W,
; EG-NEXT:     MOV T4.X, PV.W,
; EG-NEXT:     MOV T0.Y, T5.X,
; EG-NEXT:     LSHR * T0.W, T0.X, literal.x, BS:VEC_120/SCL_212
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T0.W, PV.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T1.W, PV.Y, literal.y,
; EG-NEXT:    8(1.121039e-44), -65536(nan)
; EG-NEXT:     AND_INT * T0.W, PV.W, literal.x,
; EG-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T0.W, T1.W, PV.W,
; EG-NEXT:     MOV * T5.X, PV.W,
; EG-NEXT:     MOV T0.Y, PV.X,
; EG-NEXT:     ASHR * T0.W, T0.X, literal.x,
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T1.W, PV.Y, literal.x,
; EG-NEXT:     LSHL * T0.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; EG-NEXT:     LSHR T0.X, KC0[2].Y, literal.x,
; EG-NEXT:     OR_INT * T8.Y, PV.W, PS,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     MOV T5.X, PV.Y,
; EG-NEXT:     MOV * T8.X, T4.X,
;
; CM-LABEL: global_sextload_v4i8_to_v4i16:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 3, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 37, @12, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T8, T0.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     MOV T0.Y, T4.X,
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 12:
; CM-NEXT:     BFE_INT * T0.W, T0.X, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.W, literal.x,
; CM-NEXT:     AND_INT * T0.W, T0.Y, literal.y,
; CM-NEXT:    65535(9.183409e-41), -65536(nan)
; CM-NEXT:     OR_INT * T0.W, PV.W, PV.Z,
; CM-NEXT:     MOV * T4.X, PV.W,
; CM-NEXT:     MOV T0.Y, PV.X,
; CM-NEXT:     LSHR * T0.W, T0.X, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T0.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, T0.Y, literal.x,
; CM-NEXT:     LSHL * T0.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T0.W, PV.Z, PV.W,
; CM-NEXT:     MOV T4.X, PV.W,
; CM-NEXT:     MOV T0.Y, T5.X,
; CM-NEXT:     LSHR * T0.W, T0.X, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T0.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, T0.Y, literal.x,
; CM-NEXT:     AND_INT * T0.W, PV.W, literal.y,
; CM-NEXT:    -65536(nan), 65535(9.183409e-41)
; CM-NEXT:     OR_INT * T0.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T5.X, PV.W,
; CM-NEXT:     MOV T0.Y, PV.X,
; CM-NEXT:     ASHR * T0.W, T0.X, literal.x,
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.Y, literal.x,
; CM-NEXT:     LSHL * T0.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; CM-NEXT:     LSHR T0.X, KC0[2].Y, literal.x,
; CM-NEXT:     OR_INT * T8.Y, PV.Z, PV.W,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; CM-NEXT:     MOV * T5.X, PV.Y,
; CM-NEXT:     MOV * T8.X, T4.X,
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <4 x i8>, ptr addrspace(1) %in, i32 %tid
  %load = load <4 x i8>, ptr addrspace(1) %in.tid
  %ext = sext <4 x i8> %load to <4 x i16>
  store <4 x i16> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_zextload_v8i8_to_v8i16(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_zextload_v8i8_to_v8i16:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s3
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[6:7]
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx2 v[0:1], v[0:1], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v2, 0xff00, v0
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v3, 24, v0
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v4, 0xff00, v1
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v5, 24, v1
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v6, 0xff, v1
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v7, 0xff, v0
; GCN-NOHSA-SI-NEXT:    v_alignbit_b32 v1, v5, v1, 16
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v4, 8, v4
; GCN-NOHSA-SI-NEXT:    v_alignbit_b32 v0, v3, v0, 16
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v5, 8, v2
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v3, 0xff00ff, v1
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v2, v6, v4
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v1, 0xff00ff, v0
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v0, v7, v5
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_zextload_v8i8_to_v8i16:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dwordx2 v[0:1], v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v4, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v5, s1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_and_b32_e32 v2, 0xff00, v0
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v3, 24, v0
; GCN-HSA-NEXT:    v_and_b32_e32 v6, 0xff00, v1
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v7, 24, v1
; GCN-HSA-NEXT:    v_and_b32_e32 v8, 0xff, v1
; GCN-HSA-NEXT:    v_and_b32_e32 v9, 0xff, v0
; GCN-HSA-NEXT:    v_alignbit_b32 v1, v7, v1, 16
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v6, 8, v6
; GCN-HSA-NEXT:    v_alignbit_b32 v0, v3, v0, 16
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v7, 8, v2
; GCN-HSA-NEXT:    v_and_b32_e32 v3, 0xff00ff, v1
; GCN-HSA-NEXT:    v_or_b32_e32 v2, v8, v6
; GCN-HSA-NEXT:    v_and_b32_e32 v1, 0xff00ff, v0
; GCN-HSA-NEXT:    v_or_b32_e32 v0, v9, v7
; GCN-HSA-NEXT:    flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_zextload_v8i8_to_v8i16:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s4, 0x5040c00
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx2 v[1:2], v[0:1]
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v4, 24, v1
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v0, 8, v1
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v5, 8, v2
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v3, 16, v2
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v6, 24, v2
; GCN-NOHSA-VI-NEXT:    v_perm_b32 v0, v0, v1, s4
; GCN-NOHSA-VI-NEXT:    v_alignbit_b32 v1, v4, v1, 16
; GCN-NOHSA-VI-NEXT:    v_perm_b32 v3, v6, v3, s4
; GCN-NOHSA-VI-NEXT:    v_perm_b32 v2, v5, v2, s4
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v1, 0xff00ff, v1
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_zextload_v8i8_to_v8i16:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 3, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 60, @12, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T12.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_64 T12.XY, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     MOV T0.Y, T8.X,
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x, BS:VEC_120/SCL_212
; EG-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 12:
; EG-NEXT:     AND_INT T0.W, T12.X, literal.x,
; EG-NEXT:     AND_INT * T1.W, T0.Y, literal.y,
; EG-NEXT:    255(3.573311e-43), -65536(nan)
; EG-NEXT:     OR_INT * T0.W, PS, PV.W,
; EG-NEXT:     MOV * T8.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     LSHL * T0.W, T12.X, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T1.W, PV.X, literal.x,
; EG-NEXT:     AND_INT * T0.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; EG-NEXT:     OR_INT * T0.W, PV.W, PS,
; EG-NEXT:     MOV T8.X, PV.W,
; EG-NEXT:     MOV * T0.X, T9.X,
; EG-NEXT:     MOV * T0.W, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T1.W, T12.X, literal.x, PV.W,
; EG-NEXT:     AND_INT * T2.W, T0.X, literal.y,
; EG-NEXT:    16(2.242078e-44), -65536(nan)
; EG-NEXT:     OR_INT * T1.W, PS, PV.W,
; EG-NEXT:     MOV * T9.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     LSHR * T1.W, T12.X, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T2.W, PV.X, literal.x,
; EG-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; EG-NEXT:     OR_INT * T0.Y, PV.W, PS,
; EG-NEXT:     MOV T9.X, PV.Y,
; EG-NEXT:     MOV * T0.X, T4.X,
; EG-NEXT:     AND_INT T1.W, PS, literal.x,
; EG-NEXT:     AND_INT * T2.W, T12.Y, literal.y,
; EG-NEXT:    -65536(nan), 255(3.573311e-43)
; EG-NEXT:     OR_INT * T1.W, PV.W, PS,
; EG-NEXT:     MOV * T4.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     LSHL * T1.W, T12.Y, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T2.W, PV.X, literal.x,
; EG-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; EG-NEXT:     OR_INT * T1.W, PV.W, PS,
; EG-NEXT:     MOV T4.X, PV.W,
; EG-NEXT:     MOV * T0.X, T5.X,
; EG-NEXT:     BFE_UINT T0.W, T12.Y, literal.x, T0.W,
; EG-NEXT:     AND_INT * T1.W, PS, literal.y,
; EG-NEXT:    16(2.242078e-44), -65536(nan)
; EG-NEXT:     OR_INT * T0.W, PS, PV.W,
; EG-NEXT:     MOV * T5.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     LSHR * T0.W, T12.Y, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T1.W, PV.X, literal.x,
; EG-NEXT:     AND_INT * T0.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; EG-NEXT:     LSHR T12.X, KC0[2].Y, literal.x,
; EG-NEXT:     OR_INT * T0.W, PV.W, PS,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     MOV T5.X, PV.W,
; EG-NEXT:     MOV * T0.X, T8.X,
; EG-NEXT:     MOV * T0.Z, T4.X,
;
; CM-LABEL: global_zextload_v8i8_to_v8i16:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 3, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 60, @12, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0, T12.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_64 T12.XY, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     MOV T0.Y, T8.X,
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 12:
; CM-NEXT:     AND_INT T0.Z, T12.X, literal.x,
; CM-NEXT:     AND_INT * T0.W, T0.Y, literal.y,
; CM-NEXT:    255(3.573311e-43), -65536(nan)
; CM-NEXT:     OR_INT * T0.W, PV.W, PV.Z,
; CM-NEXT:     MOV * T8.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     LSHL * T0.W, T12.X, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     AND_INT * T0.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; CM-NEXT:     OR_INT * T0.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T8.X, PV.W,
; CM-NEXT:     MOV T0.X, T9.X,
; CM-NEXT:     MOV * T0.W, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     BFE_UINT * T1.W, T12.X, literal.y, PV.W,
; CM-NEXT:    -65536(nan), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T9.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     LSHR * T1.W, T12.X, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; CM-NEXT:     OR_INT * T0.Y, PV.Z, PV.W,
; CM-NEXT:     MOV * T9.X, PV.Y,
; CM-NEXT:     MOV * T0.X, T4.X,
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     AND_INT * T1.W, T12.Y, literal.y,
; CM-NEXT:    -65536(nan), 255(3.573311e-43)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T4.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     LSHL * T1.W, T12.Y, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T4.X, PV.W,
; CM-NEXT:     MOV * T0.X, T5.X,
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     BFE_UINT * T0.W, T12.Y, literal.y, T0.W,
; CM-NEXT:    -65536(nan), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T0.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T5.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     LSHR * T0.W, T12.Y, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     AND_INT * T0.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; CM-NEXT:     LSHR T12.X, KC0[2].Y, literal.x,
; CM-NEXT:     OR_INT * T0.W, PV.Z, PV.W,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; CM-NEXT:     MOV * T5.X, PV.W,
; CM-NEXT:     MOV T0.X, T8.X,
; CM-NEXT:     MOV * T0.Z, T4.X, BS:VEC_120/SCL_212
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <8 x i8>, ptr addrspace(1) %in, i32 %tid
  %load = load <8 x i8>, ptr addrspace(1) %in.tid
  %ext = zext <8 x i8> %load to <8 x i16>
  store <8 x i16> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_sextload_v8i8_to_v8i16(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_sextload_v8i8_to_v8i16:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s3
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[6:7]
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx2 v[0:1], v[0:1], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v2, 24, v1
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v3, v1, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v4, v1, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v1, v1, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v5, 24, v0
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v6, v0, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v7, v0, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v0, v0, 0, 8
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v3, 0xffff, v3
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v4, 16, v4
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v5, 16, v5
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v6, 0xffff, v6
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v7, 16, v7
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v3, v3, v2
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v2, v1, v4
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v1, v6, v5
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v0, v0, v7
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_sextload_v8i8_to_v8i16:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dwordx2 v[0:1], v[0:1]
; GCN-HSA-NEXT:    v_mov_b32_e32 v4, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v5, s1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v2, 24, v1
; GCN-HSA-NEXT:    v_bfe_i32 v3, v1, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v6, v1, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v1, v1, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v7, 24, v0
; GCN-HSA-NEXT:    v_bfe_i32 v8, v0, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v9, v0, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v0, v0, 0, 8
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
; GCN-HSA-NEXT:    v_and_b32_e32 v3, 0xffff, v3
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v6, 16, v6
; GCN-HSA-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v7, 16, v7
; GCN-HSA-NEXT:    v_and_b32_e32 v8, 0xffff, v8
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v9, 16, v9
; GCN-HSA-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; GCN-HSA-NEXT:    v_or_b32_e32 v3, v3, v2
; GCN-HSA-NEXT:    v_or_b32_e32 v2, v1, v6
; GCN-HSA-NEXT:    v_or_b32_e32 v1, v8, v7
; GCN-HSA-NEXT:    v_or_b32_e32 v0, v0, v9
; GCN-HSA-NEXT:    flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_sextload_v8i8_to_v8i16:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v3, 0xffff
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v2, 8
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx2 v[0:1], v[0:1]
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v4, 16, v0
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v5, 16, v1
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v6, v3, sext(v0) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i16_sdwa v7, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v8, 24, v1
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v9, v3, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i16_sdwa v1, v2, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v10, 24, v0
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v0, v6, v7
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v6, 16, v8
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v5, v3, sext(v5) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v2, v9, v1
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v1, 16, v10
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v4, v3, sext(v4) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v3, v5, v6
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v1, v4, v1
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_sextload_v8i8_to_v8i16:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 3, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 74, @12, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T12.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_64 T12.XY, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     MOV T0.Y, T8.X,
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x, BS:VEC_120/SCL_212
; EG-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 12:
; EG-NEXT:     BFE_INT * T0.W, T12.X, 0.0, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T0.W, PV.W, literal.x,
; EG-NEXT:     AND_INT * T1.W, T0.Y, literal.y,
; EG-NEXT:    65535(9.183409e-41), -65536(nan)
; EG-NEXT:     OR_INT * T0.W, PS, PV.W,
; EG-NEXT:     MOV * T8.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     LSHR * T0.W, T12.X, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T0.W, PV.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T1.W, PV.X, literal.y,
; EG-NEXT:    8(1.121039e-44), 65535(9.183409e-41)
; EG-NEXT:     LSHL * T0.W, PV.W, literal.x,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T0.W, T1.W, PV.W,
; EG-NEXT:     MOV T8.X, PV.W,
; EG-NEXT:     MOV * T0.X, T9.X,
; EG-NEXT:     LSHR * T0.W, T12.X, literal.x,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T0.W, PV.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T1.W, T0.X, literal.y,
; EG-NEXT:    8(1.121039e-44), -65536(nan)
; EG-NEXT:     AND_INT * T0.W, PV.W, literal.x,
; EG-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T0.W, T1.W, PV.W,
; EG-NEXT:     MOV * T9.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     ASHR * T0.W, T12.X, literal.x,
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T1.W, PV.X, literal.x,
; EG-NEXT:     LSHL * T0.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; EG-NEXT:     OR_INT * T0.Y, PV.W, PS,
; EG-NEXT:     MOV T9.X, PV.Y,
; EG-NEXT:     MOV * T0.X, T4.X,
; EG-NEXT:     BFE_INT T0.W, T12.Y, 0.0, literal.x,
; EG-NEXT:     AND_INT * T1.W, PS, literal.y,
; EG-NEXT:    8(1.121039e-44), -65536(nan)
; EG-NEXT:     AND_INT * T0.W, PV.W, literal.x,
; EG-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T0.W, T1.W, PV.W,
; EG-NEXT:     MOV * T4.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     LSHR * T0.W, T12.Y, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T0.W, PV.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T1.W, PV.X, literal.y,
; EG-NEXT:    8(1.121039e-44), 65535(9.183409e-41)
; EG-NEXT:     LSHL * T0.W, PV.W, literal.x,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T0.W, T1.W, PV.W,
; EG-NEXT:     MOV T4.X, PV.W,
; EG-NEXT:     MOV * T0.X, T5.X,
; EG-NEXT:     LSHR * T0.W, T12.Y, literal.x,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T0.W, PV.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T1.W, T0.X, literal.y,
; EG-NEXT:    8(1.121039e-44), -65536(nan)
; EG-NEXT:     AND_INT * T0.W, PV.W, literal.x,
; EG-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T0.W, T1.W, PV.W,
; EG-NEXT:     MOV * T5.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     ASHR * T0.W, T12.Y, literal.x,
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T1.W, PV.X, literal.x,
; EG-NEXT:     LSHL * T0.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; EG-NEXT:     LSHR T12.X, KC0[2].Y, literal.x,
; EG-NEXT:     OR_INT * T0.W, PV.W, PS,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     MOV T5.X, PV.W,
; EG-NEXT:     MOV * T0.X, T8.X,
; EG-NEXT:     MOV * T0.Z, T4.X,
;
; CM-LABEL: global_sextload_v8i8_to_v8i16:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 3, @8, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @6
; CM-NEXT:    ALU 74, @12, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0, T12.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 6:
; CM-NEXT:     VTX_READ_64 T12.XY, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 8:
; CM-NEXT:     MOV T0.Y, T8.X,
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 12:
; CM-NEXT:     BFE_INT * T0.W, T12.X, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.W, literal.x,
; CM-NEXT:     AND_INT * T0.W, T0.Y, literal.y,
; CM-NEXT:    65535(9.183409e-41), -65536(nan)
; CM-NEXT:     OR_INT * T0.W, PV.W, PV.Z,
; CM-NEXT:     MOV * T8.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     LSHR * T0.W, T12.X, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T0.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, T0.X, literal.x,
; CM-NEXT:     LSHL * T0.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T0.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T8.X, PV.W,
; CM-NEXT:     MOV T0.X, T9.X,
; CM-NEXT:     LSHR * T0.W, T12.X, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T0.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, T0.X, literal.x,
; CM-NEXT:     AND_INT * T0.W, PV.W, literal.y,
; CM-NEXT:    -65536(nan), 65535(9.183409e-41)
; CM-NEXT:     OR_INT * T0.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T9.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     ASHR * T0.W, T12.X, literal.x,
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     LSHL * T0.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T0.Y, PV.Z, PV.W,
; CM-NEXT:     MOV * T9.X, PV.Y,
; CM-NEXT:     MOV T0.X, T4.X,
; CM-NEXT:     BFE_INT * T0.W, T12.Y, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     AND_INT * T0.W, PV.W, literal.y,
; CM-NEXT:    -65536(nan), 65535(9.183409e-41)
; CM-NEXT:     OR_INT * T0.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T4.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     LSHR * T0.W, T12.Y, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T0.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, T0.X, literal.x,
; CM-NEXT:     LSHL * T0.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T0.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T4.X, PV.W,
; CM-NEXT:     MOV T0.X, T5.X,
; CM-NEXT:     LSHR * T0.W, T12.Y, literal.x,
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T0.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, T0.X, literal.x,
; CM-NEXT:     AND_INT * T0.W, PV.W, literal.y,
; CM-NEXT:    -65536(nan), 65535(9.183409e-41)
; CM-NEXT:     OR_INT * T0.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T5.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     ASHR * T0.W, T12.Y, literal.x,
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     LSHL * T0.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; CM-NEXT:     LSHR T12.X, KC0[2].Y, literal.x,
; CM-NEXT:     OR_INT * T0.W, PV.Z, PV.W,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; CM-NEXT:     MOV * T5.X, PV.W,
; CM-NEXT:     MOV T0.X, T8.X,
; CM-NEXT:     MOV * T0.Z, T4.X, BS:VEC_120/SCL_212
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <8 x i8>, ptr addrspace(1) %in, i32 %tid
  %load = load <8 x i8>, ptr addrspace(1) %in.tid
  %ext = sext <8 x i8> %load to <8 x i16>
  store <8 x i16> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_zextload_v16i8_to_v16i16(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_zextload_v16i8_to_v16i16:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s3
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[6:7]
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx4 v[0:3], v[0:1], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v4, 0xff00, v2
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v5, 24, v2
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v6, 0xff00, v3
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v7, 24, v3
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v8, 0xff00, v0
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v9, 24, v0
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v10, 0xff00, v1
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v11, 24, v1
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v14, 0xff, v3
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v15, 0xff, v2
; GCN-NOHSA-SI-NEXT:    v_alignbit_b32 v7, v7, v3, 16
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v6, 8, v6
; GCN-NOHSA-SI-NEXT:    v_alignbit_b32 v5, v5, v2, 16
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v4, 8, v4
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v12, 0xff, v1
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v13, 0xff, v0
; GCN-NOHSA-SI-NEXT:    v_alignbit_b32 v1, v11, v1, 16
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v10, 8, v10
; GCN-NOHSA-SI-NEXT:    v_alignbit_b32 v0, v9, v0, 16
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v8, 8, v8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v7, 0xff00ff, v7
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v6, v14, v6
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v5, 0xff00ff, v5
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v4, v15, v4
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v3, 0xff00ff, v1
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v2, v12, v10
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v1, 0xff00ff, v0
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v0, v13, v8
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_zextload_v16i8_to_v16i16:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 16
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v11, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v10, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v9, s1
; GCN-HSA-NEXT:    v_mov_b32_e32 v8, s0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_and_b32_e32 v4, 0xff00, v2
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v5, 24, v2
; GCN-HSA-NEXT:    v_and_b32_e32 v6, 0xff00, v3
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v7, 24, v3
; GCN-HSA-NEXT:    v_and_b32_e32 v12, 0xff00, v0
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v13, 24, v0
; GCN-HSA-NEXT:    v_and_b32_e32 v14, 0xff00, v1
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v15, 24, v1
; GCN-HSA-NEXT:    v_and_b32_e32 v18, 0xff, v3
; GCN-HSA-NEXT:    v_and_b32_e32 v19, 0xff, v2
; GCN-HSA-NEXT:    v_alignbit_b32 v7, v7, v3, 16
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v6, 8, v6
; GCN-HSA-NEXT:    v_alignbit_b32 v5, v5, v2, 16
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v4, 8, v4
; GCN-HSA-NEXT:    v_and_b32_e32 v16, 0xff, v1
; GCN-HSA-NEXT:    v_and_b32_e32 v17, 0xff, v0
; GCN-HSA-NEXT:    v_alignbit_b32 v1, v15, v1, 16
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v14, 8, v14
; GCN-HSA-NEXT:    v_alignbit_b32 v0, v13, v0, 16
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v12, 8, v12
; GCN-HSA-NEXT:    v_and_b32_e32 v7, 0xff00ff, v7
; GCN-HSA-NEXT:    v_or_b32_e32 v6, v18, v6
; GCN-HSA-NEXT:    v_and_b32_e32 v5, 0xff00ff, v5
; GCN-HSA-NEXT:    v_or_b32_e32 v4, v19, v4
; GCN-HSA-NEXT:    v_and_b32_e32 v3, 0xff00ff, v1
; GCN-HSA-NEXT:    v_or_b32_e32 v2, v16, v14
; GCN-HSA-NEXT:    v_and_b32_e32 v1, 0xff00ff, v0
; GCN-HSA-NEXT:    v_or_b32_e32 v0, v17, v12
; GCN-HSA-NEXT:    flat_store_dwordx4 v[10:11], v[4:7]
; GCN-HSA-NEXT:    flat_store_dwordx4 v[8:9], v[0:3]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_zextload_v16i8_to_v16i16:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s4, 0x5040c00
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v5, 24, v2
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v6, v1, 8, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v8, 8, v2
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v9, v3, 8, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v10, 16, v3
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v11, 24, v3
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v12, 24, v0
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v4, 8, v0
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v7, 16, v1
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v13, 24, v1
; GCN-NOHSA-VI-NEXT:    v_perm_b32 v6, v6, v1, s4
; GCN-NOHSA-VI-NEXT:    v_alignbit_b32 v1, v5, v2, 16
; GCN-NOHSA-VI-NEXT:    v_perm_b32 v4, v4, v0, s4
; GCN-NOHSA-VI-NEXT:    v_alignbit_b32 v0, v12, v0, 16
; GCN-NOHSA-VI-NEXT:    v_perm_b32 v11, v11, v10, s4
; GCN-NOHSA-VI-NEXT:    v_perm_b32 v10, v9, v3, s4
; GCN-NOHSA-VI-NEXT:    v_perm_b32 v8, v8, v2, s4
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v9, 0xff00ff, v1
; GCN-NOHSA-VI-NEXT:    v_perm_b32 v7, v13, v7, s4
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v5, 0xff00ff, v0
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:16
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_zextload_v16i8_to_v16i16:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 3, @10, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @8
; EG-NEXT:    ALU 101, @14, KC0[], KC1[]
; EG-NEXT:    ALU 18, @116, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T21.XYZW, T20.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T22.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 8:
; EG-NEXT:     VTX_READ_128 T20.XYZW, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 10:
; EG-NEXT:     MOV T0.Y, T16.X,
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x, BS:VEC_120/SCL_212
; EG-NEXT:    4(5.605194e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 14:
; EG-NEXT:     AND_INT T0.W, T20.X, literal.x,
; EG-NEXT:     AND_INT * T1.W, T0.Y, literal.y,
; EG-NEXT:    255(3.573311e-43), -65536(nan)
; EG-NEXT:     OR_INT * T0.W, PS, PV.W,
; EG-NEXT:     MOV * T16.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     LSHL * T0.W, T20.X, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T1.W, PV.X, literal.x,
; EG-NEXT:     AND_INT * T0.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; EG-NEXT:     OR_INT * T0.W, PV.W, PS,
; EG-NEXT:     MOV T16.X, PV.W,
; EG-NEXT:     MOV * T0.X, T17.X,
; EG-NEXT:     MOV * T0.W, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T1.W, T20.X, literal.x, PV.W,
; EG-NEXT:     AND_INT * T2.W, T0.X, literal.y,
; EG-NEXT:    16(2.242078e-44), -65536(nan)
; EG-NEXT:     OR_INT * T1.W, PS, PV.W,
; EG-NEXT:     MOV * T17.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     LSHR * T1.W, T20.X, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T2.W, PV.X, literal.x,
; EG-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; EG-NEXT:     OR_INT * T21.Y, PV.W, PS,
; EG-NEXT:     MOV T17.X, PV.Y,
; EG-NEXT:     MOV * T0.X, T12.X,
; EG-NEXT:     AND_INT T1.W, PS, literal.x,
; EG-NEXT:     AND_INT * T2.W, T20.Y, literal.y,
; EG-NEXT:    -65536(nan), 255(3.573311e-43)
; EG-NEXT:     OR_INT * T1.W, PV.W, PS,
; EG-NEXT:     MOV * T12.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     LSHL * T1.W, T20.Y, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T2.W, PV.X, literal.x,
; EG-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; EG-NEXT:     OR_INT * T1.W, PV.W, PS,
; EG-NEXT:     MOV T12.X, PV.W,
; EG-NEXT:     MOV * T0.X, T13.X,
; EG-NEXT:     BFE_UINT T1.W, T20.Y, literal.x, T0.W,
; EG-NEXT:     AND_INT * T2.W, PS, literal.y,
; EG-NEXT:    16(2.242078e-44), -65536(nan)
; EG-NEXT:     OR_INT * T1.W, PS, PV.W,
; EG-NEXT:     MOV * T13.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     LSHR * T1.W, T20.Y, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T2.W, PV.X, literal.x,
; EG-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; EG-NEXT:     OR_INT * T21.W, PV.W, PS,
; EG-NEXT:     MOV T13.X, PV.W,
; EG-NEXT:     MOV * T0.X, T8.X,
; EG-NEXT:     AND_INT T1.W, PS, literal.x,
; EG-NEXT:     AND_INT * T2.W, T20.Z, literal.y,
; EG-NEXT:    -65536(nan), 255(3.573311e-43)
; EG-NEXT:     OR_INT * T1.W, PV.W, PS,
; EG-NEXT:     MOV * T8.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     LSHL * T1.W, T20.Z, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T2.W, PV.X, literal.x,
; EG-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; EG-NEXT:     OR_INT * T1.W, PV.W, PS,
; EG-NEXT:     MOV T8.X, PV.W,
; EG-NEXT:     MOV * T0.X, T9.X,
; EG-NEXT:     BFE_UINT T1.W, T20.Z, literal.x, T0.W,
; EG-NEXT:     AND_INT * T2.W, PS, literal.y,
; EG-NEXT:    16(2.242078e-44), -65536(nan)
; EG-NEXT:     OR_INT * T1.W, PS, PV.W,
; EG-NEXT:     MOV * T9.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     LSHR * T1.W, T20.Z, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T2.W, PV.X, literal.x,
; EG-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; EG-NEXT:     OR_INT * T0.Y, PV.W, PS,
; EG-NEXT:     MOV T9.X, PV.Y,
; EG-NEXT:     MOV * T0.X, T4.X,
; EG-NEXT:     AND_INT T1.W, PS, literal.x,
; EG-NEXT:     AND_INT * T2.W, T20.W, literal.y,
; EG-NEXT:    -65536(nan), 255(3.573311e-43)
; EG-NEXT:     OR_INT * T1.W, PV.W, PS,
; EG-NEXT:     MOV * T4.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     LSHL * T1.W, T20.W, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T2.W, PV.X, literal.x,
; EG-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; EG-NEXT:     OR_INT * T1.W, PV.W, PS,
; EG-NEXT:     MOV T4.X, PV.W,
; EG-NEXT:     MOV * T0.X, T5.X,
; EG-NEXT:     BFE_UINT * T0.W, T20.W, literal.x, T0.W,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:    ALU clause starting at 116:
; EG-NEXT:     AND_INT * T1.W, T0.X, literal.x,
; EG-NEXT:    -65536(nan), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T0.W, PV.W, T0.W,
; EG-NEXT:     MOV * T5.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     LSHR T0.W, T20.W, literal.x,
; EG-NEXT:     LSHR * T20.X, KC0[2].Y, literal.y,
; EG-NEXT:    8(1.121039e-44), 2(2.802597e-45)
; EG-NEXT:     AND_INT T1.W, PV.X, literal.x,
; EG-NEXT:     AND_INT * T0.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; EG-NEXT:     ADD_INT T22.X, T20.X, literal.x,
; EG-NEXT:     OR_INT * T0.W, PV.W, PS,
; EG-NEXT:    4(5.605194e-45), 0(0.000000e+00)
; EG-NEXT:     MOV T5.X, PV.W,
; EG-NEXT:     MOV * T21.X, T16.X,
; EG-NEXT:     MOV * T21.Z, T12.X,
; EG-NEXT:     MOV T0.X, T8.X,
; EG-NEXT:     MOV * T0.Z, T4.X, BS:VEC_120/SCL_212
;
; CM-LABEL: global_zextload_v16i8_to_v16i16:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 3, @10, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @8
; CM-NEXT:    ALU 101, @14, KC0[], KC1[]
; CM-NEXT:    ALU 19, @116, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0, T22.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T21, T20.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 8:
; CM-NEXT:     VTX_READ_128 T20.XYZW, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 10:
; CM-NEXT:     MOV T0.Y, T16.X,
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:    4(5.605194e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 14:
; CM-NEXT:     AND_INT T0.Z, T20.X, literal.x,
; CM-NEXT:     AND_INT * T0.W, T0.Y, literal.y,
; CM-NEXT:    255(3.573311e-43), -65536(nan)
; CM-NEXT:     OR_INT * T0.W, PV.W, PV.Z,
; CM-NEXT:     MOV * T16.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     LSHL * T0.W, T20.X, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     AND_INT * T0.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; CM-NEXT:     OR_INT * T0.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T16.X, PV.W,
; CM-NEXT:     MOV T0.X, T17.X,
; CM-NEXT:     MOV * T0.W, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     BFE_UINT * T1.W, T20.X, literal.y, PV.W,
; CM-NEXT:    -65536(nan), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T17.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     LSHR * T1.W, T20.X, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; CM-NEXT:     OR_INT * T21.Y, PV.Z, PV.W,
; CM-NEXT:     MOV * T17.X, PV.Y,
; CM-NEXT:     MOV * T0.X, T12.X,
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     AND_INT * T1.W, T20.Y, literal.y,
; CM-NEXT:    -65536(nan), 255(3.573311e-43)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T12.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     LSHL * T1.W, T20.Y, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T12.X, PV.W,
; CM-NEXT:     MOV * T0.X, T13.X,
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     BFE_UINT * T1.W, T20.Y, literal.y, T0.W,
; CM-NEXT:    -65536(nan), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T13.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     LSHR * T1.W, T20.Y, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; CM-NEXT:     OR_INT * T21.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T13.X, PV.W,
; CM-NEXT:     MOV * T0.X, T8.X,
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     AND_INT * T1.W, T20.Z, literal.y,
; CM-NEXT:    -65536(nan), 255(3.573311e-43)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T8.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     LSHL * T1.W, T20.Z, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T8.X, PV.W,
; CM-NEXT:     MOV * T0.X, T9.X,
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     BFE_UINT * T1.W, T20.Z, literal.y, T0.W,
; CM-NEXT:    -65536(nan), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T9.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     LSHR * T1.W, T20.Z, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; CM-NEXT:     OR_INT * T0.Y, PV.Z, PV.W,
; CM-NEXT:     MOV * T9.X, PV.Y,
; CM-NEXT:     MOV * T0.X, T4.X,
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     AND_INT * T1.W, T20.W, literal.y,
; CM-NEXT:    -65536(nan), 255(3.573311e-43)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T4.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     LSHL * T1.W, T20.W, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T4.X, PV.W,
; CM-NEXT:     MOV * T0.X, T5.X,
; CM-NEXT:     AND_INT * T0.Z, PV.X, literal.x,
; CM-NEXT:    -65536(nan), 0(0.000000e+00)
; CM-NEXT:    ALU clause starting at 116:
; CM-NEXT:     BFE_UINT * T0.W, T20.W, literal.x, T0.W,
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     OR_INT * T0.W, T0.Z, PV.W,
; CM-NEXT:     MOV * T5.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     LSHR * T0.W, T20.W, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     LSHR T20.X, KC0[2].Y, literal.x,
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.y,
; CM-NEXT:     AND_INT * T0.W, PV.W, literal.z,
; CM-NEXT:    2(2.802597e-45), 65535(9.183409e-41)
; CM-NEXT:    16711680(2.341805e-38), 0(0.000000e+00)
; CM-NEXT:     ADD_INT T22.X, PV.X, literal.x,
; CM-NEXT:     OR_INT * T0.W, PV.Z, PV.W,
; CM-NEXT:    4(5.605194e-45), 0(0.000000e+00)
; CM-NEXT:     MOV * T5.X, PV.W,
; CM-NEXT:     MOV T21.X, T16.X,
; CM-NEXT:     MOV * T21.Z, T12.X, BS:VEC_120/SCL_212
; CM-NEXT:     MOV T0.X, T8.X,
; CM-NEXT:     MOV * T0.Z, T4.X, BS:VEC_120/SCL_212
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <16 x i8>, ptr addrspace(1) %in, i32 %tid
  %load = load <16 x i8>, ptr addrspace(1) %in.tid
  %ext = zext <16 x i8> %load to <16 x i16>
  store <16 x i16> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_sextload_v16i8_to_v16i16(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_sextload_v16i8_to_v16i16:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s3
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[6:7]
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v1, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx4 v[0:3], v[0:1], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v4, 24, v1
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v5, v1, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v6, v1, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v1, v1, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v7, 24, v0
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v8, v0, 16, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v10, 24, v3
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v11, v3, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v12, v3, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v3, v3, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v13, 24, v2
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v14, v2, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v15, v2, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v2, v2, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v9, v0, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v0, v0, 0, 8
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v4, 16, v4
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v5, 0xffff, v5
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v6, 16, v6
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v7, 16, v7
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v8, 0xffff, v8
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v10, 16, v10
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v11, 0xffff, v11
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v12, 16, v12
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v16, 0xffff, v3
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v13, 16, v13
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v14, 0xffff, v14
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v15, 16, v15
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v17, 0xffff, v2
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v9, 16, v9
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v3, v5, v4
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v2, v1, v6
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v1, v8, v7
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v7, v11, v10
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v6, v16, v12
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v5, v14, v13
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v4, v17, v15
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v0, v0, v9
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_sextload_v16i8_to_v16i16:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 16
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v11, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v10, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v9, s1
; GCN-HSA-NEXT:    v_mov_b32_e32 v8, s0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v4, 24, v1
; GCN-HSA-NEXT:    v_bfe_i32 v5, v1, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v6, v1, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v1, v1, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v7, 24, v0
; GCN-HSA-NEXT:    v_bfe_i32 v12, v0, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v13, v0, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v0, v0, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v14, 24, v3
; GCN-HSA-NEXT:    v_bfe_i32 v15, v3, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v16, v3, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v17, v3, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v18, 24, v2
; GCN-HSA-NEXT:    v_bfe_i32 v19, v2, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v20, v2, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v21, v2, 0, 8
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v2, 16, v4
; GCN-HSA-NEXT:    v_and_b32_e32 v3, 0xffff, v5
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v4, 16, v6
; GCN-HSA-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; GCN-HSA-NEXT:    v_or_b32_e32 v3, v3, v2
; GCN-HSA-NEXT:    v_or_b32_e32 v2, v1, v4
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v1, 16, v7
; GCN-HSA-NEXT:    v_and_b32_e32 v4, 0xffff, v12
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v5, 16, v13
; GCN-HSA-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v6, 16, v14
; GCN-HSA-NEXT:    v_and_b32_e32 v7, 0xffff, v15
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v12, 16, v16
; GCN-HSA-NEXT:    v_and_b32_e32 v13, 0xffff, v17
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v14, 16, v18
; GCN-HSA-NEXT:    v_and_b32_e32 v15, 0xffff, v19
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v16, 16, v20
; GCN-HSA-NEXT:    v_and_b32_e32 v17, 0xffff, v21
; GCN-HSA-NEXT:    v_or_b32_e32 v1, v4, v1
; GCN-HSA-NEXT:    v_or_b32_e32 v0, v0, v5
; GCN-HSA-NEXT:    v_or_b32_e32 v7, v7, v6
; GCN-HSA-NEXT:    v_or_b32_e32 v6, v13, v12
; GCN-HSA-NEXT:    v_or_b32_e32 v5, v15, v14
; GCN-HSA-NEXT:    v_or_b32_e32 v4, v17, v16
; GCN-HSA-NEXT:    flat_store_dwordx4 v[10:11], v[4:7]
; GCN-HSA-NEXT:    flat_store_dwordx4 v[8:9], v[0:3]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_sextload_v16i8_to_v16i16:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v5, 0xffff
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v7, 8
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v8, 16, v2
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v4, 16, v3
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v6, 16, v0
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v9, 16, v1
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v10, v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i16_sdwa v1, v7, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v12, 24, v3
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v11, v5, sext(v0) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i16_sdwa v0, v7, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v13, v5, sext(v3) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i16_sdwa v3, v7, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v14, v5, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i16_sdwa v15, v7, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v2, v10, v1
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v1, v5, sext(v9) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v10, v5, sext(v6) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v12, 16, v12
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v16, v5, sext(v4) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v5, v5, sext(v8) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i16_sdwa v8, v7, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v0, v11, v0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i16_sdwa v9, v7, v9 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i16_sdwa v11, v7, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v6, v13, v3
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v4, v14, v15
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v7, v16, v12
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v5, v5, v8
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v3, v1, v9
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v1, v10, v11
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_sextload_v16i8_to_v16i16:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 3, @10, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @8
; EG-NEXT:    ALU 104, @14, KC0[], KC1[]
; EG-NEXT:    ALU 44, @119, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T21.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T20.XYZW, T22.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 8:
; EG-NEXT:     VTX_READ_128 T20.XYZW, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 10:
; EG-NEXT:     MOV T0.Y, T16.X,
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x, BS:VEC_120/SCL_212
; EG-NEXT:    4(5.605194e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 14:
; EG-NEXT:     BFE_INT * T0.W, T20.X, 0.0, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T0.W, PV.W, literal.x,
; EG-NEXT:     AND_INT * T1.W, T0.Y, literal.y,
; EG-NEXT:    65535(9.183409e-41), -65536(nan)
; EG-NEXT:     OR_INT * T0.W, PS, PV.W,
; EG-NEXT:     MOV * T16.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     LSHR * T0.W, T20.X, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T0.W, PV.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T1.W, PV.X, literal.y,
; EG-NEXT:    8(1.121039e-44), 65535(9.183409e-41)
; EG-NEXT:     LSHL * T0.W, PV.W, literal.x,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T0.W, T1.W, PV.W,
; EG-NEXT:     MOV T16.X, PV.W,
; EG-NEXT:     MOV * T0.X, T17.X,
; EG-NEXT:     LSHR * T0.W, T20.X, literal.x,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T0.W, PV.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T1.W, T0.X, literal.y,
; EG-NEXT:    8(1.121039e-44), -65536(nan)
; EG-NEXT:     AND_INT * T0.W, PV.W, literal.x,
; EG-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T0.W, T1.W, PV.W,
; EG-NEXT:     MOV * T17.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     ASHR * T0.W, T20.X, literal.x,
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T1.W, PV.X, literal.x,
; EG-NEXT:     LSHL * T0.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; EG-NEXT:     OR_INT * T0.Y, PV.W, PS,
; EG-NEXT:     MOV T17.X, PV.Y,
; EG-NEXT:     MOV * T0.X, T12.X,
; EG-NEXT:     BFE_INT T0.W, T20.Y, 0.0, literal.x,
; EG-NEXT:     AND_INT * T1.W, PS, literal.y,
; EG-NEXT:    8(1.121039e-44), -65536(nan)
; EG-NEXT:     AND_INT * T0.W, PV.W, literal.x,
; EG-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T0.W, T1.W, PV.W,
; EG-NEXT:     MOV * T12.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     LSHR * T0.W, T20.Y, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T0.W, PV.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T1.W, PV.X, literal.y,
; EG-NEXT:    8(1.121039e-44), 65535(9.183409e-41)
; EG-NEXT:     LSHL * T0.W, PV.W, literal.x,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T0.W, T1.W, PV.W,
; EG-NEXT:     MOV T12.X, PV.W,
; EG-NEXT:     MOV * T0.X, T13.X,
; EG-NEXT:     LSHR * T0.W, T20.Y, literal.x,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T0.W, PV.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T1.W, T0.X, literal.y,
; EG-NEXT:    8(1.121039e-44), -65536(nan)
; EG-NEXT:     AND_INT * T0.W, PV.W, literal.x,
; EG-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T0.W, T1.W, PV.W,
; EG-NEXT:     MOV * T13.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     ASHR * T0.W, T20.Y, literal.x,
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T1.W, PV.X, literal.x,
; EG-NEXT:     LSHL * T0.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; EG-NEXT:     OR_INT * T0.W, PV.W, PS,
; EG-NEXT:     MOV T13.X, PV.W,
; EG-NEXT:     MOV * T0.X, T8.X,
; EG-NEXT:     BFE_INT T1.W, T20.Z, 0.0, literal.x,
; EG-NEXT:     AND_INT * T2.W, PS, literal.y,
; EG-NEXT:    8(1.121039e-44), -65536(nan)
; EG-NEXT:     AND_INT * T1.W, PV.W, literal.x,
; EG-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T1.W, T2.W, PV.W,
; EG-NEXT:     MOV * T8.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     LSHR * T1.W, T20.Z, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T1.W, PV.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T2.W, PV.X, literal.y,
; EG-NEXT:    8(1.121039e-44), 65535(9.183409e-41)
; EG-NEXT:     LSHL * T1.W, PV.W, literal.x,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T1.W, T2.W, PV.W,
; EG-NEXT:     MOV T8.X, PV.W,
; EG-NEXT:     MOV * T0.X, T9.X,
; EG-NEXT:     LSHR * T1.W, T20.Z, literal.x,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T1.W, PV.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T2.W, T0.X, literal.y,
; EG-NEXT:    8(1.121039e-44), -65536(nan)
; EG-NEXT:     AND_INT * T1.W, PV.W, literal.x,
; EG-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T1.W, T2.W, PV.W,
; EG-NEXT:     MOV * T9.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     ASHR * T1.W, T20.Z, literal.x,
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T2.W, PV.X, literal.x,
; EG-NEXT:     LSHL * T1.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; EG-NEXT:    ALU clause starting at 119:
; EG-NEXT:     OR_INT * T20.Y, T2.W, T1.W,
; EG-NEXT:     MOV T9.X, PV.Y,
; EG-NEXT:     MOV * T0.X, T4.X,
; EG-NEXT:     BFE_INT T1.W, T20.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T2.W, PS, literal.y,
; EG-NEXT:    8(1.121039e-44), -65536(nan)
; EG-NEXT:     AND_INT * T1.W, PV.W, literal.x,
; EG-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T1.W, T2.W, PV.W,
; EG-NEXT:     MOV * T4.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     LSHR * T1.W, T20.W, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T1.W, PV.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T2.W, PV.X, literal.y,
; EG-NEXT:    8(1.121039e-44), 65535(9.183409e-41)
; EG-NEXT:     LSHL * T1.W, PV.W, literal.x,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T1.W, T2.W, PV.W,
; EG-NEXT:     MOV T4.X, PV.W,
; EG-NEXT:     MOV * T0.X, T5.X,
; EG-NEXT:     LSHR * T1.W, T20.W, literal.x,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T1.W, PV.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T2.W, T0.X, literal.y,
; EG-NEXT:    8(1.121039e-44), -65536(nan)
; EG-NEXT:     AND_INT * T1.W, PV.W, literal.x,
; EG-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T1.W, T2.W, PV.W,
; EG-NEXT:     MOV * T5.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     ASHR T1.W, T20.W, literal.x,
; EG-NEXT:     LSHR * T21.X, KC0[2].Y, literal.y,
; EG-NEXT:    24(3.363116e-44), 2(2.802597e-45)
; EG-NEXT:     AND_INT T2.W, PV.X, literal.x,
; EG-NEXT:     LSHL * T1.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; EG-NEXT:     ADD_INT T22.X, T21.X, literal.x,
; EG-NEXT:     OR_INT * T20.W, PV.W, PS,
; EG-NEXT:    4(5.605194e-45), 0(0.000000e+00)
; EG-NEXT:     MOV T5.X, PV.W,
; EG-NEXT:     MOV * T0.X, T16.X,
; EG-NEXT:     MOV * T0.Z, T12.X,
; EG-NEXT:     MOV T20.X, T8.X,
; EG-NEXT:     MOV * T20.Z, T4.X, BS:VEC_120/SCL_212
;
; CM-LABEL: global_sextload_v16i8_to_v16i16:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 3, @10, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 0 @8
; CM-NEXT:    ALU 104, @14, KC0[], KC1[]
; CM-NEXT:    ALU 45, @119, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T20, T22.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0, T21.X
; CM-NEXT:    CF_END
; CM-NEXT:    PAD
; CM-NEXT:    Fetch clause starting at 8:
; CM-NEXT:     VTX_READ_128 T20.XYZW, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 10:
; CM-NEXT:     MOV T0.Y, T16.X,
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:    4(5.605194e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 14:
; CM-NEXT:     BFE_INT * T0.W, T20.X, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.W, literal.x,
; CM-NEXT:     AND_INT * T0.W, T0.Y, literal.y,
; CM-NEXT:    65535(9.183409e-41), -65536(nan)
; CM-NEXT:     OR_INT * T0.W, PV.W, PV.Z,
; CM-NEXT:     MOV * T16.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     LSHR * T0.W, T20.X, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T0.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, T0.X, literal.x,
; CM-NEXT:     LSHL * T0.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T0.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T16.X, PV.W,
; CM-NEXT:     MOV T0.X, T17.X,
; CM-NEXT:     LSHR * T0.W, T20.X, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T0.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, T0.X, literal.x,
; CM-NEXT:     AND_INT * T0.W, PV.W, literal.y,
; CM-NEXT:    -65536(nan), 65535(9.183409e-41)
; CM-NEXT:     OR_INT * T0.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T17.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     ASHR * T0.W, T20.X, literal.x,
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     LSHL * T0.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T0.Y, PV.Z, PV.W,
; CM-NEXT:     MOV * T17.X, PV.Y,
; CM-NEXT:     MOV T0.X, T12.X,
; CM-NEXT:     BFE_INT * T0.W, T20.Y, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     AND_INT * T0.W, PV.W, literal.y,
; CM-NEXT:    -65536(nan), 65535(9.183409e-41)
; CM-NEXT:     OR_INT * T0.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T12.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     LSHR * T0.W, T20.Y, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T0.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, T0.X, literal.x,
; CM-NEXT:     LSHL * T0.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T0.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T12.X, PV.W,
; CM-NEXT:     MOV T0.X, T13.X,
; CM-NEXT:     LSHR * T0.W, T20.Y, literal.x,
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T0.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, T0.X, literal.x,
; CM-NEXT:     AND_INT * T0.W, PV.W, literal.y,
; CM-NEXT:    -65536(nan), 65535(9.183409e-41)
; CM-NEXT:     OR_INT * T0.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T13.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     ASHR * T0.W, T20.Y, literal.x,
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     LSHL * T0.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T0.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T13.X, PV.W,
; CM-NEXT:     MOV T0.X, T8.X,
; CM-NEXT:     BFE_INT * T1.W, T20.Z, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; CM-NEXT:    -65536(nan), 65535(9.183409e-41)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T8.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     LSHR * T1.W, T20.Z, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T1.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, T0.X, literal.x,
; CM-NEXT:     LSHL * T1.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T8.X, PV.W,
; CM-NEXT:     MOV T0.X, T9.X,
; CM-NEXT:     LSHR * T1.W, T20.Z, literal.x,
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T1.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, T0.X, literal.x,
; CM-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; CM-NEXT:    -65536(nan), 65535(9.183409e-41)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T9.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     ASHR * T1.W, T20.Z, literal.x,
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     LSHL * T1.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; CM-NEXT:    ALU clause starting at 119:
; CM-NEXT:     OR_INT * T20.Y, T0.Z, T1.W,
; CM-NEXT:     MOV * T9.X, PV.Y,
; CM-NEXT:     MOV T0.X, T4.X,
; CM-NEXT:     BFE_INT * T1.W, T20.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; CM-NEXT:    -65536(nan), 65535(9.183409e-41)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T4.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     LSHR * T1.W, T20.W, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T1.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, T0.X, literal.x,
; CM-NEXT:     LSHL * T1.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T4.X, PV.W,
; CM-NEXT:     MOV T0.X, T5.X,
; CM-NEXT:     LSHR * T1.W, T20.W, literal.x,
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T1.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, T0.X, literal.x,
; CM-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; CM-NEXT:    -65536(nan), 65535(9.183409e-41)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T5.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     ASHR * T1.W, T20.W, literal.x,
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     LSHR T21.X, KC0[2].Y, literal.x,
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.y,
; CM-NEXT:     LSHL * T1.W, PV.W, literal.z,
; CM-NEXT:    2(2.802597e-45), 65535(9.183409e-41)
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT T22.X, PV.X, literal.x,
; CM-NEXT:     OR_INT * T20.W, PV.Z, PV.W,
; CM-NEXT:    4(5.605194e-45), 0(0.000000e+00)
; CM-NEXT:     MOV * T5.X, PV.W,
; CM-NEXT:     MOV T0.X, T16.X,
; CM-NEXT:     MOV * T0.Z, T12.X, BS:VEC_120/SCL_212
; CM-NEXT:     MOV T20.X, T8.X,
; CM-NEXT:     MOV * T20.Z, T4.X, BS:VEC_120/SCL_212
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <16 x i8>, ptr addrspace(1) %in, i32 %tid
  %load = load <16 x i8>, ptr addrspace(1) %in.tid
  %ext = sext <16 x i8> %load to <16 x i16>
  store <16 x i16> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_zextload_v32i8_to_v32i16(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_zextload_v32i8_to_v32i16:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s3
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v7, 5, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[6:7]
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v8, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx4 v[0:3], v[7:8], s[8:11], 0 addr64 offset:16
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v4, 0xff00, v2
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v9, 0xff, v2
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v4, 8, v4
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v4, v9, v4
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx4 v[8:11], v[7:8], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v5, 0xff00, v3
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v6, 0xff, v3
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v5, 8, v5
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v6, v6, v5
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v5, 24, v3
; GCN-NOHSA-SI-NEXT:    v_alignbit_b32 v3, v5, v3, 16
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v7, 0xff00ff, v3
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v3, 24, v2
; GCN-NOHSA-SI-NEXT:    v_alignbit_b32 v2, v3, v2, 16
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v5, 0xff00ff, v2
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:48
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v15, 24, v0
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v14, 24, v1
; GCN-NOHSA-SI-NEXT:    v_alignbit_b32 v15, v15, v0, 16
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v16, 0xff00, v0
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v17, 0xff00, v1
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v18, 0xff, v0
; GCN-NOHSA-SI-NEXT:    v_alignbit_b32 v14, v14, v1, 16
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v1, 0xff, v1
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(1)
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v2, 24, v10
; GCN-NOHSA-SI-NEXT:    s_waitcnt expcnt(0)
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v4, 24, v11
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v6, 24, v9
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v3, 0xff00, v10
; GCN-NOHSA-SI-NEXT:    v_lshrrev_b32_e32 v5, 24, v8
; GCN-NOHSA-SI-NEXT:    v_alignbit_b32 v7, v6, v9, 16
; GCN-NOHSA-SI-NEXT:    v_alignbit_b32 v12, v4, v11, 16
; GCN-NOHSA-SI-NEXT:    v_alignbit_b32 v13, v2, v10, 16
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v4, 0xff00, v11
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v2, 0xff00, v8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v6, 0xff00, v9
; GCN-NOHSA-SI-NEXT:    v_alignbit_b32 v5, v5, v8, 16
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v9, 0xff, v9
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v8, 0xff, v8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v11, 0xff, v11
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v10, 0xff, v10
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v0, 8, v6
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v6, 8, v2
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v4, 8, v4
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v3, 8, v3
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v2, v9, v0
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v0, v8, v6
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v6, v11, v4
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v4, v10, v3
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v3, 8, v17
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v8, 8, v16
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v10, v1, v3
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v8, v18, v8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v11, 0xff00ff, v14
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v9, 0xff00ff, v15
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v3, 0xff00ff, v7
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v1, 0xff00ff, v5
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v7, 0xff00ff, v12
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v5, 0xff00ff, v13
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:32
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_zextload_v32i8_to_v32i16:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v4, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dwordx4 v[0:3], v[4:5]
; GCN-HSA-NEXT:    v_add_i32_e32 v4, vcc, 16, v4
; GCN-HSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
; GCN-HSA-NEXT:    flat_load_dwordx4 v[4:7], v[4:5]
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 16
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v13, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v12, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 48
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(1)
; GCN-HSA-NEXT:    v_and_b32_e32 v8, 0xff00, v2
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v9, 24, v2
; GCN-HSA-NEXT:    v_and_b32_e32 v10, 0xff00, v3
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v11, 24, v3
; GCN-HSA-NEXT:    v_and_b32_e32 v16, 0xff, v3
; GCN-HSA-NEXT:    v_and_b32_e32 v17, 0xff, v2
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v10, 8, v10
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v8, 8, v8
; GCN-HSA-NEXT:    v_alignbit_b32 v3, v11, v3, 16
; GCN-HSA-NEXT:    v_alignbit_b32 v2, v9, v2, 16
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v15, 24, v0
; GCN-HSA-NEXT:    v_or_b32_e32 v10, v16, v10
; GCN-HSA-NEXT:    v_or_b32_e32 v8, v17, v8
; GCN-HSA-NEXT:    v_and_b32_e32 v16, 0xff00, v1
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v17, 24, v1
; GCN-HSA-NEXT:    v_and_b32_e32 v11, 0xff00ff, v3
; GCN-HSA-NEXT:    v_and_b32_e32 v9, 0xff00ff, v2
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v2, 24, v6
; GCN-HSA-NEXT:    v_and_b32_e32 v14, 0xff00, v0
; GCN-HSA-NEXT:    v_and_b32_e32 v3, 0xff, v1
; GCN-HSA-NEXT:    v_and_b32_e32 v18, 0xff, v0
; GCN-HSA-NEXT:    flat_store_dwordx4 v[12:13], v[8:11]
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v12, 24, v4
; GCN-HSA-NEXT:    v_alignbit_b32 v1, v17, v1, 16
; GCN-HSA-NEXT:    v_alignbit_b32 v0, v15, v0, 16
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v13, 24, v5
; GCN-HSA-NEXT:    v_alignbit_b32 v21, v2, v6, 16
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v2, 8, v16
; GCN-HSA-NEXT:    v_and_b32_e32 v8, 0xff00, v6
; GCN-HSA-NEXT:    v_and_b32_e32 v9, 0xff00, v7
; GCN-HSA-NEXT:    v_lshrrev_b32_e32 v10, 24, v7
; GCN-HSA-NEXT:    v_and_b32_e32 v11, 0xff00, v4
; GCN-HSA-NEXT:    v_and_b32_e32 v15, 0xff00, v5
; GCN-HSA-NEXT:    v_and_b32_e32 v17, 0xff, v5
; GCN-HSA-NEXT:    v_and_b32_e32 v19, 0xff, v4
; GCN-HSA-NEXT:    v_alignbit_b32 v5, v13, v5, 16
; GCN-HSA-NEXT:    v_alignbit_b32 v4, v12, v4, 16
; GCN-HSA-NEXT:    v_or_b32_e32 v2, v3, v2
; GCN-HSA-NEXT:    v_and_b32_e32 v3, 0xff00ff, v1
; GCN-HSA-NEXT:    v_and_b32_e32 v1, 0xff00ff, v0
; GCN-HSA-NEXT:    v_mov_b32_e32 v13, s1
; GCN-HSA-NEXT:    v_mov_b32_e32 v12, s0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 8, v14
; GCN-HSA-NEXT:    s_add_u32 s0, s0, 32
; GCN-HSA-NEXT:    v_alignbit_b32 v20, v10, v7, 16
; GCN-HSA-NEXT:    v_and_b32_e32 v10, 0xff, v7
; GCN-HSA-NEXT:    v_and_b32_e32 v22, 0xff, v6
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v6, 8, v15
; GCN-HSA-NEXT:    v_or_b32_e32 v0, v18, v0
; GCN-HSA-NEXT:    v_and_b32_e32 v7, 0xff00ff, v5
; GCN-HSA-NEXT:    v_and_b32_e32 v5, 0xff00ff, v4
; GCN-HSA-NEXT:    s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v4, 8, v11
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v9, 8, v9
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v8, 8, v8
; GCN-HSA-NEXT:    v_or_b32_e32 v6, v17, v6
; GCN-HSA-NEXT:    v_mov_b32_e32 v15, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v14, s2
; GCN-HSA-NEXT:    v_or_b32_e32 v4, v19, v4
; GCN-HSA-NEXT:    v_or_b32_e32 v10, v10, v9
; GCN-HSA-NEXT:    v_and_b32_e32 v11, 0xff00ff, v20
; GCN-HSA-NEXT:    v_and_b32_e32 v9, 0xff00ff, v21
; GCN-HSA-NEXT:    v_mov_b32_e32 v17, s1
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, s0
; GCN-HSA-NEXT:    v_or_b32_e32 v8, v22, v8
; GCN-HSA-NEXT:    flat_store_dwordx4 v[12:13], v[0:3]
; GCN-HSA-NEXT:    flat_store_dwordx4 v[14:15], v[8:11]
; GCN-HSA-NEXT:    flat_store_dwordx4 v[16:17], v[4:7]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_zextload_v32i8_to_v32i16:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v4, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx4 v[0:3], v[4:5]
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v4, vcc, 16, v4
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx4 v[4:7], v[4:5]
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, 0x5040c00
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(1)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v9, 24, v2
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v12, v3, 8, 8
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v13, 16, v3
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v15, 24, v3
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v8, 8, v0
; GCN-NOHSA-VI-NEXT:    v_perm_b32 v14, v12, v3, s2
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v3, 24, v0
; GCN-NOHSA-VI-NEXT:    v_alignbit_b32 v20, v9, v2, 16
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v9, 8, v6
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v11, 8, v2
; GCN-NOHSA-VI-NEXT:    v_perm_b32 v8, v8, v0, s2
; GCN-NOHSA-VI-NEXT:    v_alignbit_b32 v17, v3, v0, 16
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b16_e32 v0, 8, v4
; GCN-NOHSA-VI-NEXT:    v_perm_b32 v16, v9, v6, s2
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v9, 24, v4
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v10, v1, 8, 8
; GCN-NOHSA-VI-NEXT:    v_perm_b32 v12, v11, v2, s2
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v2, v5, 8, 8
; GCN-NOHSA-VI-NEXT:    v_perm_b32 v0, v0, v4, s2
; GCN-NOHSA-VI-NEXT:    v_bfe_u32 v11, v7, 8, 8
; GCN-NOHSA-VI-NEXT:    v_alignbit_b32 v4, v9, v4, 16
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v9, 24, v6
; GCN-NOHSA-VI-NEXT:    v_perm_b32 v10, v10, v1, s2
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v3, 16, v1
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v1, 24, v1
; GCN-NOHSA-VI-NEXT:    v_perm_b32 v2, v2, v5, s2
; GCN-NOHSA-VI-NEXT:    v_perm_b32 v18, v11, v7, s2
; GCN-NOHSA-VI-NEXT:    v_alignbit_b32 v6, v9, v6, 16
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v9, 16, v7
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v7, 24, v7
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v19, 16, v5
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v5, 24, v5
; GCN-NOHSA-VI-NEXT:    v_perm_b32 v11, v1, v3, s2
; GCN-NOHSA-VI-NEXT:    v_perm_b32 v15, v15, v13, s2
; GCN-NOHSA-VI-NEXT:    v_perm_b32 v3, v5, v19, s2
; GCN-NOHSA-VI-NEXT:    v_perm_b32 v19, v7, v9, s2
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v13, 0xff00ff, v20
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v9, 0xff00ff, v17
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v1, 0xff00ff, v4
; GCN-NOHSA-VI-NEXT:    v_and_b32_e32 v17, 0xff00ff, v6
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:16
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:48
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_zextload_v32i8_to_v32i16:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 3, @14, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 1 @10
; EG-NEXT:    ALU 103, @18, KC0[], KC1[]
; EG-NEXT:    ALU 102, @122, KC0[], KC1[]
; EG-NEXT:    ALU 36, @225, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T36.XYZW, T42.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T37.XYZW, T41.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T38.XYZW, T39.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T40.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 10:
; EG-NEXT:     VTX_READ_128 T37.XYZW, T0.X, 16, #1
; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 14:
; EG-NEXT:     MOV T1.Y, T16.X,
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x, BS:VEC_120/SCL_212
; EG-NEXT:    5(7.006492e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 18:
; EG-NEXT:     AND_INT T1.W, T37.X, literal.x,
; EG-NEXT:     AND_INT * T2.W, T1.Y, literal.y,
; EG-NEXT:    255(3.573311e-43), -65536(nan)
; EG-NEXT:     OR_INT * T1.W, PS, PV.W,
; EG-NEXT:     MOV * T16.X, PV.W,
; EG-NEXT:     MOV T1.Y, PV.X,
; EG-NEXT:     LSHL * T1.W, T37.X, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T2.W, PV.Y, literal.x,
; EG-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; EG-NEXT:     OR_INT * T1.W, PV.W, PS,
; EG-NEXT:     MOV T16.X, PV.W,
; EG-NEXT:     MOV T1.Y, T17.X,
; EG-NEXT:     MOV * T1.W, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_UINT T2.W, T37.X, literal.x, PV.W,
; EG-NEXT:     AND_INT * T3.W, PV.Y, literal.y,
; EG-NEXT:    16(2.242078e-44), -65536(nan)
; EG-NEXT:     OR_INT * T2.W, PS, PV.W,
; EG-NEXT:     MOV * T17.X, PV.W,
; EG-NEXT:     MOV T1.Y, PV.X,
; EG-NEXT:     LSHR * T2.W, T37.X, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T3.W, PV.Y, literal.x,
; EG-NEXT:     AND_INT * T2.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; EG-NEXT:     OR_INT * T36.Y, PV.W, PS,
; EG-NEXT:     MOV T17.X, PV.Y,
; EG-NEXT:     MOV * T1.Y, T12.X,
; EG-NEXT:     AND_INT T2.W, PV.Y, literal.x,
; EG-NEXT:     AND_INT * T3.W, T37.Y, literal.y,
; EG-NEXT:    -65536(nan), 255(3.573311e-43)
; EG-NEXT:     OR_INT * T2.W, PV.W, PS,
; EG-NEXT:     MOV * T12.X, PV.W,
; EG-NEXT:     MOV T1.Y, PV.X,
; EG-NEXT:     LSHL * T2.W, T37.Y, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T3.W, PV.Y, literal.x,
; EG-NEXT:     AND_INT * T2.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; EG-NEXT:     OR_INT * T2.W, PV.W, PS,
; EG-NEXT:     MOV T12.X, PV.W,
; EG-NEXT:     MOV T1.Y, T13.X,
; EG-NEXT:     BFE_UINT * T2.W, T37.Y, literal.x, T1.W,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT * T3.W, PV.Y, literal.x,
; EG-NEXT:    -65536(nan), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T2.W, PV.W, T2.W,
; EG-NEXT:     MOV * T13.X, PV.W,
; EG-NEXT:     MOV T1.Y, PV.X,
; EG-NEXT:     LSHR * T2.W, T37.Y, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T3.W, PV.Y, literal.x,
; EG-NEXT:     AND_INT * T2.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; EG-NEXT:     OR_INT * T36.W, PV.W, PS,
; EG-NEXT:     MOV T13.X, PV.W,
; EG-NEXT:     MOV * T1.Y, T8.X,
; EG-NEXT:     AND_INT T2.W, PV.Y, literal.x,
; EG-NEXT:     AND_INT * T3.W, T37.Z, literal.y,
; EG-NEXT:    -65536(nan), 255(3.573311e-43)
; EG-NEXT:     OR_INT * T2.W, PV.W, PS,
; EG-NEXT:     MOV * T8.X, PV.W,
; EG-NEXT:     MOV T1.Y, PV.X,
; EG-NEXT:     LSHL * T2.W, T37.Z, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T3.W, PV.Y, literal.x,
; EG-NEXT:     AND_INT * T2.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; EG-NEXT:     OR_INT * T2.W, PV.W, PS,
; EG-NEXT:     MOV T8.X, PV.W,
; EG-NEXT:     MOV T1.Y, T9.X,
; EG-NEXT:     BFE_UINT * T2.W, T37.Z, literal.x, T1.W,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT * T3.W, PV.Y, literal.x,
; EG-NEXT:    -65536(nan), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T2.W, PV.W, T2.W,
; EG-NEXT:     MOV * T9.X, PV.W,
; EG-NEXT:     MOV T1.Y, PV.X,
; EG-NEXT:     LSHR * T2.W, T37.Z, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T3.W, PV.Y, literal.x,
; EG-NEXT:     AND_INT * T2.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; EG-NEXT:     OR_INT * T37.Y, PV.W, PS,
; EG-NEXT:     MOV T9.X, PV.Y,
; EG-NEXT:     MOV * T1.Y, T4.X,
; EG-NEXT:     AND_INT T2.W, PV.Y, literal.x,
; EG-NEXT:     AND_INT * T3.W, T37.W, literal.y,
; EG-NEXT:    -65536(nan), 255(3.573311e-43)
; EG-NEXT:     OR_INT * T2.W, PV.W, PS,
; EG-NEXT:     MOV * T4.X, PV.W,
; EG-NEXT:     MOV T1.Y, PV.X,
; EG-NEXT:     LSHL * T2.W, T37.W, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T3.W, PV.Y, literal.x,
; EG-NEXT:     AND_INT * T2.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; EG-NEXT:     OR_INT * T2.W, PV.W, PS,
; EG-NEXT:     MOV T4.X, PV.W,
; EG-NEXT:     MOV T1.Y, T5.X,
; EG-NEXT:     BFE_UINT * T2.W, T37.W, literal.x, T1.W,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:    ALU clause starting at 122:
; EG-NEXT:     AND_INT * T3.W, T1.Y, literal.x,
; EG-NEXT:    -65536(nan), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T2.W, PV.W, T2.W,
; EG-NEXT:     MOV * T5.X, PV.W,
; EG-NEXT:     MOV T1.Y, PV.X,
; EG-NEXT:     LSHR * T2.W, T37.W, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T3.W, PV.Y, literal.x,
; EG-NEXT:     AND_INT * T2.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; EG-NEXT:     OR_INT * T37.W, PV.W, PS,
; EG-NEXT:     MOV T5.X, PV.W,
; EG-NEXT:     MOV * T1.Y, T32.X,
; EG-NEXT:     AND_INT T2.W, PV.Y, literal.x,
; EG-NEXT:     AND_INT * T3.W, T0.X, literal.y,
; EG-NEXT:    -65536(nan), 255(3.573311e-43)
; EG-NEXT:     OR_INT * T2.W, PV.W, PS,
; EG-NEXT:     MOV * T32.X, PV.W,
; EG-NEXT:     MOV T1.Y, PV.X,
; EG-NEXT:     LSHL * T2.W, T0.X, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T3.W, PV.Y, literal.x,
; EG-NEXT:     AND_INT * T2.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; EG-NEXT:     OR_INT * T2.W, PV.W, PS,
; EG-NEXT:     MOV T32.X, PV.W,
; EG-NEXT:     MOV T1.Y, T33.X,
; EG-NEXT:     BFE_UINT * T2.W, T0.X, literal.x, T1.W, BS:VEC_120/SCL_212
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT * T3.W, PV.Y, literal.x,
; EG-NEXT:    -65536(nan), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T2.W, PV.W, T2.W,
; EG-NEXT:     MOV * T33.X, PV.W,
; EG-NEXT:     MOV T1.Y, PV.X,
; EG-NEXT:     LSHR * T2.W, T0.X, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T3.W, PV.Y, literal.x,
; EG-NEXT:     AND_INT * T2.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; EG-NEXT:     OR_INT * T38.Y, PV.W, PS,
; EG-NEXT:     MOV T33.X, PV.Y,
; EG-NEXT:     MOV * T0.X, T28.X,
; EG-NEXT:     AND_INT T2.W, PS, literal.x,
; EG-NEXT:     AND_INT * T3.W, T0.Y, literal.y,
; EG-NEXT:    -65536(nan), 255(3.573311e-43)
; EG-NEXT:     OR_INT * T2.W, PV.W, PS,
; EG-NEXT:     MOV * T28.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     LSHL * T2.W, T0.Y, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T3.W, PV.X, literal.x,
; EG-NEXT:     AND_INT * T2.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; EG-NEXT:     OR_INT * T2.W, PV.W, PS,
; EG-NEXT:     MOV T28.X, PV.W,
; EG-NEXT:     MOV * T0.X, T29.X,
; EG-NEXT:     BFE_UINT T2.W, T0.Y, literal.x, T1.W,
; EG-NEXT:     AND_INT * T3.W, PS, literal.y,
; EG-NEXT:    16(2.242078e-44), -65536(nan)
; EG-NEXT:     OR_INT * T2.W, PS, PV.W,
; EG-NEXT:     MOV * T29.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     LSHR * T2.W, T0.Y, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T3.W, PV.X, literal.x,
; EG-NEXT:     AND_INT * T2.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; EG-NEXT:     OR_INT * T38.W, PV.W, PS,
; EG-NEXT:     MOV T29.X, PV.W,
; EG-NEXT:     MOV * T0.X, T24.X,
; EG-NEXT:     AND_INT T2.W, PS, literal.x,
; EG-NEXT:     AND_INT * T3.W, T0.Z, literal.y,
; EG-NEXT:    -65536(nan), 255(3.573311e-43)
; EG-NEXT:     OR_INT * T2.W, PV.W, PS,
; EG-NEXT:     MOV * T24.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     LSHL * T2.W, T0.Z, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T3.W, PV.X, literal.x,
; EG-NEXT:     AND_INT * T2.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; EG-NEXT:     OR_INT * T2.W, PV.W, PS,
; EG-NEXT:     MOV T24.X, PV.W,
; EG-NEXT:     MOV * T0.X, T25.X,
; EG-NEXT:     BFE_UINT T2.W, T0.Z, literal.x, T1.W,
; EG-NEXT:     AND_INT * T3.W, PS, literal.y,
; EG-NEXT:    16(2.242078e-44), -65536(nan)
; EG-NEXT:     OR_INT * T2.W, PS, PV.W,
; EG-NEXT:     MOV * T25.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     LSHR * T2.W, T0.Z, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T3.W, PV.X, literal.x,
; EG-NEXT:     AND_INT * T2.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; EG-NEXT:     OR_INT * T0.Y, PV.W, PS,
; EG-NEXT:     MOV T25.X, PV.Y,
; EG-NEXT:     MOV * T0.X, T20.X,
; EG-NEXT:     AND_INT T2.W, PS, literal.x,
; EG-NEXT:     AND_INT * T3.W, T0.W, literal.y,
; EG-NEXT:    -65536(nan), 255(3.573311e-43)
; EG-NEXT:     OR_INT * T2.W, PV.W, PS,
; EG-NEXT:     MOV * T20.X, PV.W,
; EG-NEXT:    ALU clause starting at 225:
; EG-NEXT:     MOV T0.X, T20.X,
; EG-NEXT:     LSHL * T2.W, T0.W, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T3.W, PV.X, literal.x,
; EG-NEXT:     AND_INT * T2.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; EG-NEXT:     OR_INT * T2.W, PV.W, PS,
; EG-NEXT:     MOV T20.X, PV.W,
; EG-NEXT:     MOV * T0.X, T21.X,
; EG-NEXT:     BFE_UINT T1.W, T0.W, literal.x, T1.W,
; EG-NEXT:     AND_INT * T2.W, PS, literal.y,
; EG-NEXT:    16(2.242078e-44), -65536(nan)
; EG-NEXT:     OR_INT * T1.W, PS, PV.W,
; EG-NEXT:     MOV * T21.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     LSHR * T39.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T40.X, PS, literal.x,
; EG-NEXT:     LSHR T0.W, T0.W, literal.y,
; EG-NEXT:     ADD_INT * T41.X, PS, literal.z,
; EG-NEXT:    4(5.605194e-45), 8(1.121039e-44)
; EG-NEXT:    12(1.681558e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T1.W, T0.X, literal.x,
; EG-NEXT:     AND_INT * T0.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; EG-NEXT:     ADD_INT T42.X, T39.X, literal.x,
; EG-NEXT:     OR_INT * T0.W, PV.W, PS,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     MOV T21.X, PV.W,
; EG-NEXT:     MOV * T36.X, T16.X,
; EG-NEXT:     MOV * T36.Z, T12.X,
; EG-NEXT:     MOV T37.X, T8.X,
; EG-NEXT:     MOV T37.Z, T4.X, BS:VEC_120/SCL_212
; EG-NEXT:     MOV * T38.X, T32.X,
; EG-NEXT:     MOV * T38.Z, T28.X,
; EG-NEXT:     MOV T0.X, T24.X,
; EG-NEXT:     MOV * T0.Z, T20.X, BS:VEC_120/SCL_212
;
; CM-LABEL: global_zextload_v32i8_to_v32i16:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 3, @14, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 1 @10
; CM-NEXT:    ALU 101, @18, KC0[], KC1[]
; CM-NEXT:    ALU 101, @120, KC0[], KC1[]
; CM-NEXT:    ALU 36, @222, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0, T42.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T38, T39.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T37, T41.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T36, T40.X
; CM-NEXT:    CF_END
; CM-NEXT:    Fetch clause starting at 10:
; CM-NEXT:     VTX_READ_128 T37.XYZW, T0.X, 16, #1
; CM-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 14:
; CM-NEXT:     MOV T1.Y, T16.X,
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:    5(7.006492e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 18:
; CM-NEXT:     AND_INT T1.Z, T37.X, literal.x,
; CM-NEXT:     AND_INT * T1.W, T1.Y, literal.y,
; CM-NEXT:    255(3.573311e-43), -65536(nan)
; CM-NEXT:     OR_INT * T1.W, PV.W, PV.Z,
; CM-NEXT:     MOV * T16.X, PV.W,
; CM-NEXT:     MOV T1.Y, PV.X,
; CM-NEXT:     LSHL * T1.W, T37.X, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, PV.Y, literal.x,
; CM-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV T16.X, PV.W,
; CM-NEXT:     MOV T1.Y, T17.X,
; CM-NEXT:     MOV * T1.W, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, PV.Y, literal.x,
; CM-NEXT:     BFE_UINT * T2.W, T37.X, literal.y, PV.W,
; CM-NEXT:    -65536(nan), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T2.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T17.X, PV.W,
; CM-NEXT:     MOV T1.Y, PV.X,
; CM-NEXT:     LSHR * T2.W, T37.X, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, PV.Y, literal.x,
; CM-NEXT:     AND_INT * T2.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; CM-NEXT:     OR_INT * T36.Y, PV.Z, PV.W,
; CM-NEXT:     MOV T17.X, PV.Y,
; CM-NEXT:     MOV * T1.Y, T12.X,
; CM-NEXT:     AND_INT T1.Z, PV.Y, literal.x,
; CM-NEXT:     AND_INT * T2.W, T37.Y, literal.y,
; CM-NEXT:    -65536(nan), 255(3.573311e-43)
; CM-NEXT:     OR_INT * T2.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T12.X, PV.W,
; CM-NEXT:     MOV T1.Y, PV.X,
; CM-NEXT:     LSHL * T2.W, T37.Y, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, PV.Y, literal.x,
; CM-NEXT:     AND_INT * T2.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; CM-NEXT:     OR_INT * T2.W, PV.Z, PV.W,
; CM-NEXT:     MOV T12.X, PV.W,
; CM-NEXT:     MOV * T1.Y, T13.X,
; CM-NEXT:     AND_INT T1.Z, PV.Y, literal.x,
; CM-NEXT:     BFE_UINT * T2.W, T37.Y, literal.y, T1.W,
; CM-NEXT:    -65536(nan), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T2.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T13.X, PV.W,
; CM-NEXT:     MOV T1.Y, PV.X,
; CM-NEXT:     LSHR * T2.W, T37.Y, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, PV.Y, literal.x,
; CM-NEXT:     AND_INT * T2.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; CM-NEXT:     OR_INT * T36.W, PV.Z, PV.W,
; CM-NEXT:     MOV T13.X, PV.W,
; CM-NEXT:     MOV * T1.Y, T8.X,
; CM-NEXT:     AND_INT T1.Z, PV.Y, literal.x,
; CM-NEXT:     AND_INT * T2.W, T37.Z, literal.y,
; CM-NEXT:    -65536(nan), 255(3.573311e-43)
; CM-NEXT:     OR_INT * T2.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T8.X, PV.W,
; CM-NEXT:     MOV T1.Y, PV.X,
; CM-NEXT:     LSHL * T2.W, T37.Z, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, PV.Y, literal.x,
; CM-NEXT:     AND_INT * T2.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; CM-NEXT:     OR_INT * T2.W, PV.Z, PV.W,
; CM-NEXT:     MOV T8.X, PV.W,
; CM-NEXT:     MOV * T1.Y, T9.X,
; CM-NEXT:     AND_INT T1.Z, PV.Y, literal.x,
; CM-NEXT:     BFE_UINT * T2.W, T37.Z, literal.y, T1.W,
; CM-NEXT:    -65536(nan), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T2.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T9.X, PV.W,
; CM-NEXT:     MOV T1.Y, PV.X,
; CM-NEXT:     LSHR * T2.W, T37.Z, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, PV.Y, literal.x,
; CM-NEXT:     AND_INT * T2.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; CM-NEXT:     OR_INT * T37.Y, PV.Z, PV.W,
; CM-NEXT:     MOV T9.X, PV.Y,
; CM-NEXT:     MOV * T1.Y, T4.X,
; CM-NEXT:     AND_INT T1.Z, PV.Y, literal.x,
; CM-NEXT:     AND_INT * T2.W, T37.W, literal.y,
; CM-NEXT:    -65536(nan), 255(3.573311e-43)
; CM-NEXT:     OR_INT * T2.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T4.X, PV.W,
; CM-NEXT:     MOV T1.Y, PV.X,
; CM-NEXT:     LSHL * T2.W, T37.W, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, PV.Y, literal.x,
; CM-NEXT:     AND_INT * T2.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; CM-NEXT:     OR_INT * T2.W, PV.Z, PV.W,
; CM-NEXT:     MOV T4.X, PV.W,
; CM-NEXT:     MOV * T1.Y, T5.X,
; CM-NEXT:     AND_INT * T1.Z, PV.Y, literal.x,
; CM-NEXT:    -65536(nan), 0(0.000000e+00)
; CM-NEXT:    ALU clause starting at 120:
; CM-NEXT:     BFE_UINT * T2.W, T37.W, literal.x, T1.W,
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     OR_INT * T2.W, T1.Z, PV.W,
; CM-NEXT:     MOV * T5.X, PV.W,
; CM-NEXT:     MOV T1.Y, PV.X,
; CM-NEXT:     LSHR * T2.W, T37.W, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, PV.Y, literal.x,
; CM-NEXT:     AND_INT * T2.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; CM-NEXT:     OR_INT * T37.W, PV.Z, PV.W,
; CM-NEXT:     MOV T5.X, PV.W,
; CM-NEXT:     MOV * T1.Y, T32.X,
; CM-NEXT:     AND_INT T1.Z, PV.Y, literal.x,
; CM-NEXT:     AND_INT * T2.W, T0.X, literal.y,
; CM-NEXT:    -65536(nan), 255(3.573311e-43)
; CM-NEXT:     OR_INT * T2.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T32.X, PV.W,
; CM-NEXT:     MOV T1.Y, PV.X,
; CM-NEXT:     LSHL * T2.W, T0.X, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, PV.Y, literal.x,
; CM-NEXT:     AND_INT * T2.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; CM-NEXT:     OR_INT * T2.W, PV.Z, PV.W,
; CM-NEXT:     MOV T32.X, PV.W,
; CM-NEXT:     MOV * T1.Y, T33.X,
; CM-NEXT:     AND_INT T1.Z, PV.Y, literal.x,
; CM-NEXT:     BFE_UINT * T2.W, T0.X, literal.y, T1.W,
; CM-NEXT:    -65536(nan), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T2.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T33.X, PV.W,
; CM-NEXT:     MOV T1.Y, PV.X,
; CM-NEXT:     LSHR * T2.W, T0.X, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, PV.Y, literal.x,
; CM-NEXT:     AND_INT * T2.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; CM-NEXT:     OR_INT * T38.Y, PV.Z, PV.W,
; CM-NEXT:     MOV * T33.X, PV.Y,
; CM-NEXT:     MOV * T0.X, T28.X,
; CM-NEXT:     AND_INT T1.Z, PV.X, literal.x,
; CM-NEXT:     AND_INT * T2.W, T0.Y, literal.y,
; CM-NEXT:    -65536(nan), 255(3.573311e-43)
; CM-NEXT:     OR_INT * T2.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T28.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     LSHL * T2.W, T0.Y, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, PV.X, literal.x,
; CM-NEXT:     AND_INT * T2.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; CM-NEXT:     OR_INT * T2.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T28.X, PV.W,
; CM-NEXT:     MOV * T0.X, T29.X,
; CM-NEXT:     AND_INT T1.Z, PV.X, literal.x,
; CM-NEXT:     BFE_UINT * T2.W, T0.Y, literal.y, T1.W,
; CM-NEXT:    -65536(nan), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T2.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T29.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     LSHR * T2.W, T0.Y, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, PV.X, literal.x,
; CM-NEXT:     AND_INT * T2.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; CM-NEXT:     OR_INT * T38.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T29.X, PV.W,
; CM-NEXT:     MOV * T0.X, T24.X,
; CM-NEXT:     AND_INT T1.Z, PV.X, literal.x,
; CM-NEXT:     AND_INT * T2.W, T0.Z, literal.y,
; CM-NEXT:    -65536(nan), 255(3.573311e-43)
; CM-NEXT:     OR_INT * T2.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T24.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     LSHL * T2.W, T0.Z, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, PV.X, literal.x,
; CM-NEXT:     AND_INT * T2.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; CM-NEXT:     OR_INT * T2.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T24.X, PV.W,
; CM-NEXT:     MOV * T0.X, T25.X,
; CM-NEXT:     AND_INT T1.Z, PV.X, literal.x,
; CM-NEXT:     BFE_UINT * T2.W, T0.Z, literal.y, T1.W,
; CM-NEXT:    -65536(nan), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T2.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T25.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     LSHR * T2.W, T0.Z, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     AND_INT * T2.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; CM-NEXT:     OR_INT * T0.Y, PV.Z, PV.W,
; CM-NEXT:     MOV * T25.X, PV.Y,
; CM-NEXT:     MOV * T0.X, T20.X,
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     AND_INT * T2.W, T0.W, literal.y,
; CM-NEXT:    -65536(nan), 255(3.573311e-43)
; CM-NEXT:     OR_INT * T2.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T20.X, PV.W,
; CM-NEXT:    ALU clause starting at 222:
; CM-NEXT:     MOV T0.X, T20.X,
; CM-NEXT:     LSHL * T2.W, T0.W, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     AND_INT * T2.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16711680(2.341805e-38)
; CM-NEXT:     OR_INT * T2.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T20.X, PV.W,
; CM-NEXT:     MOV * T0.X, T21.X,
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     BFE_UINT * T1.W, T0.W, literal.y, T1.W,
; CM-NEXT:    -65536(nan), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T21.X, PV.W,
; CM-NEXT:     MOV * T0.X, PV.X,
; CM-NEXT:     LSHR * T39.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT T40.X, PV.X, literal.x,
; CM-NEXT:     LSHR * T0.W, T0.W, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT T41.X, T39.X, literal.x,
; CM-NEXT:     AND_INT T0.Z, T0.X, literal.y, BS:VEC_120/SCL_212
; CM-NEXT:     AND_INT * T0.W, PV.W, literal.z,
; CM-NEXT:    12(1.681558e-44), 65535(9.183409e-41)
; CM-NEXT:    16711680(2.341805e-38), 0(0.000000e+00)
; CM-NEXT:     ADD_INT T42.X, T39.X, literal.x,
; CM-NEXT:     OR_INT * T0.W, PV.Z, PV.W,
; CM-NEXT:    4(5.605194e-45), 0(0.000000e+00)
; CM-NEXT:     MOV * T21.X, PV.W,
; CM-NEXT:     MOV T36.X, T16.X,
; CM-NEXT:     MOV * T36.Z, T12.X, BS:VEC_120/SCL_212
; CM-NEXT:     MOV T37.X, T8.X,
; CM-NEXT:     MOV * T37.Z, T4.X, BS:VEC_120/SCL_212
; CM-NEXT:     MOV T38.X, T32.X,
; CM-NEXT:     MOV * T38.Z, T28.X, BS:VEC_120/SCL_212
; CM-NEXT:     MOV T0.X, T24.X,
; CM-NEXT:     MOV * T0.Z, T20.X, BS:VEC_120/SCL_212
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <32 x i8>, ptr addrspace(1) %in, i32 %tid
  %load = load <32 x i8>, ptr addrspace(1) %in.tid
  %ext = zext <32 x i8> %load to <32 x i16>
  store <32 x i16> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_sextload_v32i8_to_v32i16(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; GCN-NOHSA-SI-LABEL: global_sextload_v32i8_to_v32i16:
; GCN-NOHSA-SI:       ; %bb.0:
; GCN-NOHSA-SI-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s10, 0
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s11, s3
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v4, 5, v0
; GCN-NOHSA-SI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-SI-NEXT:    s_mov_b64 s[8:9], s[6:7]
; GCN-NOHSA-SI-NEXT:    v_mov_b32_e32 v5, 0
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx4 v[0:3], v[4:5], s[8:11], 0 addr64
; GCN-NOHSA-SI-NEXT:    buffer_load_dwordx4 v[4:7], v[4:5], s[8:11], 0 addr64 offset:16
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s0, s4
; GCN-NOHSA-SI-NEXT:    s_mov_b32 s1, s5
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(1)
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v8, 24, v1
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v9, v1, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v10, v1, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v1, v1, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v11, 24, v0
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v12, v0, 16, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v14, 24, v3
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v15, v3, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v16, v3, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v17, v3, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v18, 24, v2
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v19, v2, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v20, v2, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v21, v2, 0, 8
; GCN-NOHSA-SI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v31, 24, v6
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v32, v6, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v33, v6, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v34, v6, 0, 8
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v8
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v3, 0xffff, v9
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v6, 16, v10
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v13, v0, 8, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v22, 24, v5
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v23, v5, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v24, v5, 8, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v25, 24, v4
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v26, v4, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v27, v4, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v4, v4, 0, 8
; GCN-NOHSA-SI-NEXT:    v_ashrrev_i32_e32 v28, 24, v7
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v29, v7, 16, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v30, v7, 8, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v7, v7, 0, 8
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v3, v3, v2
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v2, v1, v6
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v1, 16, v11
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v6, 0xffff, v12
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v10, 0xffff, v15
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v11, 16, v16
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v12, 0xffff, v17
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v15, 16, v20
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v16, 0xffff, v21
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v0, v0, 0, 8
; GCN-NOHSA-SI-NEXT:    v_bfe_i32 v5, v5, 0, 8
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v8, 16, v13
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v9, 16, v14
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v13, 16, v18
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v14, 0xffff, v19
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v17, 16, v22
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v18, 0xffff, v23
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v19, 16, v24
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v21, 16, v25
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v22, 0xffff, v26
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v23, 16, v27
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v24, 0xffff, v4
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v25, 16, v28
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v26, 0xffff, v29
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v27, 16, v30
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v28, 0xffff, v7
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v31
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v30, 0xffff, v32
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v1, v6, v1
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v6, v12, v11
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v4, v16, v15
; GCN-NOHSA-SI-NEXT:    v_lshlrev_b32_e32 v12, 16, v33
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v16, 0xffff, v34
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; GCN-NOHSA-SI-NEXT:    v_and_b32_e32 v20, 0xffff, v5
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v5, v14, v13
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v15, v26, v25
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v14, v28, v27
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v13, v30, v29
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v12, v16, v12
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v0, v0, v8
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v7, v10, v9
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v11, v18, v17
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v10, v20, v19
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v9, v22, v21
; GCN-NOHSA-SI-NEXT:    v_or_b32_e32 v8, v24, v23
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:48
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:32
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; GCN-NOHSA-SI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT:    s_endpgm
;
; GCN-HSA-LABEL: global_sextload_v32i8_to_v32i16:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
; GCN-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCN-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCN-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    v_add_i32_e32 v4, vcc, s2, v0
; GCN-HSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc
; GCN-HSA-NEXT:    flat_load_dwordx4 v[0:3], v[4:5]
; GCN-HSA-NEXT:    v_add_i32_e32 v4, vcc, 16, v4
; GCN-HSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
; GCN-HSA-NEXT:    flat_load_dwordx4 v[4:7], v[4:5]
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 16
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(1)
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v8, 24, v1
; GCN-HSA-NEXT:    v_bfe_i32 v9, v1, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v10, v1, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v1, v1, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v11, 24, v0
; GCN-HSA-NEXT:    v_bfe_i32 v12, v0, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v13, v0, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v0, v0, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v14, 24, v3
; GCN-HSA-NEXT:    v_bfe_i32 v15, v3, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v16, v3, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v17, v3, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v18, 24, v2
; GCN-HSA-NEXT:    v_bfe_i32 v19, v2, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v20, v2, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v21, v2, 0, 8
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v22, 24, v5
; GCN-HSA-NEXT:    v_bfe_i32 v23, v5, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v24, v5, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v25, v5, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v26, 24, v4
; GCN-HSA-NEXT:    v_bfe_i32 v27, v4, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v28, v4, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v4, v4, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v29, 24, v7
; GCN-HSA-NEXT:    v_bfe_i32 v30, v7, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v31, v7, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v32, v7, 0, 8
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v33, 24, v6
; GCN-HSA-NEXT:    v_bfe_i32 v34, v6, 16, 8
; GCN-HSA-NEXT:    v_bfe_i32 v35, v6, 8, 8
; GCN-HSA-NEXT:    v_bfe_i32 v36, v6, 0, 8
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v2, 16, v8
; GCN-HSA-NEXT:    v_and_b32_e32 v3, 0xffff, v9
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v5, 16, v10
; GCN-HSA-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v6, 16, v13
; GCN-HSA-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v7, 16, v14
; GCN-HSA-NEXT:    v_and_b32_e32 v8, 0xffff, v15
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v9, 16, v16
; GCN-HSA-NEXT:    v_and_b32_e32 v10, 0xffff, v17
; GCN-HSA-NEXT:    v_or_b32_e32 v3, v3, v2
; GCN-HSA-NEXT:    v_or_b32_e32 v2, v1, v5
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v1, 16, v11
; GCN-HSA-NEXT:    v_and_b32_e32 v5, 0xffff, v12
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v11, 16, v18
; GCN-HSA-NEXT:    v_and_b32_e32 v12, 0xffff, v19
; GCN-HSA-NEXT:    v_or_b32_e32 v0, v0, v6
; GCN-HSA-NEXT:    v_or_b32_e32 v7, v8, v7
; GCN-HSA-NEXT:    v_or_b32_e32 v6, v10, v9
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v8, 16, v22
; GCN-HSA-NEXT:    v_and_b32_e32 v9, 0xffff, v23
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v15, 16, v28
; GCN-HSA-NEXT:    v_and_b32_e32 v4, 0xffff, v4
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v16, 16, v29
; GCN-HSA-NEXT:    v_and_b32_e32 v17, 0xffff, v30
; GCN-HSA-NEXT:    v_or_b32_e32 v1, v5, v1
; GCN-HSA-NEXT:    v_or_b32_e32 v5, v12, v11
; GCN-HSA-NEXT:    v_or_b32_e32 v11, v9, v8
; GCN-HSA-NEXT:    v_or_b32_e32 v8, v4, v15
; GCN-HSA-NEXT:    v_or_b32_e32 v15, v17, v16
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v4, 16, v20
; GCN-HSA-NEXT:    v_and_b32_e32 v16, 0xffff, v21
; GCN-HSA-NEXT:    v_or_b32_e32 v4, v16, v4
; GCN-HSA-NEXT:    v_mov_b32_e32 v17, s3
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, s2
; GCN-HSA-NEXT:    s_add_u32 s2, s0, 48
; GCN-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v10, 16, v24
; GCN-HSA-NEXT:    v_and_b32_e32 v12, 0xffff, v25
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v13, 16, v26
; GCN-HSA-NEXT:    v_and_b32_e32 v14, 0xffff, v27
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v18, 16, v31
; GCN-HSA-NEXT:    v_and_b32_e32 v19, 0xffff, v32
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v22, 16, v33
; GCN-HSA-NEXT:    v_and_b32_e32 v23, 0xffff, v34
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v24, 16, v35
; GCN-HSA-NEXT:    v_and_b32_e32 v25, 0xffff, v36
; GCN-HSA-NEXT:    flat_store_dwordx4 v[16:17], v[4:7]
; GCN-HSA-NEXT:    v_or_b32_e32 v10, v12, v10
; GCN-HSA-NEXT:    v_mov_b32_e32 v5, s1
; GCN-HSA-NEXT:    v_mov_b32_e32 v4, s0
; GCN-HSA-NEXT:    s_add_u32 s0, s0, 32
; GCN-HSA-NEXT:    v_or_b32_e32 v9, v14, v13
; GCN-HSA-NEXT:    v_or_b32_e32 v14, v19, v18
; GCN-HSA-NEXT:    v_or_b32_e32 v13, v23, v22
; GCN-HSA-NEXT:    v_or_b32_e32 v12, v25, v24
; GCN-HSA-NEXT:    flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT:    s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT:    flat_store_dwordx4 v[0:1], v[12:15]
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT:    flat_store_dwordx4 v[0:1], v[8:11]
; GCN-HSA-NEXT:    s_endpgm
;
; GCN-NOHSA-VI-LABEL: global_sextload_v32i8_to_v32i16:
; GCN-NOHSA-VI:       ; %bb.0:
; GCN-NOHSA-VI-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v4, 0xffff
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v5, 8
; GCN-NOHSA-VI-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_mov_b32_e32 v1, s3
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v6, vcc, s2, v0
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v7, vcc, 0, v1, vcc
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx4 v[0:3], v[6:7]
; GCN-NOHSA-VI-NEXT:    v_add_u32_e32 v10, vcc, 16, v6
; GCN-NOHSA-VI-NEXT:    v_addc_u32_e32 v11, vcc, 0, v7, vcc
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT:    s_mov_b32 s2, -1
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(0)
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v6, v4, sext(v3) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i16_sdwa v7, v5, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v9, v4, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i16_sdwa v12, v5, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v8, v6, v7
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v6, v9, v12
; GCN-NOHSA-VI-NEXT:    flat_load_dwordx4 v[10:13], v[10:11]
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v3, 16, v3
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v7, v4, sext(v3) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i16_sdwa v3, v5, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v2, 16, v2
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v9, v7, v3
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v3, v4, sext(v2) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i16_sdwa v2, v5, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v7, v3, v2
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v3, 16, v1
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v2, v4, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i16_sdwa v1, v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[6:9], off, s[0:3], 0 offset:16
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v2, v2, v1
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v7, 16, v0
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v1, v4, sext(v3) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i16_sdwa v3, v5, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v3, v1, v3
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v1, v4, sext(v7) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i16_sdwa v7, v5, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v1, v1, v7
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v6, v4, sext(v0) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i16_sdwa v0, v5, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v0, v6, v0
; GCN-NOHSA-VI-NEXT:    s_waitcnt vmcnt(1)
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v9, 16, v11
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i32_e32 v17, 24, v11
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v16, 16, v10
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v8, v4, sext(v11) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i16_sdwa v11, v5, v11 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GCN-NOHSA-VI-NEXT:    v_lshlrev_b32_e32 v7, 16, v17
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v9, v4, sext(v9) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v14, 16, v12
; GCN-NOHSA-VI-NEXT:    v_lshrrev_b32_e32 v15, 16, v13
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v19, v4, sext(v13) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i16_sdwa v13, v5, v13 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v8, v8, v11
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v9, v9, v7
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v7, v4, sext(v16) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i16_sdwa v11, v5, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v18, v4, sext(v10) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i16_sdwa v10, v5, v10 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v20, v4, sext(v12) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i16_sdwa v21, v5, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v12, v19, v13
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v7, v7, v11
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v11, v4, sext(v15) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i16_sdwa v13, v5, v15 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GCN-NOHSA-VI-NEXT:    v_and_b32_sdwa v4, v4, sext(v14) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GCN-NOHSA-VI-NEXT:    v_ashrrev_i16_sdwa v5, v5, v14 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v6, v18, v10
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v10, v20, v21
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v13, v11, v13
; GCN-NOHSA-VI-NEXT:    v_or_b32_e32 v11, v4, v5
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[10:13], off, s[0:3], 0 offset:48
; GCN-NOHSA-VI-NEXT:    buffer_store_dwordx4 v[6:9], off, s[0:3], 0 offset:32
; GCN-NOHSA-VI-NEXT:    s_endpgm
;
; EG-LABEL: global_sextload_v32i8_to_v32i16:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 3, @14, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 1 @10
; EG-NEXT:    ALU 104, @18, KC0[], KC1[]
; EG-NEXT:    ALU 104, @123, KC0[], KC1[]
; EG-NEXT:    ALU 91, @228, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T36.XYZW, T42.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T37.XYZW, T41.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T38.XYZW, T39.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T40.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 10:
; EG-NEXT:     VTX_READ_128 T37.XYZW, T0.X, 16, #1
; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 14:
; EG-NEXT:     MOV T1.Y, T16.X,
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x, BS:VEC_120/SCL_212
; EG-NEXT:    5(7.006492e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 18:
; EG-NEXT:     BFE_INT * T1.W, T37.X, 0.0, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T1.W, PV.W, literal.x,
; EG-NEXT:     AND_INT * T2.W, T1.Y, literal.y,
; EG-NEXT:    65535(9.183409e-41), -65536(nan)
; EG-NEXT:     OR_INT * T1.W, PS, PV.W,
; EG-NEXT:     MOV * T16.X, PV.W,
; EG-NEXT:     MOV T1.Y, PV.X,
; EG-NEXT:     LSHR * T1.W, T37.X, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T1.W, PV.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T2.W, PV.Y, literal.y,
; EG-NEXT:    8(1.121039e-44), 65535(9.183409e-41)
; EG-NEXT:     LSHL * T1.W, PV.W, literal.x,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T1.W, T2.W, PV.W,
; EG-NEXT:     MOV T16.X, PV.W,
; EG-NEXT:     MOV T1.Y, T17.X,
; EG-NEXT:     LSHR * T1.W, T37.X, literal.x, BS:VEC_120/SCL_212
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T1.W, PV.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T2.W, PV.Y, literal.y,
; EG-NEXT:    8(1.121039e-44), -65536(nan)
; EG-NEXT:     AND_INT * T1.W, PV.W, literal.x,
; EG-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T1.W, T2.W, PV.W,
; EG-NEXT:     MOV * T17.X, PV.W,
; EG-NEXT:     MOV T1.Y, PV.X,
; EG-NEXT:     ASHR * T1.W, T37.X, literal.x,
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T2.W, PV.Y, literal.x,
; EG-NEXT:     LSHL * T1.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; EG-NEXT:     OR_INT * T36.Y, PV.W, PS,
; EG-NEXT:     MOV T17.X, PV.Y,
; EG-NEXT:     MOV T1.Y, T12.X,
; EG-NEXT:     BFE_INT * T1.W, T37.Y, 0.0, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T2.W, PV.Y, literal.x,
; EG-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; EG-NEXT:    -65536(nan), 65535(9.183409e-41)
; EG-NEXT:     OR_INT * T1.W, PV.W, PS,
; EG-NEXT:     MOV * T12.X, PV.W,
; EG-NEXT:     MOV T1.Y, PV.X,
; EG-NEXT:     LSHR * T1.W, T37.Y, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T1.W, PV.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T2.W, PV.Y, literal.y,
; EG-NEXT:    8(1.121039e-44), 65535(9.183409e-41)
; EG-NEXT:     LSHL * T1.W, PV.W, literal.x,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T1.W, T2.W, PV.W,
; EG-NEXT:     MOV T12.X, PV.W,
; EG-NEXT:     MOV T1.Y, T13.X,
; EG-NEXT:     LSHR * T1.W, T37.Y, literal.x,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T1.W, PV.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T2.W, PV.Y, literal.y,
; EG-NEXT:    8(1.121039e-44), -65536(nan)
; EG-NEXT:     AND_INT * T1.W, PV.W, literal.x,
; EG-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T1.W, T2.W, PV.W,
; EG-NEXT:     MOV * T13.X, PV.W,
; EG-NEXT:     MOV T1.Y, PV.X,
; EG-NEXT:     ASHR * T1.W, T37.Y, literal.x,
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T2.W, PV.Y, literal.x,
; EG-NEXT:     LSHL * T1.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; EG-NEXT:     OR_INT * T36.W, PV.W, PS,
; EG-NEXT:     MOV T13.X, PV.W,
; EG-NEXT:     MOV T1.Y, T8.X,
; EG-NEXT:     BFE_INT * T1.W, T37.Z, 0.0, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T2.W, PV.Y, literal.x,
; EG-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; EG-NEXT:    -65536(nan), 65535(9.183409e-41)
; EG-NEXT:     OR_INT * T1.W, PV.W, PS,
; EG-NEXT:     MOV * T8.X, PV.W,
; EG-NEXT:     MOV T1.Y, PV.X,
; EG-NEXT:     LSHR * T1.W, T37.Z, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T1.W, PV.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T2.W, PV.Y, literal.y,
; EG-NEXT:    8(1.121039e-44), 65535(9.183409e-41)
; EG-NEXT:     LSHL * T1.W, PV.W, literal.x,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T1.W, T2.W, PV.W,
; EG-NEXT:     MOV T8.X, PV.W,
; EG-NEXT:     MOV T1.Y, T9.X,
; EG-NEXT:     LSHR * T1.W, T37.Z, literal.x,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T1.W, PV.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T2.W, PV.Y, literal.y,
; EG-NEXT:    8(1.121039e-44), -65536(nan)
; EG-NEXT:     AND_INT * T1.W, PV.W, literal.x,
; EG-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T1.W, T2.W, PV.W,
; EG-NEXT:     MOV * T9.X, PV.W,
; EG-NEXT:     MOV T1.Y, PV.X,
; EG-NEXT:     ASHR * T1.W, T37.Z, literal.x,
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T2.W, PV.Y, literal.x,
; EG-NEXT:     LSHL * T1.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; EG-NEXT:    ALU clause starting at 123:
; EG-NEXT:     OR_INT * T37.Y, T2.W, T1.W,
; EG-NEXT:     MOV T9.X, PV.Y,
; EG-NEXT:     MOV T1.Y, T4.X,
; EG-NEXT:     BFE_INT * T1.W, T37.W, 0.0, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T2.W, PV.Y, literal.x,
; EG-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; EG-NEXT:    -65536(nan), 65535(9.183409e-41)
; EG-NEXT:     OR_INT * T1.W, PV.W, PS,
; EG-NEXT:     MOV * T4.X, PV.W,
; EG-NEXT:     MOV T1.Y, PV.X,
; EG-NEXT:     LSHR * T1.W, T37.W, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T1.W, PV.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T2.W, PV.Y, literal.y,
; EG-NEXT:    8(1.121039e-44), 65535(9.183409e-41)
; EG-NEXT:     LSHL * T1.W, PV.W, literal.x,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T1.W, T2.W, PV.W,
; EG-NEXT:     MOV T4.X, PV.W,
; EG-NEXT:     MOV T1.Y, T5.X,
; EG-NEXT:     LSHR * T1.W, T37.W, literal.x,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T1.W, PV.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T2.W, PV.Y, literal.y,
; EG-NEXT:    8(1.121039e-44), -65536(nan)
; EG-NEXT:     AND_INT * T1.W, PV.W, literal.x,
; EG-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T1.W, T2.W, PV.W,
; EG-NEXT:     MOV * T5.X, PV.W,
; EG-NEXT:     MOV T1.Y, PV.X,
; EG-NEXT:     ASHR * T1.W, T37.W, literal.x,
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T2.W, PV.Y, literal.x,
; EG-NEXT:     LSHL * T1.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; EG-NEXT:     OR_INT * T37.W, PV.W, PS,
; EG-NEXT:     MOV T5.X, PV.W,
; EG-NEXT:     MOV T1.Y, T32.X,
; EG-NEXT:     BFE_INT * T1.W, T0.X, 0.0, literal.x, BS:VEC_120/SCL_212
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T2.W, PV.Y, literal.x,
; EG-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; EG-NEXT:    -65536(nan), 65535(9.183409e-41)
; EG-NEXT:     OR_INT * T1.W, PV.W, PS,
; EG-NEXT:     MOV * T32.X, PV.W,
; EG-NEXT:     MOV T1.Y, PV.X,
; EG-NEXT:     LSHR * T1.W, T0.X, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T1.W, PV.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T2.W, PV.Y, literal.y,
; EG-NEXT:    8(1.121039e-44), 65535(9.183409e-41)
; EG-NEXT:     LSHL * T1.W, PV.W, literal.x,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T1.W, T2.W, PV.W,
; EG-NEXT:     MOV T32.X, PV.W,
; EG-NEXT:     MOV T1.Y, T33.X,
; EG-NEXT:     LSHR * T1.W, T0.X, literal.x, BS:VEC_120/SCL_212
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T1.W, PV.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T2.W, PV.Y, literal.y,
; EG-NEXT:    8(1.121039e-44), -65536(nan)
; EG-NEXT:     AND_INT * T1.W, PV.W, literal.x,
; EG-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T1.W, T2.W, PV.W,
; EG-NEXT:     MOV * T33.X, PV.W,
; EG-NEXT:     MOV T1.Y, PV.X,
; EG-NEXT:     ASHR * T1.W, T0.X, literal.x,
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T2.W, PV.Y, literal.x,
; EG-NEXT:     LSHL * T1.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; EG-NEXT:     OR_INT * T38.Y, PV.W, PS,
; EG-NEXT:     MOV T33.X, PV.Y,
; EG-NEXT:     MOV * T0.X, T28.X,
; EG-NEXT:     BFE_INT T1.W, T0.Y, 0.0, literal.x,
; EG-NEXT:     AND_INT * T2.W, PS, literal.y,
; EG-NEXT:    8(1.121039e-44), -65536(nan)
; EG-NEXT:     AND_INT * T1.W, PV.W, literal.x,
; EG-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T1.W, T2.W, PV.W,
; EG-NEXT:     MOV * T28.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     LSHR * T1.W, T0.Y, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T1.W, PV.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T2.W, PV.X, literal.y,
; EG-NEXT:    8(1.121039e-44), 65535(9.183409e-41)
; EG-NEXT:     LSHL * T1.W, PV.W, literal.x,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T1.W, T2.W, PV.W,
; EG-NEXT:     MOV T28.X, PV.W,
; EG-NEXT:     MOV * T0.X, T29.X,
; EG-NEXT:     LSHR * T1.W, T0.Y, literal.x,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T1.W, PV.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T2.W, T0.X, literal.y,
; EG-NEXT:    8(1.121039e-44), -65536(nan)
; EG-NEXT:     AND_INT * T1.W, PV.W, literal.x,
; EG-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T1.W, T2.W, PV.W,
; EG-NEXT:     MOV * T29.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     ASHR * T1.W, T0.Y, literal.x,
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; EG-NEXT:    ALU clause starting at 228:
; EG-NEXT:     AND_INT T2.W, T0.X, literal.x,
; EG-NEXT:     LSHL * T1.W, T1.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; EG-NEXT:     OR_INT * T38.W, PV.W, PS,
; EG-NEXT:     MOV T29.X, PV.W,
; EG-NEXT:     MOV * T0.X, T24.X,
; EG-NEXT:     BFE_INT T1.W, T0.Z, 0.0, literal.x,
; EG-NEXT:     AND_INT * T2.W, PS, literal.y,
; EG-NEXT:    8(1.121039e-44), -65536(nan)
; EG-NEXT:     AND_INT * T1.W, PV.W, literal.x,
; EG-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T1.W, T2.W, PV.W,
; EG-NEXT:     MOV * T24.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     LSHR * T1.W, T0.Z, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T1.W, PV.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T2.W, PV.X, literal.y,
; EG-NEXT:    8(1.121039e-44), 65535(9.183409e-41)
; EG-NEXT:     LSHL * T1.W, PV.W, literal.x,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T1.W, T2.W, PV.W,
; EG-NEXT:     MOV T24.X, PV.W,
; EG-NEXT:     MOV * T0.X, T25.X,
; EG-NEXT:     LSHR * T1.W, T0.Z, literal.x,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T1.W, PV.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T2.W, T0.X, literal.y,
; EG-NEXT:    8(1.121039e-44), -65536(nan)
; EG-NEXT:     AND_INT * T1.W, PV.W, literal.x,
; EG-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T1.W, T2.W, PV.W,
; EG-NEXT:     MOV * T25.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     ASHR * T1.W, T0.Z, literal.x,
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T2.W, PV.X, literal.x,
; EG-NEXT:     LSHL * T1.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; EG-NEXT:     OR_INT * T0.Y, PV.W, PS,
; EG-NEXT:     MOV T25.X, PV.Y,
; EG-NEXT:     MOV * T0.X, T20.X,
; EG-NEXT:     BFE_INT T1.W, T0.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T2.W, PS, literal.y,
; EG-NEXT:    8(1.121039e-44), -65536(nan)
; EG-NEXT:     AND_INT * T1.W, PV.W, literal.x,
; EG-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T1.W, T2.W, PV.W,
; EG-NEXT:     MOV * T20.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     LSHR * T1.W, T0.W, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T1.W, PV.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T2.W, PV.X, literal.y,
; EG-NEXT:    8(1.121039e-44), 65535(9.183409e-41)
; EG-NEXT:     LSHL * T1.W, PV.W, literal.x,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T1.W, T2.W, PV.W,
; EG-NEXT:     MOV T20.X, PV.W,
; EG-NEXT:     MOV * T0.X, T21.X,
; EG-NEXT:     LSHR * T1.W, T0.W, literal.x,
; EG-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; EG-NEXT:     BFE_INT T1.W, PV.W, 0.0, literal.x,
; EG-NEXT:     AND_INT * T2.W, T0.X, literal.y,
; EG-NEXT:    8(1.121039e-44), -65536(nan)
; EG-NEXT:     AND_INT * T1.W, PV.W, literal.x,
; EG-NEXT:    65535(9.183409e-41), 0(0.000000e+00)
; EG-NEXT:     OR_INT * T1.W, T2.W, PV.W,
; EG-NEXT:     MOV * T21.X, PV.W,
; EG-NEXT:     MOV T0.X, PV.X,
; EG-NEXT:     LSHR * T39.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T40.X, PS, literal.x,
; EG-NEXT:     ASHR T0.W, T0.W, literal.y,
; EG-NEXT:     ADD_INT * T41.X, PS, literal.z,
; EG-NEXT:    4(5.605194e-45), 24(3.363116e-44)
; EG-NEXT:    12(1.681558e-44), 0(0.000000e+00)
; EG-NEXT:     AND_INT T1.W, T0.X, literal.x,
; EG-NEXT:     LSHL * T0.W, PV.W, literal.y,
; EG-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; EG-NEXT:     ADD_INT T42.X, T39.X, literal.x,
; EG-NEXT:     OR_INT * T0.W, PV.W, PS,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     MOV T21.X, PV.W,
; EG-NEXT:     MOV * T36.X, T16.X,
; EG-NEXT:     MOV * T36.Z, T12.X,
; EG-NEXT:     MOV T37.X, T8.X,
; EG-NEXT:     MOV T37.Z, T4.X, BS:VEC_120/SCL_212
; EG-NEXT:     MOV * T38.X, T32.X,
; EG-NEXT:     MOV * T38.Z, T28.X,
; EG-NEXT:     MOV T0.X, T24.X,
; EG-NEXT:     MOV * T0.Z, T20.X, BS:VEC_120/SCL_212
;
; CM-LABEL: global_sextload_v32i8_to_v32i16:
; CM:       ; %bb.0:
; CM-NEXT:    ALU 3, @14, KC0[CB0:0-32], KC1[]
; CM-NEXT:    TEX 1 @10
; CM-NEXT:    ALU 104, @18, KC0[], KC1[]
; CM-NEXT:    ALU 104, @123, KC0[], KC1[]
; CM-NEXT:    ALU 91, @228, KC0[CB0:0-32], KC1[]
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0, T42.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T38, T39.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T37, T41.X
; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T36, T40.X
; CM-NEXT:    CF_END
; CM-NEXT:    Fetch clause starting at 10:
; CM-NEXT:     VTX_READ_128 T37.XYZW, T0.X, 16, #1
; CM-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
; CM-NEXT:    ALU clause starting at 14:
; CM-NEXT:     MOV T1.Y, T16.X,
; CM-NEXT:     LSHL * T0.W, T0.X, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:    5(7.006492e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; CM-NEXT:    ALU clause starting at 18:
; CM-NEXT:     BFE_INT * T1.W, T37.X, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, PV.W, literal.x,
; CM-NEXT:     AND_INT * T1.W, T1.Y, literal.y,
; CM-NEXT:    65535(9.183409e-41), -65536(nan)
; CM-NEXT:     OR_INT * T1.W, PV.W, PV.Z,
; CM-NEXT:     MOV * T16.X, PV.W,
; CM-NEXT:     MOV T1.Y, PV.X,
; CM-NEXT:     LSHR * T1.W, T37.X, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T1.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, T1.Y, literal.x,
; CM-NEXT:     LSHL * T1.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV T16.X, PV.W,
; CM-NEXT:     MOV T1.Y, T17.X,
; CM-NEXT:     LSHR * T1.W, T37.X, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T1.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, T1.Y, literal.x,
; CM-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; CM-NEXT:    -65536(nan), 65535(9.183409e-41)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T17.X, PV.W,
; CM-NEXT:     MOV T1.Y, PV.X,
; CM-NEXT:     ASHR * T1.W, T37.X, literal.x,
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, PV.Y, literal.x,
; CM-NEXT:     LSHL * T1.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T36.Y, PV.Z, PV.W,
; CM-NEXT:     MOV T17.X, PV.Y,
; CM-NEXT:     MOV T1.Y, T12.X,
; CM-NEXT:     BFE_INT * T1.W, T37.Y, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, PV.Y, literal.x,
; CM-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; CM-NEXT:    -65536(nan), 65535(9.183409e-41)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T12.X, PV.W,
; CM-NEXT:     MOV T1.Y, PV.X,
; CM-NEXT:     LSHR * T1.W, T37.Y, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T1.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, T1.Y, literal.x,
; CM-NEXT:     LSHL * T1.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV T12.X, PV.W,
; CM-NEXT:     MOV T1.Y, T13.X,
; CM-NEXT:     LSHR * T1.W, T37.Y, literal.x,
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T1.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, T1.Y, literal.x,
; CM-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; CM-NEXT:    -65536(nan), 65535(9.183409e-41)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T13.X, PV.W,
; CM-NEXT:     MOV T1.Y, PV.X,
; CM-NEXT:     ASHR * T1.W, T37.Y, literal.x,
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, PV.Y, literal.x,
; CM-NEXT:     LSHL * T1.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T36.W, PV.Z, PV.W,
; CM-NEXT:     MOV T13.X, PV.W,
; CM-NEXT:     MOV T1.Y, T8.X,
; CM-NEXT:     BFE_INT * T1.W, T37.Z, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, PV.Y, literal.x,
; CM-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; CM-NEXT:    -65536(nan), 65535(9.183409e-41)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T8.X, PV.W,
; CM-NEXT:     MOV T1.Y, PV.X,
; CM-NEXT:     LSHR * T1.W, T37.Z, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T1.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, T1.Y, literal.x,
; CM-NEXT:     LSHL * T1.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV T8.X, PV.W,
; CM-NEXT:     MOV T1.Y, T9.X,
; CM-NEXT:     LSHR * T1.W, T37.Z, literal.x,
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T1.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, T1.Y, literal.x,
; CM-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; CM-NEXT:    -65536(nan), 65535(9.183409e-41)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T9.X, PV.W,
; CM-NEXT:     MOV T1.Y, PV.X,
; CM-NEXT:     ASHR * T1.W, T37.Z, literal.x,
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, PV.Y, literal.x,
; CM-NEXT:     LSHL * T1.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; CM-NEXT:    ALU clause starting at 123:
; CM-NEXT:     OR_INT * T37.Y, T1.Z, T1.W,
; CM-NEXT:     MOV T9.X, PV.Y,
; CM-NEXT:     MOV T1.Y, T4.X,
; CM-NEXT:     BFE_INT * T1.W, T37.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, PV.Y, literal.x,
; CM-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; CM-NEXT:    -65536(nan), 65535(9.183409e-41)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T4.X, PV.W,
; CM-NEXT:     MOV T1.Y, PV.X,
; CM-NEXT:     LSHR * T1.W, T37.W, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T1.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, T1.Y, literal.x,
; CM-NEXT:     LSHL * T1.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV T4.X, PV.W,
; CM-NEXT:     MOV T1.Y, T5.X,
; CM-NEXT:     LSHR * T1.W, T37.W, literal.x,
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T1.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, T1.Y, literal.x,
; CM-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; CM-NEXT:    -65536(nan), 65535(9.183409e-41)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T5.X, PV.W,
; CM-NEXT:     MOV T1.Y, PV.X,
; CM-NEXT:     ASHR * T1.W, T37.W, literal.x,
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, PV.Y, literal.x,
; CM-NEXT:     LSHL * T1.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T37.W, PV.Z, PV.W,
; CM-NEXT:     MOV T5.X, PV.W,
; CM-NEXT:     MOV T1.Y, T32.X,
; CM-NEXT:     BFE_INT * T1.W, T0.X, 0.0, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, PV.Y, literal.x,
; CM-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; CM-NEXT:    -65536(nan), 65535(9.183409e-41)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T32.X, PV.W,
; CM-NEXT:     MOV T1.Y, PV.X,
; CM-NEXT:     LSHR * T1.W, T0.X, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T1.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, T1.Y, literal.x,
; CM-NEXT:     LSHL * T1.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV T32.X, PV.W,
; CM-NEXT:     MOV T1.Y, T33.X,
; CM-NEXT:     LSHR * T1.W, T0.X, literal.x, BS:VEC_120/SCL_212
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T1.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, T1.Y, literal.x,
; CM-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; CM-NEXT:    -65536(nan), 65535(9.183409e-41)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T33.X, PV.W,
; CM-NEXT:     MOV T1.Y, PV.X,
; CM-NEXT:     ASHR * T1.W, T0.X, literal.x,
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, PV.Y, literal.x,
; CM-NEXT:     LSHL * T1.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T38.Y, PV.Z, PV.W,
; CM-NEXT:     MOV * T33.X, PV.Y,
; CM-NEXT:     MOV T0.X, T28.X,
; CM-NEXT:     BFE_INT * T1.W, T0.Y, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, PV.X, literal.x,
; CM-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; CM-NEXT:    -65536(nan), 65535(9.183409e-41)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T28.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     LSHR * T1.W, T0.Y, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T1.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, T0.X, literal.x,
; CM-NEXT:     LSHL * T1.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T28.X, PV.W,
; CM-NEXT:     MOV T0.X, T29.X,
; CM-NEXT:     LSHR * T1.W, T0.Y, literal.x,
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T1.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, T0.X, literal.x,
; CM-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; CM-NEXT:    -65536(nan), 65535(9.183409e-41)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T29.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     ASHR * T1.W, T0.Y, literal.x,
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:    ALU clause starting at 228:
; CM-NEXT:     AND_INT T1.Z, T0.X, literal.x,
; CM-NEXT:     LSHL * T1.W, T1.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T38.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T29.X, PV.W,
; CM-NEXT:     MOV T0.X, T24.X,
; CM-NEXT:     BFE_INT * T1.W, T0.Z, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, PV.X, literal.x,
; CM-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; CM-NEXT:    -65536(nan), 65535(9.183409e-41)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T24.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     LSHR * T1.W, T0.Z, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T1.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, T0.X, literal.x,
; CM-NEXT:     LSHL * T1.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T24.X, PV.W,
; CM-NEXT:     MOV T0.X, T25.X,
; CM-NEXT:     LSHR * T1.W, T0.Z, literal.x,
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T1.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T1.Z, T0.X, literal.x,
; CM-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; CM-NEXT:    -65536(nan), 65535(9.183409e-41)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T25.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     ASHR * T1.W, T0.Z, literal.x,
; CM-NEXT:    24(3.363116e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     LSHL * T1.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T0.Y, PV.Z, PV.W,
; CM-NEXT:     MOV * T25.X, PV.Y,
; CM-NEXT:     MOV T0.X, T20.X,
; CM-NEXT:     BFE_INT * T1.W, T0.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
; CM-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; CM-NEXT:    -65536(nan), 65535(9.183409e-41)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T20.X, PV.W,
; CM-NEXT:     MOV T0.X, PV.X,
; CM-NEXT:     LSHR * T1.W, T0.W, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T1.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, T0.X, literal.x,
; CM-NEXT:     LSHL * T1.W, PV.W, literal.y,
; CM-NEXT:    65535(9.183409e-41), 16(2.242078e-44)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T20.X, PV.W,
; CM-NEXT:     MOV T0.X, T21.X,
; CM-NEXT:     LSHR * T1.W, T0.W, literal.x,
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     BFE_INT * T1.W, PV.W, 0.0, literal.x,
; CM-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; CM-NEXT:     AND_INT T0.Z, T0.X, literal.x,
; CM-NEXT:     AND_INT * T1.W, PV.W, literal.y,
; CM-NEXT:    -65536(nan), 65535(9.183409e-41)
; CM-NEXT:     OR_INT * T1.W, PV.Z, PV.W,
; CM-NEXT:     MOV * T21.X, PV.W,
; CM-NEXT:     MOV * T0.X, PV.X,
; CM-NEXT:     LSHR * T39.X, KC0[2].Y, literal.x,
; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; CM-NEXT:     ADD_INT T40.X, PV.X, literal.x,
; CM-NEXT:     ASHR * T0.W, T0.W, literal.y,
; CM-NEXT:    8(1.121039e-44), 24(3.363116e-44)
; CM-NEXT:     ADD_INT T41.X, T39.X, literal.x,
; CM-NEXT:     AND_INT T0.Z, T0.X, literal.y, BS:VEC_120/SCL_212
; CM-NEXT:     LSHL * T0.W, PV.W, literal.z,
; CM-NEXT:    12(1.681558e-44), 65535(9.183409e-41)
; CM-NEXT:    16(2.242078e-44), 0(0.000000e+00)
; CM-NEXT:     ADD_INT T42.X, T39.X, literal.x,
; CM-NEXT:     OR_INT * T0.W, PV.Z, PV.W,
; CM-NEXT:    4(5.605194e-45), 0(0.000000e+00)
; CM-NEXT:     MOV * T21.X, PV.W,
; CM-NEXT:     MOV T36.X, T16.X,
; CM-NEXT:     MOV * T36.Z, T12.X, BS:VEC_120/SCL_212
; CM-NEXT:     MOV T37.X, T8.X,
; CM-NEXT:     MOV * T37.Z, T4.X, BS:VEC_120/SCL_212
; CM-NEXT:     MOV T38.X, T32.X,
; CM-NEXT:     MOV * T38.Z, T28.X, BS:VEC_120/SCL_212
; CM-NEXT:     MOV T0.X, T24.X,
; CM-NEXT:     MOV * T0.Z, T20.X, BS:VEC_120/SCL_212
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <32 x i8>, ptr addrspace(1) %in, i32 %tid
  %load = load <32 x i8>, ptr addrspace(1) %in.tid
  %ext = sext <32 x i8> %load to <32 x i16>
  store <32 x i16> %ext, ptr addrspace(1) %out
  ret void
}

; XFUNC-LABEL: {{^}}global_zextload_v64i8_to_v64i16:
; define amdgpu_kernel void @global_zextload_v64i8_to_v64i16(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
;   %load = load <64 x i8>, ptr addrspace(1) %in
;   %ext = zext <64 x i8> %load to <64 x i16>
;   store <64 x i16> %ext, ptr addrspace(1) %out
;   ret void
; }

; XFUNC-LABEL: {{^}}global_sextload_v64i8_to_v64i16:
; define amdgpu_kernel void @global_sextload_v64i8_to_v64i16(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
;   %load = load <64 x i8>, ptr addrspace(1) %in
;   %ext = sext <64 x i8> %load to <64 x i16>
;   store <64 x i16> %ext, ptr addrspace(1) %out
;   ret void
; }

attributes #0 = { nounwind }