llvm/test/CodeGen/AMDGPU/load-global-i32.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
; RUN: llc -mtriple=amdgpu6.00 < %s | FileCheck -check-prefix=SI-NOHSA %s
; RUN: llc -mtriple=amdgpu7.00--amdhsa < %s | FileCheck -check-prefix=GCNX3-HSA %s
; RUN: llc -mtriple=amdgpu8.02 -mattr=-flat-for-global < %s | FileCheck -check-prefix=GCNX3-NOHSA %s
; RUN: llc -mtriple=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG %s
; RUN: llc -mtriple=amdgpu9.00--amdhsa < %s | FileCheck -check-prefix=GCN-HSA -check-prefix=GCN-GFX900-HSA %s
; RUN: llc -mtriple=amdgpu9.08--amdhsa < %s | FileCheck -check-prefix=GCN-HSA -check-prefix=GCN-GFX908-HSA %s

define amdgpu_kernel void @global_load_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; SI-NOHSA-LABEL: global_load_i32:
; SI-NOHSA:       ; %bb.0: ; %entry
; SI-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NOHSA-NEXT:    s_mov_b32 s7, 0xf000
; SI-NOHSA-NEXT:    s_mov_b32 s10, 0
; SI-NOHSA-NEXT:    s_mov_b32 s11, s7
; SI-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; SI-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; SI-NOHSA-NEXT:    s_mov_b64 s[8:9], s[2:3]
; SI-NOHSA-NEXT:    v_mov_b32_e32 v1, 0
; SI-NOHSA-NEXT:    buffer_load_dword v0, v[0:1], s[8:11], 0 addr64
; SI-NOHSA-NEXT:    s_mov_b32 s6, -1
; SI-NOHSA-NEXT:    s_mov_b32 s4, s0
; SI-NOHSA-NEXT:    s_mov_b32 s5, s1
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(0)
; SI-NOHSA-NEXT:    buffer_store_dword v0, off, s[4:7], 0
; SI-NOHSA-NEXT:    s_endpgm
;
; GCNX3-HSA-LABEL: global_load_i32:
; GCNX3-HSA:       ; %bb.0: ; %entry
; GCNX3-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCNX3-HSA-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCNX3-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCNX3-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCNX3-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCNX3-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    flat_load_dword v2, v[0:1]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCNX3-HSA-NEXT:    flat_store_dword v[0:1], v2
; GCNX3-HSA-NEXT:    s_endpgm
;
; GCNX3-NOHSA-LABEL: global_load_i32:
; GCNX3-NOHSA:       ; %bb.0: ; %entry
; GCNX3-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCNX3-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCNX3-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dword v0, v[0:1]
; GCNX3-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; GCNX3-NOHSA-NEXT:    s_mov_b32 s2, -1
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(0)
; GCNX3-NOHSA-NEXT:    buffer_store_dword v0, off, s[0:3], 0
; GCNX3-NOHSA-NEXT:    s_endpgm
;
; EG-LABEL: global_load_i32:
; EG:       ; %bb.0: ; %entry
; EG-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 1, @11, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 11:
; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
;
; GCN-HSA-LABEL: global_load_i32:
; GCN-HSA:       ; %bb.0: ; %entry
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, 0
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    global_load_dword v0, v0, s[2:3]
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    global_store_dword v1, v0, s[0:1]
; GCN-HSA-NEXT:    s_endpgm
entry:
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds i32, ptr addrspace(1) %in, i32 %tid
  %ld = load i32, ptr addrspace(1) %in.tid
  store i32 %ld, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_load_v2i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; SI-NOHSA-LABEL: global_load_v2i32:
; SI-NOHSA:       ; %bb.0: ; %entry
; SI-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NOHSA-NEXT:    s_mov_b32 s7, 0xf000
; SI-NOHSA-NEXT:    s_mov_b32 s10, 0
; SI-NOHSA-NEXT:    s_mov_b32 s11, s7
; SI-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; SI-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; SI-NOHSA-NEXT:    s_mov_b64 s[8:9], s[2:3]
; SI-NOHSA-NEXT:    v_mov_b32_e32 v1, 0
; SI-NOHSA-NEXT:    buffer_load_dwordx2 v[0:1], v[0:1], s[8:11], 0 addr64
; SI-NOHSA-NEXT:    s_mov_b32 s6, -1
; SI-NOHSA-NEXT:    s_mov_b32 s4, s0
; SI-NOHSA-NEXT:    s_mov_b32 s5, s1
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(0)
; SI-NOHSA-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; SI-NOHSA-NEXT:    s_endpgm
;
; GCNX3-HSA-LABEL: global_load_v2i32:
; GCNX3-HSA:       ; %bb.0: ; %entry
; GCNX3-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCNX3-HSA-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; GCNX3-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCNX3-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCNX3-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCNX3-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx2 v[0:1], v[0:1]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, s0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v3, s1
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCNX3-HSA-NEXT:    flat_store_dwordx2 v[2:3], v[0:1]
; GCNX3-HSA-NEXT:    s_endpgm
;
; GCNX3-NOHSA-LABEL: global_load_v2i32:
; GCNX3-NOHSA:       ; %bb.0: ; %entry
; GCNX3-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCNX3-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; GCNX3-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx2 v[0:1], v[0:1]
; GCNX3-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; GCNX3-NOHSA-NEXT:    s_mov_b32 s2, -1
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(0)
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GCNX3-NOHSA-NEXT:    s_endpgm
;
; EG-LABEL: global_load_v2i32:
; EG:       ; %bb.0: ; %entry
; EG-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 1, @11, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_64 T0.XY, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 11:
; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
;
; GCN-HSA-LABEL: global_load_v2i32:
; GCN-HSA:       ; %bb.0: ; %entry
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, 0
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    global_load_dwordx2 v[0:1], v0, s[2:3]
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    global_store_dwordx2 v2, v[0:1], s[0:1]
; GCN-HSA-NEXT:    s_endpgm
entry:
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <2 x i32>, ptr addrspace(1) %in, i32 %tid
  %ld = load <2 x i32>, ptr addrspace(1) %in.tid
  store <2 x i32> %ld, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_load_v3i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; SI-NOHSA-LABEL: global_load_v3i32:
; SI-NOHSA:       ; %bb.0: ; %entry
; SI-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NOHSA-NEXT:    s_mov_b32 s7, 0xf000
; SI-NOHSA-NEXT:    s_mov_b32 s10, 0
; SI-NOHSA-NEXT:    s_mov_b32 s11, s7
; SI-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; SI-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; SI-NOHSA-NEXT:    s_mov_b64 s[8:9], s[2:3]
; SI-NOHSA-NEXT:    v_mov_b32_e32 v1, 0
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[0:3], v[0:1], s[8:11], 0 addr64
; SI-NOHSA-NEXT:    s_mov_b32 s6, -1
; SI-NOHSA-NEXT:    s_mov_b32 s4, s0
; SI-NOHSA-NEXT:    s_mov_b32 s5, s1
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(0)
; SI-NOHSA-NEXT:    buffer_store_dword v2, off, s[4:7], 0 offset:8
; SI-NOHSA-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; SI-NOHSA-NEXT:    s_endpgm
;
; GCNX3-HSA-LABEL: global_load_v3i32:
; GCNX3-HSA:       ; %bb.0: ; %entry
; GCNX3-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCNX3-HSA-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCNX3-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCNX3-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCNX3-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCNX3-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx3 v[0:2], v[0:1]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v3, s0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v4, s1
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCNX3-HSA-NEXT:    flat_store_dwordx3 v[3:4], v[0:2]
; GCNX3-HSA-NEXT:    s_endpgm
;
; GCNX3-NOHSA-LABEL: global_load_v3i32:
; GCNX3-NOHSA:       ; %bb.0: ; %entry
; GCNX3-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCNX3-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCNX3-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx3 v[0:2], v[0:1]
; GCNX3-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; GCNX3-NOHSA-NEXT:    s_mov_b32 s2, -1
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(0)
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx3 v[0:2], off, s[0:3], 0
; GCNX3-NOHSA-NEXT:    s_endpgm
;
; EG-LABEL: global_load_v3i32:
; EG:       ; %bb.0: ; %entry
; EG-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 4, @11, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T1.X, T3.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XY, T2.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    4(5.605194e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 11:
; EG-NEXT:     MOV T1.X, T0.Z,
; EG-NEXT:     LSHR * T2.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T3.X, PS, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
;
; GCN-HSA-LABEL: global_load_v3i32:
; GCN-HSA:       ; %bb.0: ; %entry
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCN-HSA-NEXT:    v_mov_b32_e32 v3, 0
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    global_load_dwordx3 v[0:2], v0, s[2:3]
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    global_store_dwordx3 v3, v[0:2], s[0:1]
; GCN-HSA-NEXT:    s_endpgm
entry:
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <3 x i32>, ptr addrspace(1) %in, i32 %tid
  %ld = load <3 x i32>, ptr addrspace(1) %in.tid
  store <3 x i32> %ld, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_load_v4i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; SI-NOHSA-LABEL: global_load_v4i32:
; SI-NOHSA:       ; %bb.0: ; %entry
; SI-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NOHSA-NEXT:    s_mov_b32 s7, 0xf000
; SI-NOHSA-NEXT:    s_mov_b32 s10, 0
; SI-NOHSA-NEXT:    s_mov_b32 s11, s7
; SI-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; SI-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; SI-NOHSA-NEXT:    s_mov_b64 s[8:9], s[2:3]
; SI-NOHSA-NEXT:    v_mov_b32_e32 v1, 0
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[0:3], v[0:1], s[8:11], 0 addr64
; SI-NOHSA-NEXT:    s_mov_b32 s6, -1
; SI-NOHSA-NEXT:    s_mov_b32 s4, s0
; SI-NOHSA-NEXT:    s_mov_b32 s5, s1
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(0)
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
; SI-NOHSA-NEXT:    s_endpgm
;
; GCNX3-HSA-LABEL: global_load_v4i32:
; GCNX3-HSA:       ; %bb.0: ; %entry
; GCNX3-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCNX3-HSA-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCNX3-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCNX3-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCNX3-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCNX3-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v4, s0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v5, s1
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[4:5], v[0:3]
; GCNX3-HSA-NEXT:    s_endpgm
;
; GCNX3-NOHSA-LABEL: global_load_v4i32:
; GCNX3-NOHSA:       ; %bb.0: ; %entry
; GCNX3-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCNX3-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCNX3-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCNX3-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; GCNX3-NOHSA-NEXT:    s_mov_b32 s2, -1
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(0)
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCNX3-NOHSA-NEXT:    s_endpgm
;
; EG-LABEL: global_load_v4i32:
; EG:       ; %bb.0: ; %entry
; EG-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 1, @11, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T1.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    4(5.605194e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 11:
; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
;
; GCN-HSA-LABEL: global_load_v4i32:
; GCN-HSA:       ; %bb.0: ; %entry
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCN-HSA-NEXT:    v_mov_b32_e32 v4, 0
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    global_load_dwordx4 v[0:3], v0, s[2:3]
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    global_store_dwordx4 v4, v[0:3], s[0:1]
; GCN-HSA-NEXT:    s_endpgm
entry:
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <4 x i32>, ptr addrspace(1) %in, i32 %tid
  %ld = load <4 x i32>, ptr addrspace(1) %in.tid
  store <4 x i32> %ld, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_load_v8i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; SI-NOHSA-LABEL: global_load_v8i32:
; SI-NOHSA:       ; %bb.0: ; %entry
; SI-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NOHSA-NEXT:    s_mov_b32 s7, 0xf000
; SI-NOHSA-NEXT:    s_mov_b32 s10, 0
; SI-NOHSA-NEXT:    s_mov_b32 s11, s7
; SI-NOHSA-NEXT:    v_lshlrev_b32_e32 v4, 5, v0
; SI-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; SI-NOHSA-NEXT:    s_mov_b64 s[8:9], s[2:3]
; SI-NOHSA-NEXT:    v_mov_b32_e32 v5, 0
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[0:3], v[4:5], s[8:11], 0 addr64 offset:16
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[4:7], v[4:5], s[8:11], 0 addr64
; SI-NOHSA-NEXT:    s_mov_b32 s6, -1
; SI-NOHSA-NEXT:    s_mov_b32 s4, s0
; SI-NOHSA-NEXT:    s_mov_b32 s5, s1
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(1)
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0 offset:16
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(1)
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[4:7], off, s[4:7], 0
; SI-NOHSA-NEXT:    s_endpgm
;
; GCNX3-HSA-LABEL: global_load_v8i32:
; GCNX3-HSA:       ; %bb.0: ; %entry
; GCNX3-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCNX3-HSA-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
; GCNX3-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCNX3-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCNX3-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCNX3-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-HSA-NEXT:    v_add_i32_e32 v4, vcc, s2, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, 16, v4
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v5, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[4:7], v[4:5]
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 16
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v11, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v10, s2
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v9, s1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v8, s0
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(1)
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[10:11], v[0:3]
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(1)
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[8:9], v[4:7]
; GCNX3-HSA-NEXT:    s_endpgm
;
; GCNX3-NOHSA-LABEL: global_load_v8i32:
; GCNX3-NOHSA:       ; %bb.0: ; %entry
; GCNX3-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCNX3-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
; GCNX3-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v4, vcc, s2, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v0, vcc, 16, v4
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v5, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[4:7], v[4:5]
; GCNX3-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; GCNX3-NOHSA-NEXT:    s_mov_b32 s2, -1
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(1)
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(1)
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0
; GCNX3-NOHSA-NEXT:    s_endpgm
;
; EG-LABEL: global_load_v8i32:
; EG:       ; %bb.0: ; %entry
; EG-NEXT:    ALU 2, @10, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 1 @6
; EG-NEXT:    ALU 3, @13, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T1.XYZW, T2.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T3.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_128 T1.XYZW, T0.X, 0, #1
; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 16, #1
; EG-NEXT:    ALU clause starting at 10:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    5(7.006492e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 13:
; EG-NEXT:     LSHR * T2.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T3.X, PV.X, literal.x,
; EG-NEXT:    4(5.605194e-45), 0(0.000000e+00)
;
; GCN-HSA-LABEL: global_load_v8i32:
; GCN-HSA:       ; %bb.0: ; %entry
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v8, 5, v0
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    global_load_dwordx4 v[0:3], v8, s[2:3] offset:16
; GCN-HSA-NEXT:    global_load_dwordx4 v[4:7], v8, s[2:3]
; GCN-HSA-NEXT:    v_mov_b32_e32 v8, 0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(1)
; GCN-HSA-NEXT:    global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
; GCN-HSA-NEXT:    s_waitcnt vmcnt(1)
; GCN-HSA-NEXT:    global_store_dwordx4 v8, v[4:7], s[0:1]
; GCN-HSA-NEXT:    s_endpgm
entry:
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <8 x i32>, ptr addrspace(1) %in, i32 %tid
  %ld = load <8 x i32>, ptr addrspace(1) %in.tid
  store <8 x i32> %ld, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_load_v9i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; SI-NOHSA-LABEL: global_load_v9i32:
; SI-NOHSA:       ; %bb.0: ; %entry
; SI-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NOHSA-NEXT:    s_mov_b32 s7, 0xf000
; SI-NOHSA-NEXT:    s_mov_b32 s10, 0
; SI-NOHSA-NEXT:    s_mov_b32 s11, s7
; SI-NOHSA-NEXT:    v_lshlrev_b32_e32 v8, 6, v0
; SI-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; SI-NOHSA-NEXT:    s_mov_b64 s[8:9], s[2:3]
; SI-NOHSA-NEXT:    v_mov_b32_e32 v9, 0
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[0:3], v[8:9], s[8:11], 0 addr64
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[4:7], v[8:9], s[8:11], 0 addr64 offset:16
; SI-NOHSA-NEXT:    buffer_load_dword v8, v[8:9], s[8:11], 0 addr64 offset:32
; SI-NOHSA-NEXT:    s_mov_b32 s6, -1
; SI-NOHSA-NEXT:    s_mov_b32 s4, s0
; SI-NOHSA-NEXT:    s_mov_b32 s5, s1
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(2)
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(2)
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[4:7], off, s[4:7], 0 offset:16
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(2)
; SI-NOHSA-NEXT:    buffer_store_dword v8, off, s[4:7], 0 offset:32
; SI-NOHSA-NEXT:    s_endpgm
;
; GCNX3-HSA-LABEL: global_load_v9i32:
; GCNX3-HSA:       ; %bb.0: ; %entry
; GCNX3-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCNX3-HSA-NEXT:    v_lshlrev_b32_e32 v0, 6, v0
; GCNX3-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCNX3-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCNX3-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCNX3-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    v_add_i32_e32 v8, vcc, 32, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v9, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    v_add_i32_e32 v4, vcc, 16, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[4:7], v[4:5]
; GCNX3-HSA-NEXT:    flat_load_dword v14, v[8:9]
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 16
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v9, s1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v8, s0
; GCNX3-HSA-NEXT:    s_add_u32 s0, s0, 32
; GCNX3-HSA-NEXT:    s_addc_u32 s1, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v11, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v10, s2
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v13, s1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v12, s0
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(2)
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[8:9], v[0:3]
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(2)
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[10:11], v[4:7]
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(2)
; GCNX3-HSA-NEXT:    flat_store_dword v[12:13], v14
; GCNX3-HSA-NEXT:    s_endpgm
;
; GCNX3-NOHSA-LABEL: global_load_v9i32:
; GCNX3-NOHSA:       ; %bb.0: ; %entry
; GCNX3-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCNX3-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 6, v0
; GCNX3-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v8, vcc, 32, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v9, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v4, vcc, 16, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[4:7], v[4:5]
; GCNX3-NOHSA-NEXT:    flat_load_dword v8, v[8:9]
; GCNX3-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; GCNX3-NOHSA-NEXT:    s_mov_b32 s2, -1
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(2)
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(2)
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(2)
; GCNX3-NOHSA-NEXT:    buffer_store_dword v8, off, s[0:3], 0 offset:32
; GCNX3-NOHSA-NEXT:    s_endpgm
;
; EG-LABEL: global_load_v9i32:
; EG:       ; %bb.0: ; %entry
; EG-NEXT:    ALU 6, @14, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 2 @8
; EG-NEXT:    ALU 1, @21, KC0[], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T4.XYZW, T1.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T5.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T3.X, T2.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 8:
; EG-NEXT:     VTX_READ_128 T4.XYZW, T0.X, 0, #1
; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 16, #1
; EG-NEXT:     VTX_READ_32 T3.X, T3.X, 32, #1
; EG-NEXT:    ALU clause starting at 14:
; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T2.X, PV.X, literal.x,
; EG-NEXT:     LSHL * T0.W, T0.X, literal.y,
; EG-NEXT:    8(1.121039e-44), 6(8.407791e-45)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:     MOV * T3.X, PV.X,
; EG-NEXT:    ALU clause starting at 21:
; EG-NEXT:     ADD_INT * T5.X, T1.X, literal.x,
; EG-NEXT:    4(5.605194e-45), 0(0.000000e+00)
;
; GCN-HSA-LABEL: global_load_v9i32:
; GCN-HSA:       ; %bb.0: ; %entry
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v8, 6, v0
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    global_load_dwordx4 v[0:3], v8, s[2:3]
; GCN-HSA-NEXT:    global_load_dwordx4 v[4:7], v8, s[2:3] offset:16
; GCN-HSA-NEXT:    global_load_dword v9, v8, s[2:3] offset:32
; GCN-HSA-NEXT:    v_mov_b32_e32 v8, 0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(2)
; GCN-HSA-NEXT:    global_store_dwordx4 v8, v[0:3], s[0:1]
; GCN-HSA-NEXT:    s_waitcnt vmcnt(2)
; GCN-HSA-NEXT:    global_store_dwordx4 v8, v[4:7], s[0:1] offset:16
; GCN-HSA-NEXT:    s_waitcnt vmcnt(2)
; GCN-HSA-NEXT:    global_store_dword v8, v9, s[0:1] offset:32
; GCN-HSA-NEXT:    s_endpgm
entry:
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <9 x i32>, ptr addrspace(1) %in, i32 %tid
  %ld = load <9 x i32>, ptr addrspace(1) %in.tid
  store <9 x i32> %ld, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_load_v10i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; SI-NOHSA-LABEL: global_load_v10i32:
; SI-NOHSA:       ; %bb.0: ; %entry
; SI-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NOHSA-NEXT:    s_mov_b32 s7, 0xf000
; SI-NOHSA-NEXT:    s_mov_b32 s10, 0
; SI-NOHSA-NEXT:    s_mov_b32 s11, s7
; SI-NOHSA-NEXT:    v_lshlrev_b32_e32 v8, 6, v0
; SI-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; SI-NOHSA-NEXT:    s_mov_b64 s[8:9], s[2:3]
; SI-NOHSA-NEXT:    v_mov_b32_e32 v9, 0
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[0:3], v[8:9], s[8:11], 0 addr64
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[4:7], v[8:9], s[8:11], 0 addr64 offset:16
; SI-NOHSA-NEXT:    buffer_load_dwordx2 v[8:9], v[8:9], s[8:11], 0 addr64 offset:32
; SI-NOHSA-NEXT:    s_mov_b32 s6, -1
; SI-NOHSA-NEXT:    s_mov_b32 s4, s0
; SI-NOHSA-NEXT:    s_mov_b32 s5, s1
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(2)
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(2)
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[4:7], off, s[4:7], 0 offset:16
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(2)
; SI-NOHSA-NEXT:    buffer_store_dwordx2 v[8:9], off, s[4:7], 0 offset:32
; SI-NOHSA-NEXT:    s_endpgm
;
; GCNX3-HSA-LABEL: global_load_v10i32:
; GCNX3-HSA:       ; %bb.0: ; %entry
; GCNX3-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCNX3-HSA-NEXT:    v_lshlrev_b32_e32 v0, 6, v0
; GCNX3-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCNX3-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCNX3-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCNX3-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    v_add_i32_e32 v8, vcc, 32, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v9, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    v_add_i32_e32 v4, vcc, 16, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[4:7], v[4:5]
; GCNX3-HSA-NEXT:    flat_load_dwordx2 v[8:9], v[8:9]
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 16
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v11, s1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v10, s0
; GCNX3-HSA-NEXT:    s_add_u32 s0, s0, 32
; GCNX3-HSA-NEXT:    s_addc_u32 s1, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v13, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v12, s2
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v15, s1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v14, s0
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(2)
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[10:11], v[0:3]
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(2)
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[12:13], v[4:7]
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(2)
; GCNX3-HSA-NEXT:    flat_store_dwordx2 v[14:15], v[8:9]
; GCNX3-HSA-NEXT:    s_endpgm
;
; GCNX3-NOHSA-LABEL: global_load_v10i32:
; GCNX3-NOHSA:       ; %bb.0: ; %entry
; GCNX3-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCNX3-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 6, v0
; GCNX3-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v8, vcc, 32, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v9, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v4, vcc, 16, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[4:7], v[4:5]
; GCNX3-NOHSA-NEXT:    flat_load_dwordx2 v[8:9], v[8:9]
; GCNX3-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; GCNX3-NOHSA-NEXT:    s_mov_b32 s2, -1
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(2)
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(2)
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(2)
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx2 v[8:9], off, s[0:3], 0 offset:32
; GCNX3-NOHSA-NEXT:    s_endpgm
;
; EG-LABEL: global_load_v10i32:
; EG:       ; %bb.0: ; %entry
; EG-NEXT:    ALU 3, @14, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 2 @8
; EG-NEXT:    ALU 2, @18, KC0[], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T2.XYZW, T1.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T3.XYZW, T5.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XY, T4.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 8:
; EG-NEXT:     VTX_READ_128 T2.XYZW, T0.X, 0, #1
; EG-NEXT:     VTX_READ_128 T3.XYZW, T0.X, 16, #1
; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 32, #1
; EG-NEXT:    ALU clause starting at 14:
; EG-NEXT:     LSHR T1.X, KC0[2].Y, literal.x,
; EG-NEXT:     LSHL * T0.W, T0.X, literal.y,
; EG-NEXT:    2(2.802597e-45), 6(8.407791e-45)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 18:
; EG-NEXT:     ADD_INT T4.X, T1.X, literal.x,
; EG-NEXT:     ADD_INT * T5.X, T1.X, literal.y,
; EG-NEXT:    8(1.121039e-44), 4(5.605194e-45)
;
; GCN-HSA-LABEL: global_load_v10i32:
; GCN-HSA:       ; %bb.0: ; %entry
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v10, 6, v0
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    global_load_dwordx4 v[0:3], v10, s[2:3]
; GCN-HSA-NEXT:    global_load_dwordx4 v[4:7], v10, s[2:3] offset:16
; GCN-HSA-NEXT:    global_load_dwordx2 v[8:9], v10, s[2:3] offset:32
; GCN-HSA-NEXT:    v_mov_b32_e32 v10, 0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(2)
; GCN-HSA-NEXT:    global_store_dwordx4 v10, v[0:3], s[0:1]
; GCN-HSA-NEXT:    s_waitcnt vmcnt(2)
; GCN-HSA-NEXT:    global_store_dwordx4 v10, v[4:7], s[0:1] offset:16
; GCN-HSA-NEXT:    s_waitcnt vmcnt(2)
; GCN-HSA-NEXT:    global_store_dwordx2 v10, v[8:9], s[0:1] offset:32
; GCN-HSA-NEXT:    s_endpgm
entry:
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <10 x i32>, ptr addrspace(1) %in, i32 %tid
  %ld = load <10 x i32>, ptr addrspace(1) %in.tid
  store <10 x i32> %ld, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_load_v11i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; SI-NOHSA-LABEL: global_load_v11i32:
; SI-NOHSA:       ; %bb.0: ; %entry
; SI-NOHSA-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; SI-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; SI-NOHSA-NEXT:    s_mov_b32 s10, 0
; SI-NOHSA-NEXT:    s_mov_b32 s11, s3
; SI-NOHSA-NEXT:    v_lshlrev_b32_e32 v8, 6, v0
; SI-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; SI-NOHSA-NEXT:    s_mov_b64 s[8:9], s[6:7]
; SI-NOHSA-NEXT:    v_mov_b32_e32 v9, 0
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[0:3], v[8:9], s[8:11], 0 addr64
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[4:7], v[8:9], s[8:11], 0 addr64 offset:16
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[8:11], v[8:9], s[8:11], 0 addr64 offset:32
; SI-NOHSA-NEXT:    s_mov_b32 s2, -1
; SI-NOHSA-NEXT:    s_mov_b32 s0, s4
; SI-NOHSA-NEXT:    s_mov_b32 s1, s5
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(2)
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(2)
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(2)
; SI-NOHSA-NEXT:    buffer_store_dword v10, off, s[0:3], 0 offset:40
; SI-NOHSA-NEXT:    buffer_store_dwordx2 v[8:9], off, s[0:3], 0 offset:32
; SI-NOHSA-NEXT:    s_endpgm
;
; GCNX3-HSA-LABEL: global_load_v11i32:
; GCNX3-HSA:       ; %bb.0: ; %entry
; GCNX3-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCNX3-HSA-NEXT:    v_lshlrev_b32_e32 v0, 6, v0
; GCNX3-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCNX3-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCNX3-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCNX3-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    v_add_i32_e32 v8, vcc, 32, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v9, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    v_add_i32_e32 v4, vcc, 16, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[4:7], v[4:5]
; GCNX3-HSA-NEXT:    flat_load_dwordx3 v[8:10], v[8:9]
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 16
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v12, s1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v11, s0
; GCNX3-HSA-NEXT:    s_add_u32 s0, s0, 32
; GCNX3-HSA-NEXT:    s_addc_u32 s1, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v14, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v13, s2
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v16, s1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v15, s0
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(2)
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[11:12], v[0:3]
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(2)
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[13:14], v[4:7]
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(2)
; GCNX3-HSA-NEXT:    flat_store_dwordx3 v[15:16], v[8:10]
; GCNX3-HSA-NEXT:    s_endpgm
;
; GCNX3-NOHSA-LABEL: global_load_v11i32:
; GCNX3-NOHSA:       ; %bb.0: ; %entry
; GCNX3-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCNX3-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 6, v0
; GCNX3-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v8, vcc, 32, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v9, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v4, vcc, 16, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[4:7], v[4:5]
; GCNX3-NOHSA-NEXT:    flat_load_dwordx3 v[8:10], v[8:9]
; GCNX3-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; GCNX3-NOHSA-NEXT:    s_mov_b32 s2, -1
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(2)
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(2)
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(2)
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx3 v[8:10], off, s[0:3], 0 offset:32
; GCNX3-NOHSA-NEXT:    s_endpgm
;
; EG-LABEL: global_load_v11i32:
; EG:       ; %bb.0: ; %entry
; EG-NEXT:    ALU 2, @14, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 2 @8
; EG-NEXT:    ALU 7, @17, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T1.XYZW, T3.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T2.XYZW, T7.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T5.X, T6.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XY, T4.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 8:
; EG-NEXT:     VTX_READ_128 T1.XYZW, T0.X, 0, #1
; EG-NEXT:     VTX_READ_128 T2.XYZW, T0.X, 16, #1
; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 32, #1
; EG-NEXT:    ALU clause starting at 14:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    6(8.407791e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 17:
; EG-NEXT:     LSHR * T3.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T4.X, PV.X, literal.x,
; EG-NEXT:     MOV * T5.X, T0.Z,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T6.X, T3.X, literal.x,
; EG-NEXT:     ADD_INT * T7.X, T3.X, literal.y,
; EG-NEXT:    10(1.401298e-44), 4(5.605194e-45)
;
; GCN-HSA-LABEL: global_load_v11i32:
; GCN-HSA:       ; %bb.0: ; %entry
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v11, 6, v0
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    global_load_dwordx4 v[0:3], v11, s[2:3]
; GCN-HSA-NEXT:    global_load_dwordx4 v[4:7], v11, s[2:3] offset:16
; GCN-HSA-NEXT:    global_load_dwordx3 v[8:10], v11, s[2:3] offset:32
; GCN-HSA-NEXT:    v_mov_b32_e32 v11, 0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(2)
; GCN-HSA-NEXT:    global_store_dwordx4 v11, v[0:3], s[0:1]
; GCN-HSA-NEXT:    s_waitcnt vmcnt(2)
; GCN-HSA-NEXT:    global_store_dwordx4 v11, v[4:7], s[0:1] offset:16
; GCN-HSA-NEXT:    s_waitcnt vmcnt(2)
; GCN-HSA-NEXT:    global_store_dwordx3 v11, v[8:10], s[0:1] offset:32
; GCN-HSA-NEXT:    s_endpgm
entry:
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <11 x i32>, ptr addrspace(1) %in, i32 %tid
  %ld = load <11 x i32>, ptr addrspace(1) %in.tid
  store <11 x i32> %ld, ptr addrspace(1) %out
  ret void
}


define amdgpu_kernel void @global_load_v12i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; SI-NOHSA-LABEL: global_load_v12i32:
; SI-NOHSA:       ; %bb.0: ; %entry
; SI-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NOHSA-NEXT:    s_mov_b32 s7, 0xf000
; SI-NOHSA-NEXT:    s_mov_b32 s10, 0
; SI-NOHSA-NEXT:    s_mov_b32 s11, s7
; SI-NOHSA-NEXT:    v_lshlrev_b32_e32 v8, 6, v0
; SI-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; SI-NOHSA-NEXT:    s_mov_b64 s[8:9], s[2:3]
; SI-NOHSA-NEXT:    v_mov_b32_e32 v9, 0
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[0:3], v[8:9], s[8:11], 0 addr64
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[4:7], v[8:9], s[8:11], 0 addr64 offset:16
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[8:11], v[8:9], s[8:11], 0 addr64 offset:32
; SI-NOHSA-NEXT:    s_mov_b32 s6, -1
; SI-NOHSA-NEXT:    s_mov_b32 s4, s0
; SI-NOHSA-NEXT:    s_mov_b32 s5, s1
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(2)
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(2)
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[4:7], off, s[4:7], 0 offset:16
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(2)
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[8:11], off, s[4:7], 0 offset:32
; SI-NOHSA-NEXT:    s_endpgm
;
; GCNX3-HSA-LABEL: global_load_v12i32:
; GCNX3-HSA:       ; %bb.0: ; %entry
; GCNX3-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCNX3-HSA-NEXT:    v_lshlrev_b32_e32 v0, 6, v0
; GCNX3-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCNX3-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCNX3-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCNX3-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    v_add_i32_e32 v8, vcc, 32, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v9, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    v_add_i32_e32 v4, vcc, 16, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[4:7], v[4:5]
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[8:11], v[8:9]
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 16
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v13, s1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v12, s0
; GCNX3-HSA-NEXT:    s_add_u32 s0, s0, 32
; GCNX3-HSA-NEXT:    s_addc_u32 s1, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v15, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v14, s2
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v17, s1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v16, s0
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(2)
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[12:13], v[0:3]
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(2)
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[14:15], v[4:7]
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(2)
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[16:17], v[8:11]
; GCNX3-HSA-NEXT:    s_endpgm
;
; GCNX3-NOHSA-LABEL: global_load_v12i32:
; GCNX3-NOHSA:       ; %bb.0: ; %entry
; GCNX3-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCNX3-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 6, v0
; GCNX3-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v8, vcc, 32, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v9, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v4, vcc, 16, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[4:7], v[4:5]
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[8:11], v[8:9]
; GCNX3-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; GCNX3-NOHSA-NEXT:    s_mov_b32 s2, -1
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(2)
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(2)
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(2)
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:32
; GCNX3-NOHSA-NEXT:    s_endpgm
;
; EG-LABEL: global_load_v12i32:
; EG:       ; %bb.0: ; %entry
; EG-NEXT:    ALU 5, @14, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 2 @8
; EG-NEXT:    ALU 1, @20, KC0[], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T3.XYZW, T1.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T4.XYZW, T5.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T2.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 8:
; EG-NEXT:     VTX_READ_128 T3.XYZW, T0.X, 0, #1
; EG-NEXT:     VTX_READ_128 T4.XYZW, T0.X, 16, #1
; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 32, #1
; EG-NEXT:    ALU clause starting at 14:
; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T2.X, PV.X, literal.x,
; EG-NEXT:     LSHL * T0.W, T0.X, literal.y,
; EG-NEXT:    8(1.121039e-44), 6(8.407791e-45)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 20:
; EG-NEXT:     ADD_INT * T5.X, T1.X, literal.x,
; EG-NEXT:    4(5.605194e-45), 0(0.000000e+00)
;
; GCN-HSA-LABEL: global_load_v12i32:
; GCN-HSA:       ; %bb.0: ; %entry
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v12, 6, v0
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    global_load_dwordx4 v[0:3], v12, s[2:3]
; GCN-HSA-NEXT:    global_load_dwordx4 v[4:7], v12, s[2:3] offset:16
; GCN-HSA-NEXT:    global_load_dwordx4 v[8:11], v12, s[2:3] offset:32
; GCN-HSA-NEXT:    v_mov_b32_e32 v12, 0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(2)
; GCN-HSA-NEXT:    global_store_dwordx4 v12, v[0:3], s[0:1]
; GCN-HSA-NEXT:    s_waitcnt vmcnt(2)
; GCN-HSA-NEXT:    global_store_dwordx4 v12, v[4:7], s[0:1] offset:16
; GCN-HSA-NEXT:    s_waitcnt vmcnt(2)
; GCN-HSA-NEXT:    global_store_dwordx4 v12, v[8:11], s[0:1] offset:32
; GCN-HSA-NEXT:    s_endpgm
entry:
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <12 x i32>, ptr addrspace(1) %in, i32 %tid
  %ld = load <12 x i32>, ptr addrspace(1) %in.tid
  store <12 x i32> %ld, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_load_v16i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; SI-NOHSA-LABEL: global_load_v16i32:
; SI-NOHSA:       ; %bb.0: ; %entry
; SI-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NOHSA-NEXT:    s_mov_b32 s7, 0xf000
; SI-NOHSA-NEXT:    s_mov_b32 s10, 0
; SI-NOHSA-NEXT:    s_mov_b32 s11, s7
; SI-NOHSA-NEXT:    v_lshlrev_b32_e32 v12, 6, v0
; SI-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; SI-NOHSA-NEXT:    s_mov_b64 s[8:9], s[2:3]
; SI-NOHSA-NEXT:    v_mov_b32_e32 v13, 0
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[0:3], v[12:13], s[8:11], 0 addr64 offset:32
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[4:7], v[12:13], s[8:11], 0 addr64 offset:48
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[8:11], v[12:13], s[8:11], 0 addr64
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[12:15], v[12:13], s[8:11], 0 addr64 offset:16
; SI-NOHSA-NEXT:    s_mov_b32 s6, -1
; SI-NOHSA-NEXT:    s_mov_b32 s4, s0
; SI-NOHSA-NEXT:    s_mov_b32 s5, s1
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(3)
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0 offset:32
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(3)
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[4:7], off, s[4:7], 0 offset:48
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(3)
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[8:11], off, s[4:7], 0
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(3)
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[12:15], off, s[4:7], 0 offset:16
; SI-NOHSA-NEXT:    s_endpgm
;
; GCNX3-HSA-LABEL: global_load_v16i32:
; GCNX3-HSA:       ; %bb.0: ; %entry
; GCNX3-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCNX3-HSA-NEXT:    v_lshlrev_b32_e32 v0, 6, v0
; GCNX3-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCNX3-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCNX3-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCNX3-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-HSA-NEXT:    v_add_i32_e32 v8, vcc, s2, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v9, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, 48, v8
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v9, vcc
; GCNX3-HSA-NEXT:    v_add_i32_e32 v4, vcc, 32, v8
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v9, vcc
; GCNX3-HSA-NEXT:    v_add_i32_e32 v12, vcc, 16, v8
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v13, vcc, 0, v9, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[4:7], v[4:5]
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[8:11], v[8:9]
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[12:15], v[12:13]
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 32
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v19, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v18, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 48
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v17, s1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v16, s0
; GCNX3-HSA-NEXT:    s_add_u32 s0, s0, 16
; GCNX3-HSA-NEXT:    s_addc_u32 s1, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v21, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v20, s2
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v23, s1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v22, s0
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(2)
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[18:19], v[4:7]
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[20:21], v[0:3]
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(3)
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[16:17], v[8:11]
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(3)
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[22:23], v[12:15]
; GCNX3-HSA-NEXT:    s_endpgm
;
; GCNX3-NOHSA-LABEL: global_load_v16i32:
; GCNX3-NOHSA:       ; %bb.0: ; %entry
; GCNX3-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCNX3-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 6, v0
; GCNX3-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v8, vcc, s2, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v9, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v0, vcc, 48, v8
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v9, vcc
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v4, vcc, 32, v8
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v9, vcc
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v12, vcc, 16, v8
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v13, vcc, 0, v9, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[4:7], v[4:5]
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[8:11], v[8:9]
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[12:15], v[12:13]
; GCNX3-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; GCNX3-NOHSA-NEXT:    s_mov_b32 s2, -1
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(2)
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:32
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(3)
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(3)
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:16
; GCNX3-NOHSA-NEXT:    s_endpgm
;
; EG-LABEL: global_load_v16i32:
; EG:       ; %bb.0: ; %entry
; EG-NEXT:    ALU 7, @16, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 3 @8
; EG-NEXT:    ALU 1, @24, KC0[], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T4.XYZW, T7.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T5.XYZW, T3.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T6.XYZW, T1.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T2.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 8:
; EG-NEXT:     VTX_READ_128 T4.XYZW, T0.X, 32, #1
; EG-NEXT:     VTX_READ_128 T5.XYZW, T0.X, 48, #1
; EG-NEXT:     VTX_READ_128 T6.XYZW, T0.X, 0, #1
; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 16, #1
; EG-NEXT:    ALU clause starting at 16:
; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T2.X, PV.X, literal.x,
; EG-NEXT:     ADD_INT * T3.X, PV.X, literal.y,
; EG-NEXT:    4(5.605194e-45), 12(1.681558e-44)
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    6(8.407791e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 24:
; EG-NEXT:     ADD_INT * T7.X, T1.X, literal.x,
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
;
; GCN-HSA-LABEL: global_load_v16i32:
; GCN-HSA:       ; %bb.0: ; %entry
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v16, 6, v0
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    global_load_dwordx4 v[0:3], v16, s[2:3] offset:32
; GCN-HSA-NEXT:    global_load_dwordx4 v[4:7], v16, s[2:3] offset:48
; GCN-HSA-NEXT:    global_load_dwordx4 v[8:11], v16, s[2:3]
; GCN-HSA-NEXT:    global_load_dwordx4 v[12:15], v16, s[2:3] offset:16
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, 0
; GCN-HSA-NEXT:    s_waitcnt vmcnt(3)
; GCN-HSA-NEXT:    global_store_dwordx4 v16, v[0:3], s[0:1] offset:32
; GCN-HSA-NEXT:    s_waitcnt vmcnt(3)
; GCN-HSA-NEXT:    global_store_dwordx4 v16, v[4:7], s[0:1] offset:48
; GCN-HSA-NEXT:    s_waitcnt vmcnt(3)
; GCN-HSA-NEXT:    global_store_dwordx4 v16, v[8:11], s[0:1]
; GCN-HSA-NEXT:    s_waitcnt vmcnt(3)
; GCN-HSA-NEXT:    global_store_dwordx4 v16, v[12:15], s[0:1] offset:16
; GCN-HSA-NEXT:    s_endpgm
entry:
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <16 x i32>, ptr addrspace(1) %in, i32 %tid
  %ld = load <16 x i32>, ptr addrspace(1) %in.tid
  store <16 x i32> %ld, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_zextload_i32_to_i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; SI-NOHSA-LABEL: global_zextload_i32_to_i64:
; SI-NOHSA:       ; %bb.0:
; SI-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NOHSA-NEXT:    s_mov_b32 s7, 0xf000
; SI-NOHSA-NEXT:    s_mov_b32 s10, 0
; SI-NOHSA-NEXT:    s_mov_b32 s11, s7
; SI-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; SI-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; SI-NOHSA-NEXT:    s_mov_b64 s[8:9], s[2:3]
; SI-NOHSA-NEXT:    v_mov_b32_e32 v1, 0
; SI-NOHSA-NEXT:    buffer_load_dword v0, v[0:1], s[8:11], 0 addr64
; SI-NOHSA-NEXT:    s_mov_b32 s6, -1
; SI-NOHSA-NEXT:    s_mov_b32 s4, s0
; SI-NOHSA-NEXT:    s_mov_b32 s5, s1
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(0)
; SI-NOHSA-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; SI-NOHSA-NEXT:    s_endpgm
;
; GCNX3-HSA-LABEL: global_zextload_i32_to_i64:
; GCNX3-HSA:       ; %bb.0:
; GCNX3-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCNX3-HSA-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCNX3-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCNX3-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCNX3-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCNX3-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    flat_load_dword v0, v[0:1]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, s0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v3, s1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, 0
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCNX3-HSA-NEXT:    flat_store_dwordx2 v[2:3], v[0:1]
; GCNX3-HSA-NEXT:    s_endpgm
;
; GCNX3-NOHSA-LABEL: global_zextload_i32_to_i64:
; GCNX3-NOHSA:       ; %bb.0:
; GCNX3-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCNX3-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCNX3-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dword v0, v[0:1]
; GCNX3-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; GCNX3-NOHSA-NEXT:    s_mov_b32 s2, -1
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v1, 0
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(0)
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GCNX3-NOHSA-NEXT:    s_endpgm
;
; EG-LABEL: global_zextload_i32_to_i64:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 2, @11, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 11:
; EG-NEXT:     MOV * T0.Y, 0.0,
; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
;
; GCN-HSA-LABEL: global_zextload_i32_to_i64:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, 0
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    global_load_dword v0, v0, s[2:3]
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    global_store_dwordx2 v1, v[0:1], s[0:1]
; GCN-HSA-NEXT:    s_endpgm
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds i32, ptr addrspace(1) %in, i32 %tid
  %ld = load i32, ptr addrspace(1) %in.tid
  %ext = zext i32 %ld to i64
  store i64 %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_sextload_i32_to_i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; SI-NOHSA-LABEL: global_sextload_i32_to_i64:
; SI-NOHSA:       ; %bb.0:
; SI-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NOHSA-NEXT:    s_mov_b32 s7, 0xf000
; SI-NOHSA-NEXT:    s_mov_b32 s10, 0
; SI-NOHSA-NEXT:    s_mov_b32 s11, s7
; SI-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; SI-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; SI-NOHSA-NEXT:    s_mov_b64 s[8:9], s[2:3]
; SI-NOHSA-NEXT:    v_mov_b32_e32 v1, 0
; SI-NOHSA-NEXT:    buffer_load_dword v0, v[0:1], s[8:11], 0 addr64
; SI-NOHSA-NEXT:    s_mov_b32 s6, -1
; SI-NOHSA-NEXT:    s_mov_b32 s4, s0
; SI-NOHSA-NEXT:    s_mov_b32 s5, s1
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(0)
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
; SI-NOHSA-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; SI-NOHSA-NEXT:    s_endpgm
;
; GCNX3-HSA-LABEL: global_sextload_i32_to_i64:
; GCNX3-HSA:       ; %bb.0:
; GCNX3-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCNX3-HSA-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCNX3-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCNX3-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCNX3-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCNX3-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    flat_load_dword v0, v[0:1]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, s0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v3, s1
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
; GCNX3-HSA-NEXT:    flat_store_dwordx2 v[2:3], v[0:1]
; GCNX3-HSA-NEXT:    s_endpgm
;
; GCNX3-NOHSA-LABEL: global_sextload_i32_to_i64:
; GCNX3-NOHSA:       ; %bb.0:
; GCNX3-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCNX3-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCNX3-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dword v0, v[0:1]
; GCNX3-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; GCNX3-NOHSA-NEXT:    s_mov_b32 s2, -1
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(0)
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GCNX3-NOHSA-NEXT:    s_endpgm
;
; EG-LABEL: global_sextload_i32_to_i64:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 2, @11, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 11:
; EG-NEXT:     LSHR T1.X, KC0[2].Y, literal.x,
; EG-NEXT:     ASHR * T0.Y, T0.X, literal.y,
; EG-NEXT:    2(2.802597e-45), 31(4.344025e-44)
;
; GCN-HSA-LABEL: global_sextload_i32_to_i64:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, 0
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    global_load_dword v0, v0, s[2:3]
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
; GCN-HSA-NEXT:    global_store_dwordx2 v2, v[0:1], s[0:1]
; GCN-HSA-NEXT:    s_endpgm
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds i32, ptr addrspace(1) %in, i32 %tid
  %ld = load i32, ptr addrspace(1) %in.tid
  %ext = sext i32 %ld to i64
  store i64 %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_zextload_v1i32_to_v1i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; SI-NOHSA-LABEL: global_zextload_v1i32_to_v1i64:
; SI-NOHSA:       ; %bb.0:
; SI-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NOHSA-NEXT:    s_mov_b32 s7, 0xf000
; SI-NOHSA-NEXT:    s_mov_b32 s10, 0
; SI-NOHSA-NEXT:    s_mov_b32 s11, s7
; SI-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; SI-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; SI-NOHSA-NEXT:    s_mov_b64 s[8:9], s[2:3]
; SI-NOHSA-NEXT:    v_mov_b32_e32 v1, 0
; SI-NOHSA-NEXT:    buffer_load_dword v0, v[0:1], s[8:11], 0 addr64
; SI-NOHSA-NEXT:    s_mov_b32 s6, -1
; SI-NOHSA-NEXT:    s_mov_b32 s4, s0
; SI-NOHSA-NEXT:    s_mov_b32 s5, s1
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(0)
; SI-NOHSA-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; SI-NOHSA-NEXT:    s_endpgm
;
; GCNX3-HSA-LABEL: global_zextload_v1i32_to_v1i64:
; GCNX3-HSA:       ; %bb.0:
; GCNX3-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCNX3-HSA-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCNX3-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCNX3-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCNX3-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCNX3-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    flat_load_dword v0, v[0:1]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, s0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v3, s1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, 0
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCNX3-HSA-NEXT:    flat_store_dwordx2 v[2:3], v[0:1]
; GCNX3-HSA-NEXT:    s_endpgm
;
; GCNX3-NOHSA-LABEL: global_zextload_v1i32_to_v1i64:
; GCNX3-NOHSA:       ; %bb.0:
; GCNX3-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCNX3-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCNX3-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dword v0, v[0:1]
; GCNX3-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; GCNX3-NOHSA-NEXT:    s_mov_b32 s2, -1
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v1, 0
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(0)
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GCNX3-NOHSA-NEXT:    s_endpgm
;
; EG-LABEL: global_zextload_v1i32_to_v1i64:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 2, @11, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 11:
; EG-NEXT:     MOV * T0.Y, 0.0,
; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
;
; GCN-HSA-LABEL: global_zextload_v1i32_to_v1i64:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, 0
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    global_load_dword v0, v0, s[2:3]
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    global_store_dwordx2 v1, v[0:1], s[0:1]
; GCN-HSA-NEXT:    s_endpgm
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <1 x i32>, ptr addrspace(1) %in, i32 %tid
  %ld = load <1 x i32>, ptr addrspace(1) %in.tid
  %ext = zext <1 x i32> %ld to <1 x i64>
  store <1 x i64> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_sextload_v1i32_to_v1i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; SI-NOHSA-LABEL: global_sextload_v1i32_to_v1i64:
; SI-NOHSA:       ; %bb.0:
; SI-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NOHSA-NEXT:    s_mov_b32 s7, 0xf000
; SI-NOHSA-NEXT:    s_mov_b32 s10, 0
; SI-NOHSA-NEXT:    s_mov_b32 s11, s7
; SI-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; SI-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; SI-NOHSA-NEXT:    s_mov_b64 s[8:9], s[2:3]
; SI-NOHSA-NEXT:    v_mov_b32_e32 v1, 0
; SI-NOHSA-NEXT:    buffer_load_dword v0, v[0:1], s[8:11], 0 addr64
; SI-NOHSA-NEXT:    s_mov_b32 s6, -1
; SI-NOHSA-NEXT:    s_mov_b32 s4, s0
; SI-NOHSA-NEXT:    s_mov_b32 s5, s1
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(0)
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
; SI-NOHSA-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; SI-NOHSA-NEXT:    s_endpgm
;
; GCNX3-HSA-LABEL: global_sextload_v1i32_to_v1i64:
; GCNX3-HSA:       ; %bb.0:
; GCNX3-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCNX3-HSA-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCNX3-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCNX3-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCNX3-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCNX3-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    flat_load_dword v0, v[0:1]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, s0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v3, s1
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
; GCNX3-HSA-NEXT:    flat_store_dwordx2 v[2:3], v[0:1]
; GCNX3-HSA-NEXT:    s_endpgm
;
; GCNX3-NOHSA-LABEL: global_sextload_v1i32_to_v1i64:
; GCNX3-NOHSA:       ; %bb.0:
; GCNX3-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCNX3-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCNX3-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dword v0, v[0:1]
; GCNX3-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; GCNX3-NOHSA-NEXT:    s_mov_b32 s2, -1
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(0)
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GCNX3-NOHSA-NEXT:    s_endpgm
;
; EG-LABEL: global_sextload_v1i32_to_v1i64:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 2, @11, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_32 T0.X, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 11:
; EG-NEXT:     LSHR T1.X, KC0[2].Y, literal.x,
; EG-NEXT:     ASHR * T0.Y, T0.X, literal.y,
; EG-NEXT:    2(2.802597e-45), 31(4.344025e-44)
;
; GCN-HSA-LABEL: global_sextload_v1i32_to_v1i64:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, 0
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    global_load_dword v0, v0, s[2:3]
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
; GCN-HSA-NEXT:    global_store_dwordx2 v2, v[0:1], s[0:1]
; GCN-HSA-NEXT:    s_endpgm
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <1 x i32>, ptr addrspace(1) %in, i32 %tid
  %ld = load <1 x i32>, ptr addrspace(1) %in.tid
  %ext = sext <1 x i32> %ld to <1 x i64>
  store <1 x i64> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_zextload_v2i32_to_v2i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; SI-NOHSA-LABEL: global_zextload_v2i32_to_v2i64:
; SI-NOHSA:       ; %bb.0:
; SI-NOHSA-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; SI-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; SI-NOHSA-NEXT:    s_mov_b32 s10, 0
; SI-NOHSA-NEXT:    s_mov_b32 s11, s3
; SI-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; SI-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; SI-NOHSA-NEXT:    s_mov_b64 s[8:9], s[6:7]
; SI-NOHSA-NEXT:    v_mov_b32_e32 v1, 0
; SI-NOHSA-NEXT:    buffer_load_dwordx2 v[2:3], v[0:1], s[8:11], 0 addr64
; SI-NOHSA-NEXT:    s_mov_b32 s2, -1
; SI-NOHSA-NEXT:    s_mov_b32 s0, s4
; SI-NOHSA-NEXT:    s_mov_b32 s1, s5
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(0)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v2
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v3
; SI-NOHSA-NEXT:    v_mov_b32_e32 v3, v1
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; SI-NOHSA-NEXT:    s_endpgm
;
; GCNX3-HSA-LABEL: global_zextload_v2i32_to_v2i64:
; GCNX3-HSA:       ; %bb.0:
; GCNX3-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCNX3-HSA-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; GCNX3-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCNX3-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCNX3-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCNX3-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx2 v[2:3], v[0:1]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v4, s0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v5, s1
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, v2
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, v3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v3, v1
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[4:5], v[0:3]
; GCNX3-HSA-NEXT:    s_endpgm
;
; GCNX3-NOHSA-LABEL: global_zextload_v2i32_to_v2i64:
; GCNX3-NOHSA:       ; %bb.0:
; GCNX3-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCNX3-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; GCNX3-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx2 v[2:3], v[0:1]
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v1, 0
; GCNX3-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; GCNX3-NOHSA-NEXT:    s_mov_b32 s2, -1
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(0)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v0, v2
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v2, v3
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v3, v1
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCNX3-NOHSA-NEXT:    s_endpgm
;
; EG-LABEL: global_zextload_v2i32_to_v2i64:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 5, @11, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T1.XYZW, T0.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_64 T0.XY, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 11:
; EG-NEXT:     MOV T1.X, T0.X,
; EG-NEXT:     MOV T1.Y, 0.0,
; EG-NEXT:     MOV T1.Z, T0.Y,
; EG-NEXT:     MOV T1.W, 0.0,
; EG-NEXT:     LSHR * T0.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
;
; GCN-HSA-LABEL: global_zextload_v2i32_to_v2i64:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, 0
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    global_load_dwordx2 v[2:3], v0, s[2:3]
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, v2
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, v3
; GCN-HSA-NEXT:    v_mov_b32_e32 v3, v1
; GCN-HSA-NEXT:    global_store_dwordx4 v1, v[0:3], s[0:1]
; GCN-HSA-NEXT:    s_endpgm
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <2 x i32>, ptr addrspace(1) %in, i32 %tid
  %ld = load <2 x i32>, ptr addrspace(1) %in.tid
  %ext = zext <2 x i32> %ld to <2 x i64>
  store <2 x i64> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_sextload_v2i32_to_v2i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; SI-NOHSA-LABEL: global_sextload_v2i32_to_v2i64:
; SI-NOHSA:       ; %bb.0:
; SI-NOHSA-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; SI-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; SI-NOHSA-NEXT:    s_mov_b32 s10, 0
; SI-NOHSA-NEXT:    s_mov_b32 s11, s3
; SI-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; SI-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; SI-NOHSA-NEXT:    s_mov_b64 s[8:9], s[6:7]
; SI-NOHSA-NEXT:    v_mov_b32_e32 v1, 0
; SI-NOHSA-NEXT:    buffer_load_dwordx2 v[4:5], v[0:1], s[8:11], 0 addr64
; SI-NOHSA-NEXT:    s_mov_b32 s2, -1
; SI-NOHSA-NEXT:    s_mov_b32 s0, s4
; SI-NOHSA-NEXT:    s_mov_b32 s1, s5
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(0)
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v3, 31, v5
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v1, 31, v4
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v4
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v5
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; SI-NOHSA-NEXT:    s_endpgm
;
; GCNX3-HSA-LABEL: global_sextload_v2i32_to_v2i64:
; GCNX3-HSA:       ; %bb.0:
; GCNX3-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCNX3-HSA-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; GCNX3-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCNX3-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCNX3-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCNX3-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx2 v[4:5], v[0:1]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v6, s0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v7, s1
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v3, 31, v5
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v1, 31, v4
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, v4
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, v5
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[6:7], v[0:3]
; GCNX3-HSA-NEXT:    s_endpgm
;
; GCNX3-NOHSA-LABEL: global_sextload_v2i32_to_v2i64:
; GCNX3-NOHSA:       ; %bb.0:
; GCNX3-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCNX3-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; GCNX3-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx2 v[4:5], v[0:1]
; GCNX3-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; GCNX3-NOHSA-NEXT:    s_mov_b32 s2, -1
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(0)
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v3, 31, v5
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v1, 31, v4
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v0, v4
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v2, v5
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCNX3-NOHSA-NEXT:    s_endpgm
;
; EG-LABEL: global_sextload_v2i32_to_v2i64:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 7, @11, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T1.XYZW, T0.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    PAD
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_64 T0.XY, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    3(4.203895e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 11:
; EG-NEXT:     ASHR * T1.W, T0.Y, literal.x,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     ASHR * T1.Y, T0.X, literal.x,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     MOV T1.X, T0.X,
; EG-NEXT:     LSHR * T0.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     MOV * T1.Z, T0.Y,
;
; GCN-HSA-LABEL: global_sextload_v2i32_to_v2i64:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
; GCN-HSA-NEXT:    v_mov_b32_e32 v6, 0
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    global_load_dwordx2 v[4:5], v0, s[2:3]
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v3, 31, v5
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v1, 31, v4
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, v4
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, v5
; GCN-HSA-NEXT:    global_store_dwordx4 v6, v[0:3], s[0:1]
; GCN-HSA-NEXT:    s_endpgm
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <2 x i32>, ptr addrspace(1) %in, i32 %tid
  %ld = load <2 x i32>, ptr addrspace(1) %in.tid
  %ext = sext <2 x i32> %ld to <2 x i64>
  store <2 x i64> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_zextload_v4i32_to_v4i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; SI-NOHSA-LABEL: global_zextload_v4i32_to_v4i64:
; SI-NOHSA:       ; %bb.0:
; SI-NOHSA-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; SI-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; SI-NOHSA-NEXT:    s_mov_b32 s10, 0
; SI-NOHSA-NEXT:    s_mov_b32 s11, s3
; SI-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; SI-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; SI-NOHSA-NEXT:    s_mov_b64 s[8:9], s[6:7]
; SI-NOHSA-NEXT:    v_mov_b32_e32 v1, 0
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[4:7], v[0:1], s[8:11], 0 addr64
; SI-NOHSA-NEXT:    s_mov_b32 s2, -1
; SI-NOHSA-NEXT:    v_mov_b32_e32 v3, v1
; SI-NOHSA-NEXT:    s_mov_b32 s0, s4
; SI-NOHSA-NEXT:    s_mov_b32 s1, s5
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(0)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v6
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v7
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16
; SI-NOHSA-NEXT:    s_waitcnt expcnt(0)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v4
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v5
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; SI-NOHSA-NEXT:    s_endpgm
;
; GCNX3-HSA-LABEL: global_zextload_v4i32_to_v4i64:
; GCNX3-HSA:       ; %bb.0:
; GCNX3-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCNX3-HSA-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCNX3-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCNX3-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCNX3-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCNX3-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 16
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v5, 0
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v7, v5
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v9, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v8, s2
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v4, v2
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v6, v3
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[8:9], v[4:7]
; GCNX3-HSA-NEXT:    s_nop 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v4, v0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v6, v1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[0:1], v[4:7]
; GCNX3-HSA-NEXT:    s_endpgm
;
; GCNX3-NOHSA-LABEL: global_zextload_v4i32_to_v4i64:
; GCNX3-NOHSA:       ; %bb.0:
; GCNX3-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCNX3-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v5, 0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v7, v5
; GCNX3-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCNX3-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; GCNX3-NOHSA-NEXT:    s_mov_b32 s2, -1
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(0)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v4, v2
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v6, v3
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; GCNX3-NOHSA-NEXT:    s_nop 0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v4, v0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v6, v1
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0
; GCNX3-NOHSA-NEXT:    s_endpgm
;
; EG-LABEL: global_zextload_v4i32_to_v4i64:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 11, @11, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T1.XYZW, T3.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T2.XYZW, T0.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    4(5.605194e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 11:
; EG-NEXT:     MOV T1.X, T0.Z,
; EG-NEXT:     MOV T1.Y, 0.0,
; EG-NEXT:     MOV * T2.X, T0.X,
; EG-NEXT:     MOV T2.Y, 0.0,
; EG-NEXT:     MOV T1.Z, T0.W,
; EG-NEXT:     MOV T1.W, 0.0,
; EG-NEXT:     MOV * T2.Z, T0.Y,
; EG-NEXT:     MOV * T2.W, 0.0,
; EG-NEXT:     LSHR * T0.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T3.X, PV.X, literal.x,
; EG-NEXT:    4(5.605194e-45), 0(0.000000e+00)
;
; GCN-HSA-LABEL: global_zextload_v4i32_to_v4i64:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCN-HSA-NEXT:    v_mov_b32_e32 v5, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v7, v5
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    global_load_dwordx4 v[0:3], v0, s[2:3]
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_mov_b32_e32 v4, v2
; GCN-HSA-NEXT:    v_mov_b32_e32 v6, v3
; GCN-HSA-NEXT:    global_store_dwordx4 v5, v[4:7], s[0:1] offset:16
; GCN-HSA-NEXT:    s_nop 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v4, v0
; GCN-HSA-NEXT:    v_mov_b32_e32 v6, v1
; GCN-HSA-NEXT:    global_store_dwordx4 v5, v[4:7], s[0:1]
; GCN-HSA-NEXT:    s_endpgm
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <4 x i32>, ptr addrspace(1) %in, i32 %tid
  %ld = load <4 x i32>, ptr addrspace(1) %in.tid
  %ext = zext <4 x i32> %ld to <4 x i64>
  store <4 x i64> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_sextload_v4i32_to_v4i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; SI-NOHSA-LABEL: global_sextload_v4i32_to_v4i64:
; SI-NOHSA:       ; %bb.0:
; SI-NOHSA-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; SI-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; SI-NOHSA-NEXT:    s_mov_b32 s10, 0
; SI-NOHSA-NEXT:    s_mov_b32 s11, s3
; SI-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; SI-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; SI-NOHSA-NEXT:    s_mov_b64 s[8:9], s[6:7]
; SI-NOHSA-NEXT:    v_mov_b32_e32 v1, 0
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[0:3], v[0:1], s[8:11], 0 addr64
; SI-NOHSA-NEXT:    s_mov_b32 s2, -1
; SI-NOHSA-NEXT:    s_mov_b32 s0, s4
; SI-NOHSA-NEXT:    s_mov_b32 s1, s5
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(0)
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v10, 31, v3
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v8, 31, v2
; SI-NOHSA-NEXT:    v_mov_b32_e32 v7, v2
; SI-NOHSA-NEXT:    v_mov_b32_e32 v9, v3
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v6, 31, v1
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v4, 31, v0
; SI-NOHSA-NEXT:    v_mov_b32_e32 v3, v0
; SI-NOHSA-NEXT:    v_mov_b32_e32 v5, v1
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[7:10], off, s[0:3], 0 offset:16
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[3:6], off, s[0:3], 0
; SI-NOHSA-NEXT:    s_endpgm
;
; GCNX3-HSA-LABEL: global_sextload_v4i32_to_v4i64:
; GCNX3-HSA:       ; %bb.0:
; GCNX3-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCNX3-HSA-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCNX3-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCNX3-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCNX3-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCNX3-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 16
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v14, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v13, s2
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v12, s1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v11, s0
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v10, 31, v3
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v8, 31, v2
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v7, v2
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v9, v3
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v6, 31, v1
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v4, 31, v0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v3, v0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v5, v1
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[13:14], v[7:10]
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[11:12], v[3:6]
; GCNX3-HSA-NEXT:    s_endpgm
;
; GCNX3-NOHSA-LABEL: global_sextload_v4i32_to_v4i64:
; GCNX3-NOHSA:       ; %bb.0:
; GCNX3-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCNX3-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCNX3-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v0, vcc, s2, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCNX3-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; GCNX3-NOHSA-NEXT:    s_mov_b32 s2, -1
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(0)
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v10, 31, v3
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v8, 31, v2
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v7, v2
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v9, v3
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v6, 31, v1
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v4, 31, v0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v3, v0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v5, v1
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[7:10], off, s[0:3], 0 offset:16
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[3:6], off, s[0:3], 0
; GCNX3-NOHSA-NEXT:    s_endpgm
;
; EG-LABEL: global_sextload_v4i32_to_v4i64:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 0 @6
; EG-NEXT:    ALU 14, @11, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T1.XYZW, T3.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T2.XYZW, T0.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 6:
; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 8:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    4(5.605194e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 11:
; EG-NEXT:     ASHR * T1.W, T0.W, literal.x,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     ASHR T1.Y, T0.Z, literal.x,
; EG-NEXT:     ASHR * T2.W, T0.Y, literal.x,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     MOV T1.X, T0.Z,
; EG-NEXT:     ASHR T2.Y, T0.X, literal.x,
; EG-NEXT:     MOV * T2.X, T0.X,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     LSHR T0.X, KC0[2].Y, literal.x,
; EG-NEXT:     MOV * T2.Z, T0.Y,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T3.X, PV.X, literal.x,
; EG-NEXT:     MOV * T1.Z, T0.W,
; EG-NEXT:    4(5.605194e-45), 0(0.000000e+00)
;
; GCN-HSA-LABEL: global_sextload_v4i32_to_v4i64:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v0, 4, v0
; GCN-HSA-NEXT:    v_mov_b32_e32 v11, 0
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    global_load_dwordx4 v[0:3], v0, s[2:3]
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v10, 31, v3
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v8, 31, v2
; GCN-HSA-NEXT:    v_mov_b32_e32 v7, v2
; GCN-HSA-NEXT:    v_mov_b32_e32 v9, v3
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v6, 31, v1
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v4, 31, v0
; GCN-HSA-NEXT:    v_mov_b32_e32 v3, v0
; GCN-HSA-NEXT:    v_mov_b32_e32 v5, v1
; GCN-HSA-NEXT:    global_store_dwordx4 v11, v[7:10], s[0:1] offset:16
; GCN-HSA-NEXT:    global_store_dwordx4 v11, v[3:6], s[0:1]
; GCN-HSA-NEXT:    s_endpgm
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <4 x i32>, ptr addrspace(1) %in, i32 %tid
  %ld = load <4 x i32>, ptr addrspace(1) %in.tid
  %ext = sext <4 x i32> %ld to <4 x i64>
  store <4 x i64> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_zextload_v8i32_to_v8i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; SI-NOHSA-LABEL: global_zextload_v8i32_to_v8i64:
; SI-NOHSA:       ; %bb.0:
; SI-NOHSA-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; SI-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; SI-NOHSA-NEXT:    s_mov_b32 s10, 0
; SI-NOHSA-NEXT:    s_mov_b32 s11, s3
; SI-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
; SI-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; SI-NOHSA-NEXT:    s_mov_b64 s[8:9], s[6:7]
; SI-NOHSA-NEXT:    v_mov_b32_e32 v1, 0
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[4:7], v[0:1], s[8:11], 0 addr64 offset:16
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[8:11], v[0:1], s[8:11], 0 addr64
; SI-NOHSA-NEXT:    s_mov_b32 s2, -1
; SI-NOHSA-NEXT:    v_mov_b32_e32 v3, v1
; SI-NOHSA-NEXT:    s_mov_b32 s0, s4
; SI-NOHSA-NEXT:    s_mov_b32 s1, s5
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(1)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v6
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v7
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48
; SI-NOHSA-NEXT:    s_waitcnt expcnt(0)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v4
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v5
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(2) expcnt(0)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v10
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v11
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16
; SI-NOHSA-NEXT:    s_waitcnt expcnt(0)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v8
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v9
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; SI-NOHSA-NEXT:    s_endpgm
;
; GCNX3-HSA-LABEL: global_zextload_v8i32_to_v8i64:
; GCNX3-HSA:       ; %bb.0:
; GCNX3-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCNX3-HSA-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
; GCNX3-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCNX3-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCNX3-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCNX3-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-HSA-NEXT:    v_add_i32_e32 v4, vcc, s2, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[0:3], v[4:5]
; GCNX3-HSA-NEXT:    v_add_i32_e32 v4, vcc, 16, v4
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[4:7], v[4:5]
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 16
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v9, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v15, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v14, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 48
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v11, v9
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v13, s1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v12, s0
; GCNX3-HSA-NEXT:    s_add_u32 s0, s0, 32
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v17, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v16, s2
; GCNX3-HSA-NEXT:    s_addc_u32 s1, s1, 0
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(1)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v8, v2
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v10, v3
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[14:15], v[8:11]
; GCNX3-HSA-NEXT:    s_nop 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v8, v0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v10, v1
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[12:13], v[8:11]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(2)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v8, v6
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v10, v7
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[16:17], v[8:11]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v8, v4
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v10, v5
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[0:1], v[8:11]
; GCNX3-HSA-NEXT:    s_endpgm
;
; GCNX3-NOHSA-LABEL: global_zextload_v8i32_to_v8i64:
; GCNX3-NOHSA:       ; %bb.0:
; GCNX3-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCNX3-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v9, 0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v11, v9
; GCNX3-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v4, vcc, s2, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[0:3], v[4:5]
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v4, vcc, 16, v4
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[4:7], v[4:5]
; GCNX3-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; GCNX3-NOHSA-NEXT:    s_mov_b32 s2, -1
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(1)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v8, v2
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v10, v3
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:16
; GCNX3-NOHSA-NEXT:    s_nop 0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v8, v0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v10, v1
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(2)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v8, v6
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v10, v7
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:48
; GCNX3-NOHSA-NEXT:    s_nop 0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v8, v4
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v10, v5
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:32
; GCNX3-NOHSA-NEXT:    s_endpgm
;
; EG-LABEL: global_zextload_v8i32_to_v8i64:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @12, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 1 @8
; EG-NEXT:    ALU 22, @15, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T2.XYZW, T7.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T3.XYZW, T6.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T4.XYZW, T1.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T5.XYZW, T0.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 8:
; EG-NEXT:     VTX_READ_128 T1.XYZW, T0.X, 16, #1
; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 12:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    5(7.006492e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 15:
; EG-NEXT:     MOV T2.X, T1.Z,
; EG-NEXT:     MOV T2.Y, 0.0,
; EG-NEXT:     MOV * T3.X, T1.X,
; EG-NEXT:     MOV * T3.Y, 0.0,
; EG-NEXT:     MOV T4.X, T0.Z,
; EG-NEXT:     MOV T4.Y, 0.0,
; EG-NEXT:     MOV * T5.X, T0.X,
; EG-NEXT:     MOV T5.Y, 0.0,
; EG-NEXT:     MOV T2.Z, T1.W,
; EG-NEXT:     MOV T2.W, 0.0,
; EG-NEXT:     MOV * T3.Z, T1.Y,
; EG-NEXT:     MOV * T3.W, 0.0,
; EG-NEXT:     MOV T4.Z, T0.W,
; EG-NEXT:     MOV T4.W, 0.0,
; EG-NEXT:     MOV * T5.Z, T0.Y,
; EG-NEXT:     MOV * T5.W, 0.0,
; EG-NEXT:     LSHR * T0.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T1.X, PV.X, literal.x,
; EG-NEXT:     ADD_INT * T6.X, PV.X, literal.y,
; EG-NEXT:    4(5.605194e-45), 8(1.121039e-44)
; EG-NEXT:     ADD_INT * T7.X, T0.X, literal.x,
; EG-NEXT:    12(1.681558e-44), 0(0.000000e+00)
;
; GCN-HSA-LABEL: global_zextload_v8i32_to_v8i64:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v8, 5, v0
; GCN-HSA-NEXT:    v_mov_b32_e32 v9, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v11, v9
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    global_load_dwordx4 v[0:3], v8, s[2:3] offset:16
; GCN-HSA-NEXT:    global_load_dwordx4 v[4:7], v8, s[2:3]
; GCN-HSA-NEXT:    s_waitcnt vmcnt(1)
; GCN-HSA-NEXT:    v_mov_b32_e32 v8, v2
; GCN-HSA-NEXT:    v_mov_b32_e32 v10, v3
; GCN-HSA-NEXT:    global_store_dwordx4 v9, v[8:11], s[0:1] offset:48
; GCN-HSA-NEXT:    s_nop 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v8, v0
; GCN-HSA-NEXT:    v_mov_b32_e32 v10, v1
; GCN-HSA-NEXT:    global_store_dwordx4 v9, v[8:11], s[0:1] offset:32
; GCN-HSA-NEXT:    s_waitcnt vmcnt(2)
; GCN-HSA-NEXT:    v_mov_b32_e32 v8, v6
; GCN-HSA-NEXT:    v_mov_b32_e32 v10, v7
; GCN-HSA-NEXT:    global_store_dwordx4 v9, v[8:11], s[0:1] offset:16
; GCN-HSA-NEXT:    s_nop 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v8, v4
; GCN-HSA-NEXT:    v_mov_b32_e32 v10, v5
; GCN-HSA-NEXT:    global_store_dwordx4 v9, v[8:11], s[0:1]
; GCN-HSA-NEXT:    s_endpgm
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <8 x i32>, ptr addrspace(1) %in, i32 %tid
  %ld = load <8 x i32>, ptr addrspace(1) %in.tid
  %ext = zext <8 x i32> %ld to <8 x i64>
  store <8 x i64> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_sextload_v8i32_to_v8i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; SI-NOHSA-LABEL: global_sextload_v8i32_to_v8i64:
; SI-NOHSA:       ; %bb.0:
; SI-NOHSA-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; SI-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; SI-NOHSA-NEXT:    s_mov_b32 s10, 0
; SI-NOHSA-NEXT:    s_mov_b32 s11, s3
; SI-NOHSA-NEXT:    v_lshlrev_b32_e32 v4, 5, v0
; SI-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; SI-NOHSA-NEXT:    s_mov_b64 s[8:9], s[6:7]
; SI-NOHSA-NEXT:    v_mov_b32_e32 v5, 0
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[0:3], v[4:5], s[8:11], 0 addr64
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[4:7], v[4:5], s[8:11], 0 addr64 offset:16
; SI-NOHSA-NEXT:    s_mov_b32 s2, -1
; SI-NOHSA-NEXT:    s_mov_b32 s0, s4
; SI-NOHSA-NEXT:    s_mov_b32 s1, s5
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(1)
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v10, 31, v1
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(0)
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v22, 31, v7
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v20, 31, v6
; SI-NOHSA-NEXT:    v_mov_b32_e32 v19, v6
; SI-NOHSA-NEXT:    v_mov_b32_e32 v21, v7
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v8, 31, v0
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v14, 31, v3
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v12, 31, v2
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v18, 31, v5
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v16, 31, v4
; SI-NOHSA-NEXT:    v_mov_b32_e32 v15, v4
; SI-NOHSA-NEXT:    v_mov_b32_e32 v17, v5
; SI-NOHSA-NEXT:    v_mov_b32_e32 v11, v2
; SI-NOHSA-NEXT:    v_mov_b32_e32 v13, v3
; SI-NOHSA-NEXT:    v_mov_b32_e32 v7, v0
; SI-NOHSA-NEXT:    v_mov_b32_e32 v9, v1
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:48
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[15:18], off, s[0:3], 0 offset:32
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[11:14], off, s[0:3], 0 offset:16
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[7:10], off, s[0:3], 0
; SI-NOHSA-NEXT:    s_endpgm
;
; GCNX3-HSA-LABEL: global_sextload_v8i32_to_v8i64:
; GCNX3-HSA:       ; %bb.0:
; GCNX3-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCNX3-HSA-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
; GCNX3-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCNX3-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCNX3-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCNX3-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-HSA-NEXT:    v_add_i32_e32 v4, vcc, s2, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[0:3], v[4:5]
; GCNX3-HSA-NEXT:    v_add_i32_e32 v4, vcc, 16, v4
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[4:7], v[4:5]
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 16
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v22, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v21, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 48
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v20, s1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v19, s0
; GCNX3-HSA-NEXT:    s_add_u32 s0, s0, 32
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v24, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v23, s2
; GCNX3-HSA-NEXT:    s_addc_u32 s1, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v26, s1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v25, s0
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(1)
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v15, 31, v3
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v13, 31, v2
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v12, v2
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v14, v3
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v11, 31, v1
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v9, 31, v0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v8, v0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v10, v1
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v18, 31, v7
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v16, 31, v6
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[21:22], v[12:15]
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[19:20], v[8:11]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v15, v6
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v17, v7
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v3, 31, v5
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v1, 31, v4
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, v4
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, v5
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[23:24], v[15:18]
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[25:26], v[0:3]
; GCNX3-HSA-NEXT:    s_endpgm
;
; GCNX3-NOHSA-LABEL: global_sextload_v8i32_to_v8i64:
; GCNX3-NOHSA:       ; %bb.0:
; GCNX3-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCNX3-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
; GCNX3-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v4, vcc, s2, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[0:3], v[4:5]
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v4, vcc, 16, v4
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[4:7], v[4:5]
; GCNX3-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; GCNX3-NOHSA-NEXT:    s_mov_b32 s2, -1
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(1)
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v15, 31, v3
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v13, 31, v2
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v12, v2
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v14, v3
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v11, 31, v1
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v9, 31, v0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v8, v0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v10, v1
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(0)
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v18, 31, v7
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v16, 31, v6
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:16
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v15, v6
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v17, v7
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v3, 31, v5
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v1, 31, v4
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v0, v4
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v2, v5
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[15:18], off, s[0:3], 0 offset:48
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32
; GCNX3-NOHSA-NEXT:    s_endpgm
;
; EG-LABEL: global_sextload_v8i32_to_v8i64:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @12, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 1 @8
; EG-NEXT:    ALU 27, @15, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T8.XYZW, T0.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T7.XYZW, T5.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T6.XYZW, T3.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T4.XYZW, T2.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 8:
; EG-NEXT:     VTX_READ_128 T1.XYZW, T0.X, 16, #1
; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 12:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    5(7.006492e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 15:
; EG-NEXT:     LSHR * T2.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T3.X, PV.X, literal.x,
; EG-NEXT:     ASHR T4.W, T0.Y, literal.y,
; EG-NEXT:     ADD_INT * T5.X, PV.X, literal.z,
; EG-NEXT:    4(5.605194e-45), 31(4.344025e-44)
; EG-NEXT:    8(1.121039e-44), 0(0.000000e+00)
; EG-NEXT:     ASHR T4.Y, T0.X, literal.x,
; EG-NEXT:     ASHR * T6.W, T0.W, literal.x,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     MOV T4.X, T0.X,
; EG-NEXT:     ASHR T6.Y, T0.Z, literal.x,
; EG-NEXT:     ASHR T7.W, T1.Y, literal.x,
; EG-NEXT:     MOV * T6.X, T0.Z,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     ASHR T7.Y, T1.X, literal.x,
; EG-NEXT:     MOV T4.Z, T0.Y,
; EG-NEXT:     ASHR * T8.W, T1.W, literal.x,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     MOV T7.X, T1.X,
; EG-NEXT:     ASHR T8.Y, T1.Z, literal.x,
; EG-NEXT:     MOV T6.Z, T0.W,
; EG-NEXT:     MOV * T8.X, T1.Z,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     MOV * T7.Z, T1.Y,
; EG-NEXT:     ADD_INT T0.X, T2.X, literal.x,
; EG-NEXT:     MOV * T8.Z, T1.W,
; EG-NEXT:    12(1.681558e-44), 0(0.000000e+00)
;
; GCN-HSA-LABEL: global_sextload_v8i32_to_v8i64:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v8, 5, v0
; GCN-HSA-NEXT:    v_mov_b32_e32 v23, 0
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    global_load_dwordx4 v[0:3], v8, s[2:3]
; GCN-HSA-NEXT:    global_load_dwordx4 v[4:7], v8, s[2:3] offset:16
; GCN-HSA-NEXT:    s_waitcnt vmcnt(1)
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v10, 31, v1
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v22, 31, v7
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v20, 31, v6
; GCN-HSA-NEXT:    v_mov_b32_e32 v19, v6
; GCN-HSA-NEXT:    v_mov_b32_e32 v21, v7
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v8, 31, v0
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v14, 31, v3
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v12, 31, v2
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v18, 31, v5
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v16, 31, v4
; GCN-HSA-NEXT:    v_mov_b32_e32 v15, v4
; GCN-HSA-NEXT:    v_mov_b32_e32 v17, v5
; GCN-HSA-NEXT:    v_mov_b32_e32 v11, v2
; GCN-HSA-NEXT:    v_mov_b32_e32 v13, v3
; GCN-HSA-NEXT:    v_mov_b32_e32 v7, v0
; GCN-HSA-NEXT:    v_mov_b32_e32 v9, v1
; GCN-HSA-NEXT:    global_store_dwordx4 v23, v[19:22], s[0:1] offset:48
; GCN-HSA-NEXT:    global_store_dwordx4 v23, v[15:18], s[0:1] offset:32
; GCN-HSA-NEXT:    global_store_dwordx4 v23, v[11:14], s[0:1] offset:16
; GCN-HSA-NEXT:    global_store_dwordx4 v23, v[7:10], s[0:1]
; GCN-HSA-NEXT:    s_endpgm
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <8 x i32>, ptr addrspace(1) %in, i32 %tid
  %ld = load <8 x i32>, ptr addrspace(1) %in.tid
  %ext = sext <8 x i32> %ld to <8 x i64>
  store <8 x i64> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_sextload_v16i32_to_v16i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; SI-NOHSA-LABEL: global_sextload_v16i32_to_v16i64:
; SI-NOHSA:       ; %bb.0:
; SI-NOHSA-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; SI-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; SI-NOHSA-NEXT:    s_mov_b32 s10, 0
; SI-NOHSA-NEXT:    s_mov_b32 s11, s3
; SI-NOHSA-NEXT:    v_lshlrev_b32_e32 v12, 6, v0
; SI-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; SI-NOHSA-NEXT:    s_mov_b64 s[8:9], s[6:7]
; SI-NOHSA-NEXT:    v_mov_b32_e32 v13, 0
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[0:3], v[12:13], s[8:11], 0 addr64 offset:48
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[4:7], v[12:13], s[8:11], 0 addr64 offset:32
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[8:11], v[12:13], s[8:11], 0 addr64 offset:16
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[12:15], v[12:13], s[8:11], 0 addr64
; SI-NOHSA-NEXT:    s_mov_b32 s2, -1
; SI-NOHSA-NEXT:    s_mov_b32 s0, s4
; SI-NOHSA-NEXT:    s_mov_b32 s1, s5
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(3)
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v23, 31, v1
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v21, 31, v0
; SI-NOHSA-NEXT:    v_mov_b32_e32 v20, v0
; SI-NOHSA-NEXT:    v_mov_b32_e32 v22, v1
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v19, 31, v3
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v17, 31, v2
; SI-NOHSA-NEXT:    v_mov_b32_e32 v16, v2
; SI-NOHSA-NEXT:    v_mov_b32_e32 v18, v3
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(2)
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v3, 31, v7
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v1, 31, v6
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v27, 31, v5
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v25, 31, v4
; SI-NOHSA-NEXT:    v_mov_b32_e32 v24, v4
; SI-NOHSA-NEXT:    v_mov_b32_e32 v26, v5
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v6
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v7
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(1)
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v7, 31, v11
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v5, 31, v10
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v31, 31, v9
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v29, 31, v8
; SI-NOHSA-NEXT:    v_mov_b32_e32 v28, v8
; SI-NOHSA-NEXT:    v_mov_b32_e32 v30, v9
; SI-NOHSA-NEXT:    v_mov_b32_e32 v4, v10
; SI-NOHSA-NEXT:    v_mov_b32_e32 v6, v11
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(0)
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v11, 31, v15
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v9, 31, v14
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v35, 31, v13
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v33, 31, v12
; SI-NOHSA-NEXT:    v_mov_b32_e32 v32, v12
; SI-NOHSA-NEXT:    v_mov_b32_e32 v34, v13
; SI-NOHSA-NEXT:    v_mov_b32_e32 v8, v14
; SI-NOHSA-NEXT:    v_mov_b32_e32 v10, v15
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:96
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:112
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:64
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:32
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:48
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[32:35], off, s[0:3], 0
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:16
; SI-NOHSA-NEXT:    s_endpgm
;
; GCNX3-HSA-LABEL: global_sextload_v16i32_to_v16i64:
; GCNX3-HSA:       ; %bb.0:
; GCNX3-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCNX3-HSA-NEXT:    v_lshlrev_b32_e32 v0, 6, v0
; GCNX3-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCNX3-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCNX3-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCNX3-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-HSA-NEXT:    v_add_i32_e32 v4, vcc, s2, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, 48, v4
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v5, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[12:15], v[4:5]
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[8:11], v[0:1]
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, 16, v4
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v5, vcc
; GCNX3-HSA-NEXT:    v_add_i32_e32 v4, vcc, 32, v4
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[4:7], v[4:5]
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 16
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v23, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v22, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0x60
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v25, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v24, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0x70
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v27, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v26, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 64
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v29, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v28, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0x50
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v21, s1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v20, s0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v31, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v30, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 32
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    s_add_u32 s0, s0, 48
; GCNX3-HSA-NEXT:    s_addc_u32 s1, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v33, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v32, s2
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v35, s1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v34, s0
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(3)
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v19, 31, v13
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v17, 31, v12
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v16, v12
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v18, v13
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[20:21], v[16:19]
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(3)
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v13, 31, v10
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v19, 31, v15
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v17, 31, v14
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v16, v14
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v18, v15
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[22:23], v[16:19]
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v15, 31, v11
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v19, 31, v9
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v17, 31, v8
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v16, v8
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v18, v9
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v12, v10
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v14, v11
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[24:25], v[16:19]
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[26:27], v[12:15]
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(4)
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v18, 31, v5
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v16, 31, v4
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v15, v4
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v17, v5
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v10, 31, v3
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v8, 31, v2
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v14, 31, v7
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v12, 31, v6
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v11, v6
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v13, v7
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v22, 31, v1
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v20, 31, v0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v19, v0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v21, v1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v7, v2
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v9, v3
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[28:29], v[15:18]
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[30:31], v[11:14]
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[32:33], v[19:22]
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[34:35], v[7:10]
; GCNX3-HSA-NEXT:    s_endpgm
;
; GCNX3-NOHSA-LABEL: global_sextload_v16i32_to_v16i64:
; GCNX3-NOHSA:       ; %bb.0:
; GCNX3-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCNX3-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 6, v0
; GCNX3-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v12, vcc, s2, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v13, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v4, vcc, 32, v12
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v13, vcc
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v8, vcc, 16, v12
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v9, vcc, 0, v13, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[0:3], v[12:13]
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v12, vcc, 48, v12
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v13, vcc, 0, v13, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[12:15], v[12:13]
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[4:7], v[4:5]
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[8:11], v[8:9]
; GCNX3-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; GCNX3-NOHSA-NEXT:    s_mov_b32 s2, -1
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(3)
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v19, 31, v3
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v17, 31, v2
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v23, 31, v1
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v21, 31, v0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v20, v0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v22, v1
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v16, v2
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v18, v3
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(2)
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v30, 31, v13
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v28, 31, v12
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v27, v12
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v29, v13
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(0)
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v3, 31, v11
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v1, 31, v10
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v26, 31, v7
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v24, 31, v6
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[20:23], off, s[0:3], 0
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:16
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v22, 31, v15
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v20, 31, v14
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v19, v14
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v21, v15
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v15, 31, v5
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v13, 31, v4
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v12, v4
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v14, v5
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v23, v6
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v25, v7
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v7, 31, v9
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v5, 31, v8
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v4, v8
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v6, v9
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v0, v10
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v2, v11
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[27:30], off, s[0:3], 0 offset:96
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:112
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:64
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[23:26], off, s[0:3], 0 offset:80
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:32
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48
; GCNX3-NOHSA-NEXT:    s_endpgm
;
; EG-LABEL: global_sextload_v16i32_to_v16i64:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @20, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 3 @12
; EG-NEXT:    ALU 53, @23, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T16.XYZW, T1.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T3.XYZW, T11.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T15.XYZW, T9.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T8.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T14.XYZW, T7.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T13.XYZW, T6.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T12.XYZW, T4.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T10.XYZW, T5.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 12:
; EG-NEXT:     VTX_READ_128 T1.XYZW, T0.X, 48, #1
; EG-NEXT:     VTX_READ_128 T2.XYZW, T0.X, 32, #1
; EG-NEXT:     VTX_READ_128 T3.XYZW, T0.X, 16, #1
; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 20:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    6(8.407791e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 23:
; EG-NEXT:     LSHR * T4.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T5.X, PV.X, literal.x,
; EG-NEXT:     ADD_INT * T6.X, PV.X, literal.y,
; EG-NEXT:    4(5.605194e-45), 12(1.681558e-44)
; EG-NEXT:     ADD_INT T7.X, T4.X, literal.x,
; EG-NEXT:     ADD_INT * T8.X, T4.X, literal.y,
; EG-NEXT:    8(1.121039e-44), 20(2.802597e-44)
; EG-NEXT:     ADD_INT T9.X, T4.X, literal.x,
; EG-NEXT:     ASHR T10.W, T0.W, literal.y,
; EG-NEXT:     ADD_INT * T11.X, T4.X, literal.z,
; EG-NEXT:    16(2.242078e-44), 31(4.344025e-44)
; EG-NEXT:    28(3.923636e-44), 0(0.000000e+00)
; EG-NEXT:     ASHR T10.Y, T0.Z, literal.x,
; EG-NEXT:     ASHR * T12.W, T0.Y, literal.x,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     MOV T10.X, T0.Z,
; EG-NEXT:     ASHR T12.Y, T0.X, literal.x,
; EG-NEXT:     ASHR T13.W, T3.W, literal.x,
; EG-NEXT:     MOV * T12.X, T0.X,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     ASHR T13.Y, T3.Z, literal.x,
; EG-NEXT:     MOV T10.Z, T0.W,
; EG-NEXT:     ASHR * T14.W, T3.Y, literal.x,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     MOV T13.X, T3.Z,
; EG-NEXT:     ASHR T14.Y, T3.X, literal.x,
; EG-NEXT:     MOV T12.Z, T0.Y,
; EG-NEXT:     ASHR T0.W, T2.W, literal.x,
; EG-NEXT:     MOV * T14.X, T3.X,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     ASHR T0.Y, T2.Z, literal.x,
; EG-NEXT:     MOV T13.Z, T3.W,
; EG-NEXT:     ASHR * T15.W, T2.Y, literal.x,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     MOV T0.X, T2.Z,
; EG-NEXT:     ASHR T15.Y, T2.X, literal.x,
; EG-NEXT:     MOV T14.Z, T3.Y,
; EG-NEXT:     ASHR T3.W, T1.W, literal.x,
; EG-NEXT:     MOV * T15.X, T2.X,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     ASHR T3.Y, T1.Z, literal.x,
; EG-NEXT:     MOV T0.Z, T2.W,
; EG-NEXT:     ASHR * T16.W, T1.Y, literal.x,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     MOV T3.X, T1.Z,
; EG-NEXT:     ASHR T16.Y, T1.X, literal.x,
; EG-NEXT:     MOV T15.Z, T2.Y,
; EG-NEXT:     MOV * T16.X, T1.X,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     MOV * T3.Z, T1.W,
; EG-NEXT:     ADD_INT T1.X, T4.X, literal.x,
; EG-NEXT:     MOV * T16.Z, T1.Y,
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
;
; GCN-HSA-LABEL: global_sextload_v16i32_to_v16i64:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v16, 6, v0
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    global_load_dwordx4 v[0:3], v16, s[2:3] offset:32
; GCN-HSA-NEXT:    global_load_dwordx4 v[4:7], v16, s[2:3] offset:48
; GCN-HSA-NEXT:    global_load_dwordx4 v[8:11], v16, s[2:3] offset:16
; GCN-HSA-NEXT:    global_load_dwordx4 v[12:15], v16, s[2:3]
; GCN-HSA-NEXT:    s_waitcnt vmcnt(3)
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v19, 31, v3
; GCN-HSA-NEXT:    s_waitcnt vmcnt(2)
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v27, 31, v5
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v25, 31, v4
; GCN-HSA-NEXT:    v_mov_b32_e32 v24, v4
; GCN-HSA-NEXT:    v_mov_b32_e32 v26, v5
; GCN-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v33, 31, v12
; GCN-HSA-NEXT:    v_mov_b32_e32 v32, v12
; GCN-HSA-NEXT:    v_mov_b32_e32 v12, 0
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v17, 31, v2
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v23, 31, v7
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v21, 31, v6
; GCN-HSA-NEXT:    v_mov_b32_e32 v20, v6
; GCN-HSA-NEXT:    v_mov_b32_e32 v22, v7
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v7, 31, v1
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v5, 31, v0
; GCN-HSA-NEXT:    v_mov_b32_e32 v4, v0
; GCN-HSA-NEXT:    v_mov_b32_e32 v6, v1
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, v2
; GCN-HSA-NEXT:    v_mov_b32_e32 v18, v3
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v3, 31, v11
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v1, 31, v10
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v31, 31, v9
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v29, 31, v8
; GCN-HSA-NEXT:    v_mov_b32_e32 v28, v8
; GCN-HSA-NEXT:    v_mov_b32_e32 v30, v9
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, v10
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, v11
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v11, 31, v15
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v9, 31, v14
; GCN-HSA-NEXT:    v_ashrrev_i32_e32 v35, 31, v13
; GCN-HSA-NEXT:    v_mov_b32_e32 v34, v13
; GCN-HSA-NEXT:    v_mov_b32_e32 v8, v14
; GCN-HSA-NEXT:    v_mov_b32_e32 v10, v15
; GCN-HSA-NEXT:    global_store_dwordx4 v12, v[24:27], s[0:1] offset:96
; GCN-HSA-NEXT:    global_store_dwordx4 v12, v[20:23], s[0:1] offset:112
; GCN-HSA-NEXT:    global_store_dwordx4 v12, v[4:7], s[0:1] offset:64
; GCN-HSA-NEXT:    global_store_dwordx4 v12, v[16:19], s[0:1] offset:80
; GCN-HSA-NEXT:    global_store_dwordx4 v12, v[28:31], s[0:1] offset:32
; GCN-HSA-NEXT:    global_store_dwordx4 v12, v[0:3], s[0:1] offset:48
; GCN-HSA-NEXT:    global_store_dwordx4 v12, v[32:35], s[0:1]
; GCN-HSA-NEXT:    global_store_dwordx4 v12, v[8:11], s[0:1] offset:16
; GCN-HSA-NEXT:    s_endpgm
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <16 x i32>, ptr addrspace(1) %in, i32 %tid
  %ld = load <16 x i32>, ptr addrspace(1) %in.tid
  %ext = sext <16 x i32> %ld to <16 x i64>
  store <16 x i64> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_zextload_v16i32_to_v16i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; SI-NOHSA-LABEL: global_zextload_v16i32_to_v16i64:
; SI-NOHSA:       ; %bb.0:
; SI-NOHSA-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; SI-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; SI-NOHSA-NEXT:    s_mov_b32 s10, 0
; SI-NOHSA-NEXT:    s_mov_b32 s11, s3
; SI-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 6, v0
; SI-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; SI-NOHSA-NEXT:    s_mov_b64 s[8:9], s[6:7]
; SI-NOHSA-NEXT:    v_mov_b32_e32 v1, 0
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[4:7], v[0:1], s[8:11], 0 addr64 offset:48
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[8:11], v[0:1], s[8:11], 0 addr64 offset:32
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[12:15], v[0:1], s[8:11], 0 addr64 offset:16
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[16:19], v[0:1], s[8:11], 0 addr64
; SI-NOHSA-NEXT:    s_mov_b32 s2, -1
; SI-NOHSA-NEXT:    v_mov_b32_e32 v3, v1
; SI-NOHSA-NEXT:    s_mov_b32 s0, s4
; SI-NOHSA-NEXT:    s_mov_b32 s1, s5
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(3)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v4
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v5
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96
; SI-NOHSA-NEXT:    s_waitcnt expcnt(0)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v6
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v7
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(4) expcnt(0)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v8
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v9
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64
; SI-NOHSA-NEXT:    s_waitcnt expcnt(0)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v10
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v11
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(5) expcnt(0)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v12
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v13
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32
; SI-NOHSA-NEXT:    s_waitcnt expcnt(0)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v14
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v15
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(6) expcnt(0)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v16
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v17
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; SI-NOHSA-NEXT:    s_waitcnt expcnt(0)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v18
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v19
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16
; SI-NOHSA-NEXT:    s_endpgm
;
; GCNX3-HSA-LABEL: global_zextload_v16i32_to_v16i64:
; GCNX3-HSA:       ; %bb.0:
; GCNX3-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCNX3-HSA-NEXT:    v_lshlrev_b32_e32 v0, 6, v0
; GCNX3-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCNX3-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCNX3-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCNX3-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[16:19], v[0:1]
; GCNX3-HSA-NEXT:    v_add_i32_e32 v2, vcc, 48, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v3, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[12:15], v[2:3]
; GCNX3-HSA-NEXT:    v_add_i32_e32 v2, vcc, 32, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v3, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[8:11], v[2:3]
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, 16, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[4:7], v[0:1]
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 16
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v23, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v22, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0x60
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v25, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v24, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0x70
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v27, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v26, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 64
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v3, v1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v21, s1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v20, s0
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(3)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, v16
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, v17
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[20:21], v[0:3]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v17, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v16, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0x50
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, v18
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, v19
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[22:23], v[0:3]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v19, s3
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(4)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, v12
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, v13
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v18, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 32
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[24:25], v[0:3]
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, v14
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, v15
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[26:27], v[0:3]
; GCNX3-HSA-NEXT:    s_add_u32 s0, s0, 48
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(5)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, v8
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, v9
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[16:17], v[0:3]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v21, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, v10
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, v11
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v20, s2
; GCNX3-HSA-NEXT:    s_addc_u32 s1, s1, 0
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[18:19], v[0:3]
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(6)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, v4
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, v5
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[20:21], v[0:3]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v5, s1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, v6
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, v7
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v4, s0
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[4:5], v[0:3]
; GCNX3-HSA-NEXT:    s_endpgm
;
; GCNX3-NOHSA-LABEL: global_zextload_v16i32_to_v16i64:
; GCNX3-NOHSA:       ; %bb.0:
; GCNX3-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCNX3-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 6, v0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v17, 0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v19, v17
; GCNX3-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v12, vcc, s2, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v13, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[0:3], v[12:13]
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v4, vcc, 48, v12
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v13, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[4:7], v[4:5]
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v8, vcc, 32, v12
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v9, vcc, 0, v13, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[8:11], v[8:9]
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v12, vcc, 16, v12
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v13, vcc, 0, v13, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[12:15], v[12:13]
; GCNX3-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; GCNX3-NOHSA-NEXT:    s_mov_b32 s2, -1
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(3)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v16, v0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v18, v1
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[16:19], off, s[0:3], 0
; GCNX3-NOHSA-NEXT:    s_nop 0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v16, v2
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v18, v3
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:16
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(4)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v16, v4
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v18, v5
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:96
; GCNX3-NOHSA-NEXT:    s_nop 0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v16, v6
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v18, v7
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:112
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(5)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v16, v8
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v18, v9
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:64
; GCNX3-NOHSA-NEXT:    s_nop 0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v16, v10
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v18, v11
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:80
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(6)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v16, v12
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v18, v13
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:32
; GCNX3-NOHSA-NEXT:    s_nop 0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v16, v14
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v18, v15
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:48
; GCNX3-NOHSA-NEXT:    s_endpgm
;
; EG-LABEL: global_zextload_v16i32_to_v16i64:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @20, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 3 @12
; EG-NEXT:    ALU 44, @23, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T4.XYZW, T15.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T5.XYZW, T14.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T6.XYZW, T13.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T7.XYZW, T12.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T8.XYZW, T3.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T9.XYZW, T2.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T10.XYZW, T0.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T11.XYZW, T1.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 12:
; EG-NEXT:     VTX_READ_128 T1.XYZW, T0.X, 48, #1
; EG-NEXT:     VTX_READ_128 T2.XYZW, T0.X, 0, #1
; EG-NEXT:     VTX_READ_128 T3.XYZW, T0.X, 16, #1
; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 32, #1
; EG-NEXT:    ALU clause starting at 20:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    6(8.407791e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 23:
; EG-NEXT:     MOV T4.X, T1.X,
; EG-NEXT:     MOV T4.Y, 0.0,
; EG-NEXT:     MOV * T5.X, T1.Z,
; EG-NEXT:     MOV * T5.Y, 0.0,
; EG-NEXT:     MOV T6.X, T0.X,
; EG-NEXT:     MOV T6.Y, 0.0,
; EG-NEXT:     MOV * T7.X, T0.Z,
; EG-NEXT:     MOV * T7.Y, 0.0,
; EG-NEXT:     MOV T8.X, T3.X,
; EG-NEXT:     MOV T8.Y, 0.0,
; EG-NEXT:     MOV * T9.X, T3.Z,
; EG-NEXT:     MOV * T9.Y, 0.0,
; EG-NEXT:     MOV T10.X, T2.X,
; EG-NEXT:     MOV T10.Y, 0.0,
; EG-NEXT:     MOV * T11.X, T2.Z,
; EG-NEXT:     MOV T11.Y, 0.0,
; EG-NEXT:     MOV T4.Z, T1.Y,
; EG-NEXT:     MOV T4.W, 0.0,
; EG-NEXT:     MOV * T5.Z, T1.W,
; EG-NEXT:     MOV * T5.W, 0.0,
; EG-NEXT:     MOV T6.Z, T0.Y,
; EG-NEXT:     MOV T6.W, 0.0,
; EG-NEXT:     MOV * T7.Z, T0.W,
; EG-NEXT:     MOV * T7.W, 0.0,
; EG-NEXT:     MOV T8.Z, T3.Y,
; EG-NEXT:     MOV T8.W, 0.0,
; EG-NEXT:     MOV * T9.Z, T3.W,
; EG-NEXT:     MOV * T9.W, 0.0,
; EG-NEXT:     MOV T10.Z, T2.Y,
; EG-NEXT:     MOV T10.W, 0.0,
; EG-NEXT:     MOV * T11.Z, T2.W,
; EG-NEXT:     MOV * T11.W, 0.0,
; EG-NEXT:     LSHR * T0.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T1.X, PV.X, literal.x,
; EG-NEXT:     ADD_INT * T2.X, PV.X, literal.y,
; EG-NEXT:    4(5.605194e-45), 12(1.681558e-44)
; EG-NEXT:     ADD_INT T3.X, T0.X, literal.x,
; EG-NEXT:     ADD_INT * T12.X, T0.X, literal.y,
; EG-NEXT:    8(1.121039e-44), 20(2.802597e-44)
; EG-NEXT:     ADD_INT T13.X, T0.X, literal.x,
; EG-NEXT:     ADD_INT * T14.X, T0.X, literal.y,
; EG-NEXT:    16(2.242078e-44), 28(3.923636e-44)
; EG-NEXT:     ADD_INT * T15.X, T0.X, literal.x,
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
;
; GCN-HSA-LABEL: global_zextload_v16i32_to_v16i64:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v16, 6, v0
; GCN-HSA-NEXT:    v_mov_b32_e32 v17, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v19, v17
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    global_load_dwordx4 v[0:3], v16, s[2:3] offset:48
; GCN-HSA-NEXT:    global_load_dwordx4 v[4:7], v16, s[2:3] offset:32
; GCN-HSA-NEXT:    global_load_dwordx4 v[8:11], v16, s[2:3] offset:16
; GCN-HSA-NEXT:    global_load_dwordx4 v[12:15], v16, s[2:3]
; GCN-HSA-NEXT:    s_waitcnt vmcnt(3)
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, v0
; GCN-HSA-NEXT:    v_mov_b32_e32 v18, v1
; GCN-HSA-NEXT:    global_store_dwordx4 v17, v[16:19], s[0:1] offset:96
; GCN-HSA-NEXT:    s_nop 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, v2
; GCN-HSA-NEXT:    v_mov_b32_e32 v18, v3
; GCN-HSA-NEXT:    global_store_dwordx4 v17, v[16:19], s[0:1] offset:112
; GCN-HSA-NEXT:    s_waitcnt vmcnt(4)
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, v4
; GCN-HSA-NEXT:    v_mov_b32_e32 v18, v5
; GCN-HSA-NEXT:    global_store_dwordx4 v17, v[16:19], s[0:1] offset:64
; GCN-HSA-NEXT:    s_nop 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, v6
; GCN-HSA-NEXT:    v_mov_b32_e32 v18, v7
; GCN-HSA-NEXT:    global_store_dwordx4 v17, v[16:19], s[0:1] offset:80
; GCN-HSA-NEXT:    s_waitcnt vmcnt(5)
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, v8
; GCN-HSA-NEXT:    v_mov_b32_e32 v18, v9
; GCN-HSA-NEXT:    global_store_dwordx4 v17, v[16:19], s[0:1] offset:32
; GCN-HSA-NEXT:    s_nop 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, v10
; GCN-HSA-NEXT:    v_mov_b32_e32 v18, v11
; GCN-HSA-NEXT:    global_store_dwordx4 v17, v[16:19], s[0:1] offset:48
; GCN-HSA-NEXT:    s_waitcnt vmcnt(6)
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, v12
; GCN-HSA-NEXT:    v_mov_b32_e32 v18, v13
; GCN-HSA-NEXT:    global_store_dwordx4 v17, v[16:19], s[0:1]
; GCN-HSA-NEXT:    s_nop 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v16, v14
; GCN-HSA-NEXT:    v_mov_b32_e32 v18, v15
; GCN-HSA-NEXT:    global_store_dwordx4 v17, v[16:19], s[0:1] offset:16
; GCN-HSA-NEXT:    s_endpgm
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <16 x i32>, ptr addrspace(1) %in, i32 %tid
  %ld = load <16 x i32>, ptr addrspace(1) %in.tid
  %ext = zext <16 x i32> %ld to <16 x i64>
  store <16 x i64> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_sextload_v32i32_to_v32i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; SI-NOHSA-LABEL: global_sextload_v32i32_to_v32i64:
; SI-NOHSA:       ; %bb.0:
; SI-NOHSA-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; SI-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; SI-NOHSA-NEXT:    s_mov_b32 s10, 0
; SI-NOHSA-NEXT:    s_mov_b32 s11, s3
; SI-NOHSA-NEXT:    v_lshlrev_b32_e32 v20, 7, v0
; SI-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; SI-NOHSA-NEXT:    s_mov_b64 s[8:9], s[6:7]
; SI-NOHSA-NEXT:    v_mov_b32_e32 v21, 0
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[4:7], v[20:21], s[8:11], 0 addr64 offset:96
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[8:11], v[20:21], s[8:11], 0 addr64 offset:112
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[0:3], v[20:21], s[8:11], 0 addr64 offset:80
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[12:15], v[20:21], s[8:11], 0 addr64 offset:64
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[22:25], v[20:21], s[8:11], 0 addr64 offset:48
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[26:29], v[20:21], s[8:11], 0 addr64 offset:32
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[16:19], v[20:21], s[8:11], 0 addr64
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[30:33], v[20:21], s[8:11], 0 addr64 offset:16
; SI-NOHSA-NEXT:    s_mov_b32 s2, -1
; SI-NOHSA-NEXT:    s_mov_b32 s0, s4
; SI-NOHSA-NEXT:    s_mov_b32 s1, s5
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(7)
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v37, 31, v7
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v35, 31, v6
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(6)
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v41, 31, v11
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v39, 31, v10
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v45, 31, v9
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v43, 31, v8
; SI-NOHSA-NEXT:    v_mov_b32_e32 v42, v8
; SI-NOHSA-NEXT:    v_mov_b32_e32 v44, v9
; SI-NOHSA-NEXT:    v_mov_b32_e32 v38, v10
; SI-NOHSA-NEXT:    v_mov_b32_e32 v40, v11
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v11, 31, v5
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v9, 31, v4
; SI-NOHSA-NEXT:    v_mov_b32_e32 v8, v4
; SI-NOHSA-NEXT:    v_mov_b32_e32 v10, v5
; SI-NOHSA-NEXT:    v_mov_b32_e32 v34, v6
; SI-NOHSA-NEXT:    v_mov_b32_e32 v36, v7
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(3)
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v57, 31, v23
; SI-NOHSA-NEXT:    v_mov_b32_e32 v56, v23
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(2)
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v23, 31, v29
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v7, 31, v3
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v5, 31, v2
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v49, 31, v1
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v47, 31, v0
; SI-NOHSA-NEXT:    v_mov_b32_e32 v46, v0
; SI-NOHSA-NEXT:    v_mov_b32_e32 v48, v1
; SI-NOHSA-NEXT:    v_mov_b32_e32 v4, v2
; SI-NOHSA-NEXT:    v_mov_b32_e32 v6, v3
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v3, 31, v15
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v1, 31, v14
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v53, 31, v13
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v51, 31, v12
; SI-NOHSA-NEXT:    v_mov_b32_e32 v50, v12
; SI-NOHSA-NEXT:    v_mov_b32_e32 v52, v13
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v14
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v15
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v15, 31, v25
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v13, 31, v24
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v55, 31, v22
; SI-NOHSA-NEXT:    v_mov_b32_e32 v54, v22
; SI-NOHSA-NEXT:    v_mov_b32_e32 v12, v24
; SI-NOHSA-NEXT:    v_mov_b32_e32 v14, v25
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v21, 31, v28
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v61, 31, v27
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v59, 31, v26
; SI-NOHSA-NEXT:    v_mov_b32_e32 v58, v26
; SI-NOHSA-NEXT:    v_mov_b32_e32 v60, v27
; SI-NOHSA-NEXT:    v_mov_b32_e32 v20, v28
; SI-NOHSA-NEXT:    v_mov_b32_e32 v22, v29
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(1)
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v26, 31, v19
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v24, 31, v18
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[42:45], off, s[0:3], 0 offset:224
; SI-NOHSA-NEXT:    s_waitcnt expcnt(0)
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v44, 31, v17
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v42, 31, v16
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[38:41], off, s[0:3], 0 offset:240
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(2) expcnt(0)
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v40, 31, v33
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v38, 31, v32
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:192
; SI-NOHSA-NEXT:    s_waitcnt expcnt(0)
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v11, 31, v31
; SI-NOHSA-NEXT:    v_ashrrev_i32_e32 v9, 31, v30
; SI-NOHSA-NEXT:    v_mov_b32_e32 v8, v30
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[34:37], off, s[0:3], 0 offset:208
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[46:49], off, s[0:3], 0 offset:160
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:176
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[50:53], off, s[0:3], 0 offset:128
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:144
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[54:57], off, s[0:3], 0 offset:96
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:112
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[58:61], off, s[0:3], 0 offset:64
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:80
; SI-NOHSA-NEXT:    v_mov_b32_e32 v10, v31
; SI-NOHSA-NEXT:    v_mov_b32_e32 v37, v32
; SI-NOHSA-NEXT:    v_mov_b32_e32 v39, v33
; SI-NOHSA-NEXT:    v_mov_b32_e32 v41, v16
; SI-NOHSA-NEXT:    v_mov_b32_e32 v43, v17
; SI-NOHSA-NEXT:    s_waitcnt expcnt(0)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v23, v18
; SI-NOHSA-NEXT:    v_mov_b32_e32 v25, v19
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:32
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[37:40], off, s[0:3], 0 offset:48
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[41:44], off, s[0:3], 0
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[23:26], off, s[0:3], 0 offset:16
; SI-NOHSA-NEXT:    s_endpgm
;
; GCNX3-HSA-LABEL: global_sextload_v32i32_to_v32i64:
; GCNX3-HSA:       ; %bb.0:
; GCNX3-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCNX3-HSA-NEXT:    v_lshlrev_b32_e32 v0, 7, v0
; GCNX3-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCNX3-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCNX3-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCNX3-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-HSA-NEXT:    v_add_i32_e32 v4, vcc, s2, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[28:31], v[4:5]
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, 0x70, v4
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v5, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[16:19], v[0:1]
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, 0x60, v4
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v5, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[20:23], v[0:1]
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, 0x50, v4
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v5, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[8:11], v[0:1]
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, 16, v4
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v5, vcc
; GCNX3-HSA-NEXT:    v_add_i32_e32 v6, vcc, 64, v4
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v7, vcc, 0, v5, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[24:27], v[6:7]
; GCNX3-HSA-NEXT:    v_add_i32_e32 v6, vcc, 48, v4
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v7, vcc, 0, v5, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[12:15], v[6:7]
; GCNX3-HSA-NEXT:    v_add_i32_e32 v4, vcc, 32, v4
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[4:7], v[4:5]
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 16
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v37, s1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v36, s0
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(7)
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v35, 31, v29
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v33, 31, v28
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v32, v28
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v34, v29
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v29, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v28, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0xe0
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[36:37], v[32:35]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v37, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v36, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0xf0
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v35, 31, v31
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v33, 31, v30
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v32, v30
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v34, v31
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[28:29], v[32:35]
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(8)
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v31, 31, v17
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v33, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v32, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0xc0
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v29, 31, v16
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v28, v16
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v30, v17
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v35, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v34, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0xd0
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[36:37], v[28:31]
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v31, 31, v19
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v29, 31, v18
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v28, v18
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v30, v19
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(8)
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v19, 31, v21
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v17, 31, v20
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v16, v20
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v18, v21
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[34:35], v[16:19]
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[32:33], v[28:31]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v17, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v16, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0xa0
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v31, 31, v23
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v29, 31, v22
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v28, v22
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v30, v23
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[16:17], v[28:31]
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(10)
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v19, 31, v9
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v17, 31, v8
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v16, v8
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v18, v9
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v9, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v8, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0xb0
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[8:9], v[16:19]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v9, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v8, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0x80
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v22, 31, v11
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v20, 31, v10
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v19, v10
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v21, v11
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[8:9], v[19:22]
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(11)
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v11, 31, v25
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v20, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v19, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0x90
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v9, 31, v24
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v8, v24
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v10, v25
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v24, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v23, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0x60
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[19:20], v[8:11]
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v22, 31, v27
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v20, 31, v26
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v19, v26
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v21, v27
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[23:24], v[19:22]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v11, s2
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(12)
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v20, 31, v12
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v19, v12
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v12, s3
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0x70
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v22, 31, v13
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v21, v13
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[11:12], v[19:22]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v12, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v11, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 64
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v26, 31, v15
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v24, 31, v14
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v23, v14
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v25, v15
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[11:12], v[23:26]
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(12)
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v14, 31, v5
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v12, 31, v4
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v11, v4
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v13, v5
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v5, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v4, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0x50
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[4:5], v[11:14]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v5, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v4, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 32
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    s_add_u32 s0, s0, 48
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v10, 31, v1
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v8, 31, v0
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v22, 31, v7
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v21, v7
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v7, v0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v9, v1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-HSA-NEXT:    s_addc_u32 s1, s1, 0
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v18, 31, v3
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v16, 31, v2
; GCNX3-HSA-NEXT:    v_ashrrev_i32_e32 v20, 31, v6
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v19, v6
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[0:1], v[7:10]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v15, v2
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v17, v3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, s0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s1
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[4:5], v[19:22]
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[0:1], v[15:18]
; GCNX3-HSA-NEXT:    s_endpgm
;
; GCNX3-NOHSA-LABEL: global_sextload_v32i32_to_v32i64:
; GCNX3-NOHSA:       ; %bb.0:
; GCNX3-NOHSA-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x24
; GCNX3-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 7, v0
; GCNX3-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; GCNX3-NOHSA-NEXT:    s_mov_b32 s2, -1
; GCNX3-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v1, s7
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v16, vcc, s6, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v17, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[4:7], v[16:17]
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v0, vcc, 0x70, v16
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v17, vcc
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v8, vcc, 0x60, v16
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v9, vcc, 0, v17, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[27:30], v[8:9]
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v8, vcc, 0x50, v16
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v9, vcc, 0, v17, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[19:22], v[8:9]
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v8, vcc, 64, v16
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v9, vcc, 0, v17, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[12:15], v[8:9]
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v8, vcc, 48, v16
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v9, vcc, 0, v17, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[23:26], v[0:1]
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[8:11], v[8:9]
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(5)
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v36, 31, v4
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v35, v4
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v4, vcc, 32, v16
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v38, 31, v5
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v37, v5
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v17, vcc
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v34, 31, v7
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v32, 31, v6
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v31, v6
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v33, v7
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[4:7], v[4:5]
; GCNX3-NOHSA-NEXT:    v_add_u32_e64 v0, s[0:1], 16, v16
; GCNX3-NOHSA-NEXT:    v_addc_u32_e64 v1, s[0:1], 0, v17, s[0:1]
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
; GCNX3-NOHSA-NEXT:    s_mov_b32 s0, s4
; GCNX3-NOHSA-NEXT:    s_mov_b32 s1, s5
; GCNX3-NOHSA-NEXT:    s_nop 1
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[35:38], off, s[0:3], 0
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[31:34], off, s[0:3], 0 offset:16
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(5)
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v38, 31, v24
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v34, 31, v26
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v32, 31, v25
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v36, 31, v23
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v35, v23
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v37, v24
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v31, v25
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v33, v26
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[35:38], off, s[0:3], 0 offset:224
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[31:34], off, s[0:3], 0 offset:240
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v26, 31, v30
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v24, 31, v29
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v34, 31, v28
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v32, 31, v27
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v31, v27
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v33, v28
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v23, v29
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v25, v30
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[31:34], off, s[0:3], 0 offset:192
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[23:26], off, s[0:3], 0 offset:208
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v30, 31, v20
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v26, 31, v22
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v24, 31, v21
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v28, 31, v19
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v27, v19
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v29, v20
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v23, v21
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v25, v22
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v22, 31, v13
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v20, 31, v12
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v19, v12
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v21, v13
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:128
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[27:30], off, s[0:3], 0 offset:160
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[23:26], off, s[0:3], 0 offset:176
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v22, 31, v15
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v20, 31, v14
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v19, v14
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v21, v15
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:144
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(10)
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v18, 31, v3
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v22, 31, v9
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v20, 31, v8
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v19, v8
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v21, v9
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:96
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v9, 31, v6
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v22, 31, v11
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v20, 31, v10
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v19, v10
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v21, v11
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v11, 31, v7
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v8, v6
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v10, v7
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v16, 31, v2
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v14, 31, v1
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v12, 31, v0
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:112
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:80
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v22, 31, v5
; GCNX3-NOHSA-NEXT:    v_ashrrev_i32_e32 v20, 31, v4
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v19, v4
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v21, v5
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v11, v0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v13, v1
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v15, v2
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v17, v3
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[19:22], off, s[0:3], 0 offset:64
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[11:14], off, s[0:3], 0 offset:32
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[15:18], off, s[0:3], 0 offset:48
; GCNX3-NOHSA-NEXT:    s_endpgm
;
; EG-LABEL: global_sextload_v32i32_to_v32i64:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 11, @36, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 7 @20
; EG-NEXT:    ALU 95, @48, KC0[], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T32.XYZW, T7.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T9.XYZW, T23.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T31.XYZW, T21.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T10.XYZW, T20.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T30.XYZW, T19.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T11.XYZW, T18.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T29.XYZW, T17.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T12.XYZW, T16.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T28.XYZW, T15.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T13.XYZW, T14.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T27.XYZW, T6.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T5.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T26.XYZW, T4.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T25.XYZW, T3.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T24.XYZW, T1.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T22.XYZW, T2.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 20:
; EG-NEXT:     VTX_READ_128 T7.XYZW, T0.X, 112, #1
; EG-NEXT:     VTX_READ_128 T8.XYZW, T0.X, 96, #1
; EG-NEXT:     VTX_READ_128 T9.XYZW, T0.X, 80, #1
; EG-NEXT:     VTX_READ_128 T10.XYZW, T0.X, 64, #1
; EG-NEXT:     VTX_READ_128 T11.XYZW, T0.X, 48, #1
; EG-NEXT:     VTX_READ_128 T12.XYZW, T0.X, 32, #1
; EG-NEXT:     VTX_READ_128 T13.XYZW, T0.X, 16, #1
; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 0, #1
; EG-NEXT:    ALU clause starting at 36:
; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T2.X, PV.X, literal.x,
; EG-NEXT:     ADD_INT * T3.X, PV.X, literal.y,
; EG-NEXT:    4(5.605194e-45), 12(1.681558e-44)
; EG-NEXT:     ADD_INT T4.X, T1.X, literal.x,
; EG-NEXT:     ADD_INT * T5.X, T1.X, literal.y,
; EG-NEXT:    8(1.121039e-44), 20(2.802597e-44)
; EG-NEXT:     ADD_INT T6.X, T1.X, literal.x,
; EG-NEXT:     LSHL * T0.W, T0.X, literal.y, BS:VEC_120/SCL_212
; EG-NEXT:    16(2.242078e-44), 7(9.809089e-45)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 48:
; EG-NEXT:     ADD_INT T14.X, T1.X, literal.x,
; EG-NEXT:     ADD_INT * T15.X, T1.X, literal.y,
; EG-NEXT:    28(3.923636e-44), 24(3.363116e-44)
; EG-NEXT:     ADD_INT T16.X, T1.X, literal.x,
; EG-NEXT:     ADD_INT * T17.X, T1.X, literal.y,
; EG-NEXT:    36(5.044674e-44), 32(4.484155e-44)
; EG-NEXT:     ADD_INT T18.X, T1.X, literal.x,
; EG-NEXT:     ADD_INT * T19.X, T1.X, literal.y,
; EG-NEXT:    44(6.165713e-44), 40(5.605194e-44)
; EG-NEXT:     ADD_INT T20.X, T1.X, literal.x,
; EG-NEXT:     ADD_INT * T21.X, T1.X, literal.y,
; EG-NEXT:    52(7.286752e-44), 48(6.726233e-44)
; EG-NEXT:     ASHR * T22.W, T0.W, literal.x,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T23.X, T1.X, literal.x,
; EG-NEXT:     ASHR T22.Y, T0.Z, literal.y,
; EG-NEXT:     ASHR T24.W, T0.Y, literal.y,
; EG-NEXT:     MOV * T22.X, T0.Z,
; EG-NEXT:    60(8.407791e-44), 31(4.344025e-44)
; EG-NEXT:     ASHR T24.Y, T0.X, literal.x,
; EG-NEXT:     ASHR * T25.W, T13.W, literal.x,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     MOV T24.X, T0.X,
; EG-NEXT:     ASHR T25.Y, T13.Z, literal.x,
; EG-NEXT:     MOV T22.Z, T0.W,
; EG-NEXT:     ASHR T26.W, T13.Y, literal.x,
; EG-NEXT:     MOV * T25.X, T13.Z,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     ASHR T26.Y, T13.X, literal.x,
; EG-NEXT:     MOV T24.Z, T0.Y,
; EG-NEXT:     ASHR * T0.W, T12.W, literal.x,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     MOV T26.X, T13.X,
; EG-NEXT:     ASHR T0.Y, T12.Z, literal.x,
; EG-NEXT:     MOV T25.Z, T13.W,
; EG-NEXT:     ASHR T27.W, T12.Y, literal.x,
; EG-NEXT:     MOV * T0.X, T12.Z,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     ASHR T27.Y, T12.X, literal.x,
; EG-NEXT:     MOV T26.Z, T13.Y,
; EG-NEXT:     ASHR * T13.W, T11.W, literal.x,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     MOV T27.X, T12.X,
; EG-NEXT:     ASHR T13.Y, T11.Z, literal.x,
; EG-NEXT:     MOV T0.Z, T12.W,
; EG-NEXT:     ASHR T28.W, T11.Y, literal.x,
; EG-NEXT:     MOV * T13.X, T11.Z,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     ASHR T28.Y, T11.X, literal.x,
; EG-NEXT:     MOV T27.Z, T12.Y,
; EG-NEXT:     ASHR * T12.W, T10.W, literal.x,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     MOV T28.X, T11.X,
; EG-NEXT:     ASHR T12.Y, T10.Z, literal.x,
; EG-NEXT:     MOV T13.Z, T11.W,
; EG-NEXT:     ASHR T29.W, T10.Y, literal.x,
; EG-NEXT:     MOV * T12.X, T10.Z,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     ASHR T29.Y, T10.X, literal.x,
; EG-NEXT:     MOV T28.Z, T11.Y,
; EG-NEXT:     ASHR * T11.W, T9.W, literal.x,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     MOV T29.X, T10.X,
; EG-NEXT:     ASHR T11.Y, T9.Z, literal.x,
; EG-NEXT:     MOV T12.Z, T10.W,
; EG-NEXT:     ASHR T30.W, T9.Y, literal.x,
; EG-NEXT:     MOV * T11.X, T9.Z,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     ASHR T30.Y, T9.X, literal.x,
; EG-NEXT:     MOV T29.Z, T10.Y,
; EG-NEXT:     ASHR * T10.W, T8.W, literal.x,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     MOV T30.X, T9.X,
; EG-NEXT:     ASHR T10.Y, T8.Z, literal.x,
; EG-NEXT:     MOV T11.Z, T9.W,
; EG-NEXT:     ASHR T31.W, T8.Y, literal.x,
; EG-NEXT:     MOV * T10.X, T8.Z,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     ASHR T31.Y, T8.X, literal.x,
; EG-NEXT:     MOV T30.Z, T9.Y,
; EG-NEXT:     ASHR * T9.W, T7.W, literal.x,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     MOV T31.X, T8.X,
; EG-NEXT:     ASHR T9.Y, T7.Z, literal.x,
; EG-NEXT:     MOV T10.Z, T8.W,
; EG-NEXT:     ASHR T32.W, T7.Y, literal.x,
; EG-NEXT:     MOV * T9.X, T7.Z,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     ASHR T32.Y, T7.X, literal.x,
; EG-NEXT:     MOV * T31.Z, T8.Y,
; EG-NEXT:    31(4.344025e-44), 0(0.000000e+00)
; EG-NEXT:     MOV T32.X, T7.X,
; EG-NEXT:     MOV T9.Z, T7.W,
; EG-NEXT:     ADD_INT * T7.X, T1.X, literal.x,
; EG-NEXT:    56(7.847271e-44), 0(0.000000e+00)
; EG-NEXT:     MOV * T32.Z, T7.Y,
;
; GCN-GFX900-HSA-LABEL: global_sextload_v32i32_to_v32i64:
; GCN-GFX900-HSA:       ; %bb.0:
; GCN-GFX900-HSA-NEXT:    s_mov_b64 s[22:23], s[2:3]
; GCN-GFX900-HSA-NEXT:    s_mov_b64 s[20:21], s[0:1]
; GCN-GFX900-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-GFX900-HSA-NEXT:    v_lshlrev_b32_e32 v16, 7, v0
; GCN-GFX900-HSA-NEXT:    s_add_u32 s20, s20, s17
; GCN-GFX900-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-GFX900-HSA-NEXT:    global_load_dwordx4 v[4:7], v16, s[2:3] offset:96
; GCN-GFX900-HSA-NEXT:    global_load_dwordx4 v[8:11], v16, s[2:3] offset:112
; GCN-GFX900-HSA-NEXT:    global_load_dwordx4 v[0:3], v16, s[2:3] offset:80
; GCN-GFX900-HSA-NEXT:    global_load_dwordx4 v[12:15], v16, s[2:3] offset:64
; GCN-GFX900-HSA-NEXT:    global_load_dwordx4 v[17:20], v16, s[2:3] offset:48
; GCN-GFX900-HSA-NEXT:    global_load_dwordx4 v[21:24], v16, s[2:3] offset:32
; GCN-GFX900-HSA-NEXT:    global_load_dwordx4 v[29:32], v16, s[2:3] offset:16
; GCN-GFX900-HSA-NEXT:    global_load_dwordx4 v[25:28], v16, s[2:3]
; GCN-GFX900-HSA-NEXT:    s_addc_u32 s21, s21, 0
; GCN-GFX900-HSA-NEXT:    s_waitcnt vmcnt(0)
; GCN-GFX900-HSA-NEXT:    buffer_store_dword v25, off, s[20:23], 0 ; 4-byte Folded Spill
; GCN-GFX900-HSA-NEXT:    s_nop 0
; GCN-GFX900-HSA-NEXT:    buffer_store_dword v26, off, s[20:23], 0 offset:4 ; 4-byte Folded Spill
; GCN-GFX900-HSA-NEXT:    buffer_store_dword v27, off, s[20:23], 0 offset:8 ; 4-byte Folded Spill
; GCN-GFX900-HSA-NEXT:    buffer_store_dword v28, off, s[20:23], 0 offset:12 ; 4-byte Folded Spill
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v40, 31, v11
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v38, 31, v10
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v44, 31, v9
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v42, 31, v8
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v41, v8
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v43, v9
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v37, v10
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v39, v11
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v52, 31, v13
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v50, 31, v12
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v49, v12
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v51, v13
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v13, 31, v19
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v56, 31, v18
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v55, v18
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v12, v19
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v19, 31, v24
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v18, v24
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v24, 0
; GCN-GFX900-HSA-NEXT:    global_store_dwordx4 v24, v[41:44], s[0:1] offset:224
; GCN-GFX900-HSA-NEXT:    global_store_dwordx4 v24, v[37:40], s[0:1] offset:240
; GCN-GFX900-HSA-NEXT:    buffer_load_dword v37, off, s[20:23], 0 ; 4-byte Folded Reload
; GCN-GFX900-HSA-NEXT:    s_nop 0
; GCN-GFX900-HSA-NEXT:    buffer_load_dword v38, off, s[20:23], 0 offset:4 ; 4-byte Folded Reload
; GCN-GFX900-HSA-NEXT:    buffer_load_dword v39, off, s[20:23], 0 offset:8 ; 4-byte Folded Reload
; GCN-GFX900-HSA-NEXT:    buffer_load_dword v40, off, s[20:23], 0 offset:12 ; 4-byte Folded Reload
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v36, 31, v7
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v34, 31, v6
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v11, 31, v5
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v9, 31, v4
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v8, v4
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v10, v5
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v33, v6
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v35, v7
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v28, 31, v30
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v7, 31, v3
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v5, 31, v2
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v48, 31, v1
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v46, 31, v0
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v45, v0
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v47, v1
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v4, v2
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v6, v3
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v3, 31, v15
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v1, 31, v14
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v0, v14
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v2, v15
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v15, 31, v20
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v54, 31, v17
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v53, v17
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v14, v20
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v17, 31, v23
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v60, 31, v22
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v58, 31, v21
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v57, v21
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v59, v22
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v16, v23
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v23, 31, v32
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v21, 31, v31
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v26, 31, v29
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v25, v29
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v27, v30
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v20, v31
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v22, v32
; GCN-GFX900-HSA-NEXT:    global_store_dwordx4 v24, v[8:11], s[0:1] offset:192
; GCN-GFX900-HSA-NEXT:    global_store_dwordx4 v24, v[33:36], s[0:1] offset:208
; GCN-GFX900-HSA-NEXT:    global_store_dwordx4 v24, v[45:48], s[0:1] offset:160
; GCN-GFX900-HSA-NEXT:    global_store_dwordx4 v24, v[4:7], s[0:1] offset:176
; GCN-GFX900-HSA-NEXT:    global_store_dwordx4 v24, v[49:52], s[0:1] offset:128
; GCN-GFX900-HSA-NEXT:    global_store_dwordx4 v24, v[0:3], s[0:1] offset:144
; GCN-GFX900-HSA-NEXT:    global_store_dwordx4 v24, v[53:56], s[0:1] offset:96
; GCN-GFX900-HSA-NEXT:    global_store_dwordx4 v24, v[12:15], s[0:1] offset:112
; GCN-GFX900-HSA-NEXT:    global_store_dwordx4 v24, v[57:60], s[0:1] offset:64
; GCN-GFX900-HSA-NEXT:    global_store_dwordx4 v24, v[16:19], s[0:1] offset:80
; GCN-GFX900-HSA-NEXT:    global_store_dwordx4 v24, v[25:28], s[0:1] offset:32
; GCN-GFX900-HSA-NEXT:    global_store_dwordx4 v24, v[20:23], s[0:1] offset:48
; GCN-GFX900-HSA-NEXT:    s_waitcnt vmcnt(15)
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v9, 31, v37
; GCN-GFX900-HSA-NEXT:    s_waitcnt vmcnt(14)
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v11, 31, v38
; GCN-GFX900-HSA-NEXT:    s_waitcnt vmcnt(13)
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v29, 31, v39
; GCN-GFX900-HSA-NEXT:    s_waitcnt vmcnt(12)
; GCN-GFX900-HSA-NEXT:    v_ashrrev_i32_e32 v31, 31, v40
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v8, v37
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v10, v38
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v28, v39
; GCN-GFX900-HSA-NEXT:    v_mov_b32_e32 v30, v40
; GCN-GFX900-HSA-NEXT:    global_store_dwordx4 v24, v[8:11], s[0:1]
; GCN-GFX900-HSA-NEXT:    global_store_dwordx4 v24, v[28:31], s[0:1] offset:16
; GCN-GFX900-HSA-NEXT:    s_endpgm
;
; GCN-GFX908-HSA-LABEL: global_sextload_v32i32_to_v32i64:
; GCN-GFX908-HSA:       ; %bb.0:
; GCN-GFX908-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-GFX908-HSA-NEXT:    v_lshlrev_b32_e32 v16, 7, v0
; GCN-GFX908-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-GFX908-HSA-NEXT:    global_load_dwordx4 v[4:7], v16, s[2:3] offset:96
; GCN-GFX908-HSA-NEXT:    global_load_dwordx4 v[8:11], v16, s[2:3] offset:112
; GCN-GFX908-HSA-NEXT:    global_load_dwordx4 v[25:28], v16, s[2:3] offset:80
; GCN-GFX908-HSA-NEXT:    global_load_dwordx4 v[12:15], v16, s[2:3] offset:64
; GCN-GFX908-HSA-NEXT:    global_load_dwordx4 v[17:20], v16, s[2:3] offset:48
; GCN-GFX908-HSA-NEXT:    global_load_dwordx4 v[21:24], v16, s[2:3] offset:32
; GCN-GFX908-HSA-NEXT:    global_load_dwordx4 v[0:3], v16, s[2:3] offset:16
; GCN-GFX908-HSA-NEXT:    s_waitcnt vmcnt(6)
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v32, 31, v7
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v30, 31, v6
; GCN-GFX908-HSA-NEXT:    s_waitcnt vmcnt(5)
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v36, 31, v11
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v34, 31, v10
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v40, 31, v9
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v38, 31, v8
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v37, v8
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v39, v9
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v33, v10
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v35, v11
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v11, 31, v5
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v9, 31, v4
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v8, v4
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v10, v5
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v29, v6
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v31, v7
; GCN-GFX908-HSA-NEXT:    s_waitcnt vmcnt(3)
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v7, 31, v15
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v5, 31, v14
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v48, 31, v13
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v46, 31, v12
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v45, v12
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v47, v13
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v4, v14
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v6, v15
; GCN-GFX908-HSA-NEXT:    s_waitcnt vmcnt(2)
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v15, 31, v20
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v13, 31, v19
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v52, 31, v18
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v50, 31, v17
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v49, v17
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v51, v18
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v12, v19
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v14, v20
; GCN-GFX908-HSA-NEXT:    s_waitcnt vmcnt(1)
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v20, 31, v24
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v18, 31, v23
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v56, 31, v22
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v54, 31, v21
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v53, v21
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v55, v22
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v17, v23
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v19, v24
; GCN-GFX908-HSA-NEXT:    global_load_dwordx4 v[21:24], v16, s[2:3]
; GCN-GFX908-HSA-NEXT:    v_accvgpr_write_b32 a0, v29
; GCN-GFX908-HSA-NEXT:    v_accvgpr_write_b32 a1, v30
; GCN-GFX908-HSA-NEXT:    v_accvgpr_write_b32 a2, v31
; GCN-GFX908-HSA-NEXT:    v_accvgpr_write_b32 a3, v32
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v16, 0
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v32, 31, v28
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v30, 31, v27
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v44, 31, v26
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v42, 31, v25
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v41, v25
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v43, v26
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v29, v27
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v31, v28
; GCN-GFX908-HSA-NEXT:    s_waitcnt vmcnt(1)
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v60, 31, v3
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v58, 31, v2
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v28, 31, v1
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v26, 31, v0
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v25, v0
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v27, v1
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v57, v2
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v59, v3
; GCN-GFX908-HSA-NEXT:    global_store_dwordx4 v16, v[37:40], s[0:1] offset:224
; GCN-GFX908-HSA-NEXT:    global_store_dwordx4 v16, v[33:36], s[0:1] offset:240
; GCN-GFX908-HSA-NEXT:    global_store_dwordx4 v16, v[8:11], s[0:1] offset:192
; GCN-GFX908-HSA-NEXT:    v_accvgpr_read_b32 v36, a3
; GCN-GFX908-HSA-NEXT:    v_accvgpr_read_b32 v35, a2
; GCN-GFX908-HSA-NEXT:    v_accvgpr_read_b32 v34, a1
; GCN-GFX908-HSA-NEXT:    v_accvgpr_read_b32 v33, a0
; GCN-GFX908-HSA-NEXT:    s_nop 1
; GCN-GFX908-HSA-NEXT:    global_store_dwordx4 v16, v[33:36], s[0:1] offset:208
; GCN-GFX908-HSA-NEXT:    global_store_dwordx4 v16, v[41:44], s[0:1] offset:160
; GCN-GFX908-HSA-NEXT:    global_store_dwordx4 v16, v[29:32], s[0:1] offset:176
; GCN-GFX908-HSA-NEXT:    global_store_dwordx4 v16, v[45:48], s[0:1] offset:128
; GCN-GFX908-HSA-NEXT:    global_store_dwordx4 v16, v[4:7], s[0:1] offset:144
; GCN-GFX908-HSA-NEXT:    global_store_dwordx4 v16, v[49:52], s[0:1] offset:96
; GCN-GFX908-HSA-NEXT:    global_store_dwordx4 v16, v[12:15], s[0:1] offset:112
; GCN-GFX908-HSA-NEXT:    global_store_dwordx4 v16, v[53:56], s[0:1] offset:64
; GCN-GFX908-HSA-NEXT:    global_store_dwordx4 v16, v[17:20], s[0:1] offset:80
; GCN-GFX908-HSA-NEXT:    global_store_dwordx4 v16, v[25:28], s[0:1] offset:32
; GCN-GFX908-HSA-NEXT:    global_store_dwordx4 v16, v[57:60], s[0:1] offset:48
; GCN-GFX908-HSA-NEXT:    s_waitcnt vmcnt(14)
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v3, 31, v24
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v1, 31, v23
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v11, 31, v22
; GCN-GFX908-HSA-NEXT:    v_ashrrev_i32_e32 v9, 31, v21
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v8, v21
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v10, v22
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v0, v23
; GCN-GFX908-HSA-NEXT:    v_mov_b32_e32 v2, v24
; GCN-GFX908-HSA-NEXT:    global_store_dwordx4 v16, v[8:11], s[0:1]
; GCN-GFX908-HSA-NEXT:    global_store_dwordx4 v16, v[0:3], s[0:1] offset:16
; GCN-GFX908-HSA-NEXT:    s_endpgm
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <32 x i32>, ptr addrspace(1) %in, i32 %tid
  %ld = load <32 x i32>, ptr addrspace(1) %in.tid
  %ext = sext <32 x i32> %ld to <32 x i64>
  store <32 x i64> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_zextload_v32i32_to_v32i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; SI-NOHSA-LABEL: global_zextload_v32i32_to_v32i64:
; SI-NOHSA:       ; %bb.0:
; SI-NOHSA-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; SI-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; SI-NOHSA-NEXT:    s_mov_b32 s10, 0
; SI-NOHSA-NEXT:    s_mov_b32 s11, s3
; SI-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 7, v0
; SI-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; SI-NOHSA-NEXT:    s_mov_b64 s[8:9], s[6:7]
; SI-NOHSA-NEXT:    v_mov_b32_e32 v1, 0
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[12:15], v[0:1], s[8:11], 0 addr64 offset:112
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[16:19], v[0:1], s[8:11], 0 addr64 offset:96
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[20:23], v[0:1], s[8:11], 0 addr64 offset:80
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[24:27], v[0:1], s[8:11], 0 addr64 offset:64
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[28:31], v[0:1], s[8:11], 0 addr64 offset:48
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[32:35], v[0:1], s[8:11], 0 addr64 offset:32
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[8:11], v[0:1], s[8:11], 0 addr64 offset:16
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[4:7], v[0:1], s[8:11], 0 addr64
; SI-NOHSA-NEXT:    s_mov_b32 s2, -1
; SI-NOHSA-NEXT:    v_mov_b32_e32 v3, v1
; SI-NOHSA-NEXT:    s_mov_b32 s0, s4
; SI-NOHSA-NEXT:    s_mov_b32 s1, s5
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(7)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v12
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v13
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:224
; SI-NOHSA-NEXT:    s_waitcnt expcnt(0)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v14
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v15
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:240
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(8) expcnt(0)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v16
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v17
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:192
; SI-NOHSA-NEXT:    s_waitcnt expcnt(0)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v18
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v19
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:208
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(9) expcnt(0)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v20
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v21
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:160
; SI-NOHSA-NEXT:    s_waitcnt expcnt(0)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v22
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v23
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:176
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(10) expcnt(0)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v24
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v25
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:128
; SI-NOHSA-NEXT:    s_waitcnt expcnt(0)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v26
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v27
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:144
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(11) expcnt(0)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v28
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v29
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96
; SI-NOHSA-NEXT:    s_waitcnt expcnt(0)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v30
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v31
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(12) expcnt(0)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v32
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v33
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64
; SI-NOHSA-NEXT:    s_waitcnt expcnt(0)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v34
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v35
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(13) expcnt(0)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v8
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v9
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32
; SI-NOHSA-NEXT:    s_waitcnt expcnt(0)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v10
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v11
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(14) expcnt(0)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v4
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v5
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; SI-NOHSA-NEXT:    s_waitcnt expcnt(0)
; SI-NOHSA-NEXT:    v_mov_b32_e32 v0, v6
; SI-NOHSA-NEXT:    v_mov_b32_e32 v2, v7
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16
; SI-NOHSA-NEXT:    s_endpgm
;
; GCNX3-HSA-LABEL: global_zextload_v32i32_to_v32i64:
; GCNX3-HSA:       ; %bb.0:
; GCNX3-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCNX3-HSA-NEXT:    v_lshlrev_b32_e32 v0, 7, v0
; GCNX3-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCNX3-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCNX3-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCNX3-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-HSA-NEXT:    v_add_i32_e32 v4, vcc, s2, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[32:35], v[4:5]
; GCNX3-HSA-NEXT:    s_movk_i32 s2, 0x70
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v4
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v5, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[28:31], v[0:1]
; GCNX3-HSA-NEXT:    s_movk_i32 s2, 0x60
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v4
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v5, vcc
; GCNX3-HSA-NEXT:    s_movk_i32 s2, 0x50
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[24:27], v[0:1]
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, s2, v4
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v5, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[20:23], v[0:1]
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, 64, v4
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v5, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[16:19], v[0:1]
; GCNX3-HSA-NEXT:    v_add_i32_e32 v0, vcc, 48, v4
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v1, vcc, 0, v5, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[12:15], v[0:1]
; GCNX3-HSA-NEXT:    v_add_i32_e32 v6, vcc, 16, v4
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v7, vcc, 0, v5, vcc
; GCNX3-HSA-NEXT:    v_add_i32_e32 v8, vcc, 32, v4
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v9, vcc, 0, v5, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[4:7], v[6:7]
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[8:11], v[8:9]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, 0
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 16
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v3, v1
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(7)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, v32
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, v33
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v33, s1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v32, s0
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[32:33], v[0:3]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v33, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v32, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0xe0
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, v34
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, v35
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v35, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v34, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0xf0
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[32:33], v[0:3]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v33, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v32, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0xc0
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(8)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, v28
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, v29
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v29, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v28, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0xd0
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[34:35], v[0:3]
; GCNX3-HSA-NEXT:    s_nop 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, v30
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, v31
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v31, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v30, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0xa0
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v35, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v34, s2
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[32:33], v[0:3]
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0xb0
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(9)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, v24
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, v25
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[28:29], v[0:3]
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, v26
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, v27
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[30:31], v[0:3]
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(10)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, v20
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, v21
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v21, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v20, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0x80
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[34:35], v[0:3]
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, v22
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, v23
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[20:21], v[0:3]
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(11)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, v16
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, v17
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v17, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v16, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0x90
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[16:17], v[0:3]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v17, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v16, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0x60
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, v18
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, v19
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[16:17], v[0:3]
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(12)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, v12
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, v13
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v13, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v12, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0x70
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[12:13], v[0:3]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v13, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v12, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 64
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, v14
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, v15
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[12:13], v[0:3]
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(12)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, v8
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, v9
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v9, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v8, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0x50
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[8:9], v[0:3]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v9, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v8, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 32
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, v10
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, v11
; GCNX3-HSA-NEXT:    s_add_u32 s0, s0, 48
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[8:9], v[0:3]
; GCNX3-HSA-NEXT:    s_addc_u32 s1, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, v4
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, v5
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v5, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v4, s2
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[4:5], v[0:3]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v5, s1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, v6
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, v7
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v4, s0
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[4:5], v[0:3]
; GCNX3-HSA-NEXT:    s_endpgm
;
; GCNX3-NOHSA-LABEL: global_zextload_v32i32_to_v32i64:
; GCNX3-NOHSA:       ; %bb.0:
; GCNX3-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCNX3-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 7, v0
; GCNX3-NOHSA-NEXT:    s_movk_i32 s6, 0x70
; GCNX3-NOHSA-NEXT:    s_movk_i32 s5, 0x60
; GCNX3-NOHSA-NEXT:    s_movk_i32 s4, 0x50
; GCNX3-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v4, vcc, s2, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[10:13], v[4:5]
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v6, vcc, s6, v4
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v7, vcc, 0, v5, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[14:17], v[6:7]
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v6, vcc, s5, v4
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v7, vcc, 0, v5, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[18:21], v[6:7]
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v6, vcc, 16, v4
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v7, vcc, 0, v5, vcc
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v8, vcc, s4, v4
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v9, vcc, 0, v5, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[22:25], v[8:9]
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v8, vcc, 32, v4
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v9, vcc, 0, v5, vcc
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v26, vcc, 64, v4
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v27, vcc, 0, v5, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[26:29], v[26:27]
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v30, vcc, 48, v4
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v31, vcc, 0, v5, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[4:7], v[6:7]
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v1, 0
; GCNX3-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; GCNX3-NOHSA-NEXT:    s_mov_b32 s2, -1
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v3, v1
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(5)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v0, v10
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v2, v11
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[30:33], v[30:31]
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[8:11], v[8:9]
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCNX3-NOHSA-NEXT:    s_nop 0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v0, v12
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v2, v13
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(8)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v0, v14
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v2, v15
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:224
; GCNX3-NOHSA-NEXT:    s_nop 0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v0, v16
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v2, v17
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:240
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(9)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v0, v18
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v2, v19
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:192
; GCNX3-NOHSA-NEXT:    s_nop 0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v0, v20
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v2, v21
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:208
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(10)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v0, v22
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v2, v23
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:160
; GCNX3-NOHSA-NEXT:    s_nop 0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v0, v24
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v2, v25
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:176
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(11)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v0, v26
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v2, v27
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:128
; GCNX3-NOHSA-NEXT:    s_nop 0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v0, v28
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v2, v29
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:144
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(11)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v0, v30
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v2, v31
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96
; GCNX3-NOHSA-NEXT:    s_nop 0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v0, v32
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v2, v33
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:112
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(12)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v0, v8
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v2, v9
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:64
; GCNX3-NOHSA-NEXT:    s_nop 0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v0, v10
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v2, v11
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:80
; GCNX3-NOHSA-NEXT:    s_nop 0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v0, v4
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v2, v5
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:32
; GCNX3-NOHSA-NEXT:    s_nop 0
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v0, v6
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v2, v7
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:48
; GCNX3-NOHSA-NEXT:    s_endpgm
;
; EG-LABEL: global_zextload_v32i32_to_v32i64:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 2, @36, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 7 @20
; EG-NEXT:    ALU 88, @39, KC0[CB0:0-32], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T8.XYZW, T31.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T9.XYZW, T30.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T10.XYZW, T29.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T11.XYZW, T28.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T12.XYZW, T27.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T13.XYZW, T26.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T14.XYZW, T25.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T15.XYZW, T24.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T16.XYZW, T7.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T17.XYZW, T6.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T18.XYZW, T5.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T19.XYZW, T4.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T20.XYZW, T3.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T21.XYZW, T2.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T22.XYZW, T0.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T23.XYZW, T1.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 20:
; EG-NEXT:     VTX_READ_128 T1.XYZW, T0.X, 112, #1
; EG-NEXT:     VTX_READ_128 T2.XYZW, T0.X, 0, #1
; EG-NEXT:     VTX_READ_128 T3.XYZW, T0.X, 16, #1
; EG-NEXT:     VTX_READ_128 T4.XYZW, T0.X, 32, #1
; EG-NEXT:     VTX_READ_128 T5.XYZW, T0.X, 48, #1
; EG-NEXT:     VTX_READ_128 T6.XYZW, T0.X, 64, #1
; EG-NEXT:     VTX_READ_128 T7.XYZW, T0.X, 80, #1
; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 96, #1
; EG-NEXT:    ALU clause starting at 36:
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    7(9.809089e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 39:
; EG-NEXT:     MOV T8.X, T1.X,
; EG-NEXT:     MOV T8.Y, 0.0,
; EG-NEXT:     MOV * T9.X, T1.Z,
; EG-NEXT:     MOV * T9.Y, 0.0,
; EG-NEXT:     MOV T10.X, T0.X,
; EG-NEXT:     MOV T10.Y, 0.0,
; EG-NEXT:     MOV * T11.X, T0.Z,
; EG-NEXT:     MOV * T11.Y, 0.0,
; EG-NEXT:     MOV T12.X, T7.X,
; EG-NEXT:     MOV T12.Y, 0.0,
; EG-NEXT:     MOV * T13.X, T7.Z,
; EG-NEXT:     MOV * T13.Y, 0.0,
; EG-NEXT:     MOV T14.X, T6.X,
; EG-NEXT:     MOV T14.Y, 0.0,
; EG-NEXT:     MOV * T15.X, T6.Z,
; EG-NEXT:     MOV * T15.Y, 0.0,
; EG-NEXT:     MOV T16.X, T5.X,
; EG-NEXT:     MOV T16.Y, 0.0,
; EG-NEXT:     MOV * T17.X, T5.Z,
; EG-NEXT:     MOV * T17.Y, 0.0,
; EG-NEXT:     MOV T18.X, T4.X,
; EG-NEXT:     MOV T18.Y, 0.0,
; EG-NEXT:     MOV * T19.X, T4.Z,
; EG-NEXT:     MOV * T19.Y, 0.0,
; EG-NEXT:     MOV T20.X, T3.X,
; EG-NEXT:     MOV T20.Y, 0.0,
; EG-NEXT:     MOV * T21.X, T3.Z,
; EG-NEXT:     MOV * T21.Y, 0.0,
; EG-NEXT:     MOV T22.X, T2.X,
; EG-NEXT:     MOV T22.Y, 0.0,
; EG-NEXT:     MOV * T23.X, T2.Z,
; EG-NEXT:     MOV T23.Y, 0.0,
; EG-NEXT:     MOV T8.Z, T1.Y,
; EG-NEXT:     MOV T8.W, 0.0,
; EG-NEXT:     MOV * T9.Z, T1.W,
; EG-NEXT:     MOV * T9.W, 0.0,
; EG-NEXT:     MOV T10.Z, T0.Y,
; EG-NEXT:     MOV T10.W, 0.0,
; EG-NEXT:     MOV * T11.Z, T0.W,
; EG-NEXT:     MOV * T11.W, 0.0,
; EG-NEXT:     MOV T12.Z, T7.Y,
; EG-NEXT:     MOV T12.W, 0.0,
; EG-NEXT:     MOV * T13.Z, T7.W,
; EG-NEXT:     MOV * T13.W, 0.0,
; EG-NEXT:     MOV T14.Z, T6.Y,
; EG-NEXT:     MOV T14.W, 0.0,
; EG-NEXT:     MOV * T15.Z, T6.W,
; EG-NEXT:     MOV * T15.W, 0.0,
; EG-NEXT:     MOV T16.Z, T5.Y,
; EG-NEXT:     MOV T16.W, 0.0,
; EG-NEXT:     MOV * T17.Z, T5.W,
; EG-NEXT:     MOV * T17.W, 0.0,
; EG-NEXT:     MOV T18.Z, T4.Y,
; EG-NEXT:     MOV T18.W, 0.0,
; EG-NEXT:     MOV * T19.Z, T4.W,
; EG-NEXT:     MOV * T19.W, 0.0,
; EG-NEXT:     MOV T20.Z, T3.Y,
; EG-NEXT:     MOV T20.W, 0.0,
; EG-NEXT:     MOV * T21.Z, T3.W,
; EG-NEXT:     MOV * T21.W, 0.0,
; EG-NEXT:     MOV T22.Z, T2.Y,
; EG-NEXT:     MOV T22.W, 0.0,
; EG-NEXT:     MOV * T23.Z, T2.W,
; EG-NEXT:     MOV * T23.W, 0.0,
; EG-NEXT:     LSHR * T0.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T1.X, PV.X, literal.x,
; EG-NEXT:     ADD_INT * T2.X, PV.X, literal.y,
; EG-NEXT:    4(5.605194e-45), 12(1.681558e-44)
; EG-NEXT:     ADD_INT T3.X, T0.X, literal.x,
; EG-NEXT:     ADD_INT * T4.X, T0.X, literal.y,
; EG-NEXT:    8(1.121039e-44), 20(2.802597e-44)
; EG-NEXT:     ADD_INT T5.X, T0.X, literal.x,
; EG-NEXT:     ADD_INT * T6.X, T0.X, literal.y,
; EG-NEXT:    16(2.242078e-44), 28(3.923636e-44)
; EG-NEXT:     ADD_INT T7.X, T0.X, literal.x,
; EG-NEXT:     ADD_INT * T24.X, T0.X, literal.y,
; EG-NEXT:    24(3.363116e-44), 36(5.044674e-44)
; EG-NEXT:     ADD_INT T25.X, T0.X, literal.x,
; EG-NEXT:     ADD_INT * T26.X, T0.X, literal.y,
; EG-NEXT:    32(4.484155e-44), 44(6.165713e-44)
; EG-NEXT:     ADD_INT T27.X, T0.X, literal.x,
; EG-NEXT:     ADD_INT * T28.X, T0.X, literal.y,
; EG-NEXT:    40(5.605194e-44), 52(7.286752e-44)
; EG-NEXT:     ADD_INT T29.X, T0.X, literal.x,
; EG-NEXT:     ADD_INT * T30.X, T0.X, literal.y,
; EG-NEXT:    48(6.726233e-44), 60(8.407791e-44)
; EG-NEXT:     ADD_INT * T31.X, T0.X, literal.x,
; EG-NEXT:    56(7.847271e-44), 0(0.000000e+00)
;
; GCN-HSA-LABEL: global_zextload_v32i32_to_v32i64:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v4, 7, v0
; GCN-HSA-NEXT:    v_mov_b32_e32 v1, 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v3, v1
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    global_load_dwordx4 v[10:13], v4, s[2:3] offset:112
; GCN-HSA-NEXT:    global_load_dwordx4 v[14:17], v4, s[2:3] offset:96
; GCN-HSA-NEXT:    global_load_dwordx4 v[18:21], v4, s[2:3] offset:80
; GCN-HSA-NEXT:    global_load_dwordx4 v[22:25], v4, s[2:3] offset:64
; GCN-HSA-NEXT:    global_load_dwordx4 v[26:29], v4, s[2:3] offset:48
; GCN-HSA-NEXT:    global_load_dwordx4 v[30:33], v4, s[2:3] offset:32
; GCN-HSA-NEXT:    s_waitcnt vmcnt(5)
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, v10
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, v11
; GCN-HSA-NEXT:    global_load_dwordx4 v[8:11], v4, s[2:3] offset:16
; GCN-HSA-NEXT:    s_nop 0
; GCN-HSA-NEXT:    global_load_dwordx4 v[4:7], v4, s[2:3]
; GCN-HSA-NEXT:    s_nop 0
; GCN-HSA-NEXT:    global_store_dwordx4 v1, v[0:3], s[0:1] offset:224
; GCN-HSA-NEXT:    s_nop 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, v12
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, v13
; GCN-HSA-NEXT:    global_store_dwordx4 v1, v[0:3], s[0:1] offset:240
; GCN-HSA-NEXT:    s_waitcnt vmcnt(8)
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, v14
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, v15
; GCN-HSA-NEXT:    global_store_dwordx4 v1, v[0:3], s[0:1] offset:192
; GCN-HSA-NEXT:    s_nop 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, v16
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, v17
; GCN-HSA-NEXT:    global_store_dwordx4 v1, v[0:3], s[0:1] offset:208
; GCN-HSA-NEXT:    s_waitcnt vmcnt(9)
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, v18
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, v19
; GCN-HSA-NEXT:    global_store_dwordx4 v1, v[0:3], s[0:1] offset:160
; GCN-HSA-NEXT:    s_nop 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, v20
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, v21
; GCN-HSA-NEXT:    global_store_dwordx4 v1, v[0:3], s[0:1] offset:176
; GCN-HSA-NEXT:    s_waitcnt vmcnt(10)
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, v22
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, v23
; GCN-HSA-NEXT:    global_store_dwordx4 v1, v[0:3], s[0:1] offset:128
; GCN-HSA-NEXT:    s_nop 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, v24
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, v25
; GCN-HSA-NEXT:    global_store_dwordx4 v1, v[0:3], s[0:1] offset:144
; GCN-HSA-NEXT:    s_waitcnt vmcnt(11)
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, v26
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, v27
; GCN-HSA-NEXT:    global_store_dwordx4 v1, v[0:3], s[0:1] offset:96
; GCN-HSA-NEXT:    s_nop 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, v28
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, v29
; GCN-HSA-NEXT:    global_store_dwordx4 v1, v[0:3], s[0:1] offset:112
; GCN-HSA-NEXT:    s_waitcnt vmcnt(12)
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, v30
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, v31
; GCN-HSA-NEXT:    global_store_dwordx4 v1, v[0:3], s[0:1] offset:64
; GCN-HSA-NEXT:    s_nop 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, v32
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, v33
; GCN-HSA-NEXT:    global_store_dwordx4 v1, v[0:3], s[0:1] offset:80
; GCN-HSA-NEXT:    s_waitcnt vmcnt(13)
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, v8
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, v9
; GCN-HSA-NEXT:    global_store_dwordx4 v1, v[0:3], s[0:1] offset:32
; GCN-HSA-NEXT:    s_nop 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, v10
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, v11
; GCN-HSA-NEXT:    global_store_dwordx4 v1, v[0:3], s[0:1] offset:48
; GCN-HSA-NEXT:    s_waitcnt vmcnt(14)
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, v4
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, v5
; GCN-HSA-NEXT:    global_store_dwordx4 v1, v[0:3], s[0:1]
; GCN-HSA-NEXT:    s_nop 0
; GCN-HSA-NEXT:    v_mov_b32_e32 v0, v6
; GCN-HSA-NEXT:    v_mov_b32_e32 v2, v7
; GCN-HSA-NEXT:    global_store_dwordx4 v1, v[0:3], s[0:1] offset:16
; GCN-HSA-NEXT:    s_endpgm
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <32 x i32>, ptr addrspace(1) %in, i32 %tid
  %ld = load <32 x i32>, ptr addrspace(1) %in.tid
  %ext = zext <32 x i32> %ld to <32 x i64>
  store <32 x i64> %ext, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @global_load_v32i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {
; SI-NOHSA-LABEL: global_load_v32i32:
; SI-NOHSA:       ; %bb.0:
; SI-NOHSA-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
; SI-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; SI-NOHSA-NEXT:    s_mov_b32 s10, 0
; SI-NOHSA-NEXT:    s_mov_b32 s11, s3
; SI-NOHSA-NEXT:    v_lshlrev_b32_e32 v28, 7, v0
; SI-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; SI-NOHSA-NEXT:    s_mov_b64 s[8:9], s[6:7]
; SI-NOHSA-NEXT:    v_mov_b32_e32 v29, 0
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[0:3], v[28:29], s[8:11], 0 addr64 offset:96
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[4:7], v[28:29], s[8:11], 0 addr64 offset:112
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[8:11], v[28:29], s[8:11], 0 addr64 offset:64
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[12:15], v[28:29], s[8:11], 0 addr64 offset:80
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[16:19], v[28:29], s[8:11], 0 addr64 offset:32
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[20:23], v[28:29], s[8:11], 0 addr64 offset:48
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[24:27], v[28:29], s[8:11], 0 addr64
; SI-NOHSA-NEXT:    buffer_load_dwordx4 v[28:31], v[28:29], s[8:11], 0 addr64 offset:16
; SI-NOHSA-NEXT:    s_mov_b32 s2, -1
; SI-NOHSA-NEXT:    s_mov_b32 s0, s4
; SI-NOHSA-NEXT:    s_mov_b32 s1, s5
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(7)
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:96
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(7)
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:112
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(7)
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:64
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(7)
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:80
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(7)
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:32
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(7)
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:48
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(7)
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[24:27], off, s[0:3], 0
; SI-NOHSA-NEXT:    s_waitcnt vmcnt(7)
; SI-NOHSA-NEXT:    buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:16
; SI-NOHSA-NEXT:    s_endpgm
;
; GCNX3-HSA-LABEL: global_load_v32i32:
; GCNX3-HSA:       ; %bb.0:
; GCNX3-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCNX3-HSA-NEXT:    v_lshlrev_b32_e32 v0, 7, v0
; GCNX3-HSA-NEXT:    s_add_i32 s12, s12, s17
; GCNX3-HSA-NEXT:    s_mov_b32 flat_scratch_lo, s13
; GCNX3-HSA-NEXT:    s_lshr_b32 flat_scratch_hi, s12, 8
; GCNX3-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-HSA-NEXT:    v_add_i32_e32 v12, vcc, s2, v0
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v13, vcc, 0, v1, vcc
; GCNX3-HSA-NEXT:    s_movk_i32 s3, 0x70
; GCNX3-HSA-NEXT:    v_add_i32_e32 v8, vcc, s3, v12
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v9, vcc, 0, v13, vcc
; GCNX3-HSA-NEXT:    s_movk_i32 s3, 0x60
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[0:3], v[12:13]
; GCNX3-HSA-NEXT:    v_add_i32_e32 v4, vcc, s3, v12
; GCNX3-HSA-NEXT:    s_movk_i32 s2, 0x50
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v13, vcc
; GCNX3-HSA-NEXT:    v_add_i32_e32 v16, vcc, s2, v12
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v17, vcc, 0, v13, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[4:7], v[4:5]
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[8:11], v[8:9]
; GCNX3-HSA-NEXT:    v_add_i32_e32 v14, vcc, 64, v12
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v15, vcc, 0, v13, vcc
; GCNX3-HSA-NEXT:    v_add_i32_e32 v28, vcc, 16, v12
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v29, vcc, 0, v13, vcc
; GCNX3-HSA-NEXT:    v_add_i32_e32 v24, vcc, 48, v12
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v25, vcc, 0, v13, vcc
; GCNX3-HSA-NEXT:    v_add_i32_e32 v20, vcc, 32, v12
; GCNX3-HSA-NEXT:    v_addc_u32_e32 v21, vcc, 0, v13, vcc
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[12:15], v[14:15]
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[16:19], v[16:17]
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[20:23], v[20:21]
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[24:27], v[24:25]
; GCNX3-HSA-NEXT:    flat_load_dwordx4 v[28:31], v[28:29]
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0x60
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v33, s1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v32, s0
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(7)
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[32:33], v[0:3]
; GCNX3-HSA-NEXT:    s_nop 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0x70
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, s2
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v3, s3
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 64
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(7)
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[0:1], v[4:7]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v0, s2
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 0x50
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v5, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v4, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 32
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v7, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v6, s2
; GCNX3-HSA-NEXT:    s_add_u32 s2, s0, 48
; GCNX3-HSA-NEXT:    s_addc_u32 s3, s1, 0
; GCNX3-HSA-NEXT:    s_add_u32 s0, s0, 16
; GCNX3-HSA-NEXT:    s_addc_u32 s1, s1, 0
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(7)
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[2:3], v[8:11]
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v2, s2
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v3, s3
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v9, s1
; GCNX3-HSA-NEXT:    v_mov_b32_e32 v8, s0
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(7)
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[0:1], v[12:15]
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(7)
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[4:5], v[16:19]
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(7)
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[6:7], v[20:23]
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(7)
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[2:3], v[24:27]
; GCNX3-HSA-NEXT:    s_waitcnt vmcnt(7)
; GCNX3-HSA-NEXT:    flat_store_dwordx4 v[8:9], v[28:31]
; GCNX3-HSA-NEXT:    s_endpgm
;
; GCNX3-NOHSA-LABEL: global_load_v32i32:
; GCNX3-NOHSA:       ; %bb.0:
; GCNX3-NOHSA-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x24
; GCNX3-NOHSA-NEXT:    v_lshlrev_b32_e32 v0, 7, v0
; GCNX3-NOHSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCNX3-NOHSA-NEXT:    v_mov_b32_e32 v1, s3
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v4, vcc, s2, v0
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v28, vcc, 16, v4
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v29, vcc, 0, v5, vcc
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v12, vcc, 48, v4
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v13, vcc, 0, v5, vcc
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v8, vcc, 32, v4
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v9, vcc, 0, v5, vcc
; GCNX3-NOHSA-NEXT:    s_movk_i32 s2, 0x50
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v16, vcc, s2, v4
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v17, vcc, 0, v5, vcc
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v6, vcc, 64, v4
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v7, vcc, 0, v5, vcc
; GCNX3-NOHSA-NEXT:    s_movk_i32 s2, 0x70
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v20, vcc, s2, v4
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v21, vcc, 0, v5, vcc
; GCNX3-NOHSA-NEXT:    v_add_u32_e32 v24, vcc, 0x60, v4
; GCNX3-NOHSA-NEXT:    v_addc_u32_e32 v25, vcc, 0, v5, vcc
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[0:3], v[4:5]
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[4:7], v[6:7]
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[8:11], v[8:9]
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[12:15], v[12:13]
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[16:19], v[16:17]
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[20:23], v[20:21]
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[24:27], v[24:25]
; GCNX3-NOHSA-NEXT:    flat_load_dwordx4 v[28:31], v[28:29]
; GCNX3-NOHSA-NEXT:    s_mov_b32 s3, 0xf000
; GCNX3-NOHSA-NEXT:    s_mov_b32 s2, -1
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(7)
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(7)
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:64
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(7)
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:32
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(7)
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:48
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(7)
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:80
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(7)
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[20:23], off, s[0:3], 0 offset:112
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(7)
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[24:27], off, s[0:3], 0 offset:96
; GCNX3-NOHSA-NEXT:    s_waitcnt vmcnt(7)
; GCNX3-NOHSA-NEXT:    buffer_store_dwordx4 v[28:31], off, s[0:3], 0 offset:16
; GCNX3-NOHSA-NEXT:    s_endpgm
;
; EG-LABEL: global_load_v32i32:
; EG:       ; %bb.0:
; EG-NEXT:    ALU 13, @28, KC0[CB0:0-32], KC1[]
; EG-NEXT:    TEX 7 @12
; EG-NEXT:    ALU 1, @42, KC0[], KC1[]
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T8.XYZW, T15.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T9.XYZW, T7.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T10.XYZW, T6.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T11.XYZW, T5.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T12.XYZW, T4.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T13.XYZW, T3.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T14.XYZW, T1.X, 0
; EG-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T2.X, 1
; EG-NEXT:    CF_END
; EG-NEXT:    Fetch clause starting at 12:
; EG-NEXT:     VTX_READ_128 T8.XYZW, T0.X, 96, #1
; EG-NEXT:     VTX_READ_128 T9.XYZW, T0.X, 112, #1
; EG-NEXT:     VTX_READ_128 T10.XYZW, T0.X, 64, #1
; EG-NEXT:     VTX_READ_128 T11.XYZW, T0.X, 80, #1
; EG-NEXT:     VTX_READ_128 T12.XYZW, T0.X, 32, #1
; EG-NEXT:     VTX_READ_128 T13.XYZW, T0.X, 48, #1
; EG-NEXT:     VTX_READ_128 T14.XYZW, T0.X, 0, #1
; EG-NEXT:     VTX_READ_128 T0.XYZW, T0.X, 16, #1
; EG-NEXT:    ALU clause starting at 28:
; EG-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
; EG-NEXT:    2(2.802597e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT T2.X, PV.X, literal.x,
; EG-NEXT:     ADD_INT * T3.X, PV.X, literal.y,
; EG-NEXT:    4(5.605194e-45), 12(1.681558e-44)
; EG-NEXT:     ADD_INT T4.X, T1.X, literal.x,
; EG-NEXT:     ADD_INT * T5.X, T1.X, literal.y,
; EG-NEXT:    8(1.121039e-44), 20(2.802597e-44)
; EG-NEXT:     ADD_INT T6.X, T1.X, literal.x,
; EG-NEXT:     ADD_INT * T7.X, T1.X, literal.y,
; EG-NEXT:    16(2.242078e-44), 28(3.923636e-44)
; EG-NEXT:     LSHL * T0.W, T0.X, literal.x,
; EG-NEXT:    7(9.809089e-45), 0(0.000000e+00)
; EG-NEXT:     ADD_INT * T0.X, KC0[2].Z, PV.W,
; EG-NEXT:    ALU clause starting at 42:
; EG-NEXT:     ADD_INT * T15.X, T1.X, literal.x,
; EG-NEXT:    24(3.363116e-44), 0(0.000000e+00)
;
; GCN-HSA-LABEL: global_load_v32i32:
; GCN-HSA:       ; %bb.0:
; GCN-HSA-NEXT:    s_load_dwordx4 s[0:3], s[8:9], 0x0
; GCN-HSA-NEXT:    v_lshlrev_b32_e32 v28, 7, v0
; GCN-HSA-NEXT:    v_mov_b32_e32 v32, 0
; GCN-HSA-NEXT:    s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT:    global_load_dwordx4 v[0:3], v28, s[2:3] offset:96
; GCN-HSA-NEXT:    global_load_dwordx4 v[4:7], v28, s[2:3] offset:112
; GCN-HSA-NEXT:    global_load_dwordx4 v[8:11], v28, s[2:3] offset:64
; GCN-HSA-NEXT:    global_load_dwordx4 v[12:15], v28, s[2:3] offset:80
; GCN-HSA-NEXT:    global_load_dwordx4 v[16:19], v28, s[2:3] offset:32
; GCN-HSA-NEXT:    global_load_dwordx4 v[20:23], v28, s[2:3] offset:48
; GCN-HSA-NEXT:    global_load_dwordx4 v[24:27], v28, s[2:3]
; GCN-HSA-NEXT:    s_nop 0
; GCN-HSA-NEXT:    global_load_dwordx4 v[28:31], v28, s[2:3] offset:16
; GCN-HSA-NEXT:    s_waitcnt vmcnt(7)
; GCN-HSA-NEXT:    global_store_dwordx4 v32, v[0:3], s[0:1] offset:96
; GCN-HSA-NEXT:    s_waitcnt vmcnt(7)
; GCN-HSA-NEXT:    global_store_dwordx4 v32, v[4:7], s[0:1] offset:112
; GCN-HSA-NEXT:    s_waitcnt vmcnt(7)
; GCN-HSA-NEXT:    global_store_dwordx4 v32, v[8:11], s[0:1] offset:64
; GCN-HSA-NEXT:    s_waitcnt vmcnt(7)
; GCN-HSA-NEXT:    global_store_dwordx4 v32, v[12:15], s[0:1] offset:80
; GCN-HSA-NEXT:    s_waitcnt vmcnt(7)
; GCN-HSA-NEXT:    global_store_dwordx4 v32, v[16:19], s[0:1] offset:32
; GCN-HSA-NEXT:    s_waitcnt vmcnt(7)
; GCN-HSA-NEXT:    global_store_dwordx4 v32, v[20:23], s[0:1] offset:48
; GCN-HSA-NEXT:    s_waitcnt vmcnt(7)
; GCN-HSA-NEXT:    global_store_dwordx4 v32, v[24:27], s[0:1]
; GCN-HSA-NEXT:    s_waitcnt vmcnt(7)
; GCN-HSA-NEXT:    global_store_dwordx4 v32, v[28:31], s[0:1] offset:16
; GCN-HSA-NEXT:    s_endpgm
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %in.tid = getelementptr inbounds <32 x i32>, ptr addrspace(1) %in, i32 %tid
  %ld = load <32 x i32>, ptr addrspace(1) %in.tid
  store <32 x i32> %ld, ptr addrspace(1) %out
  ret void
}

attributes #0 = { nounwind "amdgpu-flat-work-group-size"="1024,1024" }