| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 | |
| ; RUN: llc -mtriple=amdgpu6.00 < %s | FileCheck -allow-deprecated-dag-overlap -enable-var-scope --check-prefixes=SI %s | |
| ; RUN: llc -mtriple=amdgpu8.03 -mattr=-flat-for-global < %s | FileCheck -allow-deprecated-dag-overlap -enable-var-scope --check-prefixes=GFX89,VI %s | |
| ; RUN: llc -mtriple=amdgpu9.00 -mattr=-flat-for-global < %s | FileCheck -allow-deprecated-dag-overlap -enable-var-scope --check-prefixes=GFX89,GFX9 %s | |
| ; RUN: llc -mtriple=amdgpu11.00 -mattr=+real-true16 -mattr=-flat-for-global < %s | FileCheck -allow-deprecated-dag-overlap -enable-var-scope --check-prefixes=GFX11-TRUE16 %s | |
| ; RUN: llc -mtriple=amdgpu11.00 -mattr=-real-true16 -mattr=-flat-for-global < %s | FileCheck -allow-deprecated-dag-overlap -enable-var-scope --check-prefixes=GFX11-FAKE16 %s | |
| define float @fpext_f16_to_f32(half %a) #0 { | |
| ; SI-LABEL: fpext_f16_to_f32: | |
| ; SI: ; %bb.0: | |
| ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) | |
| ; SI-NEXT: v_cvt_f32_f16_e32 v0, v0 | |
| ; SI-NEXT: s_setpc_b64 s[30:31] | |
| ; | |
| ; GFX89-LABEL: fpext_f16_to_f32: | |
| ; GFX89: ; %bb.0: | |
| ; GFX89-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) | |
| ; GFX89-NEXT: v_cvt_f32_f16_e32 v0, v0 | |
| ; GFX89-NEXT: s_setpc_b64 s[30:31] | |
| ; | |
| ; GFX11-TRUE16-LABEL: fpext_f16_to_f32: | |
| ; GFX11-TRUE16: ; %bb.0: | |
| ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) | |
| ; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.l | |
| ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] | |
| ; | |
| ; GFX11-FAKE16-LABEL: fpext_f16_to_f32: | |
| ; GFX11-FAKE16: ; %bb.0: | |
| ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) | |
| ; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, v0 | |
| ; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] | |
| %r.val = fpext half %a to float | |
| ret float %r.val | |
| } | |
| define double @fpext_f16_to_f64(half %a) #0 { | |
| ; SI-LABEL: fpext_f16_to_f64: | |
| ; SI: ; %bb.0: | |
| ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) | |
| ; SI-NEXT: v_cvt_f32_f16_e32 v0, v0 | |
| ; SI-NEXT: v_cvt_f64_f32_e32 v[0:1], v0 | |
| ; SI-NEXT: s_setpc_b64 s[30:31] | |
| ; | |
| ; GFX89-LABEL: fpext_f16_to_f64: | |
| ; GFX89: ; %bb.0: | |
| ; GFX89-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) | |
| ; GFX89-NEXT: v_cvt_f32_f16_e32 v0, v0 | |
| ; GFX89-NEXT: v_cvt_f64_f32_e32 v[0:1], v0 | |
| ; GFX89-NEXT: s_setpc_b64 s[30:31] | |
| ; | |
| ; GFX11-TRUE16-LABEL: fpext_f16_to_f64: | |
| ; GFX11-TRUE16: ; %bb.0: | |
| ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) | |
| ; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.l | |
| ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | |
| ; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[0:1], v0 | |
| ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] | |
| ; | |
| ; GFX11-FAKE16-LABEL: fpext_f16_to_f64: | |
| ; GFX11-FAKE16: ; %bb.0: | |
| ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) | |
| ; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, v0 | |
| ; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | |
| ; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[0:1], v0 | |
| ; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] | |
| %r.val = fpext half %a to double | |
| ret double %r.val | |
| } | |
| define <2 x float> @fpext_v2f16_to_v2f32(<2 x half> %a) #0 { | |
| ; SI-LABEL: fpext_v2f16_to_v2f32: | |
| ; SI: ; %bb.0: | |
| ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) | |
| ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0 | |
| ; SI-NEXT: v_cvt_f32_f16_e32 v0, v0 | |
| ; SI-NEXT: v_cvt_f32_f16_e32 v1, v1 | |
| ; SI-NEXT: s_setpc_b64 s[30:31] | |
| ; | |
| ; GFX89-LABEL: fpext_v2f16_to_v2f32: | |
| ; GFX89: ; %bb.0: | |
| ; GFX89-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) | |
| ; GFX89-NEXT: v_cvt_f32_f16_e32 v2, v0 | |
| ; GFX89-NEXT: v_cvt_f32_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 | |
| ; GFX89-NEXT: v_mov_b32_e32 v0, v2 | |
| ; GFX89-NEXT: s_setpc_b64 s[30:31] | |
| ; | |
| ; GFX11-TRUE16-LABEL: fpext_v2f16_to_v2f32: | |
| ; GFX11-TRUE16: ; %bb.0: | |
| ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) | |
| ; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v2, v0.l | |
| ; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v1, v0.h | |
| ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | |
| ; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, v2 | |
| ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] | |
| ; | |
| ; GFX11-FAKE16-LABEL: fpext_v2f16_to_v2f32: | |
| ; GFX11-FAKE16: ; %bb.0: | |
| ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) | |
| ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0 | |
| ; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, v0 | |
| ; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | |
| ; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v1, v1 | |
| ; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] | |
| %r.val = fpext <2 x half> %a to <2 x float> | |
| ret <2 x float> %r.val | |
| } | |
| define <2 x double> @fpext_v2f16_to_v2f64(<2 x half> %a) { | |
| ; SI-LABEL: fpext_v2f16_to_v2f64: | |
| ; SI: ; %bb.0: | |
| ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) | |
| ; SI-NEXT: v_cvt_f32_f16_e32 v1, v0 | |
| ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0 | |
| ; SI-NEXT: v_cvt_f32_f16_e32 v2, v0 | |
| ; SI-NEXT: v_cvt_f64_f32_e32 v[0:1], v1 | |
| ; SI-NEXT: v_cvt_f64_f32_e32 v[2:3], v2 | |
| ; SI-NEXT: s_setpc_b64 s[30:31] | |
| ; | |
| ; GFX89-LABEL: fpext_v2f16_to_v2f64: | |
| ; GFX89: ; %bb.0: | |
| ; GFX89-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) | |
| ; GFX89-NEXT: v_cvt_f32_f16_e32 v1, v0 | |
| ; GFX89-NEXT: v_cvt_f32_f16_sdwa v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 | |
| ; GFX89-NEXT: v_cvt_f64_f32_e32 v[0:1], v1 | |
| ; GFX89-NEXT: v_cvt_f64_f32_e32 v[2:3], v2 | |
| ; GFX89-NEXT: s_setpc_b64 s[30:31] | |
| ; | |
| ; GFX11-TRUE16-LABEL: fpext_v2f16_to_v2f64: | |
| ; GFX11-TRUE16: ; %bb.0: | |
| ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) | |
| ; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v1, v0.l | |
| ; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v2, v0.h | |
| ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) | |
| ; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[0:1], v1 | |
| ; GFX11-TRUE16-NEXT: v_cvt_f64_f32_e32 v[2:3], v2 | |
| ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] | |
| ; | |
| ; GFX11-FAKE16-LABEL: fpext_v2f16_to_v2f64: | |
| ; GFX11-FAKE16: ; %bb.0: | |
| ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) | |
| ; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0 | |
| ; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, v0 | |
| ; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) | |
| ; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v2, v1 | |
| ; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[0:1], v0 | |
| ; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | |
| ; GFX11-FAKE16-NEXT: v_cvt_f64_f32_e32 v[2:3], v2 | |
| ; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] | |
| %r.val = fpext <2 x half> %a to <2 x double> | |
| ret <2 x double> %r.val | |
| } | |
| define amdgpu_kernel void @s_fneg_fpext_f16_to_f32(ptr addrspace(1) %r, i32 %a) { | |
| ; SI-LABEL: s_fneg_fpext_f16_to_f32: | |
| ; SI: ; %bb.0: ; %entry | |
| ; SI-NEXT: s_load_dword s2, s[4:5], 0xb | |
| ; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9 | |
| ; SI-NEXT: s_mov_b32 s3, 0xf000 | |
| ; SI-NEXT: s_waitcnt lgkmcnt(0) | |
| ; SI-NEXT: v_cvt_f32_f16_e32 v0, s2 | |
| ; SI-NEXT: s_mov_b32 s2, -1 | |
| ; SI-NEXT: buffer_store_dword v0, off, s[0:3], 0 | |
| ; SI-NEXT: s_endpgm | |
| ; | |
| ; GFX89-LABEL: s_fneg_fpext_f16_to_f32: | |
| ; GFX89: ; %bb.0: ; %entry | |
| ; GFX89-NEXT: s_load_dword s2, s[4:5], 0x2c | |
| ; GFX89-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24 | |
| ; GFX89-NEXT: s_mov_b32 s3, 0xf000 | |
| ; GFX89-NEXT: s_waitcnt lgkmcnt(0) | |
| ; GFX89-NEXT: v_cvt_f32_f16_e32 v0, s2 | |
| ; GFX89-NEXT: s_mov_b32 s2, -1 | |
| ; GFX89-NEXT: buffer_store_dword v0, off, s[0:3], 0 | |
| ; GFX89-NEXT: s_endpgm | |
| ; | |
| ; GFX11-TRUE16-LABEL: s_fneg_fpext_f16_to_f32: | |
| ; GFX11-TRUE16: ; %bb.0: ; %entry | |
| ; GFX11-TRUE16-NEXT: s_clause 0x1 | |
| ; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x2c | |
| ; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s3, 0x31016000 | |
| ; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0) | |
| ; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, s2 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s2, -1 | |
| ; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[0:3], 0 | |
| ; GFX11-TRUE16-NEXT: s_endpgm | |
| ; | |
| ; GFX11-FAKE16-LABEL: s_fneg_fpext_f16_to_f32: | |
| ; GFX11-FAKE16: ; %bb.0: ; %entry | |
| ; GFX11-FAKE16-NEXT: s_clause 0x1 | |
| ; GFX11-FAKE16-NEXT: s_load_b32 s2, s[4:5], 0x2c | |
| ; GFX11-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x24 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s3, 0x31016000 | |
| ; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0) | |
| ; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, s2 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s2, -1 | |
| ; GFX11-FAKE16-NEXT: buffer_store_b32 v0, off, s[0:3], 0 | |
| ; GFX11-FAKE16-NEXT: s_endpgm | |
| entry: | |
| %a.trunc = trunc i32 %a to i16 | |
| %a.val = bitcast i16 %a.trunc to half | |
| %r.val = fpext half %a.val to float | |
| store float %r.val, ptr addrspace(1) %r | |
| ret void | |
| } | |
| define float @fneg_fpext_f16_to_f32(half %a) { | |
| ; SI-LABEL: fneg_fpext_f16_to_f32: | |
| ; SI: ; %bb.0: | |
| ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) | |
| ; SI-NEXT: v_cvt_f32_f16_e64 v0, -v0 | |
| ; SI-NEXT: s_setpc_b64 s[30:31] | |
| ; | |
| ; GFX89-LABEL: fneg_fpext_f16_to_f32: | |
| ; GFX89: ; %bb.0: | |
| ; GFX89-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) | |
| ; GFX89-NEXT: v_cvt_f32_f16_e64 v0, -v0 | |
| ; GFX89-NEXT: s_setpc_b64 s[30:31] | |
| ; | |
| ; GFX11-TRUE16-LABEL: fneg_fpext_f16_to_f32: | |
| ; GFX11-TRUE16: ; %bb.0: | |
| ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) | |
| ; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v0, -v0.l | |
| ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] | |
| ; | |
| ; GFX11-FAKE16-LABEL: fneg_fpext_f16_to_f32: | |
| ; GFX11-FAKE16: ; %bb.0: | |
| ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) | |
| ; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e64 v0, -v0 | |
| ; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] | |
| %a.neg = fsub half -0.0, %a | |
| %r.val = fpext half %a.neg to float | |
| ret float %r.val | |
| } | |
| define float @fabs_fpext_f16_to_f32(half %a) { | |
| ; SI-LABEL: fabs_fpext_f16_to_f32: | |
| ; SI: ; %bb.0: | |
| ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) | |
| ; SI-NEXT: v_cvt_f32_f16_e64 v0, |v0| | |
| ; SI-NEXT: s_setpc_b64 s[30:31] | |
| ; | |
| ; GFX89-LABEL: fabs_fpext_f16_to_f32: | |
| ; GFX89: ; %bb.0: | |
| ; GFX89-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) | |
| ; GFX89-NEXT: v_cvt_f32_f16_e64 v0, |v0| | |
| ; GFX89-NEXT: s_setpc_b64 s[30:31] | |
| ; | |
| ; GFX11-TRUE16-LABEL: fabs_fpext_f16_to_f32: | |
| ; GFX11-TRUE16: ; %bb.0: | |
| ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) | |
| ; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v0, |v0.l| | |
| ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] | |
| ; | |
| ; GFX11-FAKE16-LABEL: fabs_fpext_f16_to_f32: | |
| ; GFX11-FAKE16: ; %bb.0: | |
| ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) | |
| ; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e64 v0, |v0| | |
| ; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] | |
| %a.fabs = call half @llvm.fabs.f16(half %a) | |
| %r.val = fpext half %a.fabs to float | |
| ret float %r.val | |
| } | |
| define float @fneg_fabs_fpext_f16_to_f32(half %a) { | |
| ; SI-LABEL: fneg_fabs_fpext_f16_to_f32: | |
| ; SI: ; %bb.0: | |
| ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) | |
| ; SI-NEXT: v_cvt_f32_f16_e64 v0, -|v0| | |
| ; SI-NEXT: s_setpc_b64 s[30:31] | |
| ; | |
| ; GFX89-LABEL: fneg_fabs_fpext_f16_to_f32: | |
| ; GFX89: ; %bb.0: | |
| ; GFX89-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) | |
| ; GFX89-NEXT: v_cvt_f32_f16_e64 v0, -|v0| | |
| ; GFX89-NEXT: s_setpc_b64 s[30:31] | |
| ; | |
| ; GFX11-TRUE16-LABEL: fneg_fabs_fpext_f16_to_f32: | |
| ; GFX11-TRUE16: ; %bb.0: | |
| ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) | |
| ; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v0, -|v0.l| | |
| ; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31] | |
| ; | |
| ; GFX11-FAKE16-LABEL: fneg_fabs_fpext_f16_to_f32: | |
| ; GFX11-FAKE16: ; %bb.0: | |
| ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) | |
| ; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e64 v0, -|v0| | |
| ; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31] | |
| %a.fabs = call half @llvm.fabs.f16(half %a) | |
| %a.fneg.fabs = fsub half -0.0, %a.fabs | |
| %r.val = fpext half %a.fneg.fabs to float | |
| ret float %r.val | |
| } | |
| ; FIXME: Using the source modifier here only wastes code size | |
| define amdgpu_kernel void @fneg_multi_use_fpext_f16_to_f32( | |
| ; SI-LABEL: fneg_multi_use_fpext_f16_to_f32: | |
| ; SI: ; %bb.0: ; %entry | |
| ; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9 | |
| ; SI-NEXT: s_mov_b32 s7, 0xf000 | |
| ; SI-NEXT: s_mov_b32 s6, -1 | |
| ; SI-NEXT: s_mov_b32 s10, s6 | |
| ; SI-NEXT: s_mov_b32 s11, s7 | |
| ; SI-NEXT: s_waitcnt lgkmcnt(0) | |
| ; SI-NEXT: s_mov_b32 s8, s2 | |
| ; SI-NEXT: s_mov_b32 s9, s3 | |
| ; SI-NEXT: buffer_load_ushort v0, off, s[8:11], 0 | |
| ; SI-NEXT: s_mov_b32 s4, s0 | |
| ; SI-NEXT: s_mov_b32 s5, s1 | |
| ; SI-NEXT: s_waitcnt vmcnt(0) | |
| ; SI-NEXT: v_xor_b32_e32 v0, 0xffff8000, v0 | |
| ; SI-NEXT: v_cvt_f32_f16_e32 v1, v0 | |
| ; SI-NEXT: buffer_store_dword v1, off, s[4:7], 0 | |
| ; SI-NEXT: s_waitcnt vmcnt(0) | |
| ; SI-NEXT: buffer_store_short v0, off, s[4:7], 0 | |
| ; SI-NEXT: s_waitcnt vmcnt(0) | |
| ; SI-NEXT: s_endpgm | |
| ; | |
| ; GFX89-LABEL: fneg_multi_use_fpext_f16_to_f32: | |
| ; GFX89: ; %bb.0: ; %entry | |
| ; GFX89-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 | |
| ; GFX89-NEXT: s_mov_b32 s7, 0xf000 | |
| ; GFX89-NEXT: s_mov_b32 s6, -1 | |
| ; GFX89-NEXT: s_mov_b32 s10, s6 | |
| ; GFX89-NEXT: s_mov_b32 s11, s7 | |
| ; GFX89-NEXT: s_waitcnt lgkmcnt(0) | |
| ; GFX89-NEXT: s_mov_b32 s8, s2 | |
| ; GFX89-NEXT: s_mov_b32 s9, s3 | |
| ; GFX89-NEXT: buffer_load_ushort v0, off, s[8:11], 0 | |
| ; GFX89-NEXT: s_mov_b32 s4, s0 | |
| ; GFX89-NEXT: s_mov_b32 s5, s1 | |
| ; GFX89-NEXT: s_waitcnt vmcnt(0) | |
| ; GFX89-NEXT: v_cvt_f32_f16_e64 v1, -v0 | |
| ; GFX89-NEXT: v_xor_b32_e32 v0, 0x8000, v0 | |
| ; GFX89-NEXT: buffer_store_dword v1, off, s[4:7], 0 | |
| ; GFX89-NEXT: s_waitcnt vmcnt(0) | |
| ; GFX89-NEXT: buffer_store_short v0, off, s[4:7], 0 | |
| ; GFX89-NEXT: s_waitcnt vmcnt(0) | |
| ; GFX89-NEXT: s_endpgm | |
| ; | |
| ; GFX11-TRUE16-LABEL: fneg_multi_use_fpext_f16_to_f32: | |
| ; GFX11-TRUE16: ; %bb.0: ; %entry | |
| ; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s6, -1 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s7, 0x31016000 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s10, s6 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s11, s7 | |
| ; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0) | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s8, s2 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s9, s3 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s4, s0 | |
| ; GFX11-TRUE16-NEXT: buffer_load_d16_b16 v0, off, s[8:11], 0 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s5, s1 | |
| ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) | |
| ; GFX11-TRUE16-NEXT: v_xor_b32_e32 v1, 0x8000, v0 | |
| ; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v2, -v0.l | |
| ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | |
| ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.l | |
| ; GFX11-TRUE16-NEXT: buffer_store_b32 v2, off, s[4:7], 0 dlc | |
| ; GFX11-TRUE16-NEXT: s_waitcnt_vscnt null, 0x0 | |
| ; GFX11-TRUE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0 dlc | |
| ; GFX11-TRUE16-NEXT: s_waitcnt_vscnt null, 0x0 | |
| ; GFX11-TRUE16-NEXT: s_endpgm | |
| ; | |
| ; GFX11-FAKE16-LABEL: fneg_multi_use_fpext_f16_to_f32: | |
| ; GFX11-FAKE16: ; %bb.0: ; %entry | |
| ; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s6, -1 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s7, 0x31016000 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s10, s6 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s11, s7 | |
| ; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0) | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s8, s2 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s9, s3 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s4, s0 | |
| ; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[8:11], 0 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s5, s1 | |
| ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) | |
| ; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e64 v1, -v0 | |
| ; GFX11-FAKE16-NEXT: v_xor_b32_e32 v0, 0x8000, v0 | |
| ; GFX11-FAKE16-NEXT: buffer_store_b32 v1, off, s[4:7], 0 dlc | |
| ; GFX11-FAKE16-NEXT: s_waitcnt_vscnt null, 0x0 | |
| ; GFX11-FAKE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0 dlc | |
| ; GFX11-FAKE16-NEXT: s_waitcnt_vscnt null, 0x0 | |
| ; GFX11-FAKE16-NEXT: s_endpgm | |
| ptr addrspace(1) %r, | |
| ptr addrspace(1) %a) { | |
| entry: | |
| %a.val = load half, ptr addrspace(1) %a | |
| %a.neg = fsub half -0.0, %a.val | |
| %r.val = fpext half %a.neg to float | |
| store volatile float %r.val, ptr addrspace(1) %r | |
| store volatile half %a.neg, ptr addrspace(1) poison | |
| ret void | |
| } | |
| define amdgpu_kernel void @fneg_multi_foldable_use_fpext_f16_to_f32( | |
| ; SI-LABEL: fneg_multi_foldable_use_fpext_f16_to_f32: | |
| ; SI: ; %bb.0: ; %entry | |
| ; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9 | |
| ; SI-NEXT: s_mov_b32 s7, 0xf000 | |
| ; SI-NEXT: s_mov_b32 s6, -1 | |
| ; SI-NEXT: s_mov_b32 s10, s6 | |
| ; SI-NEXT: s_mov_b32 s11, s7 | |
| ; SI-NEXT: s_waitcnt lgkmcnt(0) | |
| ; SI-NEXT: s_mov_b32 s8, s2 | |
| ; SI-NEXT: s_mov_b32 s9, s3 | |
| ; SI-NEXT: buffer_load_ushort v0, off, s[8:11], 0 | |
| ; SI-NEXT: s_mov_b32 s4, s0 | |
| ; SI-NEXT: s_mov_b32 s5, s1 | |
| ; SI-NEXT: s_waitcnt vmcnt(0) | |
| ; SI-NEXT: v_cvt_f32_f16_e32 v1, v0 | |
| ; SI-NEXT: v_cvt_f32_f16_e64 v0, -v0 | |
| ; SI-NEXT: v_mul_f32_e32 v1, v0, v1 | |
| ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 | |
| ; SI-NEXT: buffer_store_dword v0, off, s[4:7], 0 | |
| ; SI-NEXT: s_waitcnt vmcnt(0) | |
| ; SI-NEXT: buffer_store_short v1, off, s[4:7], 0 | |
| ; SI-NEXT: s_waitcnt vmcnt(0) | |
| ; SI-NEXT: s_endpgm | |
| ; | |
| ; GFX89-LABEL: fneg_multi_foldable_use_fpext_f16_to_f32: | |
| ; GFX89: ; %bb.0: ; %entry | |
| ; GFX89-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 | |
| ; GFX89-NEXT: s_mov_b32 s7, 0xf000 | |
| ; GFX89-NEXT: s_mov_b32 s6, -1 | |
| ; GFX89-NEXT: s_mov_b32 s10, s6 | |
| ; GFX89-NEXT: s_mov_b32 s11, s7 | |
| ; GFX89-NEXT: s_waitcnt lgkmcnt(0) | |
| ; GFX89-NEXT: s_mov_b32 s8, s2 | |
| ; GFX89-NEXT: s_mov_b32 s9, s3 | |
| ; GFX89-NEXT: buffer_load_ushort v0, off, s[8:11], 0 | |
| ; GFX89-NEXT: s_mov_b32 s4, s0 | |
| ; GFX89-NEXT: s_mov_b32 s5, s1 | |
| ; GFX89-NEXT: s_waitcnt vmcnt(0) | |
| ; GFX89-NEXT: v_cvt_f32_f16_e64 v1, -v0 | |
| ; GFX89-NEXT: v_mul_f16_e64 v0, -v0, v0 | |
| ; GFX89-NEXT: buffer_store_dword v1, off, s[4:7], 0 | |
| ; GFX89-NEXT: s_waitcnt vmcnt(0) | |
| ; GFX89-NEXT: buffer_store_short v0, off, s[4:7], 0 | |
| ; GFX89-NEXT: s_waitcnt vmcnt(0) | |
| ; GFX89-NEXT: s_endpgm | |
| ; | |
| ; GFX11-TRUE16-LABEL: fneg_multi_foldable_use_fpext_f16_to_f32: | |
| ; GFX11-TRUE16: ; %bb.0: ; %entry | |
| ; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s6, -1 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s7, 0x31016000 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s10, s6 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s11, s7 | |
| ; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0) | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s8, s2 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s9, s3 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s4, s0 | |
| ; GFX11-TRUE16-NEXT: buffer_load_d16_b16 v0, off, s[8:11], 0 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s5, s1 | |
| ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) | |
| ; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v1, -v0.l | |
| ; GFX11-TRUE16-NEXT: v_mul_f16_e64 v0.l, -v0.l, v0.l | |
| ; GFX11-TRUE16-NEXT: buffer_store_b32 v1, off, s[4:7], 0 dlc | |
| ; GFX11-TRUE16-NEXT: s_waitcnt_vscnt null, 0x0 | |
| ; GFX11-TRUE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0 dlc | |
| ; GFX11-TRUE16-NEXT: s_waitcnt_vscnt null, 0x0 | |
| ; GFX11-TRUE16-NEXT: s_endpgm | |
| ; | |
| ; GFX11-FAKE16-LABEL: fneg_multi_foldable_use_fpext_f16_to_f32: | |
| ; GFX11-FAKE16: ; %bb.0: ; %entry | |
| ; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s6, -1 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s7, 0x31016000 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s10, s6 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s11, s7 | |
| ; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0) | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s8, s2 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s9, s3 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s4, s0 | |
| ; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[8:11], 0 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s5, s1 | |
| ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) | |
| ; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e64 v1, -v0 | |
| ; GFX11-FAKE16-NEXT: v_mul_f16_e64 v0, -v0, v0 | |
| ; GFX11-FAKE16-NEXT: buffer_store_b32 v1, off, s[4:7], 0 dlc | |
| ; GFX11-FAKE16-NEXT: s_waitcnt_vscnt null, 0x0 | |
| ; GFX11-FAKE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0 dlc | |
| ; GFX11-FAKE16-NEXT: s_waitcnt_vscnt null, 0x0 | |
| ; GFX11-FAKE16-NEXT: s_endpgm | |
| ptr addrspace(1) %r, | |
| ptr addrspace(1) %a) { | |
| entry: | |
| %a.val = load half, ptr addrspace(1) %a | |
| %a.neg = fsub half -0.0, %a.val | |
| %r.val = fpext half %a.neg to float | |
| %mul = fmul half %a.neg, %a.val | |
| store volatile float %r.val, ptr addrspace(1) %r | |
| store volatile half %mul, ptr addrspace(1) poison | |
| ret void | |
| } | |
| define amdgpu_kernel void @fabs_multi_use_fpext_f16_to_f32( | |
| ; SI-LABEL: fabs_multi_use_fpext_f16_to_f32: | |
| ; SI: ; %bb.0: ; %entry | |
| ; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9 | |
| ; SI-NEXT: s_mov_b32 s7, 0xf000 | |
| ; SI-NEXT: s_mov_b32 s6, -1 | |
| ; SI-NEXT: s_mov_b32 s10, s6 | |
| ; SI-NEXT: s_mov_b32 s11, s7 | |
| ; SI-NEXT: s_waitcnt lgkmcnt(0) | |
| ; SI-NEXT: s_mov_b32 s8, s2 | |
| ; SI-NEXT: s_mov_b32 s9, s3 | |
| ; SI-NEXT: buffer_load_ushort v0, off, s[8:11], 0 | |
| ; SI-NEXT: s_mov_b32 s4, s0 | |
| ; SI-NEXT: s_mov_b32 s5, s1 | |
| ; SI-NEXT: s_waitcnt vmcnt(0) | |
| ; SI-NEXT: v_and_b32_e32 v0, 0x7fff, v0 | |
| ; SI-NEXT: v_cvt_f32_f16_e32 v1, v0 | |
| ; SI-NEXT: buffer_store_dword v1, off, s[4:7], 0 | |
| ; SI-NEXT: s_waitcnt vmcnt(0) | |
| ; SI-NEXT: buffer_store_short v0, off, s[4:7], 0 | |
| ; SI-NEXT: s_waitcnt vmcnt(0) | |
| ; SI-NEXT: s_endpgm | |
| ; | |
| ; GFX89-LABEL: fabs_multi_use_fpext_f16_to_f32: | |
| ; GFX89: ; %bb.0: ; %entry | |
| ; GFX89-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 | |
| ; GFX89-NEXT: s_mov_b32 s7, 0xf000 | |
| ; GFX89-NEXT: s_mov_b32 s6, -1 | |
| ; GFX89-NEXT: s_mov_b32 s10, s6 | |
| ; GFX89-NEXT: s_mov_b32 s11, s7 | |
| ; GFX89-NEXT: s_waitcnt lgkmcnt(0) | |
| ; GFX89-NEXT: s_mov_b32 s8, s2 | |
| ; GFX89-NEXT: s_mov_b32 s9, s3 | |
| ; GFX89-NEXT: buffer_load_ushort v0, off, s[8:11], 0 | |
| ; GFX89-NEXT: s_mov_b32 s4, s0 | |
| ; GFX89-NEXT: s_mov_b32 s5, s1 | |
| ; GFX89-NEXT: s_waitcnt vmcnt(0) | |
| ; GFX89-NEXT: v_cvt_f32_f16_e64 v1, |v0| | |
| ; GFX89-NEXT: v_and_b32_e32 v0, 0x7fff, v0 | |
| ; GFX89-NEXT: buffer_store_dword v1, off, s[4:7], 0 | |
| ; GFX89-NEXT: s_waitcnt vmcnt(0) | |
| ; GFX89-NEXT: buffer_store_short v0, off, s[4:7], 0 | |
| ; GFX89-NEXT: s_waitcnt vmcnt(0) | |
| ; GFX89-NEXT: s_endpgm | |
| ; | |
| ; GFX11-TRUE16-LABEL: fabs_multi_use_fpext_f16_to_f32: | |
| ; GFX11-TRUE16: ; %bb.0: ; %entry | |
| ; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s6, -1 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s7, 0x31016000 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s10, s6 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s11, s7 | |
| ; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0) | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s8, s2 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s9, s3 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s4, s0 | |
| ; GFX11-TRUE16-NEXT: buffer_load_d16_b16 v0, off, s[8:11], 0 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s5, s1 | |
| ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) | |
| ; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0x7fff, v0 | |
| ; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v2, |v0.l| | |
| ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | |
| ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.l | |
| ; GFX11-TRUE16-NEXT: buffer_store_b32 v2, off, s[4:7], 0 dlc | |
| ; GFX11-TRUE16-NEXT: s_waitcnt_vscnt null, 0x0 | |
| ; GFX11-TRUE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0 dlc | |
| ; GFX11-TRUE16-NEXT: s_waitcnt_vscnt null, 0x0 | |
| ; GFX11-TRUE16-NEXT: s_endpgm | |
| ; | |
| ; GFX11-FAKE16-LABEL: fabs_multi_use_fpext_f16_to_f32: | |
| ; GFX11-FAKE16: ; %bb.0: ; %entry | |
| ; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s6, -1 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s7, 0x31016000 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s10, s6 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s11, s7 | |
| ; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0) | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s8, s2 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s9, s3 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s4, s0 | |
| ; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[8:11], 0 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s5, s1 | |
| ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) | |
| ; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e64 v1, |v0| | |
| ; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x7fff, v0 | |
| ; GFX11-FAKE16-NEXT: buffer_store_b32 v1, off, s[4:7], 0 dlc | |
| ; GFX11-FAKE16-NEXT: s_waitcnt_vscnt null, 0x0 | |
| ; GFX11-FAKE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0 dlc | |
| ; GFX11-FAKE16-NEXT: s_waitcnt_vscnt null, 0x0 | |
| ; GFX11-FAKE16-NEXT: s_endpgm | |
| ptr addrspace(1) %r, | |
| ptr addrspace(1) %a) { | |
| entry: | |
| %a.val = load half, ptr addrspace(1) %a | |
| %a.fabs = call half @llvm.fabs.f16(half %a.val) | |
| %r.val = fpext half %a.fabs to float | |
| store volatile float %r.val, ptr addrspace(1) %r | |
| store volatile half %a.fabs, ptr addrspace(1) poison | |
| ret void | |
| } | |
| define amdgpu_kernel void @fabs_multi_foldable_use_fpext_f16_to_f32( | |
| ; SI-LABEL: fabs_multi_foldable_use_fpext_f16_to_f32: | |
| ; SI: ; %bb.0: ; %entry | |
| ; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9 | |
| ; SI-NEXT: s_mov_b32 s7, 0xf000 | |
| ; SI-NEXT: s_mov_b32 s6, -1 | |
| ; SI-NEXT: s_mov_b32 s10, s6 | |
| ; SI-NEXT: s_mov_b32 s11, s7 | |
| ; SI-NEXT: s_waitcnt lgkmcnt(0) | |
| ; SI-NEXT: s_mov_b32 s8, s2 | |
| ; SI-NEXT: s_mov_b32 s9, s3 | |
| ; SI-NEXT: buffer_load_ushort v0, off, s[8:11], 0 | |
| ; SI-NEXT: s_mov_b32 s4, s0 | |
| ; SI-NEXT: s_mov_b32 s5, s1 | |
| ; SI-NEXT: s_waitcnt vmcnt(0) | |
| ; SI-NEXT: v_cvt_f32_f16_e64 v1, |v0| | |
| ; SI-NEXT: v_cvt_f32_f16_e32 v0, v0 | |
| ; SI-NEXT: v_mul_f32_e32 v0, v1, v0 | |
| ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 | |
| ; SI-NEXT: buffer_store_dword v1, off, s[4:7], 0 | |
| ; SI-NEXT: s_waitcnt vmcnt(0) | |
| ; SI-NEXT: buffer_store_short v0, off, s[4:7], 0 | |
| ; SI-NEXT: s_waitcnt vmcnt(0) | |
| ; SI-NEXT: s_endpgm | |
| ; | |
| ; GFX89-LABEL: fabs_multi_foldable_use_fpext_f16_to_f32: | |
| ; GFX89: ; %bb.0: ; %entry | |
| ; GFX89-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 | |
| ; GFX89-NEXT: s_mov_b32 s7, 0xf000 | |
| ; GFX89-NEXT: s_mov_b32 s6, -1 | |
| ; GFX89-NEXT: s_mov_b32 s10, s6 | |
| ; GFX89-NEXT: s_mov_b32 s11, s7 | |
| ; GFX89-NEXT: s_waitcnt lgkmcnt(0) | |
| ; GFX89-NEXT: s_mov_b32 s8, s2 | |
| ; GFX89-NEXT: s_mov_b32 s9, s3 | |
| ; GFX89-NEXT: buffer_load_ushort v0, off, s[8:11], 0 | |
| ; GFX89-NEXT: s_mov_b32 s4, s0 | |
| ; GFX89-NEXT: s_mov_b32 s5, s1 | |
| ; GFX89-NEXT: s_waitcnt vmcnt(0) | |
| ; GFX89-NEXT: v_cvt_f32_f16_e64 v1, |v0| | |
| ; GFX89-NEXT: v_mul_f16_e64 v0, |v0|, v0 | |
| ; GFX89-NEXT: buffer_store_dword v1, off, s[4:7], 0 | |
| ; GFX89-NEXT: s_waitcnt vmcnt(0) | |
| ; GFX89-NEXT: buffer_store_short v0, off, s[4:7], 0 | |
| ; GFX89-NEXT: s_waitcnt vmcnt(0) | |
| ; GFX89-NEXT: s_endpgm | |
| ; | |
| ; GFX11-TRUE16-LABEL: fabs_multi_foldable_use_fpext_f16_to_f32: | |
| ; GFX11-TRUE16: ; %bb.0: ; %entry | |
| ; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s6, -1 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s7, 0x31016000 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s10, s6 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s11, s7 | |
| ; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0) | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s8, s2 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s9, s3 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s4, s0 | |
| ; GFX11-TRUE16-NEXT: buffer_load_d16_b16 v0, off, s[8:11], 0 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s5, s1 | |
| ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) | |
| ; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v1, |v0.l| | |
| ; GFX11-TRUE16-NEXT: v_mul_f16_e64 v0.l, |v0.l|, v0.l | |
| ; GFX11-TRUE16-NEXT: buffer_store_b32 v1, off, s[4:7], 0 dlc | |
| ; GFX11-TRUE16-NEXT: s_waitcnt_vscnt null, 0x0 | |
| ; GFX11-TRUE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0 dlc | |
| ; GFX11-TRUE16-NEXT: s_waitcnt_vscnt null, 0x0 | |
| ; GFX11-TRUE16-NEXT: s_endpgm | |
| ; | |
| ; GFX11-FAKE16-LABEL: fabs_multi_foldable_use_fpext_f16_to_f32: | |
| ; GFX11-FAKE16: ; %bb.0: ; %entry | |
| ; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s6, -1 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s7, 0x31016000 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s10, s6 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s11, s7 | |
| ; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0) | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s8, s2 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s9, s3 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s4, s0 | |
| ; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[8:11], 0 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s5, s1 | |
| ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) | |
| ; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e64 v1, |v0| | |
| ; GFX11-FAKE16-NEXT: v_mul_f16_e64 v0, |v0|, v0 | |
| ; GFX11-FAKE16-NEXT: buffer_store_b32 v1, off, s[4:7], 0 dlc | |
| ; GFX11-FAKE16-NEXT: s_waitcnt_vscnt null, 0x0 | |
| ; GFX11-FAKE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0 dlc | |
| ; GFX11-FAKE16-NEXT: s_waitcnt_vscnt null, 0x0 | |
| ; GFX11-FAKE16-NEXT: s_endpgm | |
| ptr addrspace(1) %r, | |
| ptr addrspace(1) %a) { | |
| entry: | |
| %a.val = load half, ptr addrspace(1) %a | |
| %a.fabs = call half @llvm.fabs.f16(half %a.val) | |
| %r.val = fpext half %a.fabs to float | |
| %mul = fmul half %a.fabs, %a.val | |
| store volatile float %r.val, ptr addrspace(1) %r | |
| store volatile half %mul, ptr addrspace(1) poison | |
| ret void | |
| } | |
| define amdgpu_kernel void @fabs_fneg_multi_use_fpext_f16_to_f32( | |
| ; SI-LABEL: fabs_fneg_multi_use_fpext_f16_to_f32: | |
| ; SI: ; %bb.0: ; %entry | |
| ; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9 | |
| ; SI-NEXT: s_mov_b32 s7, 0xf000 | |
| ; SI-NEXT: s_mov_b32 s6, -1 | |
| ; SI-NEXT: s_mov_b32 s10, s6 | |
| ; SI-NEXT: s_mov_b32 s11, s7 | |
| ; SI-NEXT: s_waitcnt lgkmcnt(0) | |
| ; SI-NEXT: s_mov_b32 s8, s2 | |
| ; SI-NEXT: s_mov_b32 s9, s3 | |
| ; SI-NEXT: buffer_load_ushort v0, off, s[8:11], 0 | |
| ; SI-NEXT: s_mov_b32 s4, s0 | |
| ; SI-NEXT: s_mov_b32 s5, s1 | |
| ; SI-NEXT: s_waitcnt vmcnt(0) | |
| ; SI-NEXT: v_or_b32_e32 v0, 0xffff8000, v0 | |
| ; SI-NEXT: v_cvt_f32_f16_e32 v1, v0 | |
| ; SI-NEXT: buffer_store_dword v1, off, s[4:7], 0 | |
| ; SI-NEXT: s_waitcnt vmcnt(0) | |
| ; SI-NEXT: buffer_store_short v0, off, s[4:7], 0 | |
| ; SI-NEXT: s_waitcnt vmcnt(0) | |
| ; SI-NEXT: s_endpgm | |
| ; | |
| ; GFX89-LABEL: fabs_fneg_multi_use_fpext_f16_to_f32: | |
| ; GFX89: ; %bb.0: ; %entry | |
| ; GFX89-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 | |
| ; GFX89-NEXT: s_mov_b32 s7, 0xf000 | |
| ; GFX89-NEXT: s_mov_b32 s6, -1 | |
| ; GFX89-NEXT: s_mov_b32 s10, s6 | |
| ; GFX89-NEXT: s_mov_b32 s11, s7 | |
| ; GFX89-NEXT: s_waitcnt lgkmcnt(0) | |
| ; GFX89-NEXT: s_mov_b32 s8, s2 | |
| ; GFX89-NEXT: s_mov_b32 s9, s3 | |
| ; GFX89-NEXT: buffer_load_ushort v0, off, s[8:11], 0 | |
| ; GFX89-NEXT: s_mov_b32 s4, s0 | |
| ; GFX89-NEXT: s_mov_b32 s5, s1 | |
| ; GFX89-NEXT: s_waitcnt vmcnt(0) | |
| ; GFX89-NEXT: v_cvt_f32_f16_e64 v1, -|v0| | |
| ; GFX89-NEXT: v_or_b32_e32 v0, 0x8000, v0 | |
| ; GFX89-NEXT: buffer_store_dword v1, off, s[4:7], 0 | |
| ; GFX89-NEXT: s_waitcnt vmcnt(0) | |
| ; GFX89-NEXT: buffer_store_short v0, off, s[4:7], 0 | |
| ; GFX89-NEXT: s_waitcnt vmcnt(0) | |
| ; GFX89-NEXT: s_endpgm | |
| ; | |
| ; GFX11-TRUE16-LABEL: fabs_fneg_multi_use_fpext_f16_to_f32: | |
| ; GFX11-TRUE16: ; %bb.0: ; %entry | |
| ; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s6, -1 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s7, 0x31016000 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s10, s6 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s11, s7 | |
| ; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0) | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s8, s2 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s9, s3 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s4, s0 | |
| ; GFX11-TRUE16-NEXT: buffer_load_d16_b16 v0, off, s[8:11], 0 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s5, s1 | |
| ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) | |
| ; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, 0x8000, v0 | |
| ; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v2, -|v0.l| | |
| ; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | |
| ; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.l | |
| ; GFX11-TRUE16-NEXT: buffer_store_b32 v2, off, s[4:7], 0 dlc | |
| ; GFX11-TRUE16-NEXT: s_waitcnt_vscnt null, 0x0 | |
| ; GFX11-TRUE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0 dlc | |
| ; GFX11-TRUE16-NEXT: s_waitcnt_vscnt null, 0x0 | |
| ; GFX11-TRUE16-NEXT: s_endpgm | |
| ; | |
| ; GFX11-FAKE16-LABEL: fabs_fneg_multi_use_fpext_f16_to_f32: | |
| ; GFX11-FAKE16: ; %bb.0: ; %entry | |
| ; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s6, -1 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s7, 0x31016000 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s10, s6 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s11, s7 | |
| ; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0) | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s8, s2 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s9, s3 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s4, s0 | |
| ; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[8:11], 0 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s5, s1 | |
| ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) | |
| ; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e64 v1, -|v0| | |
| ; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, 0x8000, v0 | |
| ; GFX11-FAKE16-NEXT: buffer_store_b32 v1, off, s[4:7], 0 dlc | |
| ; GFX11-FAKE16-NEXT: s_waitcnt_vscnt null, 0x0 | |
| ; GFX11-FAKE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0 dlc | |
| ; GFX11-FAKE16-NEXT: s_waitcnt_vscnt null, 0x0 | |
| ; GFX11-FAKE16-NEXT: s_endpgm | |
| ptr addrspace(1) %r, | |
| ptr addrspace(1) %a) { | |
| entry: | |
| %a.val = load half, ptr addrspace(1) %a | |
| %a.fabs = call half @llvm.fabs.f16(half %a.val) | |
| %a.fneg.fabs = fsub half -0.0, %a.fabs | |
| %r.val = fpext half %a.fneg.fabs to float | |
| store volatile float %r.val, ptr addrspace(1) %r | |
| store volatile half %a.fneg.fabs, ptr addrspace(1) poison | |
| ret void | |
| } | |
| define amdgpu_kernel void @fabs_fneg_multi_foldable_use_fpext_f16_to_f32( | |
| ; SI-LABEL: fabs_fneg_multi_foldable_use_fpext_f16_to_f32: | |
| ; SI: ; %bb.0: ; %entry | |
| ; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9 | |
| ; SI-NEXT: s_mov_b32 s7, 0xf000 | |
| ; SI-NEXT: s_mov_b32 s6, -1 | |
| ; SI-NEXT: s_mov_b32 s10, s6 | |
| ; SI-NEXT: s_mov_b32 s11, s7 | |
| ; SI-NEXT: s_waitcnt lgkmcnt(0) | |
| ; SI-NEXT: s_mov_b32 s8, s2 | |
| ; SI-NEXT: s_mov_b32 s9, s3 | |
| ; SI-NEXT: buffer_load_ushort v0, off, s[8:11], 0 | |
| ; SI-NEXT: s_mov_b32 s4, s0 | |
| ; SI-NEXT: s_mov_b32 s5, s1 | |
| ; SI-NEXT: s_waitcnt vmcnt(0) | |
| ; SI-NEXT: v_cvt_f32_f16_e32 v1, v0 | |
| ; SI-NEXT: v_cvt_f32_f16_e64 v0, -|v0| | |
| ; SI-NEXT: v_mul_f32_e32 v1, v0, v1 | |
| ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 | |
| ; SI-NEXT: buffer_store_dword v0, off, s[4:7], 0 | |
| ; SI-NEXT: s_waitcnt vmcnt(0) | |
| ; SI-NEXT: buffer_store_short v1, off, s[4:7], 0 | |
| ; SI-NEXT: s_waitcnt vmcnt(0) | |
| ; SI-NEXT: s_endpgm | |
| ; | |
| ; GFX89-LABEL: fabs_fneg_multi_foldable_use_fpext_f16_to_f32: | |
| ; GFX89: ; %bb.0: ; %entry | |
| ; GFX89-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 | |
| ; GFX89-NEXT: s_mov_b32 s7, 0xf000 | |
| ; GFX89-NEXT: s_mov_b32 s6, -1 | |
| ; GFX89-NEXT: s_mov_b32 s10, s6 | |
| ; GFX89-NEXT: s_mov_b32 s11, s7 | |
| ; GFX89-NEXT: s_waitcnt lgkmcnt(0) | |
| ; GFX89-NEXT: s_mov_b32 s8, s2 | |
| ; GFX89-NEXT: s_mov_b32 s9, s3 | |
| ; GFX89-NEXT: buffer_load_ushort v0, off, s[8:11], 0 | |
| ; GFX89-NEXT: s_mov_b32 s4, s0 | |
| ; GFX89-NEXT: s_mov_b32 s5, s1 | |
| ; GFX89-NEXT: s_waitcnt vmcnt(0) | |
| ; GFX89-NEXT: v_cvt_f32_f16_e64 v1, -|v0| | |
| ; GFX89-NEXT: v_mul_f16_e64 v0, -|v0|, v0 | |
| ; GFX89-NEXT: buffer_store_dword v1, off, s[4:7], 0 | |
| ; GFX89-NEXT: s_waitcnt vmcnt(0) | |
| ; GFX89-NEXT: buffer_store_short v0, off, s[4:7], 0 | |
| ; GFX89-NEXT: s_waitcnt vmcnt(0) | |
| ; GFX89-NEXT: s_endpgm | |
| ; | |
| ; GFX11-TRUE16-LABEL: fabs_fneg_multi_foldable_use_fpext_f16_to_f32: | |
| ; GFX11-TRUE16: ; %bb.0: ; %entry | |
| ; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s6, -1 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s7, 0x31016000 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s10, s6 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s11, s7 | |
| ; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0) | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s8, s2 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s9, s3 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s4, s0 | |
| ; GFX11-TRUE16-NEXT: buffer_load_d16_b16 v0, off, s[8:11], 0 | |
| ; GFX11-TRUE16-NEXT: s_mov_b32 s5, s1 | |
| ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) | |
| ; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v1, -|v0.l| | |
| ; GFX11-TRUE16-NEXT: v_mul_f16_e64 v0.l, -|v0.l|, v0.l | |
| ; GFX11-TRUE16-NEXT: buffer_store_b32 v1, off, s[4:7], 0 dlc | |
| ; GFX11-TRUE16-NEXT: s_waitcnt_vscnt null, 0x0 | |
| ; GFX11-TRUE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0 dlc | |
| ; GFX11-TRUE16-NEXT: s_waitcnt_vscnt null, 0x0 | |
| ; GFX11-TRUE16-NEXT: s_endpgm | |
| ; | |
| ; GFX11-FAKE16-LABEL: fabs_fneg_multi_foldable_use_fpext_f16_to_f32: | |
| ; GFX11-FAKE16: ; %bb.0: ; %entry | |
| ; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s6, -1 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s7, 0x31016000 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s10, s6 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s11, s7 | |
| ; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0) | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s8, s2 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s9, s3 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s4, s0 | |
| ; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[8:11], 0 | |
| ; GFX11-FAKE16-NEXT: s_mov_b32 s5, s1 | |
| ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) | |
| ; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e64 v1, -|v0| | |
| ; GFX11-FAKE16-NEXT: v_mul_f16_e64 v0, -|v0|, v0 | |
| ; GFX11-FAKE16-NEXT: buffer_store_b32 v1, off, s[4:7], 0 dlc | |
| ; GFX11-FAKE16-NEXT: s_waitcnt_vscnt null, 0x0 | |
| ; GFX11-FAKE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0 dlc | |
| ; GFX11-FAKE16-NEXT: s_waitcnt_vscnt null, 0x0 | |
| ; GFX11-FAKE16-NEXT: s_endpgm | |
| ptr addrspace(1) %r, | |
| ptr addrspace(1) %a) { | |
| entry: | |
| %a.val = load half, ptr addrspace(1) %a | |
| %a.fabs = call half @llvm.fabs.f16(half %a.val) | |
| %a.fneg.fabs = fsub half -0.0, %a.fabs | |
| %r.val = fpext half %a.fneg.fabs to float | |
| %mul = fmul half %a.fneg.fabs, %a.val | |
| store volatile float %r.val, ptr addrspace(1) %r | |
| store volatile half %mul, ptr addrspace(1) poison | |
| ret void | |
| } | |
| declare half @llvm.fabs.f16(half) #1 | |
| attributes #1 = { nounwind readnone } | |
| ;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: | |
| ; GFX9: {{.*}} | |
| ; VI: {{.*}} |