llvm/test/CodeGen/AMDGPU/coexec-sched-barrier-latency.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -mtriple=amdgcn -mcpu=gfx1250 -run-pass=machine-scheduler -amdgpu-sched-strategy=coexec -verify-misched %s -o - | FileCheck -check-prefix=COEXEC %s
# RUN: llc -mtriple=amdgcn -mcpu=gfx1250 -run-pass=machine-scheduler -amdgpu-sched-strategy=coexec -verify-misched --amdgpu-barrier-signal-wait-latency=0 %s -o - | FileCheck -check-prefix=COEXEC-LAT-0 %s
# RUN: llc -mtriple=amdgcn -mcpu=gfx1250 -run-pass=machine-scheduler -amdgpu-sched-strategy=coexec -verify-misched --amdgpu-barrier-signal-wait-latency=30 %s -o - | FileCheck -check-prefix=COEXEC-LAT-30 %s

--- |
  define void @test-sched-signal-wait() #0 { ret void }

  attributes #0 = { "amdgpu-waves-per-eu"="1,1" }
...

# The coexec-scheduler includes BarrierLatency mutations, thus users have access to the amdgpu-barrier-signal-wait-latency control.
# The coexec-scheduler gives strong preference to instructions with no outstanding dependent latency, and slightly less strong
# priority to instructions which participate in memory pipelining. The consequence is that it should prioritize respecting the 
# requested amdgpu-barrier-signal-wait-latency, and schedule the S_BARRIER_WAIT shortly after it is ready. This test should 
# demonstrate how this S_BARRIER_SIGNAL/WAIT scheduling behav

---
name: test-sched-signal-wait
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $sgpr0, $sgpr1

    ; COEXEC-LABEL: name: test-sched-signal-wait
    ; COEXEC: liveins: $sgpr0, $sgpr1
    ; COEXEC-NEXT: {{  $}}
    ; COEXEC-NEXT: S_BARRIER_SIGNAL_IMM -1
    ; COEXEC-NEXT: dead [[S_ADD_I32_:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: dead [[S_ADD_I32_1:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: dead [[S_ADD_I32_2:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: dead [[S_ADD_I32_3:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: dead [[S_ADD_I32_4:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: dead [[S_ADD_I32_5:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: dead [[S_ADD_I32_6:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: dead [[S_ADD_I32_7:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: dead [[S_ADD_I32_8:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: dead [[S_ADD_I32_9:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: dead [[S_ADD_I32_10:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: dead [[S_ADD_I32_11:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: [[S_ADD_I32_12:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: [[S_ADD_I32_13:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: [[S_ADD_I32_14:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: S_BARRIER_WAIT -1
    ; COEXEC-NEXT: dead [[S_ADD_I32_15:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: dead [[S_ADD_I32_16:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: dead [[S_ADD_I32_17:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: dead [[S_ADD_I32_18:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: dead [[S_ADD_I32_19:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: dead [[S_ADD_I32_20:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: dead [[S_ADD_I32_21:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: dead [[S_ADD_I32_22:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: dead [[S_ADD_I32_23:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: dead [[S_ADD_I32_24:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: dead [[S_ADD_I32_25:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: dead [[S_ADD_I32_26:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: dead [[S_ADD_I32_27:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: dead [[S_ADD_I32_28:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: dead [[S_ADD_I32_29:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: dead [[S_ADD_I32_30:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: dead [[S_ADD_I32_31:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-NEXT: S_ENDPGM 0, implicit [[S_ADD_I32_12]], implicit [[S_ADD_I32_13]], implicit [[S_ADD_I32_14]]
    ;
    ; COEXEC-LAT-0-LABEL: name: test-sched-signal-wait
    ; COEXEC-LAT-0: liveins: $sgpr0, $sgpr1
    ; COEXEC-LAT-0-NEXT: {{  $}}
    ; COEXEC-LAT-0-NEXT: S_BARRIER_SIGNAL_IMM -1
    ; COEXEC-LAT-0-NEXT: S_BARRIER_WAIT -1
    ; COEXEC-LAT-0-NEXT: dead [[S_ADD_I32_:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: dead [[S_ADD_I32_1:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: dead [[S_ADD_I32_2:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: dead [[S_ADD_I32_3:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: dead [[S_ADD_I32_4:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: dead [[S_ADD_I32_5:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: dead [[S_ADD_I32_6:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: dead [[S_ADD_I32_7:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: dead [[S_ADD_I32_8:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: dead [[S_ADD_I32_9:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: dead [[S_ADD_I32_10:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: dead [[S_ADD_I32_11:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: [[S_ADD_I32_12:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: [[S_ADD_I32_13:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: [[S_ADD_I32_14:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: dead [[S_ADD_I32_15:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: dead [[S_ADD_I32_16:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: dead [[S_ADD_I32_17:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: dead [[S_ADD_I32_18:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: dead [[S_ADD_I32_19:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: dead [[S_ADD_I32_20:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: dead [[S_ADD_I32_21:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: dead [[S_ADD_I32_22:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: dead [[S_ADD_I32_23:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: dead [[S_ADD_I32_24:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: dead [[S_ADD_I32_25:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: dead [[S_ADD_I32_26:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: dead [[S_ADD_I32_27:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: dead [[S_ADD_I32_28:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: dead [[S_ADD_I32_29:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: dead [[S_ADD_I32_30:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: dead [[S_ADD_I32_31:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-0-NEXT: S_ENDPGM 0, implicit [[S_ADD_I32_12]], implicit [[S_ADD_I32_13]], implicit [[S_ADD_I32_14]]
    ;
    ; COEXEC-LAT-30-LABEL: name: test-sched-signal-wait
    ; COEXEC-LAT-30: liveins: $sgpr0, $sgpr1
    ; COEXEC-LAT-30-NEXT: {{  $}}
    ; COEXEC-LAT-30-NEXT: S_BARRIER_SIGNAL_IMM -1
    ; COEXEC-LAT-30-NEXT: dead [[S_ADD_I32_:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: dead [[S_ADD_I32_1:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: dead [[S_ADD_I32_2:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: dead [[S_ADD_I32_3:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: dead [[S_ADD_I32_4:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: dead [[S_ADD_I32_5:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: dead [[S_ADD_I32_6:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: dead [[S_ADD_I32_7:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: dead [[S_ADD_I32_8:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: dead [[S_ADD_I32_9:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: dead [[S_ADD_I32_10:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: dead [[S_ADD_I32_11:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: [[S_ADD_I32_12:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: [[S_ADD_I32_13:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: [[S_ADD_I32_14:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: dead [[S_ADD_I32_15:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: dead [[S_ADD_I32_16:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: dead [[S_ADD_I32_17:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: dead [[S_ADD_I32_18:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: dead [[S_ADD_I32_19:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: dead [[S_ADD_I32_20:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: dead [[S_ADD_I32_21:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: dead [[S_ADD_I32_22:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: dead [[S_ADD_I32_23:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: dead [[S_ADD_I32_24:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: dead [[S_ADD_I32_25:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: dead [[S_ADD_I32_26:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: dead [[S_ADD_I32_27:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: dead [[S_ADD_I32_28:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: S_BARRIER_WAIT -1
    ; COEXEC-LAT-30-NEXT: dead [[S_ADD_I32_29:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: dead [[S_ADD_I32_30:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: dead [[S_ADD_I32_31:%[0-9]+]]:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    ; COEXEC-LAT-30-NEXT: S_ENDPGM 0, implicit [[S_ADD_I32_12]], implicit [[S_ADD_I32_13]], implicit [[S_ADD_I32_14]]
    %0:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %1:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %2:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %3:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %4:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %5:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %6:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %7:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %8:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %9:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %10:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %11:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %12:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %13:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %14:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %15:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %16:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %17:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %18:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %19:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %20:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %21:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %22:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %23:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %24:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %25:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %26:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %27:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %28:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %29:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %30:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    %31:sgpr_32 = S_ADD_I32 $sgpr0, $sgpr1, implicit-def dead $scc
    S_BARRIER_SIGNAL_IMM -1
    S_BARRIER_WAIT -1
    S_ENDPGM 0, implicit %12, implicit %13, implicit %14
...