llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5

; RUN: llc -mtriple=amdgpu6.00 < %s | FileCheck -check-prefix=SI %s
; RUN: llc -mtriple=amdgpu8.02 < %s | FileCheck -check-prefix=VI %s
; RUN: llc -mtriple=amdgpu9.00 < %s | FileCheck -check-prefix=GFX9 %s
; RUN: llc -mtriple=amdgpu11.00 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-TRUE16 %s
; RUN: llc -mtriple=amdgpu11.00 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-FAKE16 %s

define <28 x float> @bitcast_v28i32_to_v28f32(<28 x i32> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v28i32_to_v28f32:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB0_2
; SI-NEXT:  ; %bb.1: ; %cmp.true
; SI-NEXT:    v_add_i32_e32 v27, vcc, 3, v27
; SI-NEXT:    v_add_i32_e32 v26, vcc, 3, v26
; SI-NEXT:    v_add_i32_e32 v25, vcc, 3, v25
; SI-NEXT:    v_add_i32_e32 v24, vcc, 3, v24
; SI-NEXT:    v_add_i32_e32 v23, vcc, 3, v23
; SI-NEXT:    v_add_i32_e32 v22, vcc, 3, v22
; SI-NEXT:    v_add_i32_e32 v21, vcc, 3, v21
; SI-NEXT:    v_add_i32_e32 v20, vcc, 3, v20
; SI-NEXT:    v_add_i32_e32 v19, vcc, 3, v19
; SI-NEXT:    v_add_i32_e32 v18, vcc, 3, v18
; SI-NEXT:    v_add_i32_e32 v17, vcc, 3, v17
; SI-NEXT:    v_add_i32_e32 v16, vcc, 3, v16
; SI-NEXT:    v_add_i32_e32 v15, vcc, 3, v15
; SI-NEXT:    v_add_i32_e32 v14, vcc, 3, v14
; SI-NEXT:    v_add_i32_e32 v13, vcc, 3, v13
; SI-NEXT:    v_add_i32_e32 v12, vcc, 3, v12
; SI-NEXT:    v_add_i32_e32 v11, vcc, 3, v11
; SI-NEXT:    v_add_i32_e32 v10, vcc, 3, v10
; SI-NEXT:    v_add_i32_e32 v9, vcc, 3, v9
; SI-NEXT:    v_add_i32_e32 v8, vcc, 3, v8
; SI-NEXT:    v_add_i32_e32 v7, vcc, 3, v7
; SI-NEXT:    v_add_i32_e32 v6, vcc, 3, v6
; SI-NEXT:    v_add_i32_e32 v5, vcc, 3, v5
; SI-NEXT:    v_add_i32_e32 v4, vcc, 3, v4
; SI-NEXT:    v_add_i32_e32 v3, vcc, 3, v3
; SI-NEXT:    v_add_i32_e32 v2, vcc, 3, v2
; SI-NEXT:    v_add_i32_e32 v1, vcc, 3, v1
; SI-NEXT:    v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT:  .LBB0_2: ; %end
; SI-NEXT:    s_or_b64 exec, exec, s[4:5]
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v28i32_to_v28f32:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB0_2
; VI-NEXT:  ; %bb.1: ; %cmp.true
; VI-NEXT:    v_add_u32_e32 v27, vcc, 3, v27
; VI-NEXT:    v_add_u32_e32 v26, vcc, 3, v26
; VI-NEXT:    v_add_u32_e32 v25, vcc, 3, v25
; VI-NEXT:    v_add_u32_e32 v24, vcc, 3, v24
; VI-NEXT:    v_add_u32_e32 v23, vcc, 3, v23
; VI-NEXT:    v_add_u32_e32 v22, vcc, 3, v22
; VI-NEXT:    v_add_u32_e32 v21, vcc, 3, v21
; VI-NEXT:    v_add_u32_e32 v20, vcc, 3, v20
; VI-NEXT:    v_add_u32_e32 v19, vcc, 3, v19
; VI-NEXT:    v_add_u32_e32 v18, vcc, 3, v18
; VI-NEXT:    v_add_u32_e32 v17, vcc, 3, v17
; VI-NEXT:    v_add_u32_e32 v16, vcc, 3, v16
; VI-NEXT:    v_add_u32_e32 v15, vcc, 3, v15
; VI-NEXT:    v_add_u32_e32 v14, vcc, 3, v14
; VI-NEXT:    v_add_u32_e32 v13, vcc, 3, v13
; VI-NEXT:    v_add_u32_e32 v12, vcc, 3, v12
; VI-NEXT:    v_add_u32_e32 v11, vcc, 3, v11
; VI-NEXT:    v_add_u32_e32 v10, vcc, 3, v10
; VI-NEXT:    v_add_u32_e32 v9, vcc, 3, v9
; VI-NEXT:    v_add_u32_e32 v8, vcc, 3, v8
; VI-NEXT:    v_add_u32_e32 v7, vcc, 3, v7
; VI-NEXT:    v_add_u32_e32 v6, vcc, 3, v6
; VI-NEXT:    v_add_u32_e32 v5, vcc, 3, v5
; VI-NEXT:    v_add_u32_e32 v4, vcc, 3, v4
; VI-NEXT:    v_add_u32_e32 v3, vcc, 3, v3
; VI-NEXT:    v_add_u32_e32 v2, vcc, 3, v2
; VI-NEXT:    v_add_u32_e32 v1, vcc, 3, v1
; VI-NEXT:    v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT:  .LBB0_2: ; %end
; VI-NEXT:    s_or_b64 exec, exec, s[4:5]
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v28i32_to_v28f32:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB0_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.true
; GFX9-NEXT:    v_add_u32_e32 v27, 3, v27
; GFX9-NEXT:    v_add_u32_e32 v26, 3, v26
; GFX9-NEXT:    v_add_u32_e32 v25, 3, v25
; GFX9-NEXT:    v_add_u32_e32 v24, 3, v24
; GFX9-NEXT:    v_add_u32_e32 v23, 3, v23
; GFX9-NEXT:    v_add_u32_e32 v22, 3, v22
; GFX9-NEXT:    v_add_u32_e32 v21, 3, v21
; GFX9-NEXT:    v_add_u32_e32 v20, 3, v20
; GFX9-NEXT:    v_add_u32_e32 v19, 3, v19
; GFX9-NEXT:    v_add_u32_e32 v18, 3, v18
; GFX9-NEXT:    v_add_u32_e32 v17, 3, v17
; GFX9-NEXT:    v_add_u32_e32 v16, 3, v16
; GFX9-NEXT:    v_add_u32_e32 v15, 3, v15
; GFX9-NEXT:    v_add_u32_e32 v14, 3, v14
; GFX9-NEXT:    v_add_u32_e32 v13, 3, v13
; GFX9-NEXT:    v_add_u32_e32 v12, 3, v12
; GFX9-NEXT:    v_add_u32_e32 v11, 3, v11
; GFX9-NEXT:    v_add_u32_e32 v10, 3, v10
; GFX9-NEXT:    v_add_u32_e32 v9, 3, v9
; GFX9-NEXT:    v_add_u32_e32 v8, 3, v8
; GFX9-NEXT:    v_add_u32_e32 v7, 3, v7
; GFX9-NEXT:    v_add_u32_e32 v6, 3, v6
; GFX9-NEXT:    v_add_u32_e32 v5, 3, v5
; GFX9-NEXT:    v_add_u32_e32 v4, 3, v4
; GFX9-NEXT:    v_add_u32_e32 v3, 3, v3
; GFX9-NEXT:    v_add_u32_e32 v2, 3, v2
; GFX9-NEXT:    v_add_u32_e32 v1, 3, v1
; GFX9-NEXT:    v_add_u32_e32 v0, 3, v0
; GFX9-NEXT:  .LBB0_2: ; %end
; GFX9-NEXT:    s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v28i32_to_v28f32:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-NEXT:    s_cbranch_execz .LBB0_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-NEXT:    v_add_nc_u32_e32 v27, 3, v27
; GFX11-NEXT:    v_add_nc_u32_e32 v26, 3, v26
; GFX11-NEXT:    v_add_nc_u32_e32 v25, 3, v25
; GFX11-NEXT:    v_add_nc_u32_e32 v24, 3, v24
; GFX11-NEXT:    v_add_nc_u32_e32 v23, 3, v23
; GFX11-NEXT:    v_add_nc_u32_e32 v22, 3, v22
; GFX11-NEXT:    v_add_nc_u32_e32 v21, 3, v21
; GFX11-NEXT:    v_add_nc_u32_e32 v20, 3, v20
; GFX11-NEXT:    v_add_nc_u32_e32 v19, 3, v19
; GFX11-NEXT:    v_add_nc_u32_e32 v18, 3, v18
; GFX11-NEXT:    v_add_nc_u32_e32 v17, 3, v17
; GFX11-NEXT:    v_add_nc_u32_e32 v16, 3, v16
; GFX11-NEXT:    v_add_nc_u32_e32 v15, 3, v15
; GFX11-NEXT:    v_add_nc_u32_e32 v14, 3, v14
; GFX11-NEXT:    v_add_nc_u32_e32 v13, 3, v13
; GFX11-NEXT:    v_add_nc_u32_e32 v12, 3, v12
; GFX11-NEXT:    v_add_nc_u32_e32 v11, 3, v11
; GFX11-NEXT:    v_add_nc_u32_e32 v10, 3, v10
; GFX11-NEXT:    v_add_nc_u32_e32 v9, 3, v9
; GFX11-NEXT:    v_add_nc_u32_e32 v8, 3, v8
; GFX11-NEXT:    v_add_nc_u32_e32 v7, 3, v7
; GFX11-NEXT:    v_add_nc_u32_e32 v6, 3, v6
; GFX11-NEXT:    v_add_nc_u32_e32 v5, 3, v5
; GFX11-NEXT:    v_add_nc_u32_e32 v4, 3, v4
; GFX11-NEXT:    v_add_nc_u32_e32 v3, 3, v3
; GFX11-NEXT:    v_add_nc_u32_e32 v2, 3, v2
; GFX11-NEXT:    v_add_nc_u32_e32 v1, 3, v1
; GFX11-NEXT:    v_add_nc_u32_e32 v0, 3, v0
; GFX11-NEXT:  .LBB0_2: ; %end
; GFX11-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = add <28 x i32> %a, splat (i32 3)
  %a2 = bitcast <28 x i32> %a1 to <28 x float>
  br label %end

cmp.false:
  %a3 = bitcast <28 x i32> %a to <28 x float>
  br label %end

end:
  %phi = phi <28 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <28 x float> %phi
}

define inreg <28 x float> @bitcast_v28i32_to_v28f32_scalar(<28 x i32> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v28i32_to_v28f32_scalar:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    v_readfirstlane_b32 s41, v14
; SI-NEXT:    v_readfirstlane_b32 s4, v13
; SI-NEXT:    v_readfirstlane_b32 s5, v12
; SI-NEXT:    v_readfirstlane_b32 s6, v11
; SI-NEXT:    v_readfirstlane_b32 s7, v10
; SI-NEXT:    v_readfirstlane_b32 s8, v9
; SI-NEXT:    v_readfirstlane_b32 s9, v8
; SI-NEXT:    v_readfirstlane_b32 s10, v7
; SI-NEXT:    v_readfirstlane_b32 s11, v6
; SI-NEXT:    v_readfirstlane_b32 s12, v5
; SI-NEXT:    v_readfirstlane_b32 s13, v4
; SI-NEXT:    v_readfirstlane_b32 s14, v3
; SI-NEXT:    v_readfirstlane_b32 s15, v2
; SI-NEXT:    v_readfirstlane_b32 s40, v1
; SI-NEXT:    s_cmp_lg_u32 s41, 0
; SI-NEXT:    v_readfirstlane_b32 s41, v0
; SI-NEXT:    s_cbranch_scc1 .LBB1_2
; SI-NEXT:  ; %bb.1: ; %cmp.true
; SI-NEXT:    s_add_i32 s4, s4, 3
; SI-NEXT:    s_add_i32 s5, s5, 3
; SI-NEXT:    s_add_i32 s6, s6, 3
; SI-NEXT:    s_add_i32 s7, s7, 3
; SI-NEXT:    s_add_i32 s8, s8, 3
; SI-NEXT:    s_add_i32 s9, s9, 3
; SI-NEXT:    s_add_i32 s10, s10, 3
; SI-NEXT:    s_add_i32 s11, s11, 3
; SI-NEXT:    s_add_i32 s12, s12, 3
; SI-NEXT:    s_add_i32 s13, s13, 3
; SI-NEXT:    s_add_i32 s14, s14, 3
; SI-NEXT:    s_add_i32 s15, s15, 3
; SI-NEXT:    s_add_i32 s40, s40, 3
; SI-NEXT:    s_add_i32 s41, s41, 3
; SI-NEXT:    s_add_i32 s29, s29, 3
; SI-NEXT:    s_add_i32 s28, s28, 3
; SI-NEXT:    s_add_i32 s27, s27, 3
; SI-NEXT:    s_add_i32 s26, s26, 3
; SI-NEXT:    s_add_i32 s25, s25, 3
; SI-NEXT:    s_add_i32 s24, s24, 3
; SI-NEXT:    s_add_i32 s23, s23, 3
; SI-NEXT:    s_add_i32 s22, s22, 3
; SI-NEXT:    s_add_i32 s21, s21, 3
; SI-NEXT:    s_add_i32 s20, s20, 3
; SI-NEXT:    s_add_i32 s19, s19, 3
; SI-NEXT:    s_add_i32 s18, s18, 3
; SI-NEXT:    s_add_i32 s17, s17, 3
; SI-NEXT:    s_add_i32 s16, s16, 3
; SI-NEXT:  .LBB1_2: ; %end
; SI-NEXT:    v_mov_b32_e32 v0, s16
; SI-NEXT:    v_mov_b32_e32 v1, s17
; SI-NEXT:    v_mov_b32_e32 v2, s18
; SI-NEXT:    v_mov_b32_e32 v3, s19
; SI-NEXT:    v_mov_b32_e32 v4, s20
; SI-NEXT:    v_mov_b32_e32 v5, s21
; SI-NEXT:    v_mov_b32_e32 v6, s22
; SI-NEXT:    v_mov_b32_e32 v7, s23
; SI-NEXT:    v_mov_b32_e32 v8, s24
; SI-NEXT:    v_mov_b32_e32 v9, s25
; SI-NEXT:    v_mov_b32_e32 v10, s26
; SI-NEXT:    v_mov_b32_e32 v11, s27
; SI-NEXT:    v_mov_b32_e32 v12, s28
; SI-NEXT:    v_mov_b32_e32 v13, s29
; SI-NEXT:    v_mov_b32_e32 v14, s41
; SI-NEXT:    v_mov_b32_e32 v15, s40
; SI-NEXT:    v_mov_b32_e32 v16, s15
; SI-NEXT:    v_mov_b32_e32 v17, s14
; SI-NEXT:    v_mov_b32_e32 v18, s13
; SI-NEXT:    v_mov_b32_e32 v19, s12
; SI-NEXT:    v_mov_b32_e32 v20, s11
; SI-NEXT:    v_mov_b32_e32 v21, s10
; SI-NEXT:    v_mov_b32_e32 v22, s9
; SI-NEXT:    v_mov_b32_e32 v23, s8
; SI-NEXT:    v_mov_b32_e32 v24, s7
; SI-NEXT:    v_mov_b32_e32 v25, s6
; SI-NEXT:    v_mov_b32_e32 v26, s5
; SI-NEXT:    v_mov_b32_e32 v27, s4
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v28i32_to_v28f32_scalar:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    v_readfirstlane_b32 s41, v14
; VI-NEXT:    v_readfirstlane_b32 s4, v13
; VI-NEXT:    v_readfirstlane_b32 s5, v12
; VI-NEXT:    v_readfirstlane_b32 s6, v11
; VI-NEXT:    v_readfirstlane_b32 s7, v10
; VI-NEXT:    v_readfirstlane_b32 s8, v9
; VI-NEXT:    v_readfirstlane_b32 s9, v8
; VI-NEXT:    v_readfirstlane_b32 s10, v7
; VI-NEXT:    v_readfirstlane_b32 s11, v6
; VI-NEXT:    v_readfirstlane_b32 s12, v5
; VI-NEXT:    v_readfirstlane_b32 s13, v4
; VI-NEXT:    v_readfirstlane_b32 s14, v3
; VI-NEXT:    v_readfirstlane_b32 s15, v2
; VI-NEXT:    v_readfirstlane_b32 s40, v1
; VI-NEXT:    s_cmp_lg_u32 s41, 0
; VI-NEXT:    v_readfirstlane_b32 s41, v0
; VI-NEXT:    s_cbranch_scc1 .LBB1_2
; VI-NEXT:  ; %bb.1: ; %cmp.true
; VI-NEXT:    s_add_i32 s4, s4, 3
; VI-NEXT:    s_add_i32 s5, s5, 3
; VI-NEXT:    s_add_i32 s6, s6, 3
; VI-NEXT:    s_add_i32 s7, s7, 3
; VI-NEXT:    s_add_i32 s8, s8, 3
; VI-NEXT:    s_add_i32 s9, s9, 3
; VI-NEXT:    s_add_i32 s10, s10, 3
; VI-NEXT:    s_add_i32 s11, s11, 3
; VI-NEXT:    s_add_i32 s12, s12, 3
; VI-NEXT:    s_add_i32 s13, s13, 3
; VI-NEXT:    s_add_i32 s14, s14, 3
; VI-NEXT:    s_add_i32 s15, s15, 3
; VI-NEXT:    s_add_i32 s40, s40, 3
; VI-NEXT:    s_add_i32 s41, s41, 3
; VI-NEXT:    s_add_i32 s29, s29, 3
; VI-NEXT:    s_add_i32 s28, s28, 3
; VI-NEXT:    s_add_i32 s27, s27, 3
; VI-NEXT:    s_add_i32 s26, s26, 3
; VI-NEXT:    s_add_i32 s25, s25, 3
; VI-NEXT:    s_add_i32 s24, s24, 3
; VI-NEXT:    s_add_i32 s23, s23, 3
; VI-NEXT:    s_add_i32 s22, s22, 3
; VI-NEXT:    s_add_i32 s21, s21, 3
; VI-NEXT:    s_add_i32 s20, s20, 3
; VI-NEXT:    s_add_i32 s19, s19, 3
; VI-NEXT:    s_add_i32 s18, s18, 3
; VI-NEXT:    s_add_i32 s17, s17, 3
; VI-NEXT:    s_add_i32 s16, s16, 3
; VI-NEXT:  .LBB1_2: ; %end
; VI-NEXT:    v_mov_b32_e32 v0, s16
; VI-NEXT:    v_mov_b32_e32 v1, s17
; VI-NEXT:    v_mov_b32_e32 v2, s18
; VI-NEXT:    v_mov_b32_e32 v3, s19
; VI-NEXT:    v_mov_b32_e32 v4, s20
; VI-NEXT:    v_mov_b32_e32 v5, s21
; VI-NEXT:    v_mov_b32_e32 v6, s22
; VI-NEXT:    v_mov_b32_e32 v7, s23
; VI-NEXT:    v_mov_b32_e32 v8, s24
; VI-NEXT:    v_mov_b32_e32 v9, s25
; VI-NEXT:    v_mov_b32_e32 v10, s26
; VI-NEXT:    v_mov_b32_e32 v11, s27
; VI-NEXT:    v_mov_b32_e32 v12, s28
; VI-NEXT:    v_mov_b32_e32 v13, s29
; VI-NEXT:    v_mov_b32_e32 v14, s41
; VI-NEXT:    v_mov_b32_e32 v15, s40
; VI-NEXT:    v_mov_b32_e32 v16, s15
; VI-NEXT:    v_mov_b32_e32 v17, s14
; VI-NEXT:    v_mov_b32_e32 v18, s13
; VI-NEXT:    v_mov_b32_e32 v19, s12
; VI-NEXT:    v_mov_b32_e32 v20, s11
; VI-NEXT:    v_mov_b32_e32 v21, s10
; VI-NEXT:    v_mov_b32_e32 v22, s9
; VI-NEXT:    v_mov_b32_e32 v23, s8
; VI-NEXT:    v_mov_b32_e32 v24, s7
; VI-NEXT:    v_mov_b32_e32 v25, s6
; VI-NEXT:    v_mov_b32_e32 v26, s5
; VI-NEXT:    v_mov_b32_e32 v27, s4
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v28i32_to_v28f32_scalar:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_readfirstlane_b32 s41, v14
; GFX9-NEXT:    v_readfirstlane_b32 s4, v13
; GFX9-NEXT:    v_readfirstlane_b32 s5, v12
; GFX9-NEXT:    v_readfirstlane_b32 s6, v11
; GFX9-NEXT:    v_readfirstlane_b32 s7, v10
; GFX9-NEXT:    v_readfirstlane_b32 s8, v9
; GFX9-NEXT:    v_readfirstlane_b32 s9, v8
; GFX9-NEXT:    v_readfirstlane_b32 s10, v7
; GFX9-NEXT:    v_readfirstlane_b32 s11, v6
; GFX9-NEXT:    v_readfirstlane_b32 s12, v5
; GFX9-NEXT:    v_readfirstlane_b32 s13, v4
; GFX9-NEXT:    v_readfirstlane_b32 s14, v3
; GFX9-NEXT:    v_readfirstlane_b32 s15, v2
; GFX9-NEXT:    v_readfirstlane_b32 s40, v1
; GFX9-NEXT:    s_cmp_lg_u32 s41, 0
; GFX9-NEXT:    v_readfirstlane_b32 s41, v0
; GFX9-NEXT:    s_cbranch_scc1 .LBB1_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.true
; GFX9-NEXT:    s_add_i32 s4, s4, 3
; GFX9-NEXT:    s_add_i32 s5, s5, 3
; GFX9-NEXT:    s_add_i32 s6, s6, 3
; GFX9-NEXT:    s_add_i32 s7, s7, 3
; GFX9-NEXT:    s_add_i32 s8, s8, 3
; GFX9-NEXT:    s_add_i32 s9, s9, 3
; GFX9-NEXT:    s_add_i32 s10, s10, 3
; GFX9-NEXT:    s_add_i32 s11, s11, 3
; GFX9-NEXT:    s_add_i32 s12, s12, 3
; GFX9-NEXT:    s_add_i32 s13, s13, 3
; GFX9-NEXT:    s_add_i32 s14, s14, 3
; GFX9-NEXT:    s_add_i32 s15, s15, 3
; GFX9-NEXT:    s_add_i32 s40, s40, 3
; GFX9-NEXT:    s_add_i32 s41, s41, 3
; GFX9-NEXT:    s_add_i32 s29, s29, 3
; GFX9-NEXT:    s_add_i32 s28, s28, 3
; GFX9-NEXT:    s_add_i32 s27, s27, 3
; GFX9-NEXT:    s_add_i32 s26, s26, 3
; GFX9-NEXT:    s_add_i32 s25, s25, 3
; GFX9-NEXT:    s_add_i32 s24, s24, 3
; GFX9-NEXT:    s_add_i32 s23, s23, 3
; GFX9-NEXT:    s_add_i32 s22, s22, 3
; GFX9-NEXT:    s_add_i32 s21, s21, 3
; GFX9-NEXT:    s_add_i32 s20, s20, 3
; GFX9-NEXT:    s_add_i32 s19, s19, 3
; GFX9-NEXT:    s_add_i32 s18, s18, 3
; GFX9-NEXT:    s_add_i32 s17, s17, 3
; GFX9-NEXT:    s_add_i32 s16, s16, 3
; GFX9-NEXT:  .LBB1_2: ; %end
; GFX9-NEXT:    v_mov_b32_e32 v0, s16
; GFX9-NEXT:    v_mov_b32_e32 v1, s17
; GFX9-NEXT:    v_mov_b32_e32 v2, s18
; GFX9-NEXT:    v_mov_b32_e32 v3, s19
; GFX9-NEXT:    v_mov_b32_e32 v4, s20
; GFX9-NEXT:    v_mov_b32_e32 v5, s21
; GFX9-NEXT:    v_mov_b32_e32 v6, s22
; GFX9-NEXT:    v_mov_b32_e32 v7, s23
; GFX9-NEXT:    v_mov_b32_e32 v8, s24
; GFX9-NEXT:    v_mov_b32_e32 v9, s25
; GFX9-NEXT:    v_mov_b32_e32 v10, s26
; GFX9-NEXT:    v_mov_b32_e32 v11, s27
; GFX9-NEXT:    v_mov_b32_e32 v12, s28
; GFX9-NEXT:    v_mov_b32_e32 v13, s29
; GFX9-NEXT:    v_mov_b32_e32 v14, s41
; GFX9-NEXT:    v_mov_b32_e32 v15, s40
; GFX9-NEXT:    v_mov_b32_e32 v16, s15
; GFX9-NEXT:    v_mov_b32_e32 v17, s14
; GFX9-NEXT:    v_mov_b32_e32 v18, s13
; GFX9-NEXT:    v_mov_b32_e32 v19, s12
; GFX9-NEXT:    v_mov_b32_e32 v20, s11
; GFX9-NEXT:    v_mov_b32_e32 v21, s10
; GFX9-NEXT:    v_mov_b32_e32 v22, s9
; GFX9-NEXT:    v_mov_b32_e32 v23, s8
; GFX9-NEXT:    v_mov_b32_e32 v24, s7
; GFX9-NEXT:    v_mov_b32_e32 v25, s6
; GFX9-NEXT:    v_mov_b32_e32 v26, s5
; GFX9-NEXT:    v_mov_b32_e32 v27, s4
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v28i32_to_v28f32_scalar:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_readfirstlane_b32 s14, v10
; GFX11-NEXT:    v_readfirstlane_b32 s4, v9
; GFX11-NEXT:    v_readfirstlane_b32 s5, v8
; GFX11-NEXT:    v_readfirstlane_b32 s6, v7
; GFX11-NEXT:    v_readfirstlane_b32 s7, v6
; GFX11-NEXT:    v_readfirstlane_b32 s8, v5
; GFX11-NEXT:    v_readfirstlane_b32 s9, v4
; GFX11-NEXT:    v_readfirstlane_b32 s10, v3
; GFX11-NEXT:    v_readfirstlane_b32 s11, v2
; GFX11-NEXT:    v_readfirstlane_b32 s12, v1
; GFX11-NEXT:    v_readfirstlane_b32 s13, v0
; GFX11-NEXT:    s_cmp_lg_u32 s14, 0
; GFX11-NEXT:    s_cbranch_scc1 .LBB1_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-NEXT:    s_add_i32 s4, s4, 3
; GFX11-NEXT:    s_add_i32 s5, s5, 3
; GFX11-NEXT:    s_add_i32 s6, s6, 3
; GFX11-NEXT:    s_add_i32 s7, s7, 3
; GFX11-NEXT:    s_add_i32 s8, s8, 3
; GFX11-NEXT:    s_add_i32 s9, s9, 3
; GFX11-NEXT:    s_add_i32 s10, s10, 3
; GFX11-NEXT:    s_add_i32 s11, s11, 3
; GFX11-NEXT:    s_add_i32 s12, s12, 3
; GFX11-NEXT:    s_add_i32 s13, s13, 3
; GFX11-NEXT:    s_add_i32 s29, s29, 3
; GFX11-NEXT:    s_add_i32 s28, s28, 3
; GFX11-NEXT:    s_add_i32 s27, s27, 3
; GFX11-NEXT:    s_add_i32 s26, s26, 3
; GFX11-NEXT:    s_add_i32 s25, s25, 3
; GFX11-NEXT:    s_add_i32 s24, s24, 3
; GFX11-NEXT:    s_add_i32 s23, s23, 3
; GFX11-NEXT:    s_add_i32 s22, s22, 3
; GFX11-NEXT:    s_add_i32 s21, s21, 3
; GFX11-NEXT:    s_add_i32 s20, s20, 3
; GFX11-NEXT:    s_add_i32 s19, s19, 3
; GFX11-NEXT:    s_add_i32 s18, s18, 3
; GFX11-NEXT:    s_add_i32 s17, s17, 3
; GFX11-NEXT:    s_add_i32 s16, s16, 3
; GFX11-NEXT:    s_add_i32 s3, s3, 3
; GFX11-NEXT:    s_add_i32 s2, s2, 3
; GFX11-NEXT:    s_add_i32 s1, s1, 3
; GFX11-NEXT:    s_add_i32 s0, s0, 3
; GFX11-NEXT:  .LBB1_2: ; %end
; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT:    v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX11-NEXT:    v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; GFX11-NEXT:    v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
; GFX11-NEXT:    v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
; GFX11-NEXT:    v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
; GFX11-NEXT:    v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
; GFX11-NEXT:    v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
; GFX11-NEXT:    v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
; GFX11-NEXT:    v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
; GFX11-NEXT:    v_dual_mov_b32 v18, s13 :: v_dual_mov_b32 v19, s12
; GFX11-NEXT:    v_dual_mov_b32 v20, s11 :: v_dual_mov_b32 v21, s10
; GFX11-NEXT:    v_dual_mov_b32 v22, s9 :: v_dual_mov_b32 v23, s8
; GFX11-NEXT:    v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s6
; GFX11-NEXT:    v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s4
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = add <28 x i32> %a, splat (i32 3)
  %a2 = bitcast <28 x i32> %a1 to <28 x float>
  br label %end

cmp.false:
  %a3 = bitcast <28 x i32> %a to <28 x float>
  br label %end

end:
  %phi = phi <28 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <28 x float> %phi
}

define <28 x i32> @bitcast_v28f32_to_v28i32(<28 x float> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v28f32_to_v28i32:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB2_2
; SI-NEXT:  ; %bb.1: ; %cmp.true
; SI-NEXT:    v_add_f32_e32 v27, 1.0, v27
; SI-NEXT:    v_add_f32_e32 v26, 1.0, v26
; SI-NEXT:    v_add_f32_e32 v25, 1.0, v25
; SI-NEXT:    v_add_f32_e32 v24, 1.0, v24
; SI-NEXT:    v_add_f32_e32 v23, 1.0, v23
; SI-NEXT:    v_add_f32_e32 v22, 1.0, v22
; SI-NEXT:    v_add_f32_e32 v21, 1.0, v21
; SI-NEXT:    v_add_f32_e32 v20, 1.0, v20
; SI-NEXT:    v_add_f32_e32 v19, 1.0, v19
; SI-NEXT:    v_add_f32_e32 v18, 1.0, v18
; SI-NEXT:    v_add_f32_e32 v17, 1.0, v17
; SI-NEXT:    v_add_f32_e32 v16, 1.0, v16
; SI-NEXT:    v_add_f32_e32 v15, 1.0, v15
; SI-NEXT:    v_add_f32_e32 v14, 1.0, v14
; SI-NEXT:    v_add_f32_e32 v13, 1.0, v13
; SI-NEXT:    v_add_f32_e32 v12, 1.0, v12
; SI-NEXT:    v_add_f32_e32 v11, 1.0, v11
; SI-NEXT:    v_add_f32_e32 v10, 1.0, v10
; SI-NEXT:    v_add_f32_e32 v9, 1.0, v9
; SI-NEXT:    v_add_f32_e32 v8, 1.0, v8
; SI-NEXT:    v_add_f32_e32 v7, 1.0, v7
; SI-NEXT:    v_add_f32_e32 v6, 1.0, v6
; SI-NEXT:    v_add_f32_e32 v5, 1.0, v5
; SI-NEXT:    v_add_f32_e32 v4, 1.0, v4
; SI-NEXT:    v_add_f32_e32 v3, 1.0, v3
; SI-NEXT:    v_add_f32_e32 v2, 1.0, v2
; SI-NEXT:    v_add_f32_e32 v1, 1.0, v1
; SI-NEXT:    v_add_f32_e32 v0, 1.0, v0
; SI-NEXT:  .LBB2_2: ; %end
; SI-NEXT:    s_or_b64 exec, exec, s[4:5]
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v28f32_to_v28i32:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB2_2
; VI-NEXT:  ; %bb.1: ; %cmp.true
; VI-NEXT:    v_add_f32_e32 v27, 1.0, v27
; VI-NEXT:    v_add_f32_e32 v26, 1.0, v26
; VI-NEXT:    v_add_f32_e32 v25, 1.0, v25
; VI-NEXT:    v_add_f32_e32 v24, 1.0, v24
; VI-NEXT:    v_add_f32_e32 v23, 1.0, v23
; VI-NEXT:    v_add_f32_e32 v22, 1.0, v22
; VI-NEXT:    v_add_f32_e32 v21, 1.0, v21
; VI-NEXT:    v_add_f32_e32 v20, 1.0, v20
; VI-NEXT:    v_add_f32_e32 v19, 1.0, v19
; VI-NEXT:    v_add_f32_e32 v18, 1.0, v18
; VI-NEXT:    v_add_f32_e32 v17, 1.0, v17
; VI-NEXT:    v_add_f32_e32 v16, 1.0, v16
; VI-NEXT:    v_add_f32_e32 v15, 1.0, v15
; VI-NEXT:    v_add_f32_e32 v14, 1.0, v14
; VI-NEXT:    v_add_f32_e32 v13, 1.0, v13
; VI-NEXT:    v_add_f32_e32 v12, 1.0, v12
; VI-NEXT:    v_add_f32_e32 v11, 1.0, v11
; VI-NEXT:    v_add_f32_e32 v10, 1.0, v10
; VI-NEXT:    v_add_f32_e32 v9, 1.0, v9
; VI-NEXT:    v_add_f32_e32 v8, 1.0, v8
; VI-NEXT:    v_add_f32_e32 v7, 1.0, v7
; VI-NEXT:    v_add_f32_e32 v6, 1.0, v6
; VI-NEXT:    v_add_f32_e32 v5, 1.0, v5
; VI-NEXT:    v_add_f32_e32 v4, 1.0, v4
; VI-NEXT:    v_add_f32_e32 v3, 1.0, v3
; VI-NEXT:    v_add_f32_e32 v2, 1.0, v2
; VI-NEXT:    v_add_f32_e32 v1, 1.0, v1
; VI-NEXT:    v_add_f32_e32 v0, 1.0, v0
; VI-NEXT:  .LBB2_2: ; %end
; VI-NEXT:    s_or_b64 exec, exec, s[4:5]
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v28f32_to_v28i32:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB2_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.true
; GFX9-NEXT:    v_add_f32_e32 v27, 1.0, v27
; GFX9-NEXT:    v_add_f32_e32 v26, 1.0, v26
; GFX9-NEXT:    v_add_f32_e32 v25, 1.0, v25
; GFX9-NEXT:    v_add_f32_e32 v24, 1.0, v24
; GFX9-NEXT:    v_add_f32_e32 v23, 1.0, v23
; GFX9-NEXT:    v_add_f32_e32 v22, 1.0, v22
; GFX9-NEXT:    v_add_f32_e32 v21, 1.0, v21
; GFX9-NEXT:    v_add_f32_e32 v20, 1.0, v20
; GFX9-NEXT:    v_add_f32_e32 v19, 1.0, v19
; GFX9-NEXT:    v_add_f32_e32 v18, 1.0, v18
; GFX9-NEXT:    v_add_f32_e32 v17, 1.0, v17
; GFX9-NEXT:    v_add_f32_e32 v16, 1.0, v16
; GFX9-NEXT:    v_add_f32_e32 v15, 1.0, v15
; GFX9-NEXT:    v_add_f32_e32 v14, 1.0, v14
; GFX9-NEXT:    v_add_f32_e32 v13, 1.0, v13
; GFX9-NEXT:    v_add_f32_e32 v12, 1.0, v12
; GFX9-NEXT:    v_add_f32_e32 v11, 1.0, v11
; GFX9-NEXT:    v_add_f32_e32 v10, 1.0, v10
; GFX9-NEXT:    v_add_f32_e32 v9, 1.0, v9
; GFX9-NEXT:    v_add_f32_e32 v8, 1.0, v8
; GFX9-NEXT:    v_add_f32_e32 v7, 1.0, v7
; GFX9-NEXT:    v_add_f32_e32 v6, 1.0, v6
; GFX9-NEXT:    v_add_f32_e32 v5, 1.0, v5
; GFX9-NEXT:    v_add_f32_e32 v4, 1.0, v4
; GFX9-NEXT:    v_add_f32_e32 v3, 1.0, v3
; GFX9-NEXT:    v_add_f32_e32 v2, 1.0, v2
; GFX9-NEXT:    v_add_f32_e32 v1, 1.0, v1
; GFX9-NEXT:    v_add_f32_e32 v0, 1.0, v0
; GFX9-NEXT:  .LBB2_2: ; %end
; GFX9-NEXT:    s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v28f32_to_v28i32:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-NEXT:    s_cbranch_execz .LBB2_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-NEXT:    v_dual_add_f32 v27, 1.0, v27 :: v_dual_add_f32 v26, 1.0, v26
; GFX11-NEXT:    v_dual_add_f32 v25, 1.0, v25 :: v_dual_add_f32 v24, 1.0, v24
; GFX11-NEXT:    v_dual_add_f32 v23, 1.0, v23 :: v_dual_add_f32 v22, 1.0, v22
; GFX11-NEXT:    v_dual_add_f32 v21, 1.0, v21 :: v_dual_add_f32 v20, 1.0, v20
; GFX11-NEXT:    v_dual_add_f32 v19, 1.0, v19 :: v_dual_add_f32 v18, 1.0, v18
; GFX11-NEXT:    v_dual_add_f32 v17, 1.0, v17 :: v_dual_add_f32 v16, 1.0, v16
; GFX11-NEXT:    v_dual_add_f32 v15, 1.0, v15 :: v_dual_add_f32 v14, 1.0, v14
; GFX11-NEXT:    v_dual_add_f32 v13, 1.0, v13 :: v_dual_add_f32 v12, 1.0, v12
; GFX11-NEXT:    v_dual_add_f32 v11, 1.0, v11 :: v_dual_add_f32 v10, 1.0, v10
; GFX11-NEXT:    v_dual_add_f32 v9, 1.0, v9 :: v_dual_add_f32 v8, 1.0, v8
; GFX11-NEXT:    v_dual_add_f32 v7, 1.0, v7 :: v_dual_add_f32 v6, 1.0, v6
; GFX11-NEXT:    v_dual_add_f32 v5, 1.0, v5 :: v_dual_add_f32 v4, 1.0, v4
; GFX11-NEXT:    v_dual_add_f32 v3, 1.0, v3 :: v_dual_add_f32 v2, 1.0, v2
; GFX11-NEXT:    v_dual_add_f32 v1, 1.0, v1 :: v_dual_add_f32 v0, 1.0, v0
; GFX11-NEXT:  .LBB2_2: ; %end
; GFX11-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = fadd <28 x float> %a, splat (float 1.000000e+00)
  %a2 = bitcast <28 x float> %a1 to <28 x i32>
  br label %end

cmp.false:
  %a3 = bitcast <28 x float> %a to <28 x i32>
  br label %end

end:
  %phi = phi <28 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <28 x i32> %phi
}

define inreg <28 x i32> @bitcast_v28f32_to_v28i32_scalar(<28 x float> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v28f32_to_v28i32_scalar:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_writelane_b32 v32, s36, 0
; SI-NEXT:    v_writelane_b32 v32, s37, 1
; SI-NEXT:    v_writelane_b32 v32, s38, 2
; SI-NEXT:    v_writelane_b32 v32, s39, 3
; SI-NEXT:    v_writelane_b32 v32, s48, 4
; SI-NEXT:    v_writelane_b32 v32, s49, 5
; SI-NEXT:    v_writelane_b32 v32, s50, 6
; SI-NEXT:    v_writelane_b32 v32, s51, 7
; SI-NEXT:    v_writelane_b32 v32, s52, 8
; SI-NEXT:    v_writelane_b32 v32, s53, 9
; SI-NEXT:    v_writelane_b32 v32, s54, 10
; SI-NEXT:    v_writelane_b32 v32, s55, 11
; SI-NEXT:    v_readfirstlane_b32 s4, v14
; SI-NEXT:    s_mov_b32 s49, s29
; SI-NEXT:    s_mov_b32 s48, s28
; SI-NEXT:    s_mov_b32 s47, s27
; SI-NEXT:    s_mov_b32 s46, s26
; SI-NEXT:    s_mov_b32 s45, s25
; SI-NEXT:    s_mov_b32 s44, s24
; SI-NEXT:    s_mov_b32 s43, s23
; SI-NEXT:    s_mov_b32 s42, s22
; SI-NEXT:    s_mov_b32 s41, s21
; SI-NEXT:    s_mov_b32 s40, s20
; SI-NEXT:    s_mov_b32 s39, s19
; SI-NEXT:    s_mov_b32 s38, s18
; SI-NEXT:    s_mov_b32 s37, s17
; SI-NEXT:    s_mov_b32 s36, s16
; SI-NEXT:    v_readfirstlane_b32 s63, v13
; SI-NEXT:    v_readfirstlane_b32 s62, v12
; SI-NEXT:    v_readfirstlane_b32 s61, v11
; SI-NEXT:    v_readfirstlane_b32 s60, v10
; SI-NEXT:    v_readfirstlane_b32 s59, v9
; SI-NEXT:    v_readfirstlane_b32 s58, v8
; SI-NEXT:    v_readfirstlane_b32 s57, v7
; SI-NEXT:    v_readfirstlane_b32 s56, v6
; SI-NEXT:    v_readfirstlane_b32 s55, v5
; SI-NEXT:    v_readfirstlane_b32 s54, v4
; SI-NEXT:    v_readfirstlane_b32 s53, v3
; SI-NEXT:    v_readfirstlane_b32 s52, v2
; SI-NEXT:    v_readfirstlane_b32 s51, v1
; SI-NEXT:    s_cmp_lg_u32 s4, 0
; SI-NEXT:    v_readfirstlane_b32 s50, v0
; SI-NEXT:    s_cbranch_scc0 .LBB3_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    v_mov_b32_e32 v0, s36
; SI-NEXT:    v_mov_b32_e32 v1, s37
; SI-NEXT:    v_mov_b32_e32 v2, s38
; SI-NEXT:    v_mov_b32_e32 v3, s39
; SI-NEXT:    v_mov_b32_e32 v4, s40
; SI-NEXT:    v_mov_b32_e32 v5, s41
; SI-NEXT:    v_mov_b32_e32 v6, s42
; SI-NEXT:    v_mov_b32_e32 v7, s43
; SI-NEXT:    v_mov_b32_e32 v8, s44
; SI-NEXT:    v_mov_b32_e32 v9, s45
; SI-NEXT:    v_mov_b32_e32 v10, s46
; SI-NEXT:    v_mov_b32_e32 v11, s47
; SI-NEXT:    v_mov_b32_e32 v12, s48
; SI-NEXT:    v_mov_b32_e32 v13, s49
; SI-NEXT:    v_mov_b32_e32 v14, s50
; SI-NEXT:    v_mov_b32_e32 v15, s51
; SI-NEXT:    v_mov_b32_e32 v16, s52
; SI-NEXT:    v_mov_b32_e32 v17, s53
; SI-NEXT:    v_mov_b32_e32 v18, s54
; SI-NEXT:    v_mov_b32_e32 v19, s55
; SI-NEXT:    v_mov_b32_e32 v20, s56
; SI-NEXT:    v_mov_b32_e32 v21, s57
; SI-NEXT:    v_mov_b32_e32 v22, s58
; SI-NEXT:    v_mov_b32_e32 v23, s59
; SI-NEXT:    v_mov_b32_e32 v24, s60
; SI-NEXT:    v_mov_b32_e32 v25, s61
; SI-NEXT:    v_mov_b32_e32 v26, s62
; SI-NEXT:    v_mov_b32_e32 v27, s63
; SI-NEXT:    v_mov_b32_e32 v28, s64
; SI-NEXT:    v_mov_b32_e32 v29, s65
; SI-NEXT:    v_mov_b32_e32 v30, s66
; SI-NEXT:    v_mov_b32_e32 v31, s67
; SI-NEXT:    s_branch .LBB3_3
; SI-NEXT:  .LBB3_2: ; %cmp.true
; SI-NEXT:    v_add_f32_e64 v27, s63, 1.0
; SI-NEXT:    v_add_f32_e64 v26, s62, 1.0
; SI-NEXT:    v_add_f32_e64 v25, s61, 1.0
; SI-NEXT:    v_add_f32_e64 v24, s60, 1.0
; SI-NEXT:    v_add_f32_e64 v23, s59, 1.0
; SI-NEXT:    v_add_f32_e64 v22, s58, 1.0
; SI-NEXT:    v_add_f32_e64 v21, s57, 1.0
; SI-NEXT:    v_add_f32_e64 v20, s56, 1.0
; SI-NEXT:    v_add_f32_e64 v19, s55, 1.0
; SI-NEXT:    v_add_f32_e64 v18, s54, 1.0
; SI-NEXT:    v_add_f32_e64 v17, s53, 1.0
; SI-NEXT:    v_add_f32_e64 v16, s52, 1.0
; SI-NEXT:    v_add_f32_e64 v15, s51, 1.0
; SI-NEXT:    v_add_f32_e64 v14, s50, 1.0
; SI-NEXT:    v_add_f32_e64 v13, s49, 1.0
; SI-NEXT:    v_add_f32_e64 v12, s48, 1.0
; SI-NEXT:    v_add_f32_e64 v11, s47, 1.0
; SI-NEXT:    v_add_f32_e64 v10, s46, 1.0
; SI-NEXT:    v_add_f32_e64 v9, s45, 1.0
; SI-NEXT:    v_add_f32_e64 v8, s44, 1.0
; SI-NEXT:    v_add_f32_e64 v7, s43, 1.0
; SI-NEXT:    v_add_f32_e64 v6, s42, 1.0
; SI-NEXT:    v_add_f32_e64 v5, s41, 1.0
; SI-NEXT:    v_add_f32_e64 v4, s40, 1.0
; SI-NEXT:    v_add_f32_e64 v3, s39, 1.0
; SI-NEXT:    v_add_f32_e64 v2, s38, 1.0
; SI-NEXT:    v_add_f32_e64 v1, s37, 1.0
; SI-NEXT:    v_add_f32_e64 v0, s36, 1.0
; SI-NEXT:  .LBB3_3: ; %end
; SI-NEXT:    v_readlane_b32 s55, v32, 11
; SI-NEXT:    v_readlane_b32 s54, v32, 10
; SI-NEXT:    v_readlane_b32 s53, v32, 9
; SI-NEXT:    v_readlane_b32 s52, v32, 8
; SI-NEXT:    v_readlane_b32 s51, v32, 7
; SI-NEXT:    v_readlane_b32 s50, v32, 6
; SI-NEXT:    v_readlane_b32 s49, v32, 5
; SI-NEXT:    v_readlane_b32 s48, v32, 4
; SI-NEXT:    v_readlane_b32 s39, v32, 3
; SI-NEXT:    v_readlane_b32 s38, v32, 2
; SI-NEXT:    v_readlane_b32 s37, v32, 1
; SI-NEXT:    v_readlane_b32 s36, v32, 0
; SI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v28f32_to_v28i32_scalar:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    v_writelane_b32 v32, s36, 0
; VI-NEXT:    v_writelane_b32 v32, s37, 1
; VI-NEXT:    v_writelane_b32 v32, s38, 2
; VI-NEXT:    v_writelane_b32 v32, s39, 3
; VI-NEXT:    v_writelane_b32 v32, s48, 4
; VI-NEXT:    v_writelane_b32 v32, s49, 5
; VI-NEXT:    v_writelane_b32 v32, s50, 6
; VI-NEXT:    v_writelane_b32 v32, s51, 7
; VI-NEXT:    v_writelane_b32 v32, s52, 8
; VI-NEXT:    v_writelane_b32 v32, s53, 9
; VI-NEXT:    v_writelane_b32 v32, s54, 10
; VI-NEXT:    v_writelane_b32 v32, s55, 11
; VI-NEXT:    v_readfirstlane_b32 s4, v14
; VI-NEXT:    s_mov_b32 s49, s29
; VI-NEXT:    s_mov_b32 s48, s28
; VI-NEXT:    s_mov_b32 s47, s27
; VI-NEXT:    s_mov_b32 s46, s26
; VI-NEXT:    s_mov_b32 s45, s25
; VI-NEXT:    s_mov_b32 s44, s24
; VI-NEXT:    s_mov_b32 s43, s23
; VI-NEXT:    s_mov_b32 s42, s22
; VI-NEXT:    s_mov_b32 s41, s21
; VI-NEXT:    s_mov_b32 s40, s20
; VI-NEXT:    s_mov_b32 s39, s19
; VI-NEXT:    s_mov_b32 s38, s18
; VI-NEXT:    s_mov_b32 s37, s17
; VI-NEXT:    s_mov_b32 s36, s16
; VI-NEXT:    v_readfirstlane_b32 s63, v13
; VI-NEXT:    v_readfirstlane_b32 s62, v12
; VI-NEXT:    v_readfirstlane_b32 s61, v11
; VI-NEXT:    v_readfirstlane_b32 s60, v10
; VI-NEXT:    v_readfirstlane_b32 s59, v9
; VI-NEXT:    v_readfirstlane_b32 s58, v8
; VI-NEXT:    v_readfirstlane_b32 s57, v7
; VI-NEXT:    v_readfirstlane_b32 s56, v6
; VI-NEXT:    v_readfirstlane_b32 s55, v5
; VI-NEXT:    v_readfirstlane_b32 s54, v4
; VI-NEXT:    v_readfirstlane_b32 s53, v3
; VI-NEXT:    v_readfirstlane_b32 s52, v2
; VI-NEXT:    v_readfirstlane_b32 s51, v1
; VI-NEXT:    s_cmp_lg_u32 s4, 0
; VI-NEXT:    v_readfirstlane_b32 s50, v0
; VI-NEXT:    s_cbranch_scc0 .LBB3_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    v_mov_b32_e32 v0, s36
; VI-NEXT:    v_mov_b32_e32 v1, s37
; VI-NEXT:    v_mov_b32_e32 v2, s38
; VI-NEXT:    v_mov_b32_e32 v3, s39
; VI-NEXT:    v_mov_b32_e32 v4, s40
; VI-NEXT:    v_mov_b32_e32 v5, s41
; VI-NEXT:    v_mov_b32_e32 v6, s42
; VI-NEXT:    v_mov_b32_e32 v7, s43
; VI-NEXT:    v_mov_b32_e32 v8, s44
; VI-NEXT:    v_mov_b32_e32 v9, s45
; VI-NEXT:    v_mov_b32_e32 v10, s46
; VI-NEXT:    v_mov_b32_e32 v11, s47
; VI-NEXT:    v_mov_b32_e32 v12, s48
; VI-NEXT:    v_mov_b32_e32 v13, s49
; VI-NEXT:    v_mov_b32_e32 v14, s50
; VI-NEXT:    v_mov_b32_e32 v15, s51
; VI-NEXT:    v_mov_b32_e32 v16, s52
; VI-NEXT:    v_mov_b32_e32 v17, s53
; VI-NEXT:    v_mov_b32_e32 v18, s54
; VI-NEXT:    v_mov_b32_e32 v19, s55
; VI-NEXT:    v_mov_b32_e32 v20, s56
; VI-NEXT:    v_mov_b32_e32 v21, s57
; VI-NEXT:    v_mov_b32_e32 v22, s58
; VI-NEXT:    v_mov_b32_e32 v23, s59
; VI-NEXT:    v_mov_b32_e32 v24, s60
; VI-NEXT:    v_mov_b32_e32 v25, s61
; VI-NEXT:    v_mov_b32_e32 v26, s62
; VI-NEXT:    v_mov_b32_e32 v27, s63
; VI-NEXT:    v_mov_b32_e32 v28, s64
; VI-NEXT:    v_mov_b32_e32 v29, s65
; VI-NEXT:    v_mov_b32_e32 v30, s66
; VI-NEXT:    v_mov_b32_e32 v31, s67
; VI-NEXT:    s_branch .LBB3_3
; VI-NEXT:  .LBB3_2: ; %cmp.true
; VI-NEXT:    v_add_f32_e64 v27, s63, 1.0
; VI-NEXT:    v_add_f32_e64 v26, s62, 1.0
; VI-NEXT:    v_add_f32_e64 v25, s61, 1.0
; VI-NEXT:    v_add_f32_e64 v24, s60, 1.0
; VI-NEXT:    v_add_f32_e64 v23, s59, 1.0
; VI-NEXT:    v_add_f32_e64 v22, s58, 1.0
; VI-NEXT:    v_add_f32_e64 v21, s57, 1.0
; VI-NEXT:    v_add_f32_e64 v20, s56, 1.0
; VI-NEXT:    v_add_f32_e64 v19, s55, 1.0
; VI-NEXT:    v_add_f32_e64 v18, s54, 1.0
; VI-NEXT:    v_add_f32_e64 v17, s53, 1.0
; VI-NEXT:    v_add_f32_e64 v16, s52, 1.0
; VI-NEXT:    v_add_f32_e64 v15, s51, 1.0
; VI-NEXT:    v_add_f32_e64 v14, s50, 1.0
; VI-NEXT:    v_add_f32_e64 v13, s49, 1.0
; VI-NEXT:    v_add_f32_e64 v12, s48, 1.0
; VI-NEXT:    v_add_f32_e64 v11, s47, 1.0
; VI-NEXT:    v_add_f32_e64 v10, s46, 1.0
; VI-NEXT:    v_add_f32_e64 v9, s45, 1.0
; VI-NEXT:    v_add_f32_e64 v8, s44, 1.0
; VI-NEXT:    v_add_f32_e64 v7, s43, 1.0
; VI-NEXT:    v_add_f32_e64 v6, s42, 1.0
; VI-NEXT:    v_add_f32_e64 v5, s41, 1.0
; VI-NEXT:    v_add_f32_e64 v4, s40, 1.0
; VI-NEXT:    v_add_f32_e64 v3, s39, 1.0
; VI-NEXT:    v_add_f32_e64 v2, s38, 1.0
; VI-NEXT:    v_add_f32_e64 v1, s37, 1.0
; VI-NEXT:    v_add_f32_e64 v0, s36, 1.0
; VI-NEXT:  .LBB3_3: ; %end
; VI-NEXT:    v_readlane_b32 s55, v32, 11
; VI-NEXT:    v_readlane_b32 s54, v32, 10
; VI-NEXT:    v_readlane_b32 s53, v32, 9
; VI-NEXT:    v_readlane_b32 s52, v32, 8
; VI-NEXT:    v_readlane_b32 s51, v32, 7
; VI-NEXT:    v_readlane_b32 s50, v32, 6
; VI-NEXT:    v_readlane_b32 s49, v32, 5
; VI-NEXT:    v_readlane_b32 s48, v32, 4
; VI-NEXT:    v_readlane_b32 s39, v32, 3
; VI-NEXT:    v_readlane_b32 s38, v32, 2
; VI-NEXT:    v_readlane_b32 s37, v32, 1
; VI-NEXT:    v_readlane_b32 s36, v32, 0
; VI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v28f32_to_v28i32_scalar:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    s_mov_b64 exec, s[4:5]
; GFX9-NEXT:    v_writelane_b32 v32, s36, 0
; GFX9-NEXT:    v_writelane_b32 v32, s37, 1
; GFX9-NEXT:    v_writelane_b32 v32, s38, 2
; GFX9-NEXT:    v_writelane_b32 v32, s39, 3
; GFX9-NEXT:    v_writelane_b32 v32, s48, 4
; GFX9-NEXT:    v_writelane_b32 v32, s49, 5
; GFX9-NEXT:    v_writelane_b32 v32, s50, 6
; GFX9-NEXT:    v_writelane_b32 v32, s51, 7
; GFX9-NEXT:    v_writelane_b32 v32, s52, 8
; GFX9-NEXT:    v_writelane_b32 v32, s53, 9
; GFX9-NEXT:    v_writelane_b32 v32, s54, 10
; GFX9-NEXT:    v_writelane_b32 v32, s55, 11
; GFX9-NEXT:    v_readfirstlane_b32 s4, v14
; GFX9-NEXT:    s_mov_b32 s49, s29
; GFX9-NEXT:    s_mov_b32 s48, s28
; GFX9-NEXT:    s_mov_b32 s47, s27
; GFX9-NEXT:    s_mov_b32 s46, s26
; GFX9-NEXT:    s_mov_b32 s45, s25
; GFX9-NEXT:    s_mov_b32 s44, s24
; GFX9-NEXT:    s_mov_b32 s43, s23
; GFX9-NEXT:    s_mov_b32 s42, s22
; GFX9-NEXT:    s_mov_b32 s41, s21
; GFX9-NEXT:    s_mov_b32 s40, s20
; GFX9-NEXT:    s_mov_b32 s39, s19
; GFX9-NEXT:    s_mov_b32 s38, s18
; GFX9-NEXT:    s_mov_b32 s37, s17
; GFX9-NEXT:    s_mov_b32 s36, s16
; GFX9-NEXT:    v_readfirstlane_b32 s63, v13
; GFX9-NEXT:    v_readfirstlane_b32 s62, v12
; GFX9-NEXT:    v_readfirstlane_b32 s61, v11
; GFX9-NEXT:    v_readfirstlane_b32 s60, v10
; GFX9-NEXT:    v_readfirstlane_b32 s59, v9
; GFX9-NEXT:    v_readfirstlane_b32 s58, v8
; GFX9-NEXT:    v_readfirstlane_b32 s57, v7
; GFX9-NEXT:    v_readfirstlane_b32 s56, v6
; GFX9-NEXT:    v_readfirstlane_b32 s55, v5
; GFX9-NEXT:    v_readfirstlane_b32 s54, v4
; GFX9-NEXT:    v_readfirstlane_b32 s53, v3
; GFX9-NEXT:    v_readfirstlane_b32 s52, v2
; GFX9-NEXT:    v_readfirstlane_b32 s51, v1
; GFX9-NEXT:    s_cmp_lg_u32 s4, 0
; GFX9-NEXT:    v_readfirstlane_b32 s50, v0
; GFX9-NEXT:    s_cbranch_scc0 .LBB3_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    v_mov_b32_e32 v0, s36
; GFX9-NEXT:    v_mov_b32_e32 v1, s37
; GFX9-NEXT:    v_mov_b32_e32 v2, s38
; GFX9-NEXT:    v_mov_b32_e32 v3, s39
; GFX9-NEXT:    v_mov_b32_e32 v4, s40
; GFX9-NEXT:    v_mov_b32_e32 v5, s41
; GFX9-NEXT:    v_mov_b32_e32 v6, s42
; GFX9-NEXT:    v_mov_b32_e32 v7, s43
; GFX9-NEXT:    v_mov_b32_e32 v8, s44
; GFX9-NEXT:    v_mov_b32_e32 v9, s45
; GFX9-NEXT:    v_mov_b32_e32 v10, s46
; GFX9-NEXT:    v_mov_b32_e32 v11, s47
; GFX9-NEXT:    v_mov_b32_e32 v12, s48
; GFX9-NEXT:    v_mov_b32_e32 v13, s49
; GFX9-NEXT:    v_mov_b32_e32 v14, s50
; GFX9-NEXT:    v_mov_b32_e32 v15, s51
; GFX9-NEXT:    v_mov_b32_e32 v16, s52
; GFX9-NEXT:    v_mov_b32_e32 v17, s53
; GFX9-NEXT:    v_mov_b32_e32 v18, s54
; GFX9-NEXT:    v_mov_b32_e32 v19, s55
; GFX9-NEXT:    v_mov_b32_e32 v20, s56
; GFX9-NEXT:    v_mov_b32_e32 v21, s57
; GFX9-NEXT:    v_mov_b32_e32 v22, s58
; GFX9-NEXT:    v_mov_b32_e32 v23, s59
; GFX9-NEXT:    v_mov_b32_e32 v24, s60
; GFX9-NEXT:    v_mov_b32_e32 v25, s61
; GFX9-NEXT:    v_mov_b32_e32 v26, s62
; GFX9-NEXT:    v_mov_b32_e32 v27, s63
; GFX9-NEXT:    v_mov_b32_e32 v28, s64
; GFX9-NEXT:    v_mov_b32_e32 v29, s65
; GFX9-NEXT:    v_mov_b32_e32 v30, s66
; GFX9-NEXT:    v_mov_b32_e32 v31, s67
; GFX9-NEXT:    s_branch .LBB3_3
; GFX9-NEXT:  .LBB3_2: ; %cmp.true
; GFX9-NEXT:    v_add_f32_e64 v27, s63, 1.0
; GFX9-NEXT:    v_add_f32_e64 v26, s62, 1.0
; GFX9-NEXT:    v_add_f32_e64 v25, s61, 1.0
; GFX9-NEXT:    v_add_f32_e64 v24, s60, 1.0
; GFX9-NEXT:    v_add_f32_e64 v23, s59, 1.0
; GFX9-NEXT:    v_add_f32_e64 v22, s58, 1.0
; GFX9-NEXT:    v_add_f32_e64 v21, s57, 1.0
; GFX9-NEXT:    v_add_f32_e64 v20, s56, 1.0
; GFX9-NEXT:    v_add_f32_e64 v19, s55, 1.0
; GFX9-NEXT:    v_add_f32_e64 v18, s54, 1.0
; GFX9-NEXT:    v_add_f32_e64 v17, s53, 1.0
; GFX9-NEXT:    v_add_f32_e64 v16, s52, 1.0
; GFX9-NEXT:    v_add_f32_e64 v15, s51, 1.0
; GFX9-NEXT:    v_add_f32_e64 v14, s50, 1.0
; GFX9-NEXT:    v_add_f32_e64 v13, s49, 1.0
; GFX9-NEXT:    v_add_f32_e64 v12, s48, 1.0
; GFX9-NEXT:    v_add_f32_e64 v11, s47, 1.0
; GFX9-NEXT:    v_add_f32_e64 v10, s46, 1.0
; GFX9-NEXT:    v_add_f32_e64 v9, s45, 1.0
; GFX9-NEXT:    v_add_f32_e64 v8, s44, 1.0
; GFX9-NEXT:    v_add_f32_e64 v7, s43, 1.0
; GFX9-NEXT:    v_add_f32_e64 v6, s42, 1.0
; GFX9-NEXT:    v_add_f32_e64 v5, s41, 1.0
; GFX9-NEXT:    v_add_f32_e64 v4, s40, 1.0
; GFX9-NEXT:    v_add_f32_e64 v3, s39, 1.0
; GFX9-NEXT:    v_add_f32_e64 v2, s38, 1.0
; GFX9-NEXT:    v_add_f32_e64 v1, s37, 1.0
; GFX9-NEXT:    v_add_f32_e64 v0, s36, 1.0
; GFX9-NEXT:  .LBB3_3: ; %end
; GFX9-NEXT:    v_readlane_b32 s55, v32, 11
; GFX9-NEXT:    v_readlane_b32 s54, v32, 10
; GFX9-NEXT:    v_readlane_b32 s53, v32, 9
; GFX9-NEXT:    v_readlane_b32 s52, v32, 8
; GFX9-NEXT:    v_readlane_b32 s51, v32, 7
; GFX9-NEXT:    v_readlane_b32 s50, v32, 6
; GFX9-NEXT:    v_readlane_b32 s49, v32, 5
; GFX9-NEXT:    v_readlane_b32 s48, v32, 4
; GFX9-NEXT:    v_readlane_b32 s39, v32, 3
; GFX9-NEXT:    v_readlane_b32 s38, v32, 2
; GFX9-NEXT:    v_readlane_b32 s37, v32, 1
; GFX9-NEXT:    v_readlane_b32 s36, v32, 0
; GFX9-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    s_mov_b64 exec, s[4:5]
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v28f32_to_v28i32_scalar:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    s_xor_saveexec_b32 s4, -1
; GFX11-NEXT:    scratch_store_b32 off, v32, s32 ; 4-byte Folded Spill
; GFX11-NEXT:    s_mov_b32 exec_lo, s4
; GFX11-NEXT:    v_writelane_b32 v32, s36, 0
; GFX11-NEXT:    v_writelane_b32 v32, s37, 1
; GFX11-NEXT:    v_writelane_b32 v32, s38, 2
; GFX11-NEXT:    v_writelane_b32 v32, s39, 3
; GFX11-NEXT:    v_writelane_b32 v32, s48, 4
; GFX11-NEXT:    v_writelane_b32 v32, s49, 5
; GFX11-NEXT:    v_writelane_b32 v32, s50, 6
; GFX11-NEXT:    v_writelane_b32 v32, s51, 7
; GFX11-NEXT:    v_writelane_b32 v32, s52, 8
; GFX11-NEXT:    v_writelane_b32 v32, s53, 9
; GFX11-NEXT:    v_writelane_b32 v32, s54, 10
; GFX11-NEXT:    v_writelane_b32 v32, s55, 11
; GFX11-NEXT:    s_mov_b32 s36, s0
; GFX11-NEXT:    v_readfirstlane_b32 s0, v10
; GFX11-NEXT:    v_readfirstlane_b32 s63, v9
; GFX11-NEXT:    v_readfirstlane_b32 s62, v8
; GFX11-NEXT:    v_readfirstlane_b32 s61, v7
; GFX11-NEXT:    v_readfirstlane_b32 s60, v6
; GFX11-NEXT:    v_readfirstlane_b32 s59, v5
; GFX11-NEXT:    v_readfirstlane_b32 s58, v4
; GFX11-NEXT:    v_readfirstlane_b32 s57, v3
; GFX11-NEXT:    v_readfirstlane_b32 s56, v2
; GFX11-NEXT:    v_readfirstlane_b32 s55, v1
; GFX11-NEXT:    v_readfirstlane_b32 s54, v0
; GFX11-NEXT:    s_mov_b32 s53, s29
; GFX11-NEXT:    s_mov_b32 s52, s28
; GFX11-NEXT:    s_mov_b32 s51, s27
; GFX11-NEXT:    s_mov_b32 s50, s26
; GFX11-NEXT:    s_mov_b32 s49, s25
; GFX11-NEXT:    s_mov_b32 s48, s24
; GFX11-NEXT:    s_mov_b32 s47, s23
; GFX11-NEXT:    s_mov_b32 s46, s22
; GFX11-NEXT:    s_mov_b32 s45, s21
; GFX11-NEXT:    s_mov_b32 s44, s20
; GFX11-NEXT:    s_mov_b32 s43, s19
; GFX11-NEXT:    s_mov_b32 s42, s18
; GFX11-NEXT:    s_mov_b32 s41, s17
; GFX11-NEXT:    s_mov_b32 s40, s16
; GFX11-NEXT:    s_mov_b32 s39, s3
; GFX11-NEXT:    s_mov_b32 s38, s2
; GFX11-NEXT:    s_mov_b32 s37, s1
; GFX11-NEXT:    s_cmp_lg_u32 s0, 0
; GFX11-NEXT:    s_cbranch_scc0 .LBB3_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-NEXT:    v_dual_mov_b32 v0, s36 :: v_dual_mov_b32 v1, s37
; GFX11-NEXT:    v_dual_mov_b32 v2, s38 :: v_dual_mov_b32 v3, s39
; GFX11-NEXT:    v_dual_mov_b32 v4, s40 :: v_dual_mov_b32 v5, s41
; GFX11-NEXT:    v_dual_mov_b32 v6, s42 :: v_dual_mov_b32 v7, s43
; GFX11-NEXT:    v_dual_mov_b32 v8, s44 :: v_dual_mov_b32 v9, s45
; GFX11-NEXT:    v_dual_mov_b32 v10, s46 :: v_dual_mov_b32 v11, s47
; GFX11-NEXT:    v_dual_mov_b32 v12, s48 :: v_dual_mov_b32 v13, s49
; GFX11-NEXT:    v_dual_mov_b32 v14, s50 :: v_dual_mov_b32 v15, s51
; GFX11-NEXT:    v_dual_mov_b32 v16, s52 :: v_dual_mov_b32 v17, s53
; GFX11-NEXT:    v_dual_mov_b32 v18, s54 :: v_dual_mov_b32 v19, s55
; GFX11-NEXT:    v_dual_mov_b32 v20, s56 :: v_dual_mov_b32 v21, s57
; GFX11-NEXT:    v_dual_mov_b32 v22, s58 :: v_dual_mov_b32 v23, s59
; GFX11-NEXT:    v_dual_mov_b32 v24, s60 :: v_dual_mov_b32 v25, s61
; GFX11-NEXT:    v_dual_mov_b32 v26, s62 :: v_dual_mov_b32 v27, s63
; GFX11-NEXT:    v_dual_mov_b32 v28, s64 :: v_dual_mov_b32 v29, s65
; GFX11-NEXT:    v_dual_mov_b32 v30, s66 :: v_dual_mov_b32 v31, s67
; GFX11-NEXT:    s_branch .LBB3_3
; GFX11-NEXT:  .LBB3_2: ; %cmp.true
; GFX11-NEXT:    v_add_f32_e64 v27, s63, 1.0
; GFX11-NEXT:    v_add_f32_e64 v26, s62, 1.0
; GFX11-NEXT:    v_add_f32_e64 v25, s61, 1.0
; GFX11-NEXT:    v_add_f32_e64 v24, s60, 1.0
; GFX11-NEXT:    v_add_f32_e64 v23, s59, 1.0
; GFX11-NEXT:    v_add_f32_e64 v22, s58, 1.0
; GFX11-NEXT:    v_add_f32_e64 v21, s57, 1.0
; GFX11-NEXT:    v_add_f32_e64 v20, s56, 1.0
; GFX11-NEXT:    v_add_f32_e64 v19, s55, 1.0
; GFX11-NEXT:    v_add_f32_e64 v18, s54, 1.0
; GFX11-NEXT:    v_add_f32_e64 v17, s53, 1.0
; GFX11-NEXT:    v_add_f32_e64 v16, s52, 1.0
; GFX11-NEXT:    v_add_f32_e64 v15, s51, 1.0
; GFX11-NEXT:    v_add_f32_e64 v14, s50, 1.0
; GFX11-NEXT:    v_add_f32_e64 v13, s49, 1.0
; GFX11-NEXT:    v_add_f32_e64 v12, s48, 1.0
; GFX11-NEXT:    v_add_f32_e64 v11, s47, 1.0
; GFX11-NEXT:    v_add_f32_e64 v10, s46, 1.0
; GFX11-NEXT:    v_add_f32_e64 v9, s45, 1.0
; GFX11-NEXT:    v_add_f32_e64 v8, s44, 1.0
; GFX11-NEXT:    v_add_f32_e64 v7, s43, 1.0
; GFX11-NEXT:    v_add_f32_e64 v6, s42, 1.0
; GFX11-NEXT:    v_add_f32_e64 v5, s41, 1.0
; GFX11-NEXT:    v_add_f32_e64 v4, s40, 1.0
; GFX11-NEXT:    v_add_f32_e64 v3, s39, 1.0
; GFX11-NEXT:    v_add_f32_e64 v2, s38, 1.0
; GFX11-NEXT:    v_add_f32_e64 v1, s37, 1.0
; GFX11-NEXT:    v_add_f32_e64 v0, s36, 1.0
; GFX11-NEXT:  .LBB3_3: ; %end
; GFX11-NEXT:    v_readlane_b32 s55, v32, 11
; GFX11-NEXT:    v_readlane_b32 s54, v32, 10
; GFX11-NEXT:    v_readlane_b32 s53, v32, 9
; GFX11-NEXT:    v_readlane_b32 s52, v32, 8
; GFX11-NEXT:    v_readlane_b32 s51, v32, 7
; GFX11-NEXT:    v_readlane_b32 s50, v32, 6
; GFX11-NEXT:    v_readlane_b32 s49, v32, 5
; GFX11-NEXT:    v_readlane_b32 s48, v32, 4
; GFX11-NEXT:    v_readlane_b32 s39, v32, 3
; GFX11-NEXT:    v_readlane_b32 s38, v32, 2
; GFX11-NEXT:    v_readlane_b32 s37, v32, 1
; GFX11-NEXT:    v_readlane_b32 s36, v32, 0
; GFX11-NEXT:    s_xor_saveexec_b32 s0, -1
; GFX11-NEXT:    scratch_load_b32 v32, off, s32 ; 4-byte Folded Reload
; GFX11-NEXT:    s_mov_b32 exec_lo, s0
; GFX11-NEXT:    s_waitcnt vmcnt(0)
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = fadd <28 x float> %a, splat (float 1.000000e+00)
  %a2 = bitcast <28 x float> %a1 to <28 x i32>
  br label %end

cmp.false:
  %a3 = bitcast <28 x float> %a to <28 x i32>
  br label %end

end:
  %phi = phi <28 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <28 x i32> %phi
}

define <14 x i64> @bitcast_v28i32_to_v14i64(<28 x i32> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v28i32_to_v14i64:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB4_2
; SI-NEXT:  ; %bb.1: ; %cmp.true
; SI-NEXT:    v_add_i32_e32 v27, vcc, 3, v27
; SI-NEXT:    v_add_i32_e32 v26, vcc, 3, v26
; SI-NEXT:    v_add_i32_e32 v25, vcc, 3, v25
; SI-NEXT:    v_add_i32_e32 v24, vcc, 3, v24
; SI-NEXT:    v_add_i32_e32 v23, vcc, 3, v23
; SI-NEXT:    v_add_i32_e32 v22, vcc, 3, v22
; SI-NEXT:    v_add_i32_e32 v21, vcc, 3, v21
; SI-NEXT:    v_add_i32_e32 v20, vcc, 3, v20
; SI-NEXT:    v_add_i32_e32 v19, vcc, 3, v19
; SI-NEXT:    v_add_i32_e32 v18, vcc, 3, v18
; SI-NEXT:    v_add_i32_e32 v17, vcc, 3, v17
; SI-NEXT:    v_add_i32_e32 v16, vcc, 3, v16
; SI-NEXT:    v_add_i32_e32 v15, vcc, 3, v15
; SI-NEXT:    v_add_i32_e32 v14, vcc, 3, v14
; SI-NEXT:    v_add_i32_e32 v13, vcc, 3, v13
; SI-NEXT:    v_add_i32_e32 v12, vcc, 3, v12
; SI-NEXT:    v_add_i32_e32 v11, vcc, 3, v11
; SI-NEXT:    v_add_i32_e32 v10, vcc, 3, v10
; SI-NEXT:    v_add_i32_e32 v9, vcc, 3, v9
; SI-NEXT:    v_add_i32_e32 v8, vcc, 3, v8
; SI-NEXT:    v_add_i32_e32 v7, vcc, 3, v7
; SI-NEXT:    v_add_i32_e32 v6, vcc, 3, v6
; SI-NEXT:    v_add_i32_e32 v5, vcc, 3, v5
; SI-NEXT:    v_add_i32_e32 v4, vcc, 3, v4
; SI-NEXT:    v_add_i32_e32 v3, vcc, 3, v3
; SI-NEXT:    v_add_i32_e32 v2, vcc, 3, v2
; SI-NEXT:    v_add_i32_e32 v1, vcc, 3, v1
; SI-NEXT:    v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT:  .LBB4_2: ; %end
; SI-NEXT:    s_or_b64 exec, exec, s[4:5]
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v28i32_to_v14i64:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB4_2
; VI-NEXT:  ; %bb.1: ; %cmp.true
; VI-NEXT:    v_add_u32_e32 v27, vcc, 3, v27
; VI-NEXT:    v_add_u32_e32 v26, vcc, 3, v26
; VI-NEXT:    v_add_u32_e32 v25, vcc, 3, v25
; VI-NEXT:    v_add_u32_e32 v24, vcc, 3, v24
; VI-NEXT:    v_add_u32_e32 v23, vcc, 3, v23
; VI-NEXT:    v_add_u32_e32 v22, vcc, 3, v22
; VI-NEXT:    v_add_u32_e32 v21, vcc, 3, v21
; VI-NEXT:    v_add_u32_e32 v20, vcc, 3, v20
; VI-NEXT:    v_add_u32_e32 v19, vcc, 3, v19
; VI-NEXT:    v_add_u32_e32 v18, vcc, 3, v18
; VI-NEXT:    v_add_u32_e32 v17, vcc, 3, v17
; VI-NEXT:    v_add_u32_e32 v16, vcc, 3, v16
; VI-NEXT:    v_add_u32_e32 v15, vcc, 3, v15
; VI-NEXT:    v_add_u32_e32 v14, vcc, 3, v14
; VI-NEXT:    v_add_u32_e32 v13, vcc, 3, v13
; VI-NEXT:    v_add_u32_e32 v12, vcc, 3, v12
; VI-NEXT:    v_add_u32_e32 v11, vcc, 3, v11
; VI-NEXT:    v_add_u32_e32 v10, vcc, 3, v10
; VI-NEXT:    v_add_u32_e32 v9, vcc, 3, v9
; VI-NEXT:    v_add_u32_e32 v8, vcc, 3, v8
; VI-NEXT:    v_add_u32_e32 v7, vcc, 3, v7
; VI-NEXT:    v_add_u32_e32 v6, vcc, 3, v6
; VI-NEXT:    v_add_u32_e32 v5, vcc, 3, v5
; VI-NEXT:    v_add_u32_e32 v4, vcc, 3, v4
; VI-NEXT:    v_add_u32_e32 v3, vcc, 3, v3
; VI-NEXT:    v_add_u32_e32 v2, vcc, 3, v2
; VI-NEXT:    v_add_u32_e32 v1, vcc, 3, v1
; VI-NEXT:    v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT:  .LBB4_2: ; %end
; VI-NEXT:    s_or_b64 exec, exec, s[4:5]
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v28i32_to_v14i64:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB4_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.true
; GFX9-NEXT:    v_add_u32_e32 v27, 3, v27
; GFX9-NEXT:    v_add_u32_e32 v26, 3, v26
; GFX9-NEXT:    v_add_u32_e32 v25, 3, v25
; GFX9-NEXT:    v_add_u32_e32 v24, 3, v24
; GFX9-NEXT:    v_add_u32_e32 v23, 3, v23
; GFX9-NEXT:    v_add_u32_e32 v22, 3, v22
; GFX9-NEXT:    v_add_u32_e32 v21, 3, v21
; GFX9-NEXT:    v_add_u32_e32 v20, 3, v20
; GFX9-NEXT:    v_add_u32_e32 v19, 3, v19
; GFX9-NEXT:    v_add_u32_e32 v18, 3, v18
; GFX9-NEXT:    v_add_u32_e32 v17, 3, v17
; GFX9-NEXT:    v_add_u32_e32 v16, 3, v16
; GFX9-NEXT:    v_add_u32_e32 v15, 3, v15
; GFX9-NEXT:    v_add_u32_e32 v14, 3, v14
; GFX9-NEXT:    v_add_u32_e32 v13, 3, v13
; GFX9-NEXT:    v_add_u32_e32 v12, 3, v12
; GFX9-NEXT:    v_add_u32_e32 v11, 3, v11
; GFX9-NEXT:    v_add_u32_e32 v10, 3, v10
; GFX9-NEXT:    v_add_u32_e32 v9, 3, v9
; GFX9-NEXT:    v_add_u32_e32 v8, 3, v8
; GFX9-NEXT:    v_add_u32_e32 v7, 3, v7
; GFX9-NEXT:    v_add_u32_e32 v6, 3, v6
; GFX9-NEXT:    v_add_u32_e32 v5, 3, v5
; GFX9-NEXT:    v_add_u32_e32 v4, 3, v4
; GFX9-NEXT:    v_add_u32_e32 v3, 3, v3
; GFX9-NEXT:    v_add_u32_e32 v2, 3, v2
; GFX9-NEXT:    v_add_u32_e32 v1, 3, v1
; GFX9-NEXT:    v_add_u32_e32 v0, 3, v0
; GFX9-NEXT:  .LBB4_2: ; %end
; GFX9-NEXT:    s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v28i32_to_v14i64:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-NEXT:    s_cbranch_execz .LBB4_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-NEXT:    v_add_nc_u32_e32 v27, 3, v27
; GFX11-NEXT:    v_add_nc_u32_e32 v26, 3, v26
; GFX11-NEXT:    v_add_nc_u32_e32 v25, 3, v25
; GFX11-NEXT:    v_add_nc_u32_e32 v24, 3, v24
; GFX11-NEXT:    v_add_nc_u32_e32 v23, 3, v23
; GFX11-NEXT:    v_add_nc_u32_e32 v22, 3, v22
; GFX11-NEXT:    v_add_nc_u32_e32 v21, 3, v21
; GFX11-NEXT:    v_add_nc_u32_e32 v20, 3, v20
; GFX11-NEXT:    v_add_nc_u32_e32 v19, 3, v19
; GFX11-NEXT:    v_add_nc_u32_e32 v18, 3, v18
; GFX11-NEXT:    v_add_nc_u32_e32 v17, 3, v17
; GFX11-NEXT:    v_add_nc_u32_e32 v16, 3, v16
; GFX11-NEXT:    v_add_nc_u32_e32 v15, 3, v15
; GFX11-NEXT:    v_add_nc_u32_e32 v14, 3, v14
; GFX11-NEXT:    v_add_nc_u32_e32 v13, 3, v13
; GFX11-NEXT:    v_add_nc_u32_e32 v12, 3, v12
; GFX11-NEXT:    v_add_nc_u32_e32 v11, 3, v11
; GFX11-NEXT:    v_add_nc_u32_e32 v10, 3, v10
; GFX11-NEXT:    v_add_nc_u32_e32 v9, 3, v9
; GFX11-NEXT:    v_add_nc_u32_e32 v8, 3, v8
; GFX11-NEXT:    v_add_nc_u32_e32 v7, 3, v7
; GFX11-NEXT:    v_add_nc_u32_e32 v6, 3, v6
; GFX11-NEXT:    v_add_nc_u32_e32 v5, 3, v5
; GFX11-NEXT:    v_add_nc_u32_e32 v4, 3, v4
; GFX11-NEXT:    v_add_nc_u32_e32 v3, 3, v3
; GFX11-NEXT:    v_add_nc_u32_e32 v2, 3, v2
; GFX11-NEXT:    v_add_nc_u32_e32 v1, 3, v1
; GFX11-NEXT:    v_add_nc_u32_e32 v0, 3, v0
; GFX11-NEXT:  .LBB4_2: ; %end
; GFX11-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = add <28 x i32> %a, splat (i32 3)
  %a2 = bitcast <28 x i32> %a1 to <14 x i64>
  br label %end

cmp.false:
  %a3 = bitcast <28 x i32> %a to <14 x i64>
  br label %end

end:
  %phi = phi <14 x i64> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <14 x i64> %phi
}

define inreg <14 x i64> @bitcast_v28i32_to_v14i64_scalar(<28 x i32> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v28i32_to_v14i64_scalar:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    v_readfirstlane_b32 s41, v14
; SI-NEXT:    v_readfirstlane_b32 s4, v13
; SI-NEXT:    v_readfirstlane_b32 s5, v12
; SI-NEXT:    v_readfirstlane_b32 s6, v11
; SI-NEXT:    v_readfirstlane_b32 s7, v10
; SI-NEXT:    v_readfirstlane_b32 s8, v9
; SI-NEXT:    v_readfirstlane_b32 s9, v8
; SI-NEXT:    v_readfirstlane_b32 s10, v7
; SI-NEXT:    v_readfirstlane_b32 s11, v6
; SI-NEXT:    v_readfirstlane_b32 s12, v5
; SI-NEXT:    v_readfirstlane_b32 s13, v4
; SI-NEXT:    v_readfirstlane_b32 s14, v3
; SI-NEXT:    v_readfirstlane_b32 s15, v2
; SI-NEXT:    v_readfirstlane_b32 s40, v1
; SI-NEXT:    s_cmp_lg_u32 s41, 0
; SI-NEXT:    v_readfirstlane_b32 s41, v0
; SI-NEXT:    s_cbranch_scc1 .LBB5_2
; SI-NEXT:  ; %bb.1: ; %cmp.true
; SI-NEXT:    s_add_i32 s4, s4, 3
; SI-NEXT:    s_add_i32 s5, s5, 3
; SI-NEXT:    s_add_i32 s6, s6, 3
; SI-NEXT:    s_add_i32 s7, s7, 3
; SI-NEXT:    s_add_i32 s8, s8, 3
; SI-NEXT:    s_add_i32 s9, s9, 3
; SI-NEXT:    s_add_i32 s10, s10, 3
; SI-NEXT:    s_add_i32 s11, s11, 3
; SI-NEXT:    s_add_i32 s12, s12, 3
; SI-NEXT:    s_add_i32 s13, s13, 3
; SI-NEXT:    s_add_i32 s14, s14, 3
; SI-NEXT:    s_add_i32 s15, s15, 3
; SI-NEXT:    s_add_i32 s40, s40, 3
; SI-NEXT:    s_add_i32 s41, s41, 3
; SI-NEXT:    s_add_i32 s29, s29, 3
; SI-NEXT:    s_add_i32 s28, s28, 3
; SI-NEXT:    s_add_i32 s27, s27, 3
; SI-NEXT:    s_add_i32 s26, s26, 3
; SI-NEXT:    s_add_i32 s25, s25, 3
; SI-NEXT:    s_add_i32 s24, s24, 3
; SI-NEXT:    s_add_i32 s23, s23, 3
; SI-NEXT:    s_add_i32 s22, s22, 3
; SI-NEXT:    s_add_i32 s21, s21, 3
; SI-NEXT:    s_add_i32 s20, s20, 3
; SI-NEXT:    s_add_i32 s19, s19, 3
; SI-NEXT:    s_add_i32 s18, s18, 3
; SI-NEXT:    s_add_i32 s17, s17, 3
; SI-NEXT:    s_add_i32 s16, s16, 3
; SI-NEXT:  .LBB5_2: ; %end
; SI-NEXT:    v_mov_b32_e32 v0, s16
; SI-NEXT:    v_mov_b32_e32 v1, s17
; SI-NEXT:    v_mov_b32_e32 v2, s18
; SI-NEXT:    v_mov_b32_e32 v3, s19
; SI-NEXT:    v_mov_b32_e32 v4, s20
; SI-NEXT:    v_mov_b32_e32 v5, s21
; SI-NEXT:    v_mov_b32_e32 v6, s22
; SI-NEXT:    v_mov_b32_e32 v7, s23
; SI-NEXT:    v_mov_b32_e32 v8, s24
; SI-NEXT:    v_mov_b32_e32 v9, s25
; SI-NEXT:    v_mov_b32_e32 v10, s26
; SI-NEXT:    v_mov_b32_e32 v11, s27
; SI-NEXT:    v_mov_b32_e32 v12, s28
; SI-NEXT:    v_mov_b32_e32 v13, s29
; SI-NEXT:    v_mov_b32_e32 v14, s41
; SI-NEXT:    v_mov_b32_e32 v15, s40
; SI-NEXT:    v_mov_b32_e32 v16, s15
; SI-NEXT:    v_mov_b32_e32 v17, s14
; SI-NEXT:    v_mov_b32_e32 v18, s13
; SI-NEXT:    v_mov_b32_e32 v19, s12
; SI-NEXT:    v_mov_b32_e32 v20, s11
; SI-NEXT:    v_mov_b32_e32 v21, s10
; SI-NEXT:    v_mov_b32_e32 v22, s9
; SI-NEXT:    v_mov_b32_e32 v23, s8
; SI-NEXT:    v_mov_b32_e32 v24, s7
; SI-NEXT:    v_mov_b32_e32 v25, s6
; SI-NEXT:    v_mov_b32_e32 v26, s5
; SI-NEXT:    v_mov_b32_e32 v27, s4
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v28i32_to_v14i64_scalar:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    v_readfirstlane_b32 s41, v14
; VI-NEXT:    v_readfirstlane_b32 s4, v13
; VI-NEXT:    v_readfirstlane_b32 s5, v12
; VI-NEXT:    v_readfirstlane_b32 s6, v11
; VI-NEXT:    v_readfirstlane_b32 s7, v10
; VI-NEXT:    v_readfirstlane_b32 s8, v9
; VI-NEXT:    v_readfirstlane_b32 s9, v8
; VI-NEXT:    v_readfirstlane_b32 s10, v7
; VI-NEXT:    v_readfirstlane_b32 s11, v6
; VI-NEXT:    v_readfirstlane_b32 s12, v5
; VI-NEXT:    v_readfirstlane_b32 s13, v4
; VI-NEXT:    v_readfirstlane_b32 s14, v3
; VI-NEXT:    v_readfirstlane_b32 s15, v2
; VI-NEXT:    v_readfirstlane_b32 s40, v1
; VI-NEXT:    s_cmp_lg_u32 s41, 0
; VI-NEXT:    v_readfirstlane_b32 s41, v0
; VI-NEXT:    s_cbranch_scc1 .LBB5_2
; VI-NEXT:  ; %bb.1: ; %cmp.true
; VI-NEXT:    s_add_i32 s4, s4, 3
; VI-NEXT:    s_add_i32 s5, s5, 3
; VI-NEXT:    s_add_i32 s6, s6, 3
; VI-NEXT:    s_add_i32 s7, s7, 3
; VI-NEXT:    s_add_i32 s8, s8, 3
; VI-NEXT:    s_add_i32 s9, s9, 3
; VI-NEXT:    s_add_i32 s10, s10, 3
; VI-NEXT:    s_add_i32 s11, s11, 3
; VI-NEXT:    s_add_i32 s12, s12, 3
; VI-NEXT:    s_add_i32 s13, s13, 3
; VI-NEXT:    s_add_i32 s14, s14, 3
; VI-NEXT:    s_add_i32 s15, s15, 3
; VI-NEXT:    s_add_i32 s40, s40, 3
; VI-NEXT:    s_add_i32 s41, s41, 3
; VI-NEXT:    s_add_i32 s29, s29, 3
; VI-NEXT:    s_add_i32 s28, s28, 3
; VI-NEXT:    s_add_i32 s27, s27, 3
; VI-NEXT:    s_add_i32 s26, s26, 3
; VI-NEXT:    s_add_i32 s25, s25, 3
; VI-NEXT:    s_add_i32 s24, s24, 3
; VI-NEXT:    s_add_i32 s23, s23, 3
; VI-NEXT:    s_add_i32 s22, s22, 3
; VI-NEXT:    s_add_i32 s21, s21, 3
; VI-NEXT:    s_add_i32 s20, s20, 3
; VI-NEXT:    s_add_i32 s19, s19, 3
; VI-NEXT:    s_add_i32 s18, s18, 3
; VI-NEXT:    s_add_i32 s17, s17, 3
; VI-NEXT:    s_add_i32 s16, s16, 3
; VI-NEXT:  .LBB5_2: ; %end
; VI-NEXT:    v_mov_b32_e32 v0, s16
; VI-NEXT:    v_mov_b32_e32 v1, s17
; VI-NEXT:    v_mov_b32_e32 v2, s18
; VI-NEXT:    v_mov_b32_e32 v3, s19
; VI-NEXT:    v_mov_b32_e32 v4, s20
; VI-NEXT:    v_mov_b32_e32 v5, s21
; VI-NEXT:    v_mov_b32_e32 v6, s22
; VI-NEXT:    v_mov_b32_e32 v7, s23
; VI-NEXT:    v_mov_b32_e32 v8, s24
; VI-NEXT:    v_mov_b32_e32 v9, s25
; VI-NEXT:    v_mov_b32_e32 v10, s26
; VI-NEXT:    v_mov_b32_e32 v11, s27
; VI-NEXT:    v_mov_b32_e32 v12, s28
; VI-NEXT:    v_mov_b32_e32 v13, s29
; VI-NEXT:    v_mov_b32_e32 v14, s41
; VI-NEXT:    v_mov_b32_e32 v15, s40
; VI-NEXT:    v_mov_b32_e32 v16, s15
; VI-NEXT:    v_mov_b32_e32 v17, s14
; VI-NEXT:    v_mov_b32_e32 v18, s13
; VI-NEXT:    v_mov_b32_e32 v19, s12
; VI-NEXT:    v_mov_b32_e32 v20, s11
; VI-NEXT:    v_mov_b32_e32 v21, s10
; VI-NEXT:    v_mov_b32_e32 v22, s9
; VI-NEXT:    v_mov_b32_e32 v23, s8
; VI-NEXT:    v_mov_b32_e32 v24, s7
; VI-NEXT:    v_mov_b32_e32 v25, s6
; VI-NEXT:    v_mov_b32_e32 v26, s5
; VI-NEXT:    v_mov_b32_e32 v27, s4
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v28i32_to_v14i64_scalar:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_readfirstlane_b32 s41, v14
; GFX9-NEXT:    v_readfirstlane_b32 s4, v13
; GFX9-NEXT:    v_readfirstlane_b32 s5, v12
; GFX9-NEXT:    v_readfirstlane_b32 s6, v11
; GFX9-NEXT:    v_readfirstlane_b32 s7, v10
; GFX9-NEXT:    v_readfirstlane_b32 s8, v9
; GFX9-NEXT:    v_readfirstlane_b32 s9, v8
; GFX9-NEXT:    v_readfirstlane_b32 s10, v7
; GFX9-NEXT:    v_readfirstlane_b32 s11, v6
; GFX9-NEXT:    v_readfirstlane_b32 s12, v5
; GFX9-NEXT:    v_readfirstlane_b32 s13, v4
; GFX9-NEXT:    v_readfirstlane_b32 s14, v3
; GFX9-NEXT:    v_readfirstlane_b32 s15, v2
; GFX9-NEXT:    v_readfirstlane_b32 s40, v1
; GFX9-NEXT:    s_cmp_lg_u32 s41, 0
; GFX9-NEXT:    v_readfirstlane_b32 s41, v0
; GFX9-NEXT:    s_cbranch_scc1 .LBB5_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.true
; GFX9-NEXT:    s_add_i32 s4, s4, 3
; GFX9-NEXT:    s_add_i32 s5, s5, 3
; GFX9-NEXT:    s_add_i32 s6, s6, 3
; GFX9-NEXT:    s_add_i32 s7, s7, 3
; GFX9-NEXT:    s_add_i32 s8, s8, 3
; GFX9-NEXT:    s_add_i32 s9, s9, 3
; GFX9-NEXT:    s_add_i32 s10, s10, 3
; GFX9-NEXT:    s_add_i32 s11, s11, 3
; GFX9-NEXT:    s_add_i32 s12, s12, 3
; GFX9-NEXT:    s_add_i32 s13, s13, 3
; GFX9-NEXT:    s_add_i32 s14, s14, 3
; GFX9-NEXT:    s_add_i32 s15, s15, 3
; GFX9-NEXT:    s_add_i32 s40, s40, 3
; GFX9-NEXT:    s_add_i32 s41, s41, 3
; GFX9-NEXT:    s_add_i32 s29, s29, 3
; GFX9-NEXT:    s_add_i32 s28, s28, 3
; GFX9-NEXT:    s_add_i32 s27, s27, 3
; GFX9-NEXT:    s_add_i32 s26, s26, 3
; GFX9-NEXT:    s_add_i32 s25, s25, 3
; GFX9-NEXT:    s_add_i32 s24, s24, 3
; GFX9-NEXT:    s_add_i32 s23, s23, 3
; GFX9-NEXT:    s_add_i32 s22, s22, 3
; GFX9-NEXT:    s_add_i32 s21, s21, 3
; GFX9-NEXT:    s_add_i32 s20, s20, 3
; GFX9-NEXT:    s_add_i32 s19, s19, 3
; GFX9-NEXT:    s_add_i32 s18, s18, 3
; GFX9-NEXT:    s_add_i32 s17, s17, 3
; GFX9-NEXT:    s_add_i32 s16, s16, 3
; GFX9-NEXT:  .LBB5_2: ; %end
; GFX9-NEXT:    v_mov_b32_e32 v0, s16
; GFX9-NEXT:    v_mov_b32_e32 v1, s17
; GFX9-NEXT:    v_mov_b32_e32 v2, s18
; GFX9-NEXT:    v_mov_b32_e32 v3, s19
; GFX9-NEXT:    v_mov_b32_e32 v4, s20
; GFX9-NEXT:    v_mov_b32_e32 v5, s21
; GFX9-NEXT:    v_mov_b32_e32 v6, s22
; GFX9-NEXT:    v_mov_b32_e32 v7, s23
; GFX9-NEXT:    v_mov_b32_e32 v8, s24
; GFX9-NEXT:    v_mov_b32_e32 v9, s25
; GFX9-NEXT:    v_mov_b32_e32 v10, s26
; GFX9-NEXT:    v_mov_b32_e32 v11, s27
; GFX9-NEXT:    v_mov_b32_e32 v12, s28
; GFX9-NEXT:    v_mov_b32_e32 v13, s29
; GFX9-NEXT:    v_mov_b32_e32 v14, s41
; GFX9-NEXT:    v_mov_b32_e32 v15, s40
; GFX9-NEXT:    v_mov_b32_e32 v16, s15
; GFX9-NEXT:    v_mov_b32_e32 v17, s14
; GFX9-NEXT:    v_mov_b32_e32 v18, s13
; GFX9-NEXT:    v_mov_b32_e32 v19, s12
; GFX9-NEXT:    v_mov_b32_e32 v20, s11
; GFX9-NEXT:    v_mov_b32_e32 v21, s10
; GFX9-NEXT:    v_mov_b32_e32 v22, s9
; GFX9-NEXT:    v_mov_b32_e32 v23, s8
; GFX9-NEXT:    v_mov_b32_e32 v24, s7
; GFX9-NEXT:    v_mov_b32_e32 v25, s6
; GFX9-NEXT:    v_mov_b32_e32 v26, s5
; GFX9-NEXT:    v_mov_b32_e32 v27, s4
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v28i32_to_v14i64_scalar:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_readfirstlane_b32 s14, v10
; GFX11-NEXT:    v_readfirstlane_b32 s4, v9
; GFX11-NEXT:    v_readfirstlane_b32 s5, v8
; GFX11-NEXT:    v_readfirstlane_b32 s6, v7
; GFX11-NEXT:    v_readfirstlane_b32 s7, v6
; GFX11-NEXT:    v_readfirstlane_b32 s8, v5
; GFX11-NEXT:    v_readfirstlane_b32 s9, v4
; GFX11-NEXT:    v_readfirstlane_b32 s10, v3
; GFX11-NEXT:    v_readfirstlane_b32 s11, v2
; GFX11-NEXT:    v_readfirstlane_b32 s12, v1
; GFX11-NEXT:    v_readfirstlane_b32 s13, v0
; GFX11-NEXT:    s_cmp_lg_u32 s14, 0
; GFX11-NEXT:    s_cbranch_scc1 .LBB5_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-NEXT:    s_add_i32 s4, s4, 3
; GFX11-NEXT:    s_add_i32 s5, s5, 3
; GFX11-NEXT:    s_add_i32 s6, s6, 3
; GFX11-NEXT:    s_add_i32 s7, s7, 3
; GFX11-NEXT:    s_add_i32 s8, s8, 3
; GFX11-NEXT:    s_add_i32 s9, s9, 3
; GFX11-NEXT:    s_add_i32 s10, s10, 3
; GFX11-NEXT:    s_add_i32 s11, s11, 3
; GFX11-NEXT:    s_add_i32 s12, s12, 3
; GFX11-NEXT:    s_add_i32 s13, s13, 3
; GFX11-NEXT:    s_add_i32 s29, s29, 3
; GFX11-NEXT:    s_add_i32 s28, s28, 3
; GFX11-NEXT:    s_add_i32 s27, s27, 3
; GFX11-NEXT:    s_add_i32 s26, s26, 3
; GFX11-NEXT:    s_add_i32 s25, s25, 3
; GFX11-NEXT:    s_add_i32 s24, s24, 3
; GFX11-NEXT:    s_add_i32 s23, s23, 3
; GFX11-NEXT:    s_add_i32 s22, s22, 3
; GFX11-NEXT:    s_add_i32 s21, s21, 3
; GFX11-NEXT:    s_add_i32 s20, s20, 3
; GFX11-NEXT:    s_add_i32 s19, s19, 3
; GFX11-NEXT:    s_add_i32 s18, s18, 3
; GFX11-NEXT:    s_add_i32 s17, s17, 3
; GFX11-NEXT:    s_add_i32 s16, s16, 3
; GFX11-NEXT:    s_add_i32 s3, s3, 3
; GFX11-NEXT:    s_add_i32 s2, s2, 3
; GFX11-NEXT:    s_add_i32 s1, s1, 3
; GFX11-NEXT:    s_add_i32 s0, s0, 3
; GFX11-NEXT:  .LBB5_2: ; %end
; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT:    v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX11-NEXT:    v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; GFX11-NEXT:    v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
; GFX11-NEXT:    v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
; GFX11-NEXT:    v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
; GFX11-NEXT:    v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
; GFX11-NEXT:    v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
; GFX11-NEXT:    v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
; GFX11-NEXT:    v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
; GFX11-NEXT:    v_dual_mov_b32 v18, s13 :: v_dual_mov_b32 v19, s12
; GFX11-NEXT:    v_dual_mov_b32 v20, s11 :: v_dual_mov_b32 v21, s10
; GFX11-NEXT:    v_dual_mov_b32 v22, s9 :: v_dual_mov_b32 v23, s8
; GFX11-NEXT:    v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s6
; GFX11-NEXT:    v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s4
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = add <28 x i32> %a, splat (i32 3)
  %a2 = bitcast <28 x i32> %a1 to <14 x i64>
  br label %end

cmp.false:
  %a3 = bitcast <28 x i32> %a to <14 x i64>
  br label %end

end:
  %phi = phi <14 x i64> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <14 x i64> %phi
}

define <28 x i32> @bitcast_v14i64_to_v28i32(<14 x i64> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v14i64_to_v28i32:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB6_2
; SI-NEXT:  ; %bb.1: ; %cmp.true
; SI-NEXT:    v_add_i32_e32 v26, vcc, 3, v26
; SI-NEXT:    v_addc_u32_e32 v27, vcc, 0, v27, vcc
; SI-NEXT:    v_add_i32_e32 v24, vcc, 3, v24
; SI-NEXT:    v_addc_u32_e32 v25, vcc, 0, v25, vcc
; SI-NEXT:    v_add_i32_e32 v22, vcc, 3, v22
; SI-NEXT:    v_addc_u32_e32 v23, vcc, 0, v23, vcc
; SI-NEXT:    v_add_i32_e32 v20, vcc, 3, v20
; SI-NEXT:    v_addc_u32_e32 v21, vcc, 0, v21, vcc
; SI-NEXT:    v_add_i32_e32 v18, vcc, 3, v18
; SI-NEXT:    v_addc_u32_e32 v19, vcc, 0, v19, vcc
; SI-NEXT:    v_add_i32_e32 v16, vcc, 3, v16
; SI-NEXT:    v_addc_u32_e32 v17, vcc, 0, v17, vcc
; SI-NEXT:    v_add_i32_e32 v14, vcc, 3, v14
; SI-NEXT:    v_addc_u32_e32 v15, vcc, 0, v15, vcc
; SI-NEXT:    v_add_i32_e32 v12, vcc, 3, v12
; SI-NEXT:    v_addc_u32_e32 v13, vcc, 0, v13, vcc
; SI-NEXT:    v_add_i32_e32 v10, vcc, 3, v10
; SI-NEXT:    v_addc_u32_e32 v11, vcc, 0, v11, vcc
; SI-NEXT:    v_add_i32_e32 v8, vcc, 3, v8
; SI-NEXT:    v_addc_u32_e32 v9, vcc, 0, v9, vcc
; SI-NEXT:    v_add_i32_e32 v6, vcc, 3, v6
; SI-NEXT:    v_addc_u32_e32 v7, vcc, 0, v7, vcc
; SI-NEXT:    v_add_i32_e32 v4, vcc, 3, v4
; SI-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
; SI-NEXT:    v_add_i32_e32 v2, vcc, 3, v2
; SI-NEXT:    v_addc_u32_e32 v3, vcc, 0, v3, vcc
; SI-NEXT:    v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; SI-NEXT:  .LBB6_2: ; %end
; SI-NEXT:    s_or_b64 exec, exec, s[4:5]
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v14i64_to_v28i32:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB6_2
; VI-NEXT:  ; %bb.1: ; %cmp.true
; VI-NEXT:    v_add_u32_e32 v26, vcc, 3, v26
; VI-NEXT:    v_addc_u32_e32 v27, vcc, 0, v27, vcc
; VI-NEXT:    v_add_u32_e32 v24, vcc, 3, v24
; VI-NEXT:    v_addc_u32_e32 v25, vcc, 0, v25, vcc
; VI-NEXT:    v_add_u32_e32 v22, vcc, 3, v22
; VI-NEXT:    v_addc_u32_e32 v23, vcc, 0, v23, vcc
; VI-NEXT:    v_add_u32_e32 v20, vcc, 3, v20
; VI-NEXT:    v_addc_u32_e32 v21, vcc, 0, v21, vcc
; VI-NEXT:    v_add_u32_e32 v18, vcc, 3, v18
; VI-NEXT:    v_addc_u32_e32 v19, vcc, 0, v19, vcc
; VI-NEXT:    v_add_u32_e32 v16, vcc, 3, v16
; VI-NEXT:    v_addc_u32_e32 v17, vcc, 0, v17, vcc
; VI-NEXT:    v_add_u32_e32 v14, vcc, 3, v14
; VI-NEXT:    v_addc_u32_e32 v15, vcc, 0, v15, vcc
; VI-NEXT:    v_add_u32_e32 v12, vcc, 3, v12
; VI-NEXT:    v_addc_u32_e32 v13, vcc, 0, v13, vcc
; VI-NEXT:    v_add_u32_e32 v10, vcc, 3, v10
; VI-NEXT:    v_addc_u32_e32 v11, vcc, 0, v11, vcc
; VI-NEXT:    v_add_u32_e32 v8, vcc, 3, v8
; VI-NEXT:    v_addc_u32_e32 v9, vcc, 0, v9, vcc
; VI-NEXT:    v_add_u32_e32 v6, vcc, 3, v6
; VI-NEXT:    v_addc_u32_e32 v7, vcc, 0, v7, vcc
; VI-NEXT:    v_add_u32_e32 v4, vcc, 3, v4
; VI-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
; VI-NEXT:    v_add_u32_e32 v2, vcc, 3, v2
; VI-NEXT:    v_addc_u32_e32 v3, vcc, 0, v3, vcc
; VI-NEXT:    v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT:  .LBB6_2: ; %end
; VI-NEXT:    s_or_b64 exec, exec, s[4:5]
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v14i64_to_v28i32:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB6_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.true
; GFX9-NEXT:    v_add_co_u32_e32 v26, vcc, 3, v26
; GFX9-NEXT:    v_addc_co_u32_e32 v27, vcc, 0, v27, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v24, vcc, 3, v24
; GFX9-NEXT:    v_addc_co_u32_e32 v25, vcc, 0, v25, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v22, vcc, 3, v22
; GFX9-NEXT:    v_addc_co_u32_e32 v23, vcc, 0, v23, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v20, vcc, 3, v20
; GFX9-NEXT:    v_addc_co_u32_e32 v21, vcc, 0, v21, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v18, vcc, 3, v18
; GFX9-NEXT:    v_addc_co_u32_e32 v19, vcc, 0, v19, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v16, vcc, 3, v16
; GFX9-NEXT:    v_addc_co_u32_e32 v17, vcc, 0, v17, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v14, vcc, 3, v14
; GFX9-NEXT:    v_addc_co_u32_e32 v15, vcc, 0, v15, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v12, vcc, 3, v12
; GFX9-NEXT:    v_addc_co_u32_e32 v13, vcc, 0, v13, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v10, vcc, 3, v10
; GFX9-NEXT:    v_addc_co_u32_e32 v11, vcc, 0, v11, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v8, vcc, 3, v8
; GFX9-NEXT:    v_addc_co_u32_e32 v9, vcc, 0, v9, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v6, vcc, 3, v6
; GFX9-NEXT:    v_addc_co_u32_e32 v7, vcc, 0, v7, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v4, vcc, 3, v4
; GFX9-NEXT:    v_addc_co_u32_e32 v5, vcc, 0, v5, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v2, vcc, 3, v2
; GFX9-NEXT:    v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v0, vcc, 3, v0
; GFX9-NEXT:    v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX9-NEXT:  .LBB6_2: ; %end
; GFX9-NEXT:    s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v14i64_to_v28i32:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-NEXT:    s_cbranch_execz .LBB6_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-NEXT:    v_add_co_u32 v26, vcc_lo, v26, 3
; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-NEXT:    v_add_co_ci_u32_e64 v27, null, 0, v27, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v24, vcc_lo, v24, 3
; GFX11-NEXT:    v_add_co_ci_u32_e64 v25, null, 0, v25, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v22, vcc_lo, v22, 3
; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-NEXT:    v_add_co_ci_u32_e64 v23, null, 0, v23, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v20, vcc_lo, v20, 3
; GFX11-NEXT:    v_add_co_ci_u32_e64 v21, null, 0, v21, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v18, vcc_lo, v18, 3
; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-NEXT:    v_add_co_ci_u32_e64 v19, null, 0, v19, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v16, vcc_lo, v16, 3
; GFX11-NEXT:    v_add_co_ci_u32_e64 v17, null, 0, v17, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v14, vcc_lo, v14, 3
; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-NEXT:    v_add_co_ci_u32_e64 v15, null, 0, v15, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v12, vcc_lo, v12, 3
; GFX11-NEXT:    v_add_co_ci_u32_e64 v13, null, 0, v13, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v10, vcc_lo, v10, 3
; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-NEXT:    v_add_co_ci_u32_e64 v11, null, 0, v11, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v8, vcc_lo, v8, 3
; GFX11-NEXT:    v_add_co_ci_u32_e64 v9, null, 0, v9, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v6, vcc_lo, v6, 3
; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-NEXT:    v_add_co_ci_u32_e64 v7, null, 0, v7, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v4, vcc_lo, v4, 3
; GFX11-NEXT:    v_add_co_ci_u32_e64 v5, null, 0, v5, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v2, vcc_lo, v2, 3
; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-NEXT:    v_add_co_ci_u32_e64 v3, null, 0, v3, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v0, vcc_lo, v0, 3
; GFX11-NEXT:    v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX11-NEXT:  .LBB6_2: ; %end
; GFX11-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = add <14 x i64> %a, splat (i64 3)
  %a2 = bitcast <14 x i64> %a1 to <28 x i32>
  br label %end

cmp.false:
  %a3 = bitcast <14 x i64> %a to <28 x i32>
  br label %end

end:
  %phi = phi <28 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <28 x i32> %phi
}

define inreg <28 x i32> @bitcast_v14i64_to_v28i32_scalar(<14 x i64> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v14i64_to_v28i32_scalar:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    v_readfirstlane_b32 s41, v14
; SI-NEXT:    v_readfirstlane_b32 s4, v13
; SI-NEXT:    v_readfirstlane_b32 s5, v12
; SI-NEXT:    v_readfirstlane_b32 s6, v11
; SI-NEXT:    v_readfirstlane_b32 s7, v10
; SI-NEXT:    v_readfirstlane_b32 s8, v9
; SI-NEXT:    v_readfirstlane_b32 s9, v8
; SI-NEXT:    v_readfirstlane_b32 s10, v7
; SI-NEXT:    v_readfirstlane_b32 s11, v6
; SI-NEXT:    v_readfirstlane_b32 s12, v5
; SI-NEXT:    v_readfirstlane_b32 s13, v4
; SI-NEXT:    v_readfirstlane_b32 s14, v3
; SI-NEXT:    v_readfirstlane_b32 s15, v2
; SI-NEXT:    v_readfirstlane_b32 s40, v1
; SI-NEXT:    s_cmp_lg_u32 s41, 0
; SI-NEXT:    v_readfirstlane_b32 s41, v0
; SI-NEXT:    s_cbranch_scc1 .LBB7_2
; SI-NEXT:  ; %bb.1: ; %cmp.true
; SI-NEXT:    s_add_u32 s5, s5, 3
; SI-NEXT:    s_addc_u32 s4, s4, 0
; SI-NEXT:    s_add_u32 s7, s7, 3
; SI-NEXT:    s_addc_u32 s6, s6, 0
; SI-NEXT:    s_add_u32 s9, s9, 3
; SI-NEXT:    s_addc_u32 s8, s8, 0
; SI-NEXT:    s_add_u32 s11, s11, 3
; SI-NEXT:    s_addc_u32 s10, s10, 0
; SI-NEXT:    s_add_u32 s13, s13, 3
; SI-NEXT:    s_addc_u32 s12, s12, 0
; SI-NEXT:    s_add_u32 s15, s15, 3
; SI-NEXT:    s_addc_u32 s14, s14, 0
; SI-NEXT:    s_add_u32 s41, s41, 3
; SI-NEXT:    s_addc_u32 s40, s40, 0
; SI-NEXT:    s_add_u32 s28, s28, 3
; SI-NEXT:    s_addc_u32 s29, s29, 0
; SI-NEXT:    s_add_u32 s26, s26, 3
; SI-NEXT:    s_addc_u32 s27, s27, 0
; SI-NEXT:    s_add_u32 s24, s24, 3
; SI-NEXT:    s_addc_u32 s25, s25, 0
; SI-NEXT:    s_add_u32 s22, s22, 3
; SI-NEXT:    s_addc_u32 s23, s23, 0
; SI-NEXT:    s_add_u32 s20, s20, 3
; SI-NEXT:    s_addc_u32 s21, s21, 0
; SI-NEXT:    s_add_u32 s18, s18, 3
; SI-NEXT:    s_addc_u32 s19, s19, 0
; SI-NEXT:    s_add_u32 s16, s16, 3
; SI-NEXT:    s_addc_u32 s17, s17, 0
; SI-NEXT:  .LBB7_2: ; %end
; SI-NEXT:    v_mov_b32_e32 v0, s16
; SI-NEXT:    v_mov_b32_e32 v1, s17
; SI-NEXT:    v_mov_b32_e32 v2, s18
; SI-NEXT:    v_mov_b32_e32 v3, s19
; SI-NEXT:    v_mov_b32_e32 v4, s20
; SI-NEXT:    v_mov_b32_e32 v5, s21
; SI-NEXT:    v_mov_b32_e32 v6, s22
; SI-NEXT:    v_mov_b32_e32 v7, s23
; SI-NEXT:    v_mov_b32_e32 v8, s24
; SI-NEXT:    v_mov_b32_e32 v9, s25
; SI-NEXT:    v_mov_b32_e32 v10, s26
; SI-NEXT:    v_mov_b32_e32 v11, s27
; SI-NEXT:    v_mov_b32_e32 v12, s28
; SI-NEXT:    v_mov_b32_e32 v13, s29
; SI-NEXT:    v_mov_b32_e32 v14, s41
; SI-NEXT:    v_mov_b32_e32 v15, s40
; SI-NEXT:    v_mov_b32_e32 v16, s15
; SI-NEXT:    v_mov_b32_e32 v17, s14
; SI-NEXT:    v_mov_b32_e32 v18, s13
; SI-NEXT:    v_mov_b32_e32 v19, s12
; SI-NEXT:    v_mov_b32_e32 v20, s11
; SI-NEXT:    v_mov_b32_e32 v21, s10
; SI-NEXT:    v_mov_b32_e32 v22, s9
; SI-NEXT:    v_mov_b32_e32 v23, s8
; SI-NEXT:    v_mov_b32_e32 v24, s7
; SI-NEXT:    v_mov_b32_e32 v25, s6
; SI-NEXT:    v_mov_b32_e32 v26, s5
; SI-NEXT:    v_mov_b32_e32 v27, s4
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v14i64_to_v28i32_scalar:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    v_readfirstlane_b32 s41, v14
; VI-NEXT:    v_readfirstlane_b32 s4, v13
; VI-NEXT:    v_readfirstlane_b32 s5, v12
; VI-NEXT:    v_readfirstlane_b32 s6, v11
; VI-NEXT:    v_readfirstlane_b32 s7, v10
; VI-NEXT:    v_readfirstlane_b32 s8, v9
; VI-NEXT:    v_readfirstlane_b32 s9, v8
; VI-NEXT:    v_readfirstlane_b32 s10, v7
; VI-NEXT:    v_readfirstlane_b32 s11, v6
; VI-NEXT:    v_readfirstlane_b32 s12, v5
; VI-NEXT:    v_readfirstlane_b32 s13, v4
; VI-NEXT:    v_readfirstlane_b32 s14, v3
; VI-NEXT:    v_readfirstlane_b32 s15, v2
; VI-NEXT:    v_readfirstlane_b32 s40, v1
; VI-NEXT:    s_cmp_lg_u32 s41, 0
; VI-NEXT:    v_readfirstlane_b32 s41, v0
; VI-NEXT:    s_cbranch_scc1 .LBB7_2
; VI-NEXT:  ; %bb.1: ; %cmp.true
; VI-NEXT:    s_add_u32 s5, s5, 3
; VI-NEXT:    s_addc_u32 s4, s4, 0
; VI-NEXT:    s_add_u32 s7, s7, 3
; VI-NEXT:    s_addc_u32 s6, s6, 0
; VI-NEXT:    s_add_u32 s9, s9, 3
; VI-NEXT:    s_addc_u32 s8, s8, 0
; VI-NEXT:    s_add_u32 s11, s11, 3
; VI-NEXT:    s_addc_u32 s10, s10, 0
; VI-NEXT:    s_add_u32 s13, s13, 3
; VI-NEXT:    s_addc_u32 s12, s12, 0
; VI-NEXT:    s_add_u32 s15, s15, 3
; VI-NEXT:    s_addc_u32 s14, s14, 0
; VI-NEXT:    s_add_u32 s41, s41, 3
; VI-NEXT:    s_addc_u32 s40, s40, 0
; VI-NEXT:    s_add_u32 s28, s28, 3
; VI-NEXT:    s_addc_u32 s29, s29, 0
; VI-NEXT:    s_add_u32 s26, s26, 3
; VI-NEXT:    s_addc_u32 s27, s27, 0
; VI-NEXT:    s_add_u32 s24, s24, 3
; VI-NEXT:    s_addc_u32 s25, s25, 0
; VI-NEXT:    s_add_u32 s22, s22, 3
; VI-NEXT:    s_addc_u32 s23, s23, 0
; VI-NEXT:    s_add_u32 s20, s20, 3
; VI-NEXT:    s_addc_u32 s21, s21, 0
; VI-NEXT:    s_add_u32 s18, s18, 3
; VI-NEXT:    s_addc_u32 s19, s19, 0
; VI-NEXT:    s_add_u32 s16, s16, 3
; VI-NEXT:    s_addc_u32 s17, s17, 0
; VI-NEXT:  .LBB7_2: ; %end
; VI-NEXT:    v_mov_b32_e32 v0, s16
; VI-NEXT:    v_mov_b32_e32 v1, s17
; VI-NEXT:    v_mov_b32_e32 v2, s18
; VI-NEXT:    v_mov_b32_e32 v3, s19
; VI-NEXT:    v_mov_b32_e32 v4, s20
; VI-NEXT:    v_mov_b32_e32 v5, s21
; VI-NEXT:    v_mov_b32_e32 v6, s22
; VI-NEXT:    v_mov_b32_e32 v7, s23
; VI-NEXT:    v_mov_b32_e32 v8, s24
; VI-NEXT:    v_mov_b32_e32 v9, s25
; VI-NEXT:    v_mov_b32_e32 v10, s26
; VI-NEXT:    v_mov_b32_e32 v11, s27
; VI-NEXT:    v_mov_b32_e32 v12, s28
; VI-NEXT:    v_mov_b32_e32 v13, s29
; VI-NEXT:    v_mov_b32_e32 v14, s41
; VI-NEXT:    v_mov_b32_e32 v15, s40
; VI-NEXT:    v_mov_b32_e32 v16, s15
; VI-NEXT:    v_mov_b32_e32 v17, s14
; VI-NEXT:    v_mov_b32_e32 v18, s13
; VI-NEXT:    v_mov_b32_e32 v19, s12
; VI-NEXT:    v_mov_b32_e32 v20, s11
; VI-NEXT:    v_mov_b32_e32 v21, s10
; VI-NEXT:    v_mov_b32_e32 v22, s9
; VI-NEXT:    v_mov_b32_e32 v23, s8
; VI-NEXT:    v_mov_b32_e32 v24, s7
; VI-NEXT:    v_mov_b32_e32 v25, s6
; VI-NEXT:    v_mov_b32_e32 v26, s5
; VI-NEXT:    v_mov_b32_e32 v27, s4
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v14i64_to_v28i32_scalar:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_readfirstlane_b32 s41, v14
; GFX9-NEXT:    v_readfirstlane_b32 s4, v13
; GFX9-NEXT:    v_readfirstlane_b32 s5, v12
; GFX9-NEXT:    v_readfirstlane_b32 s6, v11
; GFX9-NEXT:    v_readfirstlane_b32 s7, v10
; GFX9-NEXT:    v_readfirstlane_b32 s8, v9
; GFX9-NEXT:    v_readfirstlane_b32 s9, v8
; GFX9-NEXT:    v_readfirstlane_b32 s10, v7
; GFX9-NEXT:    v_readfirstlane_b32 s11, v6
; GFX9-NEXT:    v_readfirstlane_b32 s12, v5
; GFX9-NEXT:    v_readfirstlane_b32 s13, v4
; GFX9-NEXT:    v_readfirstlane_b32 s14, v3
; GFX9-NEXT:    v_readfirstlane_b32 s15, v2
; GFX9-NEXT:    v_readfirstlane_b32 s40, v1
; GFX9-NEXT:    s_cmp_lg_u32 s41, 0
; GFX9-NEXT:    v_readfirstlane_b32 s41, v0
; GFX9-NEXT:    s_cbranch_scc1 .LBB7_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.true
; GFX9-NEXT:    s_add_u32 s5, s5, 3
; GFX9-NEXT:    s_addc_u32 s4, s4, 0
; GFX9-NEXT:    s_add_u32 s7, s7, 3
; GFX9-NEXT:    s_addc_u32 s6, s6, 0
; GFX9-NEXT:    s_add_u32 s9, s9, 3
; GFX9-NEXT:    s_addc_u32 s8, s8, 0
; GFX9-NEXT:    s_add_u32 s11, s11, 3
; GFX9-NEXT:    s_addc_u32 s10, s10, 0
; GFX9-NEXT:    s_add_u32 s13, s13, 3
; GFX9-NEXT:    s_addc_u32 s12, s12, 0
; GFX9-NEXT:    s_add_u32 s15, s15, 3
; GFX9-NEXT:    s_addc_u32 s14, s14, 0
; GFX9-NEXT:    s_add_u32 s41, s41, 3
; GFX9-NEXT:    s_addc_u32 s40, s40, 0
; GFX9-NEXT:    s_add_u32 s28, s28, 3
; GFX9-NEXT:    s_addc_u32 s29, s29, 0
; GFX9-NEXT:    s_add_u32 s26, s26, 3
; GFX9-NEXT:    s_addc_u32 s27, s27, 0
; GFX9-NEXT:    s_add_u32 s24, s24, 3
; GFX9-NEXT:    s_addc_u32 s25, s25, 0
; GFX9-NEXT:    s_add_u32 s22, s22, 3
; GFX9-NEXT:    s_addc_u32 s23, s23, 0
; GFX9-NEXT:    s_add_u32 s20, s20, 3
; GFX9-NEXT:    s_addc_u32 s21, s21, 0
; GFX9-NEXT:    s_add_u32 s18, s18, 3
; GFX9-NEXT:    s_addc_u32 s19, s19, 0
; GFX9-NEXT:    s_add_u32 s16, s16, 3
; GFX9-NEXT:    s_addc_u32 s17, s17, 0
; GFX9-NEXT:  .LBB7_2: ; %end
; GFX9-NEXT:    v_mov_b32_e32 v0, s16
; GFX9-NEXT:    v_mov_b32_e32 v1, s17
; GFX9-NEXT:    v_mov_b32_e32 v2, s18
; GFX9-NEXT:    v_mov_b32_e32 v3, s19
; GFX9-NEXT:    v_mov_b32_e32 v4, s20
; GFX9-NEXT:    v_mov_b32_e32 v5, s21
; GFX9-NEXT:    v_mov_b32_e32 v6, s22
; GFX9-NEXT:    v_mov_b32_e32 v7, s23
; GFX9-NEXT:    v_mov_b32_e32 v8, s24
; GFX9-NEXT:    v_mov_b32_e32 v9, s25
; GFX9-NEXT:    v_mov_b32_e32 v10, s26
; GFX9-NEXT:    v_mov_b32_e32 v11, s27
; GFX9-NEXT:    v_mov_b32_e32 v12, s28
; GFX9-NEXT:    v_mov_b32_e32 v13, s29
; GFX9-NEXT:    v_mov_b32_e32 v14, s41
; GFX9-NEXT:    v_mov_b32_e32 v15, s40
; GFX9-NEXT:    v_mov_b32_e32 v16, s15
; GFX9-NEXT:    v_mov_b32_e32 v17, s14
; GFX9-NEXT:    v_mov_b32_e32 v18, s13
; GFX9-NEXT:    v_mov_b32_e32 v19, s12
; GFX9-NEXT:    v_mov_b32_e32 v20, s11
; GFX9-NEXT:    v_mov_b32_e32 v21, s10
; GFX9-NEXT:    v_mov_b32_e32 v22, s9
; GFX9-NEXT:    v_mov_b32_e32 v23, s8
; GFX9-NEXT:    v_mov_b32_e32 v24, s7
; GFX9-NEXT:    v_mov_b32_e32 v25, s6
; GFX9-NEXT:    v_mov_b32_e32 v26, s5
; GFX9-NEXT:    v_mov_b32_e32 v27, s4
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v14i64_to_v28i32_scalar:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_readfirstlane_b32 s14, v10
; GFX11-NEXT:    v_readfirstlane_b32 s4, v9
; GFX11-NEXT:    v_readfirstlane_b32 s5, v8
; GFX11-NEXT:    v_readfirstlane_b32 s6, v7
; GFX11-NEXT:    v_readfirstlane_b32 s7, v6
; GFX11-NEXT:    v_readfirstlane_b32 s8, v5
; GFX11-NEXT:    v_readfirstlane_b32 s9, v4
; GFX11-NEXT:    v_readfirstlane_b32 s10, v3
; GFX11-NEXT:    v_readfirstlane_b32 s11, v2
; GFX11-NEXT:    v_readfirstlane_b32 s12, v1
; GFX11-NEXT:    v_readfirstlane_b32 s13, v0
; GFX11-NEXT:    s_cmp_lg_u32 s14, 0
; GFX11-NEXT:    s_cbranch_scc1 .LBB7_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-NEXT:    s_add_u32 s5, s5, 3
; GFX11-NEXT:    s_addc_u32 s4, s4, 0
; GFX11-NEXT:    s_add_u32 s7, s7, 3
; GFX11-NEXT:    s_addc_u32 s6, s6, 0
; GFX11-NEXT:    s_add_u32 s9, s9, 3
; GFX11-NEXT:    s_addc_u32 s8, s8, 0
; GFX11-NEXT:    s_add_u32 s11, s11, 3
; GFX11-NEXT:    s_addc_u32 s10, s10, 0
; GFX11-NEXT:    s_add_u32 s13, s13, 3
; GFX11-NEXT:    s_addc_u32 s12, s12, 0
; GFX11-NEXT:    s_add_u32 s28, s28, 3
; GFX11-NEXT:    s_addc_u32 s29, s29, 0
; GFX11-NEXT:    s_add_u32 s26, s26, 3
; GFX11-NEXT:    s_addc_u32 s27, s27, 0
; GFX11-NEXT:    s_add_u32 s24, s24, 3
; GFX11-NEXT:    s_addc_u32 s25, s25, 0
; GFX11-NEXT:    s_add_u32 s22, s22, 3
; GFX11-NEXT:    s_addc_u32 s23, s23, 0
; GFX11-NEXT:    s_add_u32 s20, s20, 3
; GFX11-NEXT:    s_addc_u32 s21, s21, 0
; GFX11-NEXT:    s_add_u32 s18, s18, 3
; GFX11-NEXT:    s_addc_u32 s19, s19, 0
; GFX11-NEXT:    s_add_u32 s16, s16, 3
; GFX11-NEXT:    s_addc_u32 s17, s17, 0
; GFX11-NEXT:    s_add_u32 s2, s2, 3
; GFX11-NEXT:    s_addc_u32 s3, s3, 0
; GFX11-NEXT:    s_add_u32 s0, s0, 3
; GFX11-NEXT:    s_addc_u32 s1, s1, 0
; GFX11-NEXT:  .LBB7_2: ; %end
; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT:    v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX11-NEXT:    v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; GFX11-NEXT:    v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
; GFX11-NEXT:    v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
; GFX11-NEXT:    v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
; GFX11-NEXT:    v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
; GFX11-NEXT:    v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
; GFX11-NEXT:    v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
; GFX11-NEXT:    v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
; GFX11-NEXT:    v_dual_mov_b32 v18, s13 :: v_dual_mov_b32 v19, s12
; GFX11-NEXT:    v_dual_mov_b32 v20, s11 :: v_dual_mov_b32 v21, s10
; GFX11-NEXT:    v_dual_mov_b32 v22, s9 :: v_dual_mov_b32 v23, s8
; GFX11-NEXT:    v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s6
; GFX11-NEXT:    v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s4
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = add <14 x i64> %a, splat (i64 3)
  %a2 = bitcast <14 x i64> %a1 to <28 x i32>
  br label %end

cmp.false:
  %a3 = bitcast <14 x i64> %a to <28 x i32>
  br label %end

end:
  %phi = phi <28 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <28 x i32> %phi
}

define <14 x double> @bitcast_v28i32_to_v14f64(<28 x i32> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v28i32_to_v14f64:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB8_2
; SI-NEXT:  ; %bb.1: ; %cmp.true
; SI-NEXT:    v_add_i32_e32 v27, vcc, 3, v27
; SI-NEXT:    v_add_i32_e32 v26, vcc, 3, v26
; SI-NEXT:    v_add_i32_e32 v25, vcc, 3, v25
; SI-NEXT:    v_add_i32_e32 v24, vcc, 3, v24
; SI-NEXT:    v_add_i32_e32 v23, vcc, 3, v23
; SI-NEXT:    v_add_i32_e32 v22, vcc, 3, v22
; SI-NEXT:    v_add_i32_e32 v21, vcc, 3, v21
; SI-NEXT:    v_add_i32_e32 v20, vcc, 3, v20
; SI-NEXT:    v_add_i32_e32 v19, vcc, 3, v19
; SI-NEXT:    v_add_i32_e32 v18, vcc, 3, v18
; SI-NEXT:    v_add_i32_e32 v17, vcc, 3, v17
; SI-NEXT:    v_add_i32_e32 v16, vcc, 3, v16
; SI-NEXT:    v_add_i32_e32 v15, vcc, 3, v15
; SI-NEXT:    v_add_i32_e32 v14, vcc, 3, v14
; SI-NEXT:    v_add_i32_e32 v13, vcc, 3, v13
; SI-NEXT:    v_add_i32_e32 v12, vcc, 3, v12
; SI-NEXT:    v_add_i32_e32 v11, vcc, 3, v11
; SI-NEXT:    v_add_i32_e32 v10, vcc, 3, v10
; SI-NEXT:    v_add_i32_e32 v9, vcc, 3, v9
; SI-NEXT:    v_add_i32_e32 v8, vcc, 3, v8
; SI-NEXT:    v_add_i32_e32 v7, vcc, 3, v7
; SI-NEXT:    v_add_i32_e32 v6, vcc, 3, v6
; SI-NEXT:    v_add_i32_e32 v5, vcc, 3, v5
; SI-NEXT:    v_add_i32_e32 v4, vcc, 3, v4
; SI-NEXT:    v_add_i32_e32 v3, vcc, 3, v3
; SI-NEXT:    v_add_i32_e32 v2, vcc, 3, v2
; SI-NEXT:    v_add_i32_e32 v1, vcc, 3, v1
; SI-NEXT:    v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT:  .LBB8_2: ; %end
; SI-NEXT:    s_or_b64 exec, exec, s[4:5]
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v28i32_to_v14f64:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB8_2
; VI-NEXT:  ; %bb.1: ; %cmp.true
; VI-NEXT:    v_add_u32_e32 v27, vcc, 3, v27
; VI-NEXT:    v_add_u32_e32 v26, vcc, 3, v26
; VI-NEXT:    v_add_u32_e32 v25, vcc, 3, v25
; VI-NEXT:    v_add_u32_e32 v24, vcc, 3, v24
; VI-NEXT:    v_add_u32_e32 v23, vcc, 3, v23
; VI-NEXT:    v_add_u32_e32 v22, vcc, 3, v22
; VI-NEXT:    v_add_u32_e32 v21, vcc, 3, v21
; VI-NEXT:    v_add_u32_e32 v20, vcc, 3, v20
; VI-NEXT:    v_add_u32_e32 v19, vcc, 3, v19
; VI-NEXT:    v_add_u32_e32 v18, vcc, 3, v18
; VI-NEXT:    v_add_u32_e32 v17, vcc, 3, v17
; VI-NEXT:    v_add_u32_e32 v16, vcc, 3, v16
; VI-NEXT:    v_add_u32_e32 v15, vcc, 3, v15
; VI-NEXT:    v_add_u32_e32 v14, vcc, 3, v14
; VI-NEXT:    v_add_u32_e32 v13, vcc, 3, v13
; VI-NEXT:    v_add_u32_e32 v12, vcc, 3, v12
; VI-NEXT:    v_add_u32_e32 v11, vcc, 3, v11
; VI-NEXT:    v_add_u32_e32 v10, vcc, 3, v10
; VI-NEXT:    v_add_u32_e32 v9, vcc, 3, v9
; VI-NEXT:    v_add_u32_e32 v8, vcc, 3, v8
; VI-NEXT:    v_add_u32_e32 v7, vcc, 3, v7
; VI-NEXT:    v_add_u32_e32 v6, vcc, 3, v6
; VI-NEXT:    v_add_u32_e32 v5, vcc, 3, v5
; VI-NEXT:    v_add_u32_e32 v4, vcc, 3, v4
; VI-NEXT:    v_add_u32_e32 v3, vcc, 3, v3
; VI-NEXT:    v_add_u32_e32 v2, vcc, 3, v2
; VI-NEXT:    v_add_u32_e32 v1, vcc, 3, v1
; VI-NEXT:    v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT:  .LBB8_2: ; %end
; VI-NEXT:    s_or_b64 exec, exec, s[4:5]
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v28i32_to_v14f64:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB8_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.true
; GFX9-NEXT:    v_add_u32_e32 v27, 3, v27
; GFX9-NEXT:    v_add_u32_e32 v26, 3, v26
; GFX9-NEXT:    v_add_u32_e32 v25, 3, v25
; GFX9-NEXT:    v_add_u32_e32 v24, 3, v24
; GFX9-NEXT:    v_add_u32_e32 v23, 3, v23
; GFX9-NEXT:    v_add_u32_e32 v22, 3, v22
; GFX9-NEXT:    v_add_u32_e32 v21, 3, v21
; GFX9-NEXT:    v_add_u32_e32 v20, 3, v20
; GFX9-NEXT:    v_add_u32_e32 v19, 3, v19
; GFX9-NEXT:    v_add_u32_e32 v18, 3, v18
; GFX9-NEXT:    v_add_u32_e32 v17, 3, v17
; GFX9-NEXT:    v_add_u32_e32 v16, 3, v16
; GFX9-NEXT:    v_add_u32_e32 v15, 3, v15
; GFX9-NEXT:    v_add_u32_e32 v14, 3, v14
; GFX9-NEXT:    v_add_u32_e32 v13, 3, v13
; GFX9-NEXT:    v_add_u32_e32 v12, 3, v12
; GFX9-NEXT:    v_add_u32_e32 v11, 3, v11
; GFX9-NEXT:    v_add_u32_e32 v10, 3, v10
; GFX9-NEXT:    v_add_u32_e32 v9, 3, v9
; GFX9-NEXT:    v_add_u32_e32 v8, 3, v8
; GFX9-NEXT:    v_add_u32_e32 v7, 3, v7
; GFX9-NEXT:    v_add_u32_e32 v6, 3, v6
; GFX9-NEXT:    v_add_u32_e32 v5, 3, v5
; GFX9-NEXT:    v_add_u32_e32 v4, 3, v4
; GFX9-NEXT:    v_add_u32_e32 v3, 3, v3
; GFX9-NEXT:    v_add_u32_e32 v2, 3, v2
; GFX9-NEXT:    v_add_u32_e32 v1, 3, v1
; GFX9-NEXT:    v_add_u32_e32 v0, 3, v0
; GFX9-NEXT:  .LBB8_2: ; %end
; GFX9-NEXT:    s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v28i32_to_v14f64:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-NEXT:    s_cbranch_execz .LBB8_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-NEXT:    v_add_nc_u32_e32 v27, 3, v27
; GFX11-NEXT:    v_add_nc_u32_e32 v26, 3, v26
; GFX11-NEXT:    v_add_nc_u32_e32 v25, 3, v25
; GFX11-NEXT:    v_add_nc_u32_e32 v24, 3, v24
; GFX11-NEXT:    v_add_nc_u32_e32 v23, 3, v23
; GFX11-NEXT:    v_add_nc_u32_e32 v22, 3, v22
; GFX11-NEXT:    v_add_nc_u32_e32 v21, 3, v21
; GFX11-NEXT:    v_add_nc_u32_e32 v20, 3, v20
; GFX11-NEXT:    v_add_nc_u32_e32 v19, 3, v19
; GFX11-NEXT:    v_add_nc_u32_e32 v18, 3, v18
; GFX11-NEXT:    v_add_nc_u32_e32 v17, 3, v17
; GFX11-NEXT:    v_add_nc_u32_e32 v16, 3, v16
; GFX11-NEXT:    v_add_nc_u32_e32 v15, 3, v15
; GFX11-NEXT:    v_add_nc_u32_e32 v14, 3, v14
; GFX11-NEXT:    v_add_nc_u32_e32 v13, 3, v13
; GFX11-NEXT:    v_add_nc_u32_e32 v12, 3, v12
; GFX11-NEXT:    v_add_nc_u32_e32 v11, 3, v11
; GFX11-NEXT:    v_add_nc_u32_e32 v10, 3, v10
; GFX11-NEXT:    v_add_nc_u32_e32 v9, 3, v9
; GFX11-NEXT:    v_add_nc_u32_e32 v8, 3, v8
; GFX11-NEXT:    v_add_nc_u32_e32 v7, 3, v7
; GFX11-NEXT:    v_add_nc_u32_e32 v6, 3, v6
; GFX11-NEXT:    v_add_nc_u32_e32 v5, 3, v5
; GFX11-NEXT:    v_add_nc_u32_e32 v4, 3, v4
; GFX11-NEXT:    v_add_nc_u32_e32 v3, 3, v3
; GFX11-NEXT:    v_add_nc_u32_e32 v2, 3, v2
; GFX11-NEXT:    v_add_nc_u32_e32 v1, 3, v1
; GFX11-NEXT:    v_add_nc_u32_e32 v0, 3, v0
; GFX11-NEXT:  .LBB8_2: ; %end
; GFX11-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = add <28 x i32> %a, splat (i32 3)
  %a2 = bitcast <28 x i32> %a1 to <14 x double>
  br label %end

cmp.false:
  %a3 = bitcast <28 x i32> %a to <14 x double>
  br label %end

end:
  %phi = phi <14 x double> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <14 x double> %phi
}

define inreg <14 x double> @bitcast_v28i32_to_v14f64_scalar(<28 x i32> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v28i32_to_v14f64_scalar:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    v_readfirstlane_b32 s41, v14
; SI-NEXT:    v_readfirstlane_b32 s4, v13
; SI-NEXT:    v_readfirstlane_b32 s5, v12
; SI-NEXT:    v_readfirstlane_b32 s6, v11
; SI-NEXT:    v_readfirstlane_b32 s7, v10
; SI-NEXT:    v_readfirstlane_b32 s8, v9
; SI-NEXT:    v_readfirstlane_b32 s9, v8
; SI-NEXT:    v_readfirstlane_b32 s10, v7
; SI-NEXT:    v_readfirstlane_b32 s11, v6
; SI-NEXT:    v_readfirstlane_b32 s12, v5
; SI-NEXT:    v_readfirstlane_b32 s13, v4
; SI-NEXT:    v_readfirstlane_b32 s14, v3
; SI-NEXT:    v_readfirstlane_b32 s15, v2
; SI-NEXT:    v_readfirstlane_b32 s40, v1
; SI-NEXT:    s_cmp_lg_u32 s41, 0
; SI-NEXT:    v_readfirstlane_b32 s41, v0
; SI-NEXT:    s_cbranch_scc1 .LBB9_2
; SI-NEXT:  ; %bb.1: ; %cmp.true
; SI-NEXT:    s_add_i32 s4, s4, 3
; SI-NEXT:    s_add_i32 s5, s5, 3
; SI-NEXT:    s_add_i32 s6, s6, 3
; SI-NEXT:    s_add_i32 s7, s7, 3
; SI-NEXT:    s_add_i32 s8, s8, 3
; SI-NEXT:    s_add_i32 s9, s9, 3
; SI-NEXT:    s_add_i32 s10, s10, 3
; SI-NEXT:    s_add_i32 s11, s11, 3
; SI-NEXT:    s_add_i32 s12, s12, 3
; SI-NEXT:    s_add_i32 s13, s13, 3
; SI-NEXT:    s_add_i32 s14, s14, 3
; SI-NEXT:    s_add_i32 s15, s15, 3
; SI-NEXT:    s_add_i32 s40, s40, 3
; SI-NEXT:    s_add_i32 s41, s41, 3
; SI-NEXT:    s_add_i32 s29, s29, 3
; SI-NEXT:    s_add_i32 s28, s28, 3
; SI-NEXT:    s_add_i32 s27, s27, 3
; SI-NEXT:    s_add_i32 s26, s26, 3
; SI-NEXT:    s_add_i32 s25, s25, 3
; SI-NEXT:    s_add_i32 s24, s24, 3
; SI-NEXT:    s_add_i32 s23, s23, 3
; SI-NEXT:    s_add_i32 s22, s22, 3
; SI-NEXT:    s_add_i32 s21, s21, 3
; SI-NEXT:    s_add_i32 s20, s20, 3
; SI-NEXT:    s_add_i32 s19, s19, 3
; SI-NEXT:    s_add_i32 s18, s18, 3
; SI-NEXT:    s_add_i32 s17, s17, 3
; SI-NEXT:    s_add_i32 s16, s16, 3
; SI-NEXT:  .LBB9_2: ; %end
; SI-NEXT:    v_mov_b32_e32 v0, s16
; SI-NEXT:    v_mov_b32_e32 v1, s17
; SI-NEXT:    v_mov_b32_e32 v2, s18
; SI-NEXT:    v_mov_b32_e32 v3, s19
; SI-NEXT:    v_mov_b32_e32 v4, s20
; SI-NEXT:    v_mov_b32_e32 v5, s21
; SI-NEXT:    v_mov_b32_e32 v6, s22
; SI-NEXT:    v_mov_b32_e32 v7, s23
; SI-NEXT:    v_mov_b32_e32 v8, s24
; SI-NEXT:    v_mov_b32_e32 v9, s25
; SI-NEXT:    v_mov_b32_e32 v10, s26
; SI-NEXT:    v_mov_b32_e32 v11, s27
; SI-NEXT:    v_mov_b32_e32 v12, s28
; SI-NEXT:    v_mov_b32_e32 v13, s29
; SI-NEXT:    v_mov_b32_e32 v14, s41
; SI-NEXT:    v_mov_b32_e32 v15, s40
; SI-NEXT:    v_mov_b32_e32 v16, s15
; SI-NEXT:    v_mov_b32_e32 v17, s14
; SI-NEXT:    v_mov_b32_e32 v18, s13
; SI-NEXT:    v_mov_b32_e32 v19, s12
; SI-NEXT:    v_mov_b32_e32 v20, s11
; SI-NEXT:    v_mov_b32_e32 v21, s10
; SI-NEXT:    v_mov_b32_e32 v22, s9
; SI-NEXT:    v_mov_b32_e32 v23, s8
; SI-NEXT:    v_mov_b32_e32 v24, s7
; SI-NEXT:    v_mov_b32_e32 v25, s6
; SI-NEXT:    v_mov_b32_e32 v26, s5
; SI-NEXT:    v_mov_b32_e32 v27, s4
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v28i32_to_v14f64_scalar:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    v_readfirstlane_b32 s41, v14
; VI-NEXT:    v_readfirstlane_b32 s4, v13
; VI-NEXT:    v_readfirstlane_b32 s5, v12
; VI-NEXT:    v_readfirstlane_b32 s6, v11
; VI-NEXT:    v_readfirstlane_b32 s7, v10
; VI-NEXT:    v_readfirstlane_b32 s8, v9
; VI-NEXT:    v_readfirstlane_b32 s9, v8
; VI-NEXT:    v_readfirstlane_b32 s10, v7
; VI-NEXT:    v_readfirstlane_b32 s11, v6
; VI-NEXT:    v_readfirstlane_b32 s12, v5
; VI-NEXT:    v_readfirstlane_b32 s13, v4
; VI-NEXT:    v_readfirstlane_b32 s14, v3
; VI-NEXT:    v_readfirstlane_b32 s15, v2
; VI-NEXT:    v_readfirstlane_b32 s40, v1
; VI-NEXT:    s_cmp_lg_u32 s41, 0
; VI-NEXT:    v_readfirstlane_b32 s41, v0
; VI-NEXT:    s_cbranch_scc1 .LBB9_2
; VI-NEXT:  ; %bb.1: ; %cmp.true
; VI-NEXT:    s_add_i32 s4, s4, 3
; VI-NEXT:    s_add_i32 s5, s5, 3
; VI-NEXT:    s_add_i32 s6, s6, 3
; VI-NEXT:    s_add_i32 s7, s7, 3
; VI-NEXT:    s_add_i32 s8, s8, 3
; VI-NEXT:    s_add_i32 s9, s9, 3
; VI-NEXT:    s_add_i32 s10, s10, 3
; VI-NEXT:    s_add_i32 s11, s11, 3
; VI-NEXT:    s_add_i32 s12, s12, 3
; VI-NEXT:    s_add_i32 s13, s13, 3
; VI-NEXT:    s_add_i32 s14, s14, 3
; VI-NEXT:    s_add_i32 s15, s15, 3
; VI-NEXT:    s_add_i32 s40, s40, 3
; VI-NEXT:    s_add_i32 s41, s41, 3
; VI-NEXT:    s_add_i32 s29, s29, 3
; VI-NEXT:    s_add_i32 s28, s28, 3
; VI-NEXT:    s_add_i32 s27, s27, 3
; VI-NEXT:    s_add_i32 s26, s26, 3
; VI-NEXT:    s_add_i32 s25, s25, 3
; VI-NEXT:    s_add_i32 s24, s24, 3
; VI-NEXT:    s_add_i32 s23, s23, 3
; VI-NEXT:    s_add_i32 s22, s22, 3
; VI-NEXT:    s_add_i32 s21, s21, 3
; VI-NEXT:    s_add_i32 s20, s20, 3
; VI-NEXT:    s_add_i32 s19, s19, 3
; VI-NEXT:    s_add_i32 s18, s18, 3
; VI-NEXT:    s_add_i32 s17, s17, 3
; VI-NEXT:    s_add_i32 s16, s16, 3
; VI-NEXT:  .LBB9_2: ; %end
; VI-NEXT:    v_mov_b32_e32 v0, s16
; VI-NEXT:    v_mov_b32_e32 v1, s17
; VI-NEXT:    v_mov_b32_e32 v2, s18
; VI-NEXT:    v_mov_b32_e32 v3, s19
; VI-NEXT:    v_mov_b32_e32 v4, s20
; VI-NEXT:    v_mov_b32_e32 v5, s21
; VI-NEXT:    v_mov_b32_e32 v6, s22
; VI-NEXT:    v_mov_b32_e32 v7, s23
; VI-NEXT:    v_mov_b32_e32 v8, s24
; VI-NEXT:    v_mov_b32_e32 v9, s25
; VI-NEXT:    v_mov_b32_e32 v10, s26
; VI-NEXT:    v_mov_b32_e32 v11, s27
; VI-NEXT:    v_mov_b32_e32 v12, s28
; VI-NEXT:    v_mov_b32_e32 v13, s29
; VI-NEXT:    v_mov_b32_e32 v14, s41
; VI-NEXT:    v_mov_b32_e32 v15, s40
; VI-NEXT:    v_mov_b32_e32 v16, s15
; VI-NEXT:    v_mov_b32_e32 v17, s14
; VI-NEXT:    v_mov_b32_e32 v18, s13
; VI-NEXT:    v_mov_b32_e32 v19, s12
; VI-NEXT:    v_mov_b32_e32 v20, s11
; VI-NEXT:    v_mov_b32_e32 v21, s10
; VI-NEXT:    v_mov_b32_e32 v22, s9
; VI-NEXT:    v_mov_b32_e32 v23, s8
; VI-NEXT:    v_mov_b32_e32 v24, s7
; VI-NEXT:    v_mov_b32_e32 v25, s6
; VI-NEXT:    v_mov_b32_e32 v26, s5
; VI-NEXT:    v_mov_b32_e32 v27, s4
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v28i32_to_v14f64_scalar:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_readfirstlane_b32 s41, v14
; GFX9-NEXT:    v_readfirstlane_b32 s4, v13
; GFX9-NEXT:    v_readfirstlane_b32 s5, v12
; GFX9-NEXT:    v_readfirstlane_b32 s6, v11
; GFX9-NEXT:    v_readfirstlane_b32 s7, v10
; GFX9-NEXT:    v_readfirstlane_b32 s8, v9
; GFX9-NEXT:    v_readfirstlane_b32 s9, v8
; GFX9-NEXT:    v_readfirstlane_b32 s10, v7
; GFX9-NEXT:    v_readfirstlane_b32 s11, v6
; GFX9-NEXT:    v_readfirstlane_b32 s12, v5
; GFX9-NEXT:    v_readfirstlane_b32 s13, v4
; GFX9-NEXT:    v_readfirstlane_b32 s14, v3
; GFX9-NEXT:    v_readfirstlane_b32 s15, v2
; GFX9-NEXT:    v_readfirstlane_b32 s40, v1
; GFX9-NEXT:    s_cmp_lg_u32 s41, 0
; GFX9-NEXT:    v_readfirstlane_b32 s41, v0
; GFX9-NEXT:    s_cbranch_scc1 .LBB9_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.true
; GFX9-NEXT:    s_add_i32 s4, s4, 3
; GFX9-NEXT:    s_add_i32 s5, s5, 3
; GFX9-NEXT:    s_add_i32 s6, s6, 3
; GFX9-NEXT:    s_add_i32 s7, s7, 3
; GFX9-NEXT:    s_add_i32 s8, s8, 3
; GFX9-NEXT:    s_add_i32 s9, s9, 3
; GFX9-NEXT:    s_add_i32 s10, s10, 3
; GFX9-NEXT:    s_add_i32 s11, s11, 3
; GFX9-NEXT:    s_add_i32 s12, s12, 3
; GFX9-NEXT:    s_add_i32 s13, s13, 3
; GFX9-NEXT:    s_add_i32 s14, s14, 3
; GFX9-NEXT:    s_add_i32 s15, s15, 3
; GFX9-NEXT:    s_add_i32 s40, s40, 3
; GFX9-NEXT:    s_add_i32 s41, s41, 3
; GFX9-NEXT:    s_add_i32 s29, s29, 3
; GFX9-NEXT:    s_add_i32 s28, s28, 3
; GFX9-NEXT:    s_add_i32 s27, s27, 3
; GFX9-NEXT:    s_add_i32 s26, s26, 3
; GFX9-NEXT:    s_add_i32 s25, s25, 3
; GFX9-NEXT:    s_add_i32 s24, s24, 3
; GFX9-NEXT:    s_add_i32 s23, s23, 3
; GFX9-NEXT:    s_add_i32 s22, s22, 3
; GFX9-NEXT:    s_add_i32 s21, s21, 3
; GFX9-NEXT:    s_add_i32 s20, s20, 3
; GFX9-NEXT:    s_add_i32 s19, s19, 3
; GFX9-NEXT:    s_add_i32 s18, s18, 3
; GFX9-NEXT:    s_add_i32 s17, s17, 3
; GFX9-NEXT:    s_add_i32 s16, s16, 3
; GFX9-NEXT:  .LBB9_2: ; %end
; GFX9-NEXT:    v_mov_b32_e32 v0, s16
; GFX9-NEXT:    v_mov_b32_e32 v1, s17
; GFX9-NEXT:    v_mov_b32_e32 v2, s18
; GFX9-NEXT:    v_mov_b32_e32 v3, s19
; GFX9-NEXT:    v_mov_b32_e32 v4, s20
; GFX9-NEXT:    v_mov_b32_e32 v5, s21
; GFX9-NEXT:    v_mov_b32_e32 v6, s22
; GFX9-NEXT:    v_mov_b32_e32 v7, s23
; GFX9-NEXT:    v_mov_b32_e32 v8, s24
; GFX9-NEXT:    v_mov_b32_e32 v9, s25
; GFX9-NEXT:    v_mov_b32_e32 v10, s26
; GFX9-NEXT:    v_mov_b32_e32 v11, s27
; GFX9-NEXT:    v_mov_b32_e32 v12, s28
; GFX9-NEXT:    v_mov_b32_e32 v13, s29
; GFX9-NEXT:    v_mov_b32_e32 v14, s41
; GFX9-NEXT:    v_mov_b32_e32 v15, s40
; GFX9-NEXT:    v_mov_b32_e32 v16, s15
; GFX9-NEXT:    v_mov_b32_e32 v17, s14
; GFX9-NEXT:    v_mov_b32_e32 v18, s13
; GFX9-NEXT:    v_mov_b32_e32 v19, s12
; GFX9-NEXT:    v_mov_b32_e32 v20, s11
; GFX9-NEXT:    v_mov_b32_e32 v21, s10
; GFX9-NEXT:    v_mov_b32_e32 v22, s9
; GFX9-NEXT:    v_mov_b32_e32 v23, s8
; GFX9-NEXT:    v_mov_b32_e32 v24, s7
; GFX9-NEXT:    v_mov_b32_e32 v25, s6
; GFX9-NEXT:    v_mov_b32_e32 v26, s5
; GFX9-NEXT:    v_mov_b32_e32 v27, s4
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v28i32_to_v14f64_scalar:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_readfirstlane_b32 s14, v10
; GFX11-NEXT:    v_readfirstlane_b32 s4, v9
; GFX11-NEXT:    v_readfirstlane_b32 s5, v8
; GFX11-NEXT:    v_readfirstlane_b32 s6, v7
; GFX11-NEXT:    v_readfirstlane_b32 s7, v6
; GFX11-NEXT:    v_readfirstlane_b32 s8, v5
; GFX11-NEXT:    v_readfirstlane_b32 s9, v4
; GFX11-NEXT:    v_readfirstlane_b32 s10, v3
; GFX11-NEXT:    v_readfirstlane_b32 s11, v2
; GFX11-NEXT:    v_readfirstlane_b32 s12, v1
; GFX11-NEXT:    v_readfirstlane_b32 s13, v0
; GFX11-NEXT:    s_cmp_lg_u32 s14, 0
; GFX11-NEXT:    s_cbranch_scc1 .LBB9_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-NEXT:    s_add_i32 s4, s4, 3
; GFX11-NEXT:    s_add_i32 s5, s5, 3
; GFX11-NEXT:    s_add_i32 s6, s6, 3
; GFX11-NEXT:    s_add_i32 s7, s7, 3
; GFX11-NEXT:    s_add_i32 s8, s8, 3
; GFX11-NEXT:    s_add_i32 s9, s9, 3
; GFX11-NEXT:    s_add_i32 s10, s10, 3
; GFX11-NEXT:    s_add_i32 s11, s11, 3
; GFX11-NEXT:    s_add_i32 s12, s12, 3
; GFX11-NEXT:    s_add_i32 s13, s13, 3
; GFX11-NEXT:    s_add_i32 s29, s29, 3
; GFX11-NEXT:    s_add_i32 s28, s28, 3
; GFX11-NEXT:    s_add_i32 s27, s27, 3
; GFX11-NEXT:    s_add_i32 s26, s26, 3
; GFX11-NEXT:    s_add_i32 s25, s25, 3
; GFX11-NEXT:    s_add_i32 s24, s24, 3
; GFX11-NEXT:    s_add_i32 s23, s23, 3
; GFX11-NEXT:    s_add_i32 s22, s22, 3
; GFX11-NEXT:    s_add_i32 s21, s21, 3
; GFX11-NEXT:    s_add_i32 s20, s20, 3
; GFX11-NEXT:    s_add_i32 s19, s19, 3
; GFX11-NEXT:    s_add_i32 s18, s18, 3
; GFX11-NEXT:    s_add_i32 s17, s17, 3
; GFX11-NEXT:    s_add_i32 s16, s16, 3
; GFX11-NEXT:    s_add_i32 s3, s3, 3
; GFX11-NEXT:    s_add_i32 s2, s2, 3
; GFX11-NEXT:    s_add_i32 s1, s1, 3
; GFX11-NEXT:    s_add_i32 s0, s0, 3
; GFX11-NEXT:  .LBB9_2: ; %end
; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT:    v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX11-NEXT:    v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; GFX11-NEXT:    v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
; GFX11-NEXT:    v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
; GFX11-NEXT:    v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
; GFX11-NEXT:    v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
; GFX11-NEXT:    v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
; GFX11-NEXT:    v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
; GFX11-NEXT:    v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
; GFX11-NEXT:    v_dual_mov_b32 v18, s13 :: v_dual_mov_b32 v19, s12
; GFX11-NEXT:    v_dual_mov_b32 v20, s11 :: v_dual_mov_b32 v21, s10
; GFX11-NEXT:    v_dual_mov_b32 v22, s9 :: v_dual_mov_b32 v23, s8
; GFX11-NEXT:    v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s6
; GFX11-NEXT:    v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s4
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = add <28 x i32> %a, splat (i32 3)
  %a2 = bitcast <28 x i32> %a1 to <14 x double>
  br label %end

cmp.false:
  %a3 = bitcast <28 x i32> %a to <14 x double>
  br label %end

end:
  %phi = phi <14 x double> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <14 x double> %phi
}

define <28 x i32> @bitcast_v14f64_to_v28i32(<14 x double> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v14f64_to_v28i32:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB10_2
; SI-NEXT:  ; %bb.1: ; %cmp.true
; SI-NEXT:    v_add_f64 v[26:27], v[26:27], 1.0
; SI-NEXT:    v_add_f64 v[24:25], v[24:25], 1.0
; SI-NEXT:    v_add_f64 v[22:23], v[22:23], 1.0
; SI-NEXT:    v_add_f64 v[20:21], v[20:21], 1.0
; SI-NEXT:    v_add_f64 v[18:19], v[18:19], 1.0
; SI-NEXT:    v_add_f64 v[16:17], v[16:17], 1.0
; SI-NEXT:    v_add_f64 v[14:15], v[14:15], 1.0
; SI-NEXT:    v_add_f64 v[12:13], v[12:13], 1.0
; SI-NEXT:    v_add_f64 v[10:11], v[10:11], 1.0
; SI-NEXT:    v_add_f64 v[8:9], v[8:9], 1.0
; SI-NEXT:    v_add_f64 v[6:7], v[6:7], 1.0
; SI-NEXT:    v_add_f64 v[4:5], v[4:5], 1.0
; SI-NEXT:    v_add_f64 v[2:3], v[2:3], 1.0
; SI-NEXT:    v_add_f64 v[0:1], v[0:1], 1.0
; SI-NEXT:  .LBB10_2: ; %end
; SI-NEXT:    s_or_b64 exec, exec, s[4:5]
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v14f64_to_v28i32:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB10_2
; VI-NEXT:  ; %bb.1: ; %cmp.true
; VI-NEXT:    v_add_f64 v[26:27], v[26:27], 1.0
; VI-NEXT:    v_add_f64 v[24:25], v[24:25], 1.0
; VI-NEXT:    v_add_f64 v[22:23], v[22:23], 1.0
; VI-NEXT:    v_add_f64 v[20:21], v[20:21], 1.0
; VI-NEXT:    v_add_f64 v[18:19], v[18:19], 1.0
; VI-NEXT:    v_add_f64 v[16:17], v[16:17], 1.0
; VI-NEXT:    v_add_f64 v[14:15], v[14:15], 1.0
; VI-NEXT:    v_add_f64 v[12:13], v[12:13], 1.0
; VI-NEXT:    v_add_f64 v[10:11], v[10:11], 1.0
; VI-NEXT:    v_add_f64 v[8:9], v[8:9], 1.0
; VI-NEXT:    v_add_f64 v[6:7], v[6:7], 1.0
; VI-NEXT:    v_add_f64 v[4:5], v[4:5], 1.0
; VI-NEXT:    v_add_f64 v[2:3], v[2:3], 1.0
; VI-NEXT:    v_add_f64 v[0:1], v[0:1], 1.0
; VI-NEXT:  .LBB10_2: ; %end
; VI-NEXT:    s_or_b64 exec, exec, s[4:5]
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v14f64_to_v28i32:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB10_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.true
; GFX9-NEXT:    v_add_f64 v[26:27], v[26:27], 1.0
; GFX9-NEXT:    v_add_f64 v[24:25], v[24:25], 1.0
; GFX9-NEXT:    v_add_f64 v[22:23], v[22:23], 1.0
; GFX9-NEXT:    v_add_f64 v[20:21], v[20:21], 1.0
; GFX9-NEXT:    v_add_f64 v[18:19], v[18:19], 1.0
; GFX9-NEXT:    v_add_f64 v[16:17], v[16:17], 1.0
; GFX9-NEXT:    v_add_f64 v[14:15], v[14:15], 1.0
; GFX9-NEXT:    v_add_f64 v[12:13], v[12:13], 1.0
; GFX9-NEXT:    v_add_f64 v[10:11], v[10:11], 1.0
; GFX9-NEXT:    v_add_f64 v[8:9], v[8:9], 1.0
; GFX9-NEXT:    v_add_f64 v[6:7], v[6:7], 1.0
; GFX9-NEXT:    v_add_f64 v[4:5], v[4:5], 1.0
; GFX9-NEXT:    v_add_f64 v[2:3], v[2:3], 1.0
; GFX9-NEXT:    v_add_f64 v[0:1], v[0:1], 1.0
; GFX9-NEXT:  .LBB10_2: ; %end
; GFX9-NEXT:    s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v14f64_to_v28i32:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-NEXT:    s_cbranch_execz .LBB10_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-NEXT:    v_add_f64 v[26:27], v[26:27], 1.0
; GFX11-NEXT:    v_add_f64 v[24:25], v[24:25], 1.0
; GFX11-NEXT:    v_add_f64 v[22:23], v[22:23], 1.0
; GFX11-NEXT:    v_add_f64 v[20:21], v[20:21], 1.0
; GFX11-NEXT:    v_add_f64 v[18:19], v[18:19], 1.0
; GFX11-NEXT:    v_add_f64 v[16:17], v[16:17], 1.0
; GFX11-NEXT:    v_add_f64 v[14:15], v[14:15], 1.0
; GFX11-NEXT:    v_add_f64 v[12:13], v[12:13], 1.0
; GFX11-NEXT:    v_add_f64 v[10:11], v[10:11], 1.0
; GFX11-NEXT:    v_add_f64 v[8:9], v[8:9], 1.0
; GFX11-NEXT:    v_add_f64 v[6:7], v[6:7], 1.0
; GFX11-NEXT:    v_add_f64 v[4:5], v[4:5], 1.0
; GFX11-NEXT:    v_add_f64 v[2:3], v[2:3], 1.0
; GFX11-NEXT:    v_add_f64 v[0:1], v[0:1], 1.0
; GFX11-NEXT:  .LBB10_2: ; %end
; GFX11-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = fadd <14 x double> %a, splat (double 1.000000e+00)
  %a2 = bitcast <14 x double> %a1 to <28 x i32>
  br label %end

cmp.false:
  %a3 = bitcast <14 x double> %a to <28 x i32>
  br label %end

end:
  %phi = phi <28 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <28 x i32> %phi
}

define inreg <28 x i32> @bitcast_v14f64_to_v28i32_scalar(<14 x double> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v14f64_to_v28i32_scalar:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_writelane_b32 v32, s36, 0
; SI-NEXT:    v_writelane_b32 v32, s37, 1
; SI-NEXT:    v_writelane_b32 v32, s38, 2
; SI-NEXT:    v_writelane_b32 v32, s39, 3
; SI-NEXT:    v_writelane_b32 v32, s48, 4
; SI-NEXT:    v_writelane_b32 v32, s49, 5
; SI-NEXT:    v_writelane_b32 v32, s50, 6
; SI-NEXT:    v_writelane_b32 v32, s51, 7
; SI-NEXT:    v_writelane_b32 v32, s52, 8
; SI-NEXT:    v_writelane_b32 v32, s53, 9
; SI-NEXT:    v_writelane_b32 v32, s54, 10
; SI-NEXT:    v_writelane_b32 v32, s55, 11
; SI-NEXT:    v_readfirstlane_b32 s4, v14
; SI-NEXT:    s_mov_b32 s49, s29
; SI-NEXT:    s_mov_b32 s48, s28
; SI-NEXT:    s_mov_b32 s47, s27
; SI-NEXT:    s_mov_b32 s46, s26
; SI-NEXT:    s_mov_b32 s45, s25
; SI-NEXT:    s_mov_b32 s44, s24
; SI-NEXT:    s_mov_b32 s43, s23
; SI-NEXT:    s_mov_b32 s42, s22
; SI-NEXT:    s_mov_b32 s41, s21
; SI-NEXT:    s_mov_b32 s40, s20
; SI-NEXT:    s_mov_b32 s39, s19
; SI-NEXT:    s_mov_b32 s38, s18
; SI-NEXT:    s_mov_b32 s37, s17
; SI-NEXT:    s_mov_b32 s36, s16
; SI-NEXT:    v_readfirstlane_b32 s63, v13
; SI-NEXT:    v_readfirstlane_b32 s62, v12
; SI-NEXT:    v_readfirstlane_b32 s61, v11
; SI-NEXT:    v_readfirstlane_b32 s60, v10
; SI-NEXT:    v_readfirstlane_b32 s59, v9
; SI-NEXT:    v_readfirstlane_b32 s58, v8
; SI-NEXT:    v_readfirstlane_b32 s57, v7
; SI-NEXT:    v_readfirstlane_b32 s56, v6
; SI-NEXT:    v_readfirstlane_b32 s55, v5
; SI-NEXT:    v_readfirstlane_b32 s54, v4
; SI-NEXT:    v_readfirstlane_b32 s53, v3
; SI-NEXT:    v_readfirstlane_b32 s52, v2
; SI-NEXT:    v_readfirstlane_b32 s51, v1
; SI-NEXT:    s_cmp_lg_u32 s4, 0
; SI-NEXT:    v_readfirstlane_b32 s50, v0
; SI-NEXT:    s_cbranch_scc0 .LBB11_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    v_mov_b32_e32 v0, s36
; SI-NEXT:    v_mov_b32_e32 v1, s37
; SI-NEXT:    v_mov_b32_e32 v2, s38
; SI-NEXT:    v_mov_b32_e32 v3, s39
; SI-NEXT:    v_mov_b32_e32 v4, s40
; SI-NEXT:    v_mov_b32_e32 v5, s41
; SI-NEXT:    v_mov_b32_e32 v6, s42
; SI-NEXT:    v_mov_b32_e32 v7, s43
; SI-NEXT:    v_mov_b32_e32 v8, s44
; SI-NEXT:    v_mov_b32_e32 v9, s45
; SI-NEXT:    v_mov_b32_e32 v10, s46
; SI-NEXT:    v_mov_b32_e32 v11, s47
; SI-NEXT:    v_mov_b32_e32 v12, s48
; SI-NEXT:    v_mov_b32_e32 v13, s49
; SI-NEXT:    v_mov_b32_e32 v14, s50
; SI-NEXT:    v_mov_b32_e32 v15, s51
; SI-NEXT:    v_mov_b32_e32 v16, s52
; SI-NEXT:    v_mov_b32_e32 v17, s53
; SI-NEXT:    v_mov_b32_e32 v18, s54
; SI-NEXT:    v_mov_b32_e32 v19, s55
; SI-NEXT:    v_mov_b32_e32 v20, s56
; SI-NEXT:    v_mov_b32_e32 v21, s57
; SI-NEXT:    v_mov_b32_e32 v22, s58
; SI-NEXT:    v_mov_b32_e32 v23, s59
; SI-NEXT:    v_mov_b32_e32 v24, s60
; SI-NEXT:    v_mov_b32_e32 v25, s61
; SI-NEXT:    v_mov_b32_e32 v26, s62
; SI-NEXT:    v_mov_b32_e32 v27, s63
; SI-NEXT:    v_mov_b32_e32 v28, s64
; SI-NEXT:    v_mov_b32_e32 v29, s65
; SI-NEXT:    v_mov_b32_e32 v30, s66
; SI-NEXT:    v_mov_b32_e32 v31, s67
; SI-NEXT:    s_branch .LBB11_3
; SI-NEXT:  .LBB11_2: ; %cmp.true
; SI-NEXT:    v_add_f64 v[26:27], s[62:63], 1.0
; SI-NEXT:    v_add_f64 v[24:25], s[60:61], 1.0
; SI-NEXT:    v_add_f64 v[22:23], s[58:59], 1.0
; SI-NEXT:    v_add_f64 v[20:21], s[56:57], 1.0
; SI-NEXT:    v_add_f64 v[18:19], s[54:55], 1.0
; SI-NEXT:    v_add_f64 v[16:17], s[52:53], 1.0
; SI-NEXT:    v_add_f64 v[14:15], s[50:51], 1.0
; SI-NEXT:    v_add_f64 v[12:13], s[48:49], 1.0
; SI-NEXT:    v_add_f64 v[10:11], s[46:47], 1.0
; SI-NEXT:    v_add_f64 v[8:9], s[44:45], 1.0
; SI-NEXT:    v_add_f64 v[6:7], s[42:43], 1.0
; SI-NEXT:    v_add_f64 v[4:5], s[40:41], 1.0
; SI-NEXT:    v_add_f64 v[2:3], s[38:39], 1.0
; SI-NEXT:    v_add_f64 v[0:1], s[36:37], 1.0
; SI-NEXT:  .LBB11_3: ; %end
; SI-NEXT:    v_readlane_b32 s55, v32, 11
; SI-NEXT:    v_readlane_b32 s54, v32, 10
; SI-NEXT:    v_readlane_b32 s53, v32, 9
; SI-NEXT:    v_readlane_b32 s52, v32, 8
; SI-NEXT:    v_readlane_b32 s51, v32, 7
; SI-NEXT:    v_readlane_b32 s50, v32, 6
; SI-NEXT:    v_readlane_b32 s49, v32, 5
; SI-NEXT:    v_readlane_b32 s48, v32, 4
; SI-NEXT:    v_readlane_b32 s39, v32, 3
; SI-NEXT:    v_readlane_b32 s38, v32, 2
; SI-NEXT:    v_readlane_b32 s37, v32, 1
; SI-NEXT:    v_readlane_b32 s36, v32, 0
; SI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v14f64_to_v28i32_scalar:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    v_writelane_b32 v32, s36, 0
; VI-NEXT:    v_writelane_b32 v32, s37, 1
; VI-NEXT:    v_writelane_b32 v32, s38, 2
; VI-NEXT:    v_writelane_b32 v32, s39, 3
; VI-NEXT:    v_writelane_b32 v32, s48, 4
; VI-NEXT:    v_writelane_b32 v32, s49, 5
; VI-NEXT:    v_writelane_b32 v32, s50, 6
; VI-NEXT:    v_writelane_b32 v32, s51, 7
; VI-NEXT:    v_writelane_b32 v32, s52, 8
; VI-NEXT:    v_writelane_b32 v32, s53, 9
; VI-NEXT:    v_writelane_b32 v32, s54, 10
; VI-NEXT:    v_writelane_b32 v32, s55, 11
; VI-NEXT:    v_readfirstlane_b32 s4, v14
; VI-NEXT:    s_mov_b32 s49, s29
; VI-NEXT:    s_mov_b32 s48, s28
; VI-NEXT:    s_mov_b32 s47, s27
; VI-NEXT:    s_mov_b32 s46, s26
; VI-NEXT:    s_mov_b32 s45, s25
; VI-NEXT:    s_mov_b32 s44, s24
; VI-NEXT:    s_mov_b32 s43, s23
; VI-NEXT:    s_mov_b32 s42, s22
; VI-NEXT:    s_mov_b32 s41, s21
; VI-NEXT:    s_mov_b32 s40, s20
; VI-NEXT:    s_mov_b32 s39, s19
; VI-NEXT:    s_mov_b32 s38, s18
; VI-NEXT:    s_mov_b32 s37, s17
; VI-NEXT:    s_mov_b32 s36, s16
; VI-NEXT:    v_readfirstlane_b32 s63, v13
; VI-NEXT:    v_readfirstlane_b32 s62, v12
; VI-NEXT:    v_readfirstlane_b32 s61, v11
; VI-NEXT:    v_readfirstlane_b32 s60, v10
; VI-NEXT:    v_readfirstlane_b32 s59, v9
; VI-NEXT:    v_readfirstlane_b32 s58, v8
; VI-NEXT:    v_readfirstlane_b32 s57, v7
; VI-NEXT:    v_readfirstlane_b32 s56, v6
; VI-NEXT:    v_readfirstlane_b32 s55, v5
; VI-NEXT:    v_readfirstlane_b32 s54, v4
; VI-NEXT:    v_readfirstlane_b32 s53, v3
; VI-NEXT:    v_readfirstlane_b32 s52, v2
; VI-NEXT:    v_readfirstlane_b32 s51, v1
; VI-NEXT:    s_cmp_lg_u32 s4, 0
; VI-NEXT:    v_readfirstlane_b32 s50, v0
; VI-NEXT:    s_cbranch_scc0 .LBB11_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    v_mov_b32_e32 v0, s36
; VI-NEXT:    v_mov_b32_e32 v1, s37
; VI-NEXT:    v_mov_b32_e32 v2, s38
; VI-NEXT:    v_mov_b32_e32 v3, s39
; VI-NEXT:    v_mov_b32_e32 v4, s40
; VI-NEXT:    v_mov_b32_e32 v5, s41
; VI-NEXT:    v_mov_b32_e32 v6, s42
; VI-NEXT:    v_mov_b32_e32 v7, s43
; VI-NEXT:    v_mov_b32_e32 v8, s44
; VI-NEXT:    v_mov_b32_e32 v9, s45
; VI-NEXT:    v_mov_b32_e32 v10, s46
; VI-NEXT:    v_mov_b32_e32 v11, s47
; VI-NEXT:    v_mov_b32_e32 v12, s48
; VI-NEXT:    v_mov_b32_e32 v13, s49
; VI-NEXT:    v_mov_b32_e32 v14, s50
; VI-NEXT:    v_mov_b32_e32 v15, s51
; VI-NEXT:    v_mov_b32_e32 v16, s52
; VI-NEXT:    v_mov_b32_e32 v17, s53
; VI-NEXT:    v_mov_b32_e32 v18, s54
; VI-NEXT:    v_mov_b32_e32 v19, s55
; VI-NEXT:    v_mov_b32_e32 v20, s56
; VI-NEXT:    v_mov_b32_e32 v21, s57
; VI-NEXT:    v_mov_b32_e32 v22, s58
; VI-NEXT:    v_mov_b32_e32 v23, s59
; VI-NEXT:    v_mov_b32_e32 v24, s60
; VI-NEXT:    v_mov_b32_e32 v25, s61
; VI-NEXT:    v_mov_b32_e32 v26, s62
; VI-NEXT:    v_mov_b32_e32 v27, s63
; VI-NEXT:    v_mov_b32_e32 v28, s64
; VI-NEXT:    v_mov_b32_e32 v29, s65
; VI-NEXT:    v_mov_b32_e32 v30, s66
; VI-NEXT:    v_mov_b32_e32 v31, s67
; VI-NEXT:    s_branch .LBB11_3
; VI-NEXT:  .LBB11_2: ; %cmp.true
; VI-NEXT:    v_add_f64 v[26:27], s[62:63], 1.0
; VI-NEXT:    v_add_f64 v[24:25], s[60:61], 1.0
; VI-NEXT:    v_add_f64 v[22:23], s[58:59], 1.0
; VI-NEXT:    v_add_f64 v[20:21], s[56:57], 1.0
; VI-NEXT:    v_add_f64 v[18:19], s[54:55], 1.0
; VI-NEXT:    v_add_f64 v[16:17], s[52:53], 1.0
; VI-NEXT:    v_add_f64 v[14:15], s[50:51], 1.0
; VI-NEXT:    v_add_f64 v[12:13], s[48:49], 1.0
; VI-NEXT:    v_add_f64 v[10:11], s[46:47], 1.0
; VI-NEXT:    v_add_f64 v[8:9], s[44:45], 1.0
; VI-NEXT:    v_add_f64 v[6:7], s[42:43], 1.0
; VI-NEXT:    v_add_f64 v[4:5], s[40:41], 1.0
; VI-NEXT:    v_add_f64 v[2:3], s[38:39], 1.0
; VI-NEXT:    v_add_f64 v[0:1], s[36:37], 1.0
; VI-NEXT:  .LBB11_3: ; %end
; VI-NEXT:    v_readlane_b32 s55, v32, 11
; VI-NEXT:    v_readlane_b32 s54, v32, 10
; VI-NEXT:    v_readlane_b32 s53, v32, 9
; VI-NEXT:    v_readlane_b32 s52, v32, 8
; VI-NEXT:    v_readlane_b32 s51, v32, 7
; VI-NEXT:    v_readlane_b32 s50, v32, 6
; VI-NEXT:    v_readlane_b32 s49, v32, 5
; VI-NEXT:    v_readlane_b32 s48, v32, 4
; VI-NEXT:    v_readlane_b32 s39, v32, 3
; VI-NEXT:    v_readlane_b32 s38, v32, 2
; VI-NEXT:    v_readlane_b32 s37, v32, 1
; VI-NEXT:    v_readlane_b32 s36, v32, 0
; VI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v14f64_to_v28i32_scalar:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    s_mov_b64 exec, s[4:5]
; GFX9-NEXT:    v_writelane_b32 v32, s36, 0
; GFX9-NEXT:    v_writelane_b32 v32, s37, 1
; GFX9-NEXT:    v_writelane_b32 v32, s38, 2
; GFX9-NEXT:    v_writelane_b32 v32, s39, 3
; GFX9-NEXT:    v_writelane_b32 v32, s48, 4
; GFX9-NEXT:    v_writelane_b32 v32, s49, 5
; GFX9-NEXT:    v_writelane_b32 v32, s50, 6
; GFX9-NEXT:    v_writelane_b32 v32, s51, 7
; GFX9-NEXT:    v_writelane_b32 v32, s52, 8
; GFX9-NEXT:    v_writelane_b32 v32, s53, 9
; GFX9-NEXT:    v_writelane_b32 v32, s54, 10
; GFX9-NEXT:    v_writelane_b32 v32, s55, 11
; GFX9-NEXT:    v_readfirstlane_b32 s4, v14
; GFX9-NEXT:    s_mov_b32 s49, s29
; GFX9-NEXT:    s_mov_b32 s48, s28
; GFX9-NEXT:    s_mov_b32 s47, s27
; GFX9-NEXT:    s_mov_b32 s46, s26
; GFX9-NEXT:    s_mov_b32 s45, s25
; GFX9-NEXT:    s_mov_b32 s44, s24
; GFX9-NEXT:    s_mov_b32 s43, s23
; GFX9-NEXT:    s_mov_b32 s42, s22
; GFX9-NEXT:    s_mov_b32 s41, s21
; GFX9-NEXT:    s_mov_b32 s40, s20
; GFX9-NEXT:    s_mov_b32 s39, s19
; GFX9-NEXT:    s_mov_b32 s38, s18
; GFX9-NEXT:    s_mov_b32 s37, s17
; GFX9-NEXT:    s_mov_b32 s36, s16
; GFX9-NEXT:    v_readfirstlane_b32 s63, v13
; GFX9-NEXT:    v_readfirstlane_b32 s62, v12
; GFX9-NEXT:    v_readfirstlane_b32 s61, v11
; GFX9-NEXT:    v_readfirstlane_b32 s60, v10
; GFX9-NEXT:    v_readfirstlane_b32 s59, v9
; GFX9-NEXT:    v_readfirstlane_b32 s58, v8
; GFX9-NEXT:    v_readfirstlane_b32 s57, v7
; GFX9-NEXT:    v_readfirstlane_b32 s56, v6
; GFX9-NEXT:    v_readfirstlane_b32 s55, v5
; GFX9-NEXT:    v_readfirstlane_b32 s54, v4
; GFX9-NEXT:    v_readfirstlane_b32 s53, v3
; GFX9-NEXT:    v_readfirstlane_b32 s52, v2
; GFX9-NEXT:    v_readfirstlane_b32 s51, v1
; GFX9-NEXT:    s_cmp_lg_u32 s4, 0
; GFX9-NEXT:    v_readfirstlane_b32 s50, v0
; GFX9-NEXT:    s_cbranch_scc0 .LBB11_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    v_mov_b32_e32 v0, s36
; GFX9-NEXT:    v_mov_b32_e32 v1, s37
; GFX9-NEXT:    v_mov_b32_e32 v2, s38
; GFX9-NEXT:    v_mov_b32_e32 v3, s39
; GFX9-NEXT:    v_mov_b32_e32 v4, s40
; GFX9-NEXT:    v_mov_b32_e32 v5, s41
; GFX9-NEXT:    v_mov_b32_e32 v6, s42
; GFX9-NEXT:    v_mov_b32_e32 v7, s43
; GFX9-NEXT:    v_mov_b32_e32 v8, s44
; GFX9-NEXT:    v_mov_b32_e32 v9, s45
; GFX9-NEXT:    v_mov_b32_e32 v10, s46
; GFX9-NEXT:    v_mov_b32_e32 v11, s47
; GFX9-NEXT:    v_mov_b32_e32 v12, s48
; GFX9-NEXT:    v_mov_b32_e32 v13, s49
; GFX9-NEXT:    v_mov_b32_e32 v14, s50
; GFX9-NEXT:    v_mov_b32_e32 v15, s51
; GFX9-NEXT:    v_mov_b32_e32 v16, s52
; GFX9-NEXT:    v_mov_b32_e32 v17, s53
; GFX9-NEXT:    v_mov_b32_e32 v18, s54
; GFX9-NEXT:    v_mov_b32_e32 v19, s55
; GFX9-NEXT:    v_mov_b32_e32 v20, s56
; GFX9-NEXT:    v_mov_b32_e32 v21, s57
; GFX9-NEXT:    v_mov_b32_e32 v22, s58
; GFX9-NEXT:    v_mov_b32_e32 v23, s59
; GFX9-NEXT:    v_mov_b32_e32 v24, s60
; GFX9-NEXT:    v_mov_b32_e32 v25, s61
; GFX9-NEXT:    v_mov_b32_e32 v26, s62
; GFX9-NEXT:    v_mov_b32_e32 v27, s63
; GFX9-NEXT:    v_mov_b32_e32 v28, s64
; GFX9-NEXT:    v_mov_b32_e32 v29, s65
; GFX9-NEXT:    v_mov_b32_e32 v30, s66
; GFX9-NEXT:    v_mov_b32_e32 v31, s67
; GFX9-NEXT:    s_branch .LBB11_3
; GFX9-NEXT:  .LBB11_2: ; %cmp.true
; GFX9-NEXT:    v_add_f64 v[26:27], s[62:63], 1.0
; GFX9-NEXT:    v_add_f64 v[24:25], s[60:61], 1.0
; GFX9-NEXT:    v_add_f64 v[22:23], s[58:59], 1.0
; GFX9-NEXT:    v_add_f64 v[20:21], s[56:57], 1.0
; GFX9-NEXT:    v_add_f64 v[18:19], s[54:55], 1.0
; GFX9-NEXT:    v_add_f64 v[16:17], s[52:53], 1.0
; GFX9-NEXT:    v_add_f64 v[14:15], s[50:51], 1.0
; GFX9-NEXT:    v_add_f64 v[12:13], s[48:49], 1.0
; GFX9-NEXT:    v_add_f64 v[10:11], s[46:47], 1.0
; GFX9-NEXT:    v_add_f64 v[8:9], s[44:45], 1.0
; GFX9-NEXT:    v_add_f64 v[6:7], s[42:43], 1.0
; GFX9-NEXT:    v_add_f64 v[4:5], s[40:41], 1.0
; GFX9-NEXT:    v_add_f64 v[2:3], s[38:39], 1.0
; GFX9-NEXT:    v_add_f64 v[0:1], s[36:37], 1.0
; GFX9-NEXT:  .LBB11_3: ; %end
; GFX9-NEXT:    v_readlane_b32 s55, v32, 11
; GFX9-NEXT:    v_readlane_b32 s54, v32, 10
; GFX9-NEXT:    v_readlane_b32 s53, v32, 9
; GFX9-NEXT:    v_readlane_b32 s52, v32, 8
; GFX9-NEXT:    v_readlane_b32 s51, v32, 7
; GFX9-NEXT:    v_readlane_b32 s50, v32, 6
; GFX9-NEXT:    v_readlane_b32 s49, v32, 5
; GFX9-NEXT:    v_readlane_b32 s48, v32, 4
; GFX9-NEXT:    v_readlane_b32 s39, v32, 3
; GFX9-NEXT:    v_readlane_b32 s38, v32, 2
; GFX9-NEXT:    v_readlane_b32 s37, v32, 1
; GFX9-NEXT:    v_readlane_b32 s36, v32, 0
; GFX9-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    s_mov_b64 exec, s[4:5]
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v14f64_to_v28i32_scalar:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    s_xor_saveexec_b32 s4, -1
; GFX11-NEXT:    scratch_store_b32 off, v32, s32 ; 4-byte Folded Spill
; GFX11-NEXT:    s_mov_b32 exec_lo, s4
; GFX11-NEXT:    v_writelane_b32 v32, s36, 0
; GFX11-NEXT:    v_writelane_b32 v32, s37, 1
; GFX11-NEXT:    v_writelane_b32 v32, s38, 2
; GFX11-NEXT:    v_writelane_b32 v32, s39, 3
; GFX11-NEXT:    v_writelane_b32 v32, s48, 4
; GFX11-NEXT:    v_writelane_b32 v32, s49, 5
; GFX11-NEXT:    v_writelane_b32 v32, s50, 6
; GFX11-NEXT:    v_writelane_b32 v32, s51, 7
; GFX11-NEXT:    v_writelane_b32 v32, s52, 8
; GFX11-NEXT:    v_writelane_b32 v32, s53, 9
; GFX11-NEXT:    v_writelane_b32 v32, s54, 10
; GFX11-NEXT:    v_writelane_b32 v32, s55, 11
; GFX11-NEXT:    s_mov_b32 s36, s0
; GFX11-NEXT:    v_readfirstlane_b32 s0, v10
; GFX11-NEXT:    v_readfirstlane_b32 s63, v9
; GFX11-NEXT:    v_readfirstlane_b32 s62, v8
; GFX11-NEXT:    v_readfirstlane_b32 s61, v7
; GFX11-NEXT:    v_readfirstlane_b32 s60, v6
; GFX11-NEXT:    v_readfirstlane_b32 s59, v5
; GFX11-NEXT:    v_readfirstlane_b32 s58, v4
; GFX11-NEXT:    v_readfirstlane_b32 s57, v3
; GFX11-NEXT:    v_readfirstlane_b32 s56, v2
; GFX11-NEXT:    v_readfirstlane_b32 s55, v1
; GFX11-NEXT:    v_readfirstlane_b32 s54, v0
; GFX11-NEXT:    s_mov_b32 s53, s29
; GFX11-NEXT:    s_mov_b32 s52, s28
; GFX11-NEXT:    s_mov_b32 s51, s27
; GFX11-NEXT:    s_mov_b32 s50, s26
; GFX11-NEXT:    s_mov_b32 s49, s25
; GFX11-NEXT:    s_mov_b32 s48, s24
; GFX11-NEXT:    s_mov_b32 s47, s23
; GFX11-NEXT:    s_mov_b32 s46, s22
; GFX11-NEXT:    s_mov_b32 s45, s21
; GFX11-NEXT:    s_mov_b32 s44, s20
; GFX11-NEXT:    s_mov_b32 s43, s19
; GFX11-NEXT:    s_mov_b32 s42, s18
; GFX11-NEXT:    s_mov_b32 s41, s17
; GFX11-NEXT:    s_mov_b32 s40, s16
; GFX11-NEXT:    s_mov_b32 s39, s3
; GFX11-NEXT:    s_mov_b32 s38, s2
; GFX11-NEXT:    s_mov_b32 s37, s1
; GFX11-NEXT:    s_cmp_lg_u32 s0, 0
; GFX11-NEXT:    s_cbranch_scc0 .LBB11_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-NEXT:    v_dual_mov_b32 v0, s36 :: v_dual_mov_b32 v1, s37
; GFX11-NEXT:    v_dual_mov_b32 v2, s38 :: v_dual_mov_b32 v3, s39
; GFX11-NEXT:    v_dual_mov_b32 v4, s40 :: v_dual_mov_b32 v5, s41
; GFX11-NEXT:    v_dual_mov_b32 v6, s42 :: v_dual_mov_b32 v7, s43
; GFX11-NEXT:    v_dual_mov_b32 v8, s44 :: v_dual_mov_b32 v9, s45
; GFX11-NEXT:    v_dual_mov_b32 v10, s46 :: v_dual_mov_b32 v11, s47
; GFX11-NEXT:    v_dual_mov_b32 v12, s48 :: v_dual_mov_b32 v13, s49
; GFX11-NEXT:    v_dual_mov_b32 v14, s50 :: v_dual_mov_b32 v15, s51
; GFX11-NEXT:    v_dual_mov_b32 v16, s52 :: v_dual_mov_b32 v17, s53
; GFX11-NEXT:    v_dual_mov_b32 v18, s54 :: v_dual_mov_b32 v19, s55
; GFX11-NEXT:    v_dual_mov_b32 v20, s56 :: v_dual_mov_b32 v21, s57
; GFX11-NEXT:    v_dual_mov_b32 v22, s58 :: v_dual_mov_b32 v23, s59
; GFX11-NEXT:    v_dual_mov_b32 v24, s60 :: v_dual_mov_b32 v25, s61
; GFX11-NEXT:    v_dual_mov_b32 v26, s62 :: v_dual_mov_b32 v27, s63
; GFX11-NEXT:    v_dual_mov_b32 v28, s64 :: v_dual_mov_b32 v29, s65
; GFX11-NEXT:    v_dual_mov_b32 v30, s66 :: v_dual_mov_b32 v31, s67
; GFX11-NEXT:    s_branch .LBB11_3
; GFX11-NEXT:  .LBB11_2: ; %cmp.true
; GFX11-NEXT:    v_add_f64 v[26:27], s[62:63], 1.0
; GFX11-NEXT:    v_add_f64 v[24:25], s[60:61], 1.0
; GFX11-NEXT:    v_add_f64 v[22:23], s[58:59], 1.0
; GFX11-NEXT:    v_add_f64 v[20:21], s[56:57], 1.0
; GFX11-NEXT:    v_add_f64 v[18:19], s[54:55], 1.0
; GFX11-NEXT:    v_add_f64 v[16:17], s[52:53], 1.0
; GFX11-NEXT:    v_add_f64 v[14:15], s[50:51], 1.0
; GFX11-NEXT:    v_add_f64 v[12:13], s[48:49], 1.0
; GFX11-NEXT:    v_add_f64 v[10:11], s[46:47], 1.0
; GFX11-NEXT:    v_add_f64 v[8:9], s[44:45], 1.0
; GFX11-NEXT:    v_add_f64 v[6:7], s[42:43], 1.0
; GFX11-NEXT:    v_add_f64 v[4:5], s[40:41], 1.0
; GFX11-NEXT:    v_add_f64 v[2:3], s[38:39], 1.0
; GFX11-NEXT:    v_add_f64 v[0:1], s[36:37], 1.0
; GFX11-NEXT:  .LBB11_3: ; %end
; GFX11-NEXT:    v_readlane_b32 s55, v32, 11
; GFX11-NEXT:    v_readlane_b32 s54, v32, 10
; GFX11-NEXT:    v_readlane_b32 s53, v32, 9
; GFX11-NEXT:    v_readlane_b32 s52, v32, 8
; GFX11-NEXT:    v_readlane_b32 s51, v32, 7
; GFX11-NEXT:    v_readlane_b32 s50, v32, 6
; GFX11-NEXT:    v_readlane_b32 s49, v32, 5
; GFX11-NEXT:    v_readlane_b32 s48, v32, 4
; GFX11-NEXT:    v_readlane_b32 s39, v32, 3
; GFX11-NEXT:    v_readlane_b32 s38, v32, 2
; GFX11-NEXT:    v_readlane_b32 s37, v32, 1
; GFX11-NEXT:    v_readlane_b32 s36, v32, 0
; GFX11-NEXT:    s_xor_saveexec_b32 s0, -1
; GFX11-NEXT:    scratch_load_b32 v32, off, s32 ; 4-byte Folded Reload
; GFX11-NEXT:    s_mov_b32 exec_lo, s0
; GFX11-NEXT:    s_waitcnt vmcnt(0)
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = fadd <14 x double> %a, splat (double 1.000000e+00)
  %a2 = bitcast <14 x double> %a1 to <28 x i32>
  br label %end

cmp.false:
  %a3 = bitcast <14 x double> %a to <28 x i32>
  br label %end

end:
  %phi = phi <28 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <28 x i32> %phi
}

define <56 x i16> @bitcast_v28i32_to_v56i16(<28 x i32> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v28i32_to_v56i16:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT:    ; implicit-def: $vgpr40
; SI-NEXT:    ; implicit-def: $vgpr47
; SI-NEXT:    ; implicit-def: $vgpr53
; SI-NEXT:    ; implicit-def: $vgpr46
; SI-NEXT:    ; implicit-def: $vgpr51
; SI-NEXT:    ; implicit-def: $vgpr45
; SI-NEXT:    ; implicit-def: $vgpr48
; SI-NEXT:    ; implicit-def: $vgpr44
; SI-NEXT:    ; implicit-def: $vgpr38
; SI-NEXT:    ; implicit-def: $vgpr43
; SI-NEXT:    ; implicit-def: $vgpr36
; SI-NEXT:    ; implicit-def: $vgpr42
; SI-NEXT:    ; implicit-def: $vgpr35
; SI-NEXT:    ; implicit-def: $vgpr41
; SI-NEXT:    ; implicit-def: $vgpr34
; SI-NEXT:    ; implicit-def: $vgpr55
; SI-NEXT:    ; implicit-def: $vgpr33
; SI-NEXT:    ; implicit-def: $vgpr54
; SI-NEXT:    ; implicit-def: $vgpr32
; SI-NEXT:    ; implicit-def: $vgpr52
; SI-NEXT:    ; implicit-def: $vgpr31
; SI-NEXT:    ; implicit-def: $vgpr50
; SI-NEXT:    ; implicit-def: $vgpr30
; SI-NEXT:    ; implicit-def: $vgpr49
; SI-NEXT:    ; implicit-def: $vgpr29
; SI-NEXT:    ; implicit-def: $vgpr39
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr37
; SI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB12_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    v_alignbit_b32 v28, v27, v26, 16
; SI-NEXT:    v_alignbit_b32 v29, v25, v24, 16
; SI-NEXT:    v_alignbit_b32 v30, v23, v22, 16
; SI-NEXT:    v_alignbit_b32 v31, v21, v20, 16
; SI-NEXT:    v_alignbit_b32 v32, v19, v18, 16
; SI-NEXT:    v_alignbit_b32 v33, v17, v16, 16
; SI-NEXT:    v_alignbit_b32 v34, v15, v14, 16
; SI-NEXT:    v_alignbit_b32 v35, v13, v12, 16
; SI-NEXT:    v_alignbit_b32 v36, v11, v10, 16
; SI-NEXT:    v_alignbit_b32 v38, v9, v8, 16
; SI-NEXT:    v_alignbit_b32 v48, v7, v6, 16
; SI-NEXT:    v_alignbit_b32 v51, v5, v4, 16
; SI-NEXT:    v_alignbit_b32 v53, v3, v2, 16
; SI-NEXT:    v_alignbit_b32 v40, v1, v0, 16
; SI-NEXT:    v_lshrrev_b32_e32 v37, 16, v27
; SI-NEXT:    v_lshrrev_b32_e32 v39, 16, v25
; SI-NEXT:    v_lshrrev_b32_e32 v49, 16, v23
; SI-NEXT:    v_lshrrev_b32_e32 v50, 16, v21
; SI-NEXT:    v_lshrrev_b32_e32 v52, 16, v19
; SI-NEXT:    v_lshrrev_b32_e32 v54, 16, v17
; SI-NEXT:    v_lshrrev_b32_e32 v55, 16, v15
; SI-NEXT:    s_waitcnt expcnt(6)
; SI-NEXT:    v_lshrrev_b32_e32 v41, 16, v13
; SI-NEXT:    s_waitcnt expcnt(5)
; SI-NEXT:    v_lshrrev_b32_e32 v42, 16, v11
; SI-NEXT:    s_waitcnt expcnt(4)
; SI-NEXT:    v_lshrrev_b32_e32 v43, 16, v9
; SI-NEXT:    s_waitcnt expcnt(3)
; SI-NEXT:    v_lshrrev_b32_e32 v44, 16, v7
; SI-NEXT:    s_waitcnt expcnt(2)
; SI-NEXT:    v_lshrrev_b32_e32 v45, 16, v5
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v46, 16, v3
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v47, 16, v1
; SI-NEXT:  .LBB12_2: ; %Flow
; SI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB12_4
; SI-NEXT:  ; %bb.3: ; %cmp.true
; SI-NEXT:    v_add_i32_e32 v1, vcc, 3, v1
; SI-NEXT:    v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT:    v_add_i32_e32 v3, vcc, 3, v3
; SI-NEXT:    v_add_i32_e32 v2, vcc, 3, v2
; SI-NEXT:    v_add_i32_e32 v5, vcc, 3, v5
; SI-NEXT:    v_add_i32_e32 v4, vcc, 3, v4
; SI-NEXT:    v_add_i32_e32 v7, vcc, 3, v7
; SI-NEXT:    v_add_i32_e32 v6, vcc, 3, v6
; SI-NEXT:    v_add_i32_e32 v9, vcc, 3, v9
; SI-NEXT:    v_add_i32_e32 v8, vcc, 3, v8
; SI-NEXT:    v_add_i32_e32 v11, vcc, 3, v11
; SI-NEXT:    v_add_i32_e32 v10, vcc, 3, v10
; SI-NEXT:    v_add_i32_e32 v13, vcc, 3, v13
; SI-NEXT:    v_add_i32_e32 v12, vcc, 3, v12
; SI-NEXT:    v_add_i32_e32 v15, vcc, 3, v15
; SI-NEXT:    v_add_i32_e32 v14, vcc, 3, v14
; SI-NEXT:    v_add_i32_e32 v17, vcc, 3, v17
; SI-NEXT:    v_add_i32_e32 v16, vcc, 3, v16
; SI-NEXT:    v_add_i32_e32 v19, vcc, 3, v19
; SI-NEXT:    v_add_i32_e32 v18, vcc, 3, v18
; SI-NEXT:    v_add_i32_e32 v21, vcc, 3, v21
; SI-NEXT:    v_add_i32_e32 v20, vcc, 3, v20
; SI-NEXT:    v_add_i32_e32 v23, vcc, 3, v23
; SI-NEXT:    v_add_i32_e32 v22, vcc, 3, v22
; SI-NEXT:    v_add_i32_e32 v25, vcc, 3, v25
; SI-NEXT:    v_add_i32_e32 v24, vcc, 3, v24
; SI-NEXT:    v_add_i32_e32 v27, vcc, 3, v27
; SI-NEXT:    v_add_i32_e32 v26, vcc, 3, v26
; SI-NEXT:    v_alignbit_b32 v28, v27, v26, 16
; SI-NEXT:    v_alignbit_b32 v29, v25, v24, 16
; SI-NEXT:    v_alignbit_b32 v30, v23, v22, 16
; SI-NEXT:    v_alignbit_b32 v31, v21, v20, 16
; SI-NEXT:    v_alignbit_b32 v32, v19, v18, 16
; SI-NEXT:    v_alignbit_b32 v33, v17, v16, 16
; SI-NEXT:    v_alignbit_b32 v34, v15, v14, 16
; SI-NEXT:    v_alignbit_b32 v35, v13, v12, 16
; SI-NEXT:    v_alignbit_b32 v36, v11, v10, 16
; SI-NEXT:    v_alignbit_b32 v38, v9, v8, 16
; SI-NEXT:    v_alignbit_b32 v48, v7, v6, 16
; SI-NEXT:    v_alignbit_b32 v51, v5, v4, 16
; SI-NEXT:    v_alignbit_b32 v53, v3, v2, 16
; SI-NEXT:    v_alignbit_b32 v40, v1, v0, 16
; SI-NEXT:    v_lshrrev_b32_e32 v37, 16, v27
; SI-NEXT:    v_lshrrev_b32_e32 v39, 16, v25
; SI-NEXT:    v_lshrrev_b32_e32 v49, 16, v23
; SI-NEXT:    v_lshrrev_b32_e32 v50, 16, v21
; SI-NEXT:    v_lshrrev_b32_e32 v52, 16, v19
; SI-NEXT:    v_lshrrev_b32_e32 v54, 16, v17
; SI-NEXT:    v_lshrrev_b32_e32 v55, 16, v15
; SI-NEXT:    s_waitcnt expcnt(6)
; SI-NEXT:    v_lshrrev_b32_e32 v41, 16, v13
; SI-NEXT:    s_waitcnt expcnt(5)
; SI-NEXT:    v_lshrrev_b32_e32 v42, 16, v11
; SI-NEXT:    s_waitcnt expcnt(4)
; SI-NEXT:    v_lshrrev_b32_e32 v43, 16, v9
; SI-NEXT:    s_waitcnt expcnt(3)
; SI-NEXT:    v_lshrrev_b32_e32 v44, 16, v7
; SI-NEXT:    s_waitcnt expcnt(2)
; SI-NEXT:    v_lshrrev_b32_e32 v45, 16, v5
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v46, 16, v3
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v47, 16, v1
; SI-NEXT:  .LBB12_4: ; %end
; SI-NEXT:    s_or_b64 exec, exec, s[4:5]
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT:    v_lshlrev_b32_e32 v40, 16, v40
; SI-NEXT:    v_or_b32_e32 v0, v0, v40
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT:    v_lshlrev_b32_e32 v40, 16, v47
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT:    v_lshlrev_b32_e32 v53, 16, v53
; SI-NEXT:    v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT:    v_lshlrev_b32_e32 v51, 16, v51
; SI-NEXT:    v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT:    v_lshlrev_b32_e32 v48, 16, v48
; SI-NEXT:    v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT:    v_lshlrev_b32_e32 v38, 16, v38
; SI-NEXT:    v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT:    v_lshlrev_b32_e32 v36, 16, v36
; SI-NEXT:    v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; SI-NEXT:    v_or_b32_e32 v1, v1, v40
; SI-NEXT:    v_or_b32_e32 v2, v2, v53
; SI-NEXT:    v_lshlrev_b32_e32 v53, 16, v46
; SI-NEXT:    v_or_b32_e32 v4, v4, v51
; SI-NEXT:    v_lshlrev_b32_e32 v51, 16, v45
; SI-NEXT:    v_or_b32_e32 v6, v6, v48
; SI-NEXT:    v_lshlrev_b32_e32 v48, 16, v44
; SI-NEXT:    v_or_b32_e32 v8, v8, v38
; SI-NEXT:    v_lshlrev_b32_e32 v38, 16, v43
; SI-NEXT:    v_or_b32_e32 v10, v10, v36
; SI-NEXT:    v_lshlrev_b32_e32 v36, 16, v42
; SI-NEXT:    v_or_b32_e32 v12, v12, v35
; SI-NEXT:    v_lshlrev_b32_e32 v35, 16, v41
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; SI-NEXT:    v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT:    v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT:    v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; SI-NEXT:    v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT:    v_lshlrev_b32_e32 v32, 16, v32
; SI-NEXT:    v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT:    v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT:    v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; SI-NEXT:    v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; SI-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; SI-NEXT:    v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT:    v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT:    v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT:    v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT:    v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT:    v_and_b32_e32 v13, 0xffff, v13
; SI-NEXT:    v_or_b32_e32 v14, v14, v34
; SI-NEXT:    v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT:    v_lshlrev_b32_e32 v34, 16, v55
; SI-NEXT:    v_or_b32_e32 v16, v16, v33
; SI-NEXT:    v_and_b32_e32 v17, 0xffff, v17
; SI-NEXT:    v_lshlrev_b32_e32 v33, 16, v54
; SI-NEXT:    v_or_b32_e32 v18, v18, v32
; SI-NEXT:    v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT:    v_lshlrev_b32_e32 v32, 16, v52
; SI-NEXT:    v_or_b32_e32 v20, v20, v31
; SI-NEXT:    v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT:    v_lshlrev_b32_e32 v31, 16, v50
; SI-NEXT:    v_or_b32_e32 v22, v22, v30
; SI-NEXT:    v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v49
; SI-NEXT:    v_or_b32_e32 v24, v24, v29
; SI-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v39
; SI-NEXT:    v_or_b32_e32 v26, v26, v28
; SI-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v37
; SI-NEXT:    v_or_b32_e32 v3, v3, v53
; SI-NEXT:    v_or_b32_e32 v5, v5, v51
; SI-NEXT:    v_or_b32_e32 v7, v7, v48
; SI-NEXT:    v_or_b32_e32 v9, v9, v38
; SI-NEXT:    v_or_b32_e32 v11, v11, v36
; SI-NEXT:    v_or_b32_e32 v13, v13, v35
; SI-NEXT:    v_or_b32_e32 v15, v15, v34
; SI-NEXT:    v_or_b32_e32 v17, v17, v33
; SI-NEXT:    v_or_b32_e32 v19, v19, v32
; SI-NEXT:    v_or_b32_e32 v21, v21, v31
; SI-NEXT:    v_or_b32_e32 v23, v23, v30
; SI-NEXT:    v_or_b32_e32 v25, v25, v29
; SI-NEXT:    v_or_b32_e32 v27, v27, v28
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v28i32_to_v56i16:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT:    ; implicit-def: $vgpr47
; VI-NEXT:    ; implicit-def: $vgpr46
; VI-NEXT:    ; implicit-def: $vgpr45
; VI-NEXT:    ; implicit-def: $vgpr44
; VI-NEXT:    ; implicit-def: $vgpr43
; VI-NEXT:    ; implicit-def: $vgpr42
; VI-NEXT:    ; implicit-def: $vgpr41
; VI-NEXT:    ; implicit-def: $vgpr40
; VI-NEXT:    ; implicit-def: $vgpr55
; VI-NEXT:    ; implicit-def: $vgpr54
; VI-NEXT:    ; implicit-def: $vgpr53
; VI-NEXT:    ; implicit-def: $vgpr52
; VI-NEXT:    ; implicit-def: $vgpr51
; VI-NEXT:    ; implicit-def: $vgpr50
; VI-NEXT:    ; implicit-def: $vgpr49
; VI-NEXT:    ; implicit-def: $vgpr48
; VI-NEXT:    ; implicit-def: $vgpr39
; VI-NEXT:    ; implicit-def: $vgpr38
; VI-NEXT:    ; implicit-def: $vgpr37
; VI-NEXT:    ; implicit-def: $vgpr36
; VI-NEXT:    ; implicit-def: $vgpr35
; VI-NEXT:    ; implicit-def: $vgpr34
; VI-NEXT:    ; implicit-def: $vgpr33
; VI-NEXT:    ; implicit-def: $vgpr32
; VI-NEXT:    ; implicit-def: $vgpr31
; VI-NEXT:    ; implicit-def: $vgpr30
; VI-NEXT:    ; implicit-def: $vgpr29
; VI-NEXT:    ; implicit-def: $vgpr28
; VI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB12_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; VI-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; VI-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; VI-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; VI-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; VI-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; VI-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; VI-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; VI-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; VI-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; VI-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; VI-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; VI-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; VI-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; VI-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; VI-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; VI-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; VI-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; VI-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; VI-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; VI-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; VI-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; VI-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; VI-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; VI-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; VI-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; VI-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; VI-NEXT:  .LBB12_2: ; %Flow
; VI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB12_4
; VI-NEXT:  ; %bb.3: ; %cmp.true
; VI-NEXT:    v_add_u32_e32 v27, vcc, 3, v27
; VI-NEXT:    v_add_u32_e32 v26, vcc, 3, v26
; VI-NEXT:    v_add_u32_e32 v25, vcc, 3, v25
; VI-NEXT:    v_add_u32_e32 v24, vcc, 3, v24
; VI-NEXT:    v_add_u32_e32 v23, vcc, 3, v23
; VI-NEXT:    v_add_u32_e32 v22, vcc, 3, v22
; VI-NEXT:    v_add_u32_e32 v21, vcc, 3, v21
; VI-NEXT:    v_add_u32_e32 v20, vcc, 3, v20
; VI-NEXT:    v_add_u32_e32 v19, vcc, 3, v19
; VI-NEXT:    v_add_u32_e32 v18, vcc, 3, v18
; VI-NEXT:    v_add_u32_e32 v17, vcc, 3, v17
; VI-NEXT:    v_add_u32_e32 v16, vcc, 3, v16
; VI-NEXT:    v_add_u32_e32 v15, vcc, 3, v15
; VI-NEXT:    v_add_u32_e32 v14, vcc, 3, v14
; VI-NEXT:    v_add_u32_e32 v13, vcc, 3, v13
; VI-NEXT:    v_add_u32_e32 v12, vcc, 3, v12
; VI-NEXT:    v_add_u32_e32 v11, vcc, 3, v11
; VI-NEXT:    v_add_u32_e32 v10, vcc, 3, v10
; VI-NEXT:    v_add_u32_e32 v9, vcc, 3, v9
; VI-NEXT:    v_add_u32_e32 v8, vcc, 3, v8
; VI-NEXT:    v_add_u32_e32 v7, vcc, 3, v7
; VI-NEXT:    v_add_u32_e32 v6, vcc, 3, v6
; VI-NEXT:    v_add_u32_e32 v5, vcc, 3, v5
; VI-NEXT:    v_add_u32_e32 v4, vcc, 3, v4
; VI-NEXT:    v_add_u32_e32 v3, vcc, 3, v3
; VI-NEXT:    v_add_u32_e32 v2, vcc, 3, v2
; VI-NEXT:    v_add_u32_e32 v1, vcc, 3, v1
; VI-NEXT:    v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; VI-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; VI-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; VI-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; VI-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; VI-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; VI-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; VI-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; VI-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; VI-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; VI-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; VI-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; VI-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; VI-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; VI-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; VI-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; VI-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; VI-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; VI-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; VI-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; VI-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; VI-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; VI-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; VI-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; VI-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; VI-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; VI-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; VI-NEXT:  .LBB12_4: ; %end
; VI-NEXT:    s_or_b64 exec, exec, s[4:5]
; VI-NEXT:    v_lshlrev_b32_e32 v47, 16, v47
; VI-NEXT:    v_lshlrev_b32_e32 v46, 16, v46
; VI-NEXT:    v_lshlrev_b32_e32 v45, 16, v45
; VI-NEXT:    v_lshlrev_b32_e32 v44, 16, v44
; VI-NEXT:    v_lshlrev_b32_e32 v43, 16, v43
; VI-NEXT:    v_lshlrev_b32_e32 v42, 16, v42
; VI-NEXT:    v_lshlrev_b32_e32 v41, 16, v41
; VI-NEXT:    v_lshlrev_b32_e32 v40, 16, v40
; VI-NEXT:    v_or_b32_sdwa v0, v0, v47 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v1, v1, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v2, v2, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v3, v3, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v4, v4, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v5, v5, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v6, v6, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v7, v7, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; VI-NEXT:    v_lshlrev_b32_e32 v55, 16, v55
; VI-NEXT:    v_lshlrev_b32_e32 v54, 16, v54
; VI-NEXT:    v_lshlrev_b32_e32 v53, 16, v53
; VI-NEXT:    v_lshlrev_b32_e32 v52, 16, v52
; VI-NEXT:    v_lshlrev_b32_e32 v51, 16, v51
; VI-NEXT:    v_lshlrev_b32_e32 v50, 16, v50
; VI-NEXT:    v_lshlrev_b32_e32 v49, 16, v49
; VI-NEXT:    v_lshlrev_b32_e32 v48, 16, v48
; VI-NEXT:    v_lshlrev_b32_e32 v39, 16, v39
; VI-NEXT:    v_lshlrev_b32_e32 v38, 16, v38
; VI-NEXT:    v_lshlrev_b32_e32 v37, 16, v37
; VI-NEXT:    v_lshlrev_b32_e32 v36, 16, v36
; VI-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v34
; VI-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; VI-NEXT:    v_lshlrev_b32_e32 v32, 16, v32
; VI-NEXT:    v_lshlrev_b32_e32 v31, 16, v31
; VI-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; VI-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; VI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; VI-NEXT:    v_or_b32_sdwa v8, v8, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v9, v9, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v10, v10, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v11, v11, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v12, v12, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v13, v13, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v14, v14, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v15, v15, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v16, v16, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v17, v17, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v18, v18, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v19, v19, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v20, v20, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v21, v21, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v22, v22, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v23, v23, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v24, v24, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v25, v25, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v26, v26, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v28i32_to_v56i16:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT:    ; implicit-def: $vgpr47
; GFX9-NEXT:    ; implicit-def: $vgpr46
; GFX9-NEXT:    ; implicit-def: $vgpr45
; GFX9-NEXT:    ; implicit-def: $vgpr44
; GFX9-NEXT:    ; implicit-def: $vgpr43
; GFX9-NEXT:    ; implicit-def: $vgpr42
; GFX9-NEXT:    ; implicit-def: $vgpr41
; GFX9-NEXT:    ; implicit-def: $vgpr40
; GFX9-NEXT:    ; implicit-def: $vgpr55
; GFX9-NEXT:    ; implicit-def: $vgpr54
; GFX9-NEXT:    ; implicit-def: $vgpr53
; GFX9-NEXT:    ; implicit-def: $vgpr52
; GFX9-NEXT:    ; implicit-def: $vgpr51
; GFX9-NEXT:    ; implicit-def: $vgpr50
; GFX9-NEXT:    ; implicit-def: $vgpr49
; GFX9-NEXT:    ; implicit-def: $vgpr48
; GFX9-NEXT:    ; implicit-def: $vgpr39
; GFX9-NEXT:    ; implicit-def: $vgpr38
; GFX9-NEXT:    ; implicit-def: $vgpr37
; GFX9-NEXT:    ; implicit-def: $vgpr36
; GFX9-NEXT:    ; implicit-def: $vgpr35
; GFX9-NEXT:    ; implicit-def: $vgpr34
; GFX9-NEXT:    ; implicit-def: $vgpr33
; GFX9-NEXT:    ; implicit-def: $vgpr32
; GFX9-NEXT:    ; implicit-def: $vgpr31
; GFX9-NEXT:    ; implicit-def: $vgpr30
; GFX9-NEXT:    ; implicit-def: $vgpr29
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB12_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX9-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX9-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX9-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX9-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX9-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX9-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX9-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX9-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX9-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX9-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX9-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX9-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX9-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX9-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX9-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX9-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; GFX9-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; GFX9-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; GFX9-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; GFX9-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; GFX9-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; GFX9-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; GFX9-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; GFX9-NEXT:  .LBB12_2: ; %Flow
; GFX9-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB12_4
; GFX9-NEXT:  ; %bb.3: ; %cmp.true
; GFX9-NEXT:    v_add_u32_e32 v27, 3, v27
; GFX9-NEXT:    v_add_u32_e32 v26, 3, v26
; GFX9-NEXT:    v_add_u32_e32 v25, 3, v25
; GFX9-NEXT:    v_add_u32_e32 v24, 3, v24
; GFX9-NEXT:    v_add_u32_e32 v23, 3, v23
; GFX9-NEXT:    v_add_u32_e32 v22, 3, v22
; GFX9-NEXT:    v_add_u32_e32 v21, 3, v21
; GFX9-NEXT:    v_add_u32_e32 v20, 3, v20
; GFX9-NEXT:    v_add_u32_e32 v19, 3, v19
; GFX9-NEXT:    v_add_u32_e32 v18, 3, v18
; GFX9-NEXT:    v_add_u32_e32 v17, 3, v17
; GFX9-NEXT:    v_add_u32_e32 v16, 3, v16
; GFX9-NEXT:    v_add_u32_e32 v15, 3, v15
; GFX9-NEXT:    v_add_u32_e32 v14, 3, v14
; GFX9-NEXT:    v_add_u32_e32 v13, 3, v13
; GFX9-NEXT:    v_add_u32_e32 v12, 3, v12
; GFX9-NEXT:    v_add_u32_e32 v11, 3, v11
; GFX9-NEXT:    v_add_u32_e32 v10, 3, v10
; GFX9-NEXT:    v_add_u32_e32 v9, 3, v9
; GFX9-NEXT:    v_add_u32_e32 v8, 3, v8
; GFX9-NEXT:    v_add_u32_e32 v7, 3, v7
; GFX9-NEXT:    v_add_u32_e32 v6, 3, v6
; GFX9-NEXT:    v_add_u32_e32 v5, 3, v5
; GFX9-NEXT:    v_add_u32_e32 v4, 3, v4
; GFX9-NEXT:    v_add_u32_e32 v3, 3, v3
; GFX9-NEXT:    v_add_u32_e32 v2, 3, v2
; GFX9-NEXT:    v_add_u32_e32 v1, 3, v1
; GFX9-NEXT:    v_add_u32_e32 v0, 3, v0
; GFX9-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX9-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX9-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX9-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX9-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX9-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX9-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX9-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX9-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX9-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX9-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX9-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX9-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX9-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX9-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX9-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX9-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; GFX9-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; GFX9-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; GFX9-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; GFX9-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; GFX9-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; GFX9-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; GFX9-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; GFX9-NEXT:  .LBB12_4: ; %end
; GFX9-NEXT:    s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT:    s_mov_b32 s4, 0x5040100
; GFX9-NEXT:    v_perm_b32 v0, v47, v0, s4
; GFX9-NEXT:    v_perm_b32 v1, v46, v1, s4
; GFX9-NEXT:    v_perm_b32 v2, v45, v2, s4
; GFX9-NEXT:    v_perm_b32 v3, v44, v3, s4
; GFX9-NEXT:    v_perm_b32 v4, v43, v4, s4
; GFX9-NEXT:    v_perm_b32 v5, v42, v5, s4
; GFX9-NEXT:    v_perm_b32 v6, v41, v6, s4
; GFX9-NEXT:    v_perm_b32 v7, v40, v7, s4
; GFX9-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; GFX9-NEXT:    v_perm_b32 v8, v55, v8, s4
; GFX9-NEXT:    v_perm_b32 v9, v54, v9, s4
; GFX9-NEXT:    v_perm_b32 v10, v53, v10, s4
; GFX9-NEXT:    v_perm_b32 v11, v52, v11, s4
; GFX9-NEXT:    v_perm_b32 v12, v51, v12, s4
; GFX9-NEXT:    v_perm_b32 v13, v50, v13, s4
; GFX9-NEXT:    v_perm_b32 v14, v49, v14, s4
; GFX9-NEXT:    v_perm_b32 v15, v48, v15, s4
; GFX9-NEXT:    v_perm_b32 v16, v39, v16, s4
; GFX9-NEXT:    v_perm_b32 v17, v38, v17, s4
; GFX9-NEXT:    v_perm_b32 v18, v37, v18, s4
; GFX9-NEXT:    v_perm_b32 v19, v36, v19, s4
; GFX9-NEXT:    v_perm_b32 v20, v35, v20, s4
; GFX9-NEXT:    v_perm_b32 v21, v34, v21, s4
; GFX9-NEXT:    v_perm_b32 v22, v33, v22, s4
; GFX9-NEXT:    v_perm_b32 v23, v32, v23, s4
; GFX9-NEXT:    v_perm_b32 v24, v31, v24, s4
; GFX9-NEXT:    v_perm_b32 v25, v30, v25, s4
; GFX9-NEXT:    v_perm_b32 v26, v29, v26, s4
; GFX9-NEXT:    v_perm_b32 v27, v28, v27, s4
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-TRUE16-LABEL: bitcast_v28i32_to_v56i16:
; GFX11-TRUE16:       ; %bb.0:
; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-TRUE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT:    s_cbranch_execz .LBB12_2
; GFX11-TRUE16-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v27, 3, v27
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v26, 3, v26
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v25, 3, v25
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v24, 3, v24
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v23, 3, v23
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v22, 3, v22
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v21, 3, v21
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v20, 3, v20
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v19, 3, v19
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v18, 3, v18
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v17, 3, v17
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v16, 3, v16
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v15, 3, v15
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v14, 3, v14
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v13, 3, v13
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v12, 3, v12
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v11, 3, v11
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v10, 3, v10
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v9, 3, v9
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v8, 3, v8
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v7, 3, v7
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v6, 3, v6
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v5, 3, v5
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v4, 3, v4
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v3, 3, v3
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v2, 3, v2
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v1, 3, v1
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v0, 3, v0
; GFX11-TRUE16-NEXT:  .LBB12_2: ; %end
; GFX11-TRUE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v28i32_to_v56i16:
; GFX11-FAKE16:       ; %bb.0:
; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v28
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr71
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr70
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr69
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr68
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr67
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr66
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr65
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr64
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr55
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr54
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr53
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr52
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr51
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr50
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr49
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr48
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr39
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr38
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr37
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr36
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr35
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr34
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr33
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr32
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr31
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr30
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr29
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr28
; GFX11-FAKE16-NEXT:    s_and_saveexec_b32 s0, vcc_lo
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_cbranch_execz .LBB12_2
; GFX11-FAKE16-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v3
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v2
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v0
; GFX11-FAKE16-NEXT:  .LBB12_2: ; %Flow
; GFX11-FAKE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-FAKE16-NEXT:    s_cbranch_execz .LBB12_4
; GFX11-FAKE16-NEXT:  ; %bb.3: ; %cmp.true
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v27, 3, v27
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v26, 3, v26
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v25, 3, v25
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v24, 3, v24
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v23, 3, v23
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v22, 3, v22
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v21, 3, v21
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v20, 3, v20
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v19, 3, v19
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v18, 3, v18
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v17, 3, v17
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v16, 3, v16
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v15, 3, v15
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v14, 3, v14
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v13, 3, v13
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v12, 3, v12
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v11, 3, v11
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v10, 3, v10
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v9, 3, v9
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v8, 3, v8
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v7, 3, v7
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v6, 3, v6
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v5, 3, v5
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v4, 3, v4
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v3, 3, v3
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v2, 3, v2
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v1, 3, v1
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v0, 3, v0
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v3
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v2
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v0
; GFX11-FAKE16-NEXT:  .LBB12_4: ; %end
; GFX11-FAKE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v71, v0, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v1, v70, v1, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v2, v69, v2, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v3, v68, v3, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v4, v67, v4, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v5, v66, v5, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v6, v65, v6, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v7, v64, v7, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v8, v55, v8, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v9, v54, v9, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v10, v53, v10, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v11, v52, v11, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v12, v51, v12, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v13, v50, v13, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v14, v49, v14, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v15, v48, v15, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v16, v39, v16, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v17, v38, v17, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v18, v37, v18, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v19, v36, v19, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v20, v35, v20, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v21, v34, v21, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v22, v33, v22, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v23, v32, v23, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v24, v31, v24, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v25, v30, v25, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v26, v29, v26, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v27, v28, v27, 0x5040100
; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = add <28 x i32> %a, splat (i32 3)
  %a2 = bitcast <28 x i32> %a1 to <56 x i16>
  br label %end

cmp.false:
  %a3 = bitcast <28 x i32> %a to <56 x i16>
  br label %end

end:
  %phi = phi <56 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <56 x i16> %phi
}

define inreg <56 x i16> @bitcast_v28i32_to_v56i16_scalar(<28 x i32> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v28i32_to_v56i16_scalar:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_store_dword v28, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_writelane_b32 v28, s34, 0
; SI-NEXT:    v_writelane_b32 v28, s35, 1
; SI-NEXT:    v_writelane_b32 v28, s36, 2
; SI-NEXT:    v_writelane_b32 v28, s37, 3
; SI-NEXT:    v_writelane_b32 v28, s38, 4
; SI-NEXT:    v_writelane_b32 v28, s30, 5
; SI-NEXT:    v_writelane_b32 v28, s31, 6
; SI-NEXT:    v_readfirstlane_b32 s40, v14
; SI-NEXT:    v_readfirstlane_b32 s5, v13
; SI-NEXT:    v_readfirstlane_b32 s4, v12
; SI-NEXT:    v_readfirstlane_b32 s7, v11
; SI-NEXT:    v_readfirstlane_b32 s6, v10
; SI-NEXT:    v_readfirstlane_b32 s9, v9
; SI-NEXT:    v_readfirstlane_b32 s8, v8
; SI-NEXT:    v_readfirstlane_b32 s11, v7
; SI-NEXT:    v_readfirstlane_b32 s10, v6
; SI-NEXT:    v_readfirstlane_b32 s13, v5
; SI-NEXT:    v_readfirstlane_b32 s12, v4
; SI-NEXT:    v_readfirstlane_b32 s15, v3
; SI-NEXT:    v_readfirstlane_b32 s14, v2
; SI-NEXT:    v_readfirstlane_b32 s41, v1
; SI-NEXT:    s_cmp_lg_u32 s40, 0
; SI-NEXT:    v_readfirstlane_b32 s40, v0
; SI-NEXT:    s_cbranch_scc0 .LBB13_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    s_lshr_b32 s44, s13, 16
; SI-NEXT:    s_lshr_b64 s[42:43], s[4:5], 16
; SI-NEXT:    s_lshr_b32 s46, s27, 16
; SI-NEXT:    s_mov_b32 s43, s44
; SI-NEXT:    s_lshr_b64 s[44:45], s[6:7], 16
; SI-NEXT:    s_lshr_b32 s56, s19, 16
; SI-NEXT:    s_mov_b32 s45, s46
; SI-NEXT:    s_lshr_b64 s[46:47], s[8:9], 16
; SI-NEXT:    s_lshr_b32 s94, s5, 16
; SI-NEXT:    s_lshr_b32 s95, s7, 16
; SI-NEXT:    s_lshr_b32 vcc_lo, s9, 16
; SI-NEXT:    s_lshr_b32 vcc_hi, s11, 16
; SI-NEXT:    s_lshr_b32 s30, s15, 16
; SI-NEXT:    s_lshr_b32 s31, s41, 16
; SI-NEXT:    s_lshr_b32 s34, s29, 16
; SI-NEXT:    s_lshr_b32 s35, s25, 16
; SI-NEXT:    s_lshr_b32 s36, s23, 16
; SI-NEXT:    s_lshr_b32 s37, s21, 16
; SI-NEXT:    s_lshr_b32 s38, s17, 16
; SI-NEXT:    s_mov_b32 s47, s56
; SI-NEXT:    s_lshr_b64 s[56:57], s[10:11], 16
; SI-NEXT:    s_lshr_b64 s[58:59], s[12:13], 16
; SI-NEXT:    s_lshr_b64 s[60:61], s[14:15], 16
; SI-NEXT:    s_lshr_b64 s[62:63], s[40:41], 16
; SI-NEXT:    s_lshr_b64 s[72:73], s[28:29], 16
; SI-NEXT:    s_lshr_b64 s[74:75], s[26:27], 16
; SI-NEXT:    s_branch .LBB13_3
; SI-NEXT:  .LBB13_2: ; %cmp.true
; SI-NEXT:    s_add_i32 s9, s9, 3
; SI-NEXT:    s_add_i32 s8, s8, 3
; SI-NEXT:    s_add_i32 s7, s7, 3
; SI-NEXT:    s_add_i32 s6, s6, 3
; SI-NEXT:    s_add_i32 s5, s5, 3
; SI-NEXT:    s_add_i32 s4, s4, 3
; SI-NEXT:    s_add_i32 s17, s17, 3
; SI-NEXT:    s_add_i32 s19, s19, 3
; SI-NEXT:    s_add_i32 s21, s21, 3
; SI-NEXT:    s_add_i32 s23, s23, 3
; SI-NEXT:    s_add_i32 s25, s25, 3
; SI-NEXT:    s_add_i32 s27, s27, 3
; SI-NEXT:    s_add_i32 s26, s26, 3
; SI-NEXT:    s_add_i32 s29, s29, 3
; SI-NEXT:    s_add_i32 s28, s28, 3
; SI-NEXT:    s_add_i32 s41, s41, 3
; SI-NEXT:    s_add_i32 s40, s40, 3
; SI-NEXT:    s_add_i32 s15, s15, 3
; SI-NEXT:    s_add_i32 s14, s14, 3
; SI-NEXT:    s_add_i32 s13, s13, 3
; SI-NEXT:    s_add_i32 s12, s12, 3
; SI-NEXT:    s_add_i32 s11, s11, 3
; SI-NEXT:    s_add_i32 s10, s10, 3
; SI-NEXT:    s_lshr_b64 s[42:43], s[4:5], 16
; SI-NEXT:    s_lshr_b64 s[44:45], s[6:7], 16
; SI-NEXT:    s_lshr_b64 s[46:47], s[8:9], 16
; SI-NEXT:    s_add_i32 s16, s16, 3
; SI-NEXT:    s_add_i32 s18, s18, 3
; SI-NEXT:    s_add_i32 s20, s20, 3
; SI-NEXT:    s_add_i32 s22, s22, 3
; SI-NEXT:    s_add_i32 s24, s24, 3
; SI-NEXT:    s_lshr_b64 s[56:57], s[10:11], 16
; SI-NEXT:    s_lshr_b64 s[58:59], s[12:13], 16
; SI-NEXT:    s_lshr_b64 s[60:61], s[14:15], 16
; SI-NEXT:    s_lshr_b64 s[62:63], s[40:41], 16
; SI-NEXT:    s_lshr_b64 s[72:73], s[28:29], 16
; SI-NEXT:    s_lshr_b64 s[74:75], s[26:27], 16
; SI-NEXT:    s_lshr_b32 s94, s5, 16
; SI-NEXT:    s_lshr_b32 s95, s7, 16
; SI-NEXT:    s_lshr_b32 vcc_lo, s9, 16
; SI-NEXT:    s_lshr_b32 vcc_hi, s11, 16
; SI-NEXT:    s_lshr_b32 s43, s13, 16
; SI-NEXT:    s_lshr_b32 s30, s15, 16
; SI-NEXT:    s_lshr_b32 s31, s41, 16
; SI-NEXT:    s_lshr_b32 s34, s29, 16
; SI-NEXT:    s_lshr_b32 s45, s27, 16
; SI-NEXT:    s_lshr_b32 s35, s25, 16
; SI-NEXT:    s_lshr_b32 s36, s23, 16
; SI-NEXT:    s_lshr_b32 s37, s21, 16
; SI-NEXT:    s_lshr_b32 s47, s19, 16
; SI-NEXT:    s_lshr_b32 s38, s17, 16
; SI-NEXT:  .LBB13_3: ; %end
; SI-NEXT:    s_lshr_b64 s[88:89], s[20:21], 16
; SI-NEXT:    s_lshr_b64 s[90:91], s[18:19], 16
; SI-NEXT:    s_and_b32 s19, s19, 0xffff
; SI-NEXT:    s_lshl_b32 s47, s47, 16
; SI-NEXT:    s_and_b32 s27, s27, 0xffff
; SI-NEXT:    s_lshl_b32 s45, s45, 16
; SI-NEXT:    s_or_b32 s19, s19, s47
; SI-NEXT:    s_lshl_b32 s47, s88, 16
; SI-NEXT:    s_and_b32 s20, s20, 0xffff
; SI-NEXT:    s_or_b32 s27, s27, s45
; SI-NEXT:    s_and_b32 s28, s28, 0xffff
; SI-NEXT:    s_lshl_b32 s45, s72, 16
; SI-NEXT:    s_and_b32 s13, s13, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s43, 16
; SI-NEXT:    s_lshr_b64 s[78:79], s[22:23], 16
; SI-NEXT:    s_or_b32 s20, s20, s47
; SI-NEXT:    s_and_b32 s21, s21, 0xffff
; SI-NEXT:    s_lshl_b32 s47, s37, 16
; SI-NEXT:    s_or_b32 s28, s28, s45
; SI-NEXT:    s_and_b32 s29, s29, 0xffff
; SI-NEXT:    s_lshl_b32 s45, s34, 16
; SI-NEXT:    s_or_b32 s13, s13, s43
; SI-NEXT:    s_and_b32 s10, s10, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s56, 16
; SI-NEXT:    s_or_b32 s21, s21, s47
; SI-NEXT:    s_lshl_b32 s47, s78, 16
; SI-NEXT:    s_and_b32 s22, s22, 0xffff
; SI-NEXT:    s_or_b32 s29, s29, s45
; SI-NEXT:    s_and_b32 s40, s40, 0xffff
; SI-NEXT:    s_lshl_b32 s45, s62, 16
; SI-NEXT:    s_or_b32 s10, s10, s43
; SI-NEXT:    s_and_b32 s11, s11, 0xffff
; SI-NEXT:    s_lshl_b32 s43, vcc_hi, 16
; SI-NEXT:    s_lshr_b64 s[76:77], s[24:25], 16
; SI-NEXT:    s_lshr_b64 s[92:93], s[16:17], 16
; SI-NEXT:    s_or_b32 s22, s22, s47
; SI-NEXT:    s_and_b32 s23, s23, 0xffff
; SI-NEXT:    s_lshl_b32 s47, s36, 16
; SI-NEXT:    s_or_b32 s40, s40, s45
; SI-NEXT:    s_and_b32 s41, s41, 0xffff
; SI-NEXT:    s_lshl_b32 s45, s31, 16
; SI-NEXT:    s_or_b32 s11, s11, s43
; SI-NEXT:    s_and_b32 s8, s8, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s46, 16
; SI-NEXT:    s_lshl_b32 s57, s92, 16
; SI-NEXT:    s_and_b32 s16, s16, 0xffff
; SI-NEXT:    s_or_b32 s23, s23, s47
; SI-NEXT:    s_and_b32 s24, s24, 0xffff
; SI-NEXT:    s_lshl_b32 s47, s76, 16
; SI-NEXT:    s_or_b32 s41, s41, s45
; SI-NEXT:    s_and_b32 s14, s14, 0xffff
; SI-NEXT:    s_lshl_b32 s45, s60, 16
; SI-NEXT:    s_or_b32 s8, s8, s43
; SI-NEXT:    s_and_b32 s9, s9, 0xffff
; SI-NEXT:    s_lshl_b32 s43, vcc_lo, 16
; SI-NEXT:    s_or_b32 s16, s16, s57
; SI-NEXT:    s_and_b32 s17, s17, 0xffff
; SI-NEXT:    s_lshl_b32 s57, s38, 16
; SI-NEXT:    s_or_b32 s24, s24, s47
; SI-NEXT:    s_and_b32 s25, s25, 0xffff
; SI-NEXT:    s_lshl_b32 s47, s35, 16
; SI-NEXT:    s_or_b32 s14, s14, s45
; SI-NEXT:    s_and_b32 s15, s15, 0xffff
; SI-NEXT:    s_lshl_b32 s45, s30, 16
; SI-NEXT:    s_or_b32 s9, s9, s43
; SI-NEXT:    s_and_b32 s6, s6, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s44, 16
; SI-NEXT:    s_and_b32 s4, s4, 0xffff
; SI-NEXT:    s_lshl_b32 s42, s42, 16
; SI-NEXT:    s_or_b32 s17, s17, s57
; SI-NEXT:    s_lshl_b32 s57, s90, 16
; SI-NEXT:    s_and_b32 s18, s18, 0xffff
; SI-NEXT:    s_or_b32 s25, s25, s47
; SI-NEXT:    s_and_b32 s26, s26, 0xffff
; SI-NEXT:    s_lshl_b32 s47, s74, 16
; SI-NEXT:    s_or_b32 s15, s15, s45
; SI-NEXT:    s_and_b32 s12, s12, 0xffff
; SI-NEXT:    s_lshl_b32 s45, s58, 16
; SI-NEXT:    s_or_b32 s6, s6, s43
; SI-NEXT:    s_and_b32 s7, s7, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s95, 16
; SI-NEXT:    s_or_b32 s4, s4, s42
; SI-NEXT:    s_and_b32 s5, s5, 0xffff
; SI-NEXT:    s_lshl_b32 s42, s94, 16
; SI-NEXT:    s_or_b32 s18, s18, s57
; SI-NEXT:    s_or_b32 s26, s26, s47
; SI-NEXT:    s_or_b32 s12, s12, s45
; SI-NEXT:    s_or_b32 s7, s7, s43
; SI-NEXT:    s_or_b32 s5, s5, s42
; SI-NEXT:    v_readlane_b32 s30, v28, 5
; SI-NEXT:    v_mov_b32_e32 v0, s16
; SI-NEXT:    v_mov_b32_e32 v1, s17
; SI-NEXT:    v_mov_b32_e32 v2, s18
; SI-NEXT:    v_mov_b32_e32 v3, s19
; SI-NEXT:    v_mov_b32_e32 v4, s20
; SI-NEXT:    v_mov_b32_e32 v5, s21
; SI-NEXT:    v_mov_b32_e32 v6, s22
; SI-NEXT:    v_mov_b32_e32 v7, s23
; SI-NEXT:    v_mov_b32_e32 v8, s24
; SI-NEXT:    v_mov_b32_e32 v9, s25
; SI-NEXT:    v_mov_b32_e32 v10, s26
; SI-NEXT:    v_mov_b32_e32 v11, s27
; SI-NEXT:    v_mov_b32_e32 v12, s28
; SI-NEXT:    v_mov_b32_e32 v13, s29
; SI-NEXT:    v_mov_b32_e32 v14, s40
; SI-NEXT:    v_mov_b32_e32 v15, s41
; SI-NEXT:    v_mov_b32_e32 v16, s14
; SI-NEXT:    v_mov_b32_e32 v17, s15
; SI-NEXT:    v_mov_b32_e32 v18, s12
; SI-NEXT:    v_mov_b32_e32 v19, s13
; SI-NEXT:    v_mov_b32_e32 v20, s10
; SI-NEXT:    v_mov_b32_e32 v21, s11
; SI-NEXT:    v_mov_b32_e32 v22, s8
; SI-NEXT:    v_mov_b32_e32 v23, s9
; SI-NEXT:    v_mov_b32_e32 v24, s6
; SI-NEXT:    v_mov_b32_e32 v25, s7
; SI-NEXT:    v_mov_b32_e32 v26, s4
; SI-NEXT:    v_mov_b32_e32 v27, s5
; SI-NEXT:    v_readlane_b32 s31, v28, 6
; SI-NEXT:    v_readlane_b32 s38, v28, 4
; SI-NEXT:    v_readlane_b32 s37, v28, 3
; SI-NEXT:    v_readlane_b32 s36, v28, 2
; SI-NEXT:    v_readlane_b32 s35, v28, 1
; SI-NEXT:    v_readlane_b32 s34, v28, 0
; SI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v28i32_to_v56i16_scalar:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    v_readfirstlane_b32 s41, v14
; VI-NEXT:    v_readfirstlane_b32 s4, v13
; VI-NEXT:    v_readfirstlane_b32 s5, v12
; VI-NEXT:    v_readfirstlane_b32 s6, v11
; VI-NEXT:    v_readfirstlane_b32 s7, v10
; VI-NEXT:    v_readfirstlane_b32 s8, v9
; VI-NEXT:    v_readfirstlane_b32 s9, v8
; VI-NEXT:    v_readfirstlane_b32 s10, v7
; VI-NEXT:    v_readfirstlane_b32 s11, v6
; VI-NEXT:    v_readfirstlane_b32 s12, v5
; VI-NEXT:    v_readfirstlane_b32 s13, v4
; VI-NEXT:    v_readfirstlane_b32 s14, v3
; VI-NEXT:    v_readfirstlane_b32 s15, v2
; VI-NEXT:    v_readfirstlane_b32 s40, v1
; VI-NEXT:    s_cmp_lg_u32 s41, 0
; VI-NEXT:    v_readfirstlane_b32 s41, v0
; VI-NEXT:    s_cbranch_scc1 .LBB13_2
; VI-NEXT:  ; %bb.1: ; %cmp.true
; VI-NEXT:    s_add_i32 s4, s4, 3
; VI-NEXT:    s_add_i32 s5, s5, 3
; VI-NEXT:    s_add_i32 s6, s6, 3
; VI-NEXT:    s_add_i32 s7, s7, 3
; VI-NEXT:    s_add_i32 s8, s8, 3
; VI-NEXT:    s_add_i32 s9, s9, 3
; VI-NEXT:    s_add_i32 s10, s10, 3
; VI-NEXT:    s_add_i32 s11, s11, 3
; VI-NEXT:    s_add_i32 s12, s12, 3
; VI-NEXT:    s_add_i32 s13, s13, 3
; VI-NEXT:    s_add_i32 s14, s14, 3
; VI-NEXT:    s_add_i32 s15, s15, 3
; VI-NEXT:    s_add_i32 s40, s40, 3
; VI-NEXT:    s_add_i32 s41, s41, 3
; VI-NEXT:    s_add_i32 s29, s29, 3
; VI-NEXT:    s_add_i32 s28, s28, 3
; VI-NEXT:    s_add_i32 s27, s27, 3
; VI-NEXT:    s_add_i32 s26, s26, 3
; VI-NEXT:    s_add_i32 s25, s25, 3
; VI-NEXT:    s_add_i32 s24, s24, 3
; VI-NEXT:    s_add_i32 s23, s23, 3
; VI-NEXT:    s_add_i32 s22, s22, 3
; VI-NEXT:    s_add_i32 s21, s21, 3
; VI-NEXT:    s_add_i32 s20, s20, 3
; VI-NEXT:    s_add_i32 s19, s19, 3
; VI-NEXT:    s_add_i32 s18, s18, 3
; VI-NEXT:    s_add_i32 s17, s17, 3
; VI-NEXT:    s_add_i32 s16, s16, 3
; VI-NEXT:  .LBB13_2: ; %cmp.false
; VI-NEXT:    s_lshr_b32 s42, s4, 16
; VI-NEXT:    s_lshr_b32 s43, s5, 16
; VI-NEXT:    s_lshr_b32 s44, s6, 16
; VI-NEXT:    s_lshr_b32 s45, s7, 16
; VI-NEXT:    s_lshr_b32 s46, s8, 16
; VI-NEXT:    s_lshr_b32 s47, s9, 16
; VI-NEXT:    s_lshr_b32 s56, s10, 16
; VI-NEXT:    s_lshr_b32 s57, s11, 16
; VI-NEXT:    s_lshr_b32 s58, s12, 16
; VI-NEXT:    s_lshr_b32 s59, s13, 16
; VI-NEXT:    s_lshr_b32 s60, s14, 16
; VI-NEXT:    s_lshr_b32 s61, s15, 16
; VI-NEXT:    s_lshr_b32 s62, s40, 16
; VI-NEXT:    s_lshr_b32 s63, s41, 16
; VI-NEXT:    s_lshr_b32 s72, s29, 16
; VI-NEXT:    s_lshr_b32 s73, s28, 16
; VI-NEXT:    s_lshr_b32 s74, s27, 16
; VI-NEXT:    s_lshr_b32 s75, s26, 16
; VI-NEXT:    s_lshr_b32 s76, s25, 16
; VI-NEXT:    s_lshr_b32 s77, s24, 16
; VI-NEXT:    s_lshr_b32 s78, s23, 16
; VI-NEXT:    s_lshr_b32 s79, s22, 16
; VI-NEXT:    s_lshr_b32 s88, s21, 16
; VI-NEXT:    s_lshr_b32 s89, s20, 16
; VI-NEXT:    s_lshr_b32 s90, s19, 16
; VI-NEXT:    s_lshr_b32 s91, s18, 16
; VI-NEXT:    s_lshr_b32 vcc_lo, s17, 16
; VI-NEXT:    s_lshr_b32 vcc_hi, s16, 16
; VI-NEXT:    s_and_b32 s16, 0xffff, s16
; VI-NEXT:    s_lshl_b32 vcc_hi, vcc_hi, 16
; VI-NEXT:    s_and_b32 s17, 0xffff, s17
; VI-NEXT:    s_lshl_b32 vcc_lo, vcc_lo, 16
; VI-NEXT:    s_and_b32 s18, 0xffff, s18
; VI-NEXT:    s_lshl_b32 s91, s91, 16
; VI-NEXT:    s_and_b32 s19, 0xffff, s19
; VI-NEXT:    s_lshl_b32 s90, s90, 16
; VI-NEXT:    s_and_b32 s20, 0xffff, s20
; VI-NEXT:    s_lshl_b32 s89, s89, 16
; VI-NEXT:    s_and_b32 s21, 0xffff, s21
; VI-NEXT:    s_lshl_b32 s88, s88, 16
; VI-NEXT:    s_and_b32 s22, 0xffff, s22
; VI-NEXT:    s_lshl_b32 s79, s79, 16
; VI-NEXT:    s_and_b32 s23, 0xffff, s23
; VI-NEXT:    s_lshl_b32 s78, s78, 16
; VI-NEXT:    s_and_b32 s24, 0xffff, s24
; VI-NEXT:    s_lshl_b32 s77, s77, 16
; VI-NEXT:    s_and_b32 s25, 0xffff, s25
; VI-NEXT:    s_lshl_b32 s76, s76, 16
; VI-NEXT:    s_and_b32 s26, 0xffff, s26
; VI-NEXT:    s_lshl_b32 s75, s75, 16
; VI-NEXT:    s_and_b32 s27, 0xffff, s27
; VI-NEXT:    s_lshl_b32 s74, s74, 16
; VI-NEXT:    s_and_b32 s28, 0xffff, s28
; VI-NEXT:    s_lshl_b32 s73, s73, 16
; VI-NEXT:    s_and_b32 s29, 0xffff, s29
; VI-NEXT:    s_lshl_b32 s72, s72, 16
; VI-NEXT:    s_and_b32 s41, 0xffff, s41
; VI-NEXT:    s_lshl_b32 s63, s63, 16
; VI-NEXT:    s_and_b32 s40, 0xffff, s40
; VI-NEXT:    s_lshl_b32 s62, s62, 16
; VI-NEXT:    s_and_b32 s15, 0xffff, s15
; VI-NEXT:    s_lshl_b32 s61, s61, 16
; VI-NEXT:    s_and_b32 s14, 0xffff, s14
; VI-NEXT:    s_lshl_b32 s60, s60, 16
; VI-NEXT:    s_and_b32 s13, 0xffff, s13
; VI-NEXT:    s_lshl_b32 s59, s59, 16
; VI-NEXT:    s_and_b32 s12, 0xffff, s12
; VI-NEXT:    s_lshl_b32 s58, s58, 16
; VI-NEXT:    s_and_b32 s11, 0xffff, s11
; VI-NEXT:    s_lshl_b32 s57, s57, 16
; VI-NEXT:    s_and_b32 s10, 0xffff, s10
; VI-NEXT:    s_lshl_b32 s56, s56, 16
; VI-NEXT:    s_and_b32 s9, 0xffff, s9
; VI-NEXT:    s_lshl_b32 s47, s47, 16
; VI-NEXT:    s_and_b32 s8, 0xffff, s8
; VI-NEXT:    s_lshl_b32 s46, s46, 16
; VI-NEXT:    s_and_b32 s7, 0xffff, s7
; VI-NEXT:    s_lshl_b32 s45, s45, 16
; VI-NEXT:    s_and_b32 s6, 0xffff, s6
; VI-NEXT:    s_lshl_b32 s44, s44, 16
; VI-NEXT:    s_and_b32 s5, 0xffff, s5
; VI-NEXT:    s_lshl_b32 s43, s43, 16
; VI-NEXT:    s_and_b32 s4, 0xffff, s4
; VI-NEXT:    s_lshl_b32 s42, s42, 16
; VI-NEXT:    s_or_b32 s16, s16, vcc_hi
; VI-NEXT:    s_or_b32 s17, s17, vcc_lo
; VI-NEXT:    s_or_b32 s18, s18, s91
; VI-NEXT:    s_or_b32 s19, s19, s90
; VI-NEXT:    s_or_b32 s20, s20, s89
; VI-NEXT:    s_or_b32 s21, s21, s88
; VI-NEXT:    s_or_b32 s22, s22, s79
; VI-NEXT:    s_or_b32 s23, s23, s78
; VI-NEXT:    s_or_b32 s24, s24, s77
; VI-NEXT:    s_or_b32 s25, s25, s76
; VI-NEXT:    s_or_b32 s26, s26, s75
; VI-NEXT:    s_or_b32 s27, s27, s74
; VI-NEXT:    s_or_b32 s28, s28, s73
; VI-NEXT:    s_or_b32 s29, s29, s72
; VI-NEXT:    s_or_b32 s41, s41, s63
; VI-NEXT:    s_or_b32 s40, s40, s62
; VI-NEXT:    s_or_b32 s15, s15, s61
; VI-NEXT:    s_or_b32 s14, s14, s60
; VI-NEXT:    s_or_b32 s13, s13, s59
; VI-NEXT:    s_or_b32 s12, s12, s58
; VI-NEXT:    s_or_b32 s11, s11, s57
; VI-NEXT:    s_or_b32 s10, s10, s56
; VI-NEXT:    s_or_b32 s9, s9, s47
; VI-NEXT:    s_or_b32 s8, s8, s46
; VI-NEXT:    s_or_b32 s7, s7, s45
; VI-NEXT:    s_or_b32 s6, s6, s44
; VI-NEXT:    s_or_b32 s5, s5, s43
; VI-NEXT:    s_or_b32 s4, s4, s42
; VI-NEXT:    v_mov_b32_e32 v0, s16
; VI-NEXT:    v_mov_b32_e32 v1, s17
; VI-NEXT:    v_mov_b32_e32 v2, s18
; VI-NEXT:    v_mov_b32_e32 v3, s19
; VI-NEXT:    v_mov_b32_e32 v4, s20
; VI-NEXT:    v_mov_b32_e32 v5, s21
; VI-NEXT:    v_mov_b32_e32 v6, s22
; VI-NEXT:    v_mov_b32_e32 v7, s23
; VI-NEXT:    v_mov_b32_e32 v8, s24
; VI-NEXT:    v_mov_b32_e32 v9, s25
; VI-NEXT:    v_mov_b32_e32 v10, s26
; VI-NEXT:    v_mov_b32_e32 v11, s27
; VI-NEXT:    v_mov_b32_e32 v12, s28
; VI-NEXT:    v_mov_b32_e32 v13, s29
; VI-NEXT:    v_mov_b32_e32 v14, s41
; VI-NEXT:    v_mov_b32_e32 v15, s40
; VI-NEXT:    v_mov_b32_e32 v16, s15
; VI-NEXT:    v_mov_b32_e32 v17, s14
; VI-NEXT:    v_mov_b32_e32 v18, s13
; VI-NEXT:    v_mov_b32_e32 v19, s12
; VI-NEXT:    v_mov_b32_e32 v20, s11
; VI-NEXT:    v_mov_b32_e32 v21, s10
; VI-NEXT:    v_mov_b32_e32 v22, s9
; VI-NEXT:    v_mov_b32_e32 v23, s8
; VI-NEXT:    v_mov_b32_e32 v24, s7
; VI-NEXT:    v_mov_b32_e32 v25, s6
; VI-NEXT:    v_mov_b32_e32 v26, s5
; VI-NEXT:    v_mov_b32_e32 v27, s4
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v28i32_to_v56i16_scalar:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_readfirstlane_b32 s41, v14
; GFX9-NEXT:    v_readfirstlane_b32 s4, v13
; GFX9-NEXT:    v_readfirstlane_b32 s5, v12
; GFX9-NEXT:    v_readfirstlane_b32 s6, v11
; GFX9-NEXT:    v_readfirstlane_b32 s7, v10
; GFX9-NEXT:    v_readfirstlane_b32 s8, v9
; GFX9-NEXT:    v_readfirstlane_b32 s9, v8
; GFX9-NEXT:    v_readfirstlane_b32 s10, v7
; GFX9-NEXT:    v_readfirstlane_b32 s11, v6
; GFX9-NEXT:    v_readfirstlane_b32 s12, v5
; GFX9-NEXT:    v_readfirstlane_b32 s13, v4
; GFX9-NEXT:    v_readfirstlane_b32 s14, v3
; GFX9-NEXT:    v_readfirstlane_b32 s15, v2
; GFX9-NEXT:    v_readfirstlane_b32 s40, v1
; GFX9-NEXT:    s_cmp_lg_u32 s41, 0
; GFX9-NEXT:    v_readfirstlane_b32 s41, v0
; GFX9-NEXT:    s_cbranch_scc1 .LBB13_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.true
; GFX9-NEXT:    s_add_i32 s4, s4, 3
; GFX9-NEXT:    s_add_i32 s5, s5, 3
; GFX9-NEXT:    s_add_i32 s6, s6, 3
; GFX9-NEXT:    s_add_i32 s7, s7, 3
; GFX9-NEXT:    s_add_i32 s8, s8, 3
; GFX9-NEXT:    s_add_i32 s9, s9, 3
; GFX9-NEXT:    s_add_i32 s10, s10, 3
; GFX9-NEXT:    s_add_i32 s11, s11, 3
; GFX9-NEXT:    s_add_i32 s12, s12, 3
; GFX9-NEXT:    s_add_i32 s13, s13, 3
; GFX9-NEXT:    s_add_i32 s14, s14, 3
; GFX9-NEXT:    s_add_i32 s15, s15, 3
; GFX9-NEXT:    s_add_i32 s40, s40, 3
; GFX9-NEXT:    s_add_i32 s41, s41, 3
; GFX9-NEXT:    s_add_i32 s29, s29, 3
; GFX9-NEXT:    s_add_i32 s28, s28, 3
; GFX9-NEXT:    s_add_i32 s27, s27, 3
; GFX9-NEXT:    s_add_i32 s26, s26, 3
; GFX9-NEXT:    s_add_i32 s25, s25, 3
; GFX9-NEXT:    s_add_i32 s24, s24, 3
; GFX9-NEXT:    s_add_i32 s23, s23, 3
; GFX9-NEXT:    s_add_i32 s22, s22, 3
; GFX9-NEXT:    s_add_i32 s21, s21, 3
; GFX9-NEXT:    s_add_i32 s20, s20, 3
; GFX9-NEXT:    s_add_i32 s19, s19, 3
; GFX9-NEXT:    s_add_i32 s18, s18, 3
; GFX9-NEXT:    s_add_i32 s17, s17, 3
; GFX9-NEXT:    s_add_i32 s16, s16, 3
; GFX9-NEXT:  .LBB13_2: ; %cmp.false
; GFX9-NEXT:    s_lshr_b32 s42, s4, 16
; GFX9-NEXT:    s_lshr_b32 s43, s5, 16
; GFX9-NEXT:    s_lshr_b32 s44, s6, 16
; GFX9-NEXT:    s_lshr_b32 s45, s7, 16
; GFX9-NEXT:    s_lshr_b32 s46, s8, 16
; GFX9-NEXT:    s_lshr_b32 s47, s9, 16
; GFX9-NEXT:    s_lshr_b32 s56, s10, 16
; GFX9-NEXT:    s_lshr_b32 s57, s11, 16
; GFX9-NEXT:    s_lshr_b32 s58, s12, 16
; GFX9-NEXT:    s_lshr_b32 s59, s13, 16
; GFX9-NEXT:    s_lshr_b32 s60, s14, 16
; GFX9-NEXT:    s_lshr_b32 s61, s15, 16
; GFX9-NEXT:    s_lshr_b32 s62, s40, 16
; GFX9-NEXT:    s_lshr_b32 s63, s41, 16
; GFX9-NEXT:    s_lshr_b32 s72, s29, 16
; GFX9-NEXT:    s_lshr_b32 s73, s28, 16
; GFX9-NEXT:    s_lshr_b32 s74, s27, 16
; GFX9-NEXT:    s_lshr_b32 s75, s26, 16
; GFX9-NEXT:    s_lshr_b32 s76, s25, 16
; GFX9-NEXT:    s_lshr_b32 s77, s24, 16
; GFX9-NEXT:    s_lshr_b32 s78, s23, 16
; GFX9-NEXT:    s_lshr_b32 s79, s22, 16
; GFX9-NEXT:    s_lshr_b32 s88, s21, 16
; GFX9-NEXT:    s_lshr_b32 s89, s20, 16
; GFX9-NEXT:    s_lshr_b32 s90, s19, 16
; GFX9-NEXT:    s_lshr_b32 s91, s18, 16
; GFX9-NEXT:    s_lshr_b32 s92, s17, 16
; GFX9-NEXT:    s_lshr_b32 s93, s16, 16
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s16, s93
; GFX9-NEXT:    s_pack_ll_b32_b16 s17, s17, s92
; GFX9-NEXT:    s_pack_ll_b32_b16 s18, s18, s91
; GFX9-NEXT:    s_pack_ll_b32_b16 s19, s19, s90
; GFX9-NEXT:    s_pack_ll_b32_b16 s20, s20, s89
; GFX9-NEXT:    s_pack_ll_b32_b16 s21, s21, s88
; GFX9-NEXT:    s_pack_ll_b32_b16 s22, s22, s79
; GFX9-NEXT:    s_pack_ll_b32_b16 s23, s23, s78
; GFX9-NEXT:    s_pack_ll_b32_b16 s24, s24, s77
; GFX9-NEXT:    s_pack_ll_b32_b16 s25, s25, s76
; GFX9-NEXT:    s_pack_ll_b32_b16 s26, s26, s75
; GFX9-NEXT:    s_pack_ll_b32_b16 s27, s27, s74
; GFX9-NEXT:    s_pack_ll_b32_b16 s28, s28, s73
; GFX9-NEXT:    s_pack_ll_b32_b16 s29, s29, s72
; GFX9-NEXT:    s_pack_ll_b32_b16 s41, s41, s63
; GFX9-NEXT:    s_pack_ll_b32_b16 s40, s40, s62
; GFX9-NEXT:    s_pack_ll_b32_b16 s15, s15, s61
; GFX9-NEXT:    s_pack_ll_b32_b16 s14, s14, s60
; GFX9-NEXT:    s_pack_ll_b32_b16 s13, s13, s59
; GFX9-NEXT:    s_pack_ll_b32_b16 s12, s12, s58
; GFX9-NEXT:    s_pack_ll_b32_b16 s11, s11, s57
; GFX9-NEXT:    s_pack_ll_b32_b16 s10, s10, s56
; GFX9-NEXT:    s_pack_ll_b32_b16 s9, s9, s47
; GFX9-NEXT:    s_pack_ll_b32_b16 s8, s8, s46
; GFX9-NEXT:    s_pack_ll_b32_b16 s7, s7, s45
; GFX9-NEXT:    s_pack_ll_b32_b16 s6, s6, s44
; GFX9-NEXT:    s_pack_ll_b32_b16 s5, s5, s43
; GFX9-NEXT:    s_pack_ll_b32_b16 s4, s4, s42
; GFX9-NEXT:    v_mov_b32_e32 v0, s16
; GFX9-NEXT:    v_mov_b32_e32 v1, s17
; GFX9-NEXT:    v_mov_b32_e32 v2, s18
; GFX9-NEXT:    v_mov_b32_e32 v3, s19
; GFX9-NEXT:    v_mov_b32_e32 v4, s20
; GFX9-NEXT:    v_mov_b32_e32 v5, s21
; GFX9-NEXT:    v_mov_b32_e32 v6, s22
; GFX9-NEXT:    v_mov_b32_e32 v7, s23
; GFX9-NEXT:    v_mov_b32_e32 v8, s24
; GFX9-NEXT:    v_mov_b32_e32 v9, s25
; GFX9-NEXT:    v_mov_b32_e32 v10, s26
; GFX9-NEXT:    v_mov_b32_e32 v11, s27
; GFX9-NEXT:    v_mov_b32_e32 v12, s28
; GFX9-NEXT:    v_mov_b32_e32 v13, s29
; GFX9-NEXT:    v_mov_b32_e32 v14, s41
; GFX9-NEXT:    v_mov_b32_e32 v15, s40
; GFX9-NEXT:    v_mov_b32_e32 v16, s15
; GFX9-NEXT:    v_mov_b32_e32 v17, s14
; GFX9-NEXT:    v_mov_b32_e32 v18, s13
; GFX9-NEXT:    v_mov_b32_e32 v19, s12
; GFX9-NEXT:    v_mov_b32_e32 v20, s11
; GFX9-NEXT:    v_mov_b32_e32 v21, s10
; GFX9-NEXT:    v_mov_b32_e32 v22, s9
; GFX9-NEXT:    v_mov_b32_e32 v23, s8
; GFX9-NEXT:    v_mov_b32_e32 v24, s7
; GFX9-NEXT:    v_mov_b32_e32 v25, s6
; GFX9-NEXT:    v_mov_b32_e32 v26, s5
; GFX9-NEXT:    v_mov_b32_e32 v27, s4
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v28i32_to_v56i16_scalar:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_readfirstlane_b32 s14, v10
; GFX11-NEXT:    v_readfirstlane_b32 s4, v9
; GFX11-NEXT:    v_readfirstlane_b32 s5, v8
; GFX11-NEXT:    v_readfirstlane_b32 s6, v7
; GFX11-NEXT:    v_readfirstlane_b32 s7, v6
; GFX11-NEXT:    v_readfirstlane_b32 s8, v5
; GFX11-NEXT:    v_readfirstlane_b32 s9, v4
; GFX11-NEXT:    v_readfirstlane_b32 s10, v3
; GFX11-NEXT:    v_readfirstlane_b32 s11, v2
; GFX11-NEXT:    v_readfirstlane_b32 s12, v1
; GFX11-NEXT:    v_readfirstlane_b32 s13, v0
; GFX11-NEXT:    s_cmp_lg_u32 s14, 0
; GFX11-NEXT:    s_cbranch_scc1 .LBB13_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-NEXT:    s_add_i32 s4, s4, 3
; GFX11-NEXT:    s_add_i32 s5, s5, 3
; GFX11-NEXT:    s_add_i32 s6, s6, 3
; GFX11-NEXT:    s_add_i32 s7, s7, 3
; GFX11-NEXT:    s_add_i32 s8, s8, 3
; GFX11-NEXT:    s_add_i32 s9, s9, 3
; GFX11-NEXT:    s_add_i32 s10, s10, 3
; GFX11-NEXT:    s_add_i32 s11, s11, 3
; GFX11-NEXT:    s_add_i32 s12, s12, 3
; GFX11-NEXT:    s_add_i32 s13, s13, 3
; GFX11-NEXT:    s_add_i32 s29, s29, 3
; GFX11-NEXT:    s_add_i32 s28, s28, 3
; GFX11-NEXT:    s_add_i32 s27, s27, 3
; GFX11-NEXT:    s_add_i32 s26, s26, 3
; GFX11-NEXT:    s_add_i32 s25, s25, 3
; GFX11-NEXT:    s_add_i32 s24, s24, 3
; GFX11-NEXT:    s_add_i32 s23, s23, 3
; GFX11-NEXT:    s_add_i32 s22, s22, 3
; GFX11-NEXT:    s_add_i32 s21, s21, 3
; GFX11-NEXT:    s_add_i32 s20, s20, 3
; GFX11-NEXT:    s_add_i32 s19, s19, 3
; GFX11-NEXT:    s_add_i32 s18, s18, 3
; GFX11-NEXT:    s_add_i32 s17, s17, 3
; GFX11-NEXT:    s_add_i32 s16, s16, 3
; GFX11-NEXT:    s_add_i32 s3, s3, 3
; GFX11-NEXT:    s_add_i32 s2, s2, 3
; GFX11-NEXT:    s_add_i32 s1, s1, 3
; GFX11-NEXT:    s_add_i32 s0, s0, 3
; GFX11-NEXT:  .LBB13_2: ; %cmp.false
; GFX11-NEXT:    s_lshr_b32 s14, s4, 16
; GFX11-NEXT:    s_lshr_b32 s15, s5, 16
; GFX11-NEXT:    s_lshr_b32 s40, s6, 16
; GFX11-NEXT:    s_lshr_b32 s41, s7, 16
; GFX11-NEXT:    s_lshr_b32 s42, s8, 16
; GFX11-NEXT:    s_lshr_b32 s43, s9, 16
; GFX11-NEXT:    s_lshr_b32 s44, s10, 16
; GFX11-NEXT:    s_lshr_b32 s45, s11, 16
; GFX11-NEXT:    s_lshr_b32 s46, s12, 16
; GFX11-NEXT:    s_lshr_b32 s47, s13, 16
; GFX11-NEXT:    s_lshr_b32 s56, s29, 16
; GFX11-NEXT:    s_lshr_b32 s57, s28, 16
; GFX11-NEXT:    s_lshr_b32 s58, s27, 16
; GFX11-NEXT:    s_lshr_b32 s59, s26, 16
; GFX11-NEXT:    s_lshr_b32 s60, s25, 16
; GFX11-NEXT:    s_lshr_b32 s61, s24, 16
; GFX11-NEXT:    s_lshr_b32 s62, s23, 16
; GFX11-NEXT:    s_lshr_b32 s63, s22, 16
; GFX11-NEXT:    s_lshr_b32 s72, s21, 16
; GFX11-NEXT:    s_lshr_b32 s73, s20, 16
; GFX11-NEXT:    s_lshr_b32 s74, s19, 16
; GFX11-NEXT:    s_lshr_b32 s75, s18, 16
; GFX11-NEXT:    s_lshr_b32 s76, s17, 16
; GFX11-NEXT:    s_lshr_b32 s77, s16, 16
; GFX11-NEXT:    s_lshr_b32 s78, s3, 16
; GFX11-NEXT:    s_lshr_b32 s79, s2, 16
; GFX11-NEXT:    s_lshr_b32 s88, s1, 16
; GFX11-NEXT:    s_lshr_b32 s89, s0, 16
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s1, s88
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s0, s89
; GFX11-NEXT:    s_pack_ll_b32_b16 s2, s2, s79
; GFX11-NEXT:    s_pack_ll_b32_b16 s3, s3, s78
; GFX11-NEXT:    s_pack_ll_b32_b16 s16, s16, s77
; GFX11-NEXT:    s_pack_ll_b32_b16 s17, s17, s76
; GFX11-NEXT:    s_pack_ll_b32_b16 s18, s18, s75
; GFX11-NEXT:    s_pack_ll_b32_b16 s19, s19, s74
; GFX11-NEXT:    s_pack_ll_b32_b16 s20, s20, s73
; GFX11-NEXT:    s_pack_ll_b32_b16 s21, s21, s72
; GFX11-NEXT:    s_pack_ll_b32_b16 s22, s22, s63
; GFX11-NEXT:    s_pack_ll_b32_b16 s23, s23, s62
; GFX11-NEXT:    s_pack_ll_b32_b16 s24, s24, s61
; GFX11-NEXT:    s_pack_ll_b32_b16 s25, s25, s60
; GFX11-NEXT:    s_pack_ll_b32_b16 s26, s26, s59
; GFX11-NEXT:    s_pack_ll_b32_b16 s27, s27, s58
; GFX11-NEXT:    s_pack_ll_b32_b16 s28, s28, s57
; GFX11-NEXT:    s_pack_ll_b32_b16 s29, s29, s56
; GFX11-NEXT:    s_pack_ll_b32_b16 s13, s13, s47
; GFX11-NEXT:    s_pack_ll_b32_b16 s12, s12, s46
; GFX11-NEXT:    s_pack_ll_b32_b16 s11, s11, s45
; GFX11-NEXT:    s_pack_ll_b32_b16 s10, s10, s44
; GFX11-NEXT:    s_pack_ll_b32_b16 s9, s9, s43
; GFX11-NEXT:    s_pack_ll_b32_b16 s8, s8, s42
; GFX11-NEXT:    s_pack_ll_b32_b16 s7, s7, s41
; GFX11-NEXT:    s_pack_ll_b32_b16 s6, s6, s40
; GFX11-NEXT:    s_pack_ll_b32_b16 s5, s5, s15
; GFX11-NEXT:    s_pack_ll_b32_b16 s4, s4, s14
; GFX11-NEXT:    v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX11-NEXT:    v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; GFX11-NEXT:    v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
; GFX11-NEXT:    v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
; GFX11-NEXT:    v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
; GFX11-NEXT:    v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
; GFX11-NEXT:    v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
; GFX11-NEXT:    v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
; GFX11-NEXT:    v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
; GFX11-NEXT:    v_dual_mov_b32 v18, s13 :: v_dual_mov_b32 v19, s12
; GFX11-NEXT:    v_dual_mov_b32 v20, s11 :: v_dual_mov_b32 v21, s10
; GFX11-NEXT:    v_dual_mov_b32 v22, s9 :: v_dual_mov_b32 v23, s8
; GFX11-NEXT:    v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s6
; GFX11-NEXT:    v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s4
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = add <28 x i32> %a, splat (i32 3)
  %a2 = bitcast <28 x i32> %a1 to <56 x i16>
  br label %end

cmp.false:
  %a3 = bitcast <28 x i32> %a to <56 x i16>
  br label %end

end:
  %phi = phi <56 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <56 x i16> %phi
}

define <28 x i32> @bitcast_v56i16_to_v28i32(<56 x i16> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v56i16_to_v28i32:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    v_mov_b32_e32 v37, v22
; SI-NEXT:    v_mov_b32_e32 v38, v21
; SI-NEXT:    v_mov_b32_e32 v39, v20
; SI-NEXT:    v_mov_b32_e32 v48, v19
; SI-NEXT:    v_mov_b32_e32 v49, v18
; SI-NEXT:    v_mov_b32_e32 v50, v17
; SI-NEXT:    v_mov_b32_e32 v51, v16
; SI-NEXT:    v_mov_b32_e32 v52, v15
; SI-NEXT:    v_mov_b32_e32 v53, v14
; SI-NEXT:    v_mov_b32_e32 v54, v13
; SI-NEXT:    v_mov_b32_e32 v55, v12
; SI-NEXT:    v_mov_b32_e32 v40, v11
; SI-NEXT:    v_mov_b32_e32 v41, v10
; SI-NEXT:    v_mov_b32_e32 v42, v9
; SI-NEXT:    v_mov_b32_e32 v43, v8
; SI-NEXT:    v_mov_b32_e32 v44, v7
; SI-NEXT:    v_mov_b32_e32 v45, v6
; SI-NEXT:    v_mov_b32_e32 v46, v5
; SI-NEXT:    v_mov_b32_e32 v47, v4
; SI-NEXT:    v_mov_b32_e32 v56, v3
; SI-NEXT:    s_waitcnt expcnt(6)
; SI-NEXT:    v_mov_b32_e32 v57, v2
; SI-NEXT:    s_waitcnt expcnt(5)
; SI-NEXT:    v_mov_b32_e32 v58, v1
; SI-NEXT:    s_waitcnt expcnt(4)
; SI-NEXT:    v_mov_b32_e32 v59, v0
; SI-NEXT:    buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v27
; SI-NEXT:    buffer_store_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT:    v_lshrrev_b32_e32 v1, 16, v26
; SI-NEXT:    buffer_store_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT:    v_lshrrev_b32_e32 v2, 16, v25
; SI-NEXT:    buffer_store_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT:    v_lshrrev_b32_e32 v3, 16, v24
; SI-NEXT:    buffer_store_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT:    v_lshrrev_b32_e32 v4, 16, v23
; SI-NEXT:    v_lshrrev_b32_e32 v5, 16, v37
; SI-NEXT:    v_lshrrev_b32_e32 v6, 16, v38
; SI-NEXT:    v_lshrrev_b32_e32 v7, 16, v39
; SI-NEXT:    v_lshrrev_b32_e32 v8, 16, v48
; SI-NEXT:    v_lshrrev_b32_e32 v9, 16, v49
; SI-NEXT:    v_lshrrev_b32_e32 v10, 16, v50
; SI-NEXT:    v_lshrrev_b32_e32 v11, 16, v51
; SI-NEXT:    v_lshrrev_b32_e32 v12, 16, v52
; SI-NEXT:    v_lshrrev_b32_e32 v13, 16, v53
; SI-NEXT:    v_lshrrev_b32_e32 v14, 16, v54
; SI-NEXT:    v_lshrrev_b32_e32 v15, 16, v55
; SI-NEXT:    v_lshrrev_b32_e32 v16, 16, v40
; SI-NEXT:    v_lshrrev_b32_e32 v17, 16, v41
; SI-NEXT:    v_lshrrev_b32_e32 v18, 16, v42
; SI-NEXT:    v_lshrrev_b32_e32 v19, 16, v43
; SI-NEXT:    v_lshrrev_b32_e32 v20, 16, v44
; SI-NEXT:    v_lshrrev_b32_e32 v21, 16, v45
; SI-NEXT:    v_lshrrev_b32_e32 v22, 16, v46
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v23, 16, v47
; SI-NEXT:    v_lshrrev_b32_e32 v24, 16, v56
; SI-NEXT:    v_lshrrev_b32_e32 v25, 16, v57
; SI-NEXT:    v_lshrrev_b32_e32 v26, 16, v58
; SI-NEXT:    v_lshrrev_b32_e32 v27, 16, v59
; SI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT:    v_lshlrev_b32_e32 v32, 16, v27
; SI-NEXT:    v_lshlrev_b32_e32 v36, 16, v26
; SI-NEXT:    v_lshlrev_b32_e32 v61, 16, v25
; SI-NEXT:    v_lshlrev_b32_e32 v35, 16, v24
; SI-NEXT:    v_lshlrev_b32_e32 v60, 16, v23
; SI-NEXT:    v_lshlrev_b32_e32 v34, 16, v22
; SI-NEXT:    v_lshlrev_b32_e32 v63, 16, v21
; SI-NEXT:    v_lshlrev_b32_e32 v33, 16, v20
; SI-NEXT:    v_lshlrev_b32_e32 v62, 16, v19
; SI-NEXT:    v_lshlrev_b32_e32 v18, 16, v18
; SI-NEXT:    v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT:    v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT:    v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT:    v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT:    v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT:    v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT:    v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT:    v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT:    v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT:    v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT:    v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT:    v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT:    v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT:    v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
; SI-NEXT:    buffer_store_dword v18, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v16, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v13, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v11, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v8, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v7, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v6, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v5, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v4, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT:    ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB14_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v19, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT:    v_and_b32_e32 v9, 0xffff, v42
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v59
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v58
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v57
; SI-NEXT:    v_and_b32_e32 v3, 0xffff, v56
; SI-NEXT:    v_and_b32_e32 v4, 0xffff, v47
; SI-NEXT:    v_and_b32_e32 v5, 0xffff, v46
; SI-NEXT:    v_and_b32_e32 v6, 0xffff, v45
; SI-NEXT:    v_and_b32_e32 v7, 0xffff, v44
; SI-NEXT:    v_and_b32_e32 v8, 0xffff, v43
; SI-NEXT:    v_or_b32_e32 v0, v0, v32
; SI-NEXT:    v_or_b32_e32 v1, v1, v36
; SI-NEXT:    v_or_b32_e32 v2, v2, v61
; SI-NEXT:    v_or_b32_e32 v3, v3, v35
; SI-NEXT:    v_or_b32_e32 v4, v4, v60
; SI-NEXT:    v_or_b32_e32 v5, v5, v34
; SI-NEXT:    v_or_b32_e32 v6, v6, v63
; SI-NEXT:    v_or_b32_e32 v7, v7, v33
; SI-NEXT:    v_or_b32_e32 v8, v8, v62
; SI-NEXT:    ; implicit-def: $vgpr59
; SI-NEXT:    ; implicit-def: $vgpr58
; SI-NEXT:    ; implicit-def: $vgpr57
; SI-NEXT:    ; implicit-def: $vgpr56
; SI-NEXT:    ; implicit-def: $vgpr47
; SI-NEXT:    ; implicit-def: $vgpr46
; SI-NEXT:    ; implicit-def: $vgpr45
; SI-NEXT:    ; implicit-def: $vgpr44
; SI-NEXT:    ; implicit-def: $vgpr43
; SI-NEXT:    ; implicit-def: $vgpr42
; SI-NEXT:    ; implicit-def: $vgpr32
; SI-NEXT:    ; implicit-def: $vgpr36
; SI-NEXT:    ; implicit-def: $vgpr61
; SI-NEXT:    ; implicit-def: $vgpr35
; SI-NEXT:    ; implicit-def: $vgpr60
; SI-NEXT:    ; implicit-def: $vgpr34
; SI-NEXT:    ; implicit-def: $vgpr63
; SI-NEXT:    ; implicit-def: $vgpr33
; SI-NEXT:    ; implicit-def: $vgpr62
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(14)
; SI-NEXT:    v_or_b32_e32 v9, v9, v10
; SI-NEXT:    v_and_b32_e32 v10, 0xffff, v41
; SI-NEXT:    v_or_b32_e32 v10, v10, v11
; SI-NEXT:    v_and_b32_e32 v11, 0xffff, v40
; SI-NEXT:    v_or_b32_e32 v11, v11, v12
; SI-NEXT:    v_and_b32_e32 v12, 0xffff, v55
; SI-NEXT:    v_or_b32_e32 v12, v12, v13
; SI-NEXT:    v_and_b32_e32 v13, 0xffff, v54
; SI-NEXT:    v_or_b32_e32 v13, v13, v14
; SI-NEXT:    v_and_b32_e32 v14, 0xffff, v53
; SI-NEXT:    s_waitcnt vmcnt(13)
; SI-NEXT:    v_or_b32_e32 v14, v14, v15
; SI-NEXT:    v_and_b32_e32 v15, 0xffff, v52
; SI-NEXT:    s_waitcnt vmcnt(12)
; SI-NEXT:    v_or_b32_e32 v15, v15, v16
; SI-NEXT:    v_and_b32_e32 v16, 0xffff, v51
; SI-NEXT:    s_waitcnt vmcnt(11)
; SI-NEXT:    v_or_b32_e32 v16, v16, v17
; SI-NEXT:    v_and_b32_e32 v17, 0xffff, v50
; SI-NEXT:    s_waitcnt vmcnt(10)
; SI-NEXT:    v_or_b32_e32 v17, v17, v18
; SI-NEXT:    v_and_b32_e32 v18, 0xffff, v49
; SI-NEXT:    s_waitcnt vmcnt(9)
; SI-NEXT:    v_or_b32_e32 v18, v18, v19
; SI-NEXT:    v_and_b32_e32 v19, 0xffff, v48
; SI-NEXT:    s_waitcnt vmcnt(8)
; SI-NEXT:    v_or_b32_e32 v19, v19, v20
; SI-NEXT:    v_and_b32_e32 v20, 0xffff, v39
; SI-NEXT:    s_waitcnt vmcnt(7)
; SI-NEXT:    v_or_b32_e32 v20, v20, v21
; SI-NEXT:    v_and_b32_e32 v21, 0xffff, v38
; SI-NEXT:    s_waitcnt vmcnt(6)
; SI-NEXT:    v_or_b32_e32 v21, v21, v22
; SI-NEXT:    v_and_b32_e32 v22, 0xffff, v37
; SI-NEXT:    s_waitcnt vmcnt(5)
; SI-NEXT:    v_or_b32_e32 v22, v22, v23
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT:    ; implicit-def: $vgpr41
; SI-NEXT:    ; implicit-def: $vgpr40
; SI-NEXT:    ; implicit-def: $vgpr55
; SI-NEXT:    ; implicit-def: $vgpr54
; SI-NEXT:    ; implicit-def: $vgpr53
; SI-NEXT:    ; implicit-def: $vgpr52
; SI-NEXT:    ; implicit-def: $vgpr51
; SI-NEXT:    ; implicit-def: $vgpr50
; SI-NEXT:    ; implicit-def: $vgpr49
; SI-NEXT:    ; implicit-def: $vgpr48
; SI-NEXT:    ; implicit-def: $vgpr39
; SI-NEXT:    ; implicit-def: $vgpr38
; SI-NEXT:    ; implicit-def: $vgpr37
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT:    v_or_b32_e32 v23, v23, v24
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT:    v_or_b32_e32 v24, v24, v25
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT:    v_or_b32_e32 v25, v25, v26
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT:    v_or_b32_e32 v26, v26, v27
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT:    v_or_b32_e32 v27, v27, v28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:  .LBB14_2: ; %Flow
; SI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB14_4
; SI-NEXT:  ; %bb.3: ; %cmp.true
; SI-NEXT:    buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v19, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT:    v_add_i32_e32 v9, vcc, 3, v42
; SI-NEXT:    v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_add_i32_e32 v0, vcc, 3, v59
; SI-NEXT:    v_add_i32_e32 v1, vcc, 3, v58
; SI-NEXT:    v_add_i32_e32 v2, vcc, 3, v57
; SI-NEXT:    v_add_i32_e32 v3, vcc, 3, v56
; SI-NEXT:    v_add_i32_e32 v4, vcc, 3, v47
; SI-NEXT:    v_add_i32_e32 v5, vcc, 3, v46
; SI-NEXT:    v_add_i32_e32 v6, vcc, 3, v45
; SI-NEXT:    v_add_i32_e32 v7, vcc, 3, v44
; SI-NEXT:    v_add_i32_e32 v8, vcc, 3, v43
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT:    v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT:    v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT:    v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT:    v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT:    v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT:    v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT:    v_or_b32_e32 v0, v32, v0
; SI-NEXT:    v_or_b32_e32 v1, v36, v1
; SI-NEXT:    v_or_b32_e32 v2, v61, v2
; SI-NEXT:    v_or_b32_e32 v3, v35, v3
; SI-NEXT:    v_or_b32_e32 v4, v60, v4
; SI-NEXT:    v_or_b32_e32 v5, v34, v5
; SI-NEXT:    v_or_b32_e32 v6, v63, v6
; SI-NEXT:    v_or_b32_e32 v7, v33, v7
; SI-NEXT:    v_or_b32_e32 v8, v62, v8
; SI-NEXT:    v_add_i32_e32 v0, vcc, 0x30000, v0
; SI-NEXT:    v_add_i32_e32 v1, vcc, 0x30000, v1
; SI-NEXT:    v_add_i32_e32 v2, vcc, 0x30000, v2
; SI-NEXT:    v_add_i32_e32 v3, vcc, 0x30000, v3
; SI-NEXT:    v_add_i32_e32 v4, vcc, 0x30000, v4
; SI-NEXT:    v_add_i32_e32 v5, vcc, 0x30000, v5
; SI-NEXT:    v_add_i32_e32 v6, vcc, 0x30000, v6
; SI-NEXT:    v_add_i32_e32 v7, vcc, 0x30000, v7
; SI-NEXT:    v_add_i32_e32 v8, vcc, 0x30000, v8
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(14)
; SI-NEXT:    v_or_b32_e32 v9, v10, v9
; SI-NEXT:    v_add_i32_e32 v10, vcc, 3, v41
; SI-NEXT:    v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT:    v_or_b32_e32 v10, v11, v10
; SI-NEXT:    v_add_i32_e32 v11, vcc, 3, v40
; SI-NEXT:    v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT:    v_or_b32_e32 v11, v12, v11
; SI-NEXT:    v_add_i32_e32 v12, vcc, 3, v55
; SI-NEXT:    v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT:    v_or_b32_e32 v12, v13, v12
; SI-NEXT:    v_add_i32_e32 v13, vcc, 3, v54
; SI-NEXT:    v_and_b32_e32 v13, 0xffff, v13
; SI-NEXT:    v_or_b32_e32 v13, v14, v13
; SI-NEXT:    v_add_i32_e32 v14, vcc, 3, v53
; SI-NEXT:    v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT:    s_waitcnt vmcnt(13)
; SI-NEXT:    v_or_b32_e32 v14, v15, v14
; SI-NEXT:    v_add_i32_e32 v15, vcc, 3, v52
; SI-NEXT:    v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT:    s_waitcnt vmcnt(12)
; SI-NEXT:    v_or_b32_e32 v15, v16, v15
; SI-NEXT:    v_add_i32_e32 v16, vcc, 3, v51
; SI-NEXT:    v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT:    s_waitcnt vmcnt(11)
; SI-NEXT:    v_or_b32_e32 v16, v17, v16
; SI-NEXT:    v_add_i32_e32 v17, vcc, 3, v50
; SI-NEXT:    v_and_b32_e32 v17, 0xffff, v17
; SI-NEXT:    s_waitcnt vmcnt(10)
; SI-NEXT:    v_or_b32_e32 v17, v18, v17
; SI-NEXT:    v_add_i32_e32 v18, vcc, 3, v49
; SI-NEXT:    v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT:    s_waitcnt vmcnt(9)
; SI-NEXT:    v_or_b32_e32 v18, v19, v18
; SI-NEXT:    v_add_i32_e32 v19, vcc, 3, v48
; SI-NEXT:    v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT:    s_waitcnt vmcnt(8)
; SI-NEXT:    v_or_b32_e32 v19, v20, v19
; SI-NEXT:    v_add_i32_e32 v20, vcc, 3, v39
; SI-NEXT:    v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT:    s_waitcnt vmcnt(7)
; SI-NEXT:    v_or_b32_e32 v20, v21, v20
; SI-NEXT:    v_add_i32_e32 v21, vcc, 3, v38
; SI-NEXT:    v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT:    s_waitcnt vmcnt(6)
; SI-NEXT:    v_or_b32_e32 v21, v22, v21
; SI-NEXT:    v_add_i32_e32 v22, vcc, 3, v37
; SI-NEXT:    v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT:    s_waitcnt vmcnt(5)
; SI-NEXT:    v_or_b32_e32 v22, v23, v22
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT:    v_add_i32_e32 v9, vcc, 0x30000, v9
; SI-NEXT:    v_add_i32_e32 v10, vcc, 0x30000, v10
; SI-NEXT:    v_add_i32_e32 v11, vcc, 0x30000, v11
; SI-NEXT:    v_add_i32_e32 v12, vcc, 0x30000, v12
; SI-NEXT:    v_add_i32_e32 v13, vcc, 0x30000, v13
; SI-NEXT:    v_add_i32_e32 v14, vcc, 0x30000, v14
; SI-NEXT:    v_add_i32_e32 v15, vcc, 0x30000, v15
; SI-NEXT:    v_add_i32_e32 v16, vcc, 0x30000, v16
; SI-NEXT:    v_add_i32_e32 v17, vcc, 0x30000, v17
; SI-NEXT:    v_add_i32_e32 v18, vcc, 0x30000, v18
; SI-NEXT:    v_add_i32_e32 v19, vcc, 0x30000, v19
; SI-NEXT:    v_add_i32_e32 v20, vcc, 0x30000, v20
; SI-NEXT:    v_add_i32_e32 v21, vcc, 0x30000, v21
; SI-NEXT:    v_add_i32_e32 v22, vcc, 0x30000, v22
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_add_i32_e32 v23, vcc, 3, v23
; SI-NEXT:    v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT:    v_or_b32_e32 v23, v24, v23
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT:    v_add_i32_e32 v23, vcc, 0x30000, v23
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_add_i32_e32 v24, vcc, 3, v24
; SI-NEXT:    v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT:    v_or_b32_e32 v24, v25, v24
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT:    v_add_i32_e32 v24, vcc, 0x30000, v24
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_add_i32_e32 v25, vcc, 3, v25
; SI-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT:    v_or_b32_e32 v25, v26, v25
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT:    v_add_i32_e32 v25, vcc, 0x30000, v25
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_add_i32_e32 v26, vcc, 3, v26
; SI-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT:    v_or_b32_e32 v26, v27, v26
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT:    v_add_i32_e32 v26, vcc, 0x30000, v26
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_add_i32_e32 v27, vcc, 3, v27
; SI-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT:    v_or_b32_e32 v27, v28, v27
; SI-NEXT:    v_add_i32_e32 v27, vcc, 0x30000, v27
; SI-NEXT:  .LBB14_4: ; %end
; SI-NEXT:    s_or_b64 exec, exec, s[4:5]
; SI-NEXT:    buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v56i16_to_v28i32:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v56, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v58, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v59, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    v_mov_b32_e32 v32, v27
; VI-NEXT:    v_mov_b32_e32 v33, v26
; VI-NEXT:    v_mov_b32_e32 v34, v25
; VI-NEXT:    v_mov_b32_e32 v35, v24
; VI-NEXT:    v_mov_b32_e32 v36, v23
; VI-NEXT:    v_mov_b32_e32 v37, v22
; VI-NEXT:    v_mov_b32_e32 v38, v21
; VI-NEXT:    v_mov_b32_e32 v39, v20
; VI-NEXT:    v_mov_b32_e32 v48, v19
; VI-NEXT:    v_mov_b32_e32 v49, v18
; VI-NEXT:    v_mov_b32_e32 v50, v17
; VI-NEXT:    v_mov_b32_e32 v51, v16
; VI-NEXT:    v_mov_b32_e32 v52, v15
; VI-NEXT:    v_mov_b32_e32 v53, v14
; VI-NEXT:    v_mov_b32_e32 v54, v13
; VI-NEXT:    v_mov_b32_e32 v55, v12
; VI-NEXT:    v_mov_b32_e32 v40, v11
; VI-NEXT:    v_mov_b32_e32 v41, v10
; VI-NEXT:    v_mov_b32_e32 v42, v9
; VI-NEXT:    v_mov_b32_e32 v43, v8
; VI-NEXT:    v_mov_b32_e32 v44, v7
; VI-NEXT:    v_mov_b32_e32 v45, v6
; VI-NEXT:    v_mov_b32_e32 v46, v5
; VI-NEXT:    v_mov_b32_e32 v47, v4
; VI-NEXT:    v_mov_b32_e32 v56, v3
; VI-NEXT:    v_mov_b32_e32 v57, v2
; VI-NEXT:    v_mov_b32_e32 v58, v1
; VI-NEXT:    v_mov_b32_e32 v59, v0
; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT:    ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; VI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB14_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    v_mov_b32_e32 v27, 16
; VI-NEXT:    v_lshlrev_b32_sdwa v0, v27, v59 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v1, v27, v58 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v2, v27, v57 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v3, v27, v56 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v4, v27, v47 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v5, v27, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v6, v27, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v7, v27, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v8, v27, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v9, v27, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v10, v27, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v11, v27, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v12, v27, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v13, v27, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v14, v27, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v15, v27, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v16, v27, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v17, v27, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v18, v27, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v19, v27, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v20, v27, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v21, v27, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v22, v27, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v23, v27, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v24, v27, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v25, v27, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v26, v27, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v27, v27, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_or_b32_sdwa v0, v59, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v1, v58, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v2, v57, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v3, v56, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v4, v47, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v5, v46, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v6, v45, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v7, v44, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v8, v43, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v9, v42, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v10, v41, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v11, v40, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v12, v55, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v13, v54, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v14, v53, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v15, v52, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v16, v51, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v17, v50, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v18, v49, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v19, v48, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v20, v39, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v21, v38, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v22, v37, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v23, v36, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v24, v35, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v25, v34, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v26, v33, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v27, v32, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    ; implicit-def: $vgpr59
; VI-NEXT:    ; implicit-def: $vgpr58
; VI-NEXT:    ; implicit-def: $vgpr57
; VI-NEXT:    ; implicit-def: $vgpr56
; VI-NEXT:    ; implicit-def: $vgpr47
; VI-NEXT:    ; implicit-def: $vgpr46
; VI-NEXT:    ; implicit-def: $vgpr45
; VI-NEXT:    ; implicit-def: $vgpr44
; VI-NEXT:    ; implicit-def: $vgpr43
; VI-NEXT:    ; implicit-def: $vgpr42
; VI-NEXT:    ; implicit-def: $vgpr41
; VI-NEXT:    ; implicit-def: $vgpr40
; VI-NEXT:    ; implicit-def: $vgpr55
; VI-NEXT:    ; implicit-def: $vgpr54
; VI-NEXT:    ; implicit-def: $vgpr53
; VI-NEXT:    ; implicit-def: $vgpr52
; VI-NEXT:    ; implicit-def: $vgpr51
; VI-NEXT:    ; implicit-def: $vgpr50
; VI-NEXT:    ; implicit-def: $vgpr49
; VI-NEXT:    ; implicit-def: $vgpr48
; VI-NEXT:    ; implicit-def: $vgpr39
; VI-NEXT:    ; implicit-def: $vgpr38
; VI-NEXT:    ; implicit-def: $vgpr37
; VI-NEXT:    ; implicit-def: $vgpr36
; VI-NEXT:    ; implicit-def: $vgpr35
; VI-NEXT:    ; implicit-def: $vgpr34
; VI-NEXT:    ; implicit-def: $vgpr33
; VI-NEXT:    ; implicit-def: $vgpr32
; VI-NEXT:  .LBB14_2: ; %Flow
; VI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB14_4
; VI-NEXT:  ; %bb.3: ; %cmp.true
; VI-NEXT:    v_mov_b32_e32 v27, 3
; VI-NEXT:    v_add_u16_e32 v0, 3, v59
; VI-NEXT:    v_add_u16_sdwa v1, v59, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_u16_e32 v2, 3, v58
; VI-NEXT:    v_add_u16_sdwa v3, v58, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v0, v0, v1
; VI-NEXT:    v_or_b32_e32 v1, v2, v3
; VI-NEXT:    v_add_u16_e32 v2, 3, v57
; VI-NEXT:    v_add_u16_sdwa v3, v57, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v2, v2, v3
; VI-NEXT:    v_add_u16_e32 v3, 3, v56
; VI-NEXT:    v_add_u16_sdwa v4, v56, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v3, v3, v4
; VI-NEXT:    v_add_u16_e32 v4, 3, v47
; VI-NEXT:    v_add_u16_sdwa v5, v47, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v4, v4, v5
; VI-NEXT:    v_add_u16_e32 v5, 3, v46
; VI-NEXT:    v_add_u16_sdwa v6, v46, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v5, v5, v6
; VI-NEXT:    v_add_u16_e32 v6, 3, v45
; VI-NEXT:    v_add_u16_sdwa v7, v45, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v6, v6, v7
; VI-NEXT:    v_add_u16_e32 v7, 3, v44
; VI-NEXT:    v_add_u16_sdwa v8, v44, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v7, v7, v8
; VI-NEXT:    v_add_u16_e32 v8, 3, v43
; VI-NEXT:    v_add_u16_sdwa v9, v43, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v8, v8, v9
; VI-NEXT:    v_add_u16_e32 v9, 3, v42
; VI-NEXT:    v_add_u16_sdwa v10, v42, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v9, v9, v10
; VI-NEXT:    v_add_u16_e32 v10, 3, v41
; VI-NEXT:    v_add_u16_sdwa v11, v41, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v10, v10, v11
; VI-NEXT:    v_add_u16_e32 v11, 3, v40
; VI-NEXT:    v_add_u16_sdwa v12, v40, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v11, v11, v12
; VI-NEXT:    v_add_u16_e32 v12, 3, v55
; VI-NEXT:    v_add_u16_sdwa v13, v55, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v12, v12, v13
; VI-NEXT:    v_add_u16_e32 v13, 3, v54
; VI-NEXT:    v_add_u16_sdwa v14, v54, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v13, v13, v14
; VI-NEXT:    v_add_u16_e32 v14, 3, v53
; VI-NEXT:    v_add_u16_sdwa v15, v53, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v14, v14, v15
; VI-NEXT:    v_add_u16_e32 v15, 3, v52
; VI-NEXT:    v_add_u16_sdwa v16, v52, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v15, v15, v16
; VI-NEXT:    v_add_u16_e32 v16, 3, v51
; VI-NEXT:    v_add_u16_sdwa v17, v51, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v16, v16, v17
; VI-NEXT:    v_add_u16_e32 v17, 3, v50
; VI-NEXT:    v_add_u16_sdwa v18, v50, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v17, v17, v18
; VI-NEXT:    v_add_u16_e32 v18, 3, v49
; VI-NEXT:    v_add_u16_sdwa v19, v49, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v18, v18, v19
; VI-NEXT:    v_add_u16_e32 v19, 3, v48
; VI-NEXT:    v_add_u16_sdwa v20, v48, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v19, v19, v20
; VI-NEXT:    v_add_u16_e32 v20, 3, v39
; VI-NEXT:    v_add_u16_sdwa v21, v39, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v20, v20, v21
; VI-NEXT:    v_add_u16_e32 v21, 3, v38
; VI-NEXT:    v_add_u16_sdwa v22, v38, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v21, v21, v22
; VI-NEXT:    v_add_u16_e32 v22, 3, v37
; VI-NEXT:    v_add_u16_sdwa v23, v37, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v22, v22, v23
; VI-NEXT:    v_add_u16_e32 v23, 3, v36
; VI-NEXT:    v_add_u16_sdwa v24, v36, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v23, v23, v24
; VI-NEXT:    v_add_u16_e32 v24, 3, v35
; VI-NEXT:    v_add_u16_sdwa v25, v35, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v24, v24, v25
; VI-NEXT:    v_add_u16_e32 v25, 3, v34
; VI-NEXT:    v_add_u16_sdwa v26, v34, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v25, v25, v26
; VI-NEXT:    v_add_u16_e32 v26, 3, v33
; VI-NEXT:    v_add_u16_sdwa v28, v33, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v26, v26, v28
; VI-NEXT:    v_add_u16_e32 v28, 3, v32
; VI-NEXT:    v_add_u16_sdwa v27, v32, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v27, v28, v27
; VI-NEXT:  .LBB14_4: ; %end
; VI-NEXT:    s_or_b64 exec, exec, s[4:5]
; VI-NEXT:    buffer_load_dword v59, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v58, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v57, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v56, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v56i16_to_v28i32:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    v_mov_b32_e32 v59, v0
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v27
; GFX9-NEXT:    v_mov_b32_e32 v34, v25
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v26
; GFX9-NEXT:    v_mov_b32_e32 v35, v24
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v34
; GFX9-NEXT:    v_mov_b32_e32 v36, v23
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT:    v_mov_b32_e32 v37, v22
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT:    v_mov_b32_e32 v38, v21
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT:    v_mov_b32_e32 v39, v20
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT:    v_mov_b32_e32 v48, v19
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT:    v_mov_b32_e32 v49, v18
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT:    v_mov_b32_e32 v50, v17
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT:    v_mov_b32_e32 v51, v16
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT:    v_mov_b32_e32 v52, v15
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT:    v_mov_b32_e32 v53, v14
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT:    v_mov_b32_e32 v54, v13
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT:    v_mov_b32_e32 v55, v12
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT:    v_mov_b32_e32 v40, v11
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT:    v_mov_b32_e32 v41, v10
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT:    v_mov_b32_e32 v42, v9
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT:    v_mov_b32_e32 v43, v8
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT:    v_mov_b32_e32 v44, v7
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT:    v_mov_b32_e32 v45, v6
; GFX9-NEXT:    v_mov_b32_e32 v46, v5
; GFX9-NEXT:    v_mov_b32_e32 v47, v4
; GFX9-NEXT:    v_mov_b32_e32 v56, v3
; GFX9-NEXT:    v_mov_b32_e32 v57, v2
; GFX9-NEXT:    v_mov_b32_e32 v58, v1
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v44
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v45
; GFX9-NEXT:    v_lshrrev_b32_e32 v62, 16, v46
; GFX9-NEXT:    v_lshrrev_b32_e32 v63, 16, v47
; GFX9-NEXT:    v_lshrrev_b32_e32 v60, 16, v56
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v57
; GFX9-NEXT:    v_lshrrev_b32_e32 v61, 16, v58
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v59
; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT:    buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT:    ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB14_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT:    s_mov_b32 s6, 0x5040100
; GFX9-NEXT:    v_lshrrev_b32_e32 v6, 16, v45
; GFX9-NEXT:    v_lshrrev_b32_e32 v7, 16, v44
; GFX9-NEXT:    v_lshrrev_b32_e32 v8, 16, v43
; GFX9-NEXT:    v_lshrrev_b32_e32 v9, 16, v42
; GFX9-NEXT:    v_lshrrev_b32_e32 v10, 16, v41
; GFX9-NEXT:    v_lshrrev_b32_e32 v11, 16, v40
; GFX9-NEXT:    v_lshrrev_b32_e32 v12, 16, v55
; GFX9-NEXT:    v_lshrrev_b32_e32 v13, 16, v54
; GFX9-NEXT:    v_lshrrev_b32_e32 v14, 16, v53
; GFX9-NEXT:    v_lshrrev_b32_e32 v15, 16, v52
; GFX9-NEXT:    v_lshrrev_b32_e32 v16, 16, v51
; GFX9-NEXT:    v_lshrrev_b32_e32 v17, 16, v50
; GFX9-NEXT:    v_lshrrev_b32_e32 v18, 16, v49
; GFX9-NEXT:    v_lshrrev_b32_e32 v19, 16, v48
; GFX9-NEXT:    v_lshrrev_b32_e32 v20, 16, v39
; GFX9-NEXT:    v_lshrrev_b32_e32 v21, 16, v38
; GFX9-NEXT:    v_lshrrev_b32_e32 v22, 16, v37
; GFX9-NEXT:    v_lshrrev_b32_e32 v23, 16, v36
; GFX9-NEXT:    v_lshrrev_b32_e32 v24, 16, v35
; GFX9-NEXT:    v_lshrrev_b32_e32 v25, 16, v34
; GFX9-NEXT:    v_perm_b32 v0, v33, v59, s6
; GFX9-NEXT:    v_perm_b32 v1, v61, v58, s6
; GFX9-NEXT:    v_perm_b32 v2, v32, v57, s6
; GFX9-NEXT:    v_perm_b32 v3, v60, v56, s6
; GFX9-NEXT:    v_perm_b32 v4, v63, v47, s6
; GFX9-NEXT:    v_perm_b32 v5, v62, v46, s6
; GFX9-NEXT:    v_perm_b32 v6, v6, v45, s6
; GFX9-NEXT:    v_perm_b32 v7, v7, v44, s6
; GFX9-NEXT:    v_perm_b32 v8, v8, v43, s6
; GFX9-NEXT:    v_perm_b32 v9, v9, v42, s6
; GFX9-NEXT:    v_perm_b32 v10, v10, v41, s6
; GFX9-NEXT:    v_perm_b32 v11, v11, v40, s6
; GFX9-NEXT:    v_perm_b32 v12, v12, v55, s6
; GFX9-NEXT:    v_perm_b32 v13, v13, v54, s6
; GFX9-NEXT:    v_perm_b32 v14, v14, v53, s6
; GFX9-NEXT:    v_perm_b32 v15, v15, v52, s6
; GFX9-NEXT:    v_perm_b32 v16, v16, v51, s6
; GFX9-NEXT:    v_perm_b32 v17, v17, v50, s6
; GFX9-NEXT:    v_perm_b32 v18, v18, v49, s6
; GFX9-NEXT:    v_perm_b32 v19, v19, v48, s6
; GFX9-NEXT:    v_perm_b32 v20, v20, v39, s6
; GFX9-NEXT:    v_perm_b32 v21, v21, v38, s6
; GFX9-NEXT:    v_perm_b32 v22, v22, v37, s6
; GFX9-NEXT:    v_perm_b32 v23, v23, v36, s6
; GFX9-NEXT:    v_perm_b32 v24, v24, v35, s6
; GFX9-NEXT:    v_perm_b32 v25, v25, v34, s6
; GFX9-NEXT:    ; implicit-def: $vgpr59
; GFX9-NEXT:    ; implicit-def: $vgpr58
; GFX9-NEXT:    ; implicit-def: $vgpr57
; GFX9-NEXT:    ; implicit-def: $vgpr56
; GFX9-NEXT:    ; implicit-def: $vgpr47
; GFX9-NEXT:    ; implicit-def: $vgpr46
; GFX9-NEXT:    ; implicit-def: $vgpr45
; GFX9-NEXT:    ; implicit-def: $vgpr44
; GFX9-NEXT:    ; implicit-def: $vgpr43
; GFX9-NEXT:    ; implicit-def: $vgpr42
; GFX9-NEXT:    ; implicit-def: $vgpr41
; GFX9-NEXT:    ; implicit-def: $vgpr40
; GFX9-NEXT:    ; implicit-def: $vgpr55
; GFX9-NEXT:    ; implicit-def: $vgpr54
; GFX9-NEXT:    ; implicit-def: $vgpr53
; GFX9-NEXT:    ; implicit-def: $vgpr52
; GFX9-NEXT:    ; implicit-def: $vgpr51
; GFX9-NEXT:    ; implicit-def: $vgpr50
; GFX9-NEXT:    ; implicit-def: $vgpr49
; GFX9-NEXT:    ; implicit-def: $vgpr48
; GFX9-NEXT:    ; implicit-def: $vgpr39
; GFX9-NEXT:    ; implicit-def: $vgpr38
; GFX9-NEXT:    ; implicit-def: $vgpr37
; GFX9-NEXT:    ; implicit-def: $vgpr36
; GFX9-NEXT:    ; implicit-def: $vgpr35
; GFX9-NEXT:    ; implicit-def: $vgpr34
; GFX9-NEXT:    ; implicit-def: $vgpr62
; GFX9-NEXT:    ; implicit-def: $vgpr63
; GFX9-NEXT:    ; implicit-def: $vgpr60
; GFX9-NEXT:    ; implicit-def: $vgpr32
; GFX9-NEXT:    ; implicit-def: $vgpr61
; GFX9-NEXT:    ; implicit-def: $vgpr33
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:  .LBB14_2: ; %Flow
; GFX9-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB14_4
; GFX9-NEXT:  ; %bb.3: ; %cmp.true
; GFX9-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT:    s_mov_b32 s6, 0x5040100
; GFX9-NEXT:    buffer_load_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v7, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v8, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v14, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v19, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT:    v_perm_b32 v0, v33, v59, s6
; GFX9-NEXT:    v_perm_b32 v1, v61, v58, s6
; GFX9-NEXT:    v_perm_b32 v2, v32, v57, s6
; GFX9-NEXT:    v_perm_b32 v3, v60, v56, s6
; GFX9-NEXT:    v_perm_b32 v4, v63, v47, s6
; GFX9-NEXT:    v_perm_b32 v5, v62, v46, s6
; GFX9-NEXT:    v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_waitcnt vmcnt(20)
; GFX9-NEXT:    v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT:    s_waitcnt vmcnt(21)
; GFX9-NEXT:    v_perm_b32 v6, v6, v45, s6
; GFX9-NEXT:    s_waitcnt vmcnt(20)
; GFX9-NEXT:    v_perm_b32 v7, v7, v44, s6
; GFX9-NEXT:    s_waitcnt vmcnt(19)
; GFX9-NEXT:    v_perm_b32 v8, v8, v43, s6
; GFX9-NEXT:    s_waitcnt vmcnt(18)
; GFX9-NEXT:    v_perm_b32 v9, v9, v42, s6
; GFX9-NEXT:    s_waitcnt vmcnt(17)
; GFX9-NEXT:    v_perm_b32 v10, v10, v41, s6
; GFX9-NEXT:    s_waitcnt vmcnt(16)
; GFX9-NEXT:    v_perm_b32 v11, v11, v40, s6
; GFX9-NEXT:    s_waitcnt vmcnt(15)
; GFX9-NEXT:    v_perm_b32 v12, v12, v55, s6
; GFX9-NEXT:    s_waitcnt vmcnt(14)
; GFX9-NEXT:    v_perm_b32 v13, v13, v54, s6
; GFX9-NEXT:    s_waitcnt vmcnt(13)
; GFX9-NEXT:    v_perm_b32 v14, v14, v53, s6
; GFX9-NEXT:    s_waitcnt vmcnt(12)
; GFX9-NEXT:    v_perm_b32 v15, v15, v52, s6
; GFX9-NEXT:    s_waitcnt vmcnt(11)
; GFX9-NEXT:    v_perm_b32 v16, v16, v51, s6
; GFX9-NEXT:    s_waitcnt vmcnt(10)
; GFX9-NEXT:    v_perm_b32 v17, v17, v50, s6
; GFX9-NEXT:    s_waitcnt vmcnt(9)
; GFX9-NEXT:    v_perm_b32 v18, v18, v49, s6
; GFX9-NEXT:    s_waitcnt vmcnt(8)
; GFX9-NEXT:    v_perm_b32 v19, v19, v48, s6
; GFX9-NEXT:    s_waitcnt vmcnt(7)
; GFX9-NEXT:    v_perm_b32 v20, v20, v39, s6
; GFX9-NEXT:    s_waitcnt vmcnt(6)
; GFX9-NEXT:    v_perm_b32 v21, v21, v38, s6
; GFX9-NEXT:    s_waitcnt vmcnt(5)
; GFX9-NEXT:    v_perm_b32 v22, v22, v37, s6
; GFX9-NEXT:    s_waitcnt vmcnt(4)
; GFX9-NEXT:    v_perm_b32 v23, v23, v36, s6
; GFX9-NEXT:    s_waitcnt vmcnt(3)
; GFX9-NEXT:    v_perm_b32 v24, v24, v35, s6
; GFX9-NEXT:    s_waitcnt vmcnt(2)
; GFX9-NEXT:    v_perm_b32 v25, v25, v34, s6
; GFX9-NEXT:    v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT:    v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
; GFX9-NEXT:  .LBB14_4: ; %end
; GFX9-NEXT:    s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT:    buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-TRUE16-LABEL: bitcast_v56i16_to_v28i32:
; GFX11-TRUE16:       ; %bb.0:
; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-TRUE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT:    s_cbranch_execz .LBB14_2
; GFX11-TRUE16-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:  .LBB14_2: ; %end
; GFX11-TRUE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v56i16_to_v28i32:
; GFX11-FAKE16:       ; %bb.0:
; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v0
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v2
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v80, 16, v3
; GFX11-FAKE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v28
; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v69, v0, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v1, v70, v1, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v2, v71, v2, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v3, v80, v3, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v4, v68, v4, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v5, v67, v5, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v6, v66, v6, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v7, v65, v7, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v8, v64, v8, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v9, v55, v9, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v10, v54, v10, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v11, v53, v11, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v12, v52, v12, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v13, v51, v13, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v14, v50, v14, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v15, v49, v15, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v16, v48, v16, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v17, v39, v17, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v18, v38, v18, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v19, v37, v19, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v20, v36, v20, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v21, v35, v21, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v22, v34, v22, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v23, v33, v23, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v24, v32, v24, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v25, v31, v25, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v26, v30, v26, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v27, v29, v27, 0x5040100
; GFX11-FAKE16-NEXT:    s_and_saveexec_b32 s0, vcc_lo
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-FAKE16-NEXT:    s_cbranch_execz .LBB14_2
; GFX11-FAKE16-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:  .LBB14_2: ; %end
; GFX11-FAKE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = add <56 x i16> %a, splat (i16 3)
  %a2 = bitcast <56 x i16> %a1 to <28 x i32>
  br label %end

cmp.false:
  %a3 = bitcast <56 x i16> %a to <28 x i32>
  br label %end

end:
  %phi = phi <28 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <28 x i32> %phi
}

define inreg <28 x i32> @bitcast_v56i16_to_v28i32_scalar(<56 x i16> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v56i16_to_v28i32_scalar:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    v_readfirstlane_b32 s41, v13
; SI-NEXT:    v_readfirstlane_b32 s43, v12
; SI-NEXT:    v_readfirstlane_b32 s45, v11
; SI-NEXT:    v_readfirstlane_b32 s47, v10
; SI-NEXT:    v_readfirstlane_b32 s57, v9
; SI-NEXT:    v_readfirstlane_b32 s59, v8
; SI-NEXT:    v_readfirstlane_b32 s61, v7
; SI-NEXT:    v_readfirstlane_b32 s63, v6
; SI-NEXT:    v_readfirstlane_b32 s73, v5
; SI-NEXT:    v_readfirstlane_b32 s75, v4
; SI-NEXT:    v_readfirstlane_b32 s78, v3
; SI-NEXT:    v_readfirstlane_b32 s89, v2
; SI-NEXT:    v_readfirstlane_b32 s91, v1
; SI-NEXT:    v_readfirstlane_b32 s93, v0
; SI-NEXT:    s_lshr_b32 s76, s29, 16
; SI-NEXT:    s_lshr_b32 s79, s28, 16
; SI-NEXT:    s_lshr_b32 s15, s27, 16
; SI-NEXT:    s_lshr_b32 s14, s26, 16
; SI-NEXT:    s_lshr_b32 s13, s25, 16
; SI-NEXT:    s_lshr_b32 s12, s24, 16
; SI-NEXT:    s_lshr_b32 s11, s23, 16
; SI-NEXT:    s_lshr_b32 s10, s22, 16
; SI-NEXT:    s_lshr_b32 s9, s21, 16
; SI-NEXT:    s_lshr_b32 s8, s20, 16
; SI-NEXT:    s_lshr_b32 s7, s19, 16
; SI-NEXT:    s_lshr_b32 s6, s18, 16
; SI-NEXT:    s_lshr_b32 s5, s17, 16
; SI-NEXT:    s_lshr_b32 s4, s16, 16
; SI-NEXT:    s_lshr_b32 s40, s41, 16
; SI-NEXT:    s_lshr_b32 s42, s43, 16
; SI-NEXT:    s_lshr_b32 s44, s45, 16
; SI-NEXT:    s_lshr_b32 s46, s47, 16
; SI-NEXT:    s_lshr_b32 s56, s57, 16
; SI-NEXT:    s_lshr_b32 s58, s59, 16
; SI-NEXT:    s_lshr_b32 s60, s61, 16
; SI-NEXT:    s_lshr_b32 s62, s63, 16
; SI-NEXT:    s_lshr_b32 s72, s73, 16
; SI-NEXT:    s_lshr_b32 s74, s75, 16
; SI-NEXT:    s_lshr_b32 s77, s78, 16
; SI-NEXT:    s_lshr_b32 s88, s89, 16
; SI-NEXT:    s_lshr_b32 s90, s91, 16
; SI-NEXT:    s_lshr_b32 s92, s93, 16
; SI-NEXT:    v_readfirstlane_b32 s94, v14
; SI-NEXT:    s_cmp_lg_u32 s94, 0
; SI-NEXT:    s_cbranch_scc0 .LBB15_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    s_and_b32 s16, s16, 0xffff
; SI-NEXT:    s_lshl_b32 s4, s4, 16
; SI-NEXT:    s_or_b32 s4, s16, s4
; SI-NEXT:    s_and_b32 s16, s17, 0xffff
; SI-NEXT:    s_lshl_b32 s5, s5, 16
; SI-NEXT:    s_or_b32 s5, s16, s5
; SI-NEXT:    s_and_b32 s16, s18, 0xffff
; SI-NEXT:    s_lshl_b32 s6, s6, 16
; SI-NEXT:    s_or_b32 s6, s16, s6
; SI-NEXT:    s_and_b32 s16, s19, 0xffff
; SI-NEXT:    s_lshl_b32 s7, s7, 16
; SI-NEXT:    s_or_b32 s7, s16, s7
; SI-NEXT:    s_and_b32 s16, s20, 0xffff
; SI-NEXT:    s_lshl_b32 s8, s8, 16
; SI-NEXT:    s_or_b32 s8, s16, s8
; SI-NEXT:    s_and_b32 s16, s21, 0xffff
; SI-NEXT:    s_lshl_b32 s9, s9, 16
; SI-NEXT:    s_or_b32 s9, s16, s9
; SI-NEXT:    s_and_b32 s16, s22, 0xffff
; SI-NEXT:    s_lshl_b32 s10, s10, 16
; SI-NEXT:    s_or_b32 s10, s16, s10
; SI-NEXT:    s_and_b32 s16, s23, 0xffff
; SI-NEXT:    s_lshl_b32 s11, s11, 16
; SI-NEXT:    s_or_b32 s11, s16, s11
; SI-NEXT:    s_and_b32 s16, s24, 0xffff
; SI-NEXT:    s_lshl_b32 s12, s12, 16
; SI-NEXT:    s_or_b32 s12, s16, s12
; SI-NEXT:    s_and_b32 s16, s25, 0xffff
; SI-NEXT:    s_lshl_b32 s13, s13, 16
; SI-NEXT:    s_or_b32 s13, s16, s13
; SI-NEXT:    s_and_b32 s16, s26, 0xffff
; SI-NEXT:    s_lshl_b32 s14, s14, 16
; SI-NEXT:    s_or_b32 s14, s16, s14
; SI-NEXT:    s_and_b32 s16, s27, 0xffff
; SI-NEXT:    s_lshl_b32 s15, s15, 16
; SI-NEXT:    s_or_b32 s15, s16, s15
; SI-NEXT:    s_and_b32 s16, s28, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s79, 16
; SI-NEXT:    s_or_b32 s16, s16, s17
; SI-NEXT:    s_and_b32 s17, s29, 0xffff
; SI-NEXT:    s_lshl_b32 s18, s76, 16
; SI-NEXT:    s_or_b32 s17, s17, s18
; SI-NEXT:    s_and_b32 s18, s93, 0xffff
; SI-NEXT:    s_lshl_b32 s19, s92, 16
; SI-NEXT:    s_or_b32 s18, s18, s19
; SI-NEXT:    s_and_b32 s19, s91, 0xffff
; SI-NEXT:    s_lshl_b32 s20, s90, 16
; SI-NEXT:    s_or_b32 s19, s19, s20
; SI-NEXT:    s_and_b32 s20, s89, 0xffff
; SI-NEXT:    s_lshl_b32 s21, s88, 16
; SI-NEXT:    s_or_b32 s20, s20, s21
; SI-NEXT:    s_and_b32 s21, s78, 0xffff
; SI-NEXT:    s_lshl_b32 s22, s77, 16
; SI-NEXT:    s_or_b32 s21, s21, s22
; SI-NEXT:    s_and_b32 s22, s75, 0xffff
; SI-NEXT:    s_lshl_b32 s23, s74, 16
; SI-NEXT:    s_or_b32 s22, s22, s23
; SI-NEXT:    s_and_b32 s23, s73, 0xffff
; SI-NEXT:    s_lshl_b32 s24, s72, 16
; SI-NEXT:    s_or_b32 s23, s23, s24
; SI-NEXT:    s_and_b32 s24, s63, 0xffff
; SI-NEXT:    s_lshl_b32 s25, s62, 16
; SI-NEXT:    s_or_b32 s24, s24, s25
; SI-NEXT:    s_and_b32 s25, s61, 0xffff
; SI-NEXT:    s_lshl_b32 s26, s60, 16
; SI-NEXT:    s_or_b32 s25, s25, s26
; SI-NEXT:    s_and_b32 s26, s59, 0xffff
; SI-NEXT:    s_lshl_b32 s27, s58, 16
; SI-NEXT:    s_or_b32 s26, s26, s27
; SI-NEXT:    s_and_b32 s27, s57, 0xffff
; SI-NEXT:    s_lshl_b32 s28, s56, 16
; SI-NEXT:    s_or_b32 s27, s27, s28
; SI-NEXT:    s_and_b32 s28, s47, 0xffff
; SI-NEXT:    s_lshl_b32 s29, s46, 16
; SI-NEXT:    s_or_b32 s28, s28, s29
; SI-NEXT:    s_and_b32 s29, s45, 0xffff
; SI-NEXT:    s_lshl_b32 s44, s44, 16
; SI-NEXT:    s_and_b32 s43, s43, 0xffff
; SI-NEXT:    s_lshl_b32 s42, s42, 16
; SI-NEXT:    s_and_b32 s41, s41, 0xffff
; SI-NEXT:    s_lshl_b32 s40, s40, 16
; SI-NEXT:    s_or_b32 s29, s29, s44
; SI-NEXT:    s_or_b32 s42, s43, s42
; SI-NEXT:    s_or_b32 s40, s41, s40
; SI-NEXT:    s_branch .LBB15_3
; SI-NEXT:  .LBB15_2: ; %cmp.true
; SI-NEXT:    s_add_i32 s16, s16, 3
; SI-NEXT:    s_and_b32 s16, s16, 0xffff
; SI-NEXT:    s_lshl_b32 s4, s4, 16
; SI-NEXT:    s_add_i32 s17, s17, 3
; SI-NEXT:    s_or_b32 s4, s4, s16
; SI-NEXT:    s_and_b32 s16, s17, 0xffff
; SI-NEXT:    s_lshl_b32 s5, s5, 16
; SI-NEXT:    s_add_i32 s18, s18, 3
; SI-NEXT:    s_or_b32 s5, s5, s16
; SI-NEXT:    s_and_b32 s16, s18, 0xffff
; SI-NEXT:    s_lshl_b32 s6, s6, 16
; SI-NEXT:    s_add_i32 s19, s19, 3
; SI-NEXT:    s_or_b32 s6, s6, s16
; SI-NEXT:    s_and_b32 s16, s19, 0xffff
; SI-NEXT:    s_lshl_b32 s7, s7, 16
; SI-NEXT:    s_add_i32 s20, s20, 3
; SI-NEXT:    s_or_b32 s7, s7, s16
; SI-NEXT:    s_and_b32 s16, s20, 0xffff
; SI-NEXT:    s_lshl_b32 s8, s8, 16
; SI-NEXT:    s_add_i32 s21, s21, 3
; SI-NEXT:    s_or_b32 s8, s8, s16
; SI-NEXT:    s_and_b32 s16, s21, 0xffff
; SI-NEXT:    s_lshl_b32 s9, s9, 16
; SI-NEXT:    s_add_i32 s22, s22, 3
; SI-NEXT:    s_or_b32 s9, s9, s16
; SI-NEXT:    s_and_b32 s16, s22, 0xffff
; SI-NEXT:    s_lshl_b32 s10, s10, 16
; SI-NEXT:    s_add_i32 s23, s23, 3
; SI-NEXT:    s_or_b32 s10, s10, s16
; SI-NEXT:    s_and_b32 s16, s23, 0xffff
; SI-NEXT:    s_lshl_b32 s11, s11, 16
; SI-NEXT:    s_add_i32 s24, s24, 3
; SI-NEXT:    s_or_b32 s11, s11, s16
; SI-NEXT:    s_and_b32 s16, s24, 0xffff
; SI-NEXT:    s_lshl_b32 s12, s12, 16
; SI-NEXT:    s_add_i32 s25, s25, 3
; SI-NEXT:    s_or_b32 s12, s12, s16
; SI-NEXT:    s_and_b32 s16, s25, 0xffff
; SI-NEXT:    s_lshl_b32 s13, s13, 16
; SI-NEXT:    s_add_i32 s26, s26, 3
; SI-NEXT:    s_or_b32 s13, s13, s16
; SI-NEXT:    s_and_b32 s16, s26, 0xffff
; SI-NEXT:    s_lshl_b32 s14, s14, 16
; SI-NEXT:    s_add_i32 s27, s27, 3
; SI-NEXT:    s_or_b32 s14, s14, s16
; SI-NEXT:    s_and_b32 s16, s27, 0xffff
; SI-NEXT:    s_lshl_b32 s15, s15, 16
; SI-NEXT:    s_add_i32 s28, s28, 3
; SI-NEXT:    s_or_b32 s15, s15, s16
; SI-NEXT:    s_and_b32 s16, s28, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s79, 16
; SI-NEXT:    s_add_i32 s29, s29, 3
; SI-NEXT:    s_or_b32 s16, s17, s16
; SI-NEXT:    s_and_b32 s17, s29, 0xffff
; SI-NEXT:    s_lshl_b32 s18, s76, 16
; SI-NEXT:    s_add_i32 s93, s93, 3
; SI-NEXT:    s_or_b32 s17, s18, s17
; SI-NEXT:    s_and_b32 s18, s93, 0xffff
; SI-NEXT:    s_lshl_b32 s19, s92, 16
; SI-NEXT:    s_add_i32 s91, s91, 3
; SI-NEXT:    s_or_b32 s18, s19, s18
; SI-NEXT:    s_and_b32 s19, s91, 0xffff
; SI-NEXT:    s_lshl_b32 s20, s90, 16
; SI-NEXT:    s_add_i32 s89, s89, 3
; SI-NEXT:    s_or_b32 s19, s20, s19
; SI-NEXT:    s_and_b32 s20, s89, 0xffff
; SI-NEXT:    s_lshl_b32 s21, s88, 16
; SI-NEXT:    s_add_i32 s78, s78, 3
; SI-NEXT:    s_or_b32 s20, s21, s20
; SI-NEXT:    s_and_b32 s21, s78, 0xffff
; SI-NEXT:    s_lshl_b32 s22, s77, 16
; SI-NEXT:    s_add_i32 s75, s75, 3
; SI-NEXT:    s_or_b32 s21, s22, s21
; SI-NEXT:    s_and_b32 s22, s75, 0xffff
; SI-NEXT:    s_lshl_b32 s23, s74, 16
; SI-NEXT:    s_add_i32 s73, s73, 3
; SI-NEXT:    s_or_b32 s22, s23, s22
; SI-NEXT:    s_and_b32 s23, s73, 0xffff
; SI-NEXT:    s_lshl_b32 s24, s72, 16
; SI-NEXT:    s_add_i32 s63, s63, 3
; SI-NEXT:    s_or_b32 s23, s24, s23
; SI-NEXT:    s_and_b32 s24, s63, 0xffff
; SI-NEXT:    s_lshl_b32 s25, s62, 16
; SI-NEXT:    s_add_i32 s61, s61, 3
; SI-NEXT:    s_or_b32 s24, s25, s24
; SI-NEXT:    s_and_b32 s25, s61, 0xffff
; SI-NEXT:    s_lshl_b32 s26, s60, 16
; SI-NEXT:    s_add_i32 s59, s59, 3
; SI-NEXT:    s_or_b32 s25, s26, s25
; SI-NEXT:    s_and_b32 s26, s59, 0xffff
; SI-NEXT:    s_lshl_b32 s27, s58, 16
; SI-NEXT:    s_add_i32 s57, s57, 3
; SI-NEXT:    s_or_b32 s26, s27, s26
; SI-NEXT:    s_and_b32 s27, s57, 0xffff
; SI-NEXT:    s_lshl_b32 s28, s56, 16
; SI-NEXT:    s_add_i32 s47, s47, 3
; SI-NEXT:    s_or_b32 s27, s28, s27
; SI-NEXT:    s_and_b32 s28, s47, 0xffff
; SI-NEXT:    s_lshl_b32 s29, s46, 16
; SI-NEXT:    s_add_i32 s45, s45, 3
; SI-NEXT:    s_add_i32 s43, s43, 3
; SI-NEXT:    s_add_i32 s41, s41, 3
; SI-NEXT:    s_or_b32 s28, s29, s28
; SI-NEXT:    s_and_b32 s29, s45, 0xffff
; SI-NEXT:    s_lshl_b32 s44, s44, 16
; SI-NEXT:    s_and_b32 s43, s43, 0xffff
; SI-NEXT:    s_lshl_b32 s42, s42, 16
; SI-NEXT:    s_and_b32 s41, s41, 0xffff
; SI-NEXT:    s_lshl_b32 s40, s40, 16
; SI-NEXT:    s_or_b32 s29, s44, s29
; SI-NEXT:    s_or_b32 s42, s42, s43
; SI-NEXT:    s_or_b32 s40, s40, s41
; SI-NEXT:    s_add_i32 s4, s4, 0x30000
; SI-NEXT:    s_add_i32 s5, s5, 0x30000
; SI-NEXT:    s_add_i32 s6, s6, 0x30000
; SI-NEXT:    s_add_i32 s7, s7, 0x30000
; SI-NEXT:    s_add_i32 s8, s8, 0x30000
; SI-NEXT:    s_add_i32 s9, s9, 0x30000
; SI-NEXT:    s_add_i32 s10, s10, 0x30000
; SI-NEXT:    s_add_i32 s11, s11, 0x30000
; SI-NEXT:    s_add_i32 s12, s12, 0x30000
; SI-NEXT:    s_add_i32 s13, s13, 0x30000
; SI-NEXT:    s_add_i32 s14, s14, 0x30000
; SI-NEXT:    s_add_i32 s15, s15, 0x30000
; SI-NEXT:    s_add_i32 s16, s16, 0x30000
; SI-NEXT:    s_add_i32 s17, s17, 0x30000
; SI-NEXT:    s_add_i32 s18, s18, 0x30000
; SI-NEXT:    s_add_i32 s19, s19, 0x30000
; SI-NEXT:    s_add_i32 s20, s20, 0x30000
; SI-NEXT:    s_add_i32 s21, s21, 0x30000
; SI-NEXT:    s_add_i32 s22, s22, 0x30000
; SI-NEXT:    s_add_i32 s23, s23, 0x30000
; SI-NEXT:    s_add_i32 s24, s24, 0x30000
; SI-NEXT:    s_add_i32 s25, s25, 0x30000
; SI-NEXT:    s_add_i32 s26, s26, 0x30000
; SI-NEXT:    s_add_i32 s27, s27, 0x30000
; SI-NEXT:    s_add_i32 s28, s28, 0x30000
; SI-NEXT:    s_add_i32 s29, s29, 0x30000
; SI-NEXT:    s_add_i32 s42, s42, 0x30000
; SI-NEXT:    s_add_i32 s40, s40, 0x30000
; SI-NEXT:  .LBB15_3: ; %end
; SI-NEXT:    v_mov_b32_e32 v0, s4
; SI-NEXT:    v_mov_b32_e32 v1, s5
; SI-NEXT:    v_mov_b32_e32 v2, s6
; SI-NEXT:    v_mov_b32_e32 v3, s7
; SI-NEXT:    v_mov_b32_e32 v4, s8
; SI-NEXT:    v_mov_b32_e32 v5, s9
; SI-NEXT:    v_mov_b32_e32 v6, s10
; SI-NEXT:    v_mov_b32_e32 v7, s11
; SI-NEXT:    v_mov_b32_e32 v8, s12
; SI-NEXT:    v_mov_b32_e32 v9, s13
; SI-NEXT:    v_mov_b32_e32 v10, s14
; SI-NEXT:    v_mov_b32_e32 v11, s15
; SI-NEXT:    v_mov_b32_e32 v12, s16
; SI-NEXT:    v_mov_b32_e32 v13, s17
; SI-NEXT:    v_mov_b32_e32 v14, s18
; SI-NEXT:    v_mov_b32_e32 v15, s19
; SI-NEXT:    v_mov_b32_e32 v16, s20
; SI-NEXT:    v_mov_b32_e32 v17, s21
; SI-NEXT:    v_mov_b32_e32 v18, s22
; SI-NEXT:    v_mov_b32_e32 v19, s23
; SI-NEXT:    v_mov_b32_e32 v20, s24
; SI-NEXT:    v_mov_b32_e32 v21, s25
; SI-NEXT:    v_mov_b32_e32 v22, s26
; SI-NEXT:    v_mov_b32_e32 v23, s27
; SI-NEXT:    v_mov_b32_e32 v24, s28
; SI-NEXT:    v_mov_b32_e32 v25, s29
; SI-NEXT:    v_mov_b32_e32 v26, s42
; SI-NEXT:    v_mov_b32_e32 v27, s40
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v56i16_to_v28i32_scalar:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_store_dword v28, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    v_writelane_b32 v28, s30, 0
; VI-NEXT:    v_writelane_b32 v28, s31, 1
; VI-NEXT:    v_readfirstlane_b32 s41, v13
; VI-NEXT:    v_readfirstlane_b32 s43, v12
; VI-NEXT:    v_readfirstlane_b32 s45, v11
; VI-NEXT:    v_readfirstlane_b32 s47, v10
; VI-NEXT:    v_readfirstlane_b32 s57, v9
; VI-NEXT:    v_readfirstlane_b32 s59, v8
; VI-NEXT:    v_readfirstlane_b32 s61, v7
; VI-NEXT:    v_readfirstlane_b32 s63, v6
; VI-NEXT:    v_readfirstlane_b32 s73, v5
; VI-NEXT:    v_readfirstlane_b32 s75, v4
; VI-NEXT:    v_readfirstlane_b32 s78, v3
; VI-NEXT:    v_readfirstlane_b32 s89, v2
; VI-NEXT:    v_readfirstlane_b32 s91, v1
; VI-NEXT:    v_readfirstlane_b32 vcc_hi, v0
; VI-NEXT:    s_lshr_b32 s76, s29, 16
; VI-NEXT:    s_lshr_b32 s79, s28, 16
; VI-NEXT:    s_lshr_b32 s15, s27, 16
; VI-NEXT:    s_lshr_b32 s14, s26, 16
; VI-NEXT:    s_lshr_b32 s13, s25, 16
; VI-NEXT:    s_lshr_b32 s12, s24, 16
; VI-NEXT:    s_lshr_b32 s11, s23, 16
; VI-NEXT:    s_lshr_b32 s10, s22, 16
; VI-NEXT:    s_lshr_b32 s9, s21, 16
; VI-NEXT:    s_lshr_b32 s8, s20, 16
; VI-NEXT:    s_lshr_b32 s7, s19, 16
; VI-NEXT:    s_lshr_b32 s6, s18, 16
; VI-NEXT:    s_lshr_b32 s5, s17, 16
; VI-NEXT:    s_lshr_b32 s4, s16, 16
; VI-NEXT:    s_lshr_b32 s40, s41, 16
; VI-NEXT:    s_lshr_b32 s42, s43, 16
; VI-NEXT:    s_lshr_b32 s44, s45, 16
; VI-NEXT:    s_lshr_b32 s46, s47, 16
; VI-NEXT:    s_lshr_b32 s56, s57, 16
; VI-NEXT:    s_lshr_b32 s58, s59, 16
; VI-NEXT:    s_lshr_b32 s60, s61, 16
; VI-NEXT:    s_lshr_b32 s62, s63, 16
; VI-NEXT:    s_lshr_b32 s72, s73, 16
; VI-NEXT:    s_lshr_b32 s74, s75, 16
; VI-NEXT:    s_lshr_b32 s77, s78, 16
; VI-NEXT:    s_lshr_b32 s88, s89, 16
; VI-NEXT:    s_lshr_b32 s90, s91, 16
; VI-NEXT:    s_lshr_b32 vcc_lo, vcc_hi, 16
; VI-NEXT:    v_readfirstlane_b32 s30, v14
; VI-NEXT:    s_cmp_lg_u32 s30, 0
; VI-NEXT:    s_cbranch_scc0 .LBB15_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    s_and_b32 s16, 0xffff, s16
; VI-NEXT:    s_lshl_b32 s4, s4, 16
; VI-NEXT:    s_or_b32 s4, s16, s4
; VI-NEXT:    s_and_b32 s16, 0xffff, s17
; VI-NEXT:    s_lshl_b32 s5, s5, 16
; VI-NEXT:    s_or_b32 s5, s16, s5
; VI-NEXT:    s_and_b32 s16, 0xffff, s18
; VI-NEXT:    s_lshl_b32 s6, s6, 16
; VI-NEXT:    s_or_b32 s6, s16, s6
; VI-NEXT:    s_and_b32 s16, 0xffff, s19
; VI-NEXT:    s_lshl_b32 s7, s7, 16
; VI-NEXT:    s_or_b32 s7, s16, s7
; VI-NEXT:    s_and_b32 s16, 0xffff, s20
; VI-NEXT:    s_lshl_b32 s8, s8, 16
; VI-NEXT:    s_or_b32 s8, s16, s8
; VI-NEXT:    s_and_b32 s16, 0xffff, s21
; VI-NEXT:    s_lshl_b32 s9, s9, 16
; VI-NEXT:    s_or_b32 s9, s16, s9
; VI-NEXT:    s_and_b32 s16, 0xffff, s22
; VI-NEXT:    s_lshl_b32 s10, s10, 16
; VI-NEXT:    s_or_b32 s10, s16, s10
; VI-NEXT:    s_and_b32 s16, 0xffff, s23
; VI-NEXT:    s_lshl_b32 s11, s11, 16
; VI-NEXT:    s_or_b32 s11, s16, s11
; VI-NEXT:    s_and_b32 s16, 0xffff, s24
; VI-NEXT:    s_lshl_b32 s12, s12, 16
; VI-NEXT:    s_or_b32 s12, s16, s12
; VI-NEXT:    s_and_b32 s16, 0xffff, s25
; VI-NEXT:    s_lshl_b32 s13, s13, 16
; VI-NEXT:    s_or_b32 s13, s16, s13
; VI-NEXT:    s_and_b32 s16, 0xffff, s26
; VI-NEXT:    s_lshl_b32 s14, s14, 16
; VI-NEXT:    s_or_b32 s14, s16, s14
; VI-NEXT:    s_and_b32 s16, 0xffff, s27
; VI-NEXT:    s_lshl_b32 s15, s15, 16
; VI-NEXT:    s_or_b32 s15, s16, s15
; VI-NEXT:    s_and_b32 s16, 0xffff, s28
; VI-NEXT:    s_lshl_b32 s17, s79, 16
; VI-NEXT:    s_or_b32 s16, s16, s17
; VI-NEXT:    s_and_b32 s17, 0xffff, s29
; VI-NEXT:    s_lshl_b32 s18, s76, 16
; VI-NEXT:    s_or_b32 s17, s17, s18
; VI-NEXT:    s_and_b32 s18, 0xffff, vcc_hi
; VI-NEXT:    s_lshl_b32 s19, vcc_lo, 16
; VI-NEXT:    s_or_b32 s18, s18, s19
; VI-NEXT:    s_and_b32 s19, 0xffff, s91
; VI-NEXT:    s_lshl_b32 s20, s90, 16
; VI-NEXT:    s_or_b32 s19, s19, s20
; VI-NEXT:    s_and_b32 s20, 0xffff, s89
; VI-NEXT:    s_lshl_b32 s21, s88, 16
; VI-NEXT:    s_or_b32 s20, s20, s21
; VI-NEXT:    s_and_b32 s21, 0xffff, s78
; VI-NEXT:    s_lshl_b32 s22, s77, 16
; VI-NEXT:    s_or_b32 s21, s21, s22
; VI-NEXT:    s_and_b32 s22, 0xffff, s75
; VI-NEXT:    s_lshl_b32 s23, s74, 16
; VI-NEXT:    s_or_b32 s22, s22, s23
; VI-NEXT:    s_and_b32 s23, 0xffff, s73
; VI-NEXT:    s_lshl_b32 s24, s72, 16
; VI-NEXT:    s_or_b32 s23, s23, s24
; VI-NEXT:    s_and_b32 s24, 0xffff, s63
; VI-NEXT:    s_lshl_b32 s25, s62, 16
; VI-NEXT:    s_or_b32 s24, s24, s25
; VI-NEXT:    s_and_b32 s25, 0xffff, s61
; VI-NEXT:    s_lshl_b32 s26, s60, 16
; VI-NEXT:    s_or_b32 s25, s25, s26
; VI-NEXT:    s_and_b32 s26, 0xffff, s59
; VI-NEXT:    s_lshl_b32 s27, s58, 16
; VI-NEXT:    s_or_b32 s26, s26, s27
; VI-NEXT:    s_and_b32 s27, 0xffff, s57
; VI-NEXT:    s_lshl_b32 s28, s56, 16
; VI-NEXT:    s_or_b32 s27, s27, s28
; VI-NEXT:    s_and_b32 s28, 0xffff, s47
; VI-NEXT:    s_lshl_b32 s29, s46, 16
; VI-NEXT:    s_or_b32 s28, s28, s29
; VI-NEXT:    s_and_b32 s29, 0xffff, s45
; VI-NEXT:    s_lshl_b32 s44, s44, 16
; VI-NEXT:    s_and_b32 s43, 0xffff, s43
; VI-NEXT:    s_lshl_b32 s42, s42, 16
; VI-NEXT:    s_and_b32 s41, 0xffff, s41
; VI-NEXT:    s_lshl_b32 s40, s40, 16
; VI-NEXT:    s_or_b32 s29, s29, s44
; VI-NEXT:    s_or_b32 s42, s43, s42
; VI-NEXT:    s_or_b32 s40, s41, s40
; VI-NEXT:    s_branch .LBB15_3
; VI-NEXT:  .LBB15_2: ; %cmp.true
; VI-NEXT:    s_add_i32 s16, s16, 3
; VI-NEXT:    s_and_b32 s16, s16, 0xffff
; VI-NEXT:    s_lshl_b32 s4, s4, 16
; VI-NEXT:    s_add_i32 s17, s17, 3
; VI-NEXT:    s_or_b32 s4, s4, s16
; VI-NEXT:    s_and_b32 s16, s17, 0xffff
; VI-NEXT:    s_lshl_b32 s5, s5, 16
; VI-NEXT:    s_add_i32 s18, s18, 3
; VI-NEXT:    s_or_b32 s5, s5, s16
; VI-NEXT:    s_and_b32 s16, s18, 0xffff
; VI-NEXT:    s_lshl_b32 s6, s6, 16
; VI-NEXT:    s_add_i32 s19, s19, 3
; VI-NEXT:    s_or_b32 s6, s6, s16
; VI-NEXT:    s_and_b32 s16, s19, 0xffff
; VI-NEXT:    s_lshl_b32 s7, s7, 16
; VI-NEXT:    s_add_i32 s20, s20, 3
; VI-NEXT:    s_or_b32 s7, s7, s16
; VI-NEXT:    s_and_b32 s16, s20, 0xffff
; VI-NEXT:    s_lshl_b32 s8, s8, 16
; VI-NEXT:    s_add_i32 s21, s21, 3
; VI-NEXT:    s_or_b32 s8, s8, s16
; VI-NEXT:    s_and_b32 s16, s21, 0xffff
; VI-NEXT:    s_lshl_b32 s9, s9, 16
; VI-NEXT:    s_add_i32 s22, s22, 3
; VI-NEXT:    s_or_b32 s9, s9, s16
; VI-NEXT:    s_and_b32 s16, s22, 0xffff
; VI-NEXT:    s_lshl_b32 s10, s10, 16
; VI-NEXT:    s_add_i32 s23, s23, 3
; VI-NEXT:    s_or_b32 s10, s10, s16
; VI-NEXT:    s_and_b32 s16, s23, 0xffff
; VI-NEXT:    s_lshl_b32 s11, s11, 16
; VI-NEXT:    s_add_i32 s24, s24, 3
; VI-NEXT:    s_or_b32 s11, s11, s16
; VI-NEXT:    s_and_b32 s16, s24, 0xffff
; VI-NEXT:    s_lshl_b32 s12, s12, 16
; VI-NEXT:    s_add_i32 s25, s25, 3
; VI-NEXT:    s_or_b32 s12, s12, s16
; VI-NEXT:    s_and_b32 s16, s25, 0xffff
; VI-NEXT:    s_lshl_b32 s13, s13, 16
; VI-NEXT:    s_add_i32 s26, s26, 3
; VI-NEXT:    s_or_b32 s13, s13, s16
; VI-NEXT:    s_and_b32 s16, s26, 0xffff
; VI-NEXT:    s_lshl_b32 s14, s14, 16
; VI-NEXT:    s_add_i32 s27, s27, 3
; VI-NEXT:    s_or_b32 s14, s14, s16
; VI-NEXT:    s_and_b32 s16, s27, 0xffff
; VI-NEXT:    s_lshl_b32 s15, s15, 16
; VI-NEXT:    s_add_i32 s28, s28, 3
; VI-NEXT:    s_or_b32 s15, s15, s16
; VI-NEXT:    s_and_b32 s16, s28, 0xffff
; VI-NEXT:    s_lshl_b32 s17, s79, 16
; VI-NEXT:    s_add_i32 s29, s29, 3
; VI-NEXT:    s_or_b32 s16, s17, s16
; VI-NEXT:    s_and_b32 s17, s29, 0xffff
; VI-NEXT:    s_lshl_b32 s18, s76, 16
; VI-NEXT:    s_add_i32 vcc_hi, vcc_hi, 3
; VI-NEXT:    s_or_b32 s17, s18, s17
; VI-NEXT:    s_and_b32 s18, vcc_hi, 0xffff
; VI-NEXT:    s_lshl_b32 s19, vcc_lo, 16
; VI-NEXT:    s_add_i32 s91, s91, 3
; VI-NEXT:    s_or_b32 s18, s19, s18
; VI-NEXT:    s_and_b32 s19, s91, 0xffff
; VI-NEXT:    s_lshl_b32 s20, s90, 16
; VI-NEXT:    s_add_i32 s89, s89, 3
; VI-NEXT:    s_or_b32 s19, s20, s19
; VI-NEXT:    s_and_b32 s20, s89, 0xffff
; VI-NEXT:    s_lshl_b32 s21, s88, 16
; VI-NEXT:    s_add_i32 s78, s78, 3
; VI-NEXT:    s_or_b32 s20, s21, s20
; VI-NEXT:    s_and_b32 s21, s78, 0xffff
; VI-NEXT:    s_lshl_b32 s22, s77, 16
; VI-NEXT:    s_add_i32 s75, s75, 3
; VI-NEXT:    s_or_b32 s21, s22, s21
; VI-NEXT:    s_and_b32 s22, s75, 0xffff
; VI-NEXT:    s_lshl_b32 s23, s74, 16
; VI-NEXT:    s_add_i32 s73, s73, 3
; VI-NEXT:    s_or_b32 s22, s23, s22
; VI-NEXT:    s_and_b32 s23, s73, 0xffff
; VI-NEXT:    s_lshl_b32 s24, s72, 16
; VI-NEXT:    s_add_i32 s63, s63, 3
; VI-NEXT:    s_or_b32 s23, s24, s23
; VI-NEXT:    s_and_b32 s24, s63, 0xffff
; VI-NEXT:    s_lshl_b32 s25, s62, 16
; VI-NEXT:    s_add_i32 s61, s61, 3
; VI-NEXT:    s_or_b32 s24, s25, s24
; VI-NEXT:    s_and_b32 s25, s61, 0xffff
; VI-NEXT:    s_lshl_b32 s26, s60, 16
; VI-NEXT:    s_add_i32 s59, s59, 3
; VI-NEXT:    s_or_b32 s25, s26, s25
; VI-NEXT:    s_and_b32 s26, s59, 0xffff
; VI-NEXT:    s_lshl_b32 s27, s58, 16
; VI-NEXT:    s_add_i32 s57, s57, 3
; VI-NEXT:    s_or_b32 s26, s27, s26
; VI-NEXT:    s_and_b32 s27, s57, 0xffff
; VI-NEXT:    s_lshl_b32 s28, s56, 16
; VI-NEXT:    s_add_i32 s47, s47, 3
; VI-NEXT:    s_or_b32 s27, s28, s27
; VI-NEXT:    s_and_b32 s28, s47, 0xffff
; VI-NEXT:    s_lshl_b32 s29, s46, 16
; VI-NEXT:    s_add_i32 s45, s45, 3
; VI-NEXT:    s_add_i32 s43, s43, 3
; VI-NEXT:    s_add_i32 s41, s41, 3
; VI-NEXT:    s_or_b32 s28, s29, s28
; VI-NEXT:    s_and_b32 s29, s45, 0xffff
; VI-NEXT:    s_lshl_b32 s44, s44, 16
; VI-NEXT:    s_and_b32 s43, s43, 0xffff
; VI-NEXT:    s_lshl_b32 s42, s42, 16
; VI-NEXT:    s_and_b32 s41, s41, 0xffff
; VI-NEXT:    s_lshl_b32 s40, s40, 16
; VI-NEXT:    s_or_b32 s29, s44, s29
; VI-NEXT:    s_or_b32 s42, s42, s43
; VI-NEXT:    s_or_b32 s40, s40, s41
; VI-NEXT:    s_add_i32 s4, s4, 0x30000
; VI-NEXT:    s_add_i32 s5, s5, 0x30000
; VI-NEXT:    s_add_i32 s6, s6, 0x30000
; VI-NEXT:    s_add_i32 s7, s7, 0x30000
; VI-NEXT:    s_add_i32 s8, s8, 0x30000
; VI-NEXT:    s_add_i32 s9, s9, 0x30000
; VI-NEXT:    s_add_i32 s10, s10, 0x30000
; VI-NEXT:    s_add_i32 s11, s11, 0x30000
; VI-NEXT:    s_add_i32 s12, s12, 0x30000
; VI-NEXT:    s_add_i32 s13, s13, 0x30000
; VI-NEXT:    s_add_i32 s14, s14, 0x30000
; VI-NEXT:    s_add_i32 s15, s15, 0x30000
; VI-NEXT:    s_add_i32 s16, s16, 0x30000
; VI-NEXT:    s_add_i32 s17, s17, 0x30000
; VI-NEXT:    s_add_i32 s18, s18, 0x30000
; VI-NEXT:    s_add_i32 s19, s19, 0x30000
; VI-NEXT:    s_add_i32 s20, s20, 0x30000
; VI-NEXT:    s_add_i32 s21, s21, 0x30000
; VI-NEXT:    s_add_i32 s22, s22, 0x30000
; VI-NEXT:    s_add_i32 s23, s23, 0x30000
; VI-NEXT:    s_add_i32 s24, s24, 0x30000
; VI-NEXT:    s_add_i32 s25, s25, 0x30000
; VI-NEXT:    s_add_i32 s26, s26, 0x30000
; VI-NEXT:    s_add_i32 s27, s27, 0x30000
; VI-NEXT:    s_add_i32 s28, s28, 0x30000
; VI-NEXT:    s_add_i32 s29, s29, 0x30000
; VI-NEXT:    s_add_i32 s42, s42, 0x30000
; VI-NEXT:    s_add_i32 s40, s40, 0x30000
; VI-NEXT:  .LBB15_3: ; %end
; VI-NEXT:    v_readlane_b32 s30, v28, 0
; VI-NEXT:    v_mov_b32_e32 v0, s4
; VI-NEXT:    v_mov_b32_e32 v1, s5
; VI-NEXT:    v_mov_b32_e32 v2, s6
; VI-NEXT:    v_mov_b32_e32 v3, s7
; VI-NEXT:    v_mov_b32_e32 v4, s8
; VI-NEXT:    v_mov_b32_e32 v5, s9
; VI-NEXT:    v_mov_b32_e32 v6, s10
; VI-NEXT:    v_mov_b32_e32 v7, s11
; VI-NEXT:    v_mov_b32_e32 v8, s12
; VI-NEXT:    v_mov_b32_e32 v9, s13
; VI-NEXT:    v_mov_b32_e32 v10, s14
; VI-NEXT:    v_mov_b32_e32 v11, s15
; VI-NEXT:    v_mov_b32_e32 v12, s16
; VI-NEXT:    v_mov_b32_e32 v13, s17
; VI-NEXT:    v_mov_b32_e32 v14, s18
; VI-NEXT:    v_mov_b32_e32 v15, s19
; VI-NEXT:    v_mov_b32_e32 v16, s20
; VI-NEXT:    v_mov_b32_e32 v17, s21
; VI-NEXT:    v_mov_b32_e32 v18, s22
; VI-NEXT:    v_mov_b32_e32 v19, s23
; VI-NEXT:    v_mov_b32_e32 v20, s24
; VI-NEXT:    v_mov_b32_e32 v21, s25
; VI-NEXT:    v_mov_b32_e32 v22, s26
; VI-NEXT:    v_mov_b32_e32 v23, s27
; VI-NEXT:    v_mov_b32_e32 v24, s28
; VI-NEXT:    v_mov_b32_e32 v25, s29
; VI-NEXT:    v_mov_b32_e32 v26, s42
; VI-NEXT:    v_mov_b32_e32 v27, s40
; VI-NEXT:    v_readlane_b32 s31, v28, 1
; VI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v56i16_to_v28i32_scalar:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    s_mov_b64 exec, s[4:5]
; GFX9-NEXT:    v_writelane_b32 v32, s36, 0
; GFX9-NEXT:    v_writelane_b32 v32, s37, 1
; GFX9-NEXT:    v_writelane_b32 v32, s38, 2
; GFX9-NEXT:    v_writelane_b32 v32, s39, 3
; GFX9-NEXT:    v_writelane_b32 v32, s48, 4
; GFX9-NEXT:    v_writelane_b32 v32, s49, 5
; GFX9-NEXT:    v_writelane_b32 v32, s50, 6
; GFX9-NEXT:    v_writelane_b32 v32, s51, 7
; GFX9-NEXT:    v_writelane_b32 v32, s52, 8
; GFX9-NEXT:    v_writelane_b32 v32, s53, 9
; GFX9-NEXT:    v_writelane_b32 v32, s54, 10
; GFX9-NEXT:    v_writelane_b32 v32, s55, 11
; GFX9-NEXT:    v_readfirstlane_b32 s4, v13
; GFX9-NEXT:    v_readfirstlane_b32 s6, v12
; GFX9-NEXT:    v_readfirstlane_b32 s8, v11
; GFX9-NEXT:    v_readfirstlane_b32 s10, v10
; GFX9-NEXT:    v_readfirstlane_b32 s12, v9
; GFX9-NEXT:    v_readfirstlane_b32 s14, v8
; GFX9-NEXT:    v_readfirstlane_b32 s57, v7
; GFX9-NEXT:    v_readfirstlane_b32 s60, v6
; GFX9-NEXT:    v_readfirstlane_b32 s62, v5
; GFX9-NEXT:    v_readfirstlane_b32 s72, v4
; GFX9-NEXT:    v_readfirstlane_b32 s74, v3
; GFX9-NEXT:    v_readfirstlane_b32 s76, v2
; GFX9-NEXT:    v_readfirstlane_b32 s78, v1
; GFX9-NEXT:    v_readfirstlane_b32 s88, v0
; GFX9-NEXT:    s_lshr_b32 s56, s29, 16
; GFX9-NEXT:    s_lshr_b32 s59, s28, 16
; GFX9-NEXT:    s_lshr_b32 s47, s27, 16
; GFX9-NEXT:    s_lshr_b32 s46, s26, 16
; GFX9-NEXT:    s_lshr_b32 s45, s25, 16
; GFX9-NEXT:    s_lshr_b32 s44, s24, 16
; GFX9-NEXT:    s_lshr_b32 s43, s23, 16
; GFX9-NEXT:    s_lshr_b32 s42, s22, 16
; GFX9-NEXT:    s_lshr_b32 s41, s21, 16
; GFX9-NEXT:    s_lshr_b32 s40, s20, 16
; GFX9-NEXT:    s_lshr_b32 s90, s19, 16
; GFX9-NEXT:    s_lshr_b32 s91, s18, 16
; GFX9-NEXT:    s_lshr_b32 s92, s17, 16
; GFX9-NEXT:    s_lshr_b32 s93, s16, 16
; GFX9-NEXT:    s_lshr_b32 s5, s4, 16
; GFX9-NEXT:    s_lshr_b32 s7, s6, 16
; GFX9-NEXT:    s_lshr_b32 s9, s8, 16
; GFX9-NEXT:    s_lshr_b32 s11, s10, 16
; GFX9-NEXT:    s_lshr_b32 s13, s12, 16
; GFX9-NEXT:    s_lshr_b32 s15, s14, 16
; GFX9-NEXT:    s_lshr_b32 s58, s57, 16
; GFX9-NEXT:    s_lshr_b32 s61, s60, 16
; GFX9-NEXT:    s_lshr_b32 s63, s62, 16
; GFX9-NEXT:    s_lshr_b32 s73, s72, 16
; GFX9-NEXT:    s_lshr_b32 s75, s74, 16
; GFX9-NEXT:    s_lshr_b32 s77, s76, 16
; GFX9-NEXT:    s_lshr_b32 s79, s78, 16
; GFX9-NEXT:    s_lshr_b32 s89, s88, 16
; GFX9-NEXT:    v_readfirstlane_b32 s94, v14
; GFX9-NEXT:    s_cmp_lg_u32 s94, 0
; GFX9-NEXT:    s_cbranch_scc0 .LBB15_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    s_pack_ll_b32_b16 s36, s16, s93
; GFX9-NEXT:    s_pack_ll_b32_b16 s37, s17, s92
; GFX9-NEXT:    s_pack_ll_b32_b16 s38, s18, s91
; GFX9-NEXT:    s_pack_ll_b32_b16 s39, s19, s90
; GFX9-NEXT:    s_pack_ll_b32_b16 s40, s20, s40
; GFX9-NEXT:    s_pack_ll_b32_b16 s41, s21, s41
; GFX9-NEXT:    s_pack_ll_b32_b16 s42, s22, s42
; GFX9-NEXT:    s_pack_ll_b32_b16 s43, s23, s43
; GFX9-NEXT:    s_pack_ll_b32_b16 s44, s24, s44
; GFX9-NEXT:    s_pack_ll_b32_b16 s45, s25, s45
; GFX9-NEXT:    s_pack_ll_b32_b16 s46, s26, s46
; GFX9-NEXT:    s_pack_ll_b32_b16 s47, s27, s47
; GFX9-NEXT:    s_pack_ll_b32_b16 s48, s28, s59
; GFX9-NEXT:    s_pack_ll_b32_b16 s49, s29, s56
; GFX9-NEXT:    s_pack_ll_b32_b16 s50, s88, s89
; GFX9-NEXT:    s_pack_ll_b32_b16 s51, s78, s79
; GFX9-NEXT:    s_pack_ll_b32_b16 s52, s76, s77
; GFX9-NEXT:    s_pack_ll_b32_b16 s53, s74, s75
; GFX9-NEXT:    s_pack_ll_b32_b16 s54, s72, s73
; GFX9-NEXT:    s_pack_ll_b32_b16 s55, s62, s63
; GFX9-NEXT:    s_pack_ll_b32_b16 s56, s60, s61
; GFX9-NEXT:    s_pack_ll_b32_b16 s57, s57, s58
; GFX9-NEXT:    s_pack_ll_b32_b16 s58, s14, s15
; GFX9-NEXT:    s_pack_ll_b32_b16 s59, s12, s13
; GFX9-NEXT:    s_pack_ll_b32_b16 s60, s10, s11
; GFX9-NEXT:    s_pack_ll_b32_b16 s61, s8, s9
; GFX9-NEXT:    s_pack_ll_b32_b16 s62, s6, s7
; GFX9-NEXT:    s_pack_ll_b32_b16 s63, s4, s5
; GFX9-NEXT:    v_mov_b32_e32 v0, s36
; GFX9-NEXT:    v_mov_b32_e32 v1, s37
; GFX9-NEXT:    v_mov_b32_e32 v2, s38
; GFX9-NEXT:    v_mov_b32_e32 v3, s39
; GFX9-NEXT:    v_mov_b32_e32 v4, s40
; GFX9-NEXT:    v_mov_b32_e32 v5, s41
; GFX9-NEXT:    v_mov_b32_e32 v6, s42
; GFX9-NEXT:    v_mov_b32_e32 v7, s43
; GFX9-NEXT:    v_mov_b32_e32 v8, s44
; GFX9-NEXT:    v_mov_b32_e32 v9, s45
; GFX9-NEXT:    v_mov_b32_e32 v10, s46
; GFX9-NEXT:    v_mov_b32_e32 v11, s47
; GFX9-NEXT:    v_mov_b32_e32 v12, s48
; GFX9-NEXT:    v_mov_b32_e32 v13, s49
; GFX9-NEXT:    v_mov_b32_e32 v14, s50
; GFX9-NEXT:    v_mov_b32_e32 v15, s51
; GFX9-NEXT:    v_mov_b32_e32 v16, s52
; GFX9-NEXT:    v_mov_b32_e32 v17, s53
; GFX9-NEXT:    v_mov_b32_e32 v18, s54
; GFX9-NEXT:    v_mov_b32_e32 v19, s55
; GFX9-NEXT:    v_mov_b32_e32 v20, s56
; GFX9-NEXT:    v_mov_b32_e32 v21, s57
; GFX9-NEXT:    v_mov_b32_e32 v22, s58
; GFX9-NEXT:    v_mov_b32_e32 v23, s59
; GFX9-NEXT:    v_mov_b32_e32 v24, s60
; GFX9-NEXT:    v_mov_b32_e32 v25, s61
; GFX9-NEXT:    v_mov_b32_e32 v26, s62
; GFX9-NEXT:    v_mov_b32_e32 v27, s63
; GFX9-NEXT:    v_mov_b32_e32 v28, s64
; GFX9-NEXT:    v_mov_b32_e32 v29, s65
; GFX9-NEXT:    v_mov_b32_e32 v30, s66
; GFX9-NEXT:    v_mov_b32_e32 v31, s67
; GFX9-NEXT:    s_branch .LBB15_3
; GFX9-NEXT:  .LBB15_2: ; %cmp.true
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s16, s93
; GFX9-NEXT:    v_pk_add_u16 v0, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s18, s91
; GFX9-NEXT:    v_pk_add_u16 v2, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s19, s90
; GFX9-NEXT:    v_pk_add_u16 v3, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s20, s40
; GFX9-NEXT:    v_pk_add_u16 v4, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s21, s41
; GFX9-NEXT:    v_pk_add_u16 v5, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s22, s42
; GFX9-NEXT:    v_pk_add_u16 v6, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s23, s43
; GFX9-NEXT:    v_pk_add_u16 v7, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s24, s44
; GFX9-NEXT:    v_pk_add_u16 v8, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s25, s45
; GFX9-NEXT:    v_pk_add_u16 v9, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s26, s46
; GFX9-NEXT:    v_pk_add_u16 v10, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s27, s47
; GFX9-NEXT:    v_pk_add_u16 v11, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s28, s59
; GFX9-NEXT:    v_pk_add_u16 v12, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s29, s56
; GFX9-NEXT:    v_pk_add_u16 v13, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s88, s89
; GFX9-NEXT:    v_pk_add_u16 v14, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s78, s79
; GFX9-NEXT:    v_pk_add_u16 v15, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s76, s77
; GFX9-NEXT:    v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s74, s75
; GFX9-NEXT:    v_pk_add_u16 v17, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s72, s73
; GFX9-NEXT:    v_pk_add_u16 v18, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s62, s63
; GFX9-NEXT:    v_pk_add_u16 v19, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s60, s61
; GFX9-NEXT:    s_pack_ll_b32_b16 s17, s17, s92
; GFX9-NEXT:    v_pk_add_u16 v20, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s57, s58
; GFX9-NEXT:    s_pack_ll_b32_b16 s14, s14, s15
; GFX9-NEXT:    s_pack_ll_b32_b16 s12, s12, s13
; GFX9-NEXT:    s_pack_ll_b32_b16 s10, s10, s11
; GFX9-NEXT:    s_pack_ll_b32_b16 s8, s8, s9
; GFX9-NEXT:    s_pack_ll_b32_b16 s6, s6, s7
; GFX9-NEXT:    s_pack_ll_b32_b16 s4, s4, s5
; GFX9-NEXT:    v_pk_add_u16 v1, s17, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v21, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v22, s14, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v23, s12, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v24, s10, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v25, s8, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v26, s6, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v27, s4, 3 op_sel_hi:[1,0]
; GFX9-NEXT:  .LBB15_3: ; %end
; GFX9-NEXT:    v_readlane_b32 s55, v32, 11
; GFX9-NEXT:    v_readlane_b32 s54, v32, 10
; GFX9-NEXT:    v_readlane_b32 s53, v32, 9
; GFX9-NEXT:    v_readlane_b32 s52, v32, 8
; GFX9-NEXT:    v_readlane_b32 s51, v32, 7
; GFX9-NEXT:    v_readlane_b32 s50, v32, 6
; GFX9-NEXT:    v_readlane_b32 s49, v32, 5
; GFX9-NEXT:    v_readlane_b32 s48, v32, 4
; GFX9-NEXT:    v_readlane_b32 s39, v32, 3
; GFX9-NEXT:    v_readlane_b32 s38, v32, 2
; GFX9-NEXT:    v_readlane_b32 s37, v32, 1
; GFX9-NEXT:    v_readlane_b32 s36, v32, 0
; GFX9-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    s_mov_b64 exec, s[4:5]
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v56i16_to_v28i32_scalar:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_readfirstlane_b32 s40, v9
; GFX11-NEXT:    v_readfirstlane_b32 s42, v8
; GFX11-NEXT:    v_readfirstlane_b32 s43, v7
; GFX11-NEXT:    v_readfirstlane_b32 s46, v6
; GFX11-NEXT:    v_readfirstlane_b32 s57, v5
; GFX11-NEXT:    v_readfirstlane_b32 s59, v4
; GFX11-NEXT:    v_readfirstlane_b32 s62, v3
; GFX11-NEXT:    v_readfirstlane_b32 s63, v2
; GFX11-NEXT:    v_readfirstlane_b32 s73, v1
; GFX11-NEXT:    v_readfirstlane_b32 s75, v0
; GFX11-NEXT:    v_readfirstlane_b32 s90, v10
; GFX11-NEXT:    s_lshr_b32 s88, s1, 16
; GFX11-NEXT:    s_lshr_b32 s89, s0, 16
; GFX11-NEXT:    s_lshr_b32 s44, s29, 16
; GFX11-NEXT:    s_lshr_b32 s47, s28, 16
; GFX11-NEXT:    s_lshr_b32 s15, s27, 16
; GFX11-NEXT:    s_lshr_b32 s14, s26, 16
; GFX11-NEXT:    s_lshr_b32 s13, s25, 16
; GFX11-NEXT:    s_lshr_b32 s12, s24, 16
; GFX11-NEXT:    s_lshr_b32 s11, s23, 16
; GFX11-NEXT:    s_lshr_b32 s10, s22, 16
; GFX11-NEXT:    s_lshr_b32 s9, s21, 16
; GFX11-NEXT:    s_lshr_b32 s8, s20, 16
; GFX11-NEXT:    s_lshr_b32 s7, s19, 16
; GFX11-NEXT:    s_lshr_b32 s6, s18, 16
; GFX11-NEXT:    s_lshr_b32 s5, s17, 16
; GFX11-NEXT:    s_lshr_b32 s4, s16, 16
; GFX11-NEXT:    s_lshr_b32 s78, s3, 16
; GFX11-NEXT:    s_lshr_b32 s79, s2, 16
; GFX11-NEXT:    s_lshr_b32 s41, s40, 16
; GFX11-NEXT:    s_lshr_b32 s45, s42, 16
; GFX11-NEXT:    s_lshr_b32 s56, s43, 16
; GFX11-NEXT:    s_lshr_b32 s58, s46, 16
; GFX11-NEXT:    s_lshr_b32 s60, s57, 16
; GFX11-NEXT:    s_lshr_b32 s61, s59, 16
; GFX11-NEXT:    s_lshr_b32 s72, s62, 16
; GFX11-NEXT:    s_lshr_b32 s74, s63, 16
; GFX11-NEXT:    s_lshr_b32 s76, s73, 16
; GFX11-NEXT:    s_lshr_b32 s77, s75, 16
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s0, s89
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s1, s88
; GFX11-NEXT:    s_cmp_lg_u32 s90, 0
; GFX11-NEXT:    s_cbranch_scc0 .LBB15_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-NEXT:    s_pack_ll_b32_b16 s2, s2, s79
; GFX11-NEXT:    s_pack_ll_b32_b16 s3, s3, s78
; GFX11-NEXT:    s_pack_ll_b32_b16 s4, s16, s4
; GFX11-NEXT:    s_pack_ll_b32_b16 s5, s17, s5
; GFX11-NEXT:    s_pack_ll_b32_b16 s6, s18, s6
; GFX11-NEXT:    s_pack_ll_b32_b16 s7, s19, s7
; GFX11-NEXT:    s_pack_ll_b32_b16 s8, s20, s8
; GFX11-NEXT:    s_pack_ll_b32_b16 s9, s21, s9
; GFX11-NEXT:    s_pack_ll_b32_b16 s10, s22, s10
; GFX11-NEXT:    s_pack_ll_b32_b16 s11, s23, s11
; GFX11-NEXT:    s_pack_ll_b32_b16 s12, s24, s12
; GFX11-NEXT:    s_pack_ll_b32_b16 s13, s25, s13
; GFX11-NEXT:    s_pack_ll_b32_b16 s14, s26, s14
; GFX11-NEXT:    s_pack_ll_b32_b16 s15, s27, s15
; GFX11-NEXT:    s_pack_ll_b32_b16 s16, s28, s47
; GFX11-NEXT:    s_pack_ll_b32_b16 s17, s29, s44
; GFX11-NEXT:    s_pack_ll_b32_b16 s18, s75, s77
; GFX11-NEXT:    s_pack_ll_b32_b16 s19, s73, s76
; GFX11-NEXT:    s_pack_ll_b32_b16 s20, s63, s74
; GFX11-NEXT:    s_pack_ll_b32_b16 s21, s62, s72
; GFX11-NEXT:    s_pack_ll_b32_b16 s22, s59, s61
; GFX11-NEXT:    s_pack_ll_b32_b16 s23, s57, s60
; GFX11-NEXT:    s_pack_ll_b32_b16 s24, s46, s58
; GFX11-NEXT:    s_pack_ll_b32_b16 s25, s43, s56
; GFX11-NEXT:    s_pack_ll_b32_b16 s26, s42, s45
; GFX11-NEXT:    s_pack_ll_b32_b16 s27, s40, s41
; GFX11-NEXT:    v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX11-NEXT:    v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; GFX11-NEXT:    v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
; GFX11-NEXT:    v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
; GFX11-NEXT:    v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
; GFX11-NEXT:    v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
; GFX11-NEXT:    v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
; GFX11-NEXT:    v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
; GFX11-NEXT:    v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
; GFX11-NEXT:    v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
; GFX11-NEXT:    v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
; GFX11-NEXT:    v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
; GFX11-NEXT:    v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
; GFX11-NEXT:    v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
; GFX11-NEXT:    v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
; GFX11-NEXT:    v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
; GFX11-NEXT:    s_setpc_b64 s[30:31]
; GFX11-NEXT:  .LBB15_2: ; %cmp.true
; GFX11-NEXT:    v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s2, s79
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s3, s78
; GFX11-NEXT:    v_pk_add_u16 v2, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v3, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s16, s4
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s17, s5
; GFX11-NEXT:    v_pk_add_u16 v4, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v5, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s18, s6
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s19, s7
; GFX11-NEXT:    v_pk_add_u16 v6, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v7, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s20, s8
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s21, s9
; GFX11-NEXT:    v_pk_add_u16 v8, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v9, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s22, s10
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s23, s11
; GFX11-NEXT:    v_pk_add_u16 v10, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v11, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s24, s12
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s25, s13
; GFX11-NEXT:    v_pk_add_u16 v12, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v13, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s26, s14
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s27, s15
; GFX11-NEXT:    v_pk_add_u16 v14, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v15, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s28, s47
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s29, s44
; GFX11-NEXT:    v_pk_add_u16 v16, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v17, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s75, s77
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s73, s76
; GFX11-NEXT:    v_pk_add_u16 v18, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v19, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s63, s74
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s62, s72
; GFX11-NEXT:    v_pk_add_u16 v20, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v21, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s59, s61
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s57, s60
; GFX11-NEXT:    v_pk_add_u16 v22, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v23, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s46, s58
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s43, s56
; GFX11-NEXT:    v_pk_add_u16 v24, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v25, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s42, s45
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s40, s41
; GFX11-NEXT:    v_pk_add_u16 v26, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v27, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = add <56 x i16> %a, splat (i16 3)
  %a2 = bitcast <56 x i16> %a1 to <28 x i32>
  br label %end

cmp.false:
  %a3 = bitcast <56 x i16> %a to <28 x i32>
  br label %end

end:
  %phi = phi <28 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <28 x i32> %phi
}

define <56 x half> @bitcast_v28i32_to_v56f16(<28 x i32> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v28i32_to_v56f16:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT:    ; implicit-def: $vgpr40
; SI-NEXT:    ; implicit-def: $vgpr47
; SI-NEXT:    ; implicit-def: $vgpr53
; SI-NEXT:    ; implicit-def: $vgpr46
; SI-NEXT:    ; implicit-def: $vgpr51
; SI-NEXT:    ; implicit-def: $vgpr45
; SI-NEXT:    ; implicit-def: $vgpr48
; SI-NEXT:    ; implicit-def: $vgpr44
; SI-NEXT:    ; implicit-def: $vgpr38
; SI-NEXT:    ; implicit-def: $vgpr43
; SI-NEXT:    ; implicit-def: $vgpr36
; SI-NEXT:    ; implicit-def: $vgpr42
; SI-NEXT:    ; implicit-def: $vgpr35
; SI-NEXT:    ; implicit-def: $vgpr41
; SI-NEXT:    ; implicit-def: $vgpr34
; SI-NEXT:    ; implicit-def: $vgpr55
; SI-NEXT:    ; implicit-def: $vgpr33
; SI-NEXT:    ; implicit-def: $vgpr54
; SI-NEXT:    ; implicit-def: $vgpr32
; SI-NEXT:    ; implicit-def: $vgpr52
; SI-NEXT:    ; implicit-def: $vgpr31
; SI-NEXT:    ; implicit-def: $vgpr50
; SI-NEXT:    ; implicit-def: $vgpr30
; SI-NEXT:    ; implicit-def: $vgpr49
; SI-NEXT:    ; implicit-def: $vgpr29
; SI-NEXT:    ; implicit-def: $vgpr39
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr37
; SI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB16_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    v_alignbit_b32 v28, v27, v26, 16
; SI-NEXT:    v_alignbit_b32 v29, v25, v24, 16
; SI-NEXT:    v_alignbit_b32 v30, v23, v22, 16
; SI-NEXT:    v_alignbit_b32 v31, v21, v20, 16
; SI-NEXT:    v_alignbit_b32 v32, v19, v18, 16
; SI-NEXT:    v_alignbit_b32 v33, v17, v16, 16
; SI-NEXT:    v_alignbit_b32 v34, v15, v14, 16
; SI-NEXT:    v_alignbit_b32 v35, v13, v12, 16
; SI-NEXT:    v_alignbit_b32 v36, v11, v10, 16
; SI-NEXT:    v_alignbit_b32 v38, v9, v8, 16
; SI-NEXT:    v_alignbit_b32 v48, v7, v6, 16
; SI-NEXT:    v_alignbit_b32 v51, v5, v4, 16
; SI-NEXT:    v_alignbit_b32 v53, v3, v2, 16
; SI-NEXT:    v_alignbit_b32 v40, v1, v0, 16
; SI-NEXT:    v_lshrrev_b32_e32 v37, 16, v27
; SI-NEXT:    v_lshrrev_b32_e32 v39, 16, v25
; SI-NEXT:    v_lshrrev_b32_e32 v49, 16, v23
; SI-NEXT:    v_lshrrev_b32_e32 v50, 16, v21
; SI-NEXT:    v_lshrrev_b32_e32 v52, 16, v19
; SI-NEXT:    v_lshrrev_b32_e32 v54, 16, v17
; SI-NEXT:    v_lshrrev_b32_e32 v55, 16, v15
; SI-NEXT:    s_waitcnt expcnt(6)
; SI-NEXT:    v_lshrrev_b32_e32 v41, 16, v13
; SI-NEXT:    s_waitcnt expcnt(5)
; SI-NEXT:    v_lshrrev_b32_e32 v42, 16, v11
; SI-NEXT:    s_waitcnt expcnt(4)
; SI-NEXT:    v_lshrrev_b32_e32 v43, 16, v9
; SI-NEXT:    s_waitcnt expcnt(3)
; SI-NEXT:    v_lshrrev_b32_e32 v44, 16, v7
; SI-NEXT:    s_waitcnt expcnt(2)
; SI-NEXT:    v_lshrrev_b32_e32 v45, 16, v5
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v46, 16, v3
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v47, 16, v1
; SI-NEXT:  .LBB16_2: ; %Flow
; SI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB16_4
; SI-NEXT:  ; %bb.3: ; %cmp.true
; SI-NEXT:    v_add_i32_e32 v1, vcc, 3, v1
; SI-NEXT:    v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT:    v_add_i32_e32 v3, vcc, 3, v3
; SI-NEXT:    v_add_i32_e32 v2, vcc, 3, v2
; SI-NEXT:    v_add_i32_e32 v5, vcc, 3, v5
; SI-NEXT:    v_add_i32_e32 v4, vcc, 3, v4
; SI-NEXT:    v_add_i32_e32 v7, vcc, 3, v7
; SI-NEXT:    v_add_i32_e32 v6, vcc, 3, v6
; SI-NEXT:    v_add_i32_e32 v9, vcc, 3, v9
; SI-NEXT:    v_add_i32_e32 v8, vcc, 3, v8
; SI-NEXT:    v_add_i32_e32 v11, vcc, 3, v11
; SI-NEXT:    v_add_i32_e32 v10, vcc, 3, v10
; SI-NEXT:    v_add_i32_e32 v13, vcc, 3, v13
; SI-NEXT:    v_add_i32_e32 v12, vcc, 3, v12
; SI-NEXT:    v_add_i32_e32 v15, vcc, 3, v15
; SI-NEXT:    v_add_i32_e32 v14, vcc, 3, v14
; SI-NEXT:    v_add_i32_e32 v17, vcc, 3, v17
; SI-NEXT:    v_add_i32_e32 v16, vcc, 3, v16
; SI-NEXT:    v_add_i32_e32 v19, vcc, 3, v19
; SI-NEXT:    v_add_i32_e32 v18, vcc, 3, v18
; SI-NEXT:    v_add_i32_e32 v21, vcc, 3, v21
; SI-NEXT:    v_add_i32_e32 v20, vcc, 3, v20
; SI-NEXT:    v_add_i32_e32 v23, vcc, 3, v23
; SI-NEXT:    v_add_i32_e32 v22, vcc, 3, v22
; SI-NEXT:    v_add_i32_e32 v25, vcc, 3, v25
; SI-NEXT:    v_add_i32_e32 v24, vcc, 3, v24
; SI-NEXT:    v_add_i32_e32 v27, vcc, 3, v27
; SI-NEXT:    v_add_i32_e32 v26, vcc, 3, v26
; SI-NEXT:    v_alignbit_b32 v28, v27, v26, 16
; SI-NEXT:    v_alignbit_b32 v29, v25, v24, 16
; SI-NEXT:    v_alignbit_b32 v30, v23, v22, 16
; SI-NEXT:    v_alignbit_b32 v31, v21, v20, 16
; SI-NEXT:    v_alignbit_b32 v32, v19, v18, 16
; SI-NEXT:    v_alignbit_b32 v33, v17, v16, 16
; SI-NEXT:    v_alignbit_b32 v34, v15, v14, 16
; SI-NEXT:    v_alignbit_b32 v35, v13, v12, 16
; SI-NEXT:    v_alignbit_b32 v36, v11, v10, 16
; SI-NEXT:    v_alignbit_b32 v38, v9, v8, 16
; SI-NEXT:    v_alignbit_b32 v48, v7, v6, 16
; SI-NEXT:    v_alignbit_b32 v51, v5, v4, 16
; SI-NEXT:    v_alignbit_b32 v53, v3, v2, 16
; SI-NEXT:    v_alignbit_b32 v40, v1, v0, 16
; SI-NEXT:    v_lshrrev_b32_e32 v37, 16, v27
; SI-NEXT:    v_lshrrev_b32_e32 v39, 16, v25
; SI-NEXT:    v_lshrrev_b32_e32 v49, 16, v23
; SI-NEXT:    v_lshrrev_b32_e32 v50, 16, v21
; SI-NEXT:    v_lshrrev_b32_e32 v52, 16, v19
; SI-NEXT:    v_lshrrev_b32_e32 v54, 16, v17
; SI-NEXT:    v_lshrrev_b32_e32 v55, 16, v15
; SI-NEXT:    s_waitcnt expcnt(6)
; SI-NEXT:    v_lshrrev_b32_e32 v41, 16, v13
; SI-NEXT:    s_waitcnt expcnt(5)
; SI-NEXT:    v_lshrrev_b32_e32 v42, 16, v11
; SI-NEXT:    s_waitcnt expcnt(4)
; SI-NEXT:    v_lshrrev_b32_e32 v43, 16, v9
; SI-NEXT:    s_waitcnt expcnt(3)
; SI-NEXT:    v_lshrrev_b32_e32 v44, 16, v7
; SI-NEXT:    s_waitcnt expcnt(2)
; SI-NEXT:    v_lshrrev_b32_e32 v45, 16, v5
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v46, 16, v3
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v47, 16, v1
; SI-NEXT:  .LBB16_4: ; %end
; SI-NEXT:    s_or_b64 exec, exec, s[4:5]
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT:    v_lshlrev_b32_e32 v40, 16, v40
; SI-NEXT:    v_or_b32_e32 v0, v0, v40
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT:    v_lshlrev_b32_e32 v40, 16, v47
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT:    v_lshlrev_b32_e32 v53, 16, v53
; SI-NEXT:    v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT:    v_lshlrev_b32_e32 v51, 16, v51
; SI-NEXT:    v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT:    v_lshlrev_b32_e32 v48, 16, v48
; SI-NEXT:    v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT:    v_lshlrev_b32_e32 v38, 16, v38
; SI-NEXT:    v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT:    v_lshlrev_b32_e32 v36, 16, v36
; SI-NEXT:    v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; SI-NEXT:    v_or_b32_e32 v1, v1, v40
; SI-NEXT:    v_or_b32_e32 v2, v2, v53
; SI-NEXT:    v_lshlrev_b32_e32 v53, 16, v46
; SI-NEXT:    v_or_b32_e32 v4, v4, v51
; SI-NEXT:    v_lshlrev_b32_e32 v51, 16, v45
; SI-NEXT:    v_or_b32_e32 v6, v6, v48
; SI-NEXT:    v_lshlrev_b32_e32 v48, 16, v44
; SI-NEXT:    v_or_b32_e32 v8, v8, v38
; SI-NEXT:    v_lshlrev_b32_e32 v38, 16, v43
; SI-NEXT:    v_or_b32_e32 v10, v10, v36
; SI-NEXT:    v_lshlrev_b32_e32 v36, 16, v42
; SI-NEXT:    v_or_b32_e32 v12, v12, v35
; SI-NEXT:    v_lshlrev_b32_e32 v35, 16, v41
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; SI-NEXT:    v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT:    v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT:    v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; SI-NEXT:    v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT:    v_lshlrev_b32_e32 v32, 16, v32
; SI-NEXT:    v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT:    v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT:    v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; SI-NEXT:    v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; SI-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; SI-NEXT:    v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT:    v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT:    v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT:    v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT:    v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT:    v_and_b32_e32 v13, 0xffff, v13
; SI-NEXT:    v_or_b32_e32 v14, v14, v34
; SI-NEXT:    v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT:    v_lshlrev_b32_e32 v34, 16, v55
; SI-NEXT:    v_or_b32_e32 v16, v16, v33
; SI-NEXT:    v_and_b32_e32 v17, 0xffff, v17
; SI-NEXT:    v_lshlrev_b32_e32 v33, 16, v54
; SI-NEXT:    v_or_b32_e32 v18, v18, v32
; SI-NEXT:    v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT:    v_lshlrev_b32_e32 v32, 16, v52
; SI-NEXT:    v_or_b32_e32 v20, v20, v31
; SI-NEXT:    v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT:    v_lshlrev_b32_e32 v31, 16, v50
; SI-NEXT:    v_or_b32_e32 v22, v22, v30
; SI-NEXT:    v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v49
; SI-NEXT:    v_or_b32_e32 v24, v24, v29
; SI-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v39
; SI-NEXT:    v_or_b32_e32 v26, v26, v28
; SI-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v37
; SI-NEXT:    v_or_b32_e32 v3, v3, v53
; SI-NEXT:    v_or_b32_e32 v5, v5, v51
; SI-NEXT:    v_or_b32_e32 v7, v7, v48
; SI-NEXT:    v_or_b32_e32 v9, v9, v38
; SI-NEXT:    v_or_b32_e32 v11, v11, v36
; SI-NEXT:    v_or_b32_e32 v13, v13, v35
; SI-NEXT:    v_or_b32_e32 v15, v15, v34
; SI-NEXT:    v_or_b32_e32 v17, v17, v33
; SI-NEXT:    v_or_b32_e32 v19, v19, v32
; SI-NEXT:    v_or_b32_e32 v21, v21, v31
; SI-NEXT:    v_or_b32_e32 v23, v23, v30
; SI-NEXT:    v_or_b32_e32 v25, v25, v29
; SI-NEXT:    v_or_b32_e32 v27, v27, v28
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v28i32_to_v56f16:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT:    ; implicit-def: $vgpr47
; VI-NEXT:    ; implicit-def: $vgpr46
; VI-NEXT:    ; implicit-def: $vgpr45
; VI-NEXT:    ; implicit-def: $vgpr44
; VI-NEXT:    ; implicit-def: $vgpr43
; VI-NEXT:    ; implicit-def: $vgpr42
; VI-NEXT:    ; implicit-def: $vgpr41
; VI-NEXT:    ; implicit-def: $vgpr40
; VI-NEXT:    ; implicit-def: $vgpr55
; VI-NEXT:    ; implicit-def: $vgpr54
; VI-NEXT:    ; implicit-def: $vgpr53
; VI-NEXT:    ; implicit-def: $vgpr52
; VI-NEXT:    ; implicit-def: $vgpr51
; VI-NEXT:    ; implicit-def: $vgpr50
; VI-NEXT:    ; implicit-def: $vgpr49
; VI-NEXT:    ; implicit-def: $vgpr48
; VI-NEXT:    ; implicit-def: $vgpr39
; VI-NEXT:    ; implicit-def: $vgpr38
; VI-NEXT:    ; implicit-def: $vgpr37
; VI-NEXT:    ; implicit-def: $vgpr36
; VI-NEXT:    ; implicit-def: $vgpr35
; VI-NEXT:    ; implicit-def: $vgpr34
; VI-NEXT:    ; implicit-def: $vgpr33
; VI-NEXT:    ; implicit-def: $vgpr32
; VI-NEXT:    ; implicit-def: $vgpr31
; VI-NEXT:    ; implicit-def: $vgpr30
; VI-NEXT:    ; implicit-def: $vgpr29
; VI-NEXT:    ; implicit-def: $vgpr28
; VI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB16_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; VI-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; VI-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; VI-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; VI-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; VI-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; VI-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; VI-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; VI-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; VI-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; VI-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; VI-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; VI-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; VI-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; VI-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; VI-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; VI-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; VI-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; VI-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; VI-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; VI-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; VI-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; VI-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; VI-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; VI-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; VI-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; VI-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; VI-NEXT:  .LBB16_2: ; %Flow
; VI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB16_4
; VI-NEXT:  ; %bb.3: ; %cmp.true
; VI-NEXT:    v_add_u32_e32 v27, vcc, 3, v27
; VI-NEXT:    v_add_u32_e32 v26, vcc, 3, v26
; VI-NEXT:    v_add_u32_e32 v25, vcc, 3, v25
; VI-NEXT:    v_add_u32_e32 v24, vcc, 3, v24
; VI-NEXT:    v_add_u32_e32 v23, vcc, 3, v23
; VI-NEXT:    v_add_u32_e32 v22, vcc, 3, v22
; VI-NEXT:    v_add_u32_e32 v21, vcc, 3, v21
; VI-NEXT:    v_add_u32_e32 v20, vcc, 3, v20
; VI-NEXT:    v_add_u32_e32 v19, vcc, 3, v19
; VI-NEXT:    v_add_u32_e32 v18, vcc, 3, v18
; VI-NEXT:    v_add_u32_e32 v17, vcc, 3, v17
; VI-NEXT:    v_add_u32_e32 v16, vcc, 3, v16
; VI-NEXT:    v_add_u32_e32 v15, vcc, 3, v15
; VI-NEXT:    v_add_u32_e32 v14, vcc, 3, v14
; VI-NEXT:    v_add_u32_e32 v13, vcc, 3, v13
; VI-NEXT:    v_add_u32_e32 v12, vcc, 3, v12
; VI-NEXT:    v_add_u32_e32 v11, vcc, 3, v11
; VI-NEXT:    v_add_u32_e32 v10, vcc, 3, v10
; VI-NEXT:    v_add_u32_e32 v9, vcc, 3, v9
; VI-NEXT:    v_add_u32_e32 v8, vcc, 3, v8
; VI-NEXT:    v_add_u32_e32 v7, vcc, 3, v7
; VI-NEXT:    v_add_u32_e32 v6, vcc, 3, v6
; VI-NEXT:    v_add_u32_e32 v5, vcc, 3, v5
; VI-NEXT:    v_add_u32_e32 v4, vcc, 3, v4
; VI-NEXT:    v_add_u32_e32 v3, vcc, 3, v3
; VI-NEXT:    v_add_u32_e32 v2, vcc, 3, v2
; VI-NEXT:    v_add_u32_e32 v1, vcc, 3, v1
; VI-NEXT:    v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; VI-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; VI-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; VI-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; VI-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; VI-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; VI-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; VI-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; VI-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; VI-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; VI-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; VI-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; VI-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; VI-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; VI-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; VI-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; VI-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; VI-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; VI-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; VI-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; VI-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; VI-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; VI-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; VI-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; VI-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; VI-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; VI-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; VI-NEXT:  .LBB16_4: ; %end
; VI-NEXT:    s_or_b64 exec, exec, s[4:5]
; VI-NEXT:    v_lshlrev_b32_e32 v47, 16, v47
; VI-NEXT:    v_lshlrev_b32_e32 v46, 16, v46
; VI-NEXT:    v_lshlrev_b32_e32 v45, 16, v45
; VI-NEXT:    v_lshlrev_b32_e32 v44, 16, v44
; VI-NEXT:    v_lshlrev_b32_e32 v43, 16, v43
; VI-NEXT:    v_lshlrev_b32_e32 v42, 16, v42
; VI-NEXT:    v_lshlrev_b32_e32 v41, 16, v41
; VI-NEXT:    v_lshlrev_b32_e32 v40, 16, v40
; VI-NEXT:    v_or_b32_sdwa v0, v0, v47 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v1, v1, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v2, v2, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v3, v3, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v4, v4, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v5, v5, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v6, v6, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v7, v7, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; VI-NEXT:    v_lshlrev_b32_e32 v55, 16, v55
; VI-NEXT:    v_lshlrev_b32_e32 v54, 16, v54
; VI-NEXT:    v_lshlrev_b32_e32 v53, 16, v53
; VI-NEXT:    v_lshlrev_b32_e32 v52, 16, v52
; VI-NEXT:    v_lshlrev_b32_e32 v51, 16, v51
; VI-NEXT:    v_lshlrev_b32_e32 v50, 16, v50
; VI-NEXT:    v_lshlrev_b32_e32 v49, 16, v49
; VI-NEXT:    v_lshlrev_b32_e32 v48, 16, v48
; VI-NEXT:    v_lshlrev_b32_e32 v39, 16, v39
; VI-NEXT:    v_lshlrev_b32_e32 v38, 16, v38
; VI-NEXT:    v_lshlrev_b32_e32 v37, 16, v37
; VI-NEXT:    v_lshlrev_b32_e32 v36, 16, v36
; VI-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v34
; VI-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; VI-NEXT:    v_lshlrev_b32_e32 v32, 16, v32
; VI-NEXT:    v_lshlrev_b32_e32 v31, 16, v31
; VI-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; VI-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; VI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; VI-NEXT:    v_or_b32_sdwa v8, v8, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v9, v9, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v10, v10, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v11, v11, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v12, v12, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v13, v13, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v14, v14, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v15, v15, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v16, v16, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v17, v17, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v18, v18, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v19, v19, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v20, v20, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v21, v21, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v22, v22, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v23, v23, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v24, v24, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v25, v25, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v26, v26, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v28i32_to_v56f16:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT:    ; implicit-def: $vgpr47
; GFX9-NEXT:    ; implicit-def: $vgpr46
; GFX9-NEXT:    ; implicit-def: $vgpr45
; GFX9-NEXT:    ; implicit-def: $vgpr44
; GFX9-NEXT:    ; implicit-def: $vgpr43
; GFX9-NEXT:    ; implicit-def: $vgpr42
; GFX9-NEXT:    ; implicit-def: $vgpr41
; GFX9-NEXT:    ; implicit-def: $vgpr40
; GFX9-NEXT:    ; implicit-def: $vgpr55
; GFX9-NEXT:    ; implicit-def: $vgpr54
; GFX9-NEXT:    ; implicit-def: $vgpr53
; GFX9-NEXT:    ; implicit-def: $vgpr52
; GFX9-NEXT:    ; implicit-def: $vgpr51
; GFX9-NEXT:    ; implicit-def: $vgpr50
; GFX9-NEXT:    ; implicit-def: $vgpr49
; GFX9-NEXT:    ; implicit-def: $vgpr48
; GFX9-NEXT:    ; implicit-def: $vgpr39
; GFX9-NEXT:    ; implicit-def: $vgpr38
; GFX9-NEXT:    ; implicit-def: $vgpr37
; GFX9-NEXT:    ; implicit-def: $vgpr36
; GFX9-NEXT:    ; implicit-def: $vgpr35
; GFX9-NEXT:    ; implicit-def: $vgpr34
; GFX9-NEXT:    ; implicit-def: $vgpr33
; GFX9-NEXT:    ; implicit-def: $vgpr32
; GFX9-NEXT:    ; implicit-def: $vgpr31
; GFX9-NEXT:    ; implicit-def: $vgpr30
; GFX9-NEXT:    ; implicit-def: $vgpr29
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB16_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX9-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX9-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX9-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX9-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX9-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX9-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX9-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX9-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX9-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX9-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX9-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX9-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX9-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX9-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX9-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX9-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; GFX9-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; GFX9-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; GFX9-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; GFX9-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; GFX9-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; GFX9-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; GFX9-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; GFX9-NEXT:  .LBB16_2: ; %Flow
; GFX9-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB16_4
; GFX9-NEXT:  ; %bb.3: ; %cmp.true
; GFX9-NEXT:    v_add_u32_e32 v27, 3, v27
; GFX9-NEXT:    v_add_u32_e32 v26, 3, v26
; GFX9-NEXT:    v_add_u32_e32 v25, 3, v25
; GFX9-NEXT:    v_add_u32_e32 v24, 3, v24
; GFX9-NEXT:    v_add_u32_e32 v23, 3, v23
; GFX9-NEXT:    v_add_u32_e32 v22, 3, v22
; GFX9-NEXT:    v_add_u32_e32 v21, 3, v21
; GFX9-NEXT:    v_add_u32_e32 v20, 3, v20
; GFX9-NEXT:    v_add_u32_e32 v19, 3, v19
; GFX9-NEXT:    v_add_u32_e32 v18, 3, v18
; GFX9-NEXT:    v_add_u32_e32 v17, 3, v17
; GFX9-NEXT:    v_add_u32_e32 v16, 3, v16
; GFX9-NEXT:    v_add_u32_e32 v15, 3, v15
; GFX9-NEXT:    v_add_u32_e32 v14, 3, v14
; GFX9-NEXT:    v_add_u32_e32 v13, 3, v13
; GFX9-NEXT:    v_add_u32_e32 v12, 3, v12
; GFX9-NEXT:    v_add_u32_e32 v11, 3, v11
; GFX9-NEXT:    v_add_u32_e32 v10, 3, v10
; GFX9-NEXT:    v_add_u32_e32 v9, 3, v9
; GFX9-NEXT:    v_add_u32_e32 v8, 3, v8
; GFX9-NEXT:    v_add_u32_e32 v7, 3, v7
; GFX9-NEXT:    v_add_u32_e32 v6, 3, v6
; GFX9-NEXT:    v_add_u32_e32 v5, 3, v5
; GFX9-NEXT:    v_add_u32_e32 v4, 3, v4
; GFX9-NEXT:    v_add_u32_e32 v3, 3, v3
; GFX9-NEXT:    v_add_u32_e32 v2, 3, v2
; GFX9-NEXT:    v_add_u32_e32 v1, 3, v1
; GFX9-NEXT:    v_add_u32_e32 v0, 3, v0
; GFX9-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX9-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX9-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX9-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX9-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX9-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX9-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX9-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX9-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX9-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX9-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX9-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX9-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX9-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX9-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX9-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX9-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; GFX9-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; GFX9-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; GFX9-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; GFX9-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; GFX9-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; GFX9-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; GFX9-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; GFX9-NEXT:  .LBB16_4: ; %end
; GFX9-NEXT:    s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT:    s_mov_b32 s4, 0x5040100
; GFX9-NEXT:    v_perm_b32 v0, v47, v0, s4
; GFX9-NEXT:    v_perm_b32 v1, v46, v1, s4
; GFX9-NEXT:    v_perm_b32 v2, v45, v2, s4
; GFX9-NEXT:    v_perm_b32 v3, v44, v3, s4
; GFX9-NEXT:    v_perm_b32 v4, v43, v4, s4
; GFX9-NEXT:    v_perm_b32 v5, v42, v5, s4
; GFX9-NEXT:    v_perm_b32 v6, v41, v6, s4
; GFX9-NEXT:    v_perm_b32 v7, v40, v7, s4
; GFX9-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; GFX9-NEXT:    v_perm_b32 v8, v55, v8, s4
; GFX9-NEXT:    v_perm_b32 v9, v54, v9, s4
; GFX9-NEXT:    v_perm_b32 v10, v53, v10, s4
; GFX9-NEXT:    v_perm_b32 v11, v52, v11, s4
; GFX9-NEXT:    v_perm_b32 v12, v51, v12, s4
; GFX9-NEXT:    v_perm_b32 v13, v50, v13, s4
; GFX9-NEXT:    v_perm_b32 v14, v49, v14, s4
; GFX9-NEXT:    v_perm_b32 v15, v48, v15, s4
; GFX9-NEXT:    v_perm_b32 v16, v39, v16, s4
; GFX9-NEXT:    v_perm_b32 v17, v38, v17, s4
; GFX9-NEXT:    v_perm_b32 v18, v37, v18, s4
; GFX9-NEXT:    v_perm_b32 v19, v36, v19, s4
; GFX9-NEXT:    v_perm_b32 v20, v35, v20, s4
; GFX9-NEXT:    v_perm_b32 v21, v34, v21, s4
; GFX9-NEXT:    v_perm_b32 v22, v33, v22, s4
; GFX9-NEXT:    v_perm_b32 v23, v32, v23, s4
; GFX9-NEXT:    v_perm_b32 v24, v31, v24, s4
; GFX9-NEXT:    v_perm_b32 v25, v30, v25, s4
; GFX9-NEXT:    v_perm_b32 v26, v29, v26, s4
; GFX9-NEXT:    v_perm_b32 v27, v28, v27, s4
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-TRUE16-LABEL: bitcast_v28i32_to_v56f16:
; GFX11-TRUE16:       ; %bb.0:
; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-TRUE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT:    s_cbranch_execz .LBB16_2
; GFX11-TRUE16-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v27, 3, v27
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v26, 3, v26
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v25, 3, v25
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v24, 3, v24
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v23, 3, v23
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v22, 3, v22
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v21, 3, v21
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v20, 3, v20
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v19, 3, v19
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v18, 3, v18
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v17, 3, v17
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v16, 3, v16
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v15, 3, v15
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v14, 3, v14
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v13, 3, v13
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v12, 3, v12
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v11, 3, v11
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v10, 3, v10
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v9, 3, v9
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v8, 3, v8
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v7, 3, v7
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v6, 3, v6
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v5, 3, v5
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v4, 3, v4
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v3, 3, v3
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v2, 3, v2
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v1, 3, v1
; GFX11-TRUE16-NEXT:    v_add_nc_u32_e32 v0, 3, v0
; GFX11-TRUE16-NEXT:  .LBB16_2: ; %end
; GFX11-TRUE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v28i32_to_v56f16:
; GFX11-FAKE16:       ; %bb.0:
; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v28
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr71
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr70
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr69
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr68
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr67
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr66
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr65
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr64
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr55
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr54
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr53
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr52
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr51
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr50
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr49
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr48
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr39
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr38
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr37
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr36
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr35
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr34
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr33
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr32
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr31
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr30
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr29
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr28
; GFX11-FAKE16-NEXT:    s_and_saveexec_b32 s0, vcc_lo
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_cbranch_execz .LBB16_2
; GFX11-FAKE16-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v3
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v2
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v0
; GFX11-FAKE16-NEXT:  .LBB16_2: ; %Flow
; GFX11-FAKE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-FAKE16-NEXT:    s_cbranch_execz .LBB16_4
; GFX11-FAKE16-NEXT:  ; %bb.3: ; %cmp.true
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v27, 3, v27
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v26, 3, v26
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v25, 3, v25
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v24, 3, v24
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v23, 3, v23
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v22, 3, v22
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v21, 3, v21
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v20, 3, v20
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v19, 3, v19
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v18, 3, v18
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v17, 3, v17
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v16, 3, v16
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v15, 3, v15
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v14, 3, v14
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v13, 3, v13
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v12, 3, v12
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v11, 3, v11
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v10, 3, v10
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v9, 3, v9
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v8, 3, v8
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v7, 3, v7
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v6, 3, v6
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v5, 3, v5
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v4, 3, v4
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v3, 3, v3
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v2, 3, v2
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v1, 3, v1
; GFX11-FAKE16-NEXT:    v_add_nc_u32_e32 v0, 3, v0
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v3
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v2
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v0
; GFX11-FAKE16-NEXT:  .LBB16_4: ; %end
; GFX11-FAKE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v71, v0, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v1, v70, v1, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v2, v69, v2, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v3, v68, v3, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v4, v67, v4, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v5, v66, v5, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v6, v65, v6, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v7, v64, v7, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v8, v55, v8, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v9, v54, v9, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v10, v53, v10, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v11, v52, v11, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v12, v51, v12, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v13, v50, v13, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v14, v49, v14, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v15, v48, v15, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v16, v39, v16, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v17, v38, v17, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v18, v37, v18, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v19, v36, v19, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v20, v35, v20, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v21, v34, v21, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v22, v33, v22, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v23, v32, v23, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v24, v31, v24, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v25, v30, v25, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v26, v29, v26, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v27, v28, v27, 0x5040100
; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = add <28 x i32> %a, splat (i32 3)
  %a2 = bitcast <28 x i32> %a1 to <56 x half>
  br label %end

cmp.false:
  %a3 = bitcast <28 x i32> %a to <56 x half>
  br label %end

end:
  %phi = phi <56 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <56 x half> %phi
}

define inreg <56 x half> @bitcast_v28i32_to_v56f16_scalar(<28 x i32> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v28i32_to_v56f16_scalar:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_store_dword v28, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_writelane_b32 v28, s34, 0
; SI-NEXT:    v_writelane_b32 v28, s35, 1
; SI-NEXT:    v_writelane_b32 v28, s36, 2
; SI-NEXT:    v_writelane_b32 v28, s37, 3
; SI-NEXT:    v_writelane_b32 v28, s38, 4
; SI-NEXT:    v_writelane_b32 v28, s30, 5
; SI-NEXT:    v_writelane_b32 v28, s31, 6
; SI-NEXT:    v_readfirstlane_b32 s40, v14
; SI-NEXT:    v_readfirstlane_b32 s5, v13
; SI-NEXT:    v_readfirstlane_b32 s4, v12
; SI-NEXT:    v_readfirstlane_b32 s7, v11
; SI-NEXT:    v_readfirstlane_b32 s6, v10
; SI-NEXT:    v_readfirstlane_b32 s9, v9
; SI-NEXT:    v_readfirstlane_b32 s8, v8
; SI-NEXT:    v_readfirstlane_b32 s11, v7
; SI-NEXT:    v_readfirstlane_b32 s10, v6
; SI-NEXT:    v_readfirstlane_b32 s13, v5
; SI-NEXT:    v_readfirstlane_b32 s12, v4
; SI-NEXT:    v_readfirstlane_b32 s15, v3
; SI-NEXT:    v_readfirstlane_b32 s14, v2
; SI-NEXT:    v_readfirstlane_b32 s41, v1
; SI-NEXT:    s_cmp_lg_u32 s40, 0
; SI-NEXT:    v_readfirstlane_b32 s40, v0
; SI-NEXT:    s_cbranch_scc0 .LBB17_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    s_lshr_b32 s44, s13, 16
; SI-NEXT:    s_lshr_b64 s[42:43], s[4:5], 16
; SI-NEXT:    s_lshr_b32 s46, s27, 16
; SI-NEXT:    s_mov_b32 s43, s44
; SI-NEXT:    s_lshr_b64 s[44:45], s[6:7], 16
; SI-NEXT:    s_lshr_b32 s56, s19, 16
; SI-NEXT:    s_mov_b32 s45, s46
; SI-NEXT:    s_lshr_b64 s[46:47], s[8:9], 16
; SI-NEXT:    s_lshr_b32 s94, s5, 16
; SI-NEXT:    s_lshr_b32 s95, s7, 16
; SI-NEXT:    s_lshr_b32 vcc_lo, s9, 16
; SI-NEXT:    s_lshr_b32 vcc_hi, s11, 16
; SI-NEXT:    s_lshr_b32 s30, s15, 16
; SI-NEXT:    s_lshr_b32 s31, s41, 16
; SI-NEXT:    s_lshr_b32 s34, s29, 16
; SI-NEXT:    s_lshr_b32 s35, s25, 16
; SI-NEXT:    s_lshr_b32 s36, s23, 16
; SI-NEXT:    s_lshr_b32 s37, s21, 16
; SI-NEXT:    s_lshr_b32 s38, s17, 16
; SI-NEXT:    s_mov_b32 s47, s56
; SI-NEXT:    s_lshr_b64 s[56:57], s[10:11], 16
; SI-NEXT:    s_lshr_b64 s[58:59], s[12:13], 16
; SI-NEXT:    s_lshr_b64 s[60:61], s[14:15], 16
; SI-NEXT:    s_lshr_b64 s[62:63], s[40:41], 16
; SI-NEXT:    s_lshr_b64 s[72:73], s[28:29], 16
; SI-NEXT:    s_lshr_b64 s[74:75], s[26:27], 16
; SI-NEXT:    s_branch .LBB17_3
; SI-NEXT:  .LBB17_2: ; %cmp.true
; SI-NEXT:    s_add_i32 s9, s9, 3
; SI-NEXT:    s_add_i32 s8, s8, 3
; SI-NEXT:    s_add_i32 s7, s7, 3
; SI-NEXT:    s_add_i32 s6, s6, 3
; SI-NEXT:    s_add_i32 s5, s5, 3
; SI-NEXT:    s_add_i32 s4, s4, 3
; SI-NEXT:    s_add_i32 s17, s17, 3
; SI-NEXT:    s_add_i32 s19, s19, 3
; SI-NEXT:    s_add_i32 s21, s21, 3
; SI-NEXT:    s_add_i32 s23, s23, 3
; SI-NEXT:    s_add_i32 s25, s25, 3
; SI-NEXT:    s_add_i32 s27, s27, 3
; SI-NEXT:    s_add_i32 s26, s26, 3
; SI-NEXT:    s_add_i32 s29, s29, 3
; SI-NEXT:    s_add_i32 s28, s28, 3
; SI-NEXT:    s_add_i32 s41, s41, 3
; SI-NEXT:    s_add_i32 s40, s40, 3
; SI-NEXT:    s_add_i32 s15, s15, 3
; SI-NEXT:    s_add_i32 s14, s14, 3
; SI-NEXT:    s_add_i32 s13, s13, 3
; SI-NEXT:    s_add_i32 s12, s12, 3
; SI-NEXT:    s_add_i32 s11, s11, 3
; SI-NEXT:    s_add_i32 s10, s10, 3
; SI-NEXT:    s_lshr_b64 s[42:43], s[4:5], 16
; SI-NEXT:    s_lshr_b64 s[44:45], s[6:7], 16
; SI-NEXT:    s_lshr_b64 s[46:47], s[8:9], 16
; SI-NEXT:    s_add_i32 s16, s16, 3
; SI-NEXT:    s_add_i32 s18, s18, 3
; SI-NEXT:    s_add_i32 s20, s20, 3
; SI-NEXT:    s_add_i32 s22, s22, 3
; SI-NEXT:    s_add_i32 s24, s24, 3
; SI-NEXT:    s_lshr_b64 s[56:57], s[10:11], 16
; SI-NEXT:    s_lshr_b64 s[58:59], s[12:13], 16
; SI-NEXT:    s_lshr_b64 s[60:61], s[14:15], 16
; SI-NEXT:    s_lshr_b64 s[62:63], s[40:41], 16
; SI-NEXT:    s_lshr_b64 s[72:73], s[28:29], 16
; SI-NEXT:    s_lshr_b64 s[74:75], s[26:27], 16
; SI-NEXT:    s_lshr_b32 s94, s5, 16
; SI-NEXT:    s_lshr_b32 s95, s7, 16
; SI-NEXT:    s_lshr_b32 vcc_lo, s9, 16
; SI-NEXT:    s_lshr_b32 vcc_hi, s11, 16
; SI-NEXT:    s_lshr_b32 s43, s13, 16
; SI-NEXT:    s_lshr_b32 s30, s15, 16
; SI-NEXT:    s_lshr_b32 s31, s41, 16
; SI-NEXT:    s_lshr_b32 s34, s29, 16
; SI-NEXT:    s_lshr_b32 s45, s27, 16
; SI-NEXT:    s_lshr_b32 s35, s25, 16
; SI-NEXT:    s_lshr_b32 s36, s23, 16
; SI-NEXT:    s_lshr_b32 s37, s21, 16
; SI-NEXT:    s_lshr_b32 s47, s19, 16
; SI-NEXT:    s_lshr_b32 s38, s17, 16
; SI-NEXT:  .LBB17_3: ; %end
; SI-NEXT:    s_lshr_b64 s[88:89], s[20:21], 16
; SI-NEXT:    s_lshr_b64 s[90:91], s[18:19], 16
; SI-NEXT:    s_and_b32 s19, s19, 0xffff
; SI-NEXT:    s_lshl_b32 s47, s47, 16
; SI-NEXT:    s_and_b32 s27, s27, 0xffff
; SI-NEXT:    s_lshl_b32 s45, s45, 16
; SI-NEXT:    s_or_b32 s19, s19, s47
; SI-NEXT:    s_lshl_b32 s47, s88, 16
; SI-NEXT:    s_and_b32 s20, s20, 0xffff
; SI-NEXT:    s_or_b32 s27, s27, s45
; SI-NEXT:    s_and_b32 s28, s28, 0xffff
; SI-NEXT:    s_lshl_b32 s45, s72, 16
; SI-NEXT:    s_and_b32 s13, s13, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s43, 16
; SI-NEXT:    s_lshr_b64 s[78:79], s[22:23], 16
; SI-NEXT:    s_or_b32 s20, s20, s47
; SI-NEXT:    s_and_b32 s21, s21, 0xffff
; SI-NEXT:    s_lshl_b32 s47, s37, 16
; SI-NEXT:    s_or_b32 s28, s28, s45
; SI-NEXT:    s_and_b32 s29, s29, 0xffff
; SI-NEXT:    s_lshl_b32 s45, s34, 16
; SI-NEXT:    s_or_b32 s13, s13, s43
; SI-NEXT:    s_and_b32 s10, s10, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s56, 16
; SI-NEXT:    s_or_b32 s21, s21, s47
; SI-NEXT:    s_lshl_b32 s47, s78, 16
; SI-NEXT:    s_and_b32 s22, s22, 0xffff
; SI-NEXT:    s_or_b32 s29, s29, s45
; SI-NEXT:    s_and_b32 s40, s40, 0xffff
; SI-NEXT:    s_lshl_b32 s45, s62, 16
; SI-NEXT:    s_or_b32 s10, s10, s43
; SI-NEXT:    s_and_b32 s11, s11, 0xffff
; SI-NEXT:    s_lshl_b32 s43, vcc_hi, 16
; SI-NEXT:    s_lshr_b64 s[76:77], s[24:25], 16
; SI-NEXT:    s_lshr_b64 s[92:93], s[16:17], 16
; SI-NEXT:    s_or_b32 s22, s22, s47
; SI-NEXT:    s_and_b32 s23, s23, 0xffff
; SI-NEXT:    s_lshl_b32 s47, s36, 16
; SI-NEXT:    s_or_b32 s40, s40, s45
; SI-NEXT:    s_and_b32 s41, s41, 0xffff
; SI-NEXT:    s_lshl_b32 s45, s31, 16
; SI-NEXT:    s_or_b32 s11, s11, s43
; SI-NEXT:    s_and_b32 s8, s8, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s46, 16
; SI-NEXT:    s_lshl_b32 s57, s92, 16
; SI-NEXT:    s_and_b32 s16, s16, 0xffff
; SI-NEXT:    s_or_b32 s23, s23, s47
; SI-NEXT:    s_and_b32 s24, s24, 0xffff
; SI-NEXT:    s_lshl_b32 s47, s76, 16
; SI-NEXT:    s_or_b32 s41, s41, s45
; SI-NEXT:    s_and_b32 s14, s14, 0xffff
; SI-NEXT:    s_lshl_b32 s45, s60, 16
; SI-NEXT:    s_or_b32 s8, s8, s43
; SI-NEXT:    s_and_b32 s9, s9, 0xffff
; SI-NEXT:    s_lshl_b32 s43, vcc_lo, 16
; SI-NEXT:    s_or_b32 s16, s16, s57
; SI-NEXT:    s_and_b32 s17, s17, 0xffff
; SI-NEXT:    s_lshl_b32 s57, s38, 16
; SI-NEXT:    s_or_b32 s24, s24, s47
; SI-NEXT:    s_and_b32 s25, s25, 0xffff
; SI-NEXT:    s_lshl_b32 s47, s35, 16
; SI-NEXT:    s_or_b32 s14, s14, s45
; SI-NEXT:    s_and_b32 s15, s15, 0xffff
; SI-NEXT:    s_lshl_b32 s45, s30, 16
; SI-NEXT:    s_or_b32 s9, s9, s43
; SI-NEXT:    s_and_b32 s6, s6, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s44, 16
; SI-NEXT:    s_and_b32 s4, s4, 0xffff
; SI-NEXT:    s_lshl_b32 s42, s42, 16
; SI-NEXT:    s_or_b32 s17, s17, s57
; SI-NEXT:    s_lshl_b32 s57, s90, 16
; SI-NEXT:    s_and_b32 s18, s18, 0xffff
; SI-NEXT:    s_or_b32 s25, s25, s47
; SI-NEXT:    s_and_b32 s26, s26, 0xffff
; SI-NEXT:    s_lshl_b32 s47, s74, 16
; SI-NEXT:    s_or_b32 s15, s15, s45
; SI-NEXT:    s_and_b32 s12, s12, 0xffff
; SI-NEXT:    s_lshl_b32 s45, s58, 16
; SI-NEXT:    s_or_b32 s6, s6, s43
; SI-NEXT:    s_and_b32 s7, s7, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s95, 16
; SI-NEXT:    s_or_b32 s4, s4, s42
; SI-NEXT:    s_and_b32 s5, s5, 0xffff
; SI-NEXT:    s_lshl_b32 s42, s94, 16
; SI-NEXT:    s_or_b32 s18, s18, s57
; SI-NEXT:    s_or_b32 s26, s26, s47
; SI-NEXT:    s_or_b32 s12, s12, s45
; SI-NEXT:    s_or_b32 s7, s7, s43
; SI-NEXT:    s_or_b32 s5, s5, s42
; SI-NEXT:    v_readlane_b32 s30, v28, 5
; SI-NEXT:    v_mov_b32_e32 v0, s16
; SI-NEXT:    v_mov_b32_e32 v1, s17
; SI-NEXT:    v_mov_b32_e32 v2, s18
; SI-NEXT:    v_mov_b32_e32 v3, s19
; SI-NEXT:    v_mov_b32_e32 v4, s20
; SI-NEXT:    v_mov_b32_e32 v5, s21
; SI-NEXT:    v_mov_b32_e32 v6, s22
; SI-NEXT:    v_mov_b32_e32 v7, s23
; SI-NEXT:    v_mov_b32_e32 v8, s24
; SI-NEXT:    v_mov_b32_e32 v9, s25
; SI-NEXT:    v_mov_b32_e32 v10, s26
; SI-NEXT:    v_mov_b32_e32 v11, s27
; SI-NEXT:    v_mov_b32_e32 v12, s28
; SI-NEXT:    v_mov_b32_e32 v13, s29
; SI-NEXT:    v_mov_b32_e32 v14, s40
; SI-NEXT:    v_mov_b32_e32 v15, s41
; SI-NEXT:    v_mov_b32_e32 v16, s14
; SI-NEXT:    v_mov_b32_e32 v17, s15
; SI-NEXT:    v_mov_b32_e32 v18, s12
; SI-NEXT:    v_mov_b32_e32 v19, s13
; SI-NEXT:    v_mov_b32_e32 v20, s10
; SI-NEXT:    v_mov_b32_e32 v21, s11
; SI-NEXT:    v_mov_b32_e32 v22, s8
; SI-NEXT:    v_mov_b32_e32 v23, s9
; SI-NEXT:    v_mov_b32_e32 v24, s6
; SI-NEXT:    v_mov_b32_e32 v25, s7
; SI-NEXT:    v_mov_b32_e32 v26, s4
; SI-NEXT:    v_mov_b32_e32 v27, s5
; SI-NEXT:    v_readlane_b32 s31, v28, 6
; SI-NEXT:    v_readlane_b32 s38, v28, 4
; SI-NEXT:    v_readlane_b32 s37, v28, 3
; SI-NEXT:    v_readlane_b32 s36, v28, 2
; SI-NEXT:    v_readlane_b32 s35, v28, 1
; SI-NEXT:    v_readlane_b32 s34, v28, 0
; SI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v28i32_to_v56f16_scalar:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    v_readfirstlane_b32 s41, v14
; VI-NEXT:    v_readfirstlane_b32 s4, v13
; VI-NEXT:    v_readfirstlane_b32 s5, v12
; VI-NEXT:    v_readfirstlane_b32 s6, v11
; VI-NEXT:    v_readfirstlane_b32 s7, v10
; VI-NEXT:    v_readfirstlane_b32 s8, v9
; VI-NEXT:    v_readfirstlane_b32 s9, v8
; VI-NEXT:    v_readfirstlane_b32 s10, v7
; VI-NEXT:    v_readfirstlane_b32 s11, v6
; VI-NEXT:    v_readfirstlane_b32 s12, v5
; VI-NEXT:    v_readfirstlane_b32 s13, v4
; VI-NEXT:    v_readfirstlane_b32 s14, v3
; VI-NEXT:    v_readfirstlane_b32 s15, v2
; VI-NEXT:    v_readfirstlane_b32 s40, v1
; VI-NEXT:    s_cmp_lg_u32 s41, 0
; VI-NEXT:    v_readfirstlane_b32 s41, v0
; VI-NEXT:    s_cbranch_scc1 .LBB17_2
; VI-NEXT:  ; %bb.1: ; %cmp.true
; VI-NEXT:    s_add_i32 s4, s4, 3
; VI-NEXT:    s_add_i32 s5, s5, 3
; VI-NEXT:    s_add_i32 s6, s6, 3
; VI-NEXT:    s_add_i32 s7, s7, 3
; VI-NEXT:    s_add_i32 s8, s8, 3
; VI-NEXT:    s_add_i32 s9, s9, 3
; VI-NEXT:    s_add_i32 s10, s10, 3
; VI-NEXT:    s_add_i32 s11, s11, 3
; VI-NEXT:    s_add_i32 s12, s12, 3
; VI-NEXT:    s_add_i32 s13, s13, 3
; VI-NEXT:    s_add_i32 s14, s14, 3
; VI-NEXT:    s_add_i32 s15, s15, 3
; VI-NEXT:    s_add_i32 s40, s40, 3
; VI-NEXT:    s_add_i32 s41, s41, 3
; VI-NEXT:    s_add_i32 s29, s29, 3
; VI-NEXT:    s_add_i32 s28, s28, 3
; VI-NEXT:    s_add_i32 s27, s27, 3
; VI-NEXT:    s_add_i32 s26, s26, 3
; VI-NEXT:    s_add_i32 s25, s25, 3
; VI-NEXT:    s_add_i32 s24, s24, 3
; VI-NEXT:    s_add_i32 s23, s23, 3
; VI-NEXT:    s_add_i32 s22, s22, 3
; VI-NEXT:    s_add_i32 s21, s21, 3
; VI-NEXT:    s_add_i32 s20, s20, 3
; VI-NEXT:    s_add_i32 s19, s19, 3
; VI-NEXT:    s_add_i32 s18, s18, 3
; VI-NEXT:    s_add_i32 s17, s17, 3
; VI-NEXT:    s_add_i32 s16, s16, 3
; VI-NEXT:  .LBB17_2: ; %cmp.false
; VI-NEXT:    s_lshr_b32 s42, s4, 16
; VI-NEXT:    s_lshr_b32 s43, s5, 16
; VI-NEXT:    s_lshr_b32 s44, s6, 16
; VI-NEXT:    s_lshr_b32 s45, s7, 16
; VI-NEXT:    s_lshr_b32 s46, s8, 16
; VI-NEXT:    s_lshr_b32 s47, s9, 16
; VI-NEXT:    s_lshr_b32 s56, s10, 16
; VI-NEXT:    s_lshr_b32 s57, s11, 16
; VI-NEXT:    s_lshr_b32 s58, s12, 16
; VI-NEXT:    s_lshr_b32 s59, s13, 16
; VI-NEXT:    s_lshr_b32 s60, s14, 16
; VI-NEXT:    s_lshr_b32 s61, s15, 16
; VI-NEXT:    s_lshr_b32 s62, s40, 16
; VI-NEXT:    s_lshr_b32 s63, s41, 16
; VI-NEXT:    s_lshr_b32 s72, s29, 16
; VI-NEXT:    s_lshr_b32 s73, s28, 16
; VI-NEXT:    s_lshr_b32 s74, s27, 16
; VI-NEXT:    s_lshr_b32 s75, s26, 16
; VI-NEXT:    s_lshr_b32 s76, s25, 16
; VI-NEXT:    s_lshr_b32 s77, s24, 16
; VI-NEXT:    s_lshr_b32 s78, s23, 16
; VI-NEXT:    s_lshr_b32 s79, s22, 16
; VI-NEXT:    s_lshr_b32 s88, s21, 16
; VI-NEXT:    s_lshr_b32 s89, s20, 16
; VI-NEXT:    s_lshr_b32 s90, s19, 16
; VI-NEXT:    s_lshr_b32 s91, s18, 16
; VI-NEXT:    s_lshr_b32 vcc_lo, s17, 16
; VI-NEXT:    s_lshr_b32 vcc_hi, s16, 16
; VI-NEXT:    s_and_b32 s16, 0xffff, s16
; VI-NEXT:    s_lshl_b32 vcc_hi, vcc_hi, 16
; VI-NEXT:    s_and_b32 s17, 0xffff, s17
; VI-NEXT:    s_lshl_b32 vcc_lo, vcc_lo, 16
; VI-NEXT:    s_and_b32 s18, 0xffff, s18
; VI-NEXT:    s_lshl_b32 s91, s91, 16
; VI-NEXT:    s_and_b32 s19, 0xffff, s19
; VI-NEXT:    s_lshl_b32 s90, s90, 16
; VI-NEXT:    s_and_b32 s20, 0xffff, s20
; VI-NEXT:    s_lshl_b32 s89, s89, 16
; VI-NEXT:    s_and_b32 s21, 0xffff, s21
; VI-NEXT:    s_lshl_b32 s88, s88, 16
; VI-NEXT:    s_and_b32 s22, 0xffff, s22
; VI-NEXT:    s_lshl_b32 s79, s79, 16
; VI-NEXT:    s_and_b32 s23, 0xffff, s23
; VI-NEXT:    s_lshl_b32 s78, s78, 16
; VI-NEXT:    s_and_b32 s24, 0xffff, s24
; VI-NEXT:    s_lshl_b32 s77, s77, 16
; VI-NEXT:    s_and_b32 s25, 0xffff, s25
; VI-NEXT:    s_lshl_b32 s76, s76, 16
; VI-NEXT:    s_and_b32 s26, 0xffff, s26
; VI-NEXT:    s_lshl_b32 s75, s75, 16
; VI-NEXT:    s_and_b32 s27, 0xffff, s27
; VI-NEXT:    s_lshl_b32 s74, s74, 16
; VI-NEXT:    s_and_b32 s28, 0xffff, s28
; VI-NEXT:    s_lshl_b32 s73, s73, 16
; VI-NEXT:    s_and_b32 s29, 0xffff, s29
; VI-NEXT:    s_lshl_b32 s72, s72, 16
; VI-NEXT:    s_and_b32 s41, 0xffff, s41
; VI-NEXT:    s_lshl_b32 s63, s63, 16
; VI-NEXT:    s_and_b32 s40, 0xffff, s40
; VI-NEXT:    s_lshl_b32 s62, s62, 16
; VI-NEXT:    s_and_b32 s15, 0xffff, s15
; VI-NEXT:    s_lshl_b32 s61, s61, 16
; VI-NEXT:    s_and_b32 s14, 0xffff, s14
; VI-NEXT:    s_lshl_b32 s60, s60, 16
; VI-NEXT:    s_and_b32 s13, 0xffff, s13
; VI-NEXT:    s_lshl_b32 s59, s59, 16
; VI-NEXT:    s_and_b32 s12, 0xffff, s12
; VI-NEXT:    s_lshl_b32 s58, s58, 16
; VI-NEXT:    s_and_b32 s11, 0xffff, s11
; VI-NEXT:    s_lshl_b32 s57, s57, 16
; VI-NEXT:    s_and_b32 s10, 0xffff, s10
; VI-NEXT:    s_lshl_b32 s56, s56, 16
; VI-NEXT:    s_and_b32 s9, 0xffff, s9
; VI-NEXT:    s_lshl_b32 s47, s47, 16
; VI-NEXT:    s_and_b32 s8, 0xffff, s8
; VI-NEXT:    s_lshl_b32 s46, s46, 16
; VI-NEXT:    s_and_b32 s7, 0xffff, s7
; VI-NEXT:    s_lshl_b32 s45, s45, 16
; VI-NEXT:    s_and_b32 s6, 0xffff, s6
; VI-NEXT:    s_lshl_b32 s44, s44, 16
; VI-NEXT:    s_and_b32 s5, 0xffff, s5
; VI-NEXT:    s_lshl_b32 s43, s43, 16
; VI-NEXT:    s_and_b32 s4, 0xffff, s4
; VI-NEXT:    s_lshl_b32 s42, s42, 16
; VI-NEXT:    s_or_b32 s16, s16, vcc_hi
; VI-NEXT:    s_or_b32 s17, s17, vcc_lo
; VI-NEXT:    s_or_b32 s18, s18, s91
; VI-NEXT:    s_or_b32 s19, s19, s90
; VI-NEXT:    s_or_b32 s20, s20, s89
; VI-NEXT:    s_or_b32 s21, s21, s88
; VI-NEXT:    s_or_b32 s22, s22, s79
; VI-NEXT:    s_or_b32 s23, s23, s78
; VI-NEXT:    s_or_b32 s24, s24, s77
; VI-NEXT:    s_or_b32 s25, s25, s76
; VI-NEXT:    s_or_b32 s26, s26, s75
; VI-NEXT:    s_or_b32 s27, s27, s74
; VI-NEXT:    s_or_b32 s28, s28, s73
; VI-NEXT:    s_or_b32 s29, s29, s72
; VI-NEXT:    s_or_b32 s41, s41, s63
; VI-NEXT:    s_or_b32 s40, s40, s62
; VI-NEXT:    s_or_b32 s15, s15, s61
; VI-NEXT:    s_or_b32 s14, s14, s60
; VI-NEXT:    s_or_b32 s13, s13, s59
; VI-NEXT:    s_or_b32 s12, s12, s58
; VI-NEXT:    s_or_b32 s11, s11, s57
; VI-NEXT:    s_or_b32 s10, s10, s56
; VI-NEXT:    s_or_b32 s9, s9, s47
; VI-NEXT:    s_or_b32 s8, s8, s46
; VI-NEXT:    s_or_b32 s7, s7, s45
; VI-NEXT:    s_or_b32 s6, s6, s44
; VI-NEXT:    s_or_b32 s5, s5, s43
; VI-NEXT:    s_or_b32 s4, s4, s42
; VI-NEXT:    v_mov_b32_e32 v0, s16
; VI-NEXT:    v_mov_b32_e32 v1, s17
; VI-NEXT:    v_mov_b32_e32 v2, s18
; VI-NEXT:    v_mov_b32_e32 v3, s19
; VI-NEXT:    v_mov_b32_e32 v4, s20
; VI-NEXT:    v_mov_b32_e32 v5, s21
; VI-NEXT:    v_mov_b32_e32 v6, s22
; VI-NEXT:    v_mov_b32_e32 v7, s23
; VI-NEXT:    v_mov_b32_e32 v8, s24
; VI-NEXT:    v_mov_b32_e32 v9, s25
; VI-NEXT:    v_mov_b32_e32 v10, s26
; VI-NEXT:    v_mov_b32_e32 v11, s27
; VI-NEXT:    v_mov_b32_e32 v12, s28
; VI-NEXT:    v_mov_b32_e32 v13, s29
; VI-NEXT:    v_mov_b32_e32 v14, s41
; VI-NEXT:    v_mov_b32_e32 v15, s40
; VI-NEXT:    v_mov_b32_e32 v16, s15
; VI-NEXT:    v_mov_b32_e32 v17, s14
; VI-NEXT:    v_mov_b32_e32 v18, s13
; VI-NEXT:    v_mov_b32_e32 v19, s12
; VI-NEXT:    v_mov_b32_e32 v20, s11
; VI-NEXT:    v_mov_b32_e32 v21, s10
; VI-NEXT:    v_mov_b32_e32 v22, s9
; VI-NEXT:    v_mov_b32_e32 v23, s8
; VI-NEXT:    v_mov_b32_e32 v24, s7
; VI-NEXT:    v_mov_b32_e32 v25, s6
; VI-NEXT:    v_mov_b32_e32 v26, s5
; VI-NEXT:    v_mov_b32_e32 v27, s4
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v28i32_to_v56f16_scalar:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_readfirstlane_b32 s41, v14
; GFX9-NEXT:    v_readfirstlane_b32 s4, v13
; GFX9-NEXT:    v_readfirstlane_b32 s5, v12
; GFX9-NEXT:    v_readfirstlane_b32 s6, v11
; GFX9-NEXT:    v_readfirstlane_b32 s7, v10
; GFX9-NEXT:    v_readfirstlane_b32 s8, v9
; GFX9-NEXT:    v_readfirstlane_b32 s9, v8
; GFX9-NEXT:    v_readfirstlane_b32 s10, v7
; GFX9-NEXT:    v_readfirstlane_b32 s11, v6
; GFX9-NEXT:    v_readfirstlane_b32 s12, v5
; GFX9-NEXT:    v_readfirstlane_b32 s13, v4
; GFX9-NEXT:    v_readfirstlane_b32 s14, v3
; GFX9-NEXT:    v_readfirstlane_b32 s15, v2
; GFX9-NEXT:    v_readfirstlane_b32 s40, v1
; GFX9-NEXT:    s_cmp_lg_u32 s41, 0
; GFX9-NEXT:    v_readfirstlane_b32 s41, v0
; GFX9-NEXT:    s_cbranch_scc1 .LBB17_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.true
; GFX9-NEXT:    s_add_i32 s4, s4, 3
; GFX9-NEXT:    s_add_i32 s5, s5, 3
; GFX9-NEXT:    s_add_i32 s6, s6, 3
; GFX9-NEXT:    s_add_i32 s7, s7, 3
; GFX9-NEXT:    s_add_i32 s8, s8, 3
; GFX9-NEXT:    s_add_i32 s9, s9, 3
; GFX9-NEXT:    s_add_i32 s10, s10, 3
; GFX9-NEXT:    s_add_i32 s11, s11, 3
; GFX9-NEXT:    s_add_i32 s12, s12, 3
; GFX9-NEXT:    s_add_i32 s13, s13, 3
; GFX9-NEXT:    s_add_i32 s14, s14, 3
; GFX9-NEXT:    s_add_i32 s15, s15, 3
; GFX9-NEXT:    s_add_i32 s40, s40, 3
; GFX9-NEXT:    s_add_i32 s41, s41, 3
; GFX9-NEXT:    s_add_i32 s29, s29, 3
; GFX9-NEXT:    s_add_i32 s28, s28, 3
; GFX9-NEXT:    s_add_i32 s27, s27, 3
; GFX9-NEXT:    s_add_i32 s26, s26, 3
; GFX9-NEXT:    s_add_i32 s25, s25, 3
; GFX9-NEXT:    s_add_i32 s24, s24, 3
; GFX9-NEXT:    s_add_i32 s23, s23, 3
; GFX9-NEXT:    s_add_i32 s22, s22, 3
; GFX9-NEXT:    s_add_i32 s21, s21, 3
; GFX9-NEXT:    s_add_i32 s20, s20, 3
; GFX9-NEXT:    s_add_i32 s19, s19, 3
; GFX9-NEXT:    s_add_i32 s18, s18, 3
; GFX9-NEXT:    s_add_i32 s17, s17, 3
; GFX9-NEXT:    s_add_i32 s16, s16, 3
; GFX9-NEXT:  .LBB17_2: ; %cmp.false
; GFX9-NEXT:    s_lshr_b32 s42, s4, 16
; GFX9-NEXT:    s_lshr_b32 s43, s5, 16
; GFX9-NEXT:    s_lshr_b32 s44, s6, 16
; GFX9-NEXT:    s_lshr_b32 s45, s7, 16
; GFX9-NEXT:    s_lshr_b32 s46, s8, 16
; GFX9-NEXT:    s_lshr_b32 s47, s9, 16
; GFX9-NEXT:    s_lshr_b32 s56, s10, 16
; GFX9-NEXT:    s_lshr_b32 s57, s11, 16
; GFX9-NEXT:    s_lshr_b32 s58, s12, 16
; GFX9-NEXT:    s_lshr_b32 s59, s13, 16
; GFX9-NEXT:    s_lshr_b32 s60, s14, 16
; GFX9-NEXT:    s_lshr_b32 s61, s15, 16
; GFX9-NEXT:    s_lshr_b32 s62, s40, 16
; GFX9-NEXT:    s_lshr_b32 s63, s41, 16
; GFX9-NEXT:    s_lshr_b32 s72, s29, 16
; GFX9-NEXT:    s_lshr_b32 s73, s28, 16
; GFX9-NEXT:    s_lshr_b32 s74, s27, 16
; GFX9-NEXT:    s_lshr_b32 s75, s26, 16
; GFX9-NEXT:    s_lshr_b32 s76, s25, 16
; GFX9-NEXT:    s_lshr_b32 s77, s24, 16
; GFX9-NEXT:    s_lshr_b32 s78, s23, 16
; GFX9-NEXT:    s_lshr_b32 s79, s22, 16
; GFX9-NEXT:    s_lshr_b32 s88, s21, 16
; GFX9-NEXT:    s_lshr_b32 s89, s20, 16
; GFX9-NEXT:    s_lshr_b32 s90, s19, 16
; GFX9-NEXT:    s_lshr_b32 s91, s18, 16
; GFX9-NEXT:    s_lshr_b32 s92, s17, 16
; GFX9-NEXT:    s_lshr_b32 s93, s16, 16
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s16, s93
; GFX9-NEXT:    s_pack_ll_b32_b16 s17, s17, s92
; GFX9-NEXT:    s_pack_ll_b32_b16 s18, s18, s91
; GFX9-NEXT:    s_pack_ll_b32_b16 s19, s19, s90
; GFX9-NEXT:    s_pack_ll_b32_b16 s20, s20, s89
; GFX9-NEXT:    s_pack_ll_b32_b16 s21, s21, s88
; GFX9-NEXT:    s_pack_ll_b32_b16 s22, s22, s79
; GFX9-NEXT:    s_pack_ll_b32_b16 s23, s23, s78
; GFX9-NEXT:    s_pack_ll_b32_b16 s24, s24, s77
; GFX9-NEXT:    s_pack_ll_b32_b16 s25, s25, s76
; GFX9-NEXT:    s_pack_ll_b32_b16 s26, s26, s75
; GFX9-NEXT:    s_pack_ll_b32_b16 s27, s27, s74
; GFX9-NEXT:    s_pack_ll_b32_b16 s28, s28, s73
; GFX9-NEXT:    s_pack_ll_b32_b16 s29, s29, s72
; GFX9-NEXT:    s_pack_ll_b32_b16 s41, s41, s63
; GFX9-NEXT:    s_pack_ll_b32_b16 s40, s40, s62
; GFX9-NEXT:    s_pack_ll_b32_b16 s15, s15, s61
; GFX9-NEXT:    s_pack_ll_b32_b16 s14, s14, s60
; GFX9-NEXT:    s_pack_ll_b32_b16 s13, s13, s59
; GFX9-NEXT:    s_pack_ll_b32_b16 s12, s12, s58
; GFX9-NEXT:    s_pack_ll_b32_b16 s11, s11, s57
; GFX9-NEXT:    s_pack_ll_b32_b16 s10, s10, s56
; GFX9-NEXT:    s_pack_ll_b32_b16 s9, s9, s47
; GFX9-NEXT:    s_pack_ll_b32_b16 s8, s8, s46
; GFX9-NEXT:    s_pack_ll_b32_b16 s7, s7, s45
; GFX9-NEXT:    s_pack_ll_b32_b16 s6, s6, s44
; GFX9-NEXT:    s_pack_ll_b32_b16 s5, s5, s43
; GFX9-NEXT:    s_pack_ll_b32_b16 s4, s4, s42
; GFX9-NEXT:    v_mov_b32_e32 v0, s16
; GFX9-NEXT:    v_mov_b32_e32 v1, s17
; GFX9-NEXT:    v_mov_b32_e32 v2, s18
; GFX9-NEXT:    v_mov_b32_e32 v3, s19
; GFX9-NEXT:    v_mov_b32_e32 v4, s20
; GFX9-NEXT:    v_mov_b32_e32 v5, s21
; GFX9-NEXT:    v_mov_b32_e32 v6, s22
; GFX9-NEXT:    v_mov_b32_e32 v7, s23
; GFX9-NEXT:    v_mov_b32_e32 v8, s24
; GFX9-NEXT:    v_mov_b32_e32 v9, s25
; GFX9-NEXT:    v_mov_b32_e32 v10, s26
; GFX9-NEXT:    v_mov_b32_e32 v11, s27
; GFX9-NEXT:    v_mov_b32_e32 v12, s28
; GFX9-NEXT:    v_mov_b32_e32 v13, s29
; GFX9-NEXT:    v_mov_b32_e32 v14, s41
; GFX9-NEXT:    v_mov_b32_e32 v15, s40
; GFX9-NEXT:    v_mov_b32_e32 v16, s15
; GFX9-NEXT:    v_mov_b32_e32 v17, s14
; GFX9-NEXT:    v_mov_b32_e32 v18, s13
; GFX9-NEXT:    v_mov_b32_e32 v19, s12
; GFX9-NEXT:    v_mov_b32_e32 v20, s11
; GFX9-NEXT:    v_mov_b32_e32 v21, s10
; GFX9-NEXT:    v_mov_b32_e32 v22, s9
; GFX9-NEXT:    v_mov_b32_e32 v23, s8
; GFX9-NEXT:    v_mov_b32_e32 v24, s7
; GFX9-NEXT:    v_mov_b32_e32 v25, s6
; GFX9-NEXT:    v_mov_b32_e32 v26, s5
; GFX9-NEXT:    v_mov_b32_e32 v27, s4
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v28i32_to_v56f16_scalar:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_readfirstlane_b32 s14, v10
; GFX11-NEXT:    v_readfirstlane_b32 s4, v9
; GFX11-NEXT:    v_readfirstlane_b32 s5, v8
; GFX11-NEXT:    v_readfirstlane_b32 s6, v7
; GFX11-NEXT:    v_readfirstlane_b32 s7, v6
; GFX11-NEXT:    v_readfirstlane_b32 s8, v5
; GFX11-NEXT:    v_readfirstlane_b32 s9, v4
; GFX11-NEXT:    v_readfirstlane_b32 s10, v3
; GFX11-NEXT:    v_readfirstlane_b32 s11, v2
; GFX11-NEXT:    v_readfirstlane_b32 s12, v1
; GFX11-NEXT:    v_readfirstlane_b32 s13, v0
; GFX11-NEXT:    s_cmp_lg_u32 s14, 0
; GFX11-NEXT:    s_cbranch_scc1 .LBB17_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-NEXT:    s_add_i32 s4, s4, 3
; GFX11-NEXT:    s_add_i32 s5, s5, 3
; GFX11-NEXT:    s_add_i32 s6, s6, 3
; GFX11-NEXT:    s_add_i32 s7, s7, 3
; GFX11-NEXT:    s_add_i32 s8, s8, 3
; GFX11-NEXT:    s_add_i32 s9, s9, 3
; GFX11-NEXT:    s_add_i32 s10, s10, 3
; GFX11-NEXT:    s_add_i32 s11, s11, 3
; GFX11-NEXT:    s_add_i32 s12, s12, 3
; GFX11-NEXT:    s_add_i32 s13, s13, 3
; GFX11-NEXT:    s_add_i32 s29, s29, 3
; GFX11-NEXT:    s_add_i32 s28, s28, 3
; GFX11-NEXT:    s_add_i32 s27, s27, 3
; GFX11-NEXT:    s_add_i32 s26, s26, 3
; GFX11-NEXT:    s_add_i32 s25, s25, 3
; GFX11-NEXT:    s_add_i32 s24, s24, 3
; GFX11-NEXT:    s_add_i32 s23, s23, 3
; GFX11-NEXT:    s_add_i32 s22, s22, 3
; GFX11-NEXT:    s_add_i32 s21, s21, 3
; GFX11-NEXT:    s_add_i32 s20, s20, 3
; GFX11-NEXT:    s_add_i32 s19, s19, 3
; GFX11-NEXT:    s_add_i32 s18, s18, 3
; GFX11-NEXT:    s_add_i32 s17, s17, 3
; GFX11-NEXT:    s_add_i32 s16, s16, 3
; GFX11-NEXT:    s_add_i32 s3, s3, 3
; GFX11-NEXT:    s_add_i32 s2, s2, 3
; GFX11-NEXT:    s_add_i32 s1, s1, 3
; GFX11-NEXT:    s_add_i32 s0, s0, 3
; GFX11-NEXT:  .LBB17_2: ; %cmp.false
; GFX11-NEXT:    s_lshr_b32 s14, s4, 16
; GFX11-NEXT:    s_lshr_b32 s15, s5, 16
; GFX11-NEXT:    s_lshr_b32 s40, s6, 16
; GFX11-NEXT:    s_lshr_b32 s41, s7, 16
; GFX11-NEXT:    s_lshr_b32 s42, s8, 16
; GFX11-NEXT:    s_lshr_b32 s43, s9, 16
; GFX11-NEXT:    s_lshr_b32 s44, s10, 16
; GFX11-NEXT:    s_lshr_b32 s45, s11, 16
; GFX11-NEXT:    s_lshr_b32 s46, s12, 16
; GFX11-NEXT:    s_lshr_b32 s47, s13, 16
; GFX11-NEXT:    s_lshr_b32 s56, s29, 16
; GFX11-NEXT:    s_lshr_b32 s57, s28, 16
; GFX11-NEXT:    s_lshr_b32 s58, s27, 16
; GFX11-NEXT:    s_lshr_b32 s59, s26, 16
; GFX11-NEXT:    s_lshr_b32 s60, s25, 16
; GFX11-NEXT:    s_lshr_b32 s61, s24, 16
; GFX11-NEXT:    s_lshr_b32 s62, s23, 16
; GFX11-NEXT:    s_lshr_b32 s63, s22, 16
; GFX11-NEXT:    s_lshr_b32 s72, s21, 16
; GFX11-NEXT:    s_lshr_b32 s73, s20, 16
; GFX11-NEXT:    s_lshr_b32 s74, s19, 16
; GFX11-NEXT:    s_lshr_b32 s75, s18, 16
; GFX11-NEXT:    s_lshr_b32 s76, s17, 16
; GFX11-NEXT:    s_lshr_b32 s77, s16, 16
; GFX11-NEXT:    s_lshr_b32 s78, s3, 16
; GFX11-NEXT:    s_lshr_b32 s79, s2, 16
; GFX11-NEXT:    s_lshr_b32 s88, s1, 16
; GFX11-NEXT:    s_lshr_b32 s89, s0, 16
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s1, s88
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s0, s89
; GFX11-NEXT:    s_pack_ll_b32_b16 s2, s2, s79
; GFX11-NEXT:    s_pack_ll_b32_b16 s3, s3, s78
; GFX11-NEXT:    s_pack_ll_b32_b16 s16, s16, s77
; GFX11-NEXT:    s_pack_ll_b32_b16 s17, s17, s76
; GFX11-NEXT:    s_pack_ll_b32_b16 s18, s18, s75
; GFX11-NEXT:    s_pack_ll_b32_b16 s19, s19, s74
; GFX11-NEXT:    s_pack_ll_b32_b16 s20, s20, s73
; GFX11-NEXT:    s_pack_ll_b32_b16 s21, s21, s72
; GFX11-NEXT:    s_pack_ll_b32_b16 s22, s22, s63
; GFX11-NEXT:    s_pack_ll_b32_b16 s23, s23, s62
; GFX11-NEXT:    s_pack_ll_b32_b16 s24, s24, s61
; GFX11-NEXT:    s_pack_ll_b32_b16 s25, s25, s60
; GFX11-NEXT:    s_pack_ll_b32_b16 s26, s26, s59
; GFX11-NEXT:    s_pack_ll_b32_b16 s27, s27, s58
; GFX11-NEXT:    s_pack_ll_b32_b16 s28, s28, s57
; GFX11-NEXT:    s_pack_ll_b32_b16 s29, s29, s56
; GFX11-NEXT:    s_pack_ll_b32_b16 s13, s13, s47
; GFX11-NEXT:    s_pack_ll_b32_b16 s12, s12, s46
; GFX11-NEXT:    s_pack_ll_b32_b16 s11, s11, s45
; GFX11-NEXT:    s_pack_ll_b32_b16 s10, s10, s44
; GFX11-NEXT:    s_pack_ll_b32_b16 s9, s9, s43
; GFX11-NEXT:    s_pack_ll_b32_b16 s8, s8, s42
; GFX11-NEXT:    s_pack_ll_b32_b16 s7, s7, s41
; GFX11-NEXT:    s_pack_ll_b32_b16 s6, s6, s40
; GFX11-NEXT:    s_pack_ll_b32_b16 s5, s5, s15
; GFX11-NEXT:    s_pack_ll_b32_b16 s4, s4, s14
; GFX11-NEXT:    v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX11-NEXT:    v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; GFX11-NEXT:    v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
; GFX11-NEXT:    v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
; GFX11-NEXT:    v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
; GFX11-NEXT:    v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
; GFX11-NEXT:    v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
; GFX11-NEXT:    v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
; GFX11-NEXT:    v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
; GFX11-NEXT:    v_dual_mov_b32 v18, s13 :: v_dual_mov_b32 v19, s12
; GFX11-NEXT:    v_dual_mov_b32 v20, s11 :: v_dual_mov_b32 v21, s10
; GFX11-NEXT:    v_dual_mov_b32 v22, s9 :: v_dual_mov_b32 v23, s8
; GFX11-NEXT:    v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s6
; GFX11-NEXT:    v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s4
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = add <28 x i32> %a, splat (i32 3)
  %a2 = bitcast <28 x i32> %a1 to <56 x half>
  br label %end

cmp.false:
  %a3 = bitcast <28 x i32> %a to <56 x half>
  br label %end

end:
  %phi = phi <56 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <56 x half> %phi
}

define <28 x i32> @bitcast_v56f16_to_v28i32(<56 x half> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v56f16_to_v28i32:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(4)
; SI-NEXT:    v_mov_b32_e32 v59, v0
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v27
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v26
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v25
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v24
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v23, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v23
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v22
; SI-NEXT:    v_mov_b32_e32 v39, v20
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v21
; SI-NEXT:    v_mov_b32_e32 v48, v19
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v39
; SI-NEXT:    v_mov_b32_e32 v49, v18
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v48
; SI-NEXT:    v_mov_b32_e32 v50, v17
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v49
; SI-NEXT:    v_mov_b32_e32 v51, v16
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v50
; SI-NEXT:    v_mov_b32_e32 v52, v15
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v51
; SI-NEXT:    v_mov_b32_e32 v53, v14
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v52
; SI-NEXT:    v_mov_b32_e32 v54, v13
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v53
; SI-NEXT:    v_mov_b32_e32 v55, v12
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v54
; SI-NEXT:    v_mov_b32_e32 v40, v11
; SI-NEXT:    v_mov_b32_e32 v41, v10
; SI-NEXT:    v_mov_b32_e32 v42, v9
; SI-NEXT:    v_mov_b32_e32 v43, v8
; SI-NEXT:    v_mov_b32_e32 v44, v7
; SI-NEXT:    v_mov_b32_e32 v45, v6
; SI-NEXT:    v_mov_b32_e32 v46, v5
; SI-NEXT:    v_mov_b32_e32 v47, v4
; SI-NEXT:    v_mov_b32_e32 v56, v3
; SI-NEXT:    v_mov_b32_e32 v57, v2
; SI-NEXT:    v_mov_b32_e32 v58, v1
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v55
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v40
; SI-NEXT:    v_lshrrev_b32_e32 v60, 16, v41
; SI-NEXT:    v_lshrrev_b32_e32 v33, 16, v42
; SI-NEXT:    v_lshrrev_b32_e32 v61, 16, v43
; SI-NEXT:    v_lshrrev_b32_e32 v34, 16, v44
; SI-NEXT:    v_lshrrev_b32_e32 v35, 16, v45
; SI-NEXT:    v_lshrrev_b32_e32 v62, 16, v46
; SI-NEXT:    v_lshrrev_b32_e32 v36, 16, v47
; SI-NEXT:    v_lshrrev_b32_e32 v63, 16, v56
; SI-NEXT:    v_lshrrev_b32_e32 v37, 16, v57
; SI-NEXT:    v_lshrrev_b32_e32 v32, 16, v58
; SI-NEXT:    v_lshrrev_b32_e32 v38, 16, v59
; SI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT:    buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT:    ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB18_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    buffer_load_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v13, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v18, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v19, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v20, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v21, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v59
; SI-NEXT:    v_lshlrev_b32_e32 v1, 16, v38
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v58
; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v32
; SI-NEXT:    v_or_b32_e32 v0, v0, v1
; SI-NEXT:    v_or_b32_e32 v1, v2, v3
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v57
; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v37
; SI-NEXT:    v_or_b32_e32 v2, v2, v3
; SI-NEXT:    v_and_b32_e32 v3, 0xffff, v56
; SI-NEXT:    v_lshlrev_b32_e32 v4, 16, v63
; SI-NEXT:    v_or_b32_e32 v3, v3, v4
; SI-NEXT:    v_and_b32_e32 v4, 0xffff, v47
; SI-NEXT:    v_lshlrev_b32_e32 v5, 16, v36
; SI-NEXT:    v_or_b32_e32 v4, v4, v5
; SI-NEXT:    v_and_b32_e32 v5, 0xffff, v46
; SI-NEXT:    v_lshlrev_b32_e32 v6, 16, v62
; SI-NEXT:    v_or_b32_e32 v5, v5, v6
; SI-NEXT:    v_and_b32_e32 v6, 0xffff, v45
; SI-NEXT:    v_lshlrev_b32_e32 v7, 16, v35
; SI-NEXT:    v_or_b32_e32 v6, v6, v7
; SI-NEXT:    v_and_b32_e32 v7, 0xffff, v44
; SI-NEXT:    v_lshlrev_b32_e32 v8, 16, v34
; SI-NEXT:    v_or_b32_e32 v7, v7, v8
; SI-NEXT:    v_and_b32_e32 v8, 0xffff, v43
; SI-NEXT:    v_lshlrev_b32_e32 v9, 16, v61
; SI-NEXT:    v_or_b32_e32 v8, v8, v9
; SI-NEXT:    v_and_b32_e32 v9, 0xffff, v42
; SI-NEXT:    v_lshlrev_b32_e32 v10, 16, v33
; SI-NEXT:    v_or_b32_e32 v9, v9, v10
; SI-NEXT:    v_and_b32_e32 v10, 0xffff, v41
; SI-NEXT:    v_lshlrev_b32_e32 v11, 16, v60
; SI-NEXT:    v_or_b32_e32 v10, v10, v11
; SI-NEXT:    v_and_b32_e32 v11, 0xffff, v40
; SI-NEXT:    ; implicit-def: $vgpr59
; SI-NEXT:    ; implicit-def: $vgpr58
; SI-NEXT:    ; implicit-def: $vgpr57
; SI-NEXT:    ; implicit-def: $vgpr56
; SI-NEXT:    ; implicit-def: $vgpr47
; SI-NEXT:    ; implicit-def: $vgpr46
; SI-NEXT:    ; implicit-def: $vgpr45
; SI-NEXT:    ; implicit-def: $vgpr44
; SI-NEXT:    ; implicit-def: $vgpr43
; SI-NEXT:    ; implicit-def: $vgpr42
; SI-NEXT:    ; implicit-def: $vgpr41
; SI-NEXT:    ; implicit-def: $vgpr40
; SI-NEXT:    ; implicit-def: $vgpr38
; SI-NEXT:    ; implicit-def: $vgpr32
; SI-NEXT:    ; implicit-def: $vgpr37
; SI-NEXT:    ; implicit-def: $vgpr63
; SI-NEXT:    ; implicit-def: $vgpr36
; SI-NEXT:    ; implicit-def: $vgpr62
; SI-NEXT:    ; implicit-def: $vgpr35
; SI-NEXT:    ; implicit-def: $vgpr34
; SI-NEXT:    ; implicit-def: $vgpr61
; SI-NEXT:    ; implicit-def: $vgpr33
; SI-NEXT:    ; implicit-def: $vgpr60
; SI-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(14)
; SI-NEXT:    v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT:    v_or_b32_e32 v11, v11, v12
; SI-NEXT:    v_and_b32_e32 v12, 0xffff, v55
; SI-NEXT:    v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT:    v_or_b32_e32 v12, v12, v13
; SI-NEXT:    v_and_b32_e32 v13, 0xffff, v54
; SI-NEXT:    v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT:    v_or_b32_e32 v13, v13, v14
; SI-NEXT:    v_and_b32_e32 v14, 0xffff, v53
; SI-NEXT:    s_waitcnt vmcnt(13)
; SI-NEXT:    v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT:    v_or_b32_e32 v14, v14, v15
; SI-NEXT:    v_and_b32_e32 v15, 0xffff, v52
; SI-NEXT:    s_waitcnt vmcnt(12)
; SI-NEXT:    v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT:    v_or_b32_e32 v15, v15, v16
; SI-NEXT:    v_and_b32_e32 v16, 0xffff, v51
; SI-NEXT:    s_waitcnt vmcnt(11)
; SI-NEXT:    v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT:    v_or_b32_e32 v16, v16, v17
; SI-NEXT:    v_and_b32_e32 v17, 0xffff, v50
; SI-NEXT:    s_waitcnt vmcnt(10)
; SI-NEXT:    v_lshlrev_b32_e32 v18, 16, v18
; SI-NEXT:    v_or_b32_e32 v17, v17, v18
; SI-NEXT:    v_and_b32_e32 v18, 0xffff, v49
; SI-NEXT:    s_waitcnt vmcnt(9)
; SI-NEXT:    v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT:    v_or_b32_e32 v18, v18, v19
; SI-NEXT:    v_and_b32_e32 v19, 0xffff, v48
; SI-NEXT:    s_waitcnt vmcnt(8)
; SI-NEXT:    v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT:    v_or_b32_e32 v19, v19, v20
; SI-NEXT:    v_and_b32_e32 v20, 0xffff, v39
; SI-NEXT:    s_waitcnt vmcnt(7)
; SI-NEXT:    v_lshlrev_b32_e32 v21, 16, v21
; SI-NEXT:    v_or_b32_e32 v20, v20, v21
; SI-NEXT:    buffer_load_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT:    ; implicit-def: $vgpr55
; SI-NEXT:    ; implicit-def: $vgpr54
; SI-NEXT:    ; implicit-def: $vgpr53
; SI-NEXT:    ; implicit-def: $vgpr52
; SI-NEXT:    ; implicit-def: $vgpr51
; SI-NEXT:    ; implicit-def: $vgpr50
; SI-NEXT:    ; implicit-def: $vgpr49
; SI-NEXT:    ; implicit-def: $vgpr48
; SI-NEXT:    ; implicit-def: $vgpr39
; SI-NEXT:    s_waitcnt vmcnt(7)
; SI-NEXT:    v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT:    s_waitcnt vmcnt(6)
; SI-NEXT:    v_lshlrev_b32_e32 v23, 16, v23
; SI-NEXT:    s_waitcnt vmcnt(5)
; SI-NEXT:    v_lshlrev_b32_e32 v24, 16, v24
; SI-NEXT:    s_waitcnt vmcnt(4)
; SI-NEXT:    v_lshlrev_b32_e32 v25, 16, v25
; SI-NEXT:    s_waitcnt vmcnt(3)
; SI-NEXT:    v_lshlrev_b32_e32 v26, 16, v26
; SI-NEXT:    s_waitcnt vmcnt(2)
; SI-NEXT:    v_lshlrev_b32_e32 v27, 16, v27
; SI-NEXT:    s_waitcnt vmcnt(1)
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT:    v_or_b32_e32 v21, v21, v22
; SI-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT:    v_or_b32_e32 v22, v22, v23
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT:    v_or_b32_e32 v23, v23, v24
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT:    v_or_b32_e32 v24, v24, v25
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT:    v_or_b32_e32 v25, v25, v26
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT:    v_or_b32_e32 v26, v26, v27
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT:    v_or_b32_e32 v27, v27, v28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:  .LBB18_2: ; %Flow
; SI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB18_4
; SI-NEXT:  ; %bb.3: ; %cmp.true
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v0, v38
; SI-NEXT:    v_cvt_f32_f16_e32 v2, v32
; SI-NEXT:    v_cvt_f32_f16_e32 v1, v59
; SI-NEXT:    v_cvt_f32_f16_e32 v3, v58
; SI-NEXT:    v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT:    v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT:    v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT:    v_cvt_f16_f32_e32 v0, v0
; SI-NEXT:    v_cvt_f16_f32_e32 v2, v2
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v1, v1
; SI-NEXT:    v_cvt_f16_f32_e32 v3, v3
; SI-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
; SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT:    v_or_b32_e32 v0, v1, v0
; SI-NEXT:    v_or_b32_e32 v1, v3, v2
; SI-NEXT:    v_cvt_f32_f16_e32 v2, v37
; SI-NEXT:    v_cvt_f32_f16_e32 v3, v57
; SI-NEXT:    v_cvt_f32_f16_e32 v4, v56
; SI-NEXT:    v_cvt_f32_f16_e32 v5, v47
; SI-NEXT:    v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT:    v_cvt_f16_f32_e32 v2, v2
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v3, v3
; SI-NEXT:    v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT:    v_cvt_f16_f32_e32 v4, v4
; SI-NEXT:    v_or_b32_e32 v2, v3, v2
; SI-NEXT:    v_cvt_f32_f16_e32 v3, v63
; SI-NEXT:    v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT:    v_cvt_f16_f32_e32 v5, v5
; SI-NEXT:    v_cvt_f32_f16_e32 v6, v46
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v3, v3
; SI-NEXT:    v_cvt_f32_f16_e32 v7, v45
; SI-NEXT:    v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT:    v_cvt_f16_f32_e32 v6, v6
; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT:    v_or_b32_e32 v3, v4, v3
; SI-NEXT:    v_cvt_f32_f16_e32 v4, v36
; SI-NEXT:    v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT:    v_cvt_f16_f32_e32 v7, v7
; SI-NEXT:    v_cvt_f32_f16_e32 v8, v44
; SI-NEXT:    v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT:    v_cvt_f16_f32_e32 v4, v4
; SI-NEXT:    v_cvt_f32_f16_e32 v9, v43
; SI-NEXT:    v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT:    v_cvt_f16_f32_e32 v8, v8
; SI-NEXT:    v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT:    v_or_b32_e32 v4, v5, v4
; SI-NEXT:    v_cvt_f32_f16_e32 v5, v62
; SI-NEXT:    v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT:    v_cvt_f16_f32_e32 v9, v9
; SI-NEXT:    v_cvt_f32_f16_e32 v10, v42
; SI-NEXT:    v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT:    v_cvt_f16_f32_e32 v5, v5
; SI-NEXT:    v_cvt_f32_f16_e32 v11, v41
; SI-NEXT:    v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT:    v_cvt_f16_f32_e32 v10, v10
; SI-NEXT:    v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT:    v_or_b32_e32 v5, v6, v5
; SI-NEXT:    v_cvt_f32_f16_e32 v6, v35
; SI-NEXT:    v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT:    v_cvt_f16_f32_e32 v11, v11
; SI-NEXT:    v_cvt_f32_f16_e32 v12, v40
; SI-NEXT:    v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT:    v_cvt_f16_f32_e32 v6, v6
; SI-NEXT:    v_cvt_f32_f16_e32 v13, v55
; SI-NEXT:    v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT:    v_cvt_f16_f32_e32 v12, v12
; SI-NEXT:    v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT:    v_or_b32_e32 v6, v7, v6
; SI-NEXT:    v_cvt_f32_f16_e32 v7, v34
; SI-NEXT:    v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT:    v_cvt_f16_f32_e32 v13, v13
; SI-NEXT:    v_cvt_f32_f16_e32 v14, v54
; SI-NEXT:    v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT:    v_cvt_f16_f32_e32 v7, v7
; SI-NEXT:    v_cvt_f32_f16_e32 v15, v53
; SI-NEXT:    v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT:    v_cvt_f16_f32_e32 v14, v14
; SI-NEXT:    v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT:    v_or_b32_e32 v7, v8, v7
; SI-NEXT:    v_cvt_f32_f16_e32 v8, v61
; SI-NEXT:    v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT:    v_cvt_f16_f32_e32 v15, v15
; SI-NEXT:    v_cvt_f32_f16_e32 v17, v52
; SI-NEXT:    v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT:    v_cvt_f16_f32_e32 v8, v8
; SI-NEXT:    v_cvt_f32_f16_e32 v18, v51
; SI-NEXT:    v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT:    v_cvt_f16_f32_e32 v17, v17
; SI-NEXT:    v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT:    v_or_b32_e32 v8, v9, v8
; SI-NEXT:    v_cvt_f32_f16_e32 v9, v33
; SI-NEXT:    v_add_f32_e32 v18, 0x38000000, v18
; SI-NEXT:    v_cvt_f16_f32_e32 v18, v18
; SI-NEXT:    v_cvt_f32_f16_e32 v20, v49
; SI-NEXT:    v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT:    v_cvt_f16_f32_e32 v9, v9
; SI-NEXT:    v_cvt_f32_f16_e32 v21, v48
; SI-NEXT:    v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT:    v_cvt_f16_f32_e32 v20, v20
; SI-NEXT:    v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT:    v_or_b32_e32 v9, v10, v9
; SI-NEXT:    v_cvt_f32_f16_e32 v10, v60
; SI-NEXT:    v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT:    v_cvt_f16_f32_e32 v21, v21
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT:    v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT:    v_cvt_f16_f32_e32 v10, v10
; SI-NEXT:    buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v19, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT:    v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT:    v_or_b32_e32 v10, v11, v10
; SI-NEXT:    buffer_load_dword v11, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(10)
; SI-NEXT:    v_cvt_f32_f16_e32 v24, v24
; SI-NEXT:    s_waitcnt vmcnt(9)
; SI-NEXT:    v_cvt_f32_f16_e32 v27, v27
; SI-NEXT:    s_waitcnt vmcnt(8)
; SI-NEXT:    v_cvt_f32_f16_e32 v22, v22
; SI-NEXT:    s_waitcnt vmcnt(7)
; SI-NEXT:    v_cvt_f32_f16_e32 v25, v25
; SI-NEXT:    v_add_f32_e32 v24, 0x38000000, v24
; SI-NEXT:    v_cvt_f16_f32_e32 v24, v24
; SI-NEXT:    v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT:    s_waitcnt vmcnt(5)
; SI-NEXT:    v_cvt_f32_f16_e32 v16, v16
; SI-NEXT:    s_waitcnt vmcnt(4)
; SI-NEXT:    v_cvt_f32_f16_e32 v19, v19
; SI-NEXT:    v_cvt_f16_f32_e32 v22, v22
; SI-NEXT:    v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT:    v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT:    v_cvt_f16_f32_e32 v16, v16
; SI-NEXT:    v_add_f32_e32 v19, 0x38000000, v19
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v11, v11
; SI-NEXT:    v_cvt_f16_f32_e32 v19, v19
; SI-NEXT:    v_cvt_f16_f32_e32 v25, v25
; SI-NEXT:    v_add_f32_e32 v27, 0x38000000, v27
; SI-NEXT:    v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT:    v_cvt_f16_f32_e32 v11, v11
; SI-NEXT:    v_cvt_f16_f32_e32 v27, v27
; SI-NEXT:    v_cvt_f32_f16_e32 v28, v28
; SI-NEXT:    v_cvt_f32_f16_e32 v29, v29
; SI-NEXT:    v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT:    v_or_b32_e32 v11, v12, v11
; SI-NEXT:    buffer_load_dword v12, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT:    v_add_f32_e32 v28, 0x38000000, v28
; SI-NEXT:    v_cvt_f16_f32_e32 v28, v28
; SI-NEXT:    v_add_f32_e32 v29, 0x38000000, v29
; SI-NEXT:    v_cvt_f16_f32_e32 v29, v29
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v12, v12
; SI-NEXT:    v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT:    v_cvt_f16_f32_e32 v12, v12
; SI-NEXT:    v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT:    v_or_b32_e32 v12, v13, v12
; SI-NEXT:    buffer_load_dword v13, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v13, v13
; SI-NEXT:    v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT:    v_cvt_f16_f32_e32 v13, v13
; SI-NEXT:    v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT:    v_or_b32_e32 v13, v14, v13
; SI-NEXT:    buffer_load_dword v14, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v14, v14
; SI-NEXT:    v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT:    v_cvt_f16_f32_e32 v14, v14
; SI-NEXT:    v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT:    v_or_b32_e32 v14, v15, v14
; SI-NEXT:    v_lshlrev_b32_e32 v15, 16, v16
; SI-NEXT:    buffer_load_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT:    v_or_b32_e32 v15, v17, v15
; SI-NEXT:    buffer_load_dword v17, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(1)
; SI-NEXT:    v_cvt_f32_f16_e32 v16, v16
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v17, v17
; SI-NEXT:    v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT:    v_cvt_f16_f32_e32 v16, v16
; SI-NEXT:    v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT:    v_cvt_f16_f32_e32 v17, v17
; SI-NEXT:    v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT:    v_or_b32_e32 v16, v18, v16
; SI-NEXT:    v_cvt_f32_f16_e32 v18, v50
; SI-NEXT:    v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT:    v_add_f32_e32 v18, 0x38000000, v18
; SI-NEXT:    v_cvt_f16_f32_e32 v18, v18
; SI-NEXT:    v_or_b32_e32 v17, v18, v17
; SI-NEXT:    v_lshlrev_b32_e32 v18, 16, v19
; SI-NEXT:    buffer_load_dword v19, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT:    v_or_b32_e32 v18, v20, v18
; SI-NEXT:    buffer_load_dword v20, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(1)
; SI-NEXT:    v_cvt_f32_f16_e32 v19, v19
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v20, v20
; SI-NEXT:    v_add_f32_e32 v19, 0x38000000, v19
; SI-NEXT:    v_cvt_f16_f32_e32 v19, v19
; SI-NEXT:    v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT:    v_cvt_f16_f32_e32 v20, v20
; SI-NEXT:    v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT:    v_or_b32_e32 v19, v21, v19
; SI-NEXT:    v_cvt_f32_f16_e32 v21, v39
; SI-NEXT:    v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT:    v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT:    v_cvt_f16_f32_e32 v21, v21
; SI-NEXT:    v_or_b32_e32 v20, v21, v20
; SI-NEXT:    v_lshlrev_b32_e32 v21, 16, v22
; SI-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v22, v22
; SI-NEXT:    v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT:    v_cvt_f16_f32_e32 v22, v22
; SI-NEXT:    v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT:    v_or_b32_e32 v22, v24, v22
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT:    v_cvt_f32_f16_e32 v23, v23
; SI-NEXT:    v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT:    v_cvt_f16_f32_e32 v23, v23
; SI-NEXT:    v_or_b32_e32 v21, v23, v21
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(1)
; SI-NEXT:    v_cvt_f32_f16_e32 v24, v24
; SI-NEXT:    v_add_f32_e32 v24, 0x38000000, v24
; SI-NEXT:    v_cvt_f16_f32_e32 v24, v24
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v23, v23
; SI-NEXT:    v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT:    v_cvt_f16_f32_e32 v23, v23
; SI-NEXT:    v_lshlrev_b32_e32 v23, 16, v23
; SI-NEXT:    v_or_b32_e32 v23, v24, v23
; SI-NEXT:    v_lshlrev_b32_e32 v24, 16, v25
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v25, v25
; SI-NEXT:    v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT:    v_cvt_f16_f32_e32 v25, v25
; SI-NEXT:    v_lshlrev_b32_e32 v25, 16, v25
; SI-NEXT:    v_or_b32_e32 v25, v27, v25
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT:    v_cvt_f32_f16_e32 v26, v26
; SI-NEXT:    v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT:    v_cvt_f16_f32_e32 v26, v26
; SI-NEXT:    v_or_b32_e32 v24, v26, v24
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(1)
; SI-NEXT:    v_cvt_f32_f16_e32 v27, v27
; SI-NEXT:    v_add_f32_e32 v27, 0x38000000, v27
; SI-NEXT:    v_cvt_f16_f32_e32 v27, v27
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v26, v26
; SI-NEXT:    v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT:    v_cvt_f16_f32_e32 v26, v26
; SI-NEXT:    v_lshlrev_b32_e32 v26, 16, v26
; SI-NEXT:    v_or_b32_e32 v26, v27, v26
; SI-NEXT:    v_lshlrev_b32_e32 v27, 16, v28
; SI-NEXT:    v_or_b32_e32 v27, v29, v27
; SI-NEXT:  .LBB18_4: ; %end
; SI-NEXT:    s_or_b64 exec, exec, s[4:5]
; SI-NEXT:    buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v56f16_to_v28i32:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v56, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v58, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v59, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    v_mov_b32_e32 v32, v27
; VI-NEXT:    v_mov_b32_e32 v33, v26
; VI-NEXT:    v_mov_b32_e32 v34, v25
; VI-NEXT:    v_mov_b32_e32 v35, v24
; VI-NEXT:    v_mov_b32_e32 v36, v23
; VI-NEXT:    v_mov_b32_e32 v37, v22
; VI-NEXT:    v_mov_b32_e32 v38, v21
; VI-NEXT:    v_mov_b32_e32 v39, v20
; VI-NEXT:    v_mov_b32_e32 v48, v19
; VI-NEXT:    v_mov_b32_e32 v49, v18
; VI-NEXT:    v_mov_b32_e32 v50, v17
; VI-NEXT:    v_mov_b32_e32 v51, v16
; VI-NEXT:    v_mov_b32_e32 v52, v15
; VI-NEXT:    v_mov_b32_e32 v53, v14
; VI-NEXT:    v_mov_b32_e32 v54, v13
; VI-NEXT:    v_mov_b32_e32 v55, v12
; VI-NEXT:    v_mov_b32_e32 v40, v11
; VI-NEXT:    v_mov_b32_e32 v41, v10
; VI-NEXT:    v_mov_b32_e32 v42, v9
; VI-NEXT:    v_mov_b32_e32 v43, v8
; VI-NEXT:    v_mov_b32_e32 v44, v7
; VI-NEXT:    v_mov_b32_e32 v45, v6
; VI-NEXT:    v_mov_b32_e32 v46, v5
; VI-NEXT:    v_mov_b32_e32 v47, v4
; VI-NEXT:    v_mov_b32_e32 v56, v3
; VI-NEXT:    v_mov_b32_e32 v57, v2
; VI-NEXT:    v_mov_b32_e32 v58, v1
; VI-NEXT:    v_mov_b32_e32 v59, v0
; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT:    ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; VI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB18_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    v_mov_b32_e32 v27, 16
; VI-NEXT:    v_lshlrev_b32_sdwa v0, v27, v59 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v1, v27, v58 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v2, v27, v57 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v3, v27, v56 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v4, v27, v47 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v5, v27, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v6, v27, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v7, v27, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v8, v27, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v9, v27, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v10, v27, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v11, v27, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v12, v27, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v13, v27, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v14, v27, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v15, v27, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v16, v27, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v17, v27, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v18, v27, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v19, v27, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v20, v27, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v21, v27, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v22, v27, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v23, v27, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v24, v27, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v25, v27, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v26, v27, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v27, v27, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_or_b32_sdwa v0, v59, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v1, v58, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v2, v57, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v3, v56, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v4, v47, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v5, v46, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v6, v45, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v7, v44, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v8, v43, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v9, v42, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v10, v41, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v11, v40, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v12, v55, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v13, v54, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v14, v53, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v15, v52, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v16, v51, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v17, v50, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v18, v49, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v19, v48, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v20, v39, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v21, v38, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v22, v37, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v23, v36, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v24, v35, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v25, v34, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v26, v33, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v27, v32, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    ; implicit-def: $vgpr59
; VI-NEXT:    ; implicit-def: $vgpr58
; VI-NEXT:    ; implicit-def: $vgpr57
; VI-NEXT:    ; implicit-def: $vgpr56
; VI-NEXT:    ; implicit-def: $vgpr47
; VI-NEXT:    ; implicit-def: $vgpr46
; VI-NEXT:    ; implicit-def: $vgpr45
; VI-NEXT:    ; implicit-def: $vgpr44
; VI-NEXT:    ; implicit-def: $vgpr43
; VI-NEXT:    ; implicit-def: $vgpr42
; VI-NEXT:    ; implicit-def: $vgpr41
; VI-NEXT:    ; implicit-def: $vgpr40
; VI-NEXT:    ; implicit-def: $vgpr55
; VI-NEXT:    ; implicit-def: $vgpr54
; VI-NEXT:    ; implicit-def: $vgpr53
; VI-NEXT:    ; implicit-def: $vgpr52
; VI-NEXT:    ; implicit-def: $vgpr51
; VI-NEXT:    ; implicit-def: $vgpr50
; VI-NEXT:    ; implicit-def: $vgpr49
; VI-NEXT:    ; implicit-def: $vgpr48
; VI-NEXT:    ; implicit-def: $vgpr39
; VI-NEXT:    ; implicit-def: $vgpr38
; VI-NEXT:    ; implicit-def: $vgpr37
; VI-NEXT:    ; implicit-def: $vgpr36
; VI-NEXT:    ; implicit-def: $vgpr35
; VI-NEXT:    ; implicit-def: $vgpr34
; VI-NEXT:    ; implicit-def: $vgpr33
; VI-NEXT:    ; implicit-def: $vgpr32
; VI-NEXT:  .LBB18_2: ; %Flow
; VI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB18_4
; VI-NEXT:  ; %bb.3: ; %cmp.true
; VI-NEXT:    v_mov_b32_e32 v27, 0x200
; VI-NEXT:    v_add_f16_sdwa v0, v59, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v1, 0x200, v59
; VI-NEXT:    v_add_f16_sdwa v2, v58, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v3, 0x200, v58
; VI-NEXT:    v_or_b32_e32 v0, v1, v0
; VI-NEXT:    v_or_b32_e32 v1, v3, v2
; VI-NEXT:    v_add_f16_sdwa v2, v57, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v3, 0x200, v57
; VI-NEXT:    v_or_b32_e32 v2, v3, v2
; VI-NEXT:    v_add_f16_sdwa v3, v56, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v4, 0x200, v56
; VI-NEXT:    v_or_b32_e32 v3, v4, v3
; VI-NEXT:    v_add_f16_sdwa v4, v47, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v5, 0x200, v47
; VI-NEXT:    v_or_b32_e32 v4, v5, v4
; VI-NEXT:    v_add_f16_sdwa v5, v46, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v6, 0x200, v46
; VI-NEXT:    v_or_b32_e32 v5, v6, v5
; VI-NEXT:    v_add_f16_sdwa v6, v45, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v7, 0x200, v45
; VI-NEXT:    v_or_b32_e32 v6, v7, v6
; VI-NEXT:    v_add_f16_sdwa v7, v44, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v8, 0x200, v44
; VI-NEXT:    v_or_b32_e32 v7, v8, v7
; VI-NEXT:    v_add_f16_sdwa v8, v43, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v9, 0x200, v43
; VI-NEXT:    v_or_b32_e32 v8, v9, v8
; VI-NEXT:    v_add_f16_sdwa v9, v42, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v10, 0x200, v42
; VI-NEXT:    v_or_b32_e32 v9, v10, v9
; VI-NEXT:    v_add_f16_sdwa v10, v41, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v11, 0x200, v41
; VI-NEXT:    v_or_b32_e32 v10, v11, v10
; VI-NEXT:    v_add_f16_sdwa v11, v40, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v12, 0x200, v40
; VI-NEXT:    v_or_b32_e32 v11, v12, v11
; VI-NEXT:    v_add_f16_sdwa v12, v55, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v13, 0x200, v55
; VI-NEXT:    v_or_b32_e32 v12, v13, v12
; VI-NEXT:    v_add_f16_sdwa v13, v54, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v14, 0x200, v54
; VI-NEXT:    v_or_b32_e32 v13, v14, v13
; VI-NEXT:    v_add_f16_sdwa v14, v53, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v15, 0x200, v53
; VI-NEXT:    v_or_b32_e32 v14, v15, v14
; VI-NEXT:    v_add_f16_sdwa v15, v52, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v16, 0x200, v52
; VI-NEXT:    v_or_b32_e32 v15, v16, v15
; VI-NEXT:    v_add_f16_sdwa v16, v51, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v17, 0x200, v51
; VI-NEXT:    v_or_b32_e32 v16, v17, v16
; VI-NEXT:    v_add_f16_sdwa v17, v50, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v18, 0x200, v50
; VI-NEXT:    v_or_b32_e32 v17, v18, v17
; VI-NEXT:    v_add_f16_sdwa v18, v49, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v19, 0x200, v49
; VI-NEXT:    v_or_b32_e32 v18, v19, v18
; VI-NEXT:    v_add_f16_sdwa v19, v48, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v20, 0x200, v48
; VI-NEXT:    v_or_b32_e32 v19, v20, v19
; VI-NEXT:    v_add_f16_sdwa v20, v39, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v21, 0x200, v39
; VI-NEXT:    v_or_b32_e32 v20, v21, v20
; VI-NEXT:    v_add_f16_sdwa v21, v38, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v22, 0x200, v38
; VI-NEXT:    v_or_b32_e32 v21, v22, v21
; VI-NEXT:    v_add_f16_sdwa v22, v37, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v23, 0x200, v37
; VI-NEXT:    v_or_b32_e32 v22, v23, v22
; VI-NEXT:    v_add_f16_sdwa v23, v36, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v24, 0x200, v36
; VI-NEXT:    v_or_b32_e32 v23, v24, v23
; VI-NEXT:    v_add_f16_sdwa v24, v35, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v25, 0x200, v35
; VI-NEXT:    v_or_b32_e32 v24, v25, v24
; VI-NEXT:    v_add_f16_sdwa v25, v34, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v26, 0x200, v34
; VI-NEXT:    v_or_b32_e32 v25, v26, v25
; VI-NEXT:    v_add_f16_sdwa v26, v33, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v28, 0x200, v33
; VI-NEXT:    v_or_b32_e32 v26, v28, v26
; VI-NEXT:    v_add_f16_sdwa v27, v32, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v28, 0x200, v32
; VI-NEXT:    v_or_b32_e32 v27, v28, v27
; VI-NEXT:  .LBB18_4: ; %end
; VI-NEXT:    s_or_b64 exec, exec, s[4:5]
; VI-NEXT:    buffer_load_dword v59, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v58, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v57, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v56, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v56f16_to_v28i32:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    v_mov_b32_e32 v59, v0
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v27
; GFX9-NEXT:    v_mov_b32_e32 v34, v25
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v26
; GFX9-NEXT:    v_mov_b32_e32 v35, v24
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v34
; GFX9-NEXT:    v_mov_b32_e32 v36, v23
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT:    v_mov_b32_e32 v37, v22
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT:    v_mov_b32_e32 v38, v21
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT:    v_mov_b32_e32 v39, v20
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT:    v_mov_b32_e32 v48, v19
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT:    v_mov_b32_e32 v49, v18
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT:    v_mov_b32_e32 v50, v17
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT:    v_mov_b32_e32 v51, v16
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT:    v_mov_b32_e32 v52, v15
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT:    v_mov_b32_e32 v53, v14
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT:    v_mov_b32_e32 v54, v13
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT:    v_mov_b32_e32 v55, v12
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT:    v_mov_b32_e32 v40, v11
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT:    v_mov_b32_e32 v41, v10
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT:    v_mov_b32_e32 v42, v9
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT:    v_mov_b32_e32 v43, v8
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT:    v_mov_b32_e32 v44, v7
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT:    v_mov_b32_e32 v45, v6
; GFX9-NEXT:    v_mov_b32_e32 v46, v5
; GFX9-NEXT:    v_mov_b32_e32 v47, v4
; GFX9-NEXT:    v_mov_b32_e32 v56, v3
; GFX9-NEXT:    v_mov_b32_e32 v57, v2
; GFX9-NEXT:    v_mov_b32_e32 v58, v1
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v44
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v45
; GFX9-NEXT:    v_lshrrev_b32_e32 v62, 16, v46
; GFX9-NEXT:    v_lshrrev_b32_e32 v63, 16, v47
; GFX9-NEXT:    v_lshrrev_b32_e32 v60, 16, v56
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v57
; GFX9-NEXT:    v_lshrrev_b32_e32 v61, 16, v58
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v59
; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT:    buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT:    ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB18_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT:    s_mov_b32 s6, 0x5040100
; GFX9-NEXT:    v_lshrrev_b32_e32 v6, 16, v45
; GFX9-NEXT:    v_lshrrev_b32_e32 v7, 16, v44
; GFX9-NEXT:    v_lshrrev_b32_e32 v8, 16, v43
; GFX9-NEXT:    v_lshrrev_b32_e32 v9, 16, v42
; GFX9-NEXT:    v_lshrrev_b32_e32 v10, 16, v41
; GFX9-NEXT:    v_lshrrev_b32_e32 v11, 16, v40
; GFX9-NEXT:    v_lshrrev_b32_e32 v12, 16, v55
; GFX9-NEXT:    v_lshrrev_b32_e32 v13, 16, v54
; GFX9-NEXT:    v_lshrrev_b32_e32 v14, 16, v53
; GFX9-NEXT:    v_lshrrev_b32_e32 v15, 16, v52
; GFX9-NEXT:    v_lshrrev_b32_e32 v16, 16, v51
; GFX9-NEXT:    v_lshrrev_b32_e32 v17, 16, v50
; GFX9-NEXT:    v_lshrrev_b32_e32 v18, 16, v49
; GFX9-NEXT:    v_lshrrev_b32_e32 v19, 16, v48
; GFX9-NEXT:    v_lshrrev_b32_e32 v20, 16, v39
; GFX9-NEXT:    v_lshrrev_b32_e32 v21, 16, v38
; GFX9-NEXT:    v_lshrrev_b32_e32 v22, 16, v37
; GFX9-NEXT:    v_lshrrev_b32_e32 v23, 16, v36
; GFX9-NEXT:    v_lshrrev_b32_e32 v24, 16, v35
; GFX9-NEXT:    v_lshrrev_b32_e32 v25, 16, v34
; GFX9-NEXT:    v_perm_b32 v0, v33, v59, s6
; GFX9-NEXT:    v_perm_b32 v1, v61, v58, s6
; GFX9-NEXT:    v_perm_b32 v2, v32, v57, s6
; GFX9-NEXT:    v_perm_b32 v3, v60, v56, s6
; GFX9-NEXT:    v_perm_b32 v4, v63, v47, s6
; GFX9-NEXT:    v_perm_b32 v5, v62, v46, s6
; GFX9-NEXT:    v_perm_b32 v6, v6, v45, s6
; GFX9-NEXT:    v_perm_b32 v7, v7, v44, s6
; GFX9-NEXT:    v_perm_b32 v8, v8, v43, s6
; GFX9-NEXT:    v_perm_b32 v9, v9, v42, s6
; GFX9-NEXT:    v_perm_b32 v10, v10, v41, s6
; GFX9-NEXT:    v_perm_b32 v11, v11, v40, s6
; GFX9-NEXT:    v_perm_b32 v12, v12, v55, s6
; GFX9-NEXT:    v_perm_b32 v13, v13, v54, s6
; GFX9-NEXT:    v_perm_b32 v14, v14, v53, s6
; GFX9-NEXT:    v_perm_b32 v15, v15, v52, s6
; GFX9-NEXT:    v_perm_b32 v16, v16, v51, s6
; GFX9-NEXT:    v_perm_b32 v17, v17, v50, s6
; GFX9-NEXT:    v_perm_b32 v18, v18, v49, s6
; GFX9-NEXT:    v_perm_b32 v19, v19, v48, s6
; GFX9-NEXT:    v_perm_b32 v20, v20, v39, s6
; GFX9-NEXT:    v_perm_b32 v21, v21, v38, s6
; GFX9-NEXT:    v_perm_b32 v22, v22, v37, s6
; GFX9-NEXT:    v_perm_b32 v23, v23, v36, s6
; GFX9-NEXT:    v_perm_b32 v24, v24, v35, s6
; GFX9-NEXT:    v_perm_b32 v25, v25, v34, s6
; GFX9-NEXT:    ; implicit-def: $vgpr59
; GFX9-NEXT:    ; implicit-def: $vgpr58
; GFX9-NEXT:    ; implicit-def: $vgpr57
; GFX9-NEXT:    ; implicit-def: $vgpr56
; GFX9-NEXT:    ; implicit-def: $vgpr47
; GFX9-NEXT:    ; implicit-def: $vgpr46
; GFX9-NEXT:    ; implicit-def: $vgpr45
; GFX9-NEXT:    ; implicit-def: $vgpr44
; GFX9-NEXT:    ; implicit-def: $vgpr43
; GFX9-NEXT:    ; implicit-def: $vgpr42
; GFX9-NEXT:    ; implicit-def: $vgpr41
; GFX9-NEXT:    ; implicit-def: $vgpr40
; GFX9-NEXT:    ; implicit-def: $vgpr55
; GFX9-NEXT:    ; implicit-def: $vgpr54
; GFX9-NEXT:    ; implicit-def: $vgpr53
; GFX9-NEXT:    ; implicit-def: $vgpr52
; GFX9-NEXT:    ; implicit-def: $vgpr51
; GFX9-NEXT:    ; implicit-def: $vgpr50
; GFX9-NEXT:    ; implicit-def: $vgpr49
; GFX9-NEXT:    ; implicit-def: $vgpr48
; GFX9-NEXT:    ; implicit-def: $vgpr39
; GFX9-NEXT:    ; implicit-def: $vgpr38
; GFX9-NEXT:    ; implicit-def: $vgpr37
; GFX9-NEXT:    ; implicit-def: $vgpr36
; GFX9-NEXT:    ; implicit-def: $vgpr35
; GFX9-NEXT:    ; implicit-def: $vgpr34
; GFX9-NEXT:    ; implicit-def: $vgpr62
; GFX9-NEXT:    ; implicit-def: $vgpr63
; GFX9-NEXT:    ; implicit-def: $vgpr60
; GFX9-NEXT:    ; implicit-def: $vgpr32
; GFX9-NEXT:    ; implicit-def: $vgpr61
; GFX9-NEXT:    ; implicit-def: $vgpr33
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:  .LBB18_2: ; %Flow
; GFX9-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB18_4
; GFX9-NEXT:  ; %bb.3: ; %cmp.true
; GFX9-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT:    s_mov_b32 s6, 0x5040100
; GFX9-NEXT:    buffer_load_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v7, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v8, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v14, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v19, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT:    v_perm_b32 v0, v33, v59, s6
; GFX9-NEXT:    s_movk_i32 s7, 0x200
; GFX9-NEXT:    v_perm_b32 v1, v61, v58, s6
; GFX9-NEXT:    v_perm_b32 v2, v32, v57, s6
; GFX9-NEXT:    v_perm_b32 v3, v60, v56, s6
; GFX9-NEXT:    v_perm_b32 v4, v63, v47, s6
; GFX9-NEXT:    v_perm_b32 v5, v62, v46, s6
; GFX9-NEXT:    v_pk_add_f16 v0, v0, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v1, v1, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v2, v2, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v3, v3, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v4, v4, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v5, v5, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    s_waitcnt vmcnt(20)
; GFX9-NEXT:    v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT:    s_waitcnt vmcnt(21)
; GFX9-NEXT:    v_perm_b32 v6, v6, v45, s6
; GFX9-NEXT:    s_waitcnt vmcnt(20)
; GFX9-NEXT:    v_perm_b32 v7, v7, v44, s6
; GFX9-NEXT:    s_waitcnt vmcnt(19)
; GFX9-NEXT:    v_perm_b32 v8, v8, v43, s6
; GFX9-NEXT:    s_waitcnt vmcnt(18)
; GFX9-NEXT:    v_perm_b32 v9, v9, v42, s6
; GFX9-NEXT:    s_waitcnt vmcnt(17)
; GFX9-NEXT:    v_perm_b32 v10, v10, v41, s6
; GFX9-NEXT:    s_waitcnt vmcnt(16)
; GFX9-NEXT:    v_perm_b32 v11, v11, v40, s6
; GFX9-NEXT:    s_waitcnt vmcnt(15)
; GFX9-NEXT:    v_perm_b32 v12, v12, v55, s6
; GFX9-NEXT:    s_waitcnt vmcnt(14)
; GFX9-NEXT:    v_perm_b32 v13, v13, v54, s6
; GFX9-NEXT:    s_waitcnt vmcnt(13)
; GFX9-NEXT:    v_perm_b32 v14, v14, v53, s6
; GFX9-NEXT:    s_waitcnt vmcnt(12)
; GFX9-NEXT:    v_perm_b32 v15, v15, v52, s6
; GFX9-NEXT:    s_waitcnt vmcnt(11)
; GFX9-NEXT:    v_perm_b32 v16, v16, v51, s6
; GFX9-NEXT:    s_waitcnt vmcnt(10)
; GFX9-NEXT:    v_perm_b32 v17, v17, v50, s6
; GFX9-NEXT:    s_waitcnt vmcnt(9)
; GFX9-NEXT:    v_perm_b32 v18, v18, v49, s6
; GFX9-NEXT:    s_waitcnt vmcnt(8)
; GFX9-NEXT:    v_perm_b32 v19, v19, v48, s6
; GFX9-NEXT:    s_waitcnt vmcnt(7)
; GFX9-NEXT:    v_perm_b32 v20, v20, v39, s6
; GFX9-NEXT:    s_waitcnt vmcnt(6)
; GFX9-NEXT:    v_perm_b32 v21, v21, v38, s6
; GFX9-NEXT:    s_waitcnt vmcnt(5)
; GFX9-NEXT:    v_perm_b32 v22, v22, v37, s6
; GFX9-NEXT:    s_waitcnt vmcnt(4)
; GFX9-NEXT:    v_perm_b32 v23, v23, v36, s6
; GFX9-NEXT:    s_waitcnt vmcnt(3)
; GFX9-NEXT:    v_perm_b32 v24, v24, v35, s6
; GFX9-NEXT:    s_waitcnt vmcnt(2)
; GFX9-NEXT:    v_perm_b32 v25, v25, v34, s6
; GFX9-NEXT:    v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v9, v9, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v10, v10, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v11, v11, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v12, v12, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v13, v13, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v14, v14, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v15, v15, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v16, v16, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v17, v17, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v18, v18, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v19, v19, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v20, v20, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v21, v21, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v22, v22, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v23, v23, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v24, v24, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v25, v25, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v26, v26, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT:    v_pk_add_f16 v27, v27, s7 op_sel_hi:[1,0]
; GFX9-NEXT:  .LBB18_4: ; %end
; GFX9-NEXT:    s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT:    buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-TRUE16-LABEL: bitcast_v56f16_to_v28i32:
; GFX11-TRUE16:       ; %bb.0:
; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-TRUE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT:    s_cbranch_execz .LBB18_2
; GFX11-TRUE16-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v0, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v1, v1, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v2, v2, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v3, v3, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v4, v4, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v5, v5, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v6, v6, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v7, v7, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v8, v8, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v9, v9, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v10, v10, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v11, v11, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v12, v12, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v13, v13, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v14, v14, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v15, v15, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v16, v16, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v17, v17, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v18, v18, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v19, v19, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v20, v20, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v21, v21, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v22, v22, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v23, v23, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v24, v24, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v25, v25, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v26, v26, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v27, v27, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:  .LBB18_2: ; %end
; GFX11-TRUE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v56f16_to_v28i32:
; GFX11-FAKE16:       ; %bb.0:
; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v0
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v2
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v80, 16, v3
; GFX11-FAKE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v28
; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v69, v0, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v1, v70, v1, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v2, v71, v2, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v3, v80, v3, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v4, v68, v4, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v5, v67, v5, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v6, v66, v6, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v7, v65, v7, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v8, v64, v8, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v9, v55, v9, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v10, v54, v10, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v11, v53, v11, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v12, v52, v12, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v13, v51, v13, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v14, v50, v14, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v15, v49, v15, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v16, v48, v16, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v17, v39, v17, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v18, v38, v18, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v19, v37, v19, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v20, v36, v20, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v21, v35, v21, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v22, v34, v22, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v23, v33, v23, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v24, v32, v24, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v25, v31, v25, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v26, v30, v26, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v27, v29, v27, 0x5040100
; GFX11-FAKE16-NEXT:    s_and_saveexec_b32 s0, vcc_lo
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-FAKE16-NEXT:    s_cbranch_execz .LBB18_2
; GFX11-FAKE16-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v0, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v1, v1, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v2, v2, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v3, v3, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v4, v4, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v5, v5, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v6, v6, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v7, v7, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v8, v8, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v9, v9, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v10, v10, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v11, v11, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v12, v12, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v13, v13, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v14, v14, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v15, v15, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v16, v16, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v17, v17, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v18, v18, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v19, v19, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v20, v20, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v21, v21, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v22, v22, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v23, v23, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v24, v24, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v25, v25, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v26, v26, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v27, v27, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:  .LBB18_2: ; %end
; GFX11-FAKE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = fadd <56 x half> %a, splat (half 0xH0200)
  %a2 = bitcast <56 x half> %a1 to <28 x i32>
  br label %end

cmp.false:
  %a3 = bitcast <56 x half> %a to <28 x i32>
  br label %end

end:
  %phi = phi <28 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <28 x i32> %phi
}

define inreg <28 x i32> @bitcast_v56f16_to_v28i32_scalar(<56 x half> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v56f16_to_v28i32_scalar:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_writelane_b32 v32, s36, 0
; SI-NEXT:    v_writelane_b32 v32, s37, 1
; SI-NEXT:    v_writelane_b32 v32, s38, 2
; SI-NEXT:    v_writelane_b32 v32, s39, 3
; SI-NEXT:    v_writelane_b32 v32, s48, 4
; SI-NEXT:    v_writelane_b32 v32, s49, 5
; SI-NEXT:    v_writelane_b32 v32, s50, 6
; SI-NEXT:    v_writelane_b32 v32, s51, 7
; SI-NEXT:    v_writelane_b32 v32, s52, 8
; SI-NEXT:    v_writelane_b32 v32, s53, 9
; SI-NEXT:    v_writelane_b32 v32, s54, 10
; SI-NEXT:    v_writelane_b32 v32, s55, 11
; SI-NEXT:    v_readfirstlane_b32 s4, v13
; SI-NEXT:    v_readfirstlane_b32 s6, v12
; SI-NEXT:    v_readfirstlane_b32 s8, v11
; SI-NEXT:    v_readfirstlane_b32 s10, v10
; SI-NEXT:    v_readfirstlane_b32 s12, v9
; SI-NEXT:    v_readfirstlane_b32 s14, v8
; SI-NEXT:    v_readfirstlane_b32 s57, v7
; SI-NEXT:    v_readfirstlane_b32 s56, v6
; SI-NEXT:    v_readfirstlane_b32 s60, v5
; SI-NEXT:    v_readfirstlane_b32 s62, v4
; SI-NEXT:    v_readfirstlane_b32 s72, v3
; SI-NEXT:    v_readfirstlane_b32 s74, v2
; SI-NEXT:    v_readfirstlane_b32 s77, v1
; SI-NEXT:    v_readfirstlane_b32 s88, v0
; SI-NEXT:    s_lshr_b32 s75, s29, 16
; SI-NEXT:    s_lshr_b32 s78, s28, 16
; SI-NEXT:    s_lshr_b32 s47, s27, 16
; SI-NEXT:    s_lshr_b32 s46, s26, 16
; SI-NEXT:    s_lshr_b32 s45, s25, 16
; SI-NEXT:    s_lshr_b32 s44, s24, 16
; SI-NEXT:    s_lshr_b32 s43, s23, 16
; SI-NEXT:    s_lshr_b32 s42, s22, 16
; SI-NEXT:    s_lshr_b32 s41, s21, 16
; SI-NEXT:    s_lshr_b32 s40, s20, 16
; SI-NEXT:    s_lshr_b32 s90, s19, 16
; SI-NEXT:    s_lshr_b32 s91, s18, 16
; SI-NEXT:    s_lshr_b32 s92, s17, 16
; SI-NEXT:    s_lshr_b32 s93, s16, 16
; SI-NEXT:    s_lshr_b32 s5, s4, 16
; SI-NEXT:    s_lshr_b32 s7, s6, 16
; SI-NEXT:    s_lshr_b32 s9, s8, 16
; SI-NEXT:    s_lshr_b32 s11, s10, 16
; SI-NEXT:    s_lshr_b32 s13, s12, 16
; SI-NEXT:    s_lshr_b32 s15, s14, 16
; SI-NEXT:    s_lshr_b32 s58, s57, 16
; SI-NEXT:    s_lshr_b32 s59, s56, 16
; SI-NEXT:    s_lshr_b32 s61, s60, 16
; SI-NEXT:    s_lshr_b32 s63, s62, 16
; SI-NEXT:    s_lshr_b32 s73, s72, 16
; SI-NEXT:    s_lshr_b32 s76, s74, 16
; SI-NEXT:    s_lshr_b32 s79, s77, 16
; SI-NEXT:    s_lshr_b32 s89, s88, 16
; SI-NEXT:    v_readfirstlane_b32 s94, v14
; SI-NEXT:    s_cmp_lg_u32 s94, 0
; SI-NEXT:    s_cbranch_scc0 .LBB19_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    s_and_b32 s16, s16, 0xffff
; SI-NEXT:    s_lshl_b32 s93, s93, 16
; SI-NEXT:    s_and_b32 s17, s17, 0xffff
; SI-NEXT:    s_lshl_b32 s92, s92, 16
; SI-NEXT:    s_or_b32 s36, s16, s93
; SI-NEXT:    s_or_b32 s37, s17, s92
; SI-NEXT:    s_and_b32 s16, s18, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s91, 16
; SI-NEXT:    s_or_b32 s38, s16, s17
; SI-NEXT:    s_and_b32 s16, s19, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s90, 16
; SI-NEXT:    s_or_b32 s39, s16, s17
; SI-NEXT:    s_and_b32 s16, s20, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s40, 16
; SI-NEXT:    s_or_b32 s40, s16, s17
; SI-NEXT:    s_and_b32 s16, s21, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s41, 16
; SI-NEXT:    s_or_b32 s41, s16, s17
; SI-NEXT:    s_and_b32 s16, s22, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s42, 16
; SI-NEXT:    s_or_b32 s42, s16, s17
; SI-NEXT:    s_and_b32 s16, s23, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s43, 16
; SI-NEXT:    s_or_b32 s43, s16, s17
; SI-NEXT:    s_and_b32 s16, s24, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s44, 16
; SI-NEXT:    s_or_b32 s44, s16, s17
; SI-NEXT:    s_and_b32 s16, s25, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s45, 16
; SI-NEXT:    s_or_b32 s45, s16, s17
; SI-NEXT:    s_and_b32 s16, s26, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s46, 16
; SI-NEXT:    s_or_b32 s46, s16, s17
; SI-NEXT:    s_and_b32 s16, s27, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s47, 16
; SI-NEXT:    s_or_b32 s47, s16, s17
; SI-NEXT:    s_and_b32 s16, s28, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s78, 16
; SI-NEXT:    s_or_b32 s48, s16, s17
; SI-NEXT:    s_and_b32 s16, s29, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s75, 16
; SI-NEXT:    s_or_b32 s49, s16, s17
; SI-NEXT:    s_and_b32 s16, s88, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s89, 16
; SI-NEXT:    s_or_b32 s50, s16, s17
; SI-NEXT:    s_and_b32 s16, s77, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s79, 16
; SI-NEXT:    s_or_b32 s51, s16, s17
; SI-NEXT:    s_and_b32 s16, s74, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s76, 16
; SI-NEXT:    s_or_b32 s52, s16, s17
; SI-NEXT:    s_and_b32 s16, s72, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s73, 16
; SI-NEXT:    s_or_b32 s53, s16, s17
; SI-NEXT:    s_and_b32 s16, s62, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s63, 16
; SI-NEXT:    s_or_b32 s54, s16, s17
; SI-NEXT:    s_and_b32 s16, s60, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s61, 16
; SI-NEXT:    s_or_b32 s55, s16, s17
; SI-NEXT:    s_and_b32 s16, s56, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s59, 16
; SI-NEXT:    s_or_b32 s56, s16, s17
; SI-NEXT:    s_and_b32 s16, s57, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s58, 16
; SI-NEXT:    s_and_b32 s14, s14, 0xffff
; SI-NEXT:    s_lshl_b32 s15, s15, 16
; SI-NEXT:    s_and_b32 s12, s12, 0xffff
; SI-NEXT:    s_lshl_b32 s13, s13, 16
; SI-NEXT:    s_and_b32 s10, s10, 0xffff
; SI-NEXT:    s_lshl_b32 s11, s11, 16
; SI-NEXT:    s_and_b32 s8, s8, 0xffff
; SI-NEXT:    s_lshl_b32 s9, s9, 16
; SI-NEXT:    s_and_b32 s6, s6, 0xffff
; SI-NEXT:    s_lshl_b32 s7, s7, 16
; SI-NEXT:    s_and_b32 s4, s4, 0xffff
; SI-NEXT:    s_lshl_b32 s5, s5, 16
; SI-NEXT:    s_or_b32 s57, s16, s17
; SI-NEXT:    s_or_b32 s58, s14, s15
; SI-NEXT:    s_or_b32 s59, s12, s13
; SI-NEXT:    s_or_b32 s60, s10, s11
; SI-NEXT:    s_or_b32 s61, s8, s9
; SI-NEXT:    s_or_b32 s62, s6, s7
; SI-NEXT:    s_or_b32 s63, s4, s5
; SI-NEXT:    v_mov_b32_e32 v0, s36
; SI-NEXT:    v_mov_b32_e32 v1, s37
; SI-NEXT:    v_mov_b32_e32 v2, s38
; SI-NEXT:    v_mov_b32_e32 v3, s39
; SI-NEXT:    v_mov_b32_e32 v4, s40
; SI-NEXT:    v_mov_b32_e32 v5, s41
; SI-NEXT:    v_mov_b32_e32 v6, s42
; SI-NEXT:    v_mov_b32_e32 v7, s43
; SI-NEXT:    v_mov_b32_e32 v8, s44
; SI-NEXT:    v_mov_b32_e32 v9, s45
; SI-NEXT:    v_mov_b32_e32 v10, s46
; SI-NEXT:    v_mov_b32_e32 v11, s47
; SI-NEXT:    v_mov_b32_e32 v12, s48
; SI-NEXT:    v_mov_b32_e32 v13, s49
; SI-NEXT:    v_mov_b32_e32 v14, s50
; SI-NEXT:    v_mov_b32_e32 v15, s51
; SI-NEXT:    v_mov_b32_e32 v16, s52
; SI-NEXT:    v_mov_b32_e32 v17, s53
; SI-NEXT:    v_mov_b32_e32 v18, s54
; SI-NEXT:    v_mov_b32_e32 v19, s55
; SI-NEXT:    v_mov_b32_e32 v20, s56
; SI-NEXT:    v_mov_b32_e32 v21, s57
; SI-NEXT:    v_mov_b32_e32 v22, s58
; SI-NEXT:    v_mov_b32_e32 v23, s59
; SI-NEXT:    v_mov_b32_e32 v24, s60
; SI-NEXT:    v_mov_b32_e32 v25, s61
; SI-NEXT:    v_mov_b32_e32 v26, s62
; SI-NEXT:    v_mov_b32_e32 v27, s63
; SI-NEXT:    v_mov_b32_e32 v28, s64
; SI-NEXT:    v_mov_b32_e32 v29, s65
; SI-NEXT:    v_mov_b32_e32 v30, s66
; SI-NEXT:    v_mov_b32_e32 v31, s67
; SI-NEXT:    s_branch .LBB19_3
; SI-NEXT:  .LBB19_2: ; %cmp.true
; SI-NEXT:    v_cvt_f32_f16_e32 v0, s93
; SI-NEXT:    v_cvt_f32_f16_e32 v2, s92
; SI-NEXT:    v_cvt_f32_f16_e32 v1, s16
; SI-NEXT:    v_cvt_f32_f16_e32 v3, s17
; SI-NEXT:    v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT:    v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT:    v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT:    v_cvt_f16_f32_e32 v0, v0
; SI-NEXT:    v_cvt_f16_f32_e32 v2, v2
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v1, v1
; SI-NEXT:    v_cvt_f16_f32_e32 v3, v3
; SI-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
; SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT:    v_or_b32_e32 v0, v1, v0
; SI-NEXT:    v_or_b32_e32 v1, v3, v2
; SI-NEXT:    v_cvt_f32_f16_e32 v2, s91
; SI-NEXT:    v_cvt_f32_f16_e32 v3, s18
; SI-NEXT:    v_cvt_f32_f16_e32 v4, s19
; SI-NEXT:    v_cvt_f32_f16_e32 v5, s20
; SI-NEXT:    v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT:    v_cvt_f16_f32_e32 v2, v2
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v3, v3
; SI-NEXT:    v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT:    v_cvt_f16_f32_e32 v4, v4
; SI-NEXT:    v_or_b32_e32 v2, v3, v2
; SI-NEXT:    v_cvt_f32_f16_e32 v3, s90
; SI-NEXT:    v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT:    v_cvt_f16_f32_e32 v5, v5
; SI-NEXT:    v_cvt_f32_f16_e32 v6, s21
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v3, v3
; SI-NEXT:    v_cvt_f32_f16_e32 v7, s22
; SI-NEXT:    v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT:    v_cvt_f16_f32_e32 v6, v6
; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT:    v_or_b32_e32 v3, v4, v3
; SI-NEXT:    v_cvt_f32_f16_e32 v4, s40
; SI-NEXT:    v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT:    v_cvt_f16_f32_e32 v7, v7
; SI-NEXT:    v_cvt_f32_f16_e32 v8, s23
; SI-NEXT:    v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT:    v_cvt_f16_f32_e32 v4, v4
; SI-NEXT:    v_cvt_f32_f16_e32 v9, s24
; SI-NEXT:    v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT:    v_cvt_f16_f32_e32 v8, v8
; SI-NEXT:    v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT:    v_or_b32_e32 v4, v5, v4
; SI-NEXT:    v_cvt_f32_f16_e32 v5, s41
; SI-NEXT:    v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT:    v_cvt_f16_f32_e32 v9, v9
; SI-NEXT:    v_cvt_f32_f16_e32 v10, s25
; SI-NEXT:    v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT:    v_cvt_f16_f32_e32 v5, v5
; SI-NEXT:    v_cvt_f32_f16_e32 v11, s26
; SI-NEXT:    v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT:    v_cvt_f16_f32_e32 v10, v10
; SI-NEXT:    v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT:    v_or_b32_e32 v5, v6, v5
; SI-NEXT:    v_cvt_f32_f16_e32 v6, s42
; SI-NEXT:    v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT:    v_cvt_f16_f32_e32 v11, v11
; SI-NEXT:    v_cvt_f32_f16_e32 v12, s27
; SI-NEXT:    v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT:    v_cvt_f16_f32_e32 v6, v6
; SI-NEXT:    v_cvt_f32_f16_e32 v13, s28
; SI-NEXT:    v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT:    v_cvt_f16_f32_e32 v12, v12
; SI-NEXT:    v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT:    v_or_b32_e32 v6, v7, v6
; SI-NEXT:    v_cvt_f32_f16_e32 v7, s43
; SI-NEXT:    v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT:    v_cvt_f16_f32_e32 v13, v13
; SI-NEXT:    v_cvt_f32_f16_e32 v14, s29
; SI-NEXT:    v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT:    v_cvt_f16_f32_e32 v7, v7
; SI-NEXT:    v_cvt_f32_f16_e32 v15, s88
; SI-NEXT:    v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT:    v_cvt_f16_f32_e32 v14, v14
; SI-NEXT:    v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT:    v_or_b32_e32 v7, v8, v7
; SI-NEXT:    v_cvt_f32_f16_e32 v8, s44
; SI-NEXT:    v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT:    v_cvt_f16_f32_e32 v15, v15
; SI-NEXT:    v_cvt_f32_f16_e32 v16, s77
; SI-NEXT:    v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT:    v_cvt_f16_f32_e32 v8, v8
; SI-NEXT:    v_cvt_f32_f16_e32 v17, s74
; SI-NEXT:    v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT:    v_cvt_f16_f32_e32 v16, v16
; SI-NEXT:    v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT:    v_or_b32_e32 v8, v9, v8
; SI-NEXT:    v_cvt_f32_f16_e32 v9, s45
; SI-NEXT:    v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT:    v_cvt_f16_f32_e32 v17, v17
; SI-NEXT:    v_cvt_f32_f16_e32 v18, s72
; SI-NEXT:    v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT:    v_cvt_f16_f32_e32 v9, v9
; SI-NEXT:    v_cvt_f32_f16_e32 v19, s62
; SI-NEXT:    v_add_f32_e32 v18, 0x38000000, v18
; SI-NEXT:    v_cvt_f16_f32_e32 v18, v18
; SI-NEXT:    v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT:    v_or_b32_e32 v9, v10, v9
; SI-NEXT:    v_cvt_f32_f16_e32 v10, s46
; SI-NEXT:    v_add_f32_e32 v19, 0x38000000, v19
; SI-NEXT:    v_cvt_f16_f32_e32 v19, v19
; SI-NEXT:    v_cvt_f32_f16_e32 v20, s60
; SI-NEXT:    v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT:    v_cvt_f16_f32_e32 v10, v10
; SI-NEXT:    v_cvt_f32_f16_e32 v21, s56
; SI-NEXT:    v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT:    v_cvt_f16_f32_e32 v20, v20
; SI-NEXT:    v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT:    v_or_b32_e32 v10, v11, v10
; SI-NEXT:    v_cvt_f32_f16_e32 v11, s47
; SI-NEXT:    v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT:    v_cvt_f16_f32_e32 v21, v21
; SI-NEXT:    v_cvt_f32_f16_e32 v22, s57
; SI-NEXT:    v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT:    v_cvt_f16_f32_e32 v11, v11
; SI-NEXT:    v_cvt_f32_f16_e32 v23, s14
; SI-NEXT:    v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT:    v_cvt_f16_f32_e32 v22, v22
; SI-NEXT:    v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT:    v_or_b32_e32 v11, v12, v11
; SI-NEXT:    v_cvt_f32_f16_e32 v12, s78
; SI-NEXT:    v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT:    v_cvt_f16_f32_e32 v23, v23
; SI-NEXT:    v_cvt_f32_f16_e32 v24, s12
; SI-NEXT:    v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT:    v_cvt_f16_f32_e32 v12, v12
; SI-NEXT:    v_cvt_f32_f16_e32 v25, s10
; SI-NEXT:    v_add_f32_e32 v24, 0x38000000, v24
; SI-NEXT:    v_cvt_f16_f32_e32 v24, v24
; SI-NEXT:    v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT:    v_or_b32_e32 v12, v13, v12
; SI-NEXT:    v_cvt_f32_f16_e32 v13, s75
; SI-NEXT:    v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT:    v_cvt_f16_f32_e32 v25, v25
; SI-NEXT:    v_cvt_f32_f16_e32 v26, s8
; SI-NEXT:    v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT:    v_cvt_f16_f32_e32 v13, v13
; SI-NEXT:    v_cvt_f32_f16_e32 v27, s6
; SI-NEXT:    v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT:    v_cvt_f16_f32_e32 v26, v26
; SI-NEXT:    v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT:    v_or_b32_e32 v13, v14, v13
; SI-NEXT:    v_cvt_f32_f16_e32 v14, s89
; SI-NEXT:    v_add_f32_e32 v27, 0x38000000, v27
; SI-NEXT:    v_cvt_f16_f32_e32 v27, v27
; SI-NEXT:    v_cvt_f32_f16_e32 v28, s4
; SI-NEXT:    v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT:    v_cvt_f16_f32_e32 v14, v14
; SI-NEXT:    v_add_f32_e32 v28, 0x38000000, v28
; SI-NEXT:    v_cvt_f16_f32_e32 v28, v28
; SI-NEXT:    v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT:    v_or_b32_e32 v14, v15, v14
; SI-NEXT:    v_cvt_f32_f16_e32 v15, s79
; SI-NEXT:    v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT:    v_cvt_f16_f32_e32 v15, v15
; SI-NEXT:    v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT:    v_or_b32_e32 v15, v16, v15
; SI-NEXT:    v_cvt_f32_f16_e32 v16, s76
; SI-NEXT:    v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT:    v_cvt_f16_f32_e32 v16, v16
; SI-NEXT:    v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT:    v_or_b32_e32 v16, v17, v16
; SI-NEXT:    v_cvt_f32_f16_e32 v17, s73
; SI-NEXT:    v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT:    v_cvt_f16_f32_e32 v17, v17
; SI-NEXT:    v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT:    v_or_b32_e32 v17, v18, v17
; SI-NEXT:    v_cvt_f32_f16_e32 v18, s63
; SI-NEXT:    v_add_f32_e32 v18, 0x38000000, v18
; SI-NEXT:    v_cvt_f16_f32_e32 v18, v18
; SI-NEXT:    v_lshlrev_b32_e32 v18, 16, v18
; SI-NEXT:    v_or_b32_e32 v18, v19, v18
; SI-NEXT:    v_cvt_f32_f16_e32 v19, s61
; SI-NEXT:    v_add_f32_e32 v19, 0x38000000, v19
; SI-NEXT:    v_cvt_f16_f32_e32 v19, v19
; SI-NEXT:    v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT:    v_or_b32_e32 v19, v20, v19
; SI-NEXT:    v_cvt_f32_f16_e32 v20, s59
; SI-NEXT:    v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT:    v_cvt_f16_f32_e32 v20, v20
; SI-NEXT:    v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT:    v_or_b32_e32 v20, v21, v20
; SI-NEXT:    v_cvt_f32_f16_e32 v21, s58
; SI-NEXT:    v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT:    v_cvt_f16_f32_e32 v21, v21
; SI-NEXT:    v_lshlrev_b32_e32 v21, 16, v21
; SI-NEXT:    v_or_b32_e32 v21, v22, v21
; SI-NEXT:    v_cvt_f32_f16_e32 v22, s15
; SI-NEXT:    v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT:    v_cvt_f16_f32_e32 v22, v22
; SI-NEXT:    v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT:    v_or_b32_e32 v22, v23, v22
; SI-NEXT:    v_cvt_f32_f16_e32 v23, s13
; SI-NEXT:    v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT:    v_cvt_f16_f32_e32 v23, v23
; SI-NEXT:    v_lshlrev_b32_e32 v23, 16, v23
; SI-NEXT:    v_or_b32_e32 v23, v24, v23
; SI-NEXT:    v_cvt_f32_f16_e32 v24, s11
; SI-NEXT:    v_add_f32_e32 v24, 0x38000000, v24
; SI-NEXT:    v_cvt_f16_f32_e32 v24, v24
; SI-NEXT:    v_lshlrev_b32_e32 v24, 16, v24
; SI-NEXT:    v_or_b32_e32 v24, v25, v24
; SI-NEXT:    v_cvt_f32_f16_e32 v25, s9
; SI-NEXT:    v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT:    v_cvt_f16_f32_e32 v25, v25
; SI-NEXT:    v_lshlrev_b32_e32 v25, 16, v25
; SI-NEXT:    v_or_b32_e32 v25, v26, v25
; SI-NEXT:    v_cvt_f32_f16_e32 v26, s7
; SI-NEXT:    v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT:    v_cvt_f16_f32_e32 v26, v26
; SI-NEXT:    v_lshlrev_b32_e32 v26, 16, v26
; SI-NEXT:    v_or_b32_e32 v26, v27, v26
; SI-NEXT:    v_cvt_f32_f16_e32 v27, s5
; SI-NEXT:    v_add_f32_e32 v27, 0x38000000, v27
; SI-NEXT:    v_cvt_f16_f32_e32 v27, v27
; SI-NEXT:    v_lshlrev_b32_e32 v27, 16, v27
; SI-NEXT:    v_or_b32_e32 v27, v28, v27
; SI-NEXT:  .LBB19_3: ; %end
; SI-NEXT:    v_readlane_b32 s55, v32, 11
; SI-NEXT:    v_readlane_b32 s54, v32, 10
; SI-NEXT:    v_readlane_b32 s53, v32, 9
; SI-NEXT:    v_readlane_b32 s52, v32, 8
; SI-NEXT:    v_readlane_b32 s51, v32, 7
; SI-NEXT:    v_readlane_b32 s50, v32, 6
; SI-NEXT:    v_readlane_b32 s49, v32, 5
; SI-NEXT:    v_readlane_b32 s48, v32, 4
; SI-NEXT:    v_readlane_b32 s39, v32, 3
; SI-NEXT:    v_readlane_b32 s38, v32, 2
; SI-NEXT:    v_readlane_b32 s37, v32, 1
; SI-NEXT:    v_readlane_b32 s36, v32, 0
; SI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v56f16_to_v28i32_scalar:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    v_writelane_b32 v32, s36, 0
; VI-NEXT:    v_writelane_b32 v32, s37, 1
; VI-NEXT:    v_writelane_b32 v32, s38, 2
; VI-NEXT:    v_writelane_b32 v32, s39, 3
; VI-NEXT:    v_writelane_b32 v32, s48, 4
; VI-NEXT:    v_writelane_b32 v32, s49, 5
; VI-NEXT:    v_writelane_b32 v32, s50, 6
; VI-NEXT:    v_writelane_b32 v32, s51, 7
; VI-NEXT:    v_writelane_b32 v32, s52, 8
; VI-NEXT:    v_writelane_b32 v32, s53, 9
; VI-NEXT:    v_writelane_b32 v32, s54, 10
; VI-NEXT:    v_writelane_b32 v32, s55, 11
; VI-NEXT:    v_writelane_b32 v32, s30, 12
; VI-NEXT:    v_writelane_b32 v32, s31, 13
; VI-NEXT:    v_readfirstlane_b32 s4, v13
; VI-NEXT:    v_readfirstlane_b32 s6, v12
; VI-NEXT:    v_readfirstlane_b32 s8, v11
; VI-NEXT:    v_readfirstlane_b32 s10, v10
; VI-NEXT:    v_readfirstlane_b32 s12, v9
; VI-NEXT:    v_readfirstlane_b32 s14, v8
; VI-NEXT:    v_readfirstlane_b32 s57, v7
; VI-NEXT:    v_readfirstlane_b32 s56, v6
; VI-NEXT:    v_readfirstlane_b32 s60, v5
; VI-NEXT:    v_readfirstlane_b32 s62, v4
; VI-NEXT:    v_readfirstlane_b32 s73, v3
; VI-NEXT:    v_readfirstlane_b32 s76, v2
; VI-NEXT:    v_readfirstlane_b32 s78, v1
; VI-NEXT:    v_readfirstlane_b32 s88, v0
; VI-NEXT:    s_lshr_b32 s72, s29, 16
; VI-NEXT:    s_lshr_b32 s75, s28, 16
; VI-NEXT:    s_lshr_b32 s47, s27, 16
; VI-NEXT:    s_lshr_b32 s46, s26, 16
; VI-NEXT:    s_lshr_b32 s45, s25, 16
; VI-NEXT:    s_lshr_b32 s44, s24, 16
; VI-NEXT:    s_lshr_b32 s43, s23, 16
; VI-NEXT:    s_lshr_b32 s42, s22, 16
; VI-NEXT:    s_lshr_b32 s41, s21, 16
; VI-NEXT:    s_lshr_b32 s40, s20, 16
; VI-NEXT:    s_lshr_b32 s90, s19, 16
; VI-NEXT:    s_lshr_b32 s91, s18, 16
; VI-NEXT:    s_lshr_b32 vcc_lo, s17, 16
; VI-NEXT:    s_lshr_b32 vcc_hi, s16, 16
; VI-NEXT:    s_lshr_b32 s5, s4, 16
; VI-NEXT:    s_lshr_b32 s7, s6, 16
; VI-NEXT:    s_lshr_b32 s9, s8, 16
; VI-NEXT:    s_lshr_b32 s11, s10, 16
; VI-NEXT:    s_lshr_b32 s13, s12, 16
; VI-NEXT:    s_lshr_b32 s15, s14, 16
; VI-NEXT:    s_lshr_b32 s58, s57, 16
; VI-NEXT:    s_lshr_b32 s59, s56, 16
; VI-NEXT:    s_lshr_b32 s61, s60, 16
; VI-NEXT:    s_lshr_b32 s63, s62, 16
; VI-NEXT:    s_lshr_b32 s74, s73, 16
; VI-NEXT:    s_lshr_b32 s77, s76, 16
; VI-NEXT:    s_lshr_b32 s79, s78, 16
; VI-NEXT:    s_lshr_b32 s89, s88, 16
; VI-NEXT:    v_readfirstlane_b32 s30, v14
; VI-NEXT:    s_cmp_lg_u32 s30, 0
; VI-NEXT:    s_cbranch_scc0 .LBB19_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    s_and_b32 s16, 0xffff, s16
; VI-NEXT:    s_lshl_b32 vcc_hi, vcc_hi, 16
; VI-NEXT:    s_and_b32 s17, 0xffff, s17
; VI-NEXT:    s_lshl_b32 vcc_lo, vcc_lo, 16
; VI-NEXT:    s_or_b32 s36, s16, vcc_hi
; VI-NEXT:    s_or_b32 s37, s17, vcc_lo
; VI-NEXT:    s_and_b32 s16, 0xffff, s18
; VI-NEXT:    s_lshl_b32 s17, s91, 16
; VI-NEXT:    s_or_b32 s38, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s19
; VI-NEXT:    s_lshl_b32 s17, s90, 16
; VI-NEXT:    s_or_b32 s39, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s20
; VI-NEXT:    s_lshl_b32 s17, s40, 16
; VI-NEXT:    s_or_b32 s40, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s21
; VI-NEXT:    s_lshl_b32 s17, s41, 16
; VI-NEXT:    s_or_b32 s41, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s22
; VI-NEXT:    s_lshl_b32 s17, s42, 16
; VI-NEXT:    s_or_b32 s42, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s23
; VI-NEXT:    s_lshl_b32 s17, s43, 16
; VI-NEXT:    s_or_b32 s43, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s24
; VI-NEXT:    s_lshl_b32 s17, s44, 16
; VI-NEXT:    s_or_b32 s44, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s25
; VI-NEXT:    s_lshl_b32 s17, s45, 16
; VI-NEXT:    s_or_b32 s45, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s26
; VI-NEXT:    s_lshl_b32 s17, s46, 16
; VI-NEXT:    s_or_b32 s46, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s27
; VI-NEXT:    s_lshl_b32 s17, s47, 16
; VI-NEXT:    s_or_b32 s47, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s28
; VI-NEXT:    s_lshl_b32 s17, s75, 16
; VI-NEXT:    s_or_b32 s48, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s29
; VI-NEXT:    s_lshl_b32 s17, s72, 16
; VI-NEXT:    s_or_b32 s49, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s88
; VI-NEXT:    s_lshl_b32 s17, s89, 16
; VI-NEXT:    s_or_b32 s50, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s78
; VI-NEXT:    s_lshl_b32 s17, s79, 16
; VI-NEXT:    s_or_b32 s51, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s76
; VI-NEXT:    s_lshl_b32 s17, s77, 16
; VI-NEXT:    s_or_b32 s52, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s73
; VI-NEXT:    s_lshl_b32 s17, s74, 16
; VI-NEXT:    s_or_b32 s53, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s62
; VI-NEXT:    s_lshl_b32 s17, s63, 16
; VI-NEXT:    s_or_b32 s54, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s60
; VI-NEXT:    s_lshl_b32 s17, s61, 16
; VI-NEXT:    s_or_b32 s55, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s56
; VI-NEXT:    s_lshl_b32 s17, s59, 16
; VI-NEXT:    s_or_b32 s56, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s57
; VI-NEXT:    s_lshl_b32 s17, s58, 16
; VI-NEXT:    s_and_b32 s14, 0xffff, s14
; VI-NEXT:    s_lshl_b32 s15, s15, 16
; VI-NEXT:    s_and_b32 s12, 0xffff, s12
; VI-NEXT:    s_lshl_b32 s13, s13, 16
; VI-NEXT:    s_and_b32 s10, 0xffff, s10
; VI-NEXT:    s_lshl_b32 s11, s11, 16
; VI-NEXT:    s_and_b32 s8, 0xffff, s8
; VI-NEXT:    s_lshl_b32 s9, s9, 16
; VI-NEXT:    s_and_b32 s6, 0xffff, s6
; VI-NEXT:    s_lshl_b32 s7, s7, 16
; VI-NEXT:    s_and_b32 s4, 0xffff, s4
; VI-NEXT:    s_lshl_b32 s5, s5, 16
; VI-NEXT:    s_or_b32 s57, s16, s17
; VI-NEXT:    s_or_b32 s58, s14, s15
; VI-NEXT:    s_or_b32 s59, s12, s13
; VI-NEXT:    s_or_b32 s60, s10, s11
; VI-NEXT:    s_or_b32 s61, s8, s9
; VI-NEXT:    s_or_b32 s62, s6, s7
; VI-NEXT:    s_or_b32 s63, s4, s5
; VI-NEXT:    v_mov_b32_e32 v0, s36
; VI-NEXT:    v_mov_b32_e32 v1, s37
; VI-NEXT:    v_mov_b32_e32 v2, s38
; VI-NEXT:    v_mov_b32_e32 v3, s39
; VI-NEXT:    v_mov_b32_e32 v4, s40
; VI-NEXT:    v_mov_b32_e32 v5, s41
; VI-NEXT:    v_mov_b32_e32 v6, s42
; VI-NEXT:    v_mov_b32_e32 v7, s43
; VI-NEXT:    v_mov_b32_e32 v8, s44
; VI-NEXT:    v_mov_b32_e32 v9, s45
; VI-NEXT:    v_mov_b32_e32 v10, s46
; VI-NEXT:    v_mov_b32_e32 v11, s47
; VI-NEXT:    v_mov_b32_e32 v12, s48
; VI-NEXT:    v_mov_b32_e32 v13, s49
; VI-NEXT:    v_mov_b32_e32 v14, s50
; VI-NEXT:    v_mov_b32_e32 v15, s51
; VI-NEXT:    v_mov_b32_e32 v16, s52
; VI-NEXT:    v_mov_b32_e32 v17, s53
; VI-NEXT:    v_mov_b32_e32 v18, s54
; VI-NEXT:    v_mov_b32_e32 v19, s55
; VI-NEXT:    v_mov_b32_e32 v20, s56
; VI-NEXT:    v_mov_b32_e32 v21, s57
; VI-NEXT:    v_mov_b32_e32 v22, s58
; VI-NEXT:    v_mov_b32_e32 v23, s59
; VI-NEXT:    v_mov_b32_e32 v24, s60
; VI-NEXT:    v_mov_b32_e32 v25, s61
; VI-NEXT:    v_mov_b32_e32 v26, s62
; VI-NEXT:    v_mov_b32_e32 v27, s63
; VI-NEXT:    v_mov_b32_e32 v28, s64
; VI-NEXT:    v_mov_b32_e32 v29, s65
; VI-NEXT:    v_mov_b32_e32 v30, s66
; VI-NEXT:    v_mov_b32_e32 v31, s67
; VI-NEXT:    s_branch .LBB19_3
; VI-NEXT:  .LBB19_2: ; %cmp.true
; VI-NEXT:    v_mov_b32_e32 v27, 0x200
; VI-NEXT:    v_mov_b32_e32 v0, vcc_hi
; VI-NEXT:    v_mov_b32_e32 v2, vcc_lo
; VI-NEXT:    v_add_f16_sdwa v0, v0, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v1, s16, v27
; VI-NEXT:    v_add_f16_sdwa v2, v2, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v3, s17, v27
; VI-NEXT:    v_or_b32_e32 v0, v1, v0
; VI-NEXT:    v_or_b32_e32 v1, v3, v2
; VI-NEXT:    v_mov_b32_e32 v2, s91
; VI-NEXT:    v_add_f16_sdwa v2, v2, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v3, s18, v27
; VI-NEXT:    v_or_b32_e32 v2, v3, v2
; VI-NEXT:    v_mov_b32_e32 v3, s90
; VI-NEXT:    v_add_f16_sdwa v3, v3, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v4, s19, v27
; VI-NEXT:    v_or_b32_e32 v3, v4, v3
; VI-NEXT:    v_mov_b32_e32 v4, s40
; VI-NEXT:    v_add_f16_sdwa v4, v4, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v5, s20, v27
; VI-NEXT:    v_or_b32_e32 v4, v5, v4
; VI-NEXT:    v_mov_b32_e32 v5, s41
; VI-NEXT:    v_add_f16_sdwa v5, v5, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v6, s21, v27
; VI-NEXT:    v_or_b32_e32 v5, v6, v5
; VI-NEXT:    v_mov_b32_e32 v6, s42
; VI-NEXT:    v_add_f16_sdwa v6, v6, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v7, s22, v27
; VI-NEXT:    v_or_b32_e32 v6, v7, v6
; VI-NEXT:    v_mov_b32_e32 v7, s43
; VI-NEXT:    v_add_f16_sdwa v7, v7, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v8, s23, v27
; VI-NEXT:    v_or_b32_e32 v7, v8, v7
; VI-NEXT:    v_mov_b32_e32 v8, s44
; VI-NEXT:    v_add_f16_sdwa v8, v8, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v9, s24, v27
; VI-NEXT:    v_or_b32_e32 v8, v9, v8
; VI-NEXT:    v_mov_b32_e32 v9, s45
; VI-NEXT:    v_add_f16_sdwa v9, v9, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v10, s25, v27
; VI-NEXT:    v_or_b32_e32 v9, v10, v9
; VI-NEXT:    v_mov_b32_e32 v10, s46
; VI-NEXT:    v_add_f16_sdwa v10, v10, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v11, s26, v27
; VI-NEXT:    v_or_b32_e32 v10, v11, v10
; VI-NEXT:    v_mov_b32_e32 v11, s47
; VI-NEXT:    v_add_f16_sdwa v11, v11, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v12, s27, v27
; VI-NEXT:    v_or_b32_e32 v11, v12, v11
; VI-NEXT:    v_mov_b32_e32 v12, s75
; VI-NEXT:    v_add_f16_sdwa v12, v12, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v13, s28, v27
; VI-NEXT:    v_or_b32_e32 v12, v13, v12
; VI-NEXT:    v_mov_b32_e32 v13, s72
; VI-NEXT:    v_add_f16_sdwa v13, v13, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v14, s29, v27
; VI-NEXT:    v_or_b32_e32 v13, v14, v13
; VI-NEXT:    v_mov_b32_e32 v14, s89
; VI-NEXT:    v_add_f16_sdwa v14, v14, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v15, s88, v27
; VI-NEXT:    v_or_b32_e32 v14, v15, v14
; VI-NEXT:    v_mov_b32_e32 v15, s79
; VI-NEXT:    v_add_f16_sdwa v15, v15, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v16, s78, v27
; VI-NEXT:    v_or_b32_e32 v15, v16, v15
; VI-NEXT:    v_mov_b32_e32 v16, s77
; VI-NEXT:    v_add_f16_sdwa v16, v16, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v17, s76, v27
; VI-NEXT:    v_or_b32_e32 v16, v17, v16
; VI-NEXT:    v_mov_b32_e32 v17, s74
; VI-NEXT:    v_add_f16_sdwa v17, v17, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v18, s73, v27
; VI-NEXT:    v_or_b32_e32 v17, v18, v17
; VI-NEXT:    v_mov_b32_e32 v18, s63
; VI-NEXT:    v_add_f16_sdwa v18, v18, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v19, s62, v27
; VI-NEXT:    v_or_b32_e32 v18, v19, v18
; VI-NEXT:    v_mov_b32_e32 v19, s61
; VI-NEXT:    v_add_f16_sdwa v19, v19, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v20, s60, v27
; VI-NEXT:    v_or_b32_e32 v19, v20, v19
; VI-NEXT:    v_mov_b32_e32 v20, s59
; VI-NEXT:    v_add_f16_sdwa v20, v20, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v21, s56, v27
; VI-NEXT:    v_or_b32_e32 v20, v21, v20
; VI-NEXT:    v_mov_b32_e32 v21, s58
; VI-NEXT:    v_add_f16_sdwa v21, v21, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v22, s57, v27
; VI-NEXT:    v_or_b32_e32 v21, v22, v21
; VI-NEXT:    v_mov_b32_e32 v22, s15
; VI-NEXT:    v_add_f16_sdwa v22, v22, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v23, s14, v27
; VI-NEXT:    v_or_b32_e32 v22, v23, v22
; VI-NEXT:    v_mov_b32_e32 v23, s13
; VI-NEXT:    v_add_f16_sdwa v23, v23, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v24, s12, v27
; VI-NEXT:    v_or_b32_e32 v23, v24, v23
; VI-NEXT:    v_mov_b32_e32 v24, s11
; VI-NEXT:    v_add_f16_sdwa v24, v24, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v25, s10, v27
; VI-NEXT:    v_or_b32_e32 v24, v25, v24
; VI-NEXT:    v_mov_b32_e32 v25, s9
; VI-NEXT:    v_add_f16_sdwa v25, v25, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v26, s8, v27
; VI-NEXT:    v_or_b32_e32 v25, v26, v25
; VI-NEXT:    v_mov_b32_e32 v26, s7
; VI-NEXT:    v_add_f16_sdwa v26, v26, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v28, s6, v27
; VI-NEXT:    v_or_b32_e32 v26, v28, v26
; VI-NEXT:    v_mov_b32_e32 v28, s5
; VI-NEXT:    v_add_f16_sdwa v28, v28, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v27, s4, v27
; VI-NEXT:    v_or_b32_e32 v27, v27, v28
; VI-NEXT:  .LBB19_3: ; %end
; VI-NEXT:    v_readlane_b32 s30, v32, 12
; VI-NEXT:    v_readlane_b32 s31, v32, 13
; VI-NEXT:    v_readlane_b32 s55, v32, 11
; VI-NEXT:    v_readlane_b32 s54, v32, 10
; VI-NEXT:    v_readlane_b32 s53, v32, 9
; VI-NEXT:    v_readlane_b32 s52, v32, 8
; VI-NEXT:    v_readlane_b32 s51, v32, 7
; VI-NEXT:    v_readlane_b32 s50, v32, 6
; VI-NEXT:    v_readlane_b32 s49, v32, 5
; VI-NEXT:    v_readlane_b32 s48, v32, 4
; VI-NEXT:    v_readlane_b32 s39, v32, 3
; VI-NEXT:    v_readlane_b32 s38, v32, 2
; VI-NEXT:    v_readlane_b32 s37, v32, 1
; VI-NEXT:    v_readlane_b32 s36, v32, 0
; VI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v56f16_to_v28i32_scalar:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    s_mov_b64 exec, s[4:5]
; GFX9-NEXT:    v_writelane_b32 v32, s36, 0
; GFX9-NEXT:    v_writelane_b32 v32, s37, 1
; GFX9-NEXT:    v_writelane_b32 v32, s38, 2
; GFX9-NEXT:    v_writelane_b32 v32, s39, 3
; GFX9-NEXT:    v_writelane_b32 v32, s48, 4
; GFX9-NEXT:    v_writelane_b32 v32, s49, 5
; GFX9-NEXT:    v_writelane_b32 v32, s50, 6
; GFX9-NEXT:    v_writelane_b32 v32, s51, 7
; GFX9-NEXT:    v_writelane_b32 v32, s52, 8
; GFX9-NEXT:    v_writelane_b32 v32, s53, 9
; GFX9-NEXT:    v_writelane_b32 v32, s54, 10
; GFX9-NEXT:    v_writelane_b32 v32, s55, 11
; GFX9-NEXT:    v_readfirstlane_b32 s4, v13
; GFX9-NEXT:    v_readfirstlane_b32 s6, v12
; GFX9-NEXT:    v_readfirstlane_b32 s8, v11
; GFX9-NEXT:    v_readfirstlane_b32 s10, v10
; GFX9-NEXT:    v_readfirstlane_b32 s12, v9
; GFX9-NEXT:    v_readfirstlane_b32 s14, v8
; GFX9-NEXT:    v_readfirstlane_b32 s57, v7
; GFX9-NEXT:    v_readfirstlane_b32 s60, v6
; GFX9-NEXT:    v_readfirstlane_b32 s62, v5
; GFX9-NEXT:    v_readfirstlane_b32 s72, v4
; GFX9-NEXT:    v_readfirstlane_b32 s74, v3
; GFX9-NEXT:    v_readfirstlane_b32 s76, v2
; GFX9-NEXT:    v_readfirstlane_b32 s78, v1
; GFX9-NEXT:    v_readfirstlane_b32 s88, v0
; GFX9-NEXT:    s_lshr_b32 s56, s29, 16
; GFX9-NEXT:    s_lshr_b32 s59, s28, 16
; GFX9-NEXT:    s_lshr_b32 s47, s27, 16
; GFX9-NEXT:    s_lshr_b32 s46, s26, 16
; GFX9-NEXT:    s_lshr_b32 s45, s25, 16
; GFX9-NEXT:    s_lshr_b32 s44, s24, 16
; GFX9-NEXT:    s_lshr_b32 s43, s23, 16
; GFX9-NEXT:    s_lshr_b32 s42, s22, 16
; GFX9-NEXT:    s_lshr_b32 s41, s21, 16
; GFX9-NEXT:    s_lshr_b32 s40, s20, 16
; GFX9-NEXT:    s_lshr_b32 s90, s19, 16
; GFX9-NEXT:    s_lshr_b32 s91, s18, 16
; GFX9-NEXT:    s_lshr_b32 s92, s17, 16
; GFX9-NEXT:    s_lshr_b32 s93, s16, 16
; GFX9-NEXT:    s_lshr_b32 s5, s4, 16
; GFX9-NEXT:    s_lshr_b32 s7, s6, 16
; GFX9-NEXT:    s_lshr_b32 s9, s8, 16
; GFX9-NEXT:    s_lshr_b32 s11, s10, 16
; GFX9-NEXT:    s_lshr_b32 s13, s12, 16
; GFX9-NEXT:    s_lshr_b32 s15, s14, 16
; GFX9-NEXT:    s_lshr_b32 s58, s57, 16
; GFX9-NEXT:    s_lshr_b32 s61, s60, 16
; GFX9-NEXT:    s_lshr_b32 s63, s62, 16
; GFX9-NEXT:    s_lshr_b32 s73, s72, 16
; GFX9-NEXT:    s_lshr_b32 s75, s74, 16
; GFX9-NEXT:    s_lshr_b32 s77, s76, 16
; GFX9-NEXT:    s_lshr_b32 s79, s78, 16
; GFX9-NEXT:    s_lshr_b32 s89, s88, 16
; GFX9-NEXT:    v_readfirstlane_b32 s94, v14
; GFX9-NEXT:    s_cmp_lg_u32 s94, 0
; GFX9-NEXT:    s_cbranch_scc0 .LBB19_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    s_pack_ll_b32_b16 s36, s16, s93
; GFX9-NEXT:    s_pack_ll_b32_b16 s37, s17, s92
; GFX9-NEXT:    s_pack_ll_b32_b16 s38, s18, s91
; GFX9-NEXT:    s_pack_ll_b32_b16 s39, s19, s90
; GFX9-NEXT:    s_pack_ll_b32_b16 s40, s20, s40
; GFX9-NEXT:    s_pack_ll_b32_b16 s41, s21, s41
; GFX9-NEXT:    s_pack_ll_b32_b16 s42, s22, s42
; GFX9-NEXT:    s_pack_ll_b32_b16 s43, s23, s43
; GFX9-NEXT:    s_pack_ll_b32_b16 s44, s24, s44
; GFX9-NEXT:    s_pack_ll_b32_b16 s45, s25, s45
; GFX9-NEXT:    s_pack_ll_b32_b16 s46, s26, s46
; GFX9-NEXT:    s_pack_ll_b32_b16 s47, s27, s47
; GFX9-NEXT:    s_pack_ll_b32_b16 s48, s28, s59
; GFX9-NEXT:    s_pack_ll_b32_b16 s49, s29, s56
; GFX9-NEXT:    s_pack_ll_b32_b16 s50, s88, s89
; GFX9-NEXT:    s_pack_ll_b32_b16 s51, s78, s79
; GFX9-NEXT:    s_pack_ll_b32_b16 s52, s76, s77
; GFX9-NEXT:    s_pack_ll_b32_b16 s53, s74, s75
; GFX9-NEXT:    s_pack_ll_b32_b16 s54, s72, s73
; GFX9-NEXT:    s_pack_ll_b32_b16 s55, s62, s63
; GFX9-NEXT:    s_pack_ll_b32_b16 s56, s60, s61
; GFX9-NEXT:    s_pack_ll_b32_b16 s57, s57, s58
; GFX9-NEXT:    s_pack_ll_b32_b16 s58, s14, s15
; GFX9-NEXT:    s_pack_ll_b32_b16 s59, s12, s13
; GFX9-NEXT:    s_pack_ll_b32_b16 s60, s10, s11
; GFX9-NEXT:    s_pack_ll_b32_b16 s61, s8, s9
; GFX9-NEXT:    s_pack_ll_b32_b16 s62, s6, s7
; GFX9-NEXT:    s_pack_ll_b32_b16 s63, s4, s5
; GFX9-NEXT:    v_mov_b32_e32 v0, s36
; GFX9-NEXT:    v_mov_b32_e32 v1, s37
; GFX9-NEXT:    v_mov_b32_e32 v2, s38
; GFX9-NEXT:    v_mov_b32_e32 v3, s39
; GFX9-NEXT:    v_mov_b32_e32 v4, s40
; GFX9-NEXT:    v_mov_b32_e32 v5, s41
; GFX9-NEXT:    v_mov_b32_e32 v6, s42
; GFX9-NEXT:    v_mov_b32_e32 v7, s43
; GFX9-NEXT:    v_mov_b32_e32 v8, s44
; GFX9-NEXT:    v_mov_b32_e32 v9, s45
; GFX9-NEXT:    v_mov_b32_e32 v10, s46
; GFX9-NEXT:    v_mov_b32_e32 v11, s47
; GFX9-NEXT:    v_mov_b32_e32 v12, s48
; GFX9-NEXT:    v_mov_b32_e32 v13, s49
; GFX9-NEXT:    v_mov_b32_e32 v14, s50
; GFX9-NEXT:    v_mov_b32_e32 v15, s51
; GFX9-NEXT:    v_mov_b32_e32 v16, s52
; GFX9-NEXT:    v_mov_b32_e32 v17, s53
; GFX9-NEXT:    v_mov_b32_e32 v18, s54
; GFX9-NEXT:    v_mov_b32_e32 v19, s55
; GFX9-NEXT:    v_mov_b32_e32 v20, s56
; GFX9-NEXT:    v_mov_b32_e32 v21, s57
; GFX9-NEXT:    v_mov_b32_e32 v22, s58
; GFX9-NEXT:    v_mov_b32_e32 v23, s59
; GFX9-NEXT:    v_mov_b32_e32 v24, s60
; GFX9-NEXT:    v_mov_b32_e32 v25, s61
; GFX9-NEXT:    v_mov_b32_e32 v26, s62
; GFX9-NEXT:    v_mov_b32_e32 v27, s63
; GFX9-NEXT:    v_mov_b32_e32 v28, s64
; GFX9-NEXT:    v_mov_b32_e32 v29, s65
; GFX9-NEXT:    v_mov_b32_e32 v30, s66
; GFX9-NEXT:    v_mov_b32_e32 v31, s67
; GFX9-NEXT:    s_branch .LBB19_3
; GFX9-NEXT:  .LBB19_2: ; %cmp.true
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s16, s93
; GFX9-NEXT:    v_mov_b32_e32 v27, 0x200
; GFX9-NEXT:    v_pk_add_f16 v0, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s18, s91
; GFX9-NEXT:    v_pk_add_f16 v2, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s19, s90
; GFX9-NEXT:    v_pk_add_f16 v3, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s20, s40
; GFX9-NEXT:    v_pk_add_f16 v4, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s21, s41
; GFX9-NEXT:    v_pk_add_f16 v5, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s22, s42
; GFX9-NEXT:    v_pk_add_f16 v6, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s23, s43
; GFX9-NEXT:    v_pk_add_f16 v7, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s24, s44
; GFX9-NEXT:    v_pk_add_f16 v8, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s25, s45
; GFX9-NEXT:    v_pk_add_f16 v9, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s26, s46
; GFX9-NEXT:    v_pk_add_f16 v10, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s27, s47
; GFX9-NEXT:    v_pk_add_f16 v11, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s28, s59
; GFX9-NEXT:    v_pk_add_f16 v12, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s29, s56
; GFX9-NEXT:    v_pk_add_f16 v13, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s88, s89
; GFX9-NEXT:    v_pk_add_f16 v14, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s78, s79
; GFX9-NEXT:    v_pk_add_f16 v15, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s76, s77
; GFX9-NEXT:    v_pk_add_f16 v16, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s74, s75
; GFX9-NEXT:    v_pk_add_f16 v17, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s72, s73
; GFX9-NEXT:    v_pk_add_f16 v18, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s62, s63
; GFX9-NEXT:    v_pk_add_f16 v19, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s60, s61
; GFX9-NEXT:    s_pack_ll_b32_b16 s17, s17, s92
; GFX9-NEXT:    v_pk_add_f16 v20, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s57, s58
; GFX9-NEXT:    s_pack_ll_b32_b16 s14, s14, s15
; GFX9-NEXT:    s_pack_ll_b32_b16 s12, s12, s13
; GFX9-NEXT:    s_pack_ll_b32_b16 s10, s10, s11
; GFX9-NEXT:    s_pack_ll_b32_b16 s8, s8, s9
; GFX9-NEXT:    s_pack_ll_b32_b16 s6, s6, s7
; GFX9-NEXT:    s_pack_ll_b32_b16 s4, s4, s5
; GFX9-NEXT:    v_pk_add_f16 v1, s17, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v21, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v22, s14, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v23, s12, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v24, s10, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v25, s8, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v26, s6, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v27, s4, v27 op_sel_hi:[1,0]
; GFX9-NEXT:  .LBB19_3: ; %end
; GFX9-NEXT:    v_readlane_b32 s55, v32, 11
; GFX9-NEXT:    v_readlane_b32 s54, v32, 10
; GFX9-NEXT:    v_readlane_b32 s53, v32, 9
; GFX9-NEXT:    v_readlane_b32 s52, v32, 8
; GFX9-NEXT:    v_readlane_b32 s51, v32, 7
; GFX9-NEXT:    v_readlane_b32 s50, v32, 6
; GFX9-NEXT:    v_readlane_b32 s49, v32, 5
; GFX9-NEXT:    v_readlane_b32 s48, v32, 4
; GFX9-NEXT:    v_readlane_b32 s39, v32, 3
; GFX9-NEXT:    v_readlane_b32 s38, v32, 2
; GFX9-NEXT:    v_readlane_b32 s37, v32, 1
; GFX9-NEXT:    v_readlane_b32 s36, v32, 0
; GFX9-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    s_mov_b64 exec, s[4:5]
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v56f16_to_v28i32_scalar:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_readfirstlane_b32 s40, v9
; GFX11-NEXT:    v_readfirstlane_b32 s42, v8
; GFX11-NEXT:    v_readfirstlane_b32 s43, v7
; GFX11-NEXT:    v_readfirstlane_b32 s46, v6
; GFX11-NEXT:    v_readfirstlane_b32 s57, v5
; GFX11-NEXT:    v_readfirstlane_b32 s59, v4
; GFX11-NEXT:    v_readfirstlane_b32 s62, v3
; GFX11-NEXT:    v_readfirstlane_b32 s63, v2
; GFX11-NEXT:    v_readfirstlane_b32 s73, v1
; GFX11-NEXT:    v_readfirstlane_b32 s75, v0
; GFX11-NEXT:    v_readfirstlane_b32 s90, v10
; GFX11-NEXT:    s_lshr_b32 s88, s1, 16
; GFX11-NEXT:    s_lshr_b32 s89, s0, 16
; GFX11-NEXT:    s_lshr_b32 s44, s29, 16
; GFX11-NEXT:    s_lshr_b32 s47, s28, 16
; GFX11-NEXT:    s_lshr_b32 s15, s27, 16
; GFX11-NEXT:    s_lshr_b32 s14, s26, 16
; GFX11-NEXT:    s_lshr_b32 s13, s25, 16
; GFX11-NEXT:    s_lshr_b32 s12, s24, 16
; GFX11-NEXT:    s_lshr_b32 s11, s23, 16
; GFX11-NEXT:    s_lshr_b32 s10, s22, 16
; GFX11-NEXT:    s_lshr_b32 s9, s21, 16
; GFX11-NEXT:    s_lshr_b32 s8, s20, 16
; GFX11-NEXT:    s_lshr_b32 s7, s19, 16
; GFX11-NEXT:    s_lshr_b32 s6, s18, 16
; GFX11-NEXT:    s_lshr_b32 s5, s17, 16
; GFX11-NEXT:    s_lshr_b32 s4, s16, 16
; GFX11-NEXT:    s_lshr_b32 s78, s3, 16
; GFX11-NEXT:    s_lshr_b32 s79, s2, 16
; GFX11-NEXT:    s_lshr_b32 s41, s40, 16
; GFX11-NEXT:    s_lshr_b32 s45, s42, 16
; GFX11-NEXT:    s_lshr_b32 s56, s43, 16
; GFX11-NEXT:    s_lshr_b32 s58, s46, 16
; GFX11-NEXT:    s_lshr_b32 s60, s57, 16
; GFX11-NEXT:    s_lshr_b32 s61, s59, 16
; GFX11-NEXT:    s_lshr_b32 s72, s62, 16
; GFX11-NEXT:    s_lshr_b32 s74, s63, 16
; GFX11-NEXT:    s_lshr_b32 s76, s73, 16
; GFX11-NEXT:    s_lshr_b32 s77, s75, 16
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s0, s89
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s1, s88
; GFX11-NEXT:    s_cmp_lg_u32 s90, 0
; GFX11-NEXT:    s_cbranch_scc0 .LBB19_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-NEXT:    s_pack_ll_b32_b16 s2, s2, s79
; GFX11-NEXT:    s_pack_ll_b32_b16 s3, s3, s78
; GFX11-NEXT:    s_pack_ll_b32_b16 s4, s16, s4
; GFX11-NEXT:    s_pack_ll_b32_b16 s5, s17, s5
; GFX11-NEXT:    s_pack_ll_b32_b16 s6, s18, s6
; GFX11-NEXT:    s_pack_ll_b32_b16 s7, s19, s7
; GFX11-NEXT:    s_pack_ll_b32_b16 s8, s20, s8
; GFX11-NEXT:    s_pack_ll_b32_b16 s9, s21, s9
; GFX11-NEXT:    s_pack_ll_b32_b16 s10, s22, s10
; GFX11-NEXT:    s_pack_ll_b32_b16 s11, s23, s11
; GFX11-NEXT:    s_pack_ll_b32_b16 s12, s24, s12
; GFX11-NEXT:    s_pack_ll_b32_b16 s13, s25, s13
; GFX11-NEXT:    s_pack_ll_b32_b16 s14, s26, s14
; GFX11-NEXT:    s_pack_ll_b32_b16 s15, s27, s15
; GFX11-NEXT:    s_pack_ll_b32_b16 s16, s28, s47
; GFX11-NEXT:    s_pack_ll_b32_b16 s17, s29, s44
; GFX11-NEXT:    s_pack_ll_b32_b16 s18, s75, s77
; GFX11-NEXT:    s_pack_ll_b32_b16 s19, s73, s76
; GFX11-NEXT:    s_pack_ll_b32_b16 s20, s63, s74
; GFX11-NEXT:    s_pack_ll_b32_b16 s21, s62, s72
; GFX11-NEXT:    s_pack_ll_b32_b16 s22, s59, s61
; GFX11-NEXT:    s_pack_ll_b32_b16 s23, s57, s60
; GFX11-NEXT:    s_pack_ll_b32_b16 s24, s46, s58
; GFX11-NEXT:    s_pack_ll_b32_b16 s25, s43, s56
; GFX11-NEXT:    s_pack_ll_b32_b16 s26, s42, s45
; GFX11-NEXT:    s_pack_ll_b32_b16 s27, s40, s41
; GFX11-NEXT:    v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX11-NEXT:    v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; GFX11-NEXT:    v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
; GFX11-NEXT:    v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
; GFX11-NEXT:    v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
; GFX11-NEXT:    v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
; GFX11-NEXT:    v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
; GFX11-NEXT:    v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
; GFX11-NEXT:    v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
; GFX11-NEXT:    v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
; GFX11-NEXT:    v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
; GFX11-NEXT:    v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
; GFX11-NEXT:    v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
; GFX11-NEXT:    v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
; GFX11-NEXT:    v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
; GFX11-NEXT:    v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
; GFX11-NEXT:    s_setpc_b64 s[30:31]
; GFX11-NEXT:  .LBB19_2: ; %cmp.true
; GFX11-NEXT:    v_pk_add_f16 v0, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v1, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s2, s79
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s3, s78
; GFX11-NEXT:    v_pk_add_f16 v2, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v3, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s16, s4
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s17, s5
; GFX11-NEXT:    v_pk_add_f16 v4, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v5, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s18, s6
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s19, s7
; GFX11-NEXT:    v_pk_add_f16 v6, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v7, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s20, s8
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s21, s9
; GFX11-NEXT:    v_pk_add_f16 v8, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v9, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s22, s10
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s23, s11
; GFX11-NEXT:    v_pk_add_f16 v10, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v11, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s24, s12
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s25, s13
; GFX11-NEXT:    v_pk_add_f16 v12, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v13, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s26, s14
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s27, s15
; GFX11-NEXT:    v_pk_add_f16 v14, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v15, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s28, s47
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s29, s44
; GFX11-NEXT:    v_pk_add_f16 v16, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v17, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s75, s77
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s73, s76
; GFX11-NEXT:    v_pk_add_f16 v18, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v19, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s63, s74
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s62, s72
; GFX11-NEXT:    v_pk_add_f16 v20, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v21, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s59, s61
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s57, s60
; GFX11-NEXT:    v_pk_add_f16 v22, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v23, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s46, s58
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s43, s56
; GFX11-NEXT:    v_pk_add_f16 v24, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v25, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s42, s45
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s40, s41
; GFX11-NEXT:    v_pk_add_f16 v26, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v27, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = fadd <56 x half> %a, splat (half 0xH0200)
  %a2 = bitcast <56 x half> %a1 to <28 x i32>
  br label %end

cmp.false:
  %a3 = bitcast <56 x half> %a to <28 x i32>
  br label %end

end:
  %phi = phi <28 x i32> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <28 x i32> %phi
}

define <14 x i64> @bitcast_v28f32_to_v14i64(<28 x float> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v28f32_to_v14i64:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB20_2
; SI-NEXT:  ; %bb.1: ; %cmp.true
; SI-NEXT:    v_add_f32_e32 v27, 1.0, v27
; SI-NEXT:    v_add_f32_e32 v26, 1.0, v26
; SI-NEXT:    v_add_f32_e32 v25, 1.0, v25
; SI-NEXT:    v_add_f32_e32 v24, 1.0, v24
; SI-NEXT:    v_add_f32_e32 v23, 1.0, v23
; SI-NEXT:    v_add_f32_e32 v22, 1.0, v22
; SI-NEXT:    v_add_f32_e32 v21, 1.0, v21
; SI-NEXT:    v_add_f32_e32 v20, 1.0, v20
; SI-NEXT:    v_add_f32_e32 v19, 1.0, v19
; SI-NEXT:    v_add_f32_e32 v18, 1.0, v18
; SI-NEXT:    v_add_f32_e32 v17, 1.0, v17
; SI-NEXT:    v_add_f32_e32 v16, 1.0, v16
; SI-NEXT:    v_add_f32_e32 v15, 1.0, v15
; SI-NEXT:    v_add_f32_e32 v14, 1.0, v14
; SI-NEXT:    v_add_f32_e32 v13, 1.0, v13
; SI-NEXT:    v_add_f32_e32 v12, 1.0, v12
; SI-NEXT:    v_add_f32_e32 v11, 1.0, v11
; SI-NEXT:    v_add_f32_e32 v10, 1.0, v10
; SI-NEXT:    v_add_f32_e32 v9, 1.0, v9
; SI-NEXT:    v_add_f32_e32 v8, 1.0, v8
; SI-NEXT:    v_add_f32_e32 v7, 1.0, v7
; SI-NEXT:    v_add_f32_e32 v6, 1.0, v6
; SI-NEXT:    v_add_f32_e32 v5, 1.0, v5
; SI-NEXT:    v_add_f32_e32 v4, 1.0, v4
; SI-NEXT:    v_add_f32_e32 v3, 1.0, v3
; SI-NEXT:    v_add_f32_e32 v2, 1.0, v2
; SI-NEXT:    v_add_f32_e32 v1, 1.0, v1
; SI-NEXT:    v_add_f32_e32 v0, 1.0, v0
; SI-NEXT:  .LBB20_2: ; %end
; SI-NEXT:    s_or_b64 exec, exec, s[4:5]
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v28f32_to_v14i64:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB20_2
; VI-NEXT:  ; %bb.1: ; %cmp.true
; VI-NEXT:    v_add_f32_e32 v27, 1.0, v27
; VI-NEXT:    v_add_f32_e32 v26, 1.0, v26
; VI-NEXT:    v_add_f32_e32 v25, 1.0, v25
; VI-NEXT:    v_add_f32_e32 v24, 1.0, v24
; VI-NEXT:    v_add_f32_e32 v23, 1.0, v23
; VI-NEXT:    v_add_f32_e32 v22, 1.0, v22
; VI-NEXT:    v_add_f32_e32 v21, 1.0, v21
; VI-NEXT:    v_add_f32_e32 v20, 1.0, v20
; VI-NEXT:    v_add_f32_e32 v19, 1.0, v19
; VI-NEXT:    v_add_f32_e32 v18, 1.0, v18
; VI-NEXT:    v_add_f32_e32 v17, 1.0, v17
; VI-NEXT:    v_add_f32_e32 v16, 1.0, v16
; VI-NEXT:    v_add_f32_e32 v15, 1.0, v15
; VI-NEXT:    v_add_f32_e32 v14, 1.0, v14
; VI-NEXT:    v_add_f32_e32 v13, 1.0, v13
; VI-NEXT:    v_add_f32_e32 v12, 1.0, v12
; VI-NEXT:    v_add_f32_e32 v11, 1.0, v11
; VI-NEXT:    v_add_f32_e32 v10, 1.0, v10
; VI-NEXT:    v_add_f32_e32 v9, 1.0, v9
; VI-NEXT:    v_add_f32_e32 v8, 1.0, v8
; VI-NEXT:    v_add_f32_e32 v7, 1.0, v7
; VI-NEXT:    v_add_f32_e32 v6, 1.0, v6
; VI-NEXT:    v_add_f32_e32 v5, 1.0, v5
; VI-NEXT:    v_add_f32_e32 v4, 1.0, v4
; VI-NEXT:    v_add_f32_e32 v3, 1.0, v3
; VI-NEXT:    v_add_f32_e32 v2, 1.0, v2
; VI-NEXT:    v_add_f32_e32 v1, 1.0, v1
; VI-NEXT:    v_add_f32_e32 v0, 1.0, v0
; VI-NEXT:  .LBB20_2: ; %end
; VI-NEXT:    s_or_b64 exec, exec, s[4:5]
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v28f32_to_v14i64:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB20_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.true
; GFX9-NEXT:    v_add_f32_e32 v27, 1.0, v27
; GFX9-NEXT:    v_add_f32_e32 v26, 1.0, v26
; GFX9-NEXT:    v_add_f32_e32 v25, 1.0, v25
; GFX9-NEXT:    v_add_f32_e32 v24, 1.0, v24
; GFX9-NEXT:    v_add_f32_e32 v23, 1.0, v23
; GFX9-NEXT:    v_add_f32_e32 v22, 1.0, v22
; GFX9-NEXT:    v_add_f32_e32 v21, 1.0, v21
; GFX9-NEXT:    v_add_f32_e32 v20, 1.0, v20
; GFX9-NEXT:    v_add_f32_e32 v19, 1.0, v19
; GFX9-NEXT:    v_add_f32_e32 v18, 1.0, v18
; GFX9-NEXT:    v_add_f32_e32 v17, 1.0, v17
; GFX9-NEXT:    v_add_f32_e32 v16, 1.0, v16
; GFX9-NEXT:    v_add_f32_e32 v15, 1.0, v15
; GFX9-NEXT:    v_add_f32_e32 v14, 1.0, v14
; GFX9-NEXT:    v_add_f32_e32 v13, 1.0, v13
; GFX9-NEXT:    v_add_f32_e32 v12, 1.0, v12
; GFX9-NEXT:    v_add_f32_e32 v11, 1.0, v11
; GFX9-NEXT:    v_add_f32_e32 v10, 1.0, v10
; GFX9-NEXT:    v_add_f32_e32 v9, 1.0, v9
; GFX9-NEXT:    v_add_f32_e32 v8, 1.0, v8
; GFX9-NEXT:    v_add_f32_e32 v7, 1.0, v7
; GFX9-NEXT:    v_add_f32_e32 v6, 1.0, v6
; GFX9-NEXT:    v_add_f32_e32 v5, 1.0, v5
; GFX9-NEXT:    v_add_f32_e32 v4, 1.0, v4
; GFX9-NEXT:    v_add_f32_e32 v3, 1.0, v3
; GFX9-NEXT:    v_add_f32_e32 v2, 1.0, v2
; GFX9-NEXT:    v_add_f32_e32 v1, 1.0, v1
; GFX9-NEXT:    v_add_f32_e32 v0, 1.0, v0
; GFX9-NEXT:  .LBB20_2: ; %end
; GFX9-NEXT:    s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v28f32_to_v14i64:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-NEXT:    s_cbranch_execz .LBB20_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-NEXT:    v_dual_add_f32 v27, 1.0, v27 :: v_dual_add_f32 v26, 1.0, v26
; GFX11-NEXT:    v_dual_add_f32 v25, 1.0, v25 :: v_dual_add_f32 v24, 1.0, v24
; GFX11-NEXT:    v_dual_add_f32 v23, 1.0, v23 :: v_dual_add_f32 v22, 1.0, v22
; GFX11-NEXT:    v_dual_add_f32 v21, 1.0, v21 :: v_dual_add_f32 v20, 1.0, v20
; GFX11-NEXT:    v_dual_add_f32 v19, 1.0, v19 :: v_dual_add_f32 v18, 1.0, v18
; GFX11-NEXT:    v_dual_add_f32 v17, 1.0, v17 :: v_dual_add_f32 v16, 1.0, v16
; GFX11-NEXT:    v_dual_add_f32 v15, 1.0, v15 :: v_dual_add_f32 v14, 1.0, v14
; GFX11-NEXT:    v_dual_add_f32 v13, 1.0, v13 :: v_dual_add_f32 v12, 1.0, v12
; GFX11-NEXT:    v_dual_add_f32 v11, 1.0, v11 :: v_dual_add_f32 v10, 1.0, v10
; GFX11-NEXT:    v_dual_add_f32 v9, 1.0, v9 :: v_dual_add_f32 v8, 1.0, v8
; GFX11-NEXT:    v_dual_add_f32 v7, 1.0, v7 :: v_dual_add_f32 v6, 1.0, v6
; GFX11-NEXT:    v_dual_add_f32 v5, 1.0, v5 :: v_dual_add_f32 v4, 1.0, v4
; GFX11-NEXT:    v_dual_add_f32 v3, 1.0, v3 :: v_dual_add_f32 v2, 1.0, v2
; GFX11-NEXT:    v_dual_add_f32 v1, 1.0, v1 :: v_dual_add_f32 v0, 1.0, v0
; GFX11-NEXT:  .LBB20_2: ; %end
; GFX11-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = fadd <28 x float> %a, splat (float 1.000000e+00)
  %a2 = bitcast <28 x float> %a1 to <14 x i64>
  br label %end

cmp.false:
  %a3 = bitcast <28 x float> %a to <14 x i64>
  br label %end

end:
  %phi = phi <14 x i64> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <14 x i64> %phi
}

define inreg <14 x i64> @bitcast_v28f32_to_v14i64_scalar(<28 x float> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v28f32_to_v14i64_scalar:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_writelane_b32 v32, s36, 0
; SI-NEXT:    v_writelane_b32 v32, s37, 1
; SI-NEXT:    v_writelane_b32 v32, s38, 2
; SI-NEXT:    v_writelane_b32 v32, s39, 3
; SI-NEXT:    v_writelane_b32 v32, s48, 4
; SI-NEXT:    v_writelane_b32 v32, s49, 5
; SI-NEXT:    v_writelane_b32 v32, s50, 6
; SI-NEXT:    v_writelane_b32 v32, s51, 7
; SI-NEXT:    v_writelane_b32 v32, s52, 8
; SI-NEXT:    v_writelane_b32 v32, s53, 9
; SI-NEXT:    v_writelane_b32 v32, s54, 10
; SI-NEXT:    v_writelane_b32 v32, s55, 11
; SI-NEXT:    v_readfirstlane_b32 s4, v14
; SI-NEXT:    s_mov_b32 s49, s29
; SI-NEXT:    s_mov_b32 s48, s28
; SI-NEXT:    s_mov_b32 s47, s27
; SI-NEXT:    s_mov_b32 s46, s26
; SI-NEXT:    s_mov_b32 s45, s25
; SI-NEXT:    s_mov_b32 s44, s24
; SI-NEXT:    s_mov_b32 s43, s23
; SI-NEXT:    s_mov_b32 s42, s22
; SI-NEXT:    s_mov_b32 s41, s21
; SI-NEXT:    s_mov_b32 s40, s20
; SI-NEXT:    s_mov_b32 s39, s19
; SI-NEXT:    s_mov_b32 s38, s18
; SI-NEXT:    s_mov_b32 s37, s17
; SI-NEXT:    s_mov_b32 s36, s16
; SI-NEXT:    v_readfirstlane_b32 s63, v13
; SI-NEXT:    v_readfirstlane_b32 s62, v12
; SI-NEXT:    v_readfirstlane_b32 s61, v11
; SI-NEXT:    v_readfirstlane_b32 s60, v10
; SI-NEXT:    v_readfirstlane_b32 s59, v9
; SI-NEXT:    v_readfirstlane_b32 s58, v8
; SI-NEXT:    v_readfirstlane_b32 s57, v7
; SI-NEXT:    v_readfirstlane_b32 s56, v6
; SI-NEXT:    v_readfirstlane_b32 s55, v5
; SI-NEXT:    v_readfirstlane_b32 s54, v4
; SI-NEXT:    v_readfirstlane_b32 s53, v3
; SI-NEXT:    v_readfirstlane_b32 s52, v2
; SI-NEXT:    v_readfirstlane_b32 s51, v1
; SI-NEXT:    s_cmp_lg_u32 s4, 0
; SI-NEXT:    v_readfirstlane_b32 s50, v0
; SI-NEXT:    s_cbranch_scc0 .LBB21_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    v_mov_b32_e32 v0, s36
; SI-NEXT:    v_mov_b32_e32 v1, s37
; SI-NEXT:    v_mov_b32_e32 v2, s38
; SI-NEXT:    v_mov_b32_e32 v3, s39
; SI-NEXT:    v_mov_b32_e32 v4, s40
; SI-NEXT:    v_mov_b32_e32 v5, s41
; SI-NEXT:    v_mov_b32_e32 v6, s42
; SI-NEXT:    v_mov_b32_e32 v7, s43
; SI-NEXT:    v_mov_b32_e32 v8, s44
; SI-NEXT:    v_mov_b32_e32 v9, s45
; SI-NEXT:    v_mov_b32_e32 v10, s46
; SI-NEXT:    v_mov_b32_e32 v11, s47
; SI-NEXT:    v_mov_b32_e32 v12, s48
; SI-NEXT:    v_mov_b32_e32 v13, s49
; SI-NEXT:    v_mov_b32_e32 v14, s50
; SI-NEXT:    v_mov_b32_e32 v15, s51
; SI-NEXT:    v_mov_b32_e32 v16, s52
; SI-NEXT:    v_mov_b32_e32 v17, s53
; SI-NEXT:    v_mov_b32_e32 v18, s54
; SI-NEXT:    v_mov_b32_e32 v19, s55
; SI-NEXT:    v_mov_b32_e32 v20, s56
; SI-NEXT:    v_mov_b32_e32 v21, s57
; SI-NEXT:    v_mov_b32_e32 v22, s58
; SI-NEXT:    v_mov_b32_e32 v23, s59
; SI-NEXT:    v_mov_b32_e32 v24, s60
; SI-NEXT:    v_mov_b32_e32 v25, s61
; SI-NEXT:    v_mov_b32_e32 v26, s62
; SI-NEXT:    v_mov_b32_e32 v27, s63
; SI-NEXT:    v_mov_b32_e32 v28, s64
; SI-NEXT:    v_mov_b32_e32 v29, s65
; SI-NEXT:    v_mov_b32_e32 v30, s66
; SI-NEXT:    v_mov_b32_e32 v31, s67
; SI-NEXT:    s_branch .LBB21_3
; SI-NEXT:  .LBB21_2: ; %cmp.true
; SI-NEXT:    v_add_f32_e64 v27, s63, 1.0
; SI-NEXT:    v_add_f32_e64 v26, s62, 1.0
; SI-NEXT:    v_add_f32_e64 v25, s61, 1.0
; SI-NEXT:    v_add_f32_e64 v24, s60, 1.0
; SI-NEXT:    v_add_f32_e64 v23, s59, 1.0
; SI-NEXT:    v_add_f32_e64 v22, s58, 1.0
; SI-NEXT:    v_add_f32_e64 v21, s57, 1.0
; SI-NEXT:    v_add_f32_e64 v20, s56, 1.0
; SI-NEXT:    v_add_f32_e64 v19, s55, 1.0
; SI-NEXT:    v_add_f32_e64 v18, s54, 1.0
; SI-NEXT:    v_add_f32_e64 v17, s53, 1.0
; SI-NEXT:    v_add_f32_e64 v16, s52, 1.0
; SI-NEXT:    v_add_f32_e64 v15, s51, 1.0
; SI-NEXT:    v_add_f32_e64 v14, s50, 1.0
; SI-NEXT:    v_add_f32_e64 v13, s49, 1.0
; SI-NEXT:    v_add_f32_e64 v12, s48, 1.0
; SI-NEXT:    v_add_f32_e64 v11, s47, 1.0
; SI-NEXT:    v_add_f32_e64 v10, s46, 1.0
; SI-NEXT:    v_add_f32_e64 v9, s45, 1.0
; SI-NEXT:    v_add_f32_e64 v8, s44, 1.0
; SI-NEXT:    v_add_f32_e64 v7, s43, 1.0
; SI-NEXT:    v_add_f32_e64 v6, s42, 1.0
; SI-NEXT:    v_add_f32_e64 v5, s41, 1.0
; SI-NEXT:    v_add_f32_e64 v4, s40, 1.0
; SI-NEXT:    v_add_f32_e64 v3, s39, 1.0
; SI-NEXT:    v_add_f32_e64 v2, s38, 1.0
; SI-NEXT:    v_add_f32_e64 v1, s37, 1.0
; SI-NEXT:    v_add_f32_e64 v0, s36, 1.0
; SI-NEXT:  .LBB21_3: ; %end
; SI-NEXT:    v_readlane_b32 s55, v32, 11
; SI-NEXT:    v_readlane_b32 s54, v32, 10
; SI-NEXT:    v_readlane_b32 s53, v32, 9
; SI-NEXT:    v_readlane_b32 s52, v32, 8
; SI-NEXT:    v_readlane_b32 s51, v32, 7
; SI-NEXT:    v_readlane_b32 s50, v32, 6
; SI-NEXT:    v_readlane_b32 s49, v32, 5
; SI-NEXT:    v_readlane_b32 s48, v32, 4
; SI-NEXT:    v_readlane_b32 s39, v32, 3
; SI-NEXT:    v_readlane_b32 s38, v32, 2
; SI-NEXT:    v_readlane_b32 s37, v32, 1
; SI-NEXT:    v_readlane_b32 s36, v32, 0
; SI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v28f32_to_v14i64_scalar:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    v_writelane_b32 v32, s36, 0
; VI-NEXT:    v_writelane_b32 v32, s37, 1
; VI-NEXT:    v_writelane_b32 v32, s38, 2
; VI-NEXT:    v_writelane_b32 v32, s39, 3
; VI-NEXT:    v_writelane_b32 v32, s48, 4
; VI-NEXT:    v_writelane_b32 v32, s49, 5
; VI-NEXT:    v_writelane_b32 v32, s50, 6
; VI-NEXT:    v_writelane_b32 v32, s51, 7
; VI-NEXT:    v_writelane_b32 v32, s52, 8
; VI-NEXT:    v_writelane_b32 v32, s53, 9
; VI-NEXT:    v_writelane_b32 v32, s54, 10
; VI-NEXT:    v_writelane_b32 v32, s55, 11
; VI-NEXT:    v_readfirstlane_b32 s4, v14
; VI-NEXT:    s_mov_b32 s49, s29
; VI-NEXT:    s_mov_b32 s48, s28
; VI-NEXT:    s_mov_b32 s47, s27
; VI-NEXT:    s_mov_b32 s46, s26
; VI-NEXT:    s_mov_b32 s45, s25
; VI-NEXT:    s_mov_b32 s44, s24
; VI-NEXT:    s_mov_b32 s43, s23
; VI-NEXT:    s_mov_b32 s42, s22
; VI-NEXT:    s_mov_b32 s41, s21
; VI-NEXT:    s_mov_b32 s40, s20
; VI-NEXT:    s_mov_b32 s39, s19
; VI-NEXT:    s_mov_b32 s38, s18
; VI-NEXT:    s_mov_b32 s37, s17
; VI-NEXT:    s_mov_b32 s36, s16
; VI-NEXT:    v_readfirstlane_b32 s63, v13
; VI-NEXT:    v_readfirstlane_b32 s62, v12
; VI-NEXT:    v_readfirstlane_b32 s61, v11
; VI-NEXT:    v_readfirstlane_b32 s60, v10
; VI-NEXT:    v_readfirstlane_b32 s59, v9
; VI-NEXT:    v_readfirstlane_b32 s58, v8
; VI-NEXT:    v_readfirstlane_b32 s57, v7
; VI-NEXT:    v_readfirstlane_b32 s56, v6
; VI-NEXT:    v_readfirstlane_b32 s55, v5
; VI-NEXT:    v_readfirstlane_b32 s54, v4
; VI-NEXT:    v_readfirstlane_b32 s53, v3
; VI-NEXT:    v_readfirstlane_b32 s52, v2
; VI-NEXT:    v_readfirstlane_b32 s51, v1
; VI-NEXT:    s_cmp_lg_u32 s4, 0
; VI-NEXT:    v_readfirstlane_b32 s50, v0
; VI-NEXT:    s_cbranch_scc0 .LBB21_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    v_mov_b32_e32 v0, s36
; VI-NEXT:    v_mov_b32_e32 v1, s37
; VI-NEXT:    v_mov_b32_e32 v2, s38
; VI-NEXT:    v_mov_b32_e32 v3, s39
; VI-NEXT:    v_mov_b32_e32 v4, s40
; VI-NEXT:    v_mov_b32_e32 v5, s41
; VI-NEXT:    v_mov_b32_e32 v6, s42
; VI-NEXT:    v_mov_b32_e32 v7, s43
; VI-NEXT:    v_mov_b32_e32 v8, s44
; VI-NEXT:    v_mov_b32_e32 v9, s45
; VI-NEXT:    v_mov_b32_e32 v10, s46
; VI-NEXT:    v_mov_b32_e32 v11, s47
; VI-NEXT:    v_mov_b32_e32 v12, s48
; VI-NEXT:    v_mov_b32_e32 v13, s49
; VI-NEXT:    v_mov_b32_e32 v14, s50
; VI-NEXT:    v_mov_b32_e32 v15, s51
; VI-NEXT:    v_mov_b32_e32 v16, s52
; VI-NEXT:    v_mov_b32_e32 v17, s53
; VI-NEXT:    v_mov_b32_e32 v18, s54
; VI-NEXT:    v_mov_b32_e32 v19, s55
; VI-NEXT:    v_mov_b32_e32 v20, s56
; VI-NEXT:    v_mov_b32_e32 v21, s57
; VI-NEXT:    v_mov_b32_e32 v22, s58
; VI-NEXT:    v_mov_b32_e32 v23, s59
; VI-NEXT:    v_mov_b32_e32 v24, s60
; VI-NEXT:    v_mov_b32_e32 v25, s61
; VI-NEXT:    v_mov_b32_e32 v26, s62
; VI-NEXT:    v_mov_b32_e32 v27, s63
; VI-NEXT:    v_mov_b32_e32 v28, s64
; VI-NEXT:    v_mov_b32_e32 v29, s65
; VI-NEXT:    v_mov_b32_e32 v30, s66
; VI-NEXT:    v_mov_b32_e32 v31, s67
; VI-NEXT:    s_branch .LBB21_3
; VI-NEXT:  .LBB21_2: ; %cmp.true
; VI-NEXT:    v_add_f32_e64 v27, s63, 1.0
; VI-NEXT:    v_add_f32_e64 v26, s62, 1.0
; VI-NEXT:    v_add_f32_e64 v25, s61, 1.0
; VI-NEXT:    v_add_f32_e64 v24, s60, 1.0
; VI-NEXT:    v_add_f32_e64 v23, s59, 1.0
; VI-NEXT:    v_add_f32_e64 v22, s58, 1.0
; VI-NEXT:    v_add_f32_e64 v21, s57, 1.0
; VI-NEXT:    v_add_f32_e64 v20, s56, 1.0
; VI-NEXT:    v_add_f32_e64 v19, s55, 1.0
; VI-NEXT:    v_add_f32_e64 v18, s54, 1.0
; VI-NEXT:    v_add_f32_e64 v17, s53, 1.0
; VI-NEXT:    v_add_f32_e64 v16, s52, 1.0
; VI-NEXT:    v_add_f32_e64 v15, s51, 1.0
; VI-NEXT:    v_add_f32_e64 v14, s50, 1.0
; VI-NEXT:    v_add_f32_e64 v13, s49, 1.0
; VI-NEXT:    v_add_f32_e64 v12, s48, 1.0
; VI-NEXT:    v_add_f32_e64 v11, s47, 1.0
; VI-NEXT:    v_add_f32_e64 v10, s46, 1.0
; VI-NEXT:    v_add_f32_e64 v9, s45, 1.0
; VI-NEXT:    v_add_f32_e64 v8, s44, 1.0
; VI-NEXT:    v_add_f32_e64 v7, s43, 1.0
; VI-NEXT:    v_add_f32_e64 v6, s42, 1.0
; VI-NEXT:    v_add_f32_e64 v5, s41, 1.0
; VI-NEXT:    v_add_f32_e64 v4, s40, 1.0
; VI-NEXT:    v_add_f32_e64 v3, s39, 1.0
; VI-NEXT:    v_add_f32_e64 v2, s38, 1.0
; VI-NEXT:    v_add_f32_e64 v1, s37, 1.0
; VI-NEXT:    v_add_f32_e64 v0, s36, 1.0
; VI-NEXT:  .LBB21_3: ; %end
; VI-NEXT:    v_readlane_b32 s55, v32, 11
; VI-NEXT:    v_readlane_b32 s54, v32, 10
; VI-NEXT:    v_readlane_b32 s53, v32, 9
; VI-NEXT:    v_readlane_b32 s52, v32, 8
; VI-NEXT:    v_readlane_b32 s51, v32, 7
; VI-NEXT:    v_readlane_b32 s50, v32, 6
; VI-NEXT:    v_readlane_b32 s49, v32, 5
; VI-NEXT:    v_readlane_b32 s48, v32, 4
; VI-NEXT:    v_readlane_b32 s39, v32, 3
; VI-NEXT:    v_readlane_b32 s38, v32, 2
; VI-NEXT:    v_readlane_b32 s37, v32, 1
; VI-NEXT:    v_readlane_b32 s36, v32, 0
; VI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v28f32_to_v14i64_scalar:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    s_mov_b64 exec, s[4:5]
; GFX9-NEXT:    v_writelane_b32 v32, s36, 0
; GFX9-NEXT:    v_writelane_b32 v32, s37, 1
; GFX9-NEXT:    v_writelane_b32 v32, s38, 2
; GFX9-NEXT:    v_writelane_b32 v32, s39, 3
; GFX9-NEXT:    v_writelane_b32 v32, s48, 4
; GFX9-NEXT:    v_writelane_b32 v32, s49, 5
; GFX9-NEXT:    v_writelane_b32 v32, s50, 6
; GFX9-NEXT:    v_writelane_b32 v32, s51, 7
; GFX9-NEXT:    v_writelane_b32 v32, s52, 8
; GFX9-NEXT:    v_writelane_b32 v32, s53, 9
; GFX9-NEXT:    v_writelane_b32 v32, s54, 10
; GFX9-NEXT:    v_writelane_b32 v32, s55, 11
; GFX9-NEXT:    v_readfirstlane_b32 s4, v14
; GFX9-NEXT:    s_mov_b32 s49, s29
; GFX9-NEXT:    s_mov_b32 s48, s28
; GFX9-NEXT:    s_mov_b32 s47, s27
; GFX9-NEXT:    s_mov_b32 s46, s26
; GFX9-NEXT:    s_mov_b32 s45, s25
; GFX9-NEXT:    s_mov_b32 s44, s24
; GFX9-NEXT:    s_mov_b32 s43, s23
; GFX9-NEXT:    s_mov_b32 s42, s22
; GFX9-NEXT:    s_mov_b32 s41, s21
; GFX9-NEXT:    s_mov_b32 s40, s20
; GFX9-NEXT:    s_mov_b32 s39, s19
; GFX9-NEXT:    s_mov_b32 s38, s18
; GFX9-NEXT:    s_mov_b32 s37, s17
; GFX9-NEXT:    s_mov_b32 s36, s16
; GFX9-NEXT:    v_readfirstlane_b32 s63, v13
; GFX9-NEXT:    v_readfirstlane_b32 s62, v12
; GFX9-NEXT:    v_readfirstlane_b32 s61, v11
; GFX9-NEXT:    v_readfirstlane_b32 s60, v10
; GFX9-NEXT:    v_readfirstlane_b32 s59, v9
; GFX9-NEXT:    v_readfirstlane_b32 s58, v8
; GFX9-NEXT:    v_readfirstlane_b32 s57, v7
; GFX9-NEXT:    v_readfirstlane_b32 s56, v6
; GFX9-NEXT:    v_readfirstlane_b32 s55, v5
; GFX9-NEXT:    v_readfirstlane_b32 s54, v4
; GFX9-NEXT:    v_readfirstlane_b32 s53, v3
; GFX9-NEXT:    v_readfirstlane_b32 s52, v2
; GFX9-NEXT:    v_readfirstlane_b32 s51, v1
; GFX9-NEXT:    s_cmp_lg_u32 s4, 0
; GFX9-NEXT:    v_readfirstlane_b32 s50, v0
; GFX9-NEXT:    s_cbranch_scc0 .LBB21_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    v_mov_b32_e32 v0, s36
; GFX9-NEXT:    v_mov_b32_e32 v1, s37
; GFX9-NEXT:    v_mov_b32_e32 v2, s38
; GFX9-NEXT:    v_mov_b32_e32 v3, s39
; GFX9-NEXT:    v_mov_b32_e32 v4, s40
; GFX9-NEXT:    v_mov_b32_e32 v5, s41
; GFX9-NEXT:    v_mov_b32_e32 v6, s42
; GFX9-NEXT:    v_mov_b32_e32 v7, s43
; GFX9-NEXT:    v_mov_b32_e32 v8, s44
; GFX9-NEXT:    v_mov_b32_e32 v9, s45
; GFX9-NEXT:    v_mov_b32_e32 v10, s46
; GFX9-NEXT:    v_mov_b32_e32 v11, s47
; GFX9-NEXT:    v_mov_b32_e32 v12, s48
; GFX9-NEXT:    v_mov_b32_e32 v13, s49
; GFX9-NEXT:    v_mov_b32_e32 v14, s50
; GFX9-NEXT:    v_mov_b32_e32 v15, s51
; GFX9-NEXT:    v_mov_b32_e32 v16, s52
; GFX9-NEXT:    v_mov_b32_e32 v17, s53
; GFX9-NEXT:    v_mov_b32_e32 v18, s54
; GFX9-NEXT:    v_mov_b32_e32 v19, s55
; GFX9-NEXT:    v_mov_b32_e32 v20, s56
; GFX9-NEXT:    v_mov_b32_e32 v21, s57
; GFX9-NEXT:    v_mov_b32_e32 v22, s58
; GFX9-NEXT:    v_mov_b32_e32 v23, s59
; GFX9-NEXT:    v_mov_b32_e32 v24, s60
; GFX9-NEXT:    v_mov_b32_e32 v25, s61
; GFX9-NEXT:    v_mov_b32_e32 v26, s62
; GFX9-NEXT:    v_mov_b32_e32 v27, s63
; GFX9-NEXT:    v_mov_b32_e32 v28, s64
; GFX9-NEXT:    v_mov_b32_e32 v29, s65
; GFX9-NEXT:    v_mov_b32_e32 v30, s66
; GFX9-NEXT:    v_mov_b32_e32 v31, s67
; GFX9-NEXT:    s_branch .LBB21_3
; GFX9-NEXT:  .LBB21_2: ; %cmp.true
; GFX9-NEXT:    v_add_f32_e64 v27, s63, 1.0
; GFX9-NEXT:    v_add_f32_e64 v26, s62, 1.0
; GFX9-NEXT:    v_add_f32_e64 v25, s61, 1.0
; GFX9-NEXT:    v_add_f32_e64 v24, s60, 1.0
; GFX9-NEXT:    v_add_f32_e64 v23, s59, 1.0
; GFX9-NEXT:    v_add_f32_e64 v22, s58, 1.0
; GFX9-NEXT:    v_add_f32_e64 v21, s57, 1.0
; GFX9-NEXT:    v_add_f32_e64 v20, s56, 1.0
; GFX9-NEXT:    v_add_f32_e64 v19, s55, 1.0
; GFX9-NEXT:    v_add_f32_e64 v18, s54, 1.0
; GFX9-NEXT:    v_add_f32_e64 v17, s53, 1.0
; GFX9-NEXT:    v_add_f32_e64 v16, s52, 1.0
; GFX9-NEXT:    v_add_f32_e64 v15, s51, 1.0
; GFX9-NEXT:    v_add_f32_e64 v14, s50, 1.0
; GFX9-NEXT:    v_add_f32_e64 v13, s49, 1.0
; GFX9-NEXT:    v_add_f32_e64 v12, s48, 1.0
; GFX9-NEXT:    v_add_f32_e64 v11, s47, 1.0
; GFX9-NEXT:    v_add_f32_e64 v10, s46, 1.0
; GFX9-NEXT:    v_add_f32_e64 v9, s45, 1.0
; GFX9-NEXT:    v_add_f32_e64 v8, s44, 1.0
; GFX9-NEXT:    v_add_f32_e64 v7, s43, 1.0
; GFX9-NEXT:    v_add_f32_e64 v6, s42, 1.0
; GFX9-NEXT:    v_add_f32_e64 v5, s41, 1.0
; GFX9-NEXT:    v_add_f32_e64 v4, s40, 1.0
; GFX9-NEXT:    v_add_f32_e64 v3, s39, 1.0
; GFX9-NEXT:    v_add_f32_e64 v2, s38, 1.0
; GFX9-NEXT:    v_add_f32_e64 v1, s37, 1.0
; GFX9-NEXT:    v_add_f32_e64 v0, s36, 1.0
; GFX9-NEXT:  .LBB21_3: ; %end
; GFX9-NEXT:    v_readlane_b32 s55, v32, 11
; GFX9-NEXT:    v_readlane_b32 s54, v32, 10
; GFX9-NEXT:    v_readlane_b32 s53, v32, 9
; GFX9-NEXT:    v_readlane_b32 s52, v32, 8
; GFX9-NEXT:    v_readlane_b32 s51, v32, 7
; GFX9-NEXT:    v_readlane_b32 s50, v32, 6
; GFX9-NEXT:    v_readlane_b32 s49, v32, 5
; GFX9-NEXT:    v_readlane_b32 s48, v32, 4
; GFX9-NEXT:    v_readlane_b32 s39, v32, 3
; GFX9-NEXT:    v_readlane_b32 s38, v32, 2
; GFX9-NEXT:    v_readlane_b32 s37, v32, 1
; GFX9-NEXT:    v_readlane_b32 s36, v32, 0
; GFX9-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    s_mov_b64 exec, s[4:5]
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v28f32_to_v14i64_scalar:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    s_xor_saveexec_b32 s4, -1
; GFX11-NEXT:    scratch_store_b32 off, v32, s32 ; 4-byte Folded Spill
; GFX11-NEXT:    s_mov_b32 exec_lo, s4
; GFX11-NEXT:    v_writelane_b32 v32, s36, 0
; GFX11-NEXT:    v_writelane_b32 v32, s37, 1
; GFX11-NEXT:    v_writelane_b32 v32, s38, 2
; GFX11-NEXT:    v_writelane_b32 v32, s39, 3
; GFX11-NEXT:    v_writelane_b32 v32, s48, 4
; GFX11-NEXT:    v_writelane_b32 v32, s49, 5
; GFX11-NEXT:    v_writelane_b32 v32, s50, 6
; GFX11-NEXT:    v_writelane_b32 v32, s51, 7
; GFX11-NEXT:    v_writelane_b32 v32, s52, 8
; GFX11-NEXT:    v_writelane_b32 v32, s53, 9
; GFX11-NEXT:    v_writelane_b32 v32, s54, 10
; GFX11-NEXT:    v_writelane_b32 v32, s55, 11
; GFX11-NEXT:    s_mov_b32 s36, s0
; GFX11-NEXT:    v_readfirstlane_b32 s0, v10
; GFX11-NEXT:    v_readfirstlane_b32 s63, v9
; GFX11-NEXT:    v_readfirstlane_b32 s62, v8
; GFX11-NEXT:    v_readfirstlane_b32 s61, v7
; GFX11-NEXT:    v_readfirstlane_b32 s60, v6
; GFX11-NEXT:    v_readfirstlane_b32 s59, v5
; GFX11-NEXT:    v_readfirstlane_b32 s58, v4
; GFX11-NEXT:    v_readfirstlane_b32 s57, v3
; GFX11-NEXT:    v_readfirstlane_b32 s56, v2
; GFX11-NEXT:    v_readfirstlane_b32 s55, v1
; GFX11-NEXT:    v_readfirstlane_b32 s54, v0
; GFX11-NEXT:    s_mov_b32 s53, s29
; GFX11-NEXT:    s_mov_b32 s52, s28
; GFX11-NEXT:    s_mov_b32 s51, s27
; GFX11-NEXT:    s_mov_b32 s50, s26
; GFX11-NEXT:    s_mov_b32 s49, s25
; GFX11-NEXT:    s_mov_b32 s48, s24
; GFX11-NEXT:    s_mov_b32 s47, s23
; GFX11-NEXT:    s_mov_b32 s46, s22
; GFX11-NEXT:    s_mov_b32 s45, s21
; GFX11-NEXT:    s_mov_b32 s44, s20
; GFX11-NEXT:    s_mov_b32 s43, s19
; GFX11-NEXT:    s_mov_b32 s42, s18
; GFX11-NEXT:    s_mov_b32 s41, s17
; GFX11-NEXT:    s_mov_b32 s40, s16
; GFX11-NEXT:    s_mov_b32 s39, s3
; GFX11-NEXT:    s_mov_b32 s38, s2
; GFX11-NEXT:    s_mov_b32 s37, s1
; GFX11-NEXT:    s_cmp_lg_u32 s0, 0
; GFX11-NEXT:    s_cbranch_scc0 .LBB21_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-NEXT:    v_dual_mov_b32 v0, s36 :: v_dual_mov_b32 v1, s37
; GFX11-NEXT:    v_dual_mov_b32 v2, s38 :: v_dual_mov_b32 v3, s39
; GFX11-NEXT:    v_dual_mov_b32 v4, s40 :: v_dual_mov_b32 v5, s41
; GFX11-NEXT:    v_dual_mov_b32 v6, s42 :: v_dual_mov_b32 v7, s43
; GFX11-NEXT:    v_dual_mov_b32 v8, s44 :: v_dual_mov_b32 v9, s45
; GFX11-NEXT:    v_dual_mov_b32 v10, s46 :: v_dual_mov_b32 v11, s47
; GFX11-NEXT:    v_dual_mov_b32 v12, s48 :: v_dual_mov_b32 v13, s49
; GFX11-NEXT:    v_dual_mov_b32 v14, s50 :: v_dual_mov_b32 v15, s51
; GFX11-NEXT:    v_dual_mov_b32 v16, s52 :: v_dual_mov_b32 v17, s53
; GFX11-NEXT:    v_dual_mov_b32 v18, s54 :: v_dual_mov_b32 v19, s55
; GFX11-NEXT:    v_dual_mov_b32 v20, s56 :: v_dual_mov_b32 v21, s57
; GFX11-NEXT:    v_dual_mov_b32 v22, s58 :: v_dual_mov_b32 v23, s59
; GFX11-NEXT:    v_dual_mov_b32 v24, s60 :: v_dual_mov_b32 v25, s61
; GFX11-NEXT:    v_dual_mov_b32 v26, s62 :: v_dual_mov_b32 v27, s63
; GFX11-NEXT:    v_dual_mov_b32 v28, s64 :: v_dual_mov_b32 v29, s65
; GFX11-NEXT:    v_dual_mov_b32 v30, s66 :: v_dual_mov_b32 v31, s67
; GFX11-NEXT:    s_branch .LBB21_3
; GFX11-NEXT:  .LBB21_2: ; %cmp.true
; GFX11-NEXT:    v_add_f32_e64 v27, s63, 1.0
; GFX11-NEXT:    v_add_f32_e64 v26, s62, 1.0
; GFX11-NEXT:    v_add_f32_e64 v25, s61, 1.0
; GFX11-NEXT:    v_add_f32_e64 v24, s60, 1.0
; GFX11-NEXT:    v_add_f32_e64 v23, s59, 1.0
; GFX11-NEXT:    v_add_f32_e64 v22, s58, 1.0
; GFX11-NEXT:    v_add_f32_e64 v21, s57, 1.0
; GFX11-NEXT:    v_add_f32_e64 v20, s56, 1.0
; GFX11-NEXT:    v_add_f32_e64 v19, s55, 1.0
; GFX11-NEXT:    v_add_f32_e64 v18, s54, 1.0
; GFX11-NEXT:    v_add_f32_e64 v17, s53, 1.0
; GFX11-NEXT:    v_add_f32_e64 v16, s52, 1.0
; GFX11-NEXT:    v_add_f32_e64 v15, s51, 1.0
; GFX11-NEXT:    v_add_f32_e64 v14, s50, 1.0
; GFX11-NEXT:    v_add_f32_e64 v13, s49, 1.0
; GFX11-NEXT:    v_add_f32_e64 v12, s48, 1.0
; GFX11-NEXT:    v_add_f32_e64 v11, s47, 1.0
; GFX11-NEXT:    v_add_f32_e64 v10, s46, 1.0
; GFX11-NEXT:    v_add_f32_e64 v9, s45, 1.0
; GFX11-NEXT:    v_add_f32_e64 v8, s44, 1.0
; GFX11-NEXT:    v_add_f32_e64 v7, s43, 1.0
; GFX11-NEXT:    v_add_f32_e64 v6, s42, 1.0
; GFX11-NEXT:    v_add_f32_e64 v5, s41, 1.0
; GFX11-NEXT:    v_add_f32_e64 v4, s40, 1.0
; GFX11-NEXT:    v_add_f32_e64 v3, s39, 1.0
; GFX11-NEXT:    v_add_f32_e64 v2, s38, 1.0
; GFX11-NEXT:    v_add_f32_e64 v1, s37, 1.0
; GFX11-NEXT:    v_add_f32_e64 v0, s36, 1.0
; GFX11-NEXT:  .LBB21_3: ; %end
; GFX11-NEXT:    v_readlane_b32 s55, v32, 11
; GFX11-NEXT:    v_readlane_b32 s54, v32, 10
; GFX11-NEXT:    v_readlane_b32 s53, v32, 9
; GFX11-NEXT:    v_readlane_b32 s52, v32, 8
; GFX11-NEXT:    v_readlane_b32 s51, v32, 7
; GFX11-NEXT:    v_readlane_b32 s50, v32, 6
; GFX11-NEXT:    v_readlane_b32 s49, v32, 5
; GFX11-NEXT:    v_readlane_b32 s48, v32, 4
; GFX11-NEXT:    v_readlane_b32 s39, v32, 3
; GFX11-NEXT:    v_readlane_b32 s38, v32, 2
; GFX11-NEXT:    v_readlane_b32 s37, v32, 1
; GFX11-NEXT:    v_readlane_b32 s36, v32, 0
; GFX11-NEXT:    s_xor_saveexec_b32 s0, -1
; GFX11-NEXT:    scratch_load_b32 v32, off, s32 ; 4-byte Folded Reload
; GFX11-NEXT:    s_mov_b32 exec_lo, s0
; GFX11-NEXT:    s_waitcnt vmcnt(0)
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = fadd <28 x float> %a, splat (float 1.000000e+00)
  %a2 = bitcast <28 x float> %a1 to <14 x i64>
  br label %end

cmp.false:
  %a3 = bitcast <28 x float> %a to <14 x i64>
  br label %end

end:
  %phi = phi <14 x i64> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <14 x i64> %phi
}

define <28 x float> @bitcast_v14i64_to_v28f32(<14 x i64> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v14i64_to_v28f32:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB22_2
; SI-NEXT:  ; %bb.1: ; %cmp.true
; SI-NEXT:    v_add_i32_e32 v26, vcc, 3, v26
; SI-NEXT:    v_addc_u32_e32 v27, vcc, 0, v27, vcc
; SI-NEXT:    v_add_i32_e32 v24, vcc, 3, v24
; SI-NEXT:    v_addc_u32_e32 v25, vcc, 0, v25, vcc
; SI-NEXT:    v_add_i32_e32 v22, vcc, 3, v22
; SI-NEXT:    v_addc_u32_e32 v23, vcc, 0, v23, vcc
; SI-NEXT:    v_add_i32_e32 v20, vcc, 3, v20
; SI-NEXT:    v_addc_u32_e32 v21, vcc, 0, v21, vcc
; SI-NEXT:    v_add_i32_e32 v18, vcc, 3, v18
; SI-NEXT:    v_addc_u32_e32 v19, vcc, 0, v19, vcc
; SI-NEXT:    v_add_i32_e32 v16, vcc, 3, v16
; SI-NEXT:    v_addc_u32_e32 v17, vcc, 0, v17, vcc
; SI-NEXT:    v_add_i32_e32 v14, vcc, 3, v14
; SI-NEXT:    v_addc_u32_e32 v15, vcc, 0, v15, vcc
; SI-NEXT:    v_add_i32_e32 v12, vcc, 3, v12
; SI-NEXT:    v_addc_u32_e32 v13, vcc, 0, v13, vcc
; SI-NEXT:    v_add_i32_e32 v10, vcc, 3, v10
; SI-NEXT:    v_addc_u32_e32 v11, vcc, 0, v11, vcc
; SI-NEXT:    v_add_i32_e32 v8, vcc, 3, v8
; SI-NEXT:    v_addc_u32_e32 v9, vcc, 0, v9, vcc
; SI-NEXT:    v_add_i32_e32 v6, vcc, 3, v6
; SI-NEXT:    v_addc_u32_e32 v7, vcc, 0, v7, vcc
; SI-NEXT:    v_add_i32_e32 v4, vcc, 3, v4
; SI-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
; SI-NEXT:    v_add_i32_e32 v2, vcc, 3, v2
; SI-NEXT:    v_addc_u32_e32 v3, vcc, 0, v3, vcc
; SI-NEXT:    v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; SI-NEXT:  .LBB22_2: ; %end
; SI-NEXT:    s_or_b64 exec, exec, s[4:5]
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v14i64_to_v28f32:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB22_2
; VI-NEXT:  ; %bb.1: ; %cmp.true
; VI-NEXT:    v_add_u32_e32 v26, vcc, 3, v26
; VI-NEXT:    v_addc_u32_e32 v27, vcc, 0, v27, vcc
; VI-NEXT:    v_add_u32_e32 v24, vcc, 3, v24
; VI-NEXT:    v_addc_u32_e32 v25, vcc, 0, v25, vcc
; VI-NEXT:    v_add_u32_e32 v22, vcc, 3, v22
; VI-NEXT:    v_addc_u32_e32 v23, vcc, 0, v23, vcc
; VI-NEXT:    v_add_u32_e32 v20, vcc, 3, v20
; VI-NEXT:    v_addc_u32_e32 v21, vcc, 0, v21, vcc
; VI-NEXT:    v_add_u32_e32 v18, vcc, 3, v18
; VI-NEXT:    v_addc_u32_e32 v19, vcc, 0, v19, vcc
; VI-NEXT:    v_add_u32_e32 v16, vcc, 3, v16
; VI-NEXT:    v_addc_u32_e32 v17, vcc, 0, v17, vcc
; VI-NEXT:    v_add_u32_e32 v14, vcc, 3, v14
; VI-NEXT:    v_addc_u32_e32 v15, vcc, 0, v15, vcc
; VI-NEXT:    v_add_u32_e32 v12, vcc, 3, v12
; VI-NEXT:    v_addc_u32_e32 v13, vcc, 0, v13, vcc
; VI-NEXT:    v_add_u32_e32 v10, vcc, 3, v10
; VI-NEXT:    v_addc_u32_e32 v11, vcc, 0, v11, vcc
; VI-NEXT:    v_add_u32_e32 v8, vcc, 3, v8
; VI-NEXT:    v_addc_u32_e32 v9, vcc, 0, v9, vcc
; VI-NEXT:    v_add_u32_e32 v6, vcc, 3, v6
; VI-NEXT:    v_addc_u32_e32 v7, vcc, 0, v7, vcc
; VI-NEXT:    v_add_u32_e32 v4, vcc, 3, v4
; VI-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
; VI-NEXT:    v_add_u32_e32 v2, vcc, 3, v2
; VI-NEXT:    v_addc_u32_e32 v3, vcc, 0, v3, vcc
; VI-NEXT:    v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT:  .LBB22_2: ; %end
; VI-NEXT:    s_or_b64 exec, exec, s[4:5]
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v14i64_to_v28f32:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB22_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.true
; GFX9-NEXT:    v_add_co_u32_e32 v26, vcc, 3, v26
; GFX9-NEXT:    v_addc_co_u32_e32 v27, vcc, 0, v27, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v24, vcc, 3, v24
; GFX9-NEXT:    v_addc_co_u32_e32 v25, vcc, 0, v25, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v22, vcc, 3, v22
; GFX9-NEXT:    v_addc_co_u32_e32 v23, vcc, 0, v23, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v20, vcc, 3, v20
; GFX9-NEXT:    v_addc_co_u32_e32 v21, vcc, 0, v21, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v18, vcc, 3, v18
; GFX9-NEXT:    v_addc_co_u32_e32 v19, vcc, 0, v19, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v16, vcc, 3, v16
; GFX9-NEXT:    v_addc_co_u32_e32 v17, vcc, 0, v17, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v14, vcc, 3, v14
; GFX9-NEXT:    v_addc_co_u32_e32 v15, vcc, 0, v15, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v12, vcc, 3, v12
; GFX9-NEXT:    v_addc_co_u32_e32 v13, vcc, 0, v13, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v10, vcc, 3, v10
; GFX9-NEXT:    v_addc_co_u32_e32 v11, vcc, 0, v11, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v8, vcc, 3, v8
; GFX9-NEXT:    v_addc_co_u32_e32 v9, vcc, 0, v9, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v6, vcc, 3, v6
; GFX9-NEXT:    v_addc_co_u32_e32 v7, vcc, 0, v7, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v4, vcc, 3, v4
; GFX9-NEXT:    v_addc_co_u32_e32 v5, vcc, 0, v5, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v2, vcc, 3, v2
; GFX9-NEXT:    v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v0, vcc, 3, v0
; GFX9-NEXT:    v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX9-NEXT:  .LBB22_2: ; %end
; GFX9-NEXT:    s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v14i64_to_v28f32:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-NEXT:    s_cbranch_execz .LBB22_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-NEXT:    v_add_co_u32 v26, vcc_lo, v26, 3
; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-NEXT:    v_add_co_ci_u32_e64 v27, null, 0, v27, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v24, vcc_lo, v24, 3
; GFX11-NEXT:    v_add_co_ci_u32_e64 v25, null, 0, v25, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v22, vcc_lo, v22, 3
; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-NEXT:    v_add_co_ci_u32_e64 v23, null, 0, v23, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v20, vcc_lo, v20, 3
; GFX11-NEXT:    v_add_co_ci_u32_e64 v21, null, 0, v21, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v18, vcc_lo, v18, 3
; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-NEXT:    v_add_co_ci_u32_e64 v19, null, 0, v19, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v16, vcc_lo, v16, 3
; GFX11-NEXT:    v_add_co_ci_u32_e64 v17, null, 0, v17, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v14, vcc_lo, v14, 3
; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-NEXT:    v_add_co_ci_u32_e64 v15, null, 0, v15, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v12, vcc_lo, v12, 3
; GFX11-NEXT:    v_add_co_ci_u32_e64 v13, null, 0, v13, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v10, vcc_lo, v10, 3
; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-NEXT:    v_add_co_ci_u32_e64 v11, null, 0, v11, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v8, vcc_lo, v8, 3
; GFX11-NEXT:    v_add_co_ci_u32_e64 v9, null, 0, v9, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v6, vcc_lo, v6, 3
; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-NEXT:    v_add_co_ci_u32_e64 v7, null, 0, v7, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v4, vcc_lo, v4, 3
; GFX11-NEXT:    v_add_co_ci_u32_e64 v5, null, 0, v5, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v2, vcc_lo, v2, 3
; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-NEXT:    v_add_co_ci_u32_e64 v3, null, 0, v3, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v0, vcc_lo, v0, 3
; GFX11-NEXT:    v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX11-NEXT:  .LBB22_2: ; %end
; GFX11-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = add <14 x i64> %a, splat (i64 3)
  %a2 = bitcast <14 x i64> %a1 to <28 x float>
  br label %end

cmp.false:
  %a3 = bitcast <14 x i64> %a to <28 x float>
  br label %end

end:
  %phi = phi <28 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <28 x float> %phi
}

define inreg <28 x float> @bitcast_v14i64_to_v28f32_scalar(<14 x i64> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v14i64_to_v28f32_scalar:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    v_readfirstlane_b32 s41, v14
; SI-NEXT:    v_readfirstlane_b32 s4, v13
; SI-NEXT:    v_readfirstlane_b32 s5, v12
; SI-NEXT:    v_readfirstlane_b32 s6, v11
; SI-NEXT:    v_readfirstlane_b32 s7, v10
; SI-NEXT:    v_readfirstlane_b32 s8, v9
; SI-NEXT:    v_readfirstlane_b32 s9, v8
; SI-NEXT:    v_readfirstlane_b32 s10, v7
; SI-NEXT:    v_readfirstlane_b32 s11, v6
; SI-NEXT:    v_readfirstlane_b32 s12, v5
; SI-NEXT:    v_readfirstlane_b32 s13, v4
; SI-NEXT:    v_readfirstlane_b32 s14, v3
; SI-NEXT:    v_readfirstlane_b32 s15, v2
; SI-NEXT:    v_readfirstlane_b32 s40, v1
; SI-NEXT:    s_cmp_lg_u32 s41, 0
; SI-NEXT:    v_readfirstlane_b32 s41, v0
; SI-NEXT:    s_cbranch_scc1 .LBB23_2
; SI-NEXT:  ; %bb.1: ; %cmp.true
; SI-NEXT:    s_add_u32 s5, s5, 3
; SI-NEXT:    s_addc_u32 s4, s4, 0
; SI-NEXT:    s_add_u32 s7, s7, 3
; SI-NEXT:    s_addc_u32 s6, s6, 0
; SI-NEXT:    s_add_u32 s9, s9, 3
; SI-NEXT:    s_addc_u32 s8, s8, 0
; SI-NEXT:    s_add_u32 s11, s11, 3
; SI-NEXT:    s_addc_u32 s10, s10, 0
; SI-NEXT:    s_add_u32 s13, s13, 3
; SI-NEXT:    s_addc_u32 s12, s12, 0
; SI-NEXT:    s_add_u32 s15, s15, 3
; SI-NEXT:    s_addc_u32 s14, s14, 0
; SI-NEXT:    s_add_u32 s41, s41, 3
; SI-NEXT:    s_addc_u32 s40, s40, 0
; SI-NEXT:    s_add_u32 s28, s28, 3
; SI-NEXT:    s_addc_u32 s29, s29, 0
; SI-NEXT:    s_add_u32 s26, s26, 3
; SI-NEXT:    s_addc_u32 s27, s27, 0
; SI-NEXT:    s_add_u32 s24, s24, 3
; SI-NEXT:    s_addc_u32 s25, s25, 0
; SI-NEXT:    s_add_u32 s22, s22, 3
; SI-NEXT:    s_addc_u32 s23, s23, 0
; SI-NEXT:    s_add_u32 s20, s20, 3
; SI-NEXT:    s_addc_u32 s21, s21, 0
; SI-NEXT:    s_add_u32 s18, s18, 3
; SI-NEXT:    s_addc_u32 s19, s19, 0
; SI-NEXT:    s_add_u32 s16, s16, 3
; SI-NEXT:    s_addc_u32 s17, s17, 0
; SI-NEXT:  .LBB23_2: ; %end
; SI-NEXT:    v_mov_b32_e32 v0, s16
; SI-NEXT:    v_mov_b32_e32 v1, s17
; SI-NEXT:    v_mov_b32_e32 v2, s18
; SI-NEXT:    v_mov_b32_e32 v3, s19
; SI-NEXT:    v_mov_b32_e32 v4, s20
; SI-NEXT:    v_mov_b32_e32 v5, s21
; SI-NEXT:    v_mov_b32_e32 v6, s22
; SI-NEXT:    v_mov_b32_e32 v7, s23
; SI-NEXT:    v_mov_b32_e32 v8, s24
; SI-NEXT:    v_mov_b32_e32 v9, s25
; SI-NEXT:    v_mov_b32_e32 v10, s26
; SI-NEXT:    v_mov_b32_e32 v11, s27
; SI-NEXT:    v_mov_b32_e32 v12, s28
; SI-NEXT:    v_mov_b32_e32 v13, s29
; SI-NEXT:    v_mov_b32_e32 v14, s41
; SI-NEXT:    v_mov_b32_e32 v15, s40
; SI-NEXT:    v_mov_b32_e32 v16, s15
; SI-NEXT:    v_mov_b32_e32 v17, s14
; SI-NEXT:    v_mov_b32_e32 v18, s13
; SI-NEXT:    v_mov_b32_e32 v19, s12
; SI-NEXT:    v_mov_b32_e32 v20, s11
; SI-NEXT:    v_mov_b32_e32 v21, s10
; SI-NEXT:    v_mov_b32_e32 v22, s9
; SI-NEXT:    v_mov_b32_e32 v23, s8
; SI-NEXT:    v_mov_b32_e32 v24, s7
; SI-NEXT:    v_mov_b32_e32 v25, s6
; SI-NEXT:    v_mov_b32_e32 v26, s5
; SI-NEXT:    v_mov_b32_e32 v27, s4
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v14i64_to_v28f32_scalar:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    v_readfirstlane_b32 s41, v14
; VI-NEXT:    v_readfirstlane_b32 s4, v13
; VI-NEXT:    v_readfirstlane_b32 s5, v12
; VI-NEXT:    v_readfirstlane_b32 s6, v11
; VI-NEXT:    v_readfirstlane_b32 s7, v10
; VI-NEXT:    v_readfirstlane_b32 s8, v9
; VI-NEXT:    v_readfirstlane_b32 s9, v8
; VI-NEXT:    v_readfirstlane_b32 s10, v7
; VI-NEXT:    v_readfirstlane_b32 s11, v6
; VI-NEXT:    v_readfirstlane_b32 s12, v5
; VI-NEXT:    v_readfirstlane_b32 s13, v4
; VI-NEXT:    v_readfirstlane_b32 s14, v3
; VI-NEXT:    v_readfirstlane_b32 s15, v2
; VI-NEXT:    v_readfirstlane_b32 s40, v1
; VI-NEXT:    s_cmp_lg_u32 s41, 0
; VI-NEXT:    v_readfirstlane_b32 s41, v0
; VI-NEXT:    s_cbranch_scc1 .LBB23_2
; VI-NEXT:  ; %bb.1: ; %cmp.true
; VI-NEXT:    s_add_u32 s5, s5, 3
; VI-NEXT:    s_addc_u32 s4, s4, 0
; VI-NEXT:    s_add_u32 s7, s7, 3
; VI-NEXT:    s_addc_u32 s6, s6, 0
; VI-NEXT:    s_add_u32 s9, s9, 3
; VI-NEXT:    s_addc_u32 s8, s8, 0
; VI-NEXT:    s_add_u32 s11, s11, 3
; VI-NEXT:    s_addc_u32 s10, s10, 0
; VI-NEXT:    s_add_u32 s13, s13, 3
; VI-NEXT:    s_addc_u32 s12, s12, 0
; VI-NEXT:    s_add_u32 s15, s15, 3
; VI-NEXT:    s_addc_u32 s14, s14, 0
; VI-NEXT:    s_add_u32 s41, s41, 3
; VI-NEXT:    s_addc_u32 s40, s40, 0
; VI-NEXT:    s_add_u32 s28, s28, 3
; VI-NEXT:    s_addc_u32 s29, s29, 0
; VI-NEXT:    s_add_u32 s26, s26, 3
; VI-NEXT:    s_addc_u32 s27, s27, 0
; VI-NEXT:    s_add_u32 s24, s24, 3
; VI-NEXT:    s_addc_u32 s25, s25, 0
; VI-NEXT:    s_add_u32 s22, s22, 3
; VI-NEXT:    s_addc_u32 s23, s23, 0
; VI-NEXT:    s_add_u32 s20, s20, 3
; VI-NEXT:    s_addc_u32 s21, s21, 0
; VI-NEXT:    s_add_u32 s18, s18, 3
; VI-NEXT:    s_addc_u32 s19, s19, 0
; VI-NEXT:    s_add_u32 s16, s16, 3
; VI-NEXT:    s_addc_u32 s17, s17, 0
; VI-NEXT:  .LBB23_2: ; %end
; VI-NEXT:    v_mov_b32_e32 v0, s16
; VI-NEXT:    v_mov_b32_e32 v1, s17
; VI-NEXT:    v_mov_b32_e32 v2, s18
; VI-NEXT:    v_mov_b32_e32 v3, s19
; VI-NEXT:    v_mov_b32_e32 v4, s20
; VI-NEXT:    v_mov_b32_e32 v5, s21
; VI-NEXT:    v_mov_b32_e32 v6, s22
; VI-NEXT:    v_mov_b32_e32 v7, s23
; VI-NEXT:    v_mov_b32_e32 v8, s24
; VI-NEXT:    v_mov_b32_e32 v9, s25
; VI-NEXT:    v_mov_b32_e32 v10, s26
; VI-NEXT:    v_mov_b32_e32 v11, s27
; VI-NEXT:    v_mov_b32_e32 v12, s28
; VI-NEXT:    v_mov_b32_e32 v13, s29
; VI-NEXT:    v_mov_b32_e32 v14, s41
; VI-NEXT:    v_mov_b32_e32 v15, s40
; VI-NEXT:    v_mov_b32_e32 v16, s15
; VI-NEXT:    v_mov_b32_e32 v17, s14
; VI-NEXT:    v_mov_b32_e32 v18, s13
; VI-NEXT:    v_mov_b32_e32 v19, s12
; VI-NEXT:    v_mov_b32_e32 v20, s11
; VI-NEXT:    v_mov_b32_e32 v21, s10
; VI-NEXT:    v_mov_b32_e32 v22, s9
; VI-NEXT:    v_mov_b32_e32 v23, s8
; VI-NEXT:    v_mov_b32_e32 v24, s7
; VI-NEXT:    v_mov_b32_e32 v25, s6
; VI-NEXT:    v_mov_b32_e32 v26, s5
; VI-NEXT:    v_mov_b32_e32 v27, s4
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v14i64_to_v28f32_scalar:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_readfirstlane_b32 s41, v14
; GFX9-NEXT:    v_readfirstlane_b32 s4, v13
; GFX9-NEXT:    v_readfirstlane_b32 s5, v12
; GFX9-NEXT:    v_readfirstlane_b32 s6, v11
; GFX9-NEXT:    v_readfirstlane_b32 s7, v10
; GFX9-NEXT:    v_readfirstlane_b32 s8, v9
; GFX9-NEXT:    v_readfirstlane_b32 s9, v8
; GFX9-NEXT:    v_readfirstlane_b32 s10, v7
; GFX9-NEXT:    v_readfirstlane_b32 s11, v6
; GFX9-NEXT:    v_readfirstlane_b32 s12, v5
; GFX9-NEXT:    v_readfirstlane_b32 s13, v4
; GFX9-NEXT:    v_readfirstlane_b32 s14, v3
; GFX9-NEXT:    v_readfirstlane_b32 s15, v2
; GFX9-NEXT:    v_readfirstlane_b32 s40, v1
; GFX9-NEXT:    s_cmp_lg_u32 s41, 0
; GFX9-NEXT:    v_readfirstlane_b32 s41, v0
; GFX9-NEXT:    s_cbranch_scc1 .LBB23_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.true
; GFX9-NEXT:    s_add_u32 s5, s5, 3
; GFX9-NEXT:    s_addc_u32 s4, s4, 0
; GFX9-NEXT:    s_add_u32 s7, s7, 3
; GFX9-NEXT:    s_addc_u32 s6, s6, 0
; GFX9-NEXT:    s_add_u32 s9, s9, 3
; GFX9-NEXT:    s_addc_u32 s8, s8, 0
; GFX9-NEXT:    s_add_u32 s11, s11, 3
; GFX9-NEXT:    s_addc_u32 s10, s10, 0
; GFX9-NEXT:    s_add_u32 s13, s13, 3
; GFX9-NEXT:    s_addc_u32 s12, s12, 0
; GFX9-NEXT:    s_add_u32 s15, s15, 3
; GFX9-NEXT:    s_addc_u32 s14, s14, 0
; GFX9-NEXT:    s_add_u32 s41, s41, 3
; GFX9-NEXT:    s_addc_u32 s40, s40, 0
; GFX9-NEXT:    s_add_u32 s28, s28, 3
; GFX9-NEXT:    s_addc_u32 s29, s29, 0
; GFX9-NEXT:    s_add_u32 s26, s26, 3
; GFX9-NEXT:    s_addc_u32 s27, s27, 0
; GFX9-NEXT:    s_add_u32 s24, s24, 3
; GFX9-NEXT:    s_addc_u32 s25, s25, 0
; GFX9-NEXT:    s_add_u32 s22, s22, 3
; GFX9-NEXT:    s_addc_u32 s23, s23, 0
; GFX9-NEXT:    s_add_u32 s20, s20, 3
; GFX9-NEXT:    s_addc_u32 s21, s21, 0
; GFX9-NEXT:    s_add_u32 s18, s18, 3
; GFX9-NEXT:    s_addc_u32 s19, s19, 0
; GFX9-NEXT:    s_add_u32 s16, s16, 3
; GFX9-NEXT:    s_addc_u32 s17, s17, 0
; GFX9-NEXT:  .LBB23_2: ; %end
; GFX9-NEXT:    v_mov_b32_e32 v0, s16
; GFX9-NEXT:    v_mov_b32_e32 v1, s17
; GFX9-NEXT:    v_mov_b32_e32 v2, s18
; GFX9-NEXT:    v_mov_b32_e32 v3, s19
; GFX9-NEXT:    v_mov_b32_e32 v4, s20
; GFX9-NEXT:    v_mov_b32_e32 v5, s21
; GFX9-NEXT:    v_mov_b32_e32 v6, s22
; GFX9-NEXT:    v_mov_b32_e32 v7, s23
; GFX9-NEXT:    v_mov_b32_e32 v8, s24
; GFX9-NEXT:    v_mov_b32_e32 v9, s25
; GFX9-NEXT:    v_mov_b32_e32 v10, s26
; GFX9-NEXT:    v_mov_b32_e32 v11, s27
; GFX9-NEXT:    v_mov_b32_e32 v12, s28
; GFX9-NEXT:    v_mov_b32_e32 v13, s29
; GFX9-NEXT:    v_mov_b32_e32 v14, s41
; GFX9-NEXT:    v_mov_b32_e32 v15, s40
; GFX9-NEXT:    v_mov_b32_e32 v16, s15
; GFX9-NEXT:    v_mov_b32_e32 v17, s14
; GFX9-NEXT:    v_mov_b32_e32 v18, s13
; GFX9-NEXT:    v_mov_b32_e32 v19, s12
; GFX9-NEXT:    v_mov_b32_e32 v20, s11
; GFX9-NEXT:    v_mov_b32_e32 v21, s10
; GFX9-NEXT:    v_mov_b32_e32 v22, s9
; GFX9-NEXT:    v_mov_b32_e32 v23, s8
; GFX9-NEXT:    v_mov_b32_e32 v24, s7
; GFX9-NEXT:    v_mov_b32_e32 v25, s6
; GFX9-NEXT:    v_mov_b32_e32 v26, s5
; GFX9-NEXT:    v_mov_b32_e32 v27, s4
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v14i64_to_v28f32_scalar:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_readfirstlane_b32 s14, v10
; GFX11-NEXT:    v_readfirstlane_b32 s4, v9
; GFX11-NEXT:    v_readfirstlane_b32 s5, v8
; GFX11-NEXT:    v_readfirstlane_b32 s6, v7
; GFX11-NEXT:    v_readfirstlane_b32 s7, v6
; GFX11-NEXT:    v_readfirstlane_b32 s8, v5
; GFX11-NEXT:    v_readfirstlane_b32 s9, v4
; GFX11-NEXT:    v_readfirstlane_b32 s10, v3
; GFX11-NEXT:    v_readfirstlane_b32 s11, v2
; GFX11-NEXT:    v_readfirstlane_b32 s12, v1
; GFX11-NEXT:    v_readfirstlane_b32 s13, v0
; GFX11-NEXT:    s_cmp_lg_u32 s14, 0
; GFX11-NEXT:    s_cbranch_scc1 .LBB23_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-NEXT:    s_add_u32 s5, s5, 3
; GFX11-NEXT:    s_addc_u32 s4, s4, 0
; GFX11-NEXT:    s_add_u32 s7, s7, 3
; GFX11-NEXT:    s_addc_u32 s6, s6, 0
; GFX11-NEXT:    s_add_u32 s9, s9, 3
; GFX11-NEXT:    s_addc_u32 s8, s8, 0
; GFX11-NEXT:    s_add_u32 s11, s11, 3
; GFX11-NEXT:    s_addc_u32 s10, s10, 0
; GFX11-NEXT:    s_add_u32 s13, s13, 3
; GFX11-NEXT:    s_addc_u32 s12, s12, 0
; GFX11-NEXT:    s_add_u32 s28, s28, 3
; GFX11-NEXT:    s_addc_u32 s29, s29, 0
; GFX11-NEXT:    s_add_u32 s26, s26, 3
; GFX11-NEXT:    s_addc_u32 s27, s27, 0
; GFX11-NEXT:    s_add_u32 s24, s24, 3
; GFX11-NEXT:    s_addc_u32 s25, s25, 0
; GFX11-NEXT:    s_add_u32 s22, s22, 3
; GFX11-NEXT:    s_addc_u32 s23, s23, 0
; GFX11-NEXT:    s_add_u32 s20, s20, 3
; GFX11-NEXT:    s_addc_u32 s21, s21, 0
; GFX11-NEXT:    s_add_u32 s18, s18, 3
; GFX11-NEXT:    s_addc_u32 s19, s19, 0
; GFX11-NEXT:    s_add_u32 s16, s16, 3
; GFX11-NEXT:    s_addc_u32 s17, s17, 0
; GFX11-NEXT:    s_add_u32 s2, s2, 3
; GFX11-NEXT:    s_addc_u32 s3, s3, 0
; GFX11-NEXT:    s_add_u32 s0, s0, 3
; GFX11-NEXT:    s_addc_u32 s1, s1, 0
; GFX11-NEXT:  .LBB23_2: ; %end
; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT:    v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX11-NEXT:    v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; GFX11-NEXT:    v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
; GFX11-NEXT:    v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
; GFX11-NEXT:    v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
; GFX11-NEXT:    v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
; GFX11-NEXT:    v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
; GFX11-NEXT:    v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
; GFX11-NEXT:    v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
; GFX11-NEXT:    v_dual_mov_b32 v18, s13 :: v_dual_mov_b32 v19, s12
; GFX11-NEXT:    v_dual_mov_b32 v20, s11 :: v_dual_mov_b32 v21, s10
; GFX11-NEXT:    v_dual_mov_b32 v22, s9 :: v_dual_mov_b32 v23, s8
; GFX11-NEXT:    v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s6
; GFX11-NEXT:    v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s4
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = add <14 x i64> %a, splat (i64 3)
  %a2 = bitcast <14 x i64> %a1 to <28 x float>
  br label %end

cmp.false:
  %a3 = bitcast <14 x i64> %a to <28 x float>
  br label %end

end:
  %phi = phi <28 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <28 x float> %phi
}

define <14 x double> @bitcast_v28f32_to_v14f64(<28 x float> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v28f32_to_v14f64:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB24_2
; SI-NEXT:  ; %bb.1: ; %cmp.true
; SI-NEXT:    v_add_f32_e32 v27, 1.0, v27
; SI-NEXT:    v_add_f32_e32 v26, 1.0, v26
; SI-NEXT:    v_add_f32_e32 v25, 1.0, v25
; SI-NEXT:    v_add_f32_e32 v24, 1.0, v24
; SI-NEXT:    v_add_f32_e32 v23, 1.0, v23
; SI-NEXT:    v_add_f32_e32 v22, 1.0, v22
; SI-NEXT:    v_add_f32_e32 v21, 1.0, v21
; SI-NEXT:    v_add_f32_e32 v20, 1.0, v20
; SI-NEXT:    v_add_f32_e32 v19, 1.0, v19
; SI-NEXT:    v_add_f32_e32 v18, 1.0, v18
; SI-NEXT:    v_add_f32_e32 v17, 1.0, v17
; SI-NEXT:    v_add_f32_e32 v16, 1.0, v16
; SI-NEXT:    v_add_f32_e32 v15, 1.0, v15
; SI-NEXT:    v_add_f32_e32 v14, 1.0, v14
; SI-NEXT:    v_add_f32_e32 v13, 1.0, v13
; SI-NEXT:    v_add_f32_e32 v12, 1.0, v12
; SI-NEXT:    v_add_f32_e32 v11, 1.0, v11
; SI-NEXT:    v_add_f32_e32 v10, 1.0, v10
; SI-NEXT:    v_add_f32_e32 v9, 1.0, v9
; SI-NEXT:    v_add_f32_e32 v8, 1.0, v8
; SI-NEXT:    v_add_f32_e32 v7, 1.0, v7
; SI-NEXT:    v_add_f32_e32 v6, 1.0, v6
; SI-NEXT:    v_add_f32_e32 v5, 1.0, v5
; SI-NEXT:    v_add_f32_e32 v4, 1.0, v4
; SI-NEXT:    v_add_f32_e32 v3, 1.0, v3
; SI-NEXT:    v_add_f32_e32 v2, 1.0, v2
; SI-NEXT:    v_add_f32_e32 v1, 1.0, v1
; SI-NEXT:    v_add_f32_e32 v0, 1.0, v0
; SI-NEXT:  .LBB24_2: ; %end
; SI-NEXT:    s_or_b64 exec, exec, s[4:5]
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v28f32_to_v14f64:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB24_2
; VI-NEXT:  ; %bb.1: ; %cmp.true
; VI-NEXT:    v_add_f32_e32 v27, 1.0, v27
; VI-NEXT:    v_add_f32_e32 v26, 1.0, v26
; VI-NEXT:    v_add_f32_e32 v25, 1.0, v25
; VI-NEXT:    v_add_f32_e32 v24, 1.0, v24
; VI-NEXT:    v_add_f32_e32 v23, 1.0, v23
; VI-NEXT:    v_add_f32_e32 v22, 1.0, v22
; VI-NEXT:    v_add_f32_e32 v21, 1.0, v21
; VI-NEXT:    v_add_f32_e32 v20, 1.0, v20
; VI-NEXT:    v_add_f32_e32 v19, 1.0, v19
; VI-NEXT:    v_add_f32_e32 v18, 1.0, v18
; VI-NEXT:    v_add_f32_e32 v17, 1.0, v17
; VI-NEXT:    v_add_f32_e32 v16, 1.0, v16
; VI-NEXT:    v_add_f32_e32 v15, 1.0, v15
; VI-NEXT:    v_add_f32_e32 v14, 1.0, v14
; VI-NEXT:    v_add_f32_e32 v13, 1.0, v13
; VI-NEXT:    v_add_f32_e32 v12, 1.0, v12
; VI-NEXT:    v_add_f32_e32 v11, 1.0, v11
; VI-NEXT:    v_add_f32_e32 v10, 1.0, v10
; VI-NEXT:    v_add_f32_e32 v9, 1.0, v9
; VI-NEXT:    v_add_f32_e32 v8, 1.0, v8
; VI-NEXT:    v_add_f32_e32 v7, 1.0, v7
; VI-NEXT:    v_add_f32_e32 v6, 1.0, v6
; VI-NEXT:    v_add_f32_e32 v5, 1.0, v5
; VI-NEXT:    v_add_f32_e32 v4, 1.0, v4
; VI-NEXT:    v_add_f32_e32 v3, 1.0, v3
; VI-NEXT:    v_add_f32_e32 v2, 1.0, v2
; VI-NEXT:    v_add_f32_e32 v1, 1.0, v1
; VI-NEXT:    v_add_f32_e32 v0, 1.0, v0
; VI-NEXT:  .LBB24_2: ; %end
; VI-NEXT:    s_or_b64 exec, exec, s[4:5]
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v28f32_to_v14f64:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB24_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.true
; GFX9-NEXT:    v_add_f32_e32 v27, 1.0, v27
; GFX9-NEXT:    v_add_f32_e32 v26, 1.0, v26
; GFX9-NEXT:    v_add_f32_e32 v25, 1.0, v25
; GFX9-NEXT:    v_add_f32_e32 v24, 1.0, v24
; GFX9-NEXT:    v_add_f32_e32 v23, 1.0, v23
; GFX9-NEXT:    v_add_f32_e32 v22, 1.0, v22
; GFX9-NEXT:    v_add_f32_e32 v21, 1.0, v21
; GFX9-NEXT:    v_add_f32_e32 v20, 1.0, v20
; GFX9-NEXT:    v_add_f32_e32 v19, 1.0, v19
; GFX9-NEXT:    v_add_f32_e32 v18, 1.0, v18
; GFX9-NEXT:    v_add_f32_e32 v17, 1.0, v17
; GFX9-NEXT:    v_add_f32_e32 v16, 1.0, v16
; GFX9-NEXT:    v_add_f32_e32 v15, 1.0, v15
; GFX9-NEXT:    v_add_f32_e32 v14, 1.0, v14
; GFX9-NEXT:    v_add_f32_e32 v13, 1.0, v13
; GFX9-NEXT:    v_add_f32_e32 v12, 1.0, v12
; GFX9-NEXT:    v_add_f32_e32 v11, 1.0, v11
; GFX9-NEXT:    v_add_f32_e32 v10, 1.0, v10
; GFX9-NEXT:    v_add_f32_e32 v9, 1.0, v9
; GFX9-NEXT:    v_add_f32_e32 v8, 1.0, v8
; GFX9-NEXT:    v_add_f32_e32 v7, 1.0, v7
; GFX9-NEXT:    v_add_f32_e32 v6, 1.0, v6
; GFX9-NEXT:    v_add_f32_e32 v5, 1.0, v5
; GFX9-NEXT:    v_add_f32_e32 v4, 1.0, v4
; GFX9-NEXT:    v_add_f32_e32 v3, 1.0, v3
; GFX9-NEXT:    v_add_f32_e32 v2, 1.0, v2
; GFX9-NEXT:    v_add_f32_e32 v1, 1.0, v1
; GFX9-NEXT:    v_add_f32_e32 v0, 1.0, v0
; GFX9-NEXT:  .LBB24_2: ; %end
; GFX9-NEXT:    s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v28f32_to_v14f64:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-NEXT:    s_cbranch_execz .LBB24_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-NEXT:    v_dual_add_f32 v27, 1.0, v27 :: v_dual_add_f32 v26, 1.0, v26
; GFX11-NEXT:    v_dual_add_f32 v25, 1.0, v25 :: v_dual_add_f32 v24, 1.0, v24
; GFX11-NEXT:    v_dual_add_f32 v23, 1.0, v23 :: v_dual_add_f32 v22, 1.0, v22
; GFX11-NEXT:    v_dual_add_f32 v21, 1.0, v21 :: v_dual_add_f32 v20, 1.0, v20
; GFX11-NEXT:    v_dual_add_f32 v19, 1.0, v19 :: v_dual_add_f32 v18, 1.0, v18
; GFX11-NEXT:    v_dual_add_f32 v17, 1.0, v17 :: v_dual_add_f32 v16, 1.0, v16
; GFX11-NEXT:    v_dual_add_f32 v15, 1.0, v15 :: v_dual_add_f32 v14, 1.0, v14
; GFX11-NEXT:    v_dual_add_f32 v13, 1.0, v13 :: v_dual_add_f32 v12, 1.0, v12
; GFX11-NEXT:    v_dual_add_f32 v11, 1.0, v11 :: v_dual_add_f32 v10, 1.0, v10
; GFX11-NEXT:    v_dual_add_f32 v9, 1.0, v9 :: v_dual_add_f32 v8, 1.0, v8
; GFX11-NEXT:    v_dual_add_f32 v7, 1.0, v7 :: v_dual_add_f32 v6, 1.0, v6
; GFX11-NEXT:    v_dual_add_f32 v5, 1.0, v5 :: v_dual_add_f32 v4, 1.0, v4
; GFX11-NEXT:    v_dual_add_f32 v3, 1.0, v3 :: v_dual_add_f32 v2, 1.0, v2
; GFX11-NEXT:    v_dual_add_f32 v1, 1.0, v1 :: v_dual_add_f32 v0, 1.0, v0
; GFX11-NEXT:  .LBB24_2: ; %end
; GFX11-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = fadd <28 x float> %a, splat (float 1.000000e+00)
  %a2 = bitcast <28 x float> %a1 to <14 x double>
  br label %end

cmp.false:
  %a3 = bitcast <28 x float> %a to <14 x double>
  br label %end

end:
  %phi = phi <14 x double> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <14 x double> %phi
}

define inreg <14 x double> @bitcast_v28f32_to_v14f64_scalar(<28 x float> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v28f32_to_v14f64_scalar:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_writelane_b32 v32, s36, 0
; SI-NEXT:    v_writelane_b32 v32, s37, 1
; SI-NEXT:    v_writelane_b32 v32, s38, 2
; SI-NEXT:    v_writelane_b32 v32, s39, 3
; SI-NEXT:    v_writelane_b32 v32, s48, 4
; SI-NEXT:    v_writelane_b32 v32, s49, 5
; SI-NEXT:    v_writelane_b32 v32, s50, 6
; SI-NEXT:    v_writelane_b32 v32, s51, 7
; SI-NEXT:    v_writelane_b32 v32, s52, 8
; SI-NEXT:    v_writelane_b32 v32, s53, 9
; SI-NEXT:    v_writelane_b32 v32, s54, 10
; SI-NEXT:    v_writelane_b32 v32, s55, 11
; SI-NEXT:    v_readfirstlane_b32 s4, v14
; SI-NEXT:    s_mov_b32 s49, s29
; SI-NEXT:    s_mov_b32 s48, s28
; SI-NEXT:    s_mov_b32 s47, s27
; SI-NEXT:    s_mov_b32 s46, s26
; SI-NEXT:    s_mov_b32 s45, s25
; SI-NEXT:    s_mov_b32 s44, s24
; SI-NEXT:    s_mov_b32 s43, s23
; SI-NEXT:    s_mov_b32 s42, s22
; SI-NEXT:    s_mov_b32 s41, s21
; SI-NEXT:    s_mov_b32 s40, s20
; SI-NEXT:    s_mov_b32 s39, s19
; SI-NEXT:    s_mov_b32 s38, s18
; SI-NEXT:    s_mov_b32 s37, s17
; SI-NEXT:    s_mov_b32 s36, s16
; SI-NEXT:    v_readfirstlane_b32 s63, v13
; SI-NEXT:    v_readfirstlane_b32 s62, v12
; SI-NEXT:    v_readfirstlane_b32 s61, v11
; SI-NEXT:    v_readfirstlane_b32 s60, v10
; SI-NEXT:    v_readfirstlane_b32 s59, v9
; SI-NEXT:    v_readfirstlane_b32 s58, v8
; SI-NEXT:    v_readfirstlane_b32 s57, v7
; SI-NEXT:    v_readfirstlane_b32 s56, v6
; SI-NEXT:    v_readfirstlane_b32 s55, v5
; SI-NEXT:    v_readfirstlane_b32 s54, v4
; SI-NEXT:    v_readfirstlane_b32 s53, v3
; SI-NEXT:    v_readfirstlane_b32 s52, v2
; SI-NEXT:    v_readfirstlane_b32 s51, v1
; SI-NEXT:    s_cmp_lg_u32 s4, 0
; SI-NEXT:    v_readfirstlane_b32 s50, v0
; SI-NEXT:    s_cbranch_scc0 .LBB25_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    v_mov_b32_e32 v0, s36
; SI-NEXT:    v_mov_b32_e32 v1, s37
; SI-NEXT:    v_mov_b32_e32 v2, s38
; SI-NEXT:    v_mov_b32_e32 v3, s39
; SI-NEXT:    v_mov_b32_e32 v4, s40
; SI-NEXT:    v_mov_b32_e32 v5, s41
; SI-NEXT:    v_mov_b32_e32 v6, s42
; SI-NEXT:    v_mov_b32_e32 v7, s43
; SI-NEXT:    v_mov_b32_e32 v8, s44
; SI-NEXT:    v_mov_b32_e32 v9, s45
; SI-NEXT:    v_mov_b32_e32 v10, s46
; SI-NEXT:    v_mov_b32_e32 v11, s47
; SI-NEXT:    v_mov_b32_e32 v12, s48
; SI-NEXT:    v_mov_b32_e32 v13, s49
; SI-NEXT:    v_mov_b32_e32 v14, s50
; SI-NEXT:    v_mov_b32_e32 v15, s51
; SI-NEXT:    v_mov_b32_e32 v16, s52
; SI-NEXT:    v_mov_b32_e32 v17, s53
; SI-NEXT:    v_mov_b32_e32 v18, s54
; SI-NEXT:    v_mov_b32_e32 v19, s55
; SI-NEXT:    v_mov_b32_e32 v20, s56
; SI-NEXT:    v_mov_b32_e32 v21, s57
; SI-NEXT:    v_mov_b32_e32 v22, s58
; SI-NEXT:    v_mov_b32_e32 v23, s59
; SI-NEXT:    v_mov_b32_e32 v24, s60
; SI-NEXT:    v_mov_b32_e32 v25, s61
; SI-NEXT:    v_mov_b32_e32 v26, s62
; SI-NEXT:    v_mov_b32_e32 v27, s63
; SI-NEXT:    v_mov_b32_e32 v28, s64
; SI-NEXT:    v_mov_b32_e32 v29, s65
; SI-NEXT:    v_mov_b32_e32 v30, s66
; SI-NEXT:    v_mov_b32_e32 v31, s67
; SI-NEXT:    s_branch .LBB25_3
; SI-NEXT:  .LBB25_2: ; %cmp.true
; SI-NEXT:    v_add_f32_e64 v27, s63, 1.0
; SI-NEXT:    v_add_f32_e64 v26, s62, 1.0
; SI-NEXT:    v_add_f32_e64 v25, s61, 1.0
; SI-NEXT:    v_add_f32_e64 v24, s60, 1.0
; SI-NEXT:    v_add_f32_e64 v23, s59, 1.0
; SI-NEXT:    v_add_f32_e64 v22, s58, 1.0
; SI-NEXT:    v_add_f32_e64 v21, s57, 1.0
; SI-NEXT:    v_add_f32_e64 v20, s56, 1.0
; SI-NEXT:    v_add_f32_e64 v19, s55, 1.0
; SI-NEXT:    v_add_f32_e64 v18, s54, 1.0
; SI-NEXT:    v_add_f32_e64 v17, s53, 1.0
; SI-NEXT:    v_add_f32_e64 v16, s52, 1.0
; SI-NEXT:    v_add_f32_e64 v15, s51, 1.0
; SI-NEXT:    v_add_f32_e64 v14, s50, 1.0
; SI-NEXT:    v_add_f32_e64 v13, s49, 1.0
; SI-NEXT:    v_add_f32_e64 v12, s48, 1.0
; SI-NEXT:    v_add_f32_e64 v11, s47, 1.0
; SI-NEXT:    v_add_f32_e64 v10, s46, 1.0
; SI-NEXT:    v_add_f32_e64 v9, s45, 1.0
; SI-NEXT:    v_add_f32_e64 v8, s44, 1.0
; SI-NEXT:    v_add_f32_e64 v7, s43, 1.0
; SI-NEXT:    v_add_f32_e64 v6, s42, 1.0
; SI-NEXT:    v_add_f32_e64 v5, s41, 1.0
; SI-NEXT:    v_add_f32_e64 v4, s40, 1.0
; SI-NEXT:    v_add_f32_e64 v3, s39, 1.0
; SI-NEXT:    v_add_f32_e64 v2, s38, 1.0
; SI-NEXT:    v_add_f32_e64 v1, s37, 1.0
; SI-NEXT:    v_add_f32_e64 v0, s36, 1.0
; SI-NEXT:  .LBB25_3: ; %end
; SI-NEXT:    v_readlane_b32 s55, v32, 11
; SI-NEXT:    v_readlane_b32 s54, v32, 10
; SI-NEXT:    v_readlane_b32 s53, v32, 9
; SI-NEXT:    v_readlane_b32 s52, v32, 8
; SI-NEXT:    v_readlane_b32 s51, v32, 7
; SI-NEXT:    v_readlane_b32 s50, v32, 6
; SI-NEXT:    v_readlane_b32 s49, v32, 5
; SI-NEXT:    v_readlane_b32 s48, v32, 4
; SI-NEXT:    v_readlane_b32 s39, v32, 3
; SI-NEXT:    v_readlane_b32 s38, v32, 2
; SI-NEXT:    v_readlane_b32 s37, v32, 1
; SI-NEXT:    v_readlane_b32 s36, v32, 0
; SI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v28f32_to_v14f64_scalar:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    v_writelane_b32 v32, s36, 0
; VI-NEXT:    v_writelane_b32 v32, s37, 1
; VI-NEXT:    v_writelane_b32 v32, s38, 2
; VI-NEXT:    v_writelane_b32 v32, s39, 3
; VI-NEXT:    v_writelane_b32 v32, s48, 4
; VI-NEXT:    v_writelane_b32 v32, s49, 5
; VI-NEXT:    v_writelane_b32 v32, s50, 6
; VI-NEXT:    v_writelane_b32 v32, s51, 7
; VI-NEXT:    v_writelane_b32 v32, s52, 8
; VI-NEXT:    v_writelane_b32 v32, s53, 9
; VI-NEXT:    v_writelane_b32 v32, s54, 10
; VI-NEXT:    v_writelane_b32 v32, s55, 11
; VI-NEXT:    v_readfirstlane_b32 s4, v14
; VI-NEXT:    s_mov_b32 s49, s29
; VI-NEXT:    s_mov_b32 s48, s28
; VI-NEXT:    s_mov_b32 s47, s27
; VI-NEXT:    s_mov_b32 s46, s26
; VI-NEXT:    s_mov_b32 s45, s25
; VI-NEXT:    s_mov_b32 s44, s24
; VI-NEXT:    s_mov_b32 s43, s23
; VI-NEXT:    s_mov_b32 s42, s22
; VI-NEXT:    s_mov_b32 s41, s21
; VI-NEXT:    s_mov_b32 s40, s20
; VI-NEXT:    s_mov_b32 s39, s19
; VI-NEXT:    s_mov_b32 s38, s18
; VI-NEXT:    s_mov_b32 s37, s17
; VI-NEXT:    s_mov_b32 s36, s16
; VI-NEXT:    v_readfirstlane_b32 s63, v13
; VI-NEXT:    v_readfirstlane_b32 s62, v12
; VI-NEXT:    v_readfirstlane_b32 s61, v11
; VI-NEXT:    v_readfirstlane_b32 s60, v10
; VI-NEXT:    v_readfirstlane_b32 s59, v9
; VI-NEXT:    v_readfirstlane_b32 s58, v8
; VI-NEXT:    v_readfirstlane_b32 s57, v7
; VI-NEXT:    v_readfirstlane_b32 s56, v6
; VI-NEXT:    v_readfirstlane_b32 s55, v5
; VI-NEXT:    v_readfirstlane_b32 s54, v4
; VI-NEXT:    v_readfirstlane_b32 s53, v3
; VI-NEXT:    v_readfirstlane_b32 s52, v2
; VI-NEXT:    v_readfirstlane_b32 s51, v1
; VI-NEXT:    s_cmp_lg_u32 s4, 0
; VI-NEXT:    v_readfirstlane_b32 s50, v0
; VI-NEXT:    s_cbranch_scc0 .LBB25_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    v_mov_b32_e32 v0, s36
; VI-NEXT:    v_mov_b32_e32 v1, s37
; VI-NEXT:    v_mov_b32_e32 v2, s38
; VI-NEXT:    v_mov_b32_e32 v3, s39
; VI-NEXT:    v_mov_b32_e32 v4, s40
; VI-NEXT:    v_mov_b32_e32 v5, s41
; VI-NEXT:    v_mov_b32_e32 v6, s42
; VI-NEXT:    v_mov_b32_e32 v7, s43
; VI-NEXT:    v_mov_b32_e32 v8, s44
; VI-NEXT:    v_mov_b32_e32 v9, s45
; VI-NEXT:    v_mov_b32_e32 v10, s46
; VI-NEXT:    v_mov_b32_e32 v11, s47
; VI-NEXT:    v_mov_b32_e32 v12, s48
; VI-NEXT:    v_mov_b32_e32 v13, s49
; VI-NEXT:    v_mov_b32_e32 v14, s50
; VI-NEXT:    v_mov_b32_e32 v15, s51
; VI-NEXT:    v_mov_b32_e32 v16, s52
; VI-NEXT:    v_mov_b32_e32 v17, s53
; VI-NEXT:    v_mov_b32_e32 v18, s54
; VI-NEXT:    v_mov_b32_e32 v19, s55
; VI-NEXT:    v_mov_b32_e32 v20, s56
; VI-NEXT:    v_mov_b32_e32 v21, s57
; VI-NEXT:    v_mov_b32_e32 v22, s58
; VI-NEXT:    v_mov_b32_e32 v23, s59
; VI-NEXT:    v_mov_b32_e32 v24, s60
; VI-NEXT:    v_mov_b32_e32 v25, s61
; VI-NEXT:    v_mov_b32_e32 v26, s62
; VI-NEXT:    v_mov_b32_e32 v27, s63
; VI-NEXT:    v_mov_b32_e32 v28, s64
; VI-NEXT:    v_mov_b32_e32 v29, s65
; VI-NEXT:    v_mov_b32_e32 v30, s66
; VI-NEXT:    v_mov_b32_e32 v31, s67
; VI-NEXT:    s_branch .LBB25_3
; VI-NEXT:  .LBB25_2: ; %cmp.true
; VI-NEXT:    v_add_f32_e64 v27, s63, 1.0
; VI-NEXT:    v_add_f32_e64 v26, s62, 1.0
; VI-NEXT:    v_add_f32_e64 v25, s61, 1.0
; VI-NEXT:    v_add_f32_e64 v24, s60, 1.0
; VI-NEXT:    v_add_f32_e64 v23, s59, 1.0
; VI-NEXT:    v_add_f32_e64 v22, s58, 1.0
; VI-NEXT:    v_add_f32_e64 v21, s57, 1.0
; VI-NEXT:    v_add_f32_e64 v20, s56, 1.0
; VI-NEXT:    v_add_f32_e64 v19, s55, 1.0
; VI-NEXT:    v_add_f32_e64 v18, s54, 1.0
; VI-NEXT:    v_add_f32_e64 v17, s53, 1.0
; VI-NEXT:    v_add_f32_e64 v16, s52, 1.0
; VI-NEXT:    v_add_f32_e64 v15, s51, 1.0
; VI-NEXT:    v_add_f32_e64 v14, s50, 1.0
; VI-NEXT:    v_add_f32_e64 v13, s49, 1.0
; VI-NEXT:    v_add_f32_e64 v12, s48, 1.0
; VI-NEXT:    v_add_f32_e64 v11, s47, 1.0
; VI-NEXT:    v_add_f32_e64 v10, s46, 1.0
; VI-NEXT:    v_add_f32_e64 v9, s45, 1.0
; VI-NEXT:    v_add_f32_e64 v8, s44, 1.0
; VI-NEXT:    v_add_f32_e64 v7, s43, 1.0
; VI-NEXT:    v_add_f32_e64 v6, s42, 1.0
; VI-NEXT:    v_add_f32_e64 v5, s41, 1.0
; VI-NEXT:    v_add_f32_e64 v4, s40, 1.0
; VI-NEXT:    v_add_f32_e64 v3, s39, 1.0
; VI-NEXT:    v_add_f32_e64 v2, s38, 1.0
; VI-NEXT:    v_add_f32_e64 v1, s37, 1.0
; VI-NEXT:    v_add_f32_e64 v0, s36, 1.0
; VI-NEXT:  .LBB25_3: ; %end
; VI-NEXT:    v_readlane_b32 s55, v32, 11
; VI-NEXT:    v_readlane_b32 s54, v32, 10
; VI-NEXT:    v_readlane_b32 s53, v32, 9
; VI-NEXT:    v_readlane_b32 s52, v32, 8
; VI-NEXT:    v_readlane_b32 s51, v32, 7
; VI-NEXT:    v_readlane_b32 s50, v32, 6
; VI-NEXT:    v_readlane_b32 s49, v32, 5
; VI-NEXT:    v_readlane_b32 s48, v32, 4
; VI-NEXT:    v_readlane_b32 s39, v32, 3
; VI-NEXT:    v_readlane_b32 s38, v32, 2
; VI-NEXT:    v_readlane_b32 s37, v32, 1
; VI-NEXT:    v_readlane_b32 s36, v32, 0
; VI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v28f32_to_v14f64_scalar:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    s_mov_b64 exec, s[4:5]
; GFX9-NEXT:    v_writelane_b32 v32, s36, 0
; GFX9-NEXT:    v_writelane_b32 v32, s37, 1
; GFX9-NEXT:    v_writelane_b32 v32, s38, 2
; GFX9-NEXT:    v_writelane_b32 v32, s39, 3
; GFX9-NEXT:    v_writelane_b32 v32, s48, 4
; GFX9-NEXT:    v_writelane_b32 v32, s49, 5
; GFX9-NEXT:    v_writelane_b32 v32, s50, 6
; GFX9-NEXT:    v_writelane_b32 v32, s51, 7
; GFX9-NEXT:    v_writelane_b32 v32, s52, 8
; GFX9-NEXT:    v_writelane_b32 v32, s53, 9
; GFX9-NEXT:    v_writelane_b32 v32, s54, 10
; GFX9-NEXT:    v_writelane_b32 v32, s55, 11
; GFX9-NEXT:    v_readfirstlane_b32 s4, v14
; GFX9-NEXT:    s_mov_b32 s49, s29
; GFX9-NEXT:    s_mov_b32 s48, s28
; GFX9-NEXT:    s_mov_b32 s47, s27
; GFX9-NEXT:    s_mov_b32 s46, s26
; GFX9-NEXT:    s_mov_b32 s45, s25
; GFX9-NEXT:    s_mov_b32 s44, s24
; GFX9-NEXT:    s_mov_b32 s43, s23
; GFX9-NEXT:    s_mov_b32 s42, s22
; GFX9-NEXT:    s_mov_b32 s41, s21
; GFX9-NEXT:    s_mov_b32 s40, s20
; GFX9-NEXT:    s_mov_b32 s39, s19
; GFX9-NEXT:    s_mov_b32 s38, s18
; GFX9-NEXT:    s_mov_b32 s37, s17
; GFX9-NEXT:    s_mov_b32 s36, s16
; GFX9-NEXT:    v_readfirstlane_b32 s63, v13
; GFX9-NEXT:    v_readfirstlane_b32 s62, v12
; GFX9-NEXT:    v_readfirstlane_b32 s61, v11
; GFX9-NEXT:    v_readfirstlane_b32 s60, v10
; GFX9-NEXT:    v_readfirstlane_b32 s59, v9
; GFX9-NEXT:    v_readfirstlane_b32 s58, v8
; GFX9-NEXT:    v_readfirstlane_b32 s57, v7
; GFX9-NEXT:    v_readfirstlane_b32 s56, v6
; GFX9-NEXT:    v_readfirstlane_b32 s55, v5
; GFX9-NEXT:    v_readfirstlane_b32 s54, v4
; GFX9-NEXT:    v_readfirstlane_b32 s53, v3
; GFX9-NEXT:    v_readfirstlane_b32 s52, v2
; GFX9-NEXT:    v_readfirstlane_b32 s51, v1
; GFX9-NEXT:    s_cmp_lg_u32 s4, 0
; GFX9-NEXT:    v_readfirstlane_b32 s50, v0
; GFX9-NEXT:    s_cbranch_scc0 .LBB25_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    v_mov_b32_e32 v0, s36
; GFX9-NEXT:    v_mov_b32_e32 v1, s37
; GFX9-NEXT:    v_mov_b32_e32 v2, s38
; GFX9-NEXT:    v_mov_b32_e32 v3, s39
; GFX9-NEXT:    v_mov_b32_e32 v4, s40
; GFX9-NEXT:    v_mov_b32_e32 v5, s41
; GFX9-NEXT:    v_mov_b32_e32 v6, s42
; GFX9-NEXT:    v_mov_b32_e32 v7, s43
; GFX9-NEXT:    v_mov_b32_e32 v8, s44
; GFX9-NEXT:    v_mov_b32_e32 v9, s45
; GFX9-NEXT:    v_mov_b32_e32 v10, s46
; GFX9-NEXT:    v_mov_b32_e32 v11, s47
; GFX9-NEXT:    v_mov_b32_e32 v12, s48
; GFX9-NEXT:    v_mov_b32_e32 v13, s49
; GFX9-NEXT:    v_mov_b32_e32 v14, s50
; GFX9-NEXT:    v_mov_b32_e32 v15, s51
; GFX9-NEXT:    v_mov_b32_e32 v16, s52
; GFX9-NEXT:    v_mov_b32_e32 v17, s53
; GFX9-NEXT:    v_mov_b32_e32 v18, s54
; GFX9-NEXT:    v_mov_b32_e32 v19, s55
; GFX9-NEXT:    v_mov_b32_e32 v20, s56
; GFX9-NEXT:    v_mov_b32_e32 v21, s57
; GFX9-NEXT:    v_mov_b32_e32 v22, s58
; GFX9-NEXT:    v_mov_b32_e32 v23, s59
; GFX9-NEXT:    v_mov_b32_e32 v24, s60
; GFX9-NEXT:    v_mov_b32_e32 v25, s61
; GFX9-NEXT:    v_mov_b32_e32 v26, s62
; GFX9-NEXT:    v_mov_b32_e32 v27, s63
; GFX9-NEXT:    v_mov_b32_e32 v28, s64
; GFX9-NEXT:    v_mov_b32_e32 v29, s65
; GFX9-NEXT:    v_mov_b32_e32 v30, s66
; GFX9-NEXT:    v_mov_b32_e32 v31, s67
; GFX9-NEXT:    s_branch .LBB25_3
; GFX9-NEXT:  .LBB25_2: ; %cmp.true
; GFX9-NEXT:    v_add_f32_e64 v27, s63, 1.0
; GFX9-NEXT:    v_add_f32_e64 v26, s62, 1.0
; GFX9-NEXT:    v_add_f32_e64 v25, s61, 1.0
; GFX9-NEXT:    v_add_f32_e64 v24, s60, 1.0
; GFX9-NEXT:    v_add_f32_e64 v23, s59, 1.0
; GFX9-NEXT:    v_add_f32_e64 v22, s58, 1.0
; GFX9-NEXT:    v_add_f32_e64 v21, s57, 1.0
; GFX9-NEXT:    v_add_f32_e64 v20, s56, 1.0
; GFX9-NEXT:    v_add_f32_e64 v19, s55, 1.0
; GFX9-NEXT:    v_add_f32_e64 v18, s54, 1.0
; GFX9-NEXT:    v_add_f32_e64 v17, s53, 1.0
; GFX9-NEXT:    v_add_f32_e64 v16, s52, 1.0
; GFX9-NEXT:    v_add_f32_e64 v15, s51, 1.0
; GFX9-NEXT:    v_add_f32_e64 v14, s50, 1.0
; GFX9-NEXT:    v_add_f32_e64 v13, s49, 1.0
; GFX9-NEXT:    v_add_f32_e64 v12, s48, 1.0
; GFX9-NEXT:    v_add_f32_e64 v11, s47, 1.0
; GFX9-NEXT:    v_add_f32_e64 v10, s46, 1.0
; GFX9-NEXT:    v_add_f32_e64 v9, s45, 1.0
; GFX9-NEXT:    v_add_f32_e64 v8, s44, 1.0
; GFX9-NEXT:    v_add_f32_e64 v7, s43, 1.0
; GFX9-NEXT:    v_add_f32_e64 v6, s42, 1.0
; GFX9-NEXT:    v_add_f32_e64 v5, s41, 1.0
; GFX9-NEXT:    v_add_f32_e64 v4, s40, 1.0
; GFX9-NEXT:    v_add_f32_e64 v3, s39, 1.0
; GFX9-NEXT:    v_add_f32_e64 v2, s38, 1.0
; GFX9-NEXT:    v_add_f32_e64 v1, s37, 1.0
; GFX9-NEXT:    v_add_f32_e64 v0, s36, 1.0
; GFX9-NEXT:  .LBB25_3: ; %end
; GFX9-NEXT:    v_readlane_b32 s55, v32, 11
; GFX9-NEXT:    v_readlane_b32 s54, v32, 10
; GFX9-NEXT:    v_readlane_b32 s53, v32, 9
; GFX9-NEXT:    v_readlane_b32 s52, v32, 8
; GFX9-NEXT:    v_readlane_b32 s51, v32, 7
; GFX9-NEXT:    v_readlane_b32 s50, v32, 6
; GFX9-NEXT:    v_readlane_b32 s49, v32, 5
; GFX9-NEXT:    v_readlane_b32 s48, v32, 4
; GFX9-NEXT:    v_readlane_b32 s39, v32, 3
; GFX9-NEXT:    v_readlane_b32 s38, v32, 2
; GFX9-NEXT:    v_readlane_b32 s37, v32, 1
; GFX9-NEXT:    v_readlane_b32 s36, v32, 0
; GFX9-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    s_mov_b64 exec, s[4:5]
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v28f32_to_v14f64_scalar:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    s_xor_saveexec_b32 s4, -1
; GFX11-NEXT:    scratch_store_b32 off, v32, s32 ; 4-byte Folded Spill
; GFX11-NEXT:    s_mov_b32 exec_lo, s4
; GFX11-NEXT:    v_writelane_b32 v32, s36, 0
; GFX11-NEXT:    v_writelane_b32 v32, s37, 1
; GFX11-NEXT:    v_writelane_b32 v32, s38, 2
; GFX11-NEXT:    v_writelane_b32 v32, s39, 3
; GFX11-NEXT:    v_writelane_b32 v32, s48, 4
; GFX11-NEXT:    v_writelane_b32 v32, s49, 5
; GFX11-NEXT:    v_writelane_b32 v32, s50, 6
; GFX11-NEXT:    v_writelane_b32 v32, s51, 7
; GFX11-NEXT:    v_writelane_b32 v32, s52, 8
; GFX11-NEXT:    v_writelane_b32 v32, s53, 9
; GFX11-NEXT:    v_writelane_b32 v32, s54, 10
; GFX11-NEXT:    v_writelane_b32 v32, s55, 11
; GFX11-NEXT:    s_mov_b32 s36, s0
; GFX11-NEXT:    v_readfirstlane_b32 s0, v10
; GFX11-NEXT:    v_readfirstlane_b32 s63, v9
; GFX11-NEXT:    v_readfirstlane_b32 s62, v8
; GFX11-NEXT:    v_readfirstlane_b32 s61, v7
; GFX11-NEXT:    v_readfirstlane_b32 s60, v6
; GFX11-NEXT:    v_readfirstlane_b32 s59, v5
; GFX11-NEXT:    v_readfirstlane_b32 s58, v4
; GFX11-NEXT:    v_readfirstlane_b32 s57, v3
; GFX11-NEXT:    v_readfirstlane_b32 s56, v2
; GFX11-NEXT:    v_readfirstlane_b32 s55, v1
; GFX11-NEXT:    v_readfirstlane_b32 s54, v0
; GFX11-NEXT:    s_mov_b32 s53, s29
; GFX11-NEXT:    s_mov_b32 s52, s28
; GFX11-NEXT:    s_mov_b32 s51, s27
; GFX11-NEXT:    s_mov_b32 s50, s26
; GFX11-NEXT:    s_mov_b32 s49, s25
; GFX11-NEXT:    s_mov_b32 s48, s24
; GFX11-NEXT:    s_mov_b32 s47, s23
; GFX11-NEXT:    s_mov_b32 s46, s22
; GFX11-NEXT:    s_mov_b32 s45, s21
; GFX11-NEXT:    s_mov_b32 s44, s20
; GFX11-NEXT:    s_mov_b32 s43, s19
; GFX11-NEXT:    s_mov_b32 s42, s18
; GFX11-NEXT:    s_mov_b32 s41, s17
; GFX11-NEXT:    s_mov_b32 s40, s16
; GFX11-NEXT:    s_mov_b32 s39, s3
; GFX11-NEXT:    s_mov_b32 s38, s2
; GFX11-NEXT:    s_mov_b32 s37, s1
; GFX11-NEXT:    s_cmp_lg_u32 s0, 0
; GFX11-NEXT:    s_cbranch_scc0 .LBB25_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-NEXT:    v_dual_mov_b32 v0, s36 :: v_dual_mov_b32 v1, s37
; GFX11-NEXT:    v_dual_mov_b32 v2, s38 :: v_dual_mov_b32 v3, s39
; GFX11-NEXT:    v_dual_mov_b32 v4, s40 :: v_dual_mov_b32 v5, s41
; GFX11-NEXT:    v_dual_mov_b32 v6, s42 :: v_dual_mov_b32 v7, s43
; GFX11-NEXT:    v_dual_mov_b32 v8, s44 :: v_dual_mov_b32 v9, s45
; GFX11-NEXT:    v_dual_mov_b32 v10, s46 :: v_dual_mov_b32 v11, s47
; GFX11-NEXT:    v_dual_mov_b32 v12, s48 :: v_dual_mov_b32 v13, s49
; GFX11-NEXT:    v_dual_mov_b32 v14, s50 :: v_dual_mov_b32 v15, s51
; GFX11-NEXT:    v_dual_mov_b32 v16, s52 :: v_dual_mov_b32 v17, s53
; GFX11-NEXT:    v_dual_mov_b32 v18, s54 :: v_dual_mov_b32 v19, s55
; GFX11-NEXT:    v_dual_mov_b32 v20, s56 :: v_dual_mov_b32 v21, s57
; GFX11-NEXT:    v_dual_mov_b32 v22, s58 :: v_dual_mov_b32 v23, s59
; GFX11-NEXT:    v_dual_mov_b32 v24, s60 :: v_dual_mov_b32 v25, s61
; GFX11-NEXT:    v_dual_mov_b32 v26, s62 :: v_dual_mov_b32 v27, s63
; GFX11-NEXT:    v_dual_mov_b32 v28, s64 :: v_dual_mov_b32 v29, s65
; GFX11-NEXT:    v_dual_mov_b32 v30, s66 :: v_dual_mov_b32 v31, s67
; GFX11-NEXT:    s_branch .LBB25_3
; GFX11-NEXT:  .LBB25_2: ; %cmp.true
; GFX11-NEXT:    v_add_f32_e64 v27, s63, 1.0
; GFX11-NEXT:    v_add_f32_e64 v26, s62, 1.0
; GFX11-NEXT:    v_add_f32_e64 v25, s61, 1.0
; GFX11-NEXT:    v_add_f32_e64 v24, s60, 1.0
; GFX11-NEXT:    v_add_f32_e64 v23, s59, 1.0
; GFX11-NEXT:    v_add_f32_e64 v22, s58, 1.0
; GFX11-NEXT:    v_add_f32_e64 v21, s57, 1.0
; GFX11-NEXT:    v_add_f32_e64 v20, s56, 1.0
; GFX11-NEXT:    v_add_f32_e64 v19, s55, 1.0
; GFX11-NEXT:    v_add_f32_e64 v18, s54, 1.0
; GFX11-NEXT:    v_add_f32_e64 v17, s53, 1.0
; GFX11-NEXT:    v_add_f32_e64 v16, s52, 1.0
; GFX11-NEXT:    v_add_f32_e64 v15, s51, 1.0
; GFX11-NEXT:    v_add_f32_e64 v14, s50, 1.0
; GFX11-NEXT:    v_add_f32_e64 v13, s49, 1.0
; GFX11-NEXT:    v_add_f32_e64 v12, s48, 1.0
; GFX11-NEXT:    v_add_f32_e64 v11, s47, 1.0
; GFX11-NEXT:    v_add_f32_e64 v10, s46, 1.0
; GFX11-NEXT:    v_add_f32_e64 v9, s45, 1.0
; GFX11-NEXT:    v_add_f32_e64 v8, s44, 1.0
; GFX11-NEXT:    v_add_f32_e64 v7, s43, 1.0
; GFX11-NEXT:    v_add_f32_e64 v6, s42, 1.0
; GFX11-NEXT:    v_add_f32_e64 v5, s41, 1.0
; GFX11-NEXT:    v_add_f32_e64 v4, s40, 1.0
; GFX11-NEXT:    v_add_f32_e64 v3, s39, 1.0
; GFX11-NEXT:    v_add_f32_e64 v2, s38, 1.0
; GFX11-NEXT:    v_add_f32_e64 v1, s37, 1.0
; GFX11-NEXT:    v_add_f32_e64 v0, s36, 1.0
; GFX11-NEXT:  .LBB25_3: ; %end
; GFX11-NEXT:    v_readlane_b32 s55, v32, 11
; GFX11-NEXT:    v_readlane_b32 s54, v32, 10
; GFX11-NEXT:    v_readlane_b32 s53, v32, 9
; GFX11-NEXT:    v_readlane_b32 s52, v32, 8
; GFX11-NEXT:    v_readlane_b32 s51, v32, 7
; GFX11-NEXT:    v_readlane_b32 s50, v32, 6
; GFX11-NEXT:    v_readlane_b32 s49, v32, 5
; GFX11-NEXT:    v_readlane_b32 s48, v32, 4
; GFX11-NEXT:    v_readlane_b32 s39, v32, 3
; GFX11-NEXT:    v_readlane_b32 s38, v32, 2
; GFX11-NEXT:    v_readlane_b32 s37, v32, 1
; GFX11-NEXT:    v_readlane_b32 s36, v32, 0
; GFX11-NEXT:    s_xor_saveexec_b32 s0, -1
; GFX11-NEXT:    scratch_load_b32 v32, off, s32 ; 4-byte Folded Reload
; GFX11-NEXT:    s_mov_b32 exec_lo, s0
; GFX11-NEXT:    s_waitcnt vmcnt(0)
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = fadd <28 x float> %a, splat (float 1.000000e+00)
  %a2 = bitcast <28 x float> %a1 to <14 x double>
  br label %end

cmp.false:
  %a3 = bitcast <28 x float> %a to <14 x double>
  br label %end

end:
  %phi = phi <14 x double> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <14 x double> %phi
}

define <28 x float> @bitcast_v14f64_to_v28f32(<14 x double> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v14f64_to_v28f32:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB26_2
; SI-NEXT:  ; %bb.1: ; %cmp.true
; SI-NEXT:    v_add_f64 v[26:27], v[26:27], 1.0
; SI-NEXT:    v_add_f64 v[24:25], v[24:25], 1.0
; SI-NEXT:    v_add_f64 v[22:23], v[22:23], 1.0
; SI-NEXT:    v_add_f64 v[20:21], v[20:21], 1.0
; SI-NEXT:    v_add_f64 v[18:19], v[18:19], 1.0
; SI-NEXT:    v_add_f64 v[16:17], v[16:17], 1.0
; SI-NEXT:    v_add_f64 v[14:15], v[14:15], 1.0
; SI-NEXT:    v_add_f64 v[12:13], v[12:13], 1.0
; SI-NEXT:    v_add_f64 v[10:11], v[10:11], 1.0
; SI-NEXT:    v_add_f64 v[8:9], v[8:9], 1.0
; SI-NEXT:    v_add_f64 v[6:7], v[6:7], 1.0
; SI-NEXT:    v_add_f64 v[4:5], v[4:5], 1.0
; SI-NEXT:    v_add_f64 v[2:3], v[2:3], 1.0
; SI-NEXT:    v_add_f64 v[0:1], v[0:1], 1.0
; SI-NEXT:  .LBB26_2: ; %end
; SI-NEXT:    s_or_b64 exec, exec, s[4:5]
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v14f64_to_v28f32:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB26_2
; VI-NEXT:  ; %bb.1: ; %cmp.true
; VI-NEXT:    v_add_f64 v[26:27], v[26:27], 1.0
; VI-NEXT:    v_add_f64 v[24:25], v[24:25], 1.0
; VI-NEXT:    v_add_f64 v[22:23], v[22:23], 1.0
; VI-NEXT:    v_add_f64 v[20:21], v[20:21], 1.0
; VI-NEXT:    v_add_f64 v[18:19], v[18:19], 1.0
; VI-NEXT:    v_add_f64 v[16:17], v[16:17], 1.0
; VI-NEXT:    v_add_f64 v[14:15], v[14:15], 1.0
; VI-NEXT:    v_add_f64 v[12:13], v[12:13], 1.0
; VI-NEXT:    v_add_f64 v[10:11], v[10:11], 1.0
; VI-NEXT:    v_add_f64 v[8:9], v[8:9], 1.0
; VI-NEXT:    v_add_f64 v[6:7], v[6:7], 1.0
; VI-NEXT:    v_add_f64 v[4:5], v[4:5], 1.0
; VI-NEXT:    v_add_f64 v[2:3], v[2:3], 1.0
; VI-NEXT:    v_add_f64 v[0:1], v[0:1], 1.0
; VI-NEXT:  .LBB26_2: ; %end
; VI-NEXT:    s_or_b64 exec, exec, s[4:5]
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v14f64_to_v28f32:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB26_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.true
; GFX9-NEXT:    v_add_f64 v[26:27], v[26:27], 1.0
; GFX9-NEXT:    v_add_f64 v[24:25], v[24:25], 1.0
; GFX9-NEXT:    v_add_f64 v[22:23], v[22:23], 1.0
; GFX9-NEXT:    v_add_f64 v[20:21], v[20:21], 1.0
; GFX9-NEXT:    v_add_f64 v[18:19], v[18:19], 1.0
; GFX9-NEXT:    v_add_f64 v[16:17], v[16:17], 1.0
; GFX9-NEXT:    v_add_f64 v[14:15], v[14:15], 1.0
; GFX9-NEXT:    v_add_f64 v[12:13], v[12:13], 1.0
; GFX9-NEXT:    v_add_f64 v[10:11], v[10:11], 1.0
; GFX9-NEXT:    v_add_f64 v[8:9], v[8:9], 1.0
; GFX9-NEXT:    v_add_f64 v[6:7], v[6:7], 1.0
; GFX9-NEXT:    v_add_f64 v[4:5], v[4:5], 1.0
; GFX9-NEXT:    v_add_f64 v[2:3], v[2:3], 1.0
; GFX9-NEXT:    v_add_f64 v[0:1], v[0:1], 1.0
; GFX9-NEXT:  .LBB26_2: ; %end
; GFX9-NEXT:    s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v14f64_to_v28f32:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-NEXT:    s_cbranch_execz .LBB26_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-NEXT:    v_add_f64 v[26:27], v[26:27], 1.0
; GFX11-NEXT:    v_add_f64 v[24:25], v[24:25], 1.0
; GFX11-NEXT:    v_add_f64 v[22:23], v[22:23], 1.0
; GFX11-NEXT:    v_add_f64 v[20:21], v[20:21], 1.0
; GFX11-NEXT:    v_add_f64 v[18:19], v[18:19], 1.0
; GFX11-NEXT:    v_add_f64 v[16:17], v[16:17], 1.0
; GFX11-NEXT:    v_add_f64 v[14:15], v[14:15], 1.0
; GFX11-NEXT:    v_add_f64 v[12:13], v[12:13], 1.0
; GFX11-NEXT:    v_add_f64 v[10:11], v[10:11], 1.0
; GFX11-NEXT:    v_add_f64 v[8:9], v[8:9], 1.0
; GFX11-NEXT:    v_add_f64 v[6:7], v[6:7], 1.0
; GFX11-NEXT:    v_add_f64 v[4:5], v[4:5], 1.0
; GFX11-NEXT:    v_add_f64 v[2:3], v[2:3], 1.0
; GFX11-NEXT:    v_add_f64 v[0:1], v[0:1], 1.0
; GFX11-NEXT:  .LBB26_2: ; %end
; GFX11-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = fadd <14 x double> %a, splat (double 1.000000e+00)
  %a2 = bitcast <14 x double> %a1 to <28 x float>
  br label %end

cmp.false:
  %a3 = bitcast <14 x double> %a to <28 x float>
  br label %end

end:
  %phi = phi <28 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <28 x float> %phi
}

define inreg <28 x float> @bitcast_v14f64_to_v28f32_scalar(<14 x double> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v14f64_to_v28f32_scalar:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_writelane_b32 v32, s36, 0
; SI-NEXT:    v_writelane_b32 v32, s37, 1
; SI-NEXT:    v_writelane_b32 v32, s38, 2
; SI-NEXT:    v_writelane_b32 v32, s39, 3
; SI-NEXT:    v_writelane_b32 v32, s48, 4
; SI-NEXT:    v_writelane_b32 v32, s49, 5
; SI-NEXT:    v_writelane_b32 v32, s50, 6
; SI-NEXT:    v_writelane_b32 v32, s51, 7
; SI-NEXT:    v_writelane_b32 v32, s52, 8
; SI-NEXT:    v_writelane_b32 v32, s53, 9
; SI-NEXT:    v_writelane_b32 v32, s54, 10
; SI-NEXT:    v_writelane_b32 v32, s55, 11
; SI-NEXT:    v_readfirstlane_b32 s4, v14
; SI-NEXT:    s_mov_b32 s49, s29
; SI-NEXT:    s_mov_b32 s48, s28
; SI-NEXT:    s_mov_b32 s47, s27
; SI-NEXT:    s_mov_b32 s46, s26
; SI-NEXT:    s_mov_b32 s45, s25
; SI-NEXT:    s_mov_b32 s44, s24
; SI-NEXT:    s_mov_b32 s43, s23
; SI-NEXT:    s_mov_b32 s42, s22
; SI-NEXT:    s_mov_b32 s41, s21
; SI-NEXT:    s_mov_b32 s40, s20
; SI-NEXT:    s_mov_b32 s39, s19
; SI-NEXT:    s_mov_b32 s38, s18
; SI-NEXT:    s_mov_b32 s37, s17
; SI-NEXT:    s_mov_b32 s36, s16
; SI-NEXT:    v_readfirstlane_b32 s63, v13
; SI-NEXT:    v_readfirstlane_b32 s62, v12
; SI-NEXT:    v_readfirstlane_b32 s61, v11
; SI-NEXT:    v_readfirstlane_b32 s60, v10
; SI-NEXT:    v_readfirstlane_b32 s59, v9
; SI-NEXT:    v_readfirstlane_b32 s58, v8
; SI-NEXT:    v_readfirstlane_b32 s57, v7
; SI-NEXT:    v_readfirstlane_b32 s56, v6
; SI-NEXT:    v_readfirstlane_b32 s55, v5
; SI-NEXT:    v_readfirstlane_b32 s54, v4
; SI-NEXT:    v_readfirstlane_b32 s53, v3
; SI-NEXT:    v_readfirstlane_b32 s52, v2
; SI-NEXT:    v_readfirstlane_b32 s51, v1
; SI-NEXT:    s_cmp_lg_u32 s4, 0
; SI-NEXT:    v_readfirstlane_b32 s50, v0
; SI-NEXT:    s_cbranch_scc0 .LBB27_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    v_mov_b32_e32 v0, s36
; SI-NEXT:    v_mov_b32_e32 v1, s37
; SI-NEXT:    v_mov_b32_e32 v2, s38
; SI-NEXT:    v_mov_b32_e32 v3, s39
; SI-NEXT:    v_mov_b32_e32 v4, s40
; SI-NEXT:    v_mov_b32_e32 v5, s41
; SI-NEXT:    v_mov_b32_e32 v6, s42
; SI-NEXT:    v_mov_b32_e32 v7, s43
; SI-NEXT:    v_mov_b32_e32 v8, s44
; SI-NEXT:    v_mov_b32_e32 v9, s45
; SI-NEXT:    v_mov_b32_e32 v10, s46
; SI-NEXT:    v_mov_b32_e32 v11, s47
; SI-NEXT:    v_mov_b32_e32 v12, s48
; SI-NEXT:    v_mov_b32_e32 v13, s49
; SI-NEXT:    v_mov_b32_e32 v14, s50
; SI-NEXT:    v_mov_b32_e32 v15, s51
; SI-NEXT:    v_mov_b32_e32 v16, s52
; SI-NEXT:    v_mov_b32_e32 v17, s53
; SI-NEXT:    v_mov_b32_e32 v18, s54
; SI-NEXT:    v_mov_b32_e32 v19, s55
; SI-NEXT:    v_mov_b32_e32 v20, s56
; SI-NEXT:    v_mov_b32_e32 v21, s57
; SI-NEXT:    v_mov_b32_e32 v22, s58
; SI-NEXT:    v_mov_b32_e32 v23, s59
; SI-NEXT:    v_mov_b32_e32 v24, s60
; SI-NEXT:    v_mov_b32_e32 v25, s61
; SI-NEXT:    v_mov_b32_e32 v26, s62
; SI-NEXT:    v_mov_b32_e32 v27, s63
; SI-NEXT:    v_mov_b32_e32 v28, s64
; SI-NEXT:    v_mov_b32_e32 v29, s65
; SI-NEXT:    v_mov_b32_e32 v30, s66
; SI-NEXT:    v_mov_b32_e32 v31, s67
; SI-NEXT:    s_branch .LBB27_3
; SI-NEXT:  .LBB27_2: ; %cmp.true
; SI-NEXT:    v_add_f64 v[26:27], s[62:63], 1.0
; SI-NEXT:    v_add_f64 v[24:25], s[60:61], 1.0
; SI-NEXT:    v_add_f64 v[22:23], s[58:59], 1.0
; SI-NEXT:    v_add_f64 v[20:21], s[56:57], 1.0
; SI-NEXT:    v_add_f64 v[18:19], s[54:55], 1.0
; SI-NEXT:    v_add_f64 v[16:17], s[52:53], 1.0
; SI-NEXT:    v_add_f64 v[14:15], s[50:51], 1.0
; SI-NEXT:    v_add_f64 v[12:13], s[48:49], 1.0
; SI-NEXT:    v_add_f64 v[10:11], s[46:47], 1.0
; SI-NEXT:    v_add_f64 v[8:9], s[44:45], 1.0
; SI-NEXT:    v_add_f64 v[6:7], s[42:43], 1.0
; SI-NEXT:    v_add_f64 v[4:5], s[40:41], 1.0
; SI-NEXT:    v_add_f64 v[2:3], s[38:39], 1.0
; SI-NEXT:    v_add_f64 v[0:1], s[36:37], 1.0
; SI-NEXT:  .LBB27_3: ; %end
; SI-NEXT:    v_readlane_b32 s55, v32, 11
; SI-NEXT:    v_readlane_b32 s54, v32, 10
; SI-NEXT:    v_readlane_b32 s53, v32, 9
; SI-NEXT:    v_readlane_b32 s52, v32, 8
; SI-NEXT:    v_readlane_b32 s51, v32, 7
; SI-NEXT:    v_readlane_b32 s50, v32, 6
; SI-NEXT:    v_readlane_b32 s49, v32, 5
; SI-NEXT:    v_readlane_b32 s48, v32, 4
; SI-NEXT:    v_readlane_b32 s39, v32, 3
; SI-NEXT:    v_readlane_b32 s38, v32, 2
; SI-NEXT:    v_readlane_b32 s37, v32, 1
; SI-NEXT:    v_readlane_b32 s36, v32, 0
; SI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v14f64_to_v28f32_scalar:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    v_writelane_b32 v32, s36, 0
; VI-NEXT:    v_writelane_b32 v32, s37, 1
; VI-NEXT:    v_writelane_b32 v32, s38, 2
; VI-NEXT:    v_writelane_b32 v32, s39, 3
; VI-NEXT:    v_writelane_b32 v32, s48, 4
; VI-NEXT:    v_writelane_b32 v32, s49, 5
; VI-NEXT:    v_writelane_b32 v32, s50, 6
; VI-NEXT:    v_writelane_b32 v32, s51, 7
; VI-NEXT:    v_writelane_b32 v32, s52, 8
; VI-NEXT:    v_writelane_b32 v32, s53, 9
; VI-NEXT:    v_writelane_b32 v32, s54, 10
; VI-NEXT:    v_writelane_b32 v32, s55, 11
; VI-NEXT:    v_readfirstlane_b32 s4, v14
; VI-NEXT:    s_mov_b32 s49, s29
; VI-NEXT:    s_mov_b32 s48, s28
; VI-NEXT:    s_mov_b32 s47, s27
; VI-NEXT:    s_mov_b32 s46, s26
; VI-NEXT:    s_mov_b32 s45, s25
; VI-NEXT:    s_mov_b32 s44, s24
; VI-NEXT:    s_mov_b32 s43, s23
; VI-NEXT:    s_mov_b32 s42, s22
; VI-NEXT:    s_mov_b32 s41, s21
; VI-NEXT:    s_mov_b32 s40, s20
; VI-NEXT:    s_mov_b32 s39, s19
; VI-NEXT:    s_mov_b32 s38, s18
; VI-NEXT:    s_mov_b32 s37, s17
; VI-NEXT:    s_mov_b32 s36, s16
; VI-NEXT:    v_readfirstlane_b32 s63, v13
; VI-NEXT:    v_readfirstlane_b32 s62, v12
; VI-NEXT:    v_readfirstlane_b32 s61, v11
; VI-NEXT:    v_readfirstlane_b32 s60, v10
; VI-NEXT:    v_readfirstlane_b32 s59, v9
; VI-NEXT:    v_readfirstlane_b32 s58, v8
; VI-NEXT:    v_readfirstlane_b32 s57, v7
; VI-NEXT:    v_readfirstlane_b32 s56, v6
; VI-NEXT:    v_readfirstlane_b32 s55, v5
; VI-NEXT:    v_readfirstlane_b32 s54, v4
; VI-NEXT:    v_readfirstlane_b32 s53, v3
; VI-NEXT:    v_readfirstlane_b32 s52, v2
; VI-NEXT:    v_readfirstlane_b32 s51, v1
; VI-NEXT:    s_cmp_lg_u32 s4, 0
; VI-NEXT:    v_readfirstlane_b32 s50, v0
; VI-NEXT:    s_cbranch_scc0 .LBB27_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    v_mov_b32_e32 v0, s36
; VI-NEXT:    v_mov_b32_e32 v1, s37
; VI-NEXT:    v_mov_b32_e32 v2, s38
; VI-NEXT:    v_mov_b32_e32 v3, s39
; VI-NEXT:    v_mov_b32_e32 v4, s40
; VI-NEXT:    v_mov_b32_e32 v5, s41
; VI-NEXT:    v_mov_b32_e32 v6, s42
; VI-NEXT:    v_mov_b32_e32 v7, s43
; VI-NEXT:    v_mov_b32_e32 v8, s44
; VI-NEXT:    v_mov_b32_e32 v9, s45
; VI-NEXT:    v_mov_b32_e32 v10, s46
; VI-NEXT:    v_mov_b32_e32 v11, s47
; VI-NEXT:    v_mov_b32_e32 v12, s48
; VI-NEXT:    v_mov_b32_e32 v13, s49
; VI-NEXT:    v_mov_b32_e32 v14, s50
; VI-NEXT:    v_mov_b32_e32 v15, s51
; VI-NEXT:    v_mov_b32_e32 v16, s52
; VI-NEXT:    v_mov_b32_e32 v17, s53
; VI-NEXT:    v_mov_b32_e32 v18, s54
; VI-NEXT:    v_mov_b32_e32 v19, s55
; VI-NEXT:    v_mov_b32_e32 v20, s56
; VI-NEXT:    v_mov_b32_e32 v21, s57
; VI-NEXT:    v_mov_b32_e32 v22, s58
; VI-NEXT:    v_mov_b32_e32 v23, s59
; VI-NEXT:    v_mov_b32_e32 v24, s60
; VI-NEXT:    v_mov_b32_e32 v25, s61
; VI-NEXT:    v_mov_b32_e32 v26, s62
; VI-NEXT:    v_mov_b32_e32 v27, s63
; VI-NEXT:    v_mov_b32_e32 v28, s64
; VI-NEXT:    v_mov_b32_e32 v29, s65
; VI-NEXT:    v_mov_b32_e32 v30, s66
; VI-NEXT:    v_mov_b32_e32 v31, s67
; VI-NEXT:    s_branch .LBB27_3
; VI-NEXT:  .LBB27_2: ; %cmp.true
; VI-NEXT:    v_add_f64 v[26:27], s[62:63], 1.0
; VI-NEXT:    v_add_f64 v[24:25], s[60:61], 1.0
; VI-NEXT:    v_add_f64 v[22:23], s[58:59], 1.0
; VI-NEXT:    v_add_f64 v[20:21], s[56:57], 1.0
; VI-NEXT:    v_add_f64 v[18:19], s[54:55], 1.0
; VI-NEXT:    v_add_f64 v[16:17], s[52:53], 1.0
; VI-NEXT:    v_add_f64 v[14:15], s[50:51], 1.0
; VI-NEXT:    v_add_f64 v[12:13], s[48:49], 1.0
; VI-NEXT:    v_add_f64 v[10:11], s[46:47], 1.0
; VI-NEXT:    v_add_f64 v[8:9], s[44:45], 1.0
; VI-NEXT:    v_add_f64 v[6:7], s[42:43], 1.0
; VI-NEXT:    v_add_f64 v[4:5], s[40:41], 1.0
; VI-NEXT:    v_add_f64 v[2:3], s[38:39], 1.0
; VI-NEXT:    v_add_f64 v[0:1], s[36:37], 1.0
; VI-NEXT:  .LBB27_3: ; %end
; VI-NEXT:    v_readlane_b32 s55, v32, 11
; VI-NEXT:    v_readlane_b32 s54, v32, 10
; VI-NEXT:    v_readlane_b32 s53, v32, 9
; VI-NEXT:    v_readlane_b32 s52, v32, 8
; VI-NEXT:    v_readlane_b32 s51, v32, 7
; VI-NEXT:    v_readlane_b32 s50, v32, 6
; VI-NEXT:    v_readlane_b32 s49, v32, 5
; VI-NEXT:    v_readlane_b32 s48, v32, 4
; VI-NEXT:    v_readlane_b32 s39, v32, 3
; VI-NEXT:    v_readlane_b32 s38, v32, 2
; VI-NEXT:    v_readlane_b32 s37, v32, 1
; VI-NEXT:    v_readlane_b32 s36, v32, 0
; VI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v14f64_to_v28f32_scalar:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    s_mov_b64 exec, s[4:5]
; GFX9-NEXT:    v_writelane_b32 v32, s36, 0
; GFX9-NEXT:    v_writelane_b32 v32, s37, 1
; GFX9-NEXT:    v_writelane_b32 v32, s38, 2
; GFX9-NEXT:    v_writelane_b32 v32, s39, 3
; GFX9-NEXT:    v_writelane_b32 v32, s48, 4
; GFX9-NEXT:    v_writelane_b32 v32, s49, 5
; GFX9-NEXT:    v_writelane_b32 v32, s50, 6
; GFX9-NEXT:    v_writelane_b32 v32, s51, 7
; GFX9-NEXT:    v_writelane_b32 v32, s52, 8
; GFX9-NEXT:    v_writelane_b32 v32, s53, 9
; GFX9-NEXT:    v_writelane_b32 v32, s54, 10
; GFX9-NEXT:    v_writelane_b32 v32, s55, 11
; GFX9-NEXT:    v_readfirstlane_b32 s4, v14
; GFX9-NEXT:    s_mov_b32 s49, s29
; GFX9-NEXT:    s_mov_b32 s48, s28
; GFX9-NEXT:    s_mov_b32 s47, s27
; GFX9-NEXT:    s_mov_b32 s46, s26
; GFX9-NEXT:    s_mov_b32 s45, s25
; GFX9-NEXT:    s_mov_b32 s44, s24
; GFX9-NEXT:    s_mov_b32 s43, s23
; GFX9-NEXT:    s_mov_b32 s42, s22
; GFX9-NEXT:    s_mov_b32 s41, s21
; GFX9-NEXT:    s_mov_b32 s40, s20
; GFX9-NEXT:    s_mov_b32 s39, s19
; GFX9-NEXT:    s_mov_b32 s38, s18
; GFX9-NEXT:    s_mov_b32 s37, s17
; GFX9-NEXT:    s_mov_b32 s36, s16
; GFX9-NEXT:    v_readfirstlane_b32 s63, v13
; GFX9-NEXT:    v_readfirstlane_b32 s62, v12
; GFX9-NEXT:    v_readfirstlane_b32 s61, v11
; GFX9-NEXT:    v_readfirstlane_b32 s60, v10
; GFX9-NEXT:    v_readfirstlane_b32 s59, v9
; GFX9-NEXT:    v_readfirstlane_b32 s58, v8
; GFX9-NEXT:    v_readfirstlane_b32 s57, v7
; GFX9-NEXT:    v_readfirstlane_b32 s56, v6
; GFX9-NEXT:    v_readfirstlane_b32 s55, v5
; GFX9-NEXT:    v_readfirstlane_b32 s54, v4
; GFX9-NEXT:    v_readfirstlane_b32 s53, v3
; GFX9-NEXT:    v_readfirstlane_b32 s52, v2
; GFX9-NEXT:    v_readfirstlane_b32 s51, v1
; GFX9-NEXT:    s_cmp_lg_u32 s4, 0
; GFX9-NEXT:    v_readfirstlane_b32 s50, v0
; GFX9-NEXT:    s_cbranch_scc0 .LBB27_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    v_mov_b32_e32 v0, s36
; GFX9-NEXT:    v_mov_b32_e32 v1, s37
; GFX9-NEXT:    v_mov_b32_e32 v2, s38
; GFX9-NEXT:    v_mov_b32_e32 v3, s39
; GFX9-NEXT:    v_mov_b32_e32 v4, s40
; GFX9-NEXT:    v_mov_b32_e32 v5, s41
; GFX9-NEXT:    v_mov_b32_e32 v6, s42
; GFX9-NEXT:    v_mov_b32_e32 v7, s43
; GFX9-NEXT:    v_mov_b32_e32 v8, s44
; GFX9-NEXT:    v_mov_b32_e32 v9, s45
; GFX9-NEXT:    v_mov_b32_e32 v10, s46
; GFX9-NEXT:    v_mov_b32_e32 v11, s47
; GFX9-NEXT:    v_mov_b32_e32 v12, s48
; GFX9-NEXT:    v_mov_b32_e32 v13, s49
; GFX9-NEXT:    v_mov_b32_e32 v14, s50
; GFX9-NEXT:    v_mov_b32_e32 v15, s51
; GFX9-NEXT:    v_mov_b32_e32 v16, s52
; GFX9-NEXT:    v_mov_b32_e32 v17, s53
; GFX9-NEXT:    v_mov_b32_e32 v18, s54
; GFX9-NEXT:    v_mov_b32_e32 v19, s55
; GFX9-NEXT:    v_mov_b32_e32 v20, s56
; GFX9-NEXT:    v_mov_b32_e32 v21, s57
; GFX9-NEXT:    v_mov_b32_e32 v22, s58
; GFX9-NEXT:    v_mov_b32_e32 v23, s59
; GFX9-NEXT:    v_mov_b32_e32 v24, s60
; GFX9-NEXT:    v_mov_b32_e32 v25, s61
; GFX9-NEXT:    v_mov_b32_e32 v26, s62
; GFX9-NEXT:    v_mov_b32_e32 v27, s63
; GFX9-NEXT:    v_mov_b32_e32 v28, s64
; GFX9-NEXT:    v_mov_b32_e32 v29, s65
; GFX9-NEXT:    v_mov_b32_e32 v30, s66
; GFX9-NEXT:    v_mov_b32_e32 v31, s67
; GFX9-NEXT:    s_branch .LBB27_3
; GFX9-NEXT:  .LBB27_2: ; %cmp.true
; GFX9-NEXT:    v_add_f64 v[26:27], s[62:63], 1.0
; GFX9-NEXT:    v_add_f64 v[24:25], s[60:61], 1.0
; GFX9-NEXT:    v_add_f64 v[22:23], s[58:59], 1.0
; GFX9-NEXT:    v_add_f64 v[20:21], s[56:57], 1.0
; GFX9-NEXT:    v_add_f64 v[18:19], s[54:55], 1.0
; GFX9-NEXT:    v_add_f64 v[16:17], s[52:53], 1.0
; GFX9-NEXT:    v_add_f64 v[14:15], s[50:51], 1.0
; GFX9-NEXT:    v_add_f64 v[12:13], s[48:49], 1.0
; GFX9-NEXT:    v_add_f64 v[10:11], s[46:47], 1.0
; GFX9-NEXT:    v_add_f64 v[8:9], s[44:45], 1.0
; GFX9-NEXT:    v_add_f64 v[6:7], s[42:43], 1.0
; GFX9-NEXT:    v_add_f64 v[4:5], s[40:41], 1.0
; GFX9-NEXT:    v_add_f64 v[2:3], s[38:39], 1.0
; GFX9-NEXT:    v_add_f64 v[0:1], s[36:37], 1.0
; GFX9-NEXT:  .LBB27_3: ; %end
; GFX9-NEXT:    v_readlane_b32 s55, v32, 11
; GFX9-NEXT:    v_readlane_b32 s54, v32, 10
; GFX9-NEXT:    v_readlane_b32 s53, v32, 9
; GFX9-NEXT:    v_readlane_b32 s52, v32, 8
; GFX9-NEXT:    v_readlane_b32 s51, v32, 7
; GFX9-NEXT:    v_readlane_b32 s50, v32, 6
; GFX9-NEXT:    v_readlane_b32 s49, v32, 5
; GFX9-NEXT:    v_readlane_b32 s48, v32, 4
; GFX9-NEXT:    v_readlane_b32 s39, v32, 3
; GFX9-NEXT:    v_readlane_b32 s38, v32, 2
; GFX9-NEXT:    v_readlane_b32 s37, v32, 1
; GFX9-NEXT:    v_readlane_b32 s36, v32, 0
; GFX9-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    s_mov_b64 exec, s[4:5]
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v14f64_to_v28f32_scalar:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    s_xor_saveexec_b32 s4, -1
; GFX11-NEXT:    scratch_store_b32 off, v32, s32 ; 4-byte Folded Spill
; GFX11-NEXT:    s_mov_b32 exec_lo, s4
; GFX11-NEXT:    v_writelane_b32 v32, s36, 0
; GFX11-NEXT:    v_writelane_b32 v32, s37, 1
; GFX11-NEXT:    v_writelane_b32 v32, s38, 2
; GFX11-NEXT:    v_writelane_b32 v32, s39, 3
; GFX11-NEXT:    v_writelane_b32 v32, s48, 4
; GFX11-NEXT:    v_writelane_b32 v32, s49, 5
; GFX11-NEXT:    v_writelane_b32 v32, s50, 6
; GFX11-NEXT:    v_writelane_b32 v32, s51, 7
; GFX11-NEXT:    v_writelane_b32 v32, s52, 8
; GFX11-NEXT:    v_writelane_b32 v32, s53, 9
; GFX11-NEXT:    v_writelane_b32 v32, s54, 10
; GFX11-NEXT:    v_writelane_b32 v32, s55, 11
; GFX11-NEXT:    s_mov_b32 s36, s0
; GFX11-NEXT:    v_readfirstlane_b32 s0, v10
; GFX11-NEXT:    v_readfirstlane_b32 s63, v9
; GFX11-NEXT:    v_readfirstlane_b32 s62, v8
; GFX11-NEXT:    v_readfirstlane_b32 s61, v7
; GFX11-NEXT:    v_readfirstlane_b32 s60, v6
; GFX11-NEXT:    v_readfirstlane_b32 s59, v5
; GFX11-NEXT:    v_readfirstlane_b32 s58, v4
; GFX11-NEXT:    v_readfirstlane_b32 s57, v3
; GFX11-NEXT:    v_readfirstlane_b32 s56, v2
; GFX11-NEXT:    v_readfirstlane_b32 s55, v1
; GFX11-NEXT:    v_readfirstlane_b32 s54, v0
; GFX11-NEXT:    s_mov_b32 s53, s29
; GFX11-NEXT:    s_mov_b32 s52, s28
; GFX11-NEXT:    s_mov_b32 s51, s27
; GFX11-NEXT:    s_mov_b32 s50, s26
; GFX11-NEXT:    s_mov_b32 s49, s25
; GFX11-NEXT:    s_mov_b32 s48, s24
; GFX11-NEXT:    s_mov_b32 s47, s23
; GFX11-NEXT:    s_mov_b32 s46, s22
; GFX11-NEXT:    s_mov_b32 s45, s21
; GFX11-NEXT:    s_mov_b32 s44, s20
; GFX11-NEXT:    s_mov_b32 s43, s19
; GFX11-NEXT:    s_mov_b32 s42, s18
; GFX11-NEXT:    s_mov_b32 s41, s17
; GFX11-NEXT:    s_mov_b32 s40, s16
; GFX11-NEXT:    s_mov_b32 s39, s3
; GFX11-NEXT:    s_mov_b32 s38, s2
; GFX11-NEXT:    s_mov_b32 s37, s1
; GFX11-NEXT:    s_cmp_lg_u32 s0, 0
; GFX11-NEXT:    s_cbranch_scc0 .LBB27_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-NEXT:    v_dual_mov_b32 v0, s36 :: v_dual_mov_b32 v1, s37
; GFX11-NEXT:    v_dual_mov_b32 v2, s38 :: v_dual_mov_b32 v3, s39
; GFX11-NEXT:    v_dual_mov_b32 v4, s40 :: v_dual_mov_b32 v5, s41
; GFX11-NEXT:    v_dual_mov_b32 v6, s42 :: v_dual_mov_b32 v7, s43
; GFX11-NEXT:    v_dual_mov_b32 v8, s44 :: v_dual_mov_b32 v9, s45
; GFX11-NEXT:    v_dual_mov_b32 v10, s46 :: v_dual_mov_b32 v11, s47
; GFX11-NEXT:    v_dual_mov_b32 v12, s48 :: v_dual_mov_b32 v13, s49
; GFX11-NEXT:    v_dual_mov_b32 v14, s50 :: v_dual_mov_b32 v15, s51
; GFX11-NEXT:    v_dual_mov_b32 v16, s52 :: v_dual_mov_b32 v17, s53
; GFX11-NEXT:    v_dual_mov_b32 v18, s54 :: v_dual_mov_b32 v19, s55
; GFX11-NEXT:    v_dual_mov_b32 v20, s56 :: v_dual_mov_b32 v21, s57
; GFX11-NEXT:    v_dual_mov_b32 v22, s58 :: v_dual_mov_b32 v23, s59
; GFX11-NEXT:    v_dual_mov_b32 v24, s60 :: v_dual_mov_b32 v25, s61
; GFX11-NEXT:    v_dual_mov_b32 v26, s62 :: v_dual_mov_b32 v27, s63
; GFX11-NEXT:    v_dual_mov_b32 v28, s64 :: v_dual_mov_b32 v29, s65
; GFX11-NEXT:    v_dual_mov_b32 v30, s66 :: v_dual_mov_b32 v31, s67
; GFX11-NEXT:    s_branch .LBB27_3
; GFX11-NEXT:  .LBB27_2: ; %cmp.true
; GFX11-NEXT:    v_add_f64 v[26:27], s[62:63], 1.0
; GFX11-NEXT:    v_add_f64 v[24:25], s[60:61], 1.0
; GFX11-NEXT:    v_add_f64 v[22:23], s[58:59], 1.0
; GFX11-NEXT:    v_add_f64 v[20:21], s[56:57], 1.0
; GFX11-NEXT:    v_add_f64 v[18:19], s[54:55], 1.0
; GFX11-NEXT:    v_add_f64 v[16:17], s[52:53], 1.0
; GFX11-NEXT:    v_add_f64 v[14:15], s[50:51], 1.0
; GFX11-NEXT:    v_add_f64 v[12:13], s[48:49], 1.0
; GFX11-NEXT:    v_add_f64 v[10:11], s[46:47], 1.0
; GFX11-NEXT:    v_add_f64 v[8:9], s[44:45], 1.0
; GFX11-NEXT:    v_add_f64 v[6:7], s[42:43], 1.0
; GFX11-NEXT:    v_add_f64 v[4:5], s[40:41], 1.0
; GFX11-NEXT:    v_add_f64 v[2:3], s[38:39], 1.0
; GFX11-NEXT:    v_add_f64 v[0:1], s[36:37], 1.0
; GFX11-NEXT:  .LBB27_3: ; %end
; GFX11-NEXT:    v_readlane_b32 s55, v32, 11
; GFX11-NEXT:    v_readlane_b32 s54, v32, 10
; GFX11-NEXT:    v_readlane_b32 s53, v32, 9
; GFX11-NEXT:    v_readlane_b32 s52, v32, 8
; GFX11-NEXT:    v_readlane_b32 s51, v32, 7
; GFX11-NEXT:    v_readlane_b32 s50, v32, 6
; GFX11-NEXT:    v_readlane_b32 s49, v32, 5
; GFX11-NEXT:    v_readlane_b32 s48, v32, 4
; GFX11-NEXT:    v_readlane_b32 s39, v32, 3
; GFX11-NEXT:    v_readlane_b32 s38, v32, 2
; GFX11-NEXT:    v_readlane_b32 s37, v32, 1
; GFX11-NEXT:    v_readlane_b32 s36, v32, 0
; GFX11-NEXT:    s_xor_saveexec_b32 s0, -1
; GFX11-NEXT:    scratch_load_b32 v32, off, s32 ; 4-byte Folded Reload
; GFX11-NEXT:    s_mov_b32 exec_lo, s0
; GFX11-NEXT:    s_waitcnt vmcnt(0)
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = fadd <14 x double> %a, splat (double 1.000000e+00)
  %a2 = bitcast <14 x double> %a1 to <28 x float>
  br label %end

cmp.false:
  %a3 = bitcast <14 x double> %a to <28 x float>
  br label %end

end:
  %phi = phi <28 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <28 x float> %phi
}

define <56 x i16> @bitcast_v28f32_to_v56i16(<28 x float> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v28f32_to_v56i16:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT:    ; implicit-def: $vgpr40
; SI-NEXT:    ; implicit-def: $vgpr47
; SI-NEXT:    ; implicit-def: $vgpr53
; SI-NEXT:    ; implicit-def: $vgpr46
; SI-NEXT:    ; implicit-def: $vgpr51
; SI-NEXT:    ; implicit-def: $vgpr45
; SI-NEXT:    ; implicit-def: $vgpr48
; SI-NEXT:    ; implicit-def: $vgpr44
; SI-NEXT:    ; implicit-def: $vgpr38
; SI-NEXT:    ; implicit-def: $vgpr43
; SI-NEXT:    ; implicit-def: $vgpr36
; SI-NEXT:    ; implicit-def: $vgpr42
; SI-NEXT:    ; implicit-def: $vgpr35
; SI-NEXT:    ; implicit-def: $vgpr41
; SI-NEXT:    ; implicit-def: $vgpr34
; SI-NEXT:    ; implicit-def: $vgpr55
; SI-NEXT:    ; implicit-def: $vgpr33
; SI-NEXT:    ; implicit-def: $vgpr54
; SI-NEXT:    ; implicit-def: $vgpr32
; SI-NEXT:    ; implicit-def: $vgpr52
; SI-NEXT:    ; implicit-def: $vgpr31
; SI-NEXT:    ; implicit-def: $vgpr50
; SI-NEXT:    ; implicit-def: $vgpr30
; SI-NEXT:    ; implicit-def: $vgpr49
; SI-NEXT:    ; implicit-def: $vgpr29
; SI-NEXT:    ; implicit-def: $vgpr39
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr37
; SI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB28_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    v_alignbit_b32 v28, v27, v26, 16
; SI-NEXT:    v_alignbit_b32 v29, v25, v24, 16
; SI-NEXT:    v_alignbit_b32 v30, v23, v22, 16
; SI-NEXT:    v_alignbit_b32 v31, v21, v20, 16
; SI-NEXT:    v_alignbit_b32 v32, v19, v18, 16
; SI-NEXT:    v_alignbit_b32 v33, v17, v16, 16
; SI-NEXT:    v_alignbit_b32 v34, v15, v14, 16
; SI-NEXT:    v_alignbit_b32 v35, v13, v12, 16
; SI-NEXT:    v_alignbit_b32 v36, v11, v10, 16
; SI-NEXT:    v_alignbit_b32 v38, v9, v8, 16
; SI-NEXT:    v_alignbit_b32 v48, v7, v6, 16
; SI-NEXT:    v_alignbit_b32 v51, v5, v4, 16
; SI-NEXT:    v_alignbit_b32 v53, v3, v2, 16
; SI-NEXT:    v_alignbit_b32 v40, v1, v0, 16
; SI-NEXT:    v_lshrrev_b32_e32 v37, 16, v27
; SI-NEXT:    v_lshrrev_b32_e32 v39, 16, v25
; SI-NEXT:    v_lshrrev_b32_e32 v49, 16, v23
; SI-NEXT:    v_lshrrev_b32_e32 v50, 16, v21
; SI-NEXT:    v_lshrrev_b32_e32 v52, 16, v19
; SI-NEXT:    v_lshrrev_b32_e32 v54, 16, v17
; SI-NEXT:    v_lshrrev_b32_e32 v55, 16, v15
; SI-NEXT:    s_waitcnt expcnt(6)
; SI-NEXT:    v_lshrrev_b32_e32 v41, 16, v13
; SI-NEXT:    s_waitcnt expcnt(5)
; SI-NEXT:    v_lshrrev_b32_e32 v42, 16, v11
; SI-NEXT:    s_waitcnt expcnt(4)
; SI-NEXT:    v_lshrrev_b32_e32 v43, 16, v9
; SI-NEXT:    s_waitcnt expcnt(3)
; SI-NEXT:    v_lshrrev_b32_e32 v44, 16, v7
; SI-NEXT:    s_waitcnt expcnt(2)
; SI-NEXT:    v_lshrrev_b32_e32 v45, 16, v5
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v46, 16, v3
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v47, 16, v1
; SI-NEXT:  .LBB28_2: ; %Flow
; SI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB28_4
; SI-NEXT:  ; %bb.3: ; %cmp.true
; SI-NEXT:    v_add_f32_e32 v1, 1.0, v1
; SI-NEXT:    v_add_f32_e32 v0, 1.0, v0
; SI-NEXT:    v_add_f32_e32 v3, 1.0, v3
; SI-NEXT:    v_add_f32_e32 v2, 1.0, v2
; SI-NEXT:    v_add_f32_e32 v5, 1.0, v5
; SI-NEXT:    v_add_f32_e32 v4, 1.0, v4
; SI-NEXT:    v_add_f32_e32 v7, 1.0, v7
; SI-NEXT:    v_add_f32_e32 v6, 1.0, v6
; SI-NEXT:    v_add_f32_e32 v9, 1.0, v9
; SI-NEXT:    v_add_f32_e32 v8, 1.0, v8
; SI-NEXT:    v_add_f32_e32 v11, 1.0, v11
; SI-NEXT:    v_add_f32_e32 v10, 1.0, v10
; SI-NEXT:    v_add_f32_e32 v13, 1.0, v13
; SI-NEXT:    v_add_f32_e32 v12, 1.0, v12
; SI-NEXT:    v_add_f32_e32 v15, 1.0, v15
; SI-NEXT:    v_add_f32_e32 v14, 1.0, v14
; SI-NEXT:    v_add_f32_e32 v17, 1.0, v17
; SI-NEXT:    v_add_f32_e32 v16, 1.0, v16
; SI-NEXT:    v_add_f32_e32 v19, 1.0, v19
; SI-NEXT:    v_add_f32_e32 v18, 1.0, v18
; SI-NEXT:    v_add_f32_e32 v21, 1.0, v21
; SI-NEXT:    v_add_f32_e32 v20, 1.0, v20
; SI-NEXT:    v_add_f32_e32 v23, 1.0, v23
; SI-NEXT:    v_add_f32_e32 v22, 1.0, v22
; SI-NEXT:    v_add_f32_e32 v25, 1.0, v25
; SI-NEXT:    v_add_f32_e32 v24, 1.0, v24
; SI-NEXT:    v_add_f32_e32 v27, 1.0, v27
; SI-NEXT:    v_add_f32_e32 v26, 1.0, v26
; SI-NEXT:    v_alignbit_b32 v28, v27, v26, 16
; SI-NEXT:    v_alignbit_b32 v29, v25, v24, 16
; SI-NEXT:    v_alignbit_b32 v30, v23, v22, 16
; SI-NEXT:    v_alignbit_b32 v31, v21, v20, 16
; SI-NEXT:    v_alignbit_b32 v32, v19, v18, 16
; SI-NEXT:    v_alignbit_b32 v33, v17, v16, 16
; SI-NEXT:    v_alignbit_b32 v34, v15, v14, 16
; SI-NEXT:    v_alignbit_b32 v35, v13, v12, 16
; SI-NEXT:    v_alignbit_b32 v36, v11, v10, 16
; SI-NEXT:    v_alignbit_b32 v38, v9, v8, 16
; SI-NEXT:    v_alignbit_b32 v48, v7, v6, 16
; SI-NEXT:    v_alignbit_b32 v51, v5, v4, 16
; SI-NEXT:    v_alignbit_b32 v53, v3, v2, 16
; SI-NEXT:    v_alignbit_b32 v40, v1, v0, 16
; SI-NEXT:    v_lshrrev_b32_e32 v37, 16, v27
; SI-NEXT:    v_lshrrev_b32_e32 v39, 16, v25
; SI-NEXT:    v_lshrrev_b32_e32 v49, 16, v23
; SI-NEXT:    v_lshrrev_b32_e32 v50, 16, v21
; SI-NEXT:    v_lshrrev_b32_e32 v52, 16, v19
; SI-NEXT:    v_lshrrev_b32_e32 v54, 16, v17
; SI-NEXT:    v_lshrrev_b32_e32 v55, 16, v15
; SI-NEXT:    s_waitcnt expcnt(6)
; SI-NEXT:    v_lshrrev_b32_e32 v41, 16, v13
; SI-NEXT:    s_waitcnt expcnt(5)
; SI-NEXT:    v_lshrrev_b32_e32 v42, 16, v11
; SI-NEXT:    s_waitcnt expcnt(4)
; SI-NEXT:    v_lshrrev_b32_e32 v43, 16, v9
; SI-NEXT:    s_waitcnt expcnt(3)
; SI-NEXT:    v_lshrrev_b32_e32 v44, 16, v7
; SI-NEXT:    s_waitcnt expcnt(2)
; SI-NEXT:    v_lshrrev_b32_e32 v45, 16, v5
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v46, 16, v3
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v47, 16, v1
; SI-NEXT:  .LBB28_4: ; %end
; SI-NEXT:    s_or_b64 exec, exec, s[4:5]
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT:    v_lshlrev_b32_e32 v40, 16, v40
; SI-NEXT:    v_or_b32_e32 v0, v0, v40
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT:    v_lshlrev_b32_e32 v40, 16, v47
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT:    v_lshlrev_b32_e32 v53, 16, v53
; SI-NEXT:    v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT:    v_lshlrev_b32_e32 v51, 16, v51
; SI-NEXT:    v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT:    v_lshlrev_b32_e32 v48, 16, v48
; SI-NEXT:    v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT:    v_lshlrev_b32_e32 v38, 16, v38
; SI-NEXT:    v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT:    v_lshlrev_b32_e32 v36, 16, v36
; SI-NEXT:    v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; SI-NEXT:    v_or_b32_e32 v1, v1, v40
; SI-NEXT:    v_or_b32_e32 v2, v2, v53
; SI-NEXT:    v_lshlrev_b32_e32 v53, 16, v46
; SI-NEXT:    v_or_b32_e32 v4, v4, v51
; SI-NEXT:    v_lshlrev_b32_e32 v51, 16, v45
; SI-NEXT:    v_or_b32_e32 v6, v6, v48
; SI-NEXT:    v_lshlrev_b32_e32 v48, 16, v44
; SI-NEXT:    v_or_b32_e32 v8, v8, v38
; SI-NEXT:    v_lshlrev_b32_e32 v38, 16, v43
; SI-NEXT:    v_or_b32_e32 v10, v10, v36
; SI-NEXT:    v_lshlrev_b32_e32 v36, 16, v42
; SI-NEXT:    v_or_b32_e32 v12, v12, v35
; SI-NEXT:    v_lshlrev_b32_e32 v35, 16, v41
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; SI-NEXT:    v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT:    v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT:    v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; SI-NEXT:    v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT:    v_lshlrev_b32_e32 v32, 16, v32
; SI-NEXT:    v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT:    v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT:    v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; SI-NEXT:    v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; SI-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; SI-NEXT:    v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT:    v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT:    v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT:    v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT:    v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT:    v_and_b32_e32 v13, 0xffff, v13
; SI-NEXT:    v_or_b32_e32 v14, v14, v34
; SI-NEXT:    v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT:    v_lshlrev_b32_e32 v34, 16, v55
; SI-NEXT:    v_or_b32_e32 v16, v16, v33
; SI-NEXT:    v_and_b32_e32 v17, 0xffff, v17
; SI-NEXT:    v_lshlrev_b32_e32 v33, 16, v54
; SI-NEXT:    v_or_b32_e32 v18, v18, v32
; SI-NEXT:    v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT:    v_lshlrev_b32_e32 v32, 16, v52
; SI-NEXT:    v_or_b32_e32 v20, v20, v31
; SI-NEXT:    v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT:    v_lshlrev_b32_e32 v31, 16, v50
; SI-NEXT:    v_or_b32_e32 v22, v22, v30
; SI-NEXT:    v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v49
; SI-NEXT:    v_or_b32_e32 v24, v24, v29
; SI-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v39
; SI-NEXT:    v_or_b32_e32 v26, v26, v28
; SI-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v37
; SI-NEXT:    v_or_b32_e32 v3, v3, v53
; SI-NEXT:    v_or_b32_e32 v5, v5, v51
; SI-NEXT:    v_or_b32_e32 v7, v7, v48
; SI-NEXT:    v_or_b32_e32 v9, v9, v38
; SI-NEXT:    v_or_b32_e32 v11, v11, v36
; SI-NEXT:    v_or_b32_e32 v13, v13, v35
; SI-NEXT:    v_or_b32_e32 v15, v15, v34
; SI-NEXT:    v_or_b32_e32 v17, v17, v33
; SI-NEXT:    v_or_b32_e32 v19, v19, v32
; SI-NEXT:    v_or_b32_e32 v21, v21, v31
; SI-NEXT:    v_or_b32_e32 v23, v23, v30
; SI-NEXT:    v_or_b32_e32 v25, v25, v29
; SI-NEXT:    v_or_b32_e32 v27, v27, v28
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v28f32_to_v56i16:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT:    ; implicit-def: $vgpr47
; VI-NEXT:    ; implicit-def: $vgpr46
; VI-NEXT:    ; implicit-def: $vgpr45
; VI-NEXT:    ; implicit-def: $vgpr44
; VI-NEXT:    ; implicit-def: $vgpr43
; VI-NEXT:    ; implicit-def: $vgpr42
; VI-NEXT:    ; implicit-def: $vgpr41
; VI-NEXT:    ; implicit-def: $vgpr40
; VI-NEXT:    ; implicit-def: $vgpr55
; VI-NEXT:    ; implicit-def: $vgpr54
; VI-NEXT:    ; implicit-def: $vgpr53
; VI-NEXT:    ; implicit-def: $vgpr52
; VI-NEXT:    ; implicit-def: $vgpr51
; VI-NEXT:    ; implicit-def: $vgpr50
; VI-NEXT:    ; implicit-def: $vgpr49
; VI-NEXT:    ; implicit-def: $vgpr48
; VI-NEXT:    ; implicit-def: $vgpr39
; VI-NEXT:    ; implicit-def: $vgpr38
; VI-NEXT:    ; implicit-def: $vgpr37
; VI-NEXT:    ; implicit-def: $vgpr36
; VI-NEXT:    ; implicit-def: $vgpr35
; VI-NEXT:    ; implicit-def: $vgpr34
; VI-NEXT:    ; implicit-def: $vgpr33
; VI-NEXT:    ; implicit-def: $vgpr32
; VI-NEXT:    ; implicit-def: $vgpr31
; VI-NEXT:    ; implicit-def: $vgpr30
; VI-NEXT:    ; implicit-def: $vgpr29
; VI-NEXT:    ; implicit-def: $vgpr28
; VI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB28_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; VI-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; VI-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; VI-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; VI-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; VI-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; VI-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; VI-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; VI-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; VI-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; VI-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; VI-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; VI-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; VI-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; VI-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; VI-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; VI-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; VI-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; VI-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; VI-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; VI-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; VI-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; VI-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; VI-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; VI-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; VI-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; VI-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; VI-NEXT:  .LBB28_2: ; %Flow
; VI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB28_4
; VI-NEXT:  ; %bb.3: ; %cmp.true
; VI-NEXT:    v_add_f32_e32 v27, 1.0, v27
; VI-NEXT:    v_add_f32_e32 v26, 1.0, v26
; VI-NEXT:    v_add_f32_e32 v25, 1.0, v25
; VI-NEXT:    v_add_f32_e32 v24, 1.0, v24
; VI-NEXT:    v_add_f32_e32 v23, 1.0, v23
; VI-NEXT:    v_add_f32_e32 v22, 1.0, v22
; VI-NEXT:    v_add_f32_e32 v21, 1.0, v21
; VI-NEXT:    v_add_f32_e32 v20, 1.0, v20
; VI-NEXT:    v_add_f32_e32 v19, 1.0, v19
; VI-NEXT:    v_add_f32_e32 v18, 1.0, v18
; VI-NEXT:    v_add_f32_e32 v17, 1.0, v17
; VI-NEXT:    v_add_f32_e32 v16, 1.0, v16
; VI-NEXT:    v_add_f32_e32 v15, 1.0, v15
; VI-NEXT:    v_add_f32_e32 v14, 1.0, v14
; VI-NEXT:    v_add_f32_e32 v13, 1.0, v13
; VI-NEXT:    v_add_f32_e32 v12, 1.0, v12
; VI-NEXT:    v_add_f32_e32 v11, 1.0, v11
; VI-NEXT:    v_add_f32_e32 v10, 1.0, v10
; VI-NEXT:    v_add_f32_e32 v9, 1.0, v9
; VI-NEXT:    v_add_f32_e32 v8, 1.0, v8
; VI-NEXT:    v_add_f32_e32 v7, 1.0, v7
; VI-NEXT:    v_add_f32_e32 v6, 1.0, v6
; VI-NEXT:    v_add_f32_e32 v5, 1.0, v5
; VI-NEXT:    v_add_f32_e32 v4, 1.0, v4
; VI-NEXT:    v_add_f32_e32 v3, 1.0, v3
; VI-NEXT:    v_add_f32_e32 v2, 1.0, v2
; VI-NEXT:    v_add_f32_e32 v1, 1.0, v1
; VI-NEXT:    v_add_f32_e32 v0, 1.0, v0
; VI-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; VI-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; VI-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; VI-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; VI-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; VI-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; VI-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; VI-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; VI-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; VI-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; VI-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; VI-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; VI-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; VI-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; VI-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; VI-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; VI-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; VI-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; VI-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; VI-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; VI-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; VI-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; VI-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; VI-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; VI-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; VI-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; VI-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; VI-NEXT:  .LBB28_4: ; %end
; VI-NEXT:    s_or_b64 exec, exec, s[4:5]
; VI-NEXT:    v_lshlrev_b32_e32 v47, 16, v47
; VI-NEXT:    v_lshlrev_b32_e32 v46, 16, v46
; VI-NEXT:    v_lshlrev_b32_e32 v45, 16, v45
; VI-NEXT:    v_lshlrev_b32_e32 v44, 16, v44
; VI-NEXT:    v_lshlrev_b32_e32 v43, 16, v43
; VI-NEXT:    v_lshlrev_b32_e32 v42, 16, v42
; VI-NEXT:    v_lshlrev_b32_e32 v41, 16, v41
; VI-NEXT:    v_lshlrev_b32_e32 v40, 16, v40
; VI-NEXT:    v_or_b32_sdwa v0, v0, v47 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v1, v1, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v2, v2, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v3, v3, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v4, v4, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v5, v5, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v6, v6, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v7, v7, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; VI-NEXT:    v_lshlrev_b32_e32 v55, 16, v55
; VI-NEXT:    v_lshlrev_b32_e32 v54, 16, v54
; VI-NEXT:    v_lshlrev_b32_e32 v53, 16, v53
; VI-NEXT:    v_lshlrev_b32_e32 v52, 16, v52
; VI-NEXT:    v_lshlrev_b32_e32 v51, 16, v51
; VI-NEXT:    v_lshlrev_b32_e32 v50, 16, v50
; VI-NEXT:    v_lshlrev_b32_e32 v49, 16, v49
; VI-NEXT:    v_lshlrev_b32_e32 v48, 16, v48
; VI-NEXT:    v_lshlrev_b32_e32 v39, 16, v39
; VI-NEXT:    v_lshlrev_b32_e32 v38, 16, v38
; VI-NEXT:    v_lshlrev_b32_e32 v37, 16, v37
; VI-NEXT:    v_lshlrev_b32_e32 v36, 16, v36
; VI-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v34
; VI-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; VI-NEXT:    v_lshlrev_b32_e32 v32, 16, v32
; VI-NEXT:    v_lshlrev_b32_e32 v31, 16, v31
; VI-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; VI-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; VI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; VI-NEXT:    v_or_b32_sdwa v8, v8, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v9, v9, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v10, v10, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v11, v11, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v12, v12, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v13, v13, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v14, v14, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v15, v15, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v16, v16, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v17, v17, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v18, v18, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v19, v19, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v20, v20, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v21, v21, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v22, v22, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v23, v23, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v24, v24, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v25, v25, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v26, v26, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v28f32_to_v56i16:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT:    ; implicit-def: $vgpr47
; GFX9-NEXT:    ; implicit-def: $vgpr46
; GFX9-NEXT:    ; implicit-def: $vgpr45
; GFX9-NEXT:    ; implicit-def: $vgpr44
; GFX9-NEXT:    ; implicit-def: $vgpr43
; GFX9-NEXT:    ; implicit-def: $vgpr42
; GFX9-NEXT:    ; implicit-def: $vgpr41
; GFX9-NEXT:    ; implicit-def: $vgpr40
; GFX9-NEXT:    ; implicit-def: $vgpr55
; GFX9-NEXT:    ; implicit-def: $vgpr54
; GFX9-NEXT:    ; implicit-def: $vgpr53
; GFX9-NEXT:    ; implicit-def: $vgpr52
; GFX9-NEXT:    ; implicit-def: $vgpr51
; GFX9-NEXT:    ; implicit-def: $vgpr50
; GFX9-NEXT:    ; implicit-def: $vgpr49
; GFX9-NEXT:    ; implicit-def: $vgpr48
; GFX9-NEXT:    ; implicit-def: $vgpr39
; GFX9-NEXT:    ; implicit-def: $vgpr38
; GFX9-NEXT:    ; implicit-def: $vgpr37
; GFX9-NEXT:    ; implicit-def: $vgpr36
; GFX9-NEXT:    ; implicit-def: $vgpr35
; GFX9-NEXT:    ; implicit-def: $vgpr34
; GFX9-NEXT:    ; implicit-def: $vgpr33
; GFX9-NEXT:    ; implicit-def: $vgpr32
; GFX9-NEXT:    ; implicit-def: $vgpr31
; GFX9-NEXT:    ; implicit-def: $vgpr30
; GFX9-NEXT:    ; implicit-def: $vgpr29
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB28_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX9-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX9-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX9-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX9-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX9-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX9-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX9-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX9-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX9-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX9-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX9-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX9-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX9-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX9-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX9-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX9-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; GFX9-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; GFX9-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; GFX9-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; GFX9-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; GFX9-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; GFX9-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; GFX9-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; GFX9-NEXT:  .LBB28_2: ; %Flow
; GFX9-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB28_4
; GFX9-NEXT:  ; %bb.3: ; %cmp.true
; GFX9-NEXT:    v_add_f32_e32 v27, 1.0, v27
; GFX9-NEXT:    v_add_f32_e32 v26, 1.0, v26
; GFX9-NEXT:    v_add_f32_e32 v25, 1.0, v25
; GFX9-NEXT:    v_add_f32_e32 v24, 1.0, v24
; GFX9-NEXT:    v_add_f32_e32 v23, 1.0, v23
; GFX9-NEXT:    v_add_f32_e32 v22, 1.0, v22
; GFX9-NEXT:    v_add_f32_e32 v21, 1.0, v21
; GFX9-NEXT:    v_add_f32_e32 v20, 1.0, v20
; GFX9-NEXT:    v_add_f32_e32 v19, 1.0, v19
; GFX9-NEXT:    v_add_f32_e32 v18, 1.0, v18
; GFX9-NEXT:    v_add_f32_e32 v17, 1.0, v17
; GFX9-NEXT:    v_add_f32_e32 v16, 1.0, v16
; GFX9-NEXT:    v_add_f32_e32 v15, 1.0, v15
; GFX9-NEXT:    v_add_f32_e32 v14, 1.0, v14
; GFX9-NEXT:    v_add_f32_e32 v13, 1.0, v13
; GFX9-NEXT:    v_add_f32_e32 v12, 1.0, v12
; GFX9-NEXT:    v_add_f32_e32 v11, 1.0, v11
; GFX9-NEXT:    v_add_f32_e32 v10, 1.0, v10
; GFX9-NEXT:    v_add_f32_e32 v9, 1.0, v9
; GFX9-NEXT:    v_add_f32_e32 v8, 1.0, v8
; GFX9-NEXT:    v_add_f32_e32 v7, 1.0, v7
; GFX9-NEXT:    v_add_f32_e32 v6, 1.0, v6
; GFX9-NEXT:    v_add_f32_e32 v5, 1.0, v5
; GFX9-NEXT:    v_add_f32_e32 v4, 1.0, v4
; GFX9-NEXT:    v_add_f32_e32 v3, 1.0, v3
; GFX9-NEXT:    v_add_f32_e32 v2, 1.0, v2
; GFX9-NEXT:    v_add_f32_e32 v1, 1.0, v1
; GFX9-NEXT:    v_add_f32_e32 v0, 1.0, v0
; GFX9-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX9-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX9-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX9-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX9-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX9-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX9-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX9-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX9-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX9-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX9-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX9-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX9-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX9-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX9-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX9-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX9-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; GFX9-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; GFX9-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; GFX9-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; GFX9-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; GFX9-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; GFX9-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; GFX9-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; GFX9-NEXT:  .LBB28_4: ; %end
; GFX9-NEXT:    s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT:    s_mov_b32 s4, 0x5040100
; GFX9-NEXT:    v_perm_b32 v0, v47, v0, s4
; GFX9-NEXT:    v_perm_b32 v1, v46, v1, s4
; GFX9-NEXT:    v_perm_b32 v2, v45, v2, s4
; GFX9-NEXT:    v_perm_b32 v3, v44, v3, s4
; GFX9-NEXT:    v_perm_b32 v4, v43, v4, s4
; GFX9-NEXT:    v_perm_b32 v5, v42, v5, s4
; GFX9-NEXT:    v_perm_b32 v6, v41, v6, s4
; GFX9-NEXT:    v_perm_b32 v7, v40, v7, s4
; GFX9-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; GFX9-NEXT:    v_perm_b32 v8, v55, v8, s4
; GFX9-NEXT:    v_perm_b32 v9, v54, v9, s4
; GFX9-NEXT:    v_perm_b32 v10, v53, v10, s4
; GFX9-NEXT:    v_perm_b32 v11, v52, v11, s4
; GFX9-NEXT:    v_perm_b32 v12, v51, v12, s4
; GFX9-NEXT:    v_perm_b32 v13, v50, v13, s4
; GFX9-NEXT:    v_perm_b32 v14, v49, v14, s4
; GFX9-NEXT:    v_perm_b32 v15, v48, v15, s4
; GFX9-NEXT:    v_perm_b32 v16, v39, v16, s4
; GFX9-NEXT:    v_perm_b32 v17, v38, v17, s4
; GFX9-NEXT:    v_perm_b32 v18, v37, v18, s4
; GFX9-NEXT:    v_perm_b32 v19, v36, v19, s4
; GFX9-NEXT:    v_perm_b32 v20, v35, v20, s4
; GFX9-NEXT:    v_perm_b32 v21, v34, v21, s4
; GFX9-NEXT:    v_perm_b32 v22, v33, v22, s4
; GFX9-NEXT:    v_perm_b32 v23, v32, v23, s4
; GFX9-NEXT:    v_perm_b32 v24, v31, v24, s4
; GFX9-NEXT:    v_perm_b32 v25, v30, v25, s4
; GFX9-NEXT:    v_perm_b32 v26, v29, v26, s4
; GFX9-NEXT:    v_perm_b32 v27, v28, v27, s4
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-TRUE16-LABEL: bitcast_v28f32_to_v56i16:
; GFX11-TRUE16:       ; %bb.0:
; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-TRUE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT:    s_cbranch_execz .LBB28_2
; GFX11-TRUE16-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-TRUE16-NEXT:    v_dual_add_f32 v27, 1.0, v27 :: v_dual_add_f32 v26, 1.0, v26
; GFX11-TRUE16-NEXT:    v_dual_add_f32 v25, 1.0, v25 :: v_dual_add_f32 v24, 1.0, v24
; GFX11-TRUE16-NEXT:    v_dual_add_f32 v23, 1.0, v23 :: v_dual_add_f32 v22, 1.0, v22
; GFX11-TRUE16-NEXT:    v_dual_add_f32 v21, 1.0, v21 :: v_dual_add_f32 v20, 1.0, v20
; GFX11-TRUE16-NEXT:    v_dual_add_f32 v19, 1.0, v19 :: v_dual_add_f32 v18, 1.0, v18
; GFX11-TRUE16-NEXT:    v_dual_add_f32 v17, 1.0, v17 :: v_dual_add_f32 v16, 1.0, v16
; GFX11-TRUE16-NEXT:    v_dual_add_f32 v15, 1.0, v15 :: v_dual_add_f32 v14, 1.0, v14
; GFX11-TRUE16-NEXT:    v_dual_add_f32 v13, 1.0, v13 :: v_dual_add_f32 v12, 1.0, v12
; GFX11-TRUE16-NEXT:    v_dual_add_f32 v11, 1.0, v11 :: v_dual_add_f32 v10, 1.0, v10
; GFX11-TRUE16-NEXT:    v_dual_add_f32 v9, 1.0, v9 :: v_dual_add_f32 v8, 1.0, v8
; GFX11-TRUE16-NEXT:    v_dual_add_f32 v7, 1.0, v7 :: v_dual_add_f32 v6, 1.0, v6
; GFX11-TRUE16-NEXT:    v_dual_add_f32 v5, 1.0, v5 :: v_dual_add_f32 v4, 1.0, v4
; GFX11-TRUE16-NEXT:    v_dual_add_f32 v3, 1.0, v3 :: v_dual_add_f32 v2, 1.0, v2
; GFX11-TRUE16-NEXT:    v_dual_add_f32 v1, 1.0, v1 :: v_dual_add_f32 v0, 1.0, v0
; GFX11-TRUE16-NEXT:  .LBB28_2: ; %end
; GFX11-TRUE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v28f32_to_v56i16:
; GFX11-FAKE16:       ; %bb.0:
; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v28
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr71
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr70
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr69
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr68
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr67
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr66
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr65
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr64
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr55
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr54
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr53
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr52
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr51
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr50
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr49
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr48
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr39
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr38
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr37
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr36
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr35
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr34
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr33
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr32
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr31
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr30
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr29
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr28
; GFX11-FAKE16-NEXT:    s_and_saveexec_b32 s0, vcc_lo
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_cbranch_execz .LBB28_2
; GFX11-FAKE16-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v3
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v2
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v0
; GFX11-FAKE16-NEXT:  .LBB28_2: ; %Flow
; GFX11-FAKE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-FAKE16-NEXT:    s_cbranch_execz .LBB28_4
; GFX11-FAKE16-NEXT:  ; %bb.3: ; %cmp.true
; GFX11-FAKE16-NEXT:    v_dual_add_f32 v27, 1.0, v27 :: v_dual_add_f32 v26, 1.0, v26
; GFX11-FAKE16-NEXT:    v_dual_add_f32 v25, 1.0, v25 :: v_dual_add_f32 v24, 1.0, v24
; GFX11-FAKE16-NEXT:    v_dual_add_f32 v23, 1.0, v23 :: v_dual_add_f32 v22, 1.0, v22
; GFX11-FAKE16-NEXT:    v_dual_add_f32 v21, 1.0, v21 :: v_dual_add_f32 v20, 1.0, v20
; GFX11-FAKE16-NEXT:    v_dual_add_f32 v19, 1.0, v19 :: v_dual_add_f32 v18, 1.0, v18
; GFX11-FAKE16-NEXT:    v_dual_add_f32 v17, 1.0, v17 :: v_dual_add_f32 v16, 1.0, v16
; GFX11-FAKE16-NEXT:    v_dual_add_f32 v15, 1.0, v15 :: v_dual_add_f32 v14, 1.0, v14
; GFX11-FAKE16-NEXT:    v_dual_add_f32 v13, 1.0, v13 :: v_dual_add_f32 v12, 1.0, v12
; GFX11-FAKE16-NEXT:    v_dual_add_f32 v11, 1.0, v11 :: v_dual_add_f32 v10, 1.0, v10
; GFX11-FAKE16-NEXT:    v_dual_add_f32 v9, 1.0, v9 :: v_dual_add_f32 v8, 1.0, v8
; GFX11-FAKE16-NEXT:    v_dual_add_f32 v7, 1.0, v7 :: v_dual_add_f32 v6, 1.0, v6
; GFX11-FAKE16-NEXT:    v_dual_add_f32 v5, 1.0, v5 :: v_dual_add_f32 v4, 1.0, v4
; GFX11-FAKE16-NEXT:    v_dual_add_f32 v3, 1.0, v3 :: v_dual_add_f32 v2, 1.0, v2
; GFX11-FAKE16-NEXT:    v_dual_add_f32 v1, 1.0, v1 :: v_dual_add_f32 v0, 1.0, v0
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v3
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v2
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v0
; GFX11-FAKE16-NEXT:  .LBB28_4: ; %end
; GFX11-FAKE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v71, v0, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v1, v70, v1, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v2, v69, v2, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v3, v68, v3, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v4, v67, v4, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v5, v66, v5, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v6, v65, v6, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v7, v64, v7, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v8, v55, v8, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v9, v54, v9, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v10, v53, v10, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v11, v52, v11, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v12, v51, v12, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v13, v50, v13, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v14, v49, v14, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v15, v48, v15, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v16, v39, v16, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v17, v38, v17, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v18, v37, v18, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v19, v36, v19, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v20, v35, v20, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v21, v34, v21, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v22, v33, v22, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v23, v32, v23, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v24, v31, v24, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v25, v30, v25, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v26, v29, v26, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v27, v28, v27, 0x5040100
; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = fadd <28 x float> %a, splat (float 1.000000e+00)
  %a2 = bitcast <28 x float> %a1 to <56 x i16>
  br label %end

cmp.false:
  %a3 = bitcast <28 x float> %a to <56 x i16>
  br label %end

end:
  %phi = phi <56 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <56 x i16> %phi
}

define inreg <56 x i16> @bitcast_v28f32_to_v56i16_scalar(<28 x float> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v28f32_to_v56i16_scalar:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    s_or_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v56, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    v_writelane_b32 v57, s34, 0
; SI-NEXT:    v_writelane_b32 v57, s35, 1
; SI-NEXT:    v_writelane_b32 v57, s36, 2
; SI-NEXT:    v_writelane_b32 v57, s37, 3
; SI-NEXT:    v_writelane_b32 v57, s38, 4
; SI-NEXT:    v_writelane_b32 v57, s39, 5
; SI-NEXT:    v_writelane_b32 v57, s48, 6
; SI-NEXT:    v_writelane_b32 v57, s49, 7
; SI-NEXT:    v_writelane_b32 v57, s30, 8
; SI-NEXT:    v_writelane_b32 v57, s31, 9
; SI-NEXT:    v_readfirstlane_b32 s40, v14
; SI-NEXT:    v_readfirstlane_b32 s5, v13
; SI-NEXT:    v_readfirstlane_b32 s4, v12
; SI-NEXT:    v_readfirstlane_b32 s7, v11
; SI-NEXT:    v_readfirstlane_b32 s6, v10
; SI-NEXT:    v_readfirstlane_b32 s9, v9
; SI-NEXT:    v_readfirstlane_b32 s8, v8
; SI-NEXT:    v_readfirstlane_b32 s11, v7
; SI-NEXT:    v_readfirstlane_b32 s10, v6
; SI-NEXT:    v_readfirstlane_b32 s13, v5
; SI-NEXT:    v_readfirstlane_b32 s12, v4
; SI-NEXT:    v_readfirstlane_b32 s15, v3
; SI-NEXT:    v_readfirstlane_b32 s14, v2
; SI-NEXT:    v_readfirstlane_b32 s41, v1
; SI-NEXT:    s_cmp_lg_u32 s40, 0
; SI-NEXT:    v_readfirstlane_b32 s40, v0
; SI-NEXT:    s_cbranch_scc0 .LBB29_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    s_lshr_b32 s94, s5, 16
; SI-NEXT:    s_lshr_b32 s95, s7, 16
; SI-NEXT:    s_lshr_b32 vcc_lo, s9, 16
; SI-NEXT:    s_lshr_b32 vcc_hi, s11, 16
; SI-NEXT:    s_lshr_b32 s30, s13, 16
; SI-NEXT:    s_lshr_b32 s31, s15, 16
; SI-NEXT:    s_lshr_b32 s34, s41, 16
; SI-NEXT:    s_lshr_b32 s35, s29, 16
; SI-NEXT:    s_lshr_b32 s36, s27, 16
; SI-NEXT:    s_lshr_b32 s37, s25, 16
; SI-NEXT:    s_lshr_b32 s38, s23, 16
; SI-NEXT:    s_lshr_b32 s39, s21, 16
; SI-NEXT:    s_lshr_b32 s48, s19, 16
; SI-NEXT:    s_lshr_b32 s49, s17, 16
; SI-NEXT:    s_lshr_b64 s[42:43], s[4:5], 16
; SI-NEXT:    s_lshr_b64 s[44:45], s[6:7], 16
; SI-NEXT:    s_lshr_b64 s[46:47], s[8:9], 16
; SI-NEXT:    s_lshr_b64 s[56:57], s[10:11], 16
; SI-NEXT:    s_lshr_b64 s[58:59], s[12:13], 16
; SI-NEXT:    s_lshr_b64 s[60:61], s[14:15], 16
; SI-NEXT:    s_lshr_b64 s[62:63], s[40:41], 16
; SI-NEXT:    s_lshr_b64 s[72:73], s[28:29], 16
; SI-NEXT:    s_lshr_b64 s[74:75], s[26:27], 16
; SI-NEXT:    s_lshr_b64 s[76:77], s[24:25], 16
; SI-NEXT:    s_lshr_b64 s[78:79], s[22:23], 16
; SI-NEXT:    s_lshr_b64 s[88:89], s[20:21], 16
; SI-NEXT:    s_lshr_b64 s[90:91], s[18:19], 16
; SI-NEXT:    s_lshr_b64 s[92:93], s[16:17], 16
; SI-NEXT:    v_mov_b32_e32 v0, s16
; SI-NEXT:    v_mov_b32_e32 v1, s17
; SI-NEXT:    v_mov_b32_e32 v2, s18
; SI-NEXT:    v_mov_b32_e32 v3, s19
; SI-NEXT:    v_mov_b32_e32 v4, s20
; SI-NEXT:    v_mov_b32_e32 v5, s21
; SI-NEXT:    v_mov_b32_e32 v6, s22
; SI-NEXT:    v_mov_b32_e32 v7, s23
; SI-NEXT:    v_mov_b32_e32 v8, s24
; SI-NEXT:    v_mov_b32_e32 v9, s25
; SI-NEXT:    v_mov_b32_e32 v10, s26
; SI-NEXT:    v_mov_b32_e32 v11, s27
; SI-NEXT:    v_mov_b32_e32 v12, s28
; SI-NEXT:    v_mov_b32_e32 v13, s29
; SI-NEXT:    v_mov_b32_e32 v14, s40
; SI-NEXT:    v_mov_b32_e32 v15, s41
; SI-NEXT:    v_mov_b32_e32 v16, s14
; SI-NEXT:    v_mov_b32_e32 v17, s15
; SI-NEXT:    v_mov_b32_e32 v18, s12
; SI-NEXT:    v_mov_b32_e32 v19, s13
; SI-NEXT:    v_mov_b32_e32 v20, s10
; SI-NEXT:    v_mov_b32_e32 v21, s11
; SI-NEXT:    v_mov_b32_e32 v22, s8
; SI-NEXT:    v_mov_b32_e32 v23, s9
; SI-NEXT:    v_mov_b32_e32 v24, s6
; SI-NEXT:    v_mov_b32_e32 v25, s7
; SI-NEXT:    v_mov_b32_e32 v26, s4
; SI-NEXT:    v_mov_b32_e32 v27, s5
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_mov_b32_e32 v47, s49
; SI-NEXT:    v_mov_b32_e32 v46, s48
; SI-NEXT:    v_mov_b32_e32 v45, s39
; SI-NEXT:    v_mov_b32_e32 v44, s38
; SI-NEXT:    v_mov_b32_e32 v43, s37
; SI-NEXT:    v_mov_b32_e32 v51, s36
; SI-NEXT:    v_mov_b32_e32 v42, s35
; SI-NEXT:    v_mov_b32_e32 v41, s34
; SI-NEXT:    v_mov_b32_e32 v40, s31
; SI-NEXT:    v_mov_b32_e32 v39, s30
; SI-NEXT:    v_mov_b32_e32 v55, vcc_hi
; SI-NEXT:    v_mov_b32_e32 v54, vcc_lo
; SI-NEXT:    v_mov_b32_e32 v53, s95
; SI-NEXT:    v_mov_b32_e32 v52, s94
; SI-NEXT:    v_mov_b32_e32 v28, s42
; SI-NEXT:    v_mov_b32_e32 v29, s44
; SI-NEXT:    v_mov_b32_e32 v30, s46
; SI-NEXT:    v_mov_b32_e32 v31, s56
; SI-NEXT:    v_mov_b32_e32 v32, s58
; SI-NEXT:    v_mov_b32_e32 v33, s60
; SI-NEXT:    v_mov_b32_e32 v34, s62
; SI-NEXT:    v_mov_b32_e32 v35, s72
; SI-NEXT:    v_mov_b32_e32 v36, s74
; SI-NEXT:    v_mov_b32_e32 v37, s76
; SI-NEXT:    v_mov_b32_e32 v38, s78
; SI-NEXT:    v_mov_b32_e32 v48, s88
; SI-NEXT:    v_mov_b32_e32 v49, s90
; SI-NEXT:    v_mov_b32_e32 v50, s92
; SI-NEXT:    s_branch .LBB29_3
; SI-NEXT:  .LBB29_2: ; %cmp.true
; SI-NEXT:    v_add_f32_e64 v27, s5, 1.0
; SI-NEXT:    v_add_f32_e64 v26, s4, 1.0
; SI-NEXT:    v_add_f32_e64 v25, s7, 1.0
; SI-NEXT:    v_add_f32_e64 v24, s6, 1.0
; SI-NEXT:    v_lshr_b64 v[28:29], v[26:27], 16
; SI-NEXT:    v_add_f32_e64 v23, s9, 1.0
; SI-NEXT:    v_add_f32_e64 v22, s8, 1.0
; SI-NEXT:    v_lshr_b64 v[29:30], v[24:25], 16
; SI-NEXT:    v_add_f32_e64 v21, s11, 1.0
; SI-NEXT:    v_add_f32_e64 v20, s10, 1.0
; SI-NEXT:    v_lshr_b64 v[30:31], v[22:23], 16
; SI-NEXT:    v_add_f32_e64 v19, s13, 1.0
; SI-NEXT:    v_add_f32_e64 v18, s12, 1.0
; SI-NEXT:    v_lshr_b64 v[31:32], v[20:21], 16
; SI-NEXT:    v_add_f32_e64 v17, s15, 1.0
; SI-NEXT:    v_add_f32_e64 v16, s14, 1.0
; SI-NEXT:    v_lshr_b64 v[32:33], v[18:19], 16
; SI-NEXT:    v_add_f32_e64 v15, s41, 1.0
; SI-NEXT:    v_add_f32_e64 v14, s40, 1.0
; SI-NEXT:    v_lshr_b64 v[33:34], v[16:17], 16
; SI-NEXT:    v_add_f32_e64 v13, s29, 1.0
; SI-NEXT:    v_add_f32_e64 v12, s28, 1.0
; SI-NEXT:    v_lshr_b64 v[34:35], v[14:15], 16
; SI-NEXT:    v_add_f32_e64 v11, s27, 1.0
; SI-NEXT:    v_add_f32_e64 v10, s26, 1.0
; SI-NEXT:    v_lshr_b64 v[35:36], v[12:13], 16
; SI-NEXT:    v_add_f32_e64 v9, s25, 1.0
; SI-NEXT:    v_add_f32_e64 v8, s24, 1.0
; SI-NEXT:    v_lshr_b64 v[36:37], v[10:11], 16
; SI-NEXT:    v_add_f32_e64 v7, s23, 1.0
; SI-NEXT:    v_add_f32_e64 v6, s22, 1.0
; SI-NEXT:    v_lshr_b64 v[37:38], v[8:9], 16
; SI-NEXT:    v_add_f32_e64 v5, s21, 1.0
; SI-NEXT:    v_add_f32_e64 v4, s20, 1.0
; SI-NEXT:    v_lshrrev_b32_e32 v48, 16, v19
; SI-NEXT:    v_lshr_b64 v[38:39], v[6:7], 16
; SI-NEXT:    v_add_f32_e64 v3, s19, 1.0
; SI-NEXT:    v_add_f32_e64 v2, s18, 1.0
; SI-NEXT:    v_mov_b32_e32 v39, v48
; SI-NEXT:    v_lshr_b64 v[48:49], v[4:5], 16
; SI-NEXT:    v_add_f32_e64 v1, s17, 1.0
; SI-NEXT:    v_add_f32_e64 v0, s16, 1.0
; SI-NEXT:    v_lshr_b64 v[49:50], v[2:3], 16
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v56, 16, v11
; SI-NEXT:    v_lshr_b64 v[50:51], v[0:1], 16
; SI-NEXT:    v_lshrrev_b32_e32 v52, 16, v27
; SI-NEXT:    v_lshrrev_b32_e32 v53, 16, v25
; SI-NEXT:    v_lshrrev_b32_e32 v54, 16, v23
; SI-NEXT:    v_lshrrev_b32_e32 v55, 16, v21
; SI-NEXT:    v_lshrrev_b32_e32 v40, 16, v17
; SI-NEXT:    v_lshrrev_b32_e32 v41, 16, v15
; SI-NEXT:    v_lshrrev_b32_e32 v42, 16, v13
; SI-NEXT:    v_lshrrev_b32_e32 v43, 16, v9
; SI-NEXT:    v_lshrrev_b32_e32 v44, 16, v7
; SI-NEXT:    v_lshrrev_b32_e32 v45, 16, v5
; SI-NEXT:    v_lshrrev_b32_e32 v46, 16, v3
; SI-NEXT:    v_lshrrev_b32_e32 v47, 16, v1
; SI-NEXT:    v_mov_b32_e32 v51, v56
; SI-NEXT:  .LBB29_3: ; %end
; SI-NEXT:    v_lshlrev_b32_e32 v50, 16, v50
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT:    v_lshlrev_b32_e32 v49, 16, v49
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT:    v_lshlrev_b32_e32 v48, 16, v48
; SI-NEXT:    v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT:    v_lshlrev_b32_e32 v38, 16, v38
; SI-NEXT:    v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT:    v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT:    v_lshlrev_b32_e32 v37, 16, v37
; SI-NEXT:    v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; SI-NEXT:    v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT:    v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT:    v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; SI-NEXT:    v_or_b32_e32 v0, v0, v50
; SI-NEXT:    v_lshlrev_b32_e32 v50, 16, v47
; SI-NEXT:    v_or_b32_e32 v2, v2, v49
; SI-NEXT:    v_lshlrev_b32_e32 v49, 16, v46
; SI-NEXT:    v_or_b32_e32 v4, v4, v48
; SI-NEXT:    v_lshlrev_b32_e32 v48, 16, v45
; SI-NEXT:    v_or_b32_e32 v6, v6, v38
; SI-NEXT:    v_lshlrev_b32_e32 v38, 16, v44
; SI-NEXT:    v_or_b32_e32 v8, v8, v37
; SI-NEXT:    v_lshlrev_b32_e32 v37, 16, v43
; SI-NEXT:    v_or_b32_e32 v12, v12, v35
; SI-NEXT:    v_lshlrev_b32_e32 v35, 16, v42
; SI-NEXT:    v_or_b32_e32 v14, v14, v34
; SI-NEXT:    v_lshlrev_b32_e32 v34, 16, v41
; SI-NEXT:    v_or_b32_e32 v16, v16, v33
; SI-NEXT:    v_lshlrev_b32_e32 v33, 16, v40
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    buffer_load_dword v56, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; SI-NEXT:    v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT:    v_lshlrev_b32_e32 v36, 16, v36
; SI-NEXT:    v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT:    v_lshlrev_b32_e32 v32, 16, v32
; SI-NEXT:    v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT:    v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT:    v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; SI-NEXT:    v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; SI-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT:    v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT:    v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT:    v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT:    v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT:    v_or_b32_e32 v10, v10, v36
; SI-NEXT:    v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT:    v_lshlrev_b32_e32 v36, 16, v51
; SI-NEXT:    v_and_b32_e32 v13, 0xffff, v13
; SI-NEXT:    v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT:    v_and_b32_e32 v17, 0xffff, v17
; SI-NEXT:    v_or_b32_e32 v18, v18, v32
; SI-NEXT:    v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT:    v_lshlrev_b32_e32 v32, 16, v39
; SI-NEXT:    v_or_b32_e32 v20, v20, v31
; SI-NEXT:    v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT:    v_lshlrev_b32_e32 v31, 16, v55
; SI-NEXT:    v_or_b32_e32 v22, v22, v30
; SI-NEXT:    v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v54
; SI-NEXT:    v_or_b32_e32 v24, v24, v29
; SI-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v53
; SI-NEXT:    v_or_b32_e32 v26, v26, v28
; SI-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v52
; SI-NEXT:    v_readlane_b32 s30, v57, 8
; SI-NEXT:    v_or_b32_e32 v1, v1, v50
; SI-NEXT:    v_or_b32_e32 v3, v3, v49
; SI-NEXT:    v_or_b32_e32 v5, v5, v48
; SI-NEXT:    v_or_b32_e32 v7, v7, v38
; SI-NEXT:    v_or_b32_e32 v9, v9, v37
; SI-NEXT:    v_or_b32_e32 v11, v11, v36
; SI-NEXT:    v_or_b32_e32 v13, v13, v35
; SI-NEXT:    v_or_b32_e32 v15, v15, v34
; SI-NEXT:    v_or_b32_e32 v17, v17, v33
; SI-NEXT:    v_or_b32_e32 v19, v19, v32
; SI-NEXT:    v_or_b32_e32 v21, v21, v31
; SI-NEXT:    v_or_b32_e32 v23, v23, v30
; SI-NEXT:    v_or_b32_e32 v25, v25, v29
; SI-NEXT:    v_or_b32_e32 v27, v27, v28
; SI-NEXT:    v_readlane_b32 s31, v57, 9
; SI-NEXT:    v_readlane_b32 s49, v57, 7
; SI-NEXT:    v_readlane_b32 s48, v57, 6
; SI-NEXT:    v_readlane_b32 s39, v57, 5
; SI-NEXT:    v_readlane_b32 s38, v57, 4
; SI-NEXT:    v_readlane_b32 s37, v57, 3
; SI-NEXT:    v_readlane_b32 s36, v57, 2
; SI-NEXT:    v_readlane_b32 s35, v57, 1
; SI-NEXT:    v_readlane_b32 s34, v57, 0
; SI-NEXT:    s_or_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_load_dword v57, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v28f32_to_v56i16_scalar:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    v_readfirstlane_b32 s41, v14
; VI-NEXT:    v_readfirstlane_b32 s4, v13
; VI-NEXT:    v_readfirstlane_b32 s5, v12
; VI-NEXT:    v_readfirstlane_b32 s6, v11
; VI-NEXT:    v_readfirstlane_b32 s7, v10
; VI-NEXT:    v_readfirstlane_b32 s8, v9
; VI-NEXT:    v_readfirstlane_b32 s9, v8
; VI-NEXT:    v_readfirstlane_b32 s10, v7
; VI-NEXT:    v_readfirstlane_b32 s11, v6
; VI-NEXT:    v_readfirstlane_b32 s12, v5
; VI-NEXT:    v_readfirstlane_b32 s13, v4
; VI-NEXT:    v_readfirstlane_b32 s14, v3
; VI-NEXT:    v_readfirstlane_b32 s15, v2
; VI-NEXT:    v_readfirstlane_b32 s40, v1
; VI-NEXT:    s_cmp_lg_u32 s41, 0
; VI-NEXT:    v_readfirstlane_b32 s41, v0
; VI-NEXT:    s_cbranch_scc0 .LBB29_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    s_lshr_b32 s42, s4, 16
; VI-NEXT:    s_lshr_b32 s43, s5, 16
; VI-NEXT:    s_lshr_b32 s44, s6, 16
; VI-NEXT:    s_lshr_b32 s45, s7, 16
; VI-NEXT:    s_lshr_b32 s46, s8, 16
; VI-NEXT:    s_lshr_b32 s47, s9, 16
; VI-NEXT:    s_lshr_b32 s56, s10, 16
; VI-NEXT:    s_lshr_b32 s57, s11, 16
; VI-NEXT:    s_lshr_b32 s58, s12, 16
; VI-NEXT:    s_lshr_b32 s59, s13, 16
; VI-NEXT:    s_lshr_b32 s60, s14, 16
; VI-NEXT:    s_lshr_b32 s61, s15, 16
; VI-NEXT:    s_lshr_b32 s62, s40, 16
; VI-NEXT:    s_lshr_b32 s63, s41, 16
; VI-NEXT:    s_lshr_b32 s72, s29, 16
; VI-NEXT:    s_lshr_b32 s73, s28, 16
; VI-NEXT:    s_lshr_b32 s74, s27, 16
; VI-NEXT:    s_lshr_b32 s75, s26, 16
; VI-NEXT:    s_lshr_b32 s76, s25, 16
; VI-NEXT:    s_lshr_b32 s77, s24, 16
; VI-NEXT:    s_lshr_b32 s78, s23, 16
; VI-NEXT:    s_lshr_b32 s79, s22, 16
; VI-NEXT:    s_lshr_b32 s88, s21, 16
; VI-NEXT:    s_lshr_b32 s89, s20, 16
; VI-NEXT:    s_lshr_b32 s90, s19, 16
; VI-NEXT:    s_lshr_b32 s91, s18, 16
; VI-NEXT:    s_lshr_b32 vcc_lo, s17, 16
; VI-NEXT:    s_lshr_b32 vcc_hi, s16, 16
; VI-NEXT:    v_mov_b32_e32 v0, s16
; VI-NEXT:    v_mov_b32_e32 v1, s17
; VI-NEXT:    v_mov_b32_e32 v2, s18
; VI-NEXT:    v_mov_b32_e32 v3, s19
; VI-NEXT:    v_mov_b32_e32 v4, s20
; VI-NEXT:    v_mov_b32_e32 v5, s21
; VI-NEXT:    v_mov_b32_e32 v6, s22
; VI-NEXT:    v_mov_b32_e32 v7, s23
; VI-NEXT:    v_mov_b32_e32 v8, s24
; VI-NEXT:    v_mov_b32_e32 v9, s25
; VI-NEXT:    v_mov_b32_e32 v10, s26
; VI-NEXT:    v_mov_b32_e32 v11, s27
; VI-NEXT:    v_mov_b32_e32 v12, s28
; VI-NEXT:    v_mov_b32_e32 v13, s29
; VI-NEXT:    v_mov_b32_e32 v14, s41
; VI-NEXT:    v_mov_b32_e32 v15, s40
; VI-NEXT:    v_mov_b32_e32 v16, s15
; VI-NEXT:    v_mov_b32_e32 v17, s14
; VI-NEXT:    v_mov_b32_e32 v18, s13
; VI-NEXT:    v_mov_b32_e32 v19, s12
; VI-NEXT:    v_mov_b32_e32 v20, s11
; VI-NEXT:    v_mov_b32_e32 v21, s10
; VI-NEXT:    v_mov_b32_e32 v22, s9
; VI-NEXT:    v_mov_b32_e32 v23, s8
; VI-NEXT:    v_mov_b32_e32 v24, s7
; VI-NEXT:    v_mov_b32_e32 v25, s6
; VI-NEXT:    v_mov_b32_e32 v26, s5
; VI-NEXT:    v_mov_b32_e32 v27, s4
; VI-NEXT:    v_mov_b32_e32 v47, vcc_hi
; VI-NEXT:    v_mov_b32_e32 v46, vcc_lo
; VI-NEXT:    v_mov_b32_e32 v45, s91
; VI-NEXT:    v_mov_b32_e32 v44, s90
; VI-NEXT:    v_mov_b32_e32 v43, s89
; VI-NEXT:    v_mov_b32_e32 v42, s88
; VI-NEXT:    v_mov_b32_e32 v41, s79
; VI-NEXT:    v_mov_b32_e32 v40, s78
; VI-NEXT:    v_mov_b32_e32 v55, s77
; VI-NEXT:    v_mov_b32_e32 v54, s76
; VI-NEXT:    v_mov_b32_e32 v53, s75
; VI-NEXT:    v_mov_b32_e32 v52, s74
; VI-NEXT:    v_mov_b32_e32 v51, s73
; VI-NEXT:    v_mov_b32_e32 v50, s72
; VI-NEXT:    v_mov_b32_e32 v49, s63
; VI-NEXT:    v_mov_b32_e32 v48, s62
; VI-NEXT:    v_mov_b32_e32 v39, s61
; VI-NEXT:    v_mov_b32_e32 v38, s60
; VI-NEXT:    v_mov_b32_e32 v37, s59
; VI-NEXT:    v_mov_b32_e32 v36, s58
; VI-NEXT:    v_mov_b32_e32 v35, s57
; VI-NEXT:    v_mov_b32_e32 v34, s56
; VI-NEXT:    v_mov_b32_e32 v33, s47
; VI-NEXT:    v_mov_b32_e32 v32, s46
; VI-NEXT:    v_mov_b32_e32 v31, s45
; VI-NEXT:    v_mov_b32_e32 v30, s44
; VI-NEXT:    v_mov_b32_e32 v29, s43
; VI-NEXT:    v_mov_b32_e32 v28, s42
; VI-NEXT:    s_branch .LBB29_3
; VI-NEXT:  .LBB29_2: ; %cmp.true
; VI-NEXT:    v_add_f32_e64 v27, s4, 1.0
; VI-NEXT:    v_add_f32_e64 v26, s5, 1.0
; VI-NEXT:    v_add_f32_e64 v25, s6, 1.0
; VI-NEXT:    v_add_f32_e64 v24, s7, 1.0
; VI-NEXT:    v_add_f32_e64 v23, s8, 1.0
; VI-NEXT:    v_add_f32_e64 v22, s9, 1.0
; VI-NEXT:    v_add_f32_e64 v21, s10, 1.0
; VI-NEXT:    v_add_f32_e64 v20, s11, 1.0
; VI-NEXT:    v_add_f32_e64 v19, s12, 1.0
; VI-NEXT:    v_add_f32_e64 v18, s13, 1.0
; VI-NEXT:    v_add_f32_e64 v17, s14, 1.0
; VI-NEXT:    v_add_f32_e64 v16, s15, 1.0
; VI-NEXT:    v_add_f32_e64 v15, s40, 1.0
; VI-NEXT:    v_add_f32_e64 v14, s41, 1.0
; VI-NEXT:    v_add_f32_e64 v13, s29, 1.0
; VI-NEXT:    v_add_f32_e64 v12, s28, 1.0
; VI-NEXT:    v_add_f32_e64 v11, s27, 1.0
; VI-NEXT:    v_add_f32_e64 v10, s26, 1.0
; VI-NEXT:    v_add_f32_e64 v9, s25, 1.0
; VI-NEXT:    v_add_f32_e64 v8, s24, 1.0
; VI-NEXT:    v_add_f32_e64 v7, s23, 1.0
; VI-NEXT:    v_add_f32_e64 v6, s22, 1.0
; VI-NEXT:    v_add_f32_e64 v5, s21, 1.0
; VI-NEXT:    v_add_f32_e64 v4, s20, 1.0
; VI-NEXT:    v_add_f32_e64 v3, s19, 1.0
; VI-NEXT:    v_add_f32_e64 v2, s18, 1.0
; VI-NEXT:    v_add_f32_e64 v1, s17, 1.0
; VI-NEXT:    v_add_f32_e64 v0, s16, 1.0
; VI-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; VI-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; VI-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; VI-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; VI-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; VI-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; VI-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; VI-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; VI-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; VI-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; VI-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; VI-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; VI-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; VI-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; VI-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; VI-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; VI-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; VI-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; VI-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; VI-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; VI-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; VI-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; VI-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; VI-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; VI-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; VI-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; VI-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; VI-NEXT:  .LBB29_3: ; %end
; VI-NEXT:    v_lshlrev_b32_e32 v47, 16, v47
; VI-NEXT:    v_lshlrev_b32_e32 v46, 16, v46
; VI-NEXT:    v_lshlrev_b32_e32 v45, 16, v45
; VI-NEXT:    v_lshlrev_b32_e32 v44, 16, v44
; VI-NEXT:    v_lshlrev_b32_e32 v43, 16, v43
; VI-NEXT:    v_lshlrev_b32_e32 v42, 16, v42
; VI-NEXT:    v_lshlrev_b32_e32 v41, 16, v41
; VI-NEXT:    v_lshlrev_b32_e32 v40, 16, v40
; VI-NEXT:    v_or_b32_sdwa v0, v0, v47 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v1, v1, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v2, v2, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v3, v3, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v4, v4, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v5, v5, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v6, v6, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v7, v7, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; VI-NEXT:    v_lshlrev_b32_e32 v55, 16, v55
; VI-NEXT:    v_lshlrev_b32_e32 v54, 16, v54
; VI-NEXT:    v_lshlrev_b32_e32 v53, 16, v53
; VI-NEXT:    v_lshlrev_b32_e32 v52, 16, v52
; VI-NEXT:    v_lshlrev_b32_e32 v51, 16, v51
; VI-NEXT:    v_lshlrev_b32_e32 v50, 16, v50
; VI-NEXT:    v_lshlrev_b32_e32 v49, 16, v49
; VI-NEXT:    v_lshlrev_b32_e32 v48, 16, v48
; VI-NEXT:    v_lshlrev_b32_e32 v39, 16, v39
; VI-NEXT:    v_lshlrev_b32_e32 v38, 16, v38
; VI-NEXT:    v_lshlrev_b32_e32 v37, 16, v37
; VI-NEXT:    v_lshlrev_b32_e32 v36, 16, v36
; VI-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v34
; VI-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; VI-NEXT:    v_lshlrev_b32_e32 v32, 16, v32
; VI-NEXT:    v_lshlrev_b32_e32 v31, 16, v31
; VI-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; VI-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; VI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; VI-NEXT:    v_or_b32_sdwa v8, v8, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v9, v9, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v10, v10, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v11, v11, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v12, v12, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v13, v13, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v14, v14, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v15, v15, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v16, v16, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v17, v17, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v18, v18, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v19, v19, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v20, v20, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v21, v21, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v22, v22, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v23, v23, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v24, v24, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v25, v25, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v26, v26, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v28f32_to_v56i16_scalar:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    v_readfirstlane_b32 s41, v14
; GFX9-NEXT:    v_readfirstlane_b32 s4, v13
; GFX9-NEXT:    v_readfirstlane_b32 s5, v12
; GFX9-NEXT:    v_readfirstlane_b32 s6, v11
; GFX9-NEXT:    v_readfirstlane_b32 s7, v10
; GFX9-NEXT:    v_readfirstlane_b32 s8, v9
; GFX9-NEXT:    v_readfirstlane_b32 s9, v8
; GFX9-NEXT:    v_readfirstlane_b32 s10, v7
; GFX9-NEXT:    v_readfirstlane_b32 s11, v6
; GFX9-NEXT:    v_readfirstlane_b32 s12, v5
; GFX9-NEXT:    v_readfirstlane_b32 s13, v4
; GFX9-NEXT:    v_readfirstlane_b32 s14, v3
; GFX9-NEXT:    v_readfirstlane_b32 s15, v2
; GFX9-NEXT:    v_readfirstlane_b32 s40, v1
; GFX9-NEXT:    s_cmp_lg_u32 s41, 0
; GFX9-NEXT:    v_readfirstlane_b32 s41, v0
; GFX9-NEXT:    s_cbranch_scc0 .LBB29_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    s_lshr_b32 s42, s4, 16
; GFX9-NEXT:    s_lshr_b32 s43, s5, 16
; GFX9-NEXT:    s_lshr_b32 s44, s6, 16
; GFX9-NEXT:    s_lshr_b32 s45, s7, 16
; GFX9-NEXT:    s_lshr_b32 s46, s8, 16
; GFX9-NEXT:    s_lshr_b32 s47, s9, 16
; GFX9-NEXT:    s_lshr_b32 s56, s10, 16
; GFX9-NEXT:    s_lshr_b32 s57, s11, 16
; GFX9-NEXT:    s_lshr_b32 s58, s12, 16
; GFX9-NEXT:    s_lshr_b32 s59, s13, 16
; GFX9-NEXT:    s_lshr_b32 s60, s14, 16
; GFX9-NEXT:    s_lshr_b32 s61, s15, 16
; GFX9-NEXT:    s_lshr_b32 s62, s40, 16
; GFX9-NEXT:    s_lshr_b32 s63, s41, 16
; GFX9-NEXT:    s_lshr_b32 s72, s29, 16
; GFX9-NEXT:    s_lshr_b32 s73, s28, 16
; GFX9-NEXT:    s_lshr_b32 s74, s27, 16
; GFX9-NEXT:    s_lshr_b32 s75, s26, 16
; GFX9-NEXT:    s_lshr_b32 s76, s25, 16
; GFX9-NEXT:    s_lshr_b32 s77, s24, 16
; GFX9-NEXT:    s_lshr_b32 s78, s23, 16
; GFX9-NEXT:    s_lshr_b32 s79, s22, 16
; GFX9-NEXT:    s_lshr_b32 s88, s21, 16
; GFX9-NEXT:    s_lshr_b32 s89, s20, 16
; GFX9-NEXT:    s_lshr_b32 s90, s19, 16
; GFX9-NEXT:    s_lshr_b32 s91, s18, 16
; GFX9-NEXT:    s_lshr_b32 s92, s17, 16
; GFX9-NEXT:    s_lshr_b32 s93, s16, 16
; GFX9-NEXT:    v_mov_b32_e32 v0, s16
; GFX9-NEXT:    v_mov_b32_e32 v1, s17
; GFX9-NEXT:    v_mov_b32_e32 v2, s18
; GFX9-NEXT:    v_mov_b32_e32 v3, s19
; GFX9-NEXT:    v_mov_b32_e32 v4, s20
; GFX9-NEXT:    v_mov_b32_e32 v5, s21
; GFX9-NEXT:    v_mov_b32_e32 v6, s22
; GFX9-NEXT:    v_mov_b32_e32 v7, s23
; GFX9-NEXT:    v_mov_b32_e32 v8, s24
; GFX9-NEXT:    v_mov_b32_e32 v9, s25
; GFX9-NEXT:    v_mov_b32_e32 v10, s26
; GFX9-NEXT:    v_mov_b32_e32 v11, s27
; GFX9-NEXT:    v_mov_b32_e32 v12, s28
; GFX9-NEXT:    v_mov_b32_e32 v13, s29
; GFX9-NEXT:    v_mov_b32_e32 v14, s41
; GFX9-NEXT:    v_mov_b32_e32 v15, s40
; GFX9-NEXT:    v_mov_b32_e32 v16, s15
; GFX9-NEXT:    v_mov_b32_e32 v17, s14
; GFX9-NEXT:    v_mov_b32_e32 v18, s13
; GFX9-NEXT:    v_mov_b32_e32 v19, s12
; GFX9-NEXT:    v_mov_b32_e32 v20, s11
; GFX9-NEXT:    v_mov_b32_e32 v21, s10
; GFX9-NEXT:    v_mov_b32_e32 v22, s9
; GFX9-NEXT:    v_mov_b32_e32 v23, s8
; GFX9-NEXT:    v_mov_b32_e32 v24, s7
; GFX9-NEXT:    v_mov_b32_e32 v25, s6
; GFX9-NEXT:    v_mov_b32_e32 v26, s5
; GFX9-NEXT:    v_mov_b32_e32 v27, s4
; GFX9-NEXT:    v_mov_b32_e32 v47, s93
; GFX9-NEXT:    v_mov_b32_e32 v46, s92
; GFX9-NEXT:    v_mov_b32_e32 v45, s91
; GFX9-NEXT:    v_mov_b32_e32 v44, s90
; GFX9-NEXT:    v_mov_b32_e32 v43, s89
; GFX9-NEXT:    v_mov_b32_e32 v42, s88
; GFX9-NEXT:    v_mov_b32_e32 v41, s79
; GFX9-NEXT:    v_mov_b32_e32 v40, s78
; GFX9-NEXT:    v_mov_b32_e32 v55, s77
; GFX9-NEXT:    v_mov_b32_e32 v54, s76
; GFX9-NEXT:    v_mov_b32_e32 v53, s75
; GFX9-NEXT:    v_mov_b32_e32 v52, s74
; GFX9-NEXT:    v_mov_b32_e32 v51, s73
; GFX9-NEXT:    v_mov_b32_e32 v50, s72
; GFX9-NEXT:    v_mov_b32_e32 v49, s63
; GFX9-NEXT:    v_mov_b32_e32 v48, s62
; GFX9-NEXT:    v_mov_b32_e32 v39, s61
; GFX9-NEXT:    v_mov_b32_e32 v38, s60
; GFX9-NEXT:    v_mov_b32_e32 v37, s59
; GFX9-NEXT:    v_mov_b32_e32 v36, s58
; GFX9-NEXT:    v_mov_b32_e32 v35, s57
; GFX9-NEXT:    v_mov_b32_e32 v34, s56
; GFX9-NEXT:    v_mov_b32_e32 v33, s47
; GFX9-NEXT:    v_mov_b32_e32 v32, s46
; GFX9-NEXT:    v_mov_b32_e32 v31, s45
; GFX9-NEXT:    v_mov_b32_e32 v30, s44
; GFX9-NEXT:    v_mov_b32_e32 v29, s43
; GFX9-NEXT:    v_mov_b32_e32 v28, s42
; GFX9-NEXT:    s_branch .LBB29_3
; GFX9-NEXT:  .LBB29_2: ; %cmp.true
; GFX9-NEXT:    v_add_f32_e64 v27, s4, 1.0
; GFX9-NEXT:    v_add_f32_e64 v26, s5, 1.0
; GFX9-NEXT:    v_add_f32_e64 v25, s6, 1.0
; GFX9-NEXT:    v_add_f32_e64 v24, s7, 1.0
; GFX9-NEXT:    v_add_f32_e64 v23, s8, 1.0
; GFX9-NEXT:    v_add_f32_e64 v22, s9, 1.0
; GFX9-NEXT:    v_add_f32_e64 v21, s10, 1.0
; GFX9-NEXT:    v_add_f32_e64 v20, s11, 1.0
; GFX9-NEXT:    v_add_f32_e64 v19, s12, 1.0
; GFX9-NEXT:    v_add_f32_e64 v18, s13, 1.0
; GFX9-NEXT:    v_add_f32_e64 v17, s14, 1.0
; GFX9-NEXT:    v_add_f32_e64 v16, s15, 1.0
; GFX9-NEXT:    v_add_f32_e64 v15, s40, 1.0
; GFX9-NEXT:    v_add_f32_e64 v14, s41, 1.0
; GFX9-NEXT:    v_add_f32_e64 v13, s29, 1.0
; GFX9-NEXT:    v_add_f32_e64 v12, s28, 1.0
; GFX9-NEXT:    v_add_f32_e64 v11, s27, 1.0
; GFX9-NEXT:    v_add_f32_e64 v10, s26, 1.0
; GFX9-NEXT:    v_add_f32_e64 v9, s25, 1.0
; GFX9-NEXT:    v_add_f32_e64 v8, s24, 1.0
; GFX9-NEXT:    v_add_f32_e64 v7, s23, 1.0
; GFX9-NEXT:    v_add_f32_e64 v6, s22, 1.0
; GFX9-NEXT:    v_add_f32_e64 v5, s21, 1.0
; GFX9-NEXT:    v_add_f32_e64 v4, s20, 1.0
; GFX9-NEXT:    v_add_f32_e64 v3, s19, 1.0
; GFX9-NEXT:    v_add_f32_e64 v2, s18, 1.0
; GFX9-NEXT:    v_add_f32_e64 v1, s17, 1.0
; GFX9-NEXT:    v_add_f32_e64 v0, s16, 1.0
; GFX9-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX9-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX9-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX9-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX9-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX9-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX9-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX9-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX9-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX9-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX9-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX9-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX9-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX9-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX9-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX9-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX9-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; GFX9-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; GFX9-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; GFX9-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; GFX9-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; GFX9-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; GFX9-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; GFX9-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; GFX9-NEXT:  .LBB29_3: ; %end
; GFX9-NEXT:    v_lshlrev_b32_e32 v47, 16, v47
; GFX9-NEXT:    v_lshlrev_b32_e32 v46, 16, v46
; GFX9-NEXT:    v_lshlrev_b32_e32 v45, 16, v45
; GFX9-NEXT:    v_lshlrev_b32_e32 v44, 16, v44
; GFX9-NEXT:    v_lshlrev_b32_e32 v43, 16, v43
; GFX9-NEXT:    v_lshlrev_b32_e32 v42, 16, v42
; GFX9-NEXT:    v_lshlrev_b32_e32 v41, 16, v41
; GFX9-NEXT:    v_lshlrev_b32_e32 v40, 16, v40
; GFX9-NEXT:    v_or_b32_sdwa v0, v47, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v1, v46, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v2, v45, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v3, v44, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v4, v43, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v5, v42, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v6, v41, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v7, v40, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; GFX9-NEXT:    v_lshlrev_b32_e32 v55, 16, v55
; GFX9-NEXT:    v_lshlrev_b32_e32 v54, 16, v54
; GFX9-NEXT:    v_lshlrev_b32_e32 v53, 16, v53
; GFX9-NEXT:    v_lshlrev_b32_e32 v52, 16, v52
; GFX9-NEXT:    v_lshlrev_b32_e32 v51, 16, v51
; GFX9-NEXT:    v_lshlrev_b32_e32 v50, 16, v50
; GFX9-NEXT:    v_lshlrev_b32_e32 v49, 16, v49
; GFX9-NEXT:    v_lshlrev_b32_e32 v48, 16, v48
; GFX9-NEXT:    v_lshlrev_b32_e32 v39, 16, v39
; GFX9-NEXT:    v_lshlrev_b32_e32 v38, 16, v38
; GFX9-NEXT:    v_lshlrev_b32_e32 v37, 16, v37
; GFX9-NEXT:    v_lshlrev_b32_e32 v36, 16, v36
; GFX9-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; GFX9-NEXT:    v_lshlrev_b32_e32 v34, 16, v34
; GFX9-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; GFX9-NEXT:    v_lshlrev_b32_e32 v32, 16, v32
; GFX9-NEXT:    v_lshlrev_b32_e32 v31, 16, v31
; GFX9-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; GFX9-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; GFX9-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; GFX9-NEXT:    v_or_b32_sdwa v8, v55, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v9, v54, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v10, v53, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v11, v52, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v12, v51, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v13, v50, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v14, v49, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v15, v48, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v16, v39, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v17, v38, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v18, v37, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v19, v36, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v20, v35, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v21, v34, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v22, v33, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v23, v32, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v24, v31, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v25, v30, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v26, v29, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v27, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-TRUE16-LABEL: bitcast_v28f32_to_v56i16_scalar:
; GFX11-TRUE16:       ; %bb.0:
; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s14, v10
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s4, v9
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s5, v8
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s6, v7
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s7, v6
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s8, v5
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s9, v4
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s10, v3
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s11, v2
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s12, v1
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s13, v0
; GFX11-TRUE16-NEXT:    s_cmp_lg_u32 s14, 0
; GFX11-TRUE16-NEXT:    s_cbranch_scc0 .LBB29_2
; GFX11-TRUE16-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-TRUE16-NEXT:    s_lshr_b32 s14, s4, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s15, s5, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s40, s6, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s41, s7, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s42, s8, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s43, s9, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s44, s10, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s45, s11, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s46, s12, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s47, s13, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s56, s29, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s57, s28, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s58, s27, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s59, s26, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s60, s25, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s61, s24, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s62, s23, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s63, s22, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s72, s21, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s73, s20, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s74, s19, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s75, s18, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s76, s17, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s77, s16, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s78, s3, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s79, s2, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s88, s1, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s89, s0, 16
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v18, s13 :: v_dual_mov_b32 v19, s12
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v20, s11 :: v_dual_mov_b32 v21, s10
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v22, s9 :: v_dual_mov_b32 v23, s8
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s6
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s4
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v71, s89 :: v_dual_mov_b32 v70, s88
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v69, s79 :: v_dual_mov_b32 v68, s78
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v67, s77 :: v_dual_mov_b32 v66, s76
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v65, s75 :: v_dual_mov_b32 v64, s74
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v55, s73 :: v_dual_mov_b32 v54, s72
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v53, s63 :: v_dual_mov_b32 v52, s62
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v51, s61 :: v_dual_mov_b32 v50, s60
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v49, s59 :: v_dual_mov_b32 v48, s58
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v39, s57 :: v_dual_mov_b32 v38, s56
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v37, s47 :: v_dual_mov_b32 v36, s46
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v35, s45 :: v_dual_mov_b32 v34, s44
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v33, s43 :: v_dual_mov_b32 v32, s42
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v31, s41 :: v_dual_mov_b32 v30, s40
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v29, s15 :: v_dual_mov_b32 v28, s14
; GFX11-TRUE16-NEXT:    s_branch .LBB29_3
; GFX11-TRUE16-NEXT:  .LBB29_2: ; %cmp.true
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v27, s4, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v26, s5, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v25, s6, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v24, s7, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v23, s8, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v22, s9, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v21, s10, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v20, s11, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v19, s12, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v18, s13, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v17, s29, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v16, s28, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v15, s27, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v14, s26, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v13, s25, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v12, s24, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v11, s23, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v10, s22, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v9, s21, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v8, s20, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v7, s19, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v6, s18, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v5, s17, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v4, s16, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v3, s3, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v2, s2, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v1, s1, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v0, s0, 1.0
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v7
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v6
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v5
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v4
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v3
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v2
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v0
; GFX11-TRUE16-NEXT:  .LBB29_3: ; %end
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v0.h, v71.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v1.h, v70.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v2.h, v69.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v3.h, v68.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v4.h, v67.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v5.h, v66.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v6.h, v65.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v7.h, v64.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v8.h, v55.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v9.h, v54.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v10.h, v53.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v11.h, v52.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v12.h, v51.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v13.h, v50.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v14.h, v49.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v15.h, v48.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v16.h, v39.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v17.h, v38.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v18.h, v37.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v19.h, v36.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v20.h, v35.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v21.h, v34.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v22.h, v33.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v23.h, v32.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v24.h, v31.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v25.h, v30.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v26.h, v29.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v27.h, v28.l
; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v28f32_to_v56i16_scalar:
; GFX11-FAKE16:       ; %bb.0:
; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s14, v10
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s4, v9
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s5, v8
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s6, v7
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s7, v6
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s8, v5
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s9, v4
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s10, v3
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s11, v2
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s12, v1
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s13, v0
; GFX11-FAKE16-NEXT:    s_cmp_lg_u32 s14, 0
; GFX11-FAKE16-NEXT:    s_cbranch_scc0 .LBB29_2
; GFX11-FAKE16-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-FAKE16-NEXT:    s_lshr_b32 s14, s4, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s15, s5, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s40, s6, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s41, s7, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s42, s8, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s43, s9, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s44, s10, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s45, s11, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s46, s12, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s47, s13, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s56, s29, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s57, s28, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s58, s27, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s59, s26, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s60, s25, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s61, s24, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s62, s23, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s63, s22, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s72, s21, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s73, s20, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s74, s19, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s75, s18, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s76, s17, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s77, s16, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s78, s3, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s79, s2, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s88, s1, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s89, s0, 16
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v1, s1
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v7, s3
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v6, s16 :: v_dual_mov_b32 v5, s17
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v4, s18 :: v_dual_mov_b32 v3, s19
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v12, s20 :: v_dual_mov_b32 v11, s21
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s23
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v8, s24 :: v_dual_mov_b32 v17, s25
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v16, s26 :: v_dual_mov_b32 v15, s27
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v14, s28 :: v_dual_mov_b32 v13, s29
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v22, s13 :: v_dual_mov_b32 v21, s12
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v20, s11 :: v_dual_mov_b32 v19, s10
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v18, s9 :: v_dual_mov_b32 v27, s8
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v25, s6
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v23, s4
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v71, s89 :: v_dual_mov_b32 v70, s88
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v69, s79 :: v_dual_mov_b32 v68, s78
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v67, s77 :: v_dual_mov_b32 v66, s76
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v65, s75 :: v_dual_mov_b32 v64, s74
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v55, s73 :: v_dual_mov_b32 v54, s72
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v53, s63 :: v_dual_mov_b32 v52, s62
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v51, s61 :: v_dual_mov_b32 v50, s60
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v49, s59 :: v_dual_mov_b32 v48, s58
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v39, s57 :: v_dual_mov_b32 v38, s56
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v37, s47 :: v_dual_mov_b32 v36, s46
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v35, s45 :: v_dual_mov_b32 v34, s44
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v33, s43 :: v_dual_mov_b32 v32, s42
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v31, s41 :: v_dual_mov_b32 v30, s40
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v29, s15 :: v_dual_mov_b32 v28, s14
; GFX11-FAKE16-NEXT:    s_branch .LBB29_3
; GFX11-FAKE16-NEXT:  .LBB29_2: ; %cmp.true
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v23, s4, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v24, s5, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v25, s6, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v26, s7, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v27, s8, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v18, s9, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v19, s10, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v20, s11, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v21, s12, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v22, s13, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v13, s29, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v14, s28, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v15, s27, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v16, s26, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v17, s25, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v8, s24, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v9, s23, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v10, s22, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v11, s21, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v12, s20, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v3, s19, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v4, s18, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v5, s17, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v6, s16, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v7, s3, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v0, s2, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v1, s1, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v2, s0, 1.0
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v28, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v3
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v0
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v2
; GFX11-FAKE16-NEXT:  .LBB29_3: ; %end
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v2, 0xffff, v2
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v80, 0xffff, v0
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v7, 0xffff, v7
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v6, 0xffff, v6
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v0, v71, 16, v2
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v1, v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v2, v69, 16, v80
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v69, 0xffff, v4
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v70, 0xffff, v3
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v3, v68, 16, v7
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v4, v67, 16, v6
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v12, 0xffff, v12
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v6, v65, 16, v69
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v7, v64, 16, v70
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v11, 0xffff, v11
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v64, 0xffff, v9
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v65, 0xffff, v8
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v8, v55, 16, v12
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v17, 0xffff, v17
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v9, v54, 16, v11
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v11, v52, 16, v64
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v12, v51, 16, v65
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v16, 0xffff, v16
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v51, 0xffff, v14
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v52, 0xffff, v13
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v13, v50, 16, v17
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v22, 0xffff, v22
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v14, v49, 16, v16
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v16, v39, 16, v51
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v17, v38, 16, v52
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v21, 0xffff, v21
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v38, 0xffff, v19
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v39, 0xffff, v18
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v5, 0xffff, v5
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v10, 0xffff, v10
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v15, 0xffff, v15
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v20, 0xffff, v20
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v18, v37, 16, v22
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v19, v36, 16, v21
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v21, v34, 16, v38
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v22, v33, 16, v39
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v33, 0xffff, v24
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v34, 0xffff, v23
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v5, v66, 16, v5
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v10, v53, 16, v10
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v15, v48, 16, v15
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v20, v35, 16, v20
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v23, v32, 16, v27
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v24, v31, 16, v26
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v25, v30, 16, v25
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v26, v29, 16, v33
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v27, v28, 16, v34
; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = fadd <28 x float> %a, splat (float 1.000000e+00)
  %a2 = bitcast <28 x float> %a1 to <56 x i16>
  br label %end

cmp.false:
  %a3 = bitcast <28 x float> %a to <56 x i16>
  br label %end

end:
  %phi = phi <56 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <56 x i16> %phi
}

define <28 x float> @bitcast_v56i16_to_v28f32(<56 x i16> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v56i16_to_v28f32:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    v_mov_b32_e32 v37, v22
; SI-NEXT:    v_mov_b32_e32 v38, v21
; SI-NEXT:    v_mov_b32_e32 v39, v20
; SI-NEXT:    v_mov_b32_e32 v48, v19
; SI-NEXT:    v_mov_b32_e32 v49, v18
; SI-NEXT:    v_mov_b32_e32 v50, v17
; SI-NEXT:    v_mov_b32_e32 v51, v16
; SI-NEXT:    v_mov_b32_e32 v52, v15
; SI-NEXT:    v_mov_b32_e32 v53, v14
; SI-NEXT:    v_mov_b32_e32 v54, v13
; SI-NEXT:    v_mov_b32_e32 v55, v12
; SI-NEXT:    v_mov_b32_e32 v40, v11
; SI-NEXT:    v_mov_b32_e32 v41, v10
; SI-NEXT:    v_mov_b32_e32 v42, v9
; SI-NEXT:    v_mov_b32_e32 v43, v8
; SI-NEXT:    v_mov_b32_e32 v44, v7
; SI-NEXT:    v_mov_b32_e32 v45, v6
; SI-NEXT:    v_mov_b32_e32 v46, v5
; SI-NEXT:    v_mov_b32_e32 v47, v4
; SI-NEXT:    v_mov_b32_e32 v56, v3
; SI-NEXT:    s_waitcnt expcnt(6)
; SI-NEXT:    v_mov_b32_e32 v57, v2
; SI-NEXT:    s_waitcnt expcnt(5)
; SI-NEXT:    v_mov_b32_e32 v58, v1
; SI-NEXT:    s_waitcnt expcnt(4)
; SI-NEXT:    v_mov_b32_e32 v59, v0
; SI-NEXT:    buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v27
; SI-NEXT:    buffer_store_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT:    v_lshrrev_b32_e32 v1, 16, v26
; SI-NEXT:    buffer_store_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT:    v_lshrrev_b32_e32 v2, 16, v25
; SI-NEXT:    buffer_store_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT:    v_lshrrev_b32_e32 v3, 16, v24
; SI-NEXT:    buffer_store_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT:    v_lshrrev_b32_e32 v4, 16, v23
; SI-NEXT:    v_lshrrev_b32_e32 v5, 16, v37
; SI-NEXT:    v_lshrrev_b32_e32 v6, 16, v38
; SI-NEXT:    v_lshrrev_b32_e32 v7, 16, v39
; SI-NEXT:    v_lshrrev_b32_e32 v8, 16, v48
; SI-NEXT:    v_lshrrev_b32_e32 v9, 16, v49
; SI-NEXT:    v_lshrrev_b32_e32 v10, 16, v50
; SI-NEXT:    v_lshrrev_b32_e32 v11, 16, v51
; SI-NEXT:    v_lshrrev_b32_e32 v12, 16, v52
; SI-NEXT:    v_lshrrev_b32_e32 v13, 16, v53
; SI-NEXT:    v_lshrrev_b32_e32 v14, 16, v54
; SI-NEXT:    v_lshrrev_b32_e32 v15, 16, v55
; SI-NEXT:    v_lshrrev_b32_e32 v16, 16, v40
; SI-NEXT:    v_lshrrev_b32_e32 v17, 16, v41
; SI-NEXT:    v_lshrrev_b32_e32 v18, 16, v42
; SI-NEXT:    v_lshrrev_b32_e32 v19, 16, v43
; SI-NEXT:    v_lshrrev_b32_e32 v20, 16, v44
; SI-NEXT:    v_lshrrev_b32_e32 v21, 16, v45
; SI-NEXT:    v_lshrrev_b32_e32 v22, 16, v46
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v23, 16, v47
; SI-NEXT:    v_lshrrev_b32_e32 v24, 16, v56
; SI-NEXT:    v_lshrrev_b32_e32 v25, 16, v57
; SI-NEXT:    v_lshrrev_b32_e32 v26, 16, v58
; SI-NEXT:    v_lshrrev_b32_e32 v27, 16, v59
; SI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT:    v_lshlrev_b32_e32 v32, 16, v27
; SI-NEXT:    v_lshlrev_b32_e32 v36, 16, v26
; SI-NEXT:    v_lshlrev_b32_e32 v61, 16, v25
; SI-NEXT:    v_lshlrev_b32_e32 v35, 16, v24
; SI-NEXT:    v_lshlrev_b32_e32 v60, 16, v23
; SI-NEXT:    v_lshlrev_b32_e32 v34, 16, v22
; SI-NEXT:    v_lshlrev_b32_e32 v63, 16, v21
; SI-NEXT:    v_lshlrev_b32_e32 v33, 16, v20
; SI-NEXT:    v_lshlrev_b32_e32 v62, 16, v19
; SI-NEXT:    v_lshlrev_b32_e32 v18, 16, v18
; SI-NEXT:    v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT:    v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT:    v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT:    v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT:    v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT:    v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT:    v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT:    v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT:    v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT:    v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT:    v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT:    v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT:    v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT:    v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
; SI-NEXT:    buffer_store_dword v18, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v16, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v13, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v11, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v8, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v7, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v6, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v5, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v4, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT:    ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB30_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v19, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT:    v_and_b32_e32 v9, 0xffff, v42
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v59
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v58
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v57
; SI-NEXT:    v_and_b32_e32 v3, 0xffff, v56
; SI-NEXT:    v_and_b32_e32 v4, 0xffff, v47
; SI-NEXT:    v_and_b32_e32 v5, 0xffff, v46
; SI-NEXT:    v_and_b32_e32 v6, 0xffff, v45
; SI-NEXT:    v_and_b32_e32 v7, 0xffff, v44
; SI-NEXT:    v_and_b32_e32 v8, 0xffff, v43
; SI-NEXT:    v_or_b32_e32 v0, v0, v32
; SI-NEXT:    v_or_b32_e32 v1, v1, v36
; SI-NEXT:    v_or_b32_e32 v2, v2, v61
; SI-NEXT:    v_or_b32_e32 v3, v3, v35
; SI-NEXT:    v_or_b32_e32 v4, v4, v60
; SI-NEXT:    v_or_b32_e32 v5, v5, v34
; SI-NEXT:    v_or_b32_e32 v6, v6, v63
; SI-NEXT:    v_or_b32_e32 v7, v7, v33
; SI-NEXT:    v_or_b32_e32 v8, v8, v62
; SI-NEXT:    ; implicit-def: $vgpr59
; SI-NEXT:    ; implicit-def: $vgpr58
; SI-NEXT:    ; implicit-def: $vgpr57
; SI-NEXT:    ; implicit-def: $vgpr56
; SI-NEXT:    ; implicit-def: $vgpr47
; SI-NEXT:    ; implicit-def: $vgpr46
; SI-NEXT:    ; implicit-def: $vgpr45
; SI-NEXT:    ; implicit-def: $vgpr44
; SI-NEXT:    ; implicit-def: $vgpr43
; SI-NEXT:    ; implicit-def: $vgpr42
; SI-NEXT:    ; implicit-def: $vgpr32
; SI-NEXT:    ; implicit-def: $vgpr36
; SI-NEXT:    ; implicit-def: $vgpr61
; SI-NEXT:    ; implicit-def: $vgpr35
; SI-NEXT:    ; implicit-def: $vgpr60
; SI-NEXT:    ; implicit-def: $vgpr34
; SI-NEXT:    ; implicit-def: $vgpr63
; SI-NEXT:    ; implicit-def: $vgpr33
; SI-NEXT:    ; implicit-def: $vgpr62
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(14)
; SI-NEXT:    v_or_b32_e32 v9, v9, v10
; SI-NEXT:    v_and_b32_e32 v10, 0xffff, v41
; SI-NEXT:    v_or_b32_e32 v10, v10, v11
; SI-NEXT:    v_and_b32_e32 v11, 0xffff, v40
; SI-NEXT:    v_or_b32_e32 v11, v11, v12
; SI-NEXT:    v_and_b32_e32 v12, 0xffff, v55
; SI-NEXT:    v_or_b32_e32 v12, v12, v13
; SI-NEXT:    v_and_b32_e32 v13, 0xffff, v54
; SI-NEXT:    v_or_b32_e32 v13, v13, v14
; SI-NEXT:    v_and_b32_e32 v14, 0xffff, v53
; SI-NEXT:    s_waitcnt vmcnt(13)
; SI-NEXT:    v_or_b32_e32 v14, v14, v15
; SI-NEXT:    v_and_b32_e32 v15, 0xffff, v52
; SI-NEXT:    s_waitcnt vmcnt(12)
; SI-NEXT:    v_or_b32_e32 v15, v15, v16
; SI-NEXT:    v_and_b32_e32 v16, 0xffff, v51
; SI-NEXT:    s_waitcnt vmcnt(11)
; SI-NEXT:    v_or_b32_e32 v16, v16, v17
; SI-NEXT:    v_and_b32_e32 v17, 0xffff, v50
; SI-NEXT:    s_waitcnt vmcnt(10)
; SI-NEXT:    v_or_b32_e32 v17, v17, v18
; SI-NEXT:    v_and_b32_e32 v18, 0xffff, v49
; SI-NEXT:    s_waitcnt vmcnt(9)
; SI-NEXT:    v_or_b32_e32 v18, v18, v19
; SI-NEXT:    v_and_b32_e32 v19, 0xffff, v48
; SI-NEXT:    s_waitcnt vmcnt(8)
; SI-NEXT:    v_or_b32_e32 v19, v19, v20
; SI-NEXT:    v_and_b32_e32 v20, 0xffff, v39
; SI-NEXT:    s_waitcnt vmcnt(7)
; SI-NEXT:    v_or_b32_e32 v20, v20, v21
; SI-NEXT:    v_and_b32_e32 v21, 0xffff, v38
; SI-NEXT:    s_waitcnt vmcnt(6)
; SI-NEXT:    v_or_b32_e32 v21, v21, v22
; SI-NEXT:    v_and_b32_e32 v22, 0xffff, v37
; SI-NEXT:    s_waitcnt vmcnt(5)
; SI-NEXT:    v_or_b32_e32 v22, v22, v23
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT:    ; implicit-def: $vgpr41
; SI-NEXT:    ; implicit-def: $vgpr40
; SI-NEXT:    ; implicit-def: $vgpr55
; SI-NEXT:    ; implicit-def: $vgpr54
; SI-NEXT:    ; implicit-def: $vgpr53
; SI-NEXT:    ; implicit-def: $vgpr52
; SI-NEXT:    ; implicit-def: $vgpr51
; SI-NEXT:    ; implicit-def: $vgpr50
; SI-NEXT:    ; implicit-def: $vgpr49
; SI-NEXT:    ; implicit-def: $vgpr48
; SI-NEXT:    ; implicit-def: $vgpr39
; SI-NEXT:    ; implicit-def: $vgpr38
; SI-NEXT:    ; implicit-def: $vgpr37
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT:    v_or_b32_e32 v23, v23, v24
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT:    v_or_b32_e32 v24, v24, v25
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT:    v_or_b32_e32 v25, v25, v26
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT:    v_or_b32_e32 v26, v26, v27
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT:    v_or_b32_e32 v27, v27, v28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:  .LBB30_2: ; %Flow
; SI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB30_4
; SI-NEXT:  ; %bb.3: ; %cmp.true
; SI-NEXT:    buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v19, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT:    v_add_i32_e32 v9, vcc, 3, v42
; SI-NEXT:    v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_add_i32_e32 v0, vcc, 3, v59
; SI-NEXT:    v_add_i32_e32 v1, vcc, 3, v58
; SI-NEXT:    v_add_i32_e32 v2, vcc, 3, v57
; SI-NEXT:    v_add_i32_e32 v3, vcc, 3, v56
; SI-NEXT:    v_add_i32_e32 v4, vcc, 3, v47
; SI-NEXT:    v_add_i32_e32 v5, vcc, 3, v46
; SI-NEXT:    v_add_i32_e32 v6, vcc, 3, v45
; SI-NEXT:    v_add_i32_e32 v7, vcc, 3, v44
; SI-NEXT:    v_add_i32_e32 v8, vcc, 3, v43
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT:    v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT:    v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT:    v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT:    v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT:    v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT:    v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT:    v_or_b32_e32 v0, v32, v0
; SI-NEXT:    v_or_b32_e32 v1, v36, v1
; SI-NEXT:    v_or_b32_e32 v2, v61, v2
; SI-NEXT:    v_or_b32_e32 v3, v35, v3
; SI-NEXT:    v_or_b32_e32 v4, v60, v4
; SI-NEXT:    v_or_b32_e32 v5, v34, v5
; SI-NEXT:    v_or_b32_e32 v6, v63, v6
; SI-NEXT:    v_or_b32_e32 v7, v33, v7
; SI-NEXT:    v_or_b32_e32 v8, v62, v8
; SI-NEXT:    v_add_i32_e32 v0, vcc, 0x30000, v0
; SI-NEXT:    v_add_i32_e32 v1, vcc, 0x30000, v1
; SI-NEXT:    v_add_i32_e32 v2, vcc, 0x30000, v2
; SI-NEXT:    v_add_i32_e32 v3, vcc, 0x30000, v3
; SI-NEXT:    v_add_i32_e32 v4, vcc, 0x30000, v4
; SI-NEXT:    v_add_i32_e32 v5, vcc, 0x30000, v5
; SI-NEXT:    v_add_i32_e32 v6, vcc, 0x30000, v6
; SI-NEXT:    v_add_i32_e32 v7, vcc, 0x30000, v7
; SI-NEXT:    v_add_i32_e32 v8, vcc, 0x30000, v8
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(14)
; SI-NEXT:    v_or_b32_e32 v9, v10, v9
; SI-NEXT:    v_add_i32_e32 v10, vcc, 3, v41
; SI-NEXT:    v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT:    v_or_b32_e32 v10, v11, v10
; SI-NEXT:    v_add_i32_e32 v11, vcc, 3, v40
; SI-NEXT:    v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT:    v_or_b32_e32 v11, v12, v11
; SI-NEXT:    v_add_i32_e32 v12, vcc, 3, v55
; SI-NEXT:    v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT:    v_or_b32_e32 v12, v13, v12
; SI-NEXT:    v_add_i32_e32 v13, vcc, 3, v54
; SI-NEXT:    v_and_b32_e32 v13, 0xffff, v13
; SI-NEXT:    v_or_b32_e32 v13, v14, v13
; SI-NEXT:    v_add_i32_e32 v14, vcc, 3, v53
; SI-NEXT:    v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT:    s_waitcnt vmcnt(13)
; SI-NEXT:    v_or_b32_e32 v14, v15, v14
; SI-NEXT:    v_add_i32_e32 v15, vcc, 3, v52
; SI-NEXT:    v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT:    s_waitcnt vmcnt(12)
; SI-NEXT:    v_or_b32_e32 v15, v16, v15
; SI-NEXT:    v_add_i32_e32 v16, vcc, 3, v51
; SI-NEXT:    v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT:    s_waitcnt vmcnt(11)
; SI-NEXT:    v_or_b32_e32 v16, v17, v16
; SI-NEXT:    v_add_i32_e32 v17, vcc, 3, v50
; SI-NEXT:    v_and_b32_e32 v17, 0xffff, v17
; SI-NEXT:    s_waitcnt vmcnt(10)
; SI-NEXT:    v_or_b32_e32 v17, v18, v17
; SI-NEXT:    v_add_i32_e32 v18, vcc, 3, v49
; SI-NEXT:    v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT:    s_waitcnt vmcnt(9)
; SI-NEXT:    v_or_b32_e32 v18, v19, v18
; SI-NEXT:    v_add_i32_e32 v19, vcc, 3, v48
; SI-NEXT:    v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT:    s_waitcnt vmcnt(8)
; SI-NEXT:    v_or_b32_e32 v19, v20, v19
; SI-NEXT:    v_add_i32_e32 v20, vcc, 3, v39
; SI-NEXT:    v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT:    s_waitcnt vmcnt(7)
; SI-NEXT:    v_or_b32_e32 v20, v21, v20
; SI-NEXT:    v_add_i32_e32 v21, vcc, 3, v38
; SI-NEXT:    v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT:    s_waitcnt vmcnt(6)
; SI-NEXT:    v_or_b32_e32 v21, v22, v21
; SI-NEXT:    v_add_i32_e32 v22, vcc, 3, v37
; SI-NEXT:    v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT:    s_waitcnt vmcnt(5)
; SI-NEXT:    v_or_b32_e32 v22, v23, v22
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT:    v_add_i32_e32 v9, vcc, 0x30000, v9
; SI-NEXT:    v_add_i32_e32 v10, vcc, 0x30000, v10
; SI-NEXT:    v_add_i32_e32 v11, vcc, 0x30000, v11
; SI-NEXT:    v_add_i32_e32 v12, vcc, 0x30000, v12
; SI-NEXT:    v_add_i32_e32 v13, vcc, 0x30000, v13
; SI-NEXT:    v_add_i32_e32 v14, vcc, 0x30000, v14
; SI-NEXT:    v_add_i32_e32 v15, vcc, 0x30000, v15
; SI-NEXT:    v_add_i32_e32 v16, vcc, 0x30000, v16
; SI-NEXT:    v_add_i32_e32 v17, vcc, 0x30000, v17
; SI-NEXT:    v_add_i32_e32 v18, vcc, 0x30000, v18
; SI-NEXT:    v_add_i32_e32 v19, vcc, 0x30000, v19
; SI-NEXT:    v_add_i32_e32 v20, vcc, 0x30000, v20
; SI-NEXT:    v_add_i32_e32 v21, vcc, 0x30000, v21
; SI-NEXT:    v_add_i32_e32 v22, vcc, 0x30000, v22
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_add_i32_e32 v23, vcc, 3, v23
; SI-NEXT:    v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT:    v_or_b32_e32 v23, v24, v23
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT:    v_add_i32_e32 v23, vcc, 0x30000, v23
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_add_i32_e32 v24, vcc, 3, v24
; SI-NEXT:    v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT:    v_or_b32_e32 v24, v25, v24
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT:    v_add_i32_e32 v24, vcc, 0x30000, v24
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_add_i32_e32 v25, vcc, 3, v25
; SI-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT:    v_or_b32_e32 v25, v26, v25
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT:    v_add_i32_e32 v25, vcc, 0x30000, v25
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_add_i32_e32 v26, vcc, 3, v26
; SI-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT:    v_or_b32_e32 v26, v27, v26
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT:    v_add_i32_e32 v26, vcc, 0x30000, v26
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_add_i32_e32 v27, vcc, 3, v27
; SI-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT:    v_or_b32_e32 v27, v28, v27
; SI-NEXT:    v_add_i32_e32 v27, vcc, 0x30000, v27
; SI-NEXT:  .LBB30_4: ; %end
; SI-NEXT:    s_or_b64 exec, exec, s[4:5]
; SI-NEXT:    buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v56i16_to_v28f32:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v56, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v58, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v59, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    v_mov_b32_e32 v32, v27
; VI-NEXT:    v_mov_b32_e32 v33, v26
; VI-NEXT:    v_mov_b32_e32 v34, v25
; VI-NEXT:    v_mov_b32_e32 v35, v24
; VI-NEXT:    v_mov_b32_e32 v36, v23
; VI-NEXT:    v_mov_b32_e32 v37, v22
; VI-NEXT:    v_mov_b32_e32 v38, v21
; VI-NEXT:    v_mov_b32_e32 v39, v20
; VI-NEXT:    v_mov_b32_e32 v48, v19
; VI-NEXT:    v_mov_b32_e32 v49, v18
; VI-NEXT:    v_mov_b32_e32 v50, v17
; VI-NEXT:    v_mov_b32_e32 v51, v16
; VI-NEXT:    v_mov_b32_e32 v52, v15
; VI-NEXT:    v_mov_b32_e32 v53, v14
; VI-NEXT:    v_mov_b32_e32 v54, v13
; VI-NEXT:    v_mov_b32_e32 v55, v12
; VI-NEXT:    v_mov_b32_e32 v40, v11
; VI-NEXT:    v_mov_b32_e32 v41, v10
; VI-NEXT:    v_mov_b32_e32 v42, v9
; VI-NEXT:    v_mov_b32_e32 v43, v8
; VI-NEXT:    v_mov_b32_e32 v44, v7
; VI-NEXT:    v_mov_b32_e32 v45, v6
; VI-NEXT:    v_mov_b32_e32 v46, v5
; VI-NEXT:    v_mov_b32_e32 v47, v4
; VI-NEXT:    v_mov_b32_e32 v56, v3
; VI-NEXT:    v_mov_b32_e32 v57, v2
; VI-NEXT:    v_mov_b32_e32 v58, v1
; VI-NEXT:    v_mov_b32_e32 v59, v0
; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT:    ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; VI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB30_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    v_mov_b32_e32 v27, 16
; VI-NEXT:    v_lshlrev_b32_sdwa v0, v27, v59 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v1, v27, v58 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v2, v27, v57 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v3, v27, v56 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v4, v27, v47 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v5, v27, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v6, v27, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v7, v27, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v8, v27, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v9, v27, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v10, v27, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v11, v27, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v12, v27, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v13, v27, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v14, v27, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v15, v27, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v16, v27, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v17, v27, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v18, v27, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v19, v27, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v20, v27, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v21, v27, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v22, v27, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v23, v27, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v24, v27, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v25, v27, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v26, v27, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v27, v27, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_or_b32_sdwa v0, v59, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v1, v58, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v2, v57, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v3, v56, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v4, v47, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v5, v46, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v6, v45, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v7, v44, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v8, v43, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v9, v42, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v10, v41, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v11, v40, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v12, v55, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v13, v54, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v14, v53, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v15, v52, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v16, v51, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v17, v50, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v18, v49, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v19, v48, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v20, v39, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v21, v38, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v22, v37, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v23, v36, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v24, v35, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v25, v34, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v26, v33, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v27, v32, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    ; implicit-def: $vgpr59
; VI-NEXT:    ; implicit-def: $vgpr58
; VI-NEXT:    ; implicit-def: $vgpr57
; VI-NEXT:    ; implicit-def: $vgpr56
; VI-NEXT:    ; implicit-def: $vgpr47
; VI-NEXT:    ; implicit-def: $vgpr46
; VI-NEXT:    ; implicit-def: $vgpr45
; VI-NEXT:    ; implicit-def: $vgpr44
; VI-NEXT:    ; implicit-def: $vgpr43
; VI-NEXT:    ; implicit-def: $vgpr42
; VI-NEXT:    ; implicit-def: $vgpr41
; VI-NEXT:    ; implicit-def: $vgpr40
; VI-NEXT:    ; implicit-def: $vgpr55
; VI-NEXT:    ; implicit-def: $vgpr54
; VI-NEXT:    ; implicit-def: $vgpr53
; VI-NEXT:    ; implicit-def: $vgpr52
; VI-NEXT:    ; implicit-def: $vgpr51
; VI-NEXT:    ; implicit-def: $vgpr50
; VI-NEXT:    ; implicit-def: $vgpr49
; VI-NEXT:    ; implicit-def: $vgpr48
; VI-NEXT:    ; implicit-def: $vgpr39
; VI-NEXT:    ; implicit-def: $vgpr38
; VI-NEXT:    ; implicit-def: $vgpr37
; VI-NEXT:    ; implicit-def: $vgpr36
; VI-NEXT:    ; implicit-def: $vgpr35
; VI-NEXT:    ; implicit-def: $vgpr34
; VI-NEXT:    ; implicit-def: $vgpr33
; VI-NEXT:    ; implicit-def: $vgpr32
; VI-NEXT:  .LBB30_2: ; %Flow
; VI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB30_4
; VI-NEXT:  ; %bb.3: ; %cmp.true
; VI-NEXT:    v_mov_b32_e32 v27, 3
; VI-NEXT:    v_add_u16_e32 v0, 3, v59
; VI-NEXT:    v_add_u16_sdwa v1, v59, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_u16_e32 v2, 3, v58
; VI-NEXT:    v_add_u16_sdwa v3, v58, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v0, v0, v1
; VI-NEXT:    v_or_b32_e32 v1, v2, v3
; VI-NEXT:    v_add_u16_e32 v2, 3, v57
; VI-NEXT:    v_add_u16_sdwa v3, v57, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v2, v2, v3
; VI-NEXT:    v_add_u16_e32 v3, 3, v56
; VI-NEXT:    v_add_u16_sdwa v4, v56, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v3, v3, v4
; VI-NEXT:    v_add_u16_e32 v4, 3, v47
; VI-NEXT:    v_add_u16_sdwa v5, v47, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v4, v4, v5
; VI-NEXT:    v_add_u16_e32 v5, 3, v46
; VI-NEXT:    v_add_u16_sdwa v6, v46, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v5, v5, v6
; VI-NEXT:    v_add_u16_e32 v6, 3, v45
; VI-NEXT:    v_add_u16_sdwa v7, v45, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v6, v6, v7
; VI-NEXT:    v_add_u16_e32 v7, 3, v44
; VI-NEXT:    v_add_u16_sdwa v8, v44, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v7, v7, v8
; VI-NEXT:    v_add_u16_e32 v8, 3, v43
; VI-NEXT:    v_add_u16_sdwa v9, v43, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v8, v8, v9
; VI-NEXT:    v_add_u16_e32 v9, 3, v42
; VI-NEXT:    v_add_u16_sdwa v10, v42, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v9, v9, v10
; VI-NEXT:    v_add_u16_e32 v10, 3, v41
; VI-NEXT:    v_add_u16_sdwa v11, v41, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v10, v10, v11
; VI-NEXT:    v_add_u16_e32 v11, 3, v40
; VI-NEXT:    v_add_u16_sdwa v12, v40, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v11, v11, v12
; VI-NEXT:    v_add_u16_e32 v12, 3, v55
; VI-NEXT:    v_add_u16_sdwa v13, v55, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v12, v12, v13
; VI-NEXT:    v_add_u16_e32 v13, 3, v54
; VI-NEXT:    v_add_u16_sdwa v14, v54, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v13, v13, v14
; VI-NEXT:    v_add_u16_e32 v14, 3, v53
; VI-NEXT:    v_add_u16_sdwa v15, v53, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v14, v14, v15
; VI-NEXT:    v_add_u16_e32 v15, 3, v52
; VI-NEXT:    v_add_u16_sdwa v16, v52, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v15, v15, v16
; VI-NEXT:    v_add_u16_e32 v16, 3, v51
; VI-NEXT:    v_add_u16_sdwa v17, v51, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v16, v16, v17
; VI-NEXT:    v_add_u16_e32 v17, 3, v50
; VI-NEXT:    v_add_u16_sdwa v18, v50, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v17, v17, v18
; VI-NEXT:    v_add_u16_e32 v18, 3, v49
; VI-NEXT:    v_add_u16_sdwa v19, v49, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v18, v18, v19
; VI-NEXT:    v_add_u16_e32 v19, 3, v48
; VI-NEXT:    v_add_u16_sdwa v20, v48, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v19, v19, v20
; VI-NEXT:    v_add_u16_e32 v20, 3, v39
; VI-NEXT:    v_add_u16_sdwa v21, v39, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v20, v20, v21
; VI-NEXT:    v_add_u16_e32 v21, 3, v38
; VI-NEXT:    v_add_u16_sdwa v22, v38, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v21, v21, v22
; VI-NEXT:    v_add_u16_e32 v22, 3, v37
; VI-NEXT:    v_add_u16_sdwa v23, v37, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v22, v22, v23
; VI-NEXT:    v_add_u16_e32 v23, 3, v36
; VI-NEXT:    v_add_u16_sdwa v24, v36, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v23, v23, v24
; VI-NEXT:    v_add_u16_e32 v24, 3, v35
; VI-NEXT:    v_add_u16_sdwa v25, v35, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v24, v24, v25
; VI-NEXT:    v_add_u16_e32 v25, 3, v34
; VI-NEXT:    v_add_u16_sdwa v26, v34, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v25, v25, v26
; VI-NEXT:    v_add_u16_e32 v26, 3, v33
; VI-NEXT:    v_add_u16_sdwa v28, v33, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v26, v26, v28
; VI-NEXT:    v_add_u16_e32 v28, 3, v32
; VI-NEXT:    v_add_u16_sdwa v27, v32, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v27, v28, v27
; VI-NEXT:  .LBB30_4: ; %end
; VI-NEXT:    s_or_b64 exec, exec, s[4:5]
; VI-NEXT:    buffer_load_dword v59, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v58, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v57, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v56, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v56i16_to_v28f32:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    v_mov_b32_e32 v59, v0
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v27
; GFX9-NEXT:    v_mov_b32_e32 v34, v25
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v26
; GFX9-NEXT:    v_mov_b32_e32 v35, v24
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v34
; GFX9-NEXT:    v_mov_b32_e32 v36, v23
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT:    v_mov_b32_e32 v37, v22
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT:    v_mov_b32_e32 v38, v21
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT:    v_mov_b32_e32 v39, v20
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT:    v_mov_b32_e32 v48, v19
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT:    v_mov_b32_e32 v49, v18
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT:    v_mov_b32_e32 v50, v17
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT:    v_mov_b32_e32 v51, v16
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT:    v_mov_b32_e32 v52, v15
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT:    v_mov_b32_e32 v53, v14
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT:    v_mov_b32_e32 v54, v13
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT:    v_mov_b32_e32 v55, v12
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT:    v_mov_b32_e32 v40, v11
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT:    v_mov_b32_e32 v41, v10
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT:    v_mov_b32_e32 v42, v9
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT:    v_mov_b32_e32 v43, v8
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT:    v_mov_b32_e32 v44, v7
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT:    v_mov_b32_e32 v45, v6
; GFX9-NEXT:    v_mov_b32_e32 v46, v5
; GFX9-NEXT:    v_mov_b32_e32 v47, v4
; GFX9-NEXT:    v_mov_b32_e32 v56, v3
; GFX9-NEXT:    v_mov_b32_e32 v57, v2
; GFX9-NEXT:    v_mov_b32_e32 v58, v1
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v44
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v45
; GFX9-NEXT:    v_lshrrev_b32_e32 v62, 16, v46
; GFX9-NEXT:    v_lshrrev_b32_e32 v63, 16, v47
; GFX9-NEXT:    v_lshrrev_b32_e32 v60, 16, v56
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v57
; GFX9-NEXT:    v_lshrrev_b32_e32 v61, 16, v58
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v59
; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT:    buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT:    ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB30_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT:    s_mov_b32 s6, 0x5040100
; GFX9-NEXT:    v_lshrrev_b32_e32 v6, 16, v45
; GFX9-NEXT:    v_lshrrev_b32_e32 v7, 16, v44
; GFX9-NEXT:    v_lshrrev_b32_e32 v8, 16, v43
; GFX9-NEXT:    v_lshrrev_b32_e32 v9, 16, v42
; GFX9-NEXT:    v_lshrrev_b32_e32 v10, 16, v41
; GFX9-NEXT:    v_lshrrev_b32_e32 v11, 16, v40
; GFX9-NEXT:    v_lshrrev_b32_e32 v12, 16, v55
; GFX9-NEXT:    v_lshrrev_b32_e32 v13, 16, v54
; GFX9-NEXT:    v_lshrrev_b32_e32 v14, 16, v53
; GFX9-NEXT:    v_lshrrev_b32_e32 v15, 16, v52
; GFX9-NEXT:    v_lshrrev_b32_e32 v16, 16, v51
; GFX9-NEXT:    v_lshrrev_b32_e32 v17, 16, v50
; GFX9-NEXT:    v_lshrrev_b32_e32 v18, 16, v49
; GFX9-NEXT:    v_lshrrev_b32_e32 v19, 16, v48
; GFX9-NEXT:    v_lshrrev_b32_e32 v20, 16, v39
; GFX9-NEXT:    v_lshrrev_b32_e32 v21, 16, v38
; GFX9-NEXT:    v_lshrrev_b32_e32 v22, 16, v37
; GFX9-NEXT:    v_lshrrev_b32_e32 v23, 16, v36
; GFX9-NEXT:    v_lshrrev_b32_e32 v24, 16, v35
; GFX9-NEXT:    v_lshrrev_b32_e32 v25, 16, v34
; GFX9-NEXT:    v_perm_b32 v0, v33, v59, s6
; GFX9-NEXT:    v_perm_b32 v1, v61, v58, s6
; GFX9-NEXT:    v_perm_b32 v2, v32, v57, s6
; GFX9-NEXT:    v_perm_b32 v3, v60, v56, s6
; GFX9-NEXT:    v_perm_b32 v4, v63, v47, s6
; GFX9-NEXT:    v_perm_b32 v5, v62, v46, s6
; GFX9-NEXT:    v_perm_b32 v6, v6, v45, s6
; GFX9-NEXT:    v_perm_b32 v7, v7, v44, s6
; GFX9-NEXT:    v_perm_b32 v8, v8, v43, s6
; GFX9-NEXT:    v_perm_b32 v9, v9, v42, s6
; GFX9-NEXT:    v_perm_b32 v10, v10, v41, s6
; GFX9-NEXT:    v_perm_b32 v11, v11, v40, s6
; GFX9-NEXT:    v_perm_b32 v12, v12, v55, s6
; GFX9-NEXT:    v_perm_b32 v13, v13, v54, s6
; GFX9-NEXT:    v_perm_b32 v14, v14, v53, s6
; GFX9-NEXT:    v_perm_b32 v15, v15, v52, s6
; GFX9-NEXT:    v_perm_b32 v16, v16, v51, s6
; GFX9-NEXT:    v_perm_b32 v17, v17, v50, s6
; GFX9-NEXT:    v_perm_b32 v18, v18, v49, s6
; GFX9-NEXT:    v_perm_b32 v19, v19, v48, s6
; GFX9-NEXT:    v_perm_b32 v20, v20, v39, s6
; GFX9-NEXT:    v_perm_b32 v21, v21, v38, s6
; GFX9-NEXT:    v_perm_b32 v22, v22, v37, s6
; GFX9-NEXT:    v_perm_b32 v23, v23, v36, s6
; GFX9-NEXT:    v_perm_b32 v24, v24, v35, s6
; GFX9-NEXT:    v_perm_b32 v25, v25, v34, s6
; GFX9-NEXT:    ; implicit-def: $vgpr59
; GFX9-NEXT:    ; implicit-def: $vgpr58
; GFX9-NEXT:    ; implicit-def: $vgpr57
; GFX9-NEXT:    ; implicit-def: $vgpr56
; GFX9-NEXT:    ; implicit-def: $vgpr47
; GFX9-NEXT:    ; implicit-def: $vgpr46
; GFX9-NEXT:    ; implicit-def: $vgpr45
; GFX9-NEXT:    ; implicit-def: $vgpr44
; GFX9-NEXT:    ; implicit-def: $vgpr43
; GFX9-NEXT:    ; implicit-def: $vgpr42
; GFX9-NEXT:    ; implicit-def: $vgpr41
; GFX9-NEXT:    ; implicit-def: $vgpr40
; GFX9-NEXT:    ; implicit-def: $vgpr55
; GFX9-NEXT:    ; implicit-def: $vgpr54
; GFX9-NEXT:    ; implicit-def: $vgpr53
; GFX9-NEXT:    ; implicit-def: $vgpr52
; GFX9-NEXT:    ; implicit-def: $vgpr51
; GFX9-NEXT:    ; implicit-def: $vgpr50
; GFX9-NEXT:    ; implicit-def: $vgpr49
; GFX9-NEXT:    ; implicit-def: $vgpr48
; GFX9-NEXT:    ; implicit-def: $vgpr39
; GFX9-NEXT:    ; implicit-def: $vgpr38
; GFX9-NEXT:    ; implicit-def: $vgpr37
; GFX9-NEXT:    ; implicit-def: $vgpr36
; GFX9-NEXT:    ; implicit-def: $vgpr35
; GFX9-NEXT:    ; implicit-def: $vgpr34
; GFX9-NEXT:    ; implicit-def: $vgpr62
; GFX9-NEXT:    ; implicit-def: $vgpr63
; GFX9-NEXT:    ; implicit-def: $vgpr60
; GFX9-NEXT:    ; implicit-def: $vgpr32
; GFX9-NEXT:    ; implicit-def: $vgpr61
; GFX9-NEXT:    ; implicit-def: $vgpr33
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:  .LBB30_2: ; %Flow
; GFX9-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB30_4
; GFX9-NEXT:  ; %bb.3: ; %cmp.true
; GFX9-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT:    s_mov_b32 s6, 0x5040100
; GFX9-NEXT:    buffer_load_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v7, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v8, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v14, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v19, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT:    v_perm_b32 v0, v33, v59, s6
; GFX9-NEXT:    v_perm_b32 v1, v61, v58, s6
; GFX9-NEXT:    v_perm_b32 v2, v32, v57, s6
; GFX9-NEXT:    v_perm_b32 v3, v60, v56, s6
; GFX9-NEXT:    v_perm_b32 v4, v63, v47, s6
; GFX9-NEXT:    v_perm_b32 v5, v62, v46, s6
; GFX9-NEXT:    v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_waitcnt vmcnt(20)
; GFX9-NEXT:    v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT:    s_waitcnt vmcnt(21)
; GFX9-NEXT:    v_perm_b32 v6, v6, v45, s6
; GFX9-NEXT:    s_waitcnt vmcnt(20)
; GFX9-NEXT:    v_perm_b32 v7, v7, v44, s6
; GFX9-NEXT:    s_waitcnt vmcnt(19)
; GFX9-NEXT:    v_perm_b32 v8, v8, v43, s6
; GFX9-NEXT:    s_waitcnt vmcnt(18)
; GFX9-NEXT:    v_perm_b32 v9, v9, v42, s6
; GFX9-NEXT:    s_waitcnt vmcnt(17)
; GFX9-NEXT:    v_perm_b32 v10, v10, v41, s6
; GFX9-NEXT:    s_waitcnt vmcnt(16)
; GFX9-NEXT:    v_perm_b32 v11, v11, v40, s6
; GFX9-NEXT:    s_waitcnt vmcnt(15)
; GFX9-NEXT:    v_perm_b32 v12, v12, v55, s6
; GFX9-NEXT:    s_waitcnt vmcnt(14)
; GFX9-NEXT:    v_perm_b32 v13, v13, v54, s6
; GFX9-NEXT:    s_waitcnt vmcnt(13)
; GFX9-NEXT:    v_perm_b32 v14, v14, v53, s6
; GFX9-NEXT:    s_waitcnt vmcnt(12)
; GFX9-NEXT:    v_perm_b32 v15, v15, v52, s6
; GFX9-NEXT:    s_waitcnt vmcnt(11)
; GFX9-NEXT:    v_perm_b32 v16, v16, v51, s6
; GFX9-NEXT:    s_waitcnt vmcnt(10)
; GFX9-NEXT:    v_perm_b32 v17, v17, v50, s6
; GFX9-NEXT:    s_waitcnt vmcnt(9)
; GFX9-NEXT:    v_perm_b32 v18, v18, v49, s6
; GFX9-NEXT:    s_waitcnt vmcnt(8)
; GFX9-NEXT:    v_perm_b32 v19, v19, v48, s6
; GFX9-NEXT:    s_waitcnt vmcnt(7)
; GFX9-NEXT:    v_perm_b32 v20, v20, v39, s6
; GFX9-NEXT:    s_waitcnt vmcnt(6)
; GFX9-NEXT:    v_perm_b32 v21, v21, v38, s6
; GFX9-NEXT:    s_waitcnt vmcnt(5)
; GFX9-NEXT:    v_perm_b32 v22, v22, v37, s6
; GFX9-NEXT:    s_waitcnt vmcnt(4)
; GFX9-NEXT:    v_perm_b32 v23, v23, v36, s6
; GFX9-NEXT:    s_waitcnt vmcnt(3)
; GFX9-NEXT:    v_perm_b32 v24, v24, v35, s6
; GFX9-NEXT:    s_waitcnt vmcnt(2)
; GFX9-NEXT:    v_perm_b32 v25, v25, v34, s6
; GFX9-NEXT:    v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT:    v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
; GFX9-NEXT:  .LBB30_4: ; %end
; GFX9-NEXT:    s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT:    buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-TRUE16-LABEL: bitcast_v56i16_to_v28f32:
; GFX11-TRUE16:       ; %bb.0:
; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-TRUE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT:    s_cbranch_execz .LBB30_2
; GFX11-TRUE16-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:  .LBB30_2: ; %end
; GFX11-TRUE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v56i16_to_v28f32:
; GFX11-FAKE16:       ; %bb.0:
; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v0
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v2
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v80, 16, v3
; GFX11-FAKE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v28
; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v69, v0, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v1, v70, v1, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v2, v71, v2, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v3, v80, v3, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v4, v68, v4, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v5, v67, v5, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v6, v66, v6, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v7, v65, v7, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v8, v64, v8, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v9, v55, v9, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v10, v54, v10, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v11, v53, v11, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v12, v52, v12, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v13, v51, v13, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v14, v50, v14, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v15, v49, v15, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v16, v48, v16, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v17, v39, v17, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v18, v38, v18, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v19, v37, v19, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v20, v36, v20, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v21, v35, v21, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v22, v34, v22, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v23, v33, v23, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v24, v32, v24, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v25, v31, v25, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v26, v30, v26, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v27, v29, v27, 0x5040100
; GFX11-FAKE16-NEXT:    s_and_saveexec_b32 s0, vcc_lo
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-FAKE16-NEXT:    s_cbranch_execz .LBB30_2
; GFX11-FAKE16-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:  .LBB30_2: ; %end
; GFX11-FAKE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = add <56 x i16> %a, splat (i16 3)
  %a2 = bitcast <56 x i16> %a1 to <28 x float>
  br label %end

cmp.false:
  %a3 = bitcast <56 x i16> %a to <28 x float>
  br label %end

end:
  %phi = phi <28 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <28 x float> %phi
}

define inreg <28 x float> @bitcast_v56i16_to_v28f32_scalar(<56 x i16> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v56i16_to_v28f32_scalar:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    v_readfirstlane_b32 s41, v13
; SI-NEXT:    v_readfirstlane_b32 s43, v12
; SI-NEXT:    v_readfirstlane_b32 s45, v11
; SI-NEXT:    v_readfirstlane_b32 s47, v10
; SI-NEXT:    v_readfirstlane_b32 s57, v9
; SI-NEXT:    v_readfirstlane_b32 s59, v8
; SI-NEXT:    v_readfirstlane_b32 s61, v7
; SI-NEXT:    v_readfirstlane_b32 s63, v6
; SI-NEXT:    v_readfirstlane_b32 s73, v5
; SI-NEXT:    v_readfirstlane_b32 s75, v4
; SI-NEXT:    v_readfirstlane_b32 s78, v3
; SI-NEXT:    v_readfirstlane_b32 s89, v2
; SI-NEXT:    v_readfirstlane_b32 s91, v1
; SI-NEXT:    v_readfirstlane_b32 s93, v0
; SI-NEXT:    s_lshr_b32 s76, s29, 16
; SI-NEXT:    s_lshr_b32 s79, s28, 16
; SI-NEXT:    s_lshr_b32 s15, s27, 16
; SI-NEXT:    s_lshr_b32 s14, s26, 16
; SI-NEXT:    s_lshr_b32 s13, s25, 16
; SI-NEXT:    s_lshr_b32 s12, s24, 16
; SI-NEXT:    s_lshr_b32 s11, s23, 16
; SI-NEXT:    s_lshr_b32 s10, s22, 16
; SI-NEXT:    s_lshr_b32 s9, s21, 16
; SI-NEXT:    s_lshr_b32 s8, s20, 16
; SI-NEXT:    s_lshr_b32 s7, s19, 16
; SI-NEXT:    s_lshr_b32 s6, s18, 16
; SI-NEXT:    s_lshr_b32 s5, s17, 16
; SI-NEXT:    s_lshr_b32 s4, s16, 16
; SI-NEXT:    s_lshr_b32 s40, s41, 16
; SI-NEXT:    s_lshr_b32 s42, s43, 16
; SI-NEXT:    s_lshr_b32 s44, s45, 16
; SI-NEXT:    s_lshr_b32 s46, s47, 16
; SI-NEXT:    s_lshr_b32 s56, s57, 16
; SI-NEXT:    s_lshr_b32 s58, s59, 16
; SI-NEXT:    s_lshr_b32 s60, s61, 16
; SI-NEXT:    s_lshr_b32 s62, s63, 16
; SI-NEXT:    s_lshr_b32 s72, s73, 16
; SI-NEXT:    s_lshr_b32 s74, s75, 16
; SI-NEXT:    s_lshr_b32 s77, s78, 16
; SI-NEXT:    s_lshr_b32 s88, s89, 16
; SI-NEXT:    s_lshr_b32 s90, s91, 16
; SI-NEXT:    s_lshr_b32 s92, s93, 16
; SI-NEXT:    v_readfirstlane_b32 s94, v14
; SI-NEXT:    s_cmp_lg_u32 s94, 0
; SI-NEXT:    s_cbranch_scc0 .LBB31_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    s_and_b32 s16, s16, 0xffff
; SI-NEXT:    s_lshl_b32 s4, s4, 16
; SI-NEXT:    s_or_b32 s4, s16, s4
; SI-NEXT:    s_and_b32 s16, s17, 0xffff
; SI-NEXT:    s_lshl_b32 s5, s5, 16
; SI-NEXT:    s_or_b32 s5, s16, s5
; SI-NEXT:    s_and_b32 s16, s18, 0xffff
; SI-NEXT:    s_lshl_b32 s6, s6, 16
; SI-NEXT:    s_or_b32 s6, s16, s6
; SI-NEXT:    s_and_b32 s16, s19, 0xffff
; SI-NEXT:    s_lshl_b32 s7, s7, 16
; SI-NEXT:    s_or_b32 s7, s16, s7
; SI-NEXT:    s_and_b32 s16, s20, 0xffff
; SI-NEXT:    s_lshl_b32 s8, s8, 16
; SI-NEXT:    s_or_b32 s8, s16, s8
; SI-NEXT:    s_and_b32 s16, s21, 0xffff
; SI-NEXT:    s_lshl_b32 s9, s9, 16
; SI-NEXT:    s_or_b32 s9, s16, s9
; SI-NEXT:    s_and_b32 s16, s22, 0xffff
; SI-NEXT:    s_lshl_b32 s10, s10, 16
; SI-NEXT:    s_or_b32 s10, s16, s10
; SI-NEXT:    s_and_b32 s16, s23, 0xffff
; SI-NEXT:    s_lshl_b32 s11, s11, 16
; SI-NEXT:    s_or_b32 s11, s16, s11
; SI-NEXT:    s_and_b32 s16, s24, 0xffff
; SI-NEXT:    s_lshl_b32 s12, s12, 16
; SI-NEXT:    s_or_b32 s12, s16, s12
; SI-NEXT:    s_and_b32 s16, s25, 0xffff
; SI-NEXT:    s_lshl_b32 s13, s13, 16
; SI-NEXT:    s_or_b32 s13, s16, s13
; SI-NEXT:    s_and_b32 s16, s26, 0xffff
; SI-NEXT:    s_lshl_b32 s14, s14, 16
; SI-NEXT:    s_or_b32 s14, s16, s14
; SI-NEXT:    s_and_b32 s16, s27, 0xffff
; SI-NEXT:    s_lshl_b32 s15, s15, 16
; SI-NEXT:    s_or_b32 s15, s16, s15
; SI-NEXT:    s_and_b32 s16, s28, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s79, 16
; SI-NEXT:    s_or_b32 s16, s16, s17
; SI-NEXT:    s_and_b32 s17, s29, 0xffff
; SI-NEXT:    s_lshl_b32 s18, s76, 16
; SI-NEXT:    s_or_b32 s17, s17, s18
; SI-NEXT:    s_and_b32 s18, s93, 0xffff
; SI-NEXT:    s_lshl_b32 s19, s92, 16
; SI-NEXT:    s_or_b32 s18, s18, s19
; SI-NEXT:    s_and_b32 s19, s91, 0xffff
; SI-NEXT:    s_lshl_b32 s20, s90, 16
; SI-NEXT:    s_or_b32 s19, s19, s20
; SI-NEXT:    s_and_b32 s20, s89, 0xffff
; SI-NEXT:    s_lshl_b32 s21, s88, 16
; SI-NEXT:    s_or_b32 s20, s20, s21
; SI-NEXT:    s_and_b32 s21, s78, 0xffff
; SI-NEXT:    s_lshl_b32 s22, s77, 16
; SI-NEXT:    s_or_b32 s21, s21, s22
; SI-NEXT:    s_and_b32 s22, s75, 0xffff
; SI-NEXT:    s_lshl_b32 s23, s74, 16
; SI-NEXT:    s_or_b32 s22, s22, s23
; SI-NEXT:    s_and_b32 s23, s73, 0xffff
; SI-NEXT:    s_lshl_b32 s24, s72, 16
; SI-NEXT:    s_or_b32 s23, s23, s24
; SI-NEXT:    s_and_b32 s24, s63, 0xffff
; SI-NEXT:    s_lshl_b32 s25, s62, 16
; SI-NEXT:    s_or_b32 s24, s24, s25
; SI-NEXT:    s_and_b32 s25, s61, 0xffff
; SI-NEXT:    s_lshl_b32 s26, s60, 16
; SI-NEXT:    s_or_b32 s25, s25, s26
; SI-NEXT:    s_and_b32 s26, s59, 0xffff
; SI-NEXT:    s_lshl_b32 s27, s58, 16
; SI-NEXT:    s_or_b32 s26, s26, s27
; SI-NEXT:    s_and_b32 s27, s57, 0xffff
; SI-NEXT:    s_lshl_b32 s28, s56, 16
; SI-NEXT:    s_or_b32 s27, s27, s28
; SI-NEXT:    s_and_b32 s28, s47, 0xffff
; SI-NEXT:    s_lshl_b32 s29, s46, 16
; SI-NEXT:    s_or_b32 s28, s28, s29
; SI-NEXT:    s_and_b32 s29, s45, 0xffff
; SI-NEXT:    s_lshl_b32 s44, s44, 16
; SI-NEXT:    s_and_b32 s43, s43, 0xffff
; SI-NEXT:    s_lshl_b32 s42, s42, 16
; SI-NEXT:    s_and_b32 s41, s41, 0xffff
; SI-NEXT:    s_lshl_b32 s40, s40, 16
; SI-NEXT:    s_or_b32 s29, s29, s44
; SI-NEXT:    s_or_b32 s42, s43, s42
; SI-NEXT:    s_or_b32 s40, s41, s40
; SI-NEXT:    s_branch .LBB31_3
; SI-NEXT:  .LBB31_2: ; %cmp.true
; SI-NEXT:    s_add_i32 s16, s16, 3
; SI-NEXT:    s_and_b32 s16, s16, 0xffff
; SI-NEXT:    s_lshl_b32 s4, s4, 16
; SI-NEXT:    s_add_i32 s17, s17, 3
; SI-NEXT:    s_or_b32 s4, s4, s16
; SI-NEXT:    s_and_b32 s16, s17, 0xffff
; SI-NEXT:    s_lshl_b32 s5, s5, 16
; SI-NEXT:    s_add_i32 s18, s18, 3
; SI-NEXT:    s_or_b32 s5, s5, s16
; SI-NEXT:    s_and_b32 s16, s18, 0xffff
; SI-NEXT:    s_lshl_b32 s6, s6, 16
; SI-NEXT:    s_add_i32 s19, s19, 3
; SI-NEXT:    s_or_b32 s6, s6, s16
; SI-NEXT:    s_and_b32 s16, s19, 0xffff
; SI-NEXT:    s_lshl_b32 s7, s7, 16
; SI-NEXT:    s_add_i32 s20, s20, 3
; SI-NEXT:    s_or_b32 s7, s7, s16
; SI-NEXT:    s_and_b32 s16, s20, 0xffff
; SI-NEXT:    s_lshl_b32 s8, s8, 16
; SI-NEXT:    s_add_i32 s21, s21, 3
; SI-NEXT:    s_or_b32 s8, s8, s16
; SI-NEXT:    s_and_b32 s16, s21, 0xffff
; SI-NEXT:    s_lshl_b32 s9, s9, 16
; SI-NEXT:    s_add_i32 s22, s22, 3
; SI-NEXT:    s_or_b32 s9, s9, s16
; SI-NEXT:    s_and_b32 s16, s22, 0xffff
; SI-NEXT:    s_lshl_b32 s10, s10, 16
; SI-NEXT:    s_add_i32 s23, s23, 3
; SI-NEXT:    s_or_b32 s10, s10, s16
; SI-NEXT:    s_and_b32 s16, s23, 0xffff
; SI-NEXT:    s_lshl_b32 s11, s11, 16
; SI-NEXT:    s_add_i32 s24, s24, 3
; SI-NEXT:    s_or_b32 s11, s11, s16
; SI-NEXT:    s_and_b32 s16, s24, 0xffff
; SI-NEXT:    s_lshl_b32 s12, s12, 16
; SI-NEXT:    s_add_i32 s25, s25, 3
; SI-NEXT:    s_or_b32 s12, s12, s16
; SI-NEXT:    s_and_b32 s16, s25, 0xffff
; SI-NEXT:    s_lshl_b32 s13, s13, 16
; SI-NEXT:    s_add_i32 s26, s26, 3
; SI-NEXT:    s_or_b32 s13, s13, s16
; SI-NEXT:    s_and_b32 s16, s26, 0xffff
; SI-NEXT:    s_lshl_b32 s14, s14, 16
; SI-NEXT:    s_add_i32 s27, s27, 3
; SI-NEXT:    s_or_b32 s14, s14, s16
; SI-NEXT:    s_and_b32 s16, s27, 0xffff
; SI-NEXT:    s_lshl_b32 s15, s15, 16
; SI-NEXT:    s_add_i32 s28, s28, 3
; SI-NEXT:    s_or_b32 s15, s15, s16
; SI-NEXT:    s_and_b32 s16, s28, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s79, 16
; SI-NEXT:    s_add_i32 s29, s29, 3
; SI-NEXT:    s_or_b32 s16, s17, s16
; SI-NEXT:    s_and_b32 s17, s29, 0xffff
; SI-NEXT:    s_lshl_b32 s18, s76, 16
; SI-NEXT:    s_add_i32 s93, s93, 3
; SI-NEXT:    s_or_b32 s17, s18, s17
; SI-NEXT:    s_and_b32 s18, s93, 0xffff
; SI-NEXT:    s_lshl_b32 s19, s92, 16
; SI-NEXT:    s_add_i32 s91, s91, 3
; SI-NEXT:    s_or_b32 s18, s19, s18
; SI-NEXT:    s_and_b32 s19, s91, 0xffff
; SI-NEXT:    s_lshl_b32 s20, s90, 16
; SI-NEXT:    s_add_i32 s89, s89, 3
; SI-NEXT:    s_or_b32 s19, s20, s19
; SI-NEXT:    s_and_b32 s20, s89, 0xffff
; SI-NEXT:    s_lshl_b32 s21, s88, 16
; SI-NEXT:    s_add_i32 s78, s78, 3
; SI-NEXT:    s_or_b32 s20, s21, s20
; SI-NEXT:    s_and_b32 s21, s78, 0xffff
; SI-NEXT:    s_lshl_b32 s22, s77, 16
; SI-NEXT:    s_add_i32 s75, s75, 3
; SI-NEXT:    s_or_b32 s21, s22, s21
; SI-NEXT:    s_and_b32 s22, s75, 0xffff
; SI-NEXT:    s_lshl_b32 s23, s74, 16
; SI-NEXT:    s_add_i32 s73, s73, 3
; SI-NEXT:    s_or_b32 s22, s23, s22
; SI-NEXT:    s_and_b32 s23, s73, 0xffff
; SI-NEXT:    s_lshl_b32 s24, s72, 16
; SI-NEXT:    s_add_i32 s63, s63, 3
; SI-NEXT:    s_or_b32 s23, s24, s23
; SI-NEXT:    s_and_b32 s24, s63, 0xffff
; SI-NEXT:    s_lshl_b32 s25, s62, 16
; SI-NEXT:    s_add_i32 s61, s61, 3
; SI-NEXT:    s_or_b32 s24, s25, s24
; SI-NEXT:    s_and_b32 s25, s61, 0xffff
; SI-NEXT:    s_lshl_b32 s26, s60, 16
; SI-NEXT:    s_add_i32 s59, s59, 3
; SI-NEXT:    s_or_b32 s25, s26, s25
; SI-NEXT:    s_and_b32 s26, s59, 0xffff
; SI-NEXT:    s_lshl_b32 s27, s58, 16
; SI-NEXT:    s_add_i32 s57, s57, 3
; SI-NEXT:    s_or_b32 s26, s27, s26
; SI-NEXT:    s_and_b32 s27, s57, 0xffff
; SI-NEXT:    s_lshl_b32 s28, s56, 16
; SI-NEXT:    s_add_i32 s47, s47, 3
; SI-NEXT:    s_or_b32 s27, s28, s27
; SI-NEXT:    s_and_b32 s28, s47, 0xffff
; SI-NEXT:    s_lshl_b32 s29, s46, 16
; SI-NEXT:    s_add_i32 s45, s45, 3
; SI-NEXT:    s_add_i32 s43, s43, 3
; SI-NEXT:    s_add_i32 s41, s41, 3
; SI-NEXT:    s_or_b32 s28, s29, s28
; SI-NEXT:    s_and_b32 s29, s45, 0xffff
; SI-NEXT:    s_lshl_b32 s44, s44, 16
; SI-NEXT:    s_and_b32 s43, s43, 0xffff
; SI-NEXT:    s_lshl_b32 s42, s42, 16
; SI-NEXT:    s_and_b32 s41, s41, 0xffff
; SI-NEXT:    s_lshl_b32 s40, s40, 16
; SI-NEXT:    s_or_b32 s29, s44, s29
; SI-NEXT:    s_or_b32 s42, s42, s43
; SI-NEXT:    s_or_b32 s40, s40, s41
; SI-NEXT:    s_add_i32 s4, s4, 0x30000
; SI-NEXT:    s_add_i32 s5, s5, 0x30000
; SI-NEXT:    s_add_i32 s6, s6, 0x30000
; SI-NEXT:    s_add_i32 s7, s7, 0x30000
; SI-NEXT:    s_add_i32 s8, s8, 0x30000
; SI-NEXT:    s_add_i32 s9, s9, 0x30000
; SI-NEXT:    s_add_i32 s10, s10, 0x30000
; SI-NEXT:    s_add_i32 s11, s11, 0x30000
; SI-NEXT:    s_add_i32 s12, s12, 0x30000
; SI-NEXT:    s_add_i32 s13, s13, 0x30000
; SI-NEXT:    s_add_i32 s14, s14, 0x30000
; SI-NEXT:    s_add_i32 s15, s15, 0x30000
; SI-NEXT:    s_add_i32 s16, s16, 0x30000
; SI-NEXT:    s_add_i32 s17, s17, 0x30000
; SI-NEXT:    s_add_i32 s18, s18, 0x30000
; SI-NEXT:    s_add_i32 s19, s19, 0x30000
; SI-NEXT:    s_add_i32 s20, s20, 0x30000
; SI-NEXT:    s_add_i32 s21, s21, 0x30000
; SI-NEXT:    s_add_i32 s22, s22, 0x30000
; SI-NEXT:    s_add_i32 s23, s23, 0x30000
; SI-NEXT:    s_add_i32 s24, s24, 0x30000
; SI-NEXT:    s_add_i32 s25, s25, 0x30000
; SI-NEXT:    s_add_i32 s26, s26, 0x30000
; SI-NEXT:    s_add_i32 s27, s27, 0x30000
; SI-NEXT:    s_add_i32 s28, s28, 0x30000
; SI-NEXT:    s_add_i32 s29, s29, 0x30000
; SI-NEXT:    s_add_i32 s42, s42, 0x30000
; SI-NEXT:    s_add_i32 s40, s40, 0x30000
; SI-NEXT:  .LBB31_3: ; %end
; SI-NEXT:    v_mov_b32_e32 v0, s4
; SI-NEXT:    v_mov_b32_e32 v1, s5
; SI-NEXT:    v_mov_b32_e32 v2, s6
; SI-NEXT:    v_mov_b32_e32 v3, s7
; SI-NEXT:    v_mov_b32_e32 v4, s8
; SI-NEXT:    v_mov_b32_e32 v5, s9
; SI-NEXT:    v_mov_b32_e32 v6, s10
; SI-NEXT:    v_mov_b32_e32 v7, s11
; SI-NEXT:    v_mov_b32_e32 v8, s12
; SI-NEXT:    v_mov_b32_e32 v9, s13
; SI-NEXT:    v_mov_b32_e32 v10, s14
; SI-NEXT:    v_mov_b32_e32 v11, s15
; SI-NEXT:    v_mov_b32_e32 v12, s16
; SI-NEXT:    v_mov_b32_e32 v13, s17
; SI-NEXT:    v_mov_b32_e32 v14, s18
; SI-NEXT:    v_mov_b32_e32 v15, s19
; SI-NEXT:    v_mov_b32_e32 v16, s20
; SI-NEXT:    v_mov_b32_e32 v17, s21
; SI-NEXT:    v_mov_b32_e32 v18, s22
; SI-NEXT:    v_mov_b32_e32 v19, s23
; SI-NEXT:    v_mov_b32_e32 v20, s24
; SI-NEXT:    v_mov_b32_e32 v21, s25
; SI-NEXT:    v_mov_b32_e32 v22, s26
; SI-NEXT:    v_mov_b32_e32 v23, s27
; SI-NEXT:    v_mov_b32_e32 v24, s28
; SI-NEXT:    v_mov_b32_e32 v25, s29
; SI-NEXT:    v_mov_b32_e32 v26, s42
; SI-NEXT:    v_mov_b32_e32 v27, s40
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v56i16_to_v28f32_scalar:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_store_dword v28, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    v_writelane_b32 v28, s30, 0
; VI-NEXT:    v_writelane_b32 v28, s31, 1
; VI-NEXT:    v_readfirstlane_b32 s41, v13
; VI-NEXT:    v_readfirstlane_b32 s43, v12
; VI-NEXT:    v_readfirstlane_b32 s45, v11
; VI-NEXT:    v_readfirstlane_b32 s47, v10
; VI-NEXT:    v_readfirstlane_b32 s57, v9
; VI-NEXT:    v_readfirstlane_b32 s59, v8
; VI-NEXT:    v_readfirstlane_b32 s61, v7
; VI-NEXT:    v_readfirstlane_b32 s63, v6
; VI-NEXT:    v_readfirstlane_b32 s73, v5
; VI-NEXT:    v_readfirstlane_b32 s75, v4
; VI-NEXT:    v_readfirstlane_b32 s78, v3
; VI-NEXT:    v_readfirstlane_b32 s89, v2
; VI-NEXT:    v_readfirstlane_b32 s91, v1
; VI-NEXT:    v_readfirstlane_b32 vcc_hi, v0
; VI-NEXT:    s_lshr_b32 s76, s29, 16
; VI-NEXT:    s_lshr_b32 s79, s28, 16
; VI-NEXT:    s_lshr_b32 s15, s27, 16
; VI-NEXT:    s_lshr_b32 s14, s26, 16
; VI-NEXT:    s_lshr_b32 s13, s25, 16
; VI-NEXT:    s_lshr_b32 s12, s24, 16
; VI-NEXT:    s_lshr_b32 s11, s23, 16
; VI-NEXT:    s_lshr_b32 s10, s22, 16
; VI-NEXT:    s_lshr_b32 s9, s21, 16
; VI-NEXT:    s_lshr_b32 s8, s20, 16
; VI-NEXT:    s_lshr_b32 s7, s19, 16
; VI-NEXT:    s_lshr_b32 s6, s18, 16
; VI-NEXT:    s_lshr_b32 s5, s17, 16
; VI-NEXT:    s_lshr_b32 s4, s16, 16
; VI-NEXT:    s_lshr_b32 s40, s41, 16
; VI-NEXT:    s_lshr_b32 s42, s43, 16
; VI-NEXT:    s_lshr_b32 s44, s45, 16
; VI-NEXT:    s_lshr_b32 s46, s47, 16
; VI-NEXT:    s_lshr_b32 s56, s57, 16
; VI-NEXT:    s_lshr_b32 s58, s59, 16
; VI-NEXT:    s_lshr_b32 s60, s61, 16
; VI-NEXT:    s_lshr_b32 s62, s63, 16
; VI-NEXT:    s_lshr_b32 s72, s73, 16
; VI-NEXT:    s_lshr_b32 s74, s75, 16
; VI-NEXT:    s_lshr_b32 s77, s78, 16
; VI-NEXT:    s_lshr_b32 s88, s89, 16
; VI-NEXT:    s_lshr_b32 s90, s91, 16
; VI-NEXT:    s_lshr_b32 vcc_lo, vcc_hi, 16
; VI-NEXT:    v_readfirstlane_b32 s30, v14
; VI-NEXT:    s_cmp_lg_u32 s30, 0
; VI-NEXT:    s_cbranch_scc0 .LBB31_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    s_and_b32 s16, 0xffff, s16
; VI-NEXT:    s_lshl_b32 s4, s4, 16
; VI-NEXT:    s_or_b32 s4, s16, s4
; VI-NEXT:    s_and_b32 s16, 0xffff, s17
; VI-NEXT:    s_lshl_b32 s5, s5, 16
; VI-NEXT:    s_or_b32 s5, s16, s5
; VI-NEXT:    s_and_b32 s16, 0xffff, s18
; VI-NEXT:    s_lshl_b32 s6, s6, 16
; VI-NEXT:    s_or_b32 s6, s16, s6
; VI-NEXT:    s_and_b32 s16, 0xffff, s19
; VI-NEXT:    s_lshl_b32 s7, s7, 16
; VI-NEXT:    s_or_b32 s7, s16, s7
; VI-NEXT:    s_and_b32 s16, 0xffff, s20
; VI-NEXT:    s_lshl_b32 s8, s8, 16
; VI-NEXT:    s_or_b32 s8, s16, s8
; VI-NEXT:    s_and_b32 s16, 0xffff, s21
; VI-NEXT:    s_lshl_b32 s9, s9, 16
; VI-NEXT:    s_or_b32 s9, s16, s9
; VI-NEXT:    s_and_b32 s16, 0xffff, s22
; VI-NEXT:    s_lshl_b32 s10, s10, 16
; VI-NEXT:    s_or_b32 s10, s16, s10
; VI-NEXT:    s_and_b32 s16, 0xffff, s23
; VI-NEXT:    s_lshl_b32 s11, s11, 16
; VI-NEXT:    s_or_b32 s11, s16, s11
; VI-NEXT:    s_and_b32 s16, 0xffff, s24
; VI-NEXT:    s_lshl_b32 s12, s12, 16
; VI-NEXT:    s_or_b32 s12, s16, s12
; VI-NEXT:    s_and_b32 s16, 0xffff, s25
; VI-NEXT:    s_lshl_b32 s13, s13, 16
; VI-NEXT:    s_or_b32 s13, s16, s13
; VI-NEXT:    s_and_b32 s16, 0xffff, s26
; VI-NEXT:    s_lshl_b32 s14, s14, 16
; VI-NEXT:    s_or_b32 s14, s16, s14
; VI-NEXT:    s_and_b32 s16, 0xffff, s27
; VI-NEXT:    s_lshl_b32 s15, s15, 16
; VI-NEXT:    s_or_b32 s15, s16, s15
; VI-NEXT:    s_and_b32 s16, 0xffff, s28
; VI-NEXT:    s_lshl_b32 s17, s79, 16
; VI-NEXT:    s_or_b32 s16, s16, s17
; VI-NEXT:    s_and_b32 s17, 0xffff, s29
; VI-NEXT:    s_lshl_b32 s18, s76, 16
; VI-NEXT:    s_or_b32 s17, s17, s18
; VI-NEXT:    s_and_b32 s18, 0xffff, vcc_hi
; VI-NEXT:    s_lshl_b32 s19, vcc_lo, 16
; VI-NEXT:    s_or_b32 s18, s18, s19
; VI-NEXT:    s_and_b32 s19, 0xffff, s91
; VI-NEXT:    s_lshl_b32 s20, s90, 16
; VI-NEXT:    s_or_b32 s19, s19, s20
; VI-NEXT:    s_and_b32 s20, 0xffff, s89
; VI-NEXT:    s_lshl_b32 s21, s88, 16
; VI-NEXT:    s_or_b32 s20, s20, s21
; VI-NEXT:    s_and_b32 s21, 0xffff, s78
; VI-NEXT:    s_lshl_b32 s22, s77, 16
; VI-NEXT:    s_or_b32 s21, s21, s22
; VI-NEXT:    s_and_b32 s22, 0xffff, s75
; VI-NEXT:    s_lshl_b32 s23, s74, 16
; VI-NEXT:    s_or_b32 s22, s22, s23
; VI-NEXT:    s_and_b32 s23, 0xffff, s73
; VI-NEXT:    s_lshl_b32 s24, s72, 16
; VI-NEXT:    s_or_b32 s23, s23, s24
; VI-NEXT:    s_and_b32 s24, 0xffff, s63
; VI-NEXT:    s_lshl_b32 s25, s62, 16
; VI-NEXT:    s_or_b32 s24, s24, s25
; VI-NEXT:    s_and_b32 s25, 0xffff, s61
; VI-NEXT:    s_lshl_b32 s26, s60, 16
; VI-NEXT:    s_or_b32 s25, s25, s26
; VI-NEXT:    s_and_b32 s26, 0xffff, s59
; VI-NEXT:    s_lshl_b32 s27, s58, 16
; VI-NEXT:    s_or_b32 s26, s26, s27
; VI-NEXT:    s_and_b32 s27, 0xffff, s57
; VI-NEXT:    s_lshl_b32 s28, s56, 16
; VI-NEXT:    s_or_b32 s27, s27, s28
; VI-NEXT:    s_and_b32 s28, 0xffff, s47
; VI-NEXT:    s_lshl_b32 s29, s46, 16
; VI-NEXT:    s_or_b32 s28, s28, s29
; VI-NEXT:    s_and_b32 s29, 0xffff, s45
; VI-NEXT:    s_lshl_b32 s44, s44, 16
; VI-NEXT:    s_and_b32 s43, 0xffff, s43
; VI-NEXT:    s_lshl_b32 s42, s42, 16
; VI-NEXT:    s_and_b32 s41, 0xffff, s41
; VI-NEXT:    s_lshl_b32 s40, s40, 16
; VI-NEXT:    s_or_b32 s29, s29, s44
; VI-NEXT:    s_or_b32 s42, s43, s42
; VI-NEXT:    s_or_b32 s40, s41, s40
; VI-NEXT:    s_branch .LBB31_3
; VI-NEXT:  .LBB31_2: ; %cmp.true
; VI-NEXT:    s_add_i32 s16, s16, 3
; VI-NEXT:    s_and_b32 s16, s16, 0xffff
; VI-NEXT:    s_lshl_b32 s4, s4, 16
; VI-NEXT:    s_add_i32 s17, s17, 3
; VI-NEXT:    s_or_b32 s4, s4, s16
; VI-NEXT:    s_and_b32 s16, s17, 0xffff
; VI-NEXT:    s_lshl_b32 s5, s5, 16
; VI-NEXT:    s_add_i32 s18, s18, 3
; VI-NEXT:    s_or_b32 s5, s5, s16
; VI-NEXT:    s_and_b32 s16, s18, 0xffff
; VI-NEXT:    s_lshl_b32 s6, s6, 16
; VI-NEXT:    s_add_i32 s19, s19, 3
; VI-NEXT:    s_or_b32 s6, s6, s16
; VI-NEXT:    s_and_b32 s16, s19, 0xffff
; VI-NEXT:    s_lshl_b32 s7, s7, 16
; VI-NEXT:    s_add_i32 s20, s20, 3
; VI-NEXT:    s_or_b32 s7, s7, s16
; VI-NEXT:    s_and_b32 s16, s20, 0xffff
; VI-NEXT:    s_lshl_b32 s8, s8, 16
; VI-NEXT:    s_add_i32 s21, s21, 3
; VI-NEXT:    s_or_b32 s8, s8, s16
; VI-NEXT:    s_and_b32 s16, s21, 0xffff
; VI-NEXT:    s_lshl_b32 s9, s9, 16
; VI-NEXT:    s_add_i32 s22, s22, 3
; VI-NEXT:    s_or_b32 s9, s9, s16
; VI-NEXT:    s_and_b32 s16, s22, 0xffff
; VI-NEXT:    s_lshl_b32 s10, s10, 16
; VI-NEXT:    s_add_i32 s23, s23, 3
; VI-NEXT:    s_or_b32 s10, s10, s16
; VI-NEXT:    s_and_b32 s16, s23, 0xffff
; VI-NEXT:    s_lshl_b32 s11, s11, 16
; VI-NEXT:    s_add_i32 s24, s24, 3
; VI-NEXT:    s_or_b32 s11, s11, s16
; VI-NEXT:    s_and_b32 s16, s24, 0xffff
; VI-NEXT:    s_lshl_b32 s12, s12, 16
; VI-NEXT:    s_add_i32 s25, s25, 3
; VI-NEXT:    s_or_b32 s12, s12, s16
; VI-NEXT:    s_and_b32 s16, s25, 0xffff
; VI-NEXT:    s_lshl_b32 s13, s13, 16
; VI-NEXT:    s_add_i32 s26, s26, 3
; VI-NEXT:    s_or_b32 s13, s13, s16
; VI-NEXT:    s_and_b32 s16, s26, 0xffff
; VI-NEXT:    s_lshl_b32 s14, s14, 16
; VI-NEXT:    s_add_i32 s27, s27, 3
; VI-NEXT:    s_or_b32 s14, s14, s16
; VI-NEXT:    s_and_b32 s16, s27, 0xffff
; VI-NEXT:    s_lshl_b32 s15, s15, 16
; VI-NEXT:    s_add_i32 s28, s28, 3
; VI-NEXT:    s_or_b32 s15, s15, s16
; VI-NEXT:    s_and_b32 s16, s28, 0xffff
; VI-NEXT:    s_lshl_b32 s17, s79, 16
; VI-NEXT:    s_add_i32 s29, s29, 3
; VI-NEXT:    s_or_b32 s16, s17, s16
; VI-NEXT:    s_and_b32 s17, s29, 0xffff
; VI-NEXT:    s_lshl_b32 s18, s76, 16
; VI-NEXT:    s_add_i32 vcc_hi, vcc_hi, 3
; VI-NEXT:    s_or_b32 s17, s18, s17
; VI-NEXT:    s_and_b32 s18, vcc_hi, 0xffff
; VI-NEXT:    s_lshl_b32 s19, vcc_lo, 16
; VI-NEXT:    s_add_i32 s91, s91, 3
; VI-NEXT:    s_or_b32 s18, s19, s18
; VI-NEXT:    s_and_b32 s19, s91, 0xffff
; VI-NEXT:    s_lshl_b32 s20, s90, 16
; VI-NEXT:    s_add_i32 s89, s89, 3
; VI-NEXT:    s_or_b32 s19, s20, s19
; VI-NEXT:    s_and_b32 s20, s89, 0xffff
; VI-NEXT:    s_lshl_b32 s21, s88, 16
; VI-NEXT:    s_add_i32 s78, s78, 3
; VI-NEXT:    s_or_b32 s20, s21, s20
; VI-NEXT:    s_and_b32 s21, s78, 0xffff
; VI-NEXT:    s_lshl_b32 s22, s77, 16
; VI-NEXT:    s_add_i32 s75, s75, 3
; VI-NEXT:    s_or_b32 s21, s22, s21
; VI-NEXT:    s_and_b32 s22, s75, 0xffff
; VI-NEXT:    s_lshl_b32 s23, s74, 16
; VI-NEXT:    s_add_i32 s73, s73, 3
; VI-NEXT:    s_or_b32 s22, s23, s22
; VI-NEXT:    s_and_b32 s23, s73, 0xffff
; VI-NEXT:    s_lshl_b32 s24, s72, 16
; VI-NEXT:    s_add_i32 s63, s63, 3
; VI-NEXT:    s_or_b32 s23, s24, s23
; VI-NEXT:    s_and_b32 s24, s63, 0xffff
; VI-NEXT:    s_lshl_b32 s25, s62, 16
; VI-NEXT:    s_add_i32 s61, s61, 3
; VI-NEXT:    s_or_b32 s24, s25, s24
; VI-NEXT:    s_and_b32 s25, s61, 0xffff
; VI-NEXT:    s_lshl_b32 s26, s60, 16
; VI-NEXT:    s_add_i32 s59, s59, 3
; VI-NEXT:    s_or_b32 s25, s26, s25
; VI-NEXT:    s_and_b32 s26, s59, 0xffff
; VI-NEXT:    s_lshl_b32 s27, s58, 16
; VI-NEXT:    s_add_i32 s57, s57, 3
; VI-NEXT:    s_or_b32 s26, s27, s26
; VI-NEXT:    s_and_b32 s27, s57, 0xffff
; VI-NEXT:    s_lshl_b32 s28, s56, 16
; VI-NEXT:    s_add_i32 s47, s47, 3
; VI-NEXT:    s_or_b32 s27, s28, s27
; VI-NEXT:    s_and_b32 s28, s47, 0xffff
; VI-NEXT:    s_lshl_b32 s29, s46, 16
; VI-NEXT:    s_add_i32 s45, s45, 3
; VI-NEXT:    s_add_i32 s43, s43, 3
; VI-NEXT:    s_add_i32 s41, s41, 3
; VI-NEXT:    s_or_b32 s28, s29, s28
; VI-NEXT:    s_and_b32 s29, s45, 0xffff
; VI-NEXT:    s_lshl_b32 s44, s44, 16
; VI-NEXT:    s_and_b32 s43, s43, 0xffff
; VI-NEXT:    s_lshl_b32 s42, s42, 16
; VI-NEXT:    s_and_b32 s41, s41, 0xffff
; VI-NEXT:    s_lshl_b32 s40, s40, 16
; VI-NEXT:    s_or_b32 s29, s44, s29
; VI-NEXT:    s_or_b32 s42, s42, s43
; VI-NEXT:    s_or_b32 s40, s40, s41
; VI-NEXT:    s_add_i32 s4, s4, 0x30000
; VI-NEXT:    s_add_i32 s5, s5, 0x30000
; VI-NEXT:    s_add_i32 s6, s6, 0x30000
; VI-NEXT:    s_add_i32 s7, s7, 0x30000
; VI-NEXT:    s_add_i32 s8, s8, 0x30000
; VI-NEXT:    s_add_i32 s9, s9, 0x30000
; VI-NEXT:    s_add_i32 s10, s10, 0x30000
; VI-NEXT:    s_add_i32 s11, s11, 0x30000
; VI-NEXT:    s_add_i32 s12, s12, 0x30000
; VI-NEXT:    s_add_i32 s13, s13, 0x30000
; VI-NEXT:    s_add_i32 s14, s14, 0x30000
; VI-NEXT:    s_add_i32 s15, s15, 0x30000
; VI-NEXT:    s_add_i32 s16, s16, 0x30000
; VI-NEXT:    s_add_i32 s17, s17, 0x30000
; VI-NEXT:    s_add_i32 s18, s18, 0x30000
; VI-NEXT:    s_add_i32 s19, s19, 0x30000
; VI-NEXT:    s_add_i32 s20, s20, 0x30000
; VI-NEXT:    s_add_i32 s21, s21, 0x30000
; VI-NEXT:    s_add_i32 s22, s22, 0x30000
; VI-NEXT:    s_add_i32 s23, s23, 0x30000
; VI-NEXT:    s_add_i32 s24, s24, 0x30000
; VI-NEXT:    s_add_i32 s25, s25, 0x30000
; VI-NEXT:    s_add_i32 s26, s26, 0x30000
; VI-NEXT:    s_add_i32 s27, s27, 0x30000
; VI-NEXT:    s_add_i32 s28, s28, 0x30000
; VI-NEXT:    s_add_i32 s29, s29, 0x30000
; VI-NEXT:    s_add_i32 s42, s42, 0x30000
; VI-NEXT:    s_add_i32 s40, s40, 0x30000
; VI-NEXT:  .LBB31_3: ; %end
; VI-NEXT:    v_readlane_b32 s30, v28, 0
; VI-NEXT:    v_mov_b32_e32 v0, s4
; VI-NEXT:    v_mov_b32_e32 v1, s5
; VI-NEXT:    v_mov_b32_e32 v2, s6
; VI-NEXT:    v_mov_b32_e32 v3, s7
; VI-NEXT:    v_mov_b32_e32 v4, s8
; VI-NEXT:    v_mov_b32_e32 v5, s9
; VI-NEXT:    v_mov_b32_e32 v6, s10
; VI-NEXT:    v_mov_b32_e32 v7, s11
; VI-NEXT:    v_mov_b32_e32 v8, s12
; VI-NEXT:    v_mov_b32_e32 v9, s13
; VI-NEXT:    v_mov_b32_e32 v10, s14
; VI-NEXT:    v_mov_b32_e32 v11, s15
; VI-NEXT:    v_mov_b32_e32 v12, s16
; VI-NEXT:    v_mov_b32_e32 v13, s17
; VI-NEXT:    v_mov_b32_e32 v14, s18
; VI-NEXT:    v_mov_b32_e32 v15, s19
; VI-NEXT:    v_mov_b32_e32 v16, s20
; VI-NEXT:    v_mov_b32_e32 v17, s21
; VI-NEXT:    v_mov_b32_e32 v18, s22
; VI-NEXT:    v_mov_b32_e32 v19, s23
; VI-NEXT:    v_mov_b32_e32 v20, s24
; VI-NEXT:    v_mov_b32_e32 v21, s25
; VI-NEXT:    v_mov_b32_e32 v22, s26
; VI-NEXT:    v_mov_b32_e32 v23, s27
; VI-NEXT:    v_mov_b32_e32 v24, s28
; VI-NEXT:    v_mov_b32_e32 v25, s29
; VI-NEXT:    v_mov_b32_e32 v26, s42
; VI-NEXT:    v_mov_b32_e32 v27, s40
; VI-NEXT:    v_readlane_b32 s31, v28, 1
; VI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v56i16_to_v28f32_scalar:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    s_mov_b64 exec, s[4:5]
; GFX9-NEXT:    v_writelane_b32 v32, s36, 0
; GFX9-NEXT:    v_writelane_b32 v32, s37, 1
; GFX9-NEXT:    v_writelane_b32 v32, s38, 2
; GFX9-NEXT:    v_writelane_b32 v32, s39, 3
; GFX9-NEXT:    v_writelane_b32 v32, s48, 4
; GFX9-NEXT:    v_writelane_b32 v32, s49, 5
; GFX9-NEXT:    v_writelane_b32 v32, s50, 6
; GFX9-NEXT:    v_writelane_b32 v32, s51, 7
; GFX9-NEXT:    v_writelane_b32 v32, s52, 8
; GFX9-NEXT:    v_writelane_b32 v32, s53, 9
; GFX9-NEXT:    v_writelane_b32 v32, s54, 10
; GFX9-NEXT:    v_writelane_b32 v32, s55, 11
; GFX9-NEXT:    v_readfirstlane_b32 s4, v13
; GFX9-NEXT:    v_readfirstlane_b32 s6, v12
; GFX9-NEXT:    v_readfirstlane_b32 s8, v11
; GFX9-NEXT:    v_readfirstlane_b32 s10, v10
; GFX9-NEXT:    v_readfirstlane_b32 s12, v9
; GFX9-NEXT:    v_readfirstlane_b32 s14, v8
; GFX9-NEXT:    v_readfirstlane_b32 s57, v7
; GFX9-NEXT:    v_readfirstlane_b32 s60, v6
; GFX9-NEXT:    v_readfirstlane_b32 s62, v5
; GFX9-NEXT:    v_readfirstlane_b32 s72, v4
; GFX9-NEXT:    v_readfirstlane_b32 s74, v3
; GFX9-NEXT:    v_readfirstlane_b32 s76, v2
; GFX9-NEXT:    v_readfirstlane_b32 s78, v1
; GFX9-NEXT:    v_readfirstlane_b32 s88, v0
; GFX9-NEXT:    s_lshr_b32 s56, s29, 16
; GFX9-NEXT:    s_lshr_b32 s59, s28, 16
; GFX9-NEXT:    s_lshr_b32 s47, s27, 16
; GFX9-NEXT:    s_lshr_b32 s46, s26, 16
; GFX9-NEXT:    s_lshr_b32 s45, s25, 16
; GFX9-NEXT:    s_lshr_b32 s44, s24, 16
; GFX9-NEXT:    s_lshr_b32 s43, s23, 16
; GFX9-NEXT:    s_lshr_b32 s42, s22, 16
; GFX9-NEXT:    s_lshr_b32 s41, s21, 16
; GFX9-NEXT:    s_lshr_b32 s40, s20, 16
; GFX9-NEXT:    s_lshr_b32 s90, s19, 16
; GFX9-NEXT:    s_lshr_b32 s91, s18, 16
; GFX9-NEXT:    s_lshr_b32 s92, s17, 16
; GFX9-NEXT:    s_lshr_b32 s93, s16, 16
; GFX9-NEXT:    s_lshr_b32 s5, s4, 16
; GFX9-NEXT:    s_lshr_b32 s7, s6, 16
; GFX9-NEXT:    s_lshr_b32 s9, s8, 16
; GFX9-NEXT:    s_lshr_b32 s11, s10, 16
; GFX9-NEXT:    s_lshr_b32 s13, s12, 16
; GFX9-NEXT:    s_lshr_b32 s15, s14, 16
; GFX9-NEXT:    s_lshr_b32 s58, s57, 16
; GFX9-NEXT:    s_lshr_b32 s61, s60, 16
; GFX9-NEXT:    s_lshr_b32 s63, s62, 16
; GFX9-NEXT:    s_lshr_b32 s73, s72, 16
; GFX9-NEXT:    s_lshr_b32 s75, s74, 16
; GFX9-NEXT:    s_lshr_b32 s77, s76, 16
; GFX9-NEXT:    s_lshr_b32 s79, s78, 16
; GFX9-NEXT:    s_lshr_b32 s89, s88, 16
; GFX9-NEXT:    v_readfirstlane_b32 s94, v14
; GFX9-NEXT:    s_cmp_lg_u32 s94, 0
; GFX9-NEXT:    s_cbranch_scc0 .LBB31_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    s_pack_ll_b32_b16 s36, s16, s93
; GFX9-NEXT:    s_pack_ll_b32_b16 s37, s17, s92
; GFX9-NEXT:    s_pack_ll_b32_b16 s38, s18, s91
; GFX9-NEXT:    s_pack_ll_b32_b16 s39, s19, s90
; GFX9-NEXT:    s_pack_ll_b32_b16 s40, s20, s40
; GFX9-NEXT:    s_pack_ll_b32_b16 s41, s21, s41
; GFX9-NEXT:    s_pack_ll_b32_b16 s42, s22, s42
; GFX9-NEXT:    s_pack_ll_b32_b16 s43, s23, s43
; GFX9-NEXT:    s_pack_ll_b32_b16 s44, s24, s44
; GFX9-NEXT:    s_pack_ll_b32_b16 s45, s25, s45
; GFX9-NEXT:    s_pack_ll_b32_b16 s46, s26, s46
; GFX9-NEXT:    s_pack_ll_b32_b16 s47, s27, s47
; GFX9-NEXT:    s_pack_ll_b32_b16 s48, s28, s59
; GFX9-NEXT:    s_pack_ll_b32_b16 s49, s29, s56
; GFX9-NEXT:    s_pack_ll_b32_b16 s50, s88, s89
; GFX9-NEXT:    s_pack_ll_b32_b16 s51, s78, s79
; GFX9-NEXT:    s_pack_ll_b32_b16 s52, s76, s77
; GFX9-NEXT:    s_pack_ll_b32_b16 s53, s74, s75
; GFX9-NEXT:    s_pack_ll_b32_b16 s54, s72, s73
; GFX9-NEXT:    s_pack_ll_b32_b16 s55, s62, s63
; GFX9-NEXT:    s_pack_ll_b32_b16 s56, s60, s61
; GFX9-NEXT:    s_pack_ll_b32_b16 s57, s57, s58
; GFX9-NEXT:    s_pack_ll_b32_b16 s58, s14, s15
; GFX9-NEXT:    s_pack_ll_b32_b16 s59, s12, s13
; GFX9-NEXT:    s_pack_ll_b32_b16 s60, s10, s11
; GFX9-NEXT:    s_pack_ll_b32_b16 s61, s8, s9
; GFX9-NEXT:    s_pack_ll_b32_b16 s62, s6, s7
; GFX9-NEXT:    s_pack_ll_b32_b16 s63, s4, s5
; GFX9-NEXT:    v_mov_b32_e32 v0, s36
; GFX9-NEXT:    v_mov_b32_e32 v1, s37
; GFX9-NEXT:    v_mov_b32_e32 v2, s38
; GFX9-NEXT:    v_mov_b32_e32 v3, s39
; GFX9-NEXT:    v_mov_b32_e32 v4, s40
; GFX9-NEXT:    v_mov_b32_e32 v5, s41
; GFX9-NEXT:    v_mov_b32_e32 v6, s42
; GFX9-NEXT:    v_mov_b32_e32 v7, s43
; GFX9-NEXT:    v_mov_b32_e32 v8, s44
; GFX9-NEXT:    v_mov_b32_e32 v9, s45
; GFX9-NEXT:    v_mov_b32_e32 v10, s46
; GFX9-NEXT:    v_mov_b32_e32 v11, s47
; GFX9-NEXT:    v_mov_b32_e32 v12, s48
; GFX9-NEXT:    v_mov_b32_e32 v13, s49
; GFX9-NEXT:    v_mov_b32_e32 v14, s50
; GFX9-NEXT:    v_mov_b32_e32 v15, s51
; GFX9-NEXT:    v_mov_b32_e32 v16, s52
; GFX9-NEXT:    v_mov_b32_e32 v17, s53
; GFX9-NEXT:    v_mov_b32_e32 v18, s54
; GFX9-NEXT:    v_mov_b32_e32 v19, s55
; GFX9-NEXT:    v_mov_b32_e32 v20, s56
; GFX9-NEXT:    v_mov_b32_e32 v21, s57
; GFX9-NEXT:    v_mov_b32_e32 v22, s58
; GFX9-NEXT:    v_mov_b32_e32 v23, s59
; GFX9-NEXT:    v_mov_b32_e32 v24, s60
; GFX9-NEXT:    v_mov_b32_e32 v25, s61
; GFX9-NEXT:    v_mov_b32_e32 v26, s62
; GFX9-NEXT:    v_mov_b32_e32 v27, s63
; GFX9-NEXT:    v_mov_b32_e32 v28, s64
; GFX9-NEXT:    v_mov_b32_e32 v29, s65
; GFX9-NEXT:    v_mov_b32_e32 v30, s66
; GFX9-NEXT:    v_mov_b32_e32 v31, s67
; GFX9-NEXT:    s_branch .LBB31_3
; GFX9-NEXT:  .LBB31_2: ; %cmp.true
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s16, s93
; GFX9-NEXT:    v_pk_add_u16 v0, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s18, s91
; GFX9-NEXT:    v_pk_add_u16 v2, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s19, s90
; GFX9-NEXT:    v_pk_add_u16 v3, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s20, s40
; GFX9-NEXT:    v_pk_add_u16 v4, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s21, s41
; GFX9-NEXT:    v_pk_add_u16 v5, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s22, s42
; GFX9-NEXT:    v_pk_add_u16 v6, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s23, s43
; GFX9-NEXT:    v_pk_add_u16 v7, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s24, s44
; GFX9-NEXT:    v_pk_add_u16 v8, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s25, s45
; GFX9-NEXT:    v_pk_add_u16 v9, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s26, s46
; GFX9-NEXT:    v_pk_add_u16 v10, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s27, s47
; GFX9-NEXT:    v_pk_add_u16 v11, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s28, s59
; GFX9-NEXT:    v_pk_add_u16 v12, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s29, s56
; GFX9-NEXT:    v_pk_add_u16 v13, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s88, s89
; GFX9-NEXT:    v_pk_add_u16 v14, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s78, s79
; GFX9-NEXT:    v_pk_add_u16 v15, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s76, s77
; GFX9-NEXT:    v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s74, s75
; GFX9-NEXT:    v_pk_add_u16 v17, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s72, s73
; GFX9-NEXT:    v_pk_add_u16 v18, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s62, s63
; GFX9-NEXT:    v_pk_add_u16 v19, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s60, s61
; GFX9-NEXT:    s_pack_ll_b32_b16 s17, s17, s92
; GFX9-NEXT:    v_pk_add_u16 v20, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s57, s58
; GFX9-NEXT:    s_pack_ll_b32_b16 s14, s14, s15
; GFX9-NEXT:    s_pack_ll_b32_b16 s12, s12, s13
; GFX9-NEXT:    s_pack_ll_b32_b16 s10, s10, s11
; GFX9-NEXT:    s_pack_ll_b32_b16 s8, s8, s9
; GFX9-NEXT:    s_pack_ll_b32_b16 s6, s6, s7
; GFX9-NEXT:    s_pack_ll_b32_b16 s4, s4, s5
; GFX9-NEXT:    v_pk_add_u16 v1, s17, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v21, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v22, s14, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v23, s12, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v24, s10, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v25, s8, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v26, s6, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v27, s4, 3 op_sel_hi:[1,0]
; GFX9-NEXT:  .LBB31_3: ; %end
; GFX9-NEXT:    v_readlane_b32 s55, v32, 11
; GFX9-NEXT:    v_readlane_b32 s54, v32, 10
; GFX9-NEXT:    v_readlane_b32 s53, v32, 9
; GFX9-NEXT:    v_readlane_b32 s52, v32, 8
; GFX9-NEXT:    v_readlane_b32 s51, v32, 7
; GFX9-NEXT:    v_readlane_b32 s50, v32, 6
; GFX9-NEXT:    v_readlane_b32 s49, v32, 5
; GFX9-NEXT:    v_readlane_b32 s48, v32, 4
; GFX9-NEXT:    v_readlane_b32 s39, v32, 3
; GFX9-NEXT:    v_readlane_b32 s38, v32, 2
; GFX9-NEXT:    v_readlane_b32 s37, v32, 1
; GFX9-NEXT:    v_readlane_b32 s36, v32, 0
; GFX9-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    s_mov_b64 exec, s[4:5]
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v56i16_to_v28f32_scalar:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_readfirstlane_b32 s40, v9
; GFX11-NEXT:    v_readfirstlane_b32 s42, v8
; GFX11-NEXT:    v_readfirstlane_b32 s43, v7
; GFX11-NEXT:    v_readfirstlane_b32 s46, v6
; GFX11-NEXT:    v_readfirstlane_b32 s57, v5
; GFX11-NEXT:    v_readfirstlane_b32 s59, v4
; GFX11-NEXT:    v_readfirstlane_b32 s62, v3
; GFX11-NEXT:    v_readfirstlane_b32 s63, v2
; GFX11-NEXT:    v_readfirstlane_b32 s73, v1
; GFX11-NEXT:    v_readfirstlane_b32 s75, v0
; GFX11-NEXT:    v_readfirstlane_b32 s90, v10
; GFX11-NEXT:    s_lshr_b32 s88, s1, 16
; GFX11-NEXT:    s_lshr_b32 s89, s0, 16
; GFX11-NEXT:    s_lshr_b32 s44, s29, 16
; GFX11-NEXT:    s_lshr_b32 s47, s28, 16
; GFX11-NEXT:    s_lshr_b32 s15, s27, 16
; GFX11-NEXT:    s_lshr_b32 s14, s26, 16
; GFX11-NEXT:    s_lshr_b32 s13, s25, 16
; GFX11-NEXT:    s_lshr_b32 s12, s24, 16
; GFX11-NEXT:    s_lshr_b32 s11, s23, 16
; GFX11-NEXT:    s_lshr_b32 s10, s22, 16
; GFX11-NEXT:    s_lshr_b32 s9, s21, 16
; GFX11-NEXT:    s_lshr_b32 s8, s20, 16
; GFX11-NEXT:    s_lshr_b32 s7, s19, 16
; GFX11-NEXT:    s_lshr_b32 s6, s18, 16
; GFX11-NEXT:    s_lshr_b32 s5, s17, 16
; GFX11-NEXT:    s_lshr_b32 s4, s16, 16
; GFX11-NEXT:    s_lshr_b32 s78, s3, 16
; GFX11-NEXT:    s_lshr_b32 s79, s2, 16
; GFX11-NEXT:    s_lshr_b32 s41, s40, 16
; GFX11-NEXT:    s_lshr_b32 s45, s42, 16
; GFX11-NEXT:    s_lshr_b32 s56, s43, 16
; GFX11-NEXT:    s_lshr_b32 s58, s46, 16
; GFX11-NEXT:    s_lshr_b32 s60, s57, 16
; GFX11-NEXT:    s_lshr_b32 s61, s59, 16
; GFX11-NEXT:    s_lshr_b32 s72, s62, 16
; GFX11-NEXT:    s_lshr_b32 s74, s63, 16
; GFX11-NEXT:    s_lshr_b32 s76, s73, 16
; GFX11-NEXT:    s_lshr_b32 s77, s75, 16
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s0, s89
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s1, s88
; GFX11-NEXT:    s_cmp_lg_u32 s90, 0
; GFX11-NEXT:    s_cbranch_scc0 .LBB31_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-NEXT:    s_pack_ll_b32_b16 s2, s2, s79
; GFX11-NEXT:    s_pack_ll_b32_b16 s3, s3, s78
; GFX11-NEXT:    s_pack_ll_b32_b16 s4, s16, s4
; GFX11-NEXT:    s_pack_ll_b32_b16 s5, s17, s5
; GFX11-NEXT:    s_pack_ll_b32_b16 s6, s18, s6
; GFX11-NEXT:    s_pack_ll_b32_b16 s7, s19, s7
; GFX11-NEXT:    s_pack_ll_b32_b16 s8, s20, s8
; GFX11-NEXT:    s_pack_ll_b32_b16 s9, s21, s9
; GFX11-NEXT:    s_pack_ll_b32_b16 s10, s22, s10
; GFX11-NEXT:    s_pack_ll_b32_b16 s11, s23, s11
; GFX11-NEXT:    s_pack_ll_b32_b16 s12, s24, s12
; GFX11-NEXT:    s_pack_ll_b32_b16 s13, s25, s13
; GFX11-NEXT:    s_pack_ll_b32_b16 s14, s26, s14
; GFX11-NEXT:    s_pack_ll_b32_b16 s15, s27, s15
; GFX11-NEXT:    s_pack_ll_b32_b16 s16, s28, s47
; GFX11-NEXT:    s_pack_ll_b32_b16 s17, s29, s44
; GFX11-NEXT:    s_pack_ll_b32_b16 s18, s75, s77
; GFX11-NEXT:    s_pack_ll_b32_b16 s19, s73, s76
; GFX11-NEXT:    s_pack_ll_b32_b16 s20, s63, s74
; GFX11-NEXT:    s_pack_ll_b32_b16 s21, s62, s72
; GFX11-NEXT:    s_pack_ll_b32_b16 s22, s59, s61
; GFX11-NEXT:    s_pack_ll_b32_b16 s23, s57, s60
; GFX11-NEXT:    s_pack_ll_b32_b16 s24, s46, s58
; GFX11-NEXT:    s_pack_ll_b32_b16 s25, s43, s56
; GFX11-NEXT:    s_pack_ll_b32_b16 s26, s42, s45
; GFX11-NEXT:    s_pack_ll_b32_b16 s27, s40, s41
; GFX11-NEXT:    v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX11-NEXT:    v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; GFX11-NEXT:    v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
; GFX11-NEXT:    v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
; GFX11-NEXT:    v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
; GFX11-NEXT:    v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
; GFX11-NEXT:    v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
; GFX11-NEXT:    v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
; GFX11-NEXT:    v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
; GFX11-NEXT:    v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
; GFX11-NEXT:    v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
; GFX11-NEXT:    v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
; GFX11-NEXT:    v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
; GFX11-NEXT:    v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
; GFX11-NEXT:    v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
; GFX11-NEXT:    v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
; GFX11-NEXT:    s_setpc_b64 s[30:31]
; GFX11-NEXT:  .LBB31_2: ; %cmp.true
; GFX11-NEXT:    v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s2, s79
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s3, s78
; GFX11-NEXT:    v_pk_add_u16 v2, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v3, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s16, s4
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s17, s5
; GFX11-NEXT:    v_pk_add_u16 v4, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v5, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s18, s6
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s19, s7
; GFX11-NEXT:    v_pk_add_u16 v6, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v7, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s20, s8
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s21, s9
; GFX11-NEXT:    v_pk_add_u16 v8, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v9, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s22, s10
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s23, s11
; GFX11-NEXT:    v_pk_add_u16 v10, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v11, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s24, s12
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s25, s13
; GFX11-NEXT:    v_pk_add_u16 v12, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v13, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s26, s14
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s27, s15
; GFX11-NEXT:    v_pk_add_u16 v14, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v15, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s28, s47
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s29, s44
; GFX11-NEXT:    v_pk_add_u16 v16, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v17, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s75, s77
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s73, s76
; GFX11-NEXT:    v_pk_add_u16 v18, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v19, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s63, s74
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s62, s72
; GFX11-NEXT:    v_pk_add_u16 v20, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v21, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s59, s61
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s57, s60
; GFX11-NEXT:    v_pk_add_u16 v22, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v23, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s46, s58
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s43, s56
; GFX11-NEXT:    v_pk_add_u16 v24, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v25, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s42, s45
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s40, s41
; GFX11-NEXT:    v_pk_add_u16 v26, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v27, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = add <56 x i16> %a, splat (i16 3)
  %a2 = bitcast <56 x i16> %a1 to <28 x float>
  br label %end

cmp.false:
  %a3 = bitcast <56 x i16> %a to <28 x float>
  br label %end

end:
  %phi = phi <28 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <28 x float> %phi
}

define <56 x half> @bitcast_v28f32_to_v56f16(<28 x float> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v28f32_to_v56f16:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT:    ; implicit-def: $vgpr40
; SI-NEXT:    ; implicit-def: $vgpr47
; SI-NEXT:    ; implicit-def: $vgpr53
; SI-NEXT:    ; implicit-def: $vgpr46
; SI-NEXT:    ; implicit-def: $vgpr51
; SI-NEXT:    ; implicit-def: $vgpr45
; SI-NEXT:    ; implicit-def: $vgpr48
; SI-NEXT:    ; implicit-def: $vgpr44
; SI-NEXT:    ; implicit-def: $vgpr38
; SI-NEXT:    ; implicit-def: $vgpr43
; SI-NEXT:    ; implicit-def: $vgpr36
; SI-NEXT:    ; implicit-def: $vgpr42
; SI-NEXT:    ; implicit-def: $vgpr35
; SI-NEXT:    ; implicit-def: $vgpr41
; SI-NEXT:    ; implicit-def: $vgpr34
; SI-NEXT:    ; implicit-def: $vgpr55
; SI-NEXT:    ; implicit-def: $vgpr33
; SI-NEXT:    ; implicit-def: $vgpr54
; SI-NEXT:    ; implicit-def: $vgpr32
; SI-NEXT:    ; implicit-def: $vgpr52
; SI-NEXT:    ; implicit-def: $vgpr31
; SI-NEXT:    ; implicit-def: $vgpr50
; SI-NEXT:    ; implicit-def: $vgpr30
; SI-NEXT:    ; implicit-def: $vgpr49
; SI-NEXT:    ; implicit-def: $vgpr29
; SI-NEXT:    ; implicit-def: $vgpr39
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr37
; SI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB32_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    v_alignbit_b32 v28, v27, v26, 16
; SI-NEXT:    v_alignbit_b32 v29, v25, v24, 16
; SI-NEXT:    v_alignbit_b32 v30, v23, v22, 16
; SI-NEXT:    v_alignbit_b32 v31, v21, v20, 16
; SI-NEXT:    v_alignbit_b32 v32, v19, v18, 16
; SI-NEXT:    v_alignbit_b32 v33, v17, v16, 16
; SI-NEXT:    v_alignbit_b32 v34, v15, v14, 16
; SI-NEXT:    v_alignbit_b32 v35, v13, v12, 16
; SI-NEXT:    v_alignbit_b32 v36, v11, v10, 16
; SI-NEXT:    v_alignbit_b32 v38, v9, v8, 16
; SI-NEXT:    v_alignbit_b32 v48, v7, v6, 16
; SI-NEXT:    v_alignbit_b32 v51, v5, v4, 16
; SI-NEXT:    v_alignbit_b32 v53, v3, v2, 16
; SI-NEXT:    v_alignbit_b32 v40, v1, v0, 16
; SI-NEXT:    v_lshrrev_b32_e32 v37, 16, v27
; SI-NEXT:    v_lshrrev_b32_e32 v39, 16, v25
; SI-NEXT:    v_lshrrev_b32_e32 v49, 16, v23
; SI-NEXT:    v_lshrrev_b32_e32 v50, 16, v21
; SI-NEXT:    v_lshrrev_b32_e32 v52, 16, v19
; SI-NEXT:    v_lshrrev_b32_e32 v54, 16, v17
; SI-NEXT:    v_lshrrev_b32_e32 v55, 16, v15
; SI-NEXT:    s_waitcnt expcnt(6)
; SI-NEXT:    v_lshrrev_b32_e32 v41, 16, v13
; SI-NEXT:    s_waitcnt expcnt(5)
; SI-NEXT:    v_lshrrev_b32_e32 v42, 16, v11
; SI-NEXT:    s_waitcnt expcnt(4)
; SI-NEXT:    v_lshrrev_b32_e32 v43, 16, v9
; SI-NEXT:    s_waitcnt expcnt(3)
; SI-NEXT:    v_lshrrev_b32_e32 v44, 16, v7
; SI-NEXT:    s_waitcnt expcnt(2)
; SI-NEXT:    v_lshrrev_b32_e32 v45, 16, v5
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v46, 16, v3
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v47, 16, v1
; SI-NEXT:  .LBB32_2: ; %Flow
; SI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB32_4
; SI-NEXT:  ; %bb.3: ; %cmp.true
; SI-NEXT:    v_add_f32_e32 v1, 1.0, v1
; SI-NEXT:    v_add_f32_e32 v0, 1.0, v0
; SI-NEXT:    v_add_f32_e32 v3, 1.0, v3
; SI-NEXT:    v_add_f32_e32 v2, 1.0, v2
; SI-NEXT:    v_add_f32_e32 v5, 1.0, v5
; SI-NEXT:    v_add_f32_e32 v4, 1.0, v4
; SI-NEXT:    v_add_f32_e32 v7, 1.0, v7
; SI-NEXT:    v_add_f32_e32 v6, 1.0, v6
; SI-NEXT:    v_add_f32_e32 v9, 1.0, v9
; SI-NEXT:    v_add_f32_e32 v8, 1.0, v8
; SI-NEXT:    v_add_f32_e32 v11, 1.0, v11
; SI-NEXT:    v_add_f32_e32 v10, 1.0, v10
; SI-NEXT:    v_add_f32_e32 v13, 1.0, v13
; SI-NEXT:    v_add_f32_e32 v12, 1.0, v12
; SI-NEXT:    v_add_f32_e32 v15, 1.0, v15
; SI-NEXT:    v_add_f32_e32 v14, 1.0, v14
; SI-NEXT:    v_add_f32_e32 v17, 1.0, v17
; SI-NEXT:    v_add_f32_e32 v16, 1.0, v16
; SI-NEXT:    v_add_f32_e32 v19, 1.0, v19
; SI-NEXT:    v_add_f32_e32 v18, 1.0, v18
; SI-NEXT:    v_add_f32_e32 v21, 1.0, v21
; SI-NEXT:    v_add_f32_e32 v20, 1.0, v20
; SI-NEXT:    v_add_f32_e32 v23, 1.0, v23
; SI-NEXT:    v_add_f32_e32 v22, 1.0, v22
; SI-NEXT:    v_add_f32_e32 v25, 1.0, v25
; SI-NEXT:    v_add_f32_e32 v24, 1.0, v24
; SI-NEXT:    v_add_f32_e32 v27, 1.0, v27
; SI-NEXT:    v_add_f32_e32 v26, 1.0, v26
; SI-NEXT:    v_alignbit_b32 v28, v27, v26, 16
; SI-NEXT:    v_alignbit_b32 v29, v25, v24, 16
; SI-NEXT:    v_alignbit_b32 v30, v23, v22, 16
; SI-NEXT:    v_alignbit_b32 v31, v21, v20, 16
; SI-NEXT:    v_alignbit_b32 v32, v19, v18, 16
; SI-NEXT:    v_alignbit_b32 v33, v17, v16, 16
; SI-NEXT:    v_alignbit_b32 v34, v15, v14, 16
; SI-NEXT:    v_alignbit_b32 v35, v13, v12, 16
; SI-NEXT:    v_alignbit_b32 v36, v11, v10, 16
; SI-NEXT:    v_alignbit_b32 v38, v9, v8, 16
; SI-NEXT:    v_alignbit_b32 v48, v7, v6, 16
; SI-NEXT:    v_alignbit_b32 v51, v5, v4, 16
; SI-NEXT:    v_alignbit_b32 v53, v3, v2, 16
; SI-NEXT:    v_alignbit_b32 v40, v1, v0, 16
; SI-NEXT:    v_lshrrev_b32_e32 v37, 16, v27
; SI-NEXT:    v_lshrrev_b32_e32 v39, 16, v25
; SI-NEXT:    v_lshrrev_b32_e32 v49, 16, v23
; SI-NEXT:    v_lshrrev_b32_e32 v50, 16, v21
; SI-NEXT:    v_lshrrev_b32_e32 v52, 16, v19
; SI-NEXT:    v_lshrrev_b32_e32 v54, 16, v17
; SI-NEXT:    v_lshrrev_b32_e32 v55, 16, v15
; SI-NEXT:    s_waitcnt expcnt(6)
; SI-NEXT:    v_lshrrev_b32_e32 v41, 16, v13
; SI-NEXT:    s_waitcnt expcnt(5)
; SI-NEXT:    v_lshrrev_b32_e32 v42, 16, v11
; SI-NEXT:    s_waitcnt expcnt(4)
; SI-NEXT:    v_lshrrev_b32_e32 v43, 16, v9
; SI-NEXT:    s_waitcnt expcnt(3)
; SI-NEXT:    v_lshrrev_b32_e32 v44, 16, v7
; SI-NEXT:    s_waitcnt expcnt(2)
; SI-NEXT:    v_lshrrev_b32_e32 v45, 16, v5
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v46, 16, v3
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v47, 16, v1
; SI-NEXT:  .LBB32_4: ; %end
; SI-NEXT:    s_or_b64 exec, exec, s[4:5]
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT:    v_lshlrev_b32_e32 v40, 16, v40
; SI-NEXT:    v_or_b32_e32 v0, v0, v40
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT:    v_lshlrev_b32_e32 v40, 16, v47
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT:    v_lshlrev_b32_e32 v53, 16, v53
; SI-NEXT:    v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT:    v_lshlrev_b32_e32 v51, 16, v51
; SI-NEXT:    v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT:    v_lshlrev_b32_e32 v48, 16, v48
; SI-NEXT:    v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT:    v_lshlrev_b32_e32 v38, 16, v38
; SI-NEXT:    v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT:    v_lshlrev_b32_e32 v36, 16, v36
; SI-NEXT:    v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; SI-NEXT:    v_or_b32_e32 v1, v1, v40
; SI-NEXT:    v_or_b32_e32 v2, v2, v53
; SI-NEXT:    v_lshlrev_b32_e32 v53, 16, v46
; SI-NEXT:    v_or_b32_e32 v4, v4, v51
; SI-NEXT:    v_lshlrev_b32_e32 v51, 16, v45
; SI-NEXT:    v_or_b32_e32 v6, v6, v48
; SI-NEXT:    v_lshlrev_b32_e32 v48, 16, v44
; SI-NEXT:    v_or_b32_e32 v8, v8, v38
; SI-NEXT:    v_lshlrev_b32_e32 v38, 16, v43
; SI-NEXT:    v_or_b32_e32 v10, v10, v36
; SI-NEXT:    v_lshlrev_b32_e32 v36, 16, v42
; SI-NEXT:    v_or_b32_e32 v12, v12, v35
; SI-NEXT:    v_lshlrev_b32_e32 v35, 16, v41
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; SI-NEXT:    v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT:    v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT:    v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; SI-NEXT:    v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT:    v_lshlrev_b32_e32 v32, 16, v32
; SI-NEXT:    v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT:    v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT:    v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; SI-NEXT:    v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; SI-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; SI-NEXT:    v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT:    v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT:    v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT:    v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT:    v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT:    v_and_b32_e32 v13, 0xffff, v13
; SI-NEXT:    v_or_b32_e32 v14, v14, v34
; SI-NEXT:    v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT:    v_lshlrev_b32_e32 v34, 16, v55
; SI-NEXT:    v_or_b32_e32 v16, v16, v33
; SI-NEXT:    v_and_b32_e32 v17, 0xffff, v17
; SI-NEXT:    v_lshlrev_b32_e32 v33, 16, v54
; SI-NEXT:    v_or_b32_e32 v18, v18, v32
; SI-NEXT:    v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT:    v_lshlrev_b32_e32 v32, 16, v52
; SI-NEXT:    v_or_b32_e32 v20, v20, v31
; SI-NEXT:    v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT:    v_lshlrev_b32_e32 v31, 16, v50
; SI-NEXT:    v_or_b32_e32 v22, v22, v30
; SI-NEXT:    v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v49
; SI-NEXT:    v_or_b32_e32 v24, v24, v29
; SI-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v39
; SI-NEXT:    v_or_b32_e32 v26, v26, v28
; SI-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v37
; SI-NEXT:    v_or_b32_e32 v3, v3, v53
; SI-NEXT:    v_or_b32_e32 v5, v5, v51
; SI-NEXT:    v_or_b32_e32 v7, v7, v48
; SI-NEXT:    v_or_b32_e32 v9, v9, v38
; SI-NEXT:    v_or_b32_e32 v11, v11, v36
; SI-NEXT:    v_or_b32_e32 v13, v13, v35
; SI-NEXT:    v_or_b32_e32 v15, v15, v34
; SI-NEXT:    v_or_b32_e32 v17, v17, v33
; SI-NEXT:    v_or_b32_e32 v19, v19, v32
; SI-NEXT:    v_or_b32_e32 v21, v21, v31
; SI-NEXT:    v_or_b32_e32 v23, v23, v30
; SI-NEXT:    v_or_b32_e32 v25, v25, v29
; SI-NEXT:    v_or_b32_e32 v27, v27, v28
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v28f32_to_v56f16:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT:    ; implicit-def: $vgpr47
; VI-NEXT:    ; implicit-def: $vgpr46
; VI-NEXT:    ; implicit-def: $vgpr45
; VI-NEXT:    ; implicit-def: $vgpr44
; VI-NEXT:    ; implicit-def: $vgpr43
; VI-NEXT:    ; implicit-def: $vgpr42
; VI-NEXT:    ; implicit-def: $vgpr41
; VI-NEXT:    ; implicit-def: $vgpr40
; VI-NEXT:    ; implicit-def: $vgpr55
; VI-NEXT:    ; implicit-def: $vgpr54
; VI-NEXT:    ; implicit-def: $vgpr53
; VI-NEXT:    ; implicit-def: $vgpr52
; VI-NEXT:    ; implicit-def: $vgpr51
; VI-NEXT:    ; implicit-def: $vgpr50
; VI-NEXT:    ; implicit-def: $vgpr49
; VI-NEXT:    ; implicit-def: $vgpr48
; VI-NEXT:    ; implicit-def: $vgpr39
; VI-NEXT:    ; implicit-def: $vgpr38
; VI-NEXT:    ; implicit-def: $vgpr37
; VI-NEXT:    ; implicit-def: $vgpr36
; VI-NEXT:    ; implicit-def: $vgpr35
; VI-NEXT:    ; implicit-def: $vgpr34
; VI-NEXT:    ; implicit-def: $vgpr33
; VI-NEXT:    ; implicit-def: $vgpr32
; VI-NEXT:    ; implicit-def: $vgpr31
; VI-NEXT:    ; implicit-def: $vgpr30
; VI-NEXT:    ; implicit-def: $vgpr29
; VI-NEXT:    ; implicit-def: $vgpr28
; VI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB32_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; VI-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; VI-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; VI-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; VI-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; VI-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; VI-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; VI-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; VI-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; VI-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; VI-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; VI-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; VI-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; VI-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; VI-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; VI-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; VI-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; VI-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; VI-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; VI-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; VI-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; VI-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; VI-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; VI-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; VI-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; VI-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; VI-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; VI-NEXT:  .LBB32_2: ; %Flow
; VI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB32_4
; VI-NEXT:  ; %bb.3: ; %cmp.true
; VI-NEXT:    v_add_f32_e32 v27, 1.0, v27
; VI-NEXT:    v_add_f32_e32 v26, 1.0, v26
; VI-NEXT:    v_add_f32_e32 v25, 1.0, v25
; VI-NEXT:    v_add_f32_e32 v24, 1.0, v24
; VI-NEXT:    v_add_f32_e32 v23, 1.0, v23
; VI-NEXT:    v_add_f32_e32 v22, 1.0, v22
; VI-NEXT:    v_add_f32_e32 v21, 1.0, v21
; VI-NEXT:    v_add_f32_e32 v20, 1.0, v20
; VI-NEXT:    v_add_f32_e32 v19, 1.0, v19
; VI-NEXT:    v_add_f32_e32 v18, 1.0, v18
; VI-NEXT:    v_add_f32_e32 v17, 1.0, v17
; VI-NEXT:    v_add_f32_e32 v16, 1.0, v16
; VI-NEXT:    v_add_f32_e32 v15, 1.0, v15
; VI-NEXT:    v_add_f32_e32 v14, 1.0, v14
; VI-NEXT:    v_add_f32_e32 v13, 1.0, v13
; VI-NEXT:    v_add_f32_e32 v12, 1.0, v12
; VI-NEXT:    v_add_f32_e32 v11, 1.0, v11
; VI-NEXT:    v_add_f32_e32 v10, 1.0, v10
; VI-NEXT:    v_add_f32_e32 v9, 1.0, v9
; VI-NEXT:    v_add_f32_e32 v8, 1.0, v8
; VI-NEXT:    v_add_f32_e32 v7, 1.0, v7
; VI-NEXT:    v_add_f32_e32 v6, 1.0, v6
; VI-NEXT:    v_add_f32_e32 v5, 1.0, v5
; VI-NEXT:    v_add_f32_e32 v4, 1.0, v4
; VI-NEXT:    v_add_f32_e32 v3, 1.0, v3
; VI-NEXT:    v_add_f32_e32 v2, 1.0, v2
; VI-NEXT:    v_add_f32_e32 v1, 1.0, v1
; VI-NEXT:    v_add_f32_e32 v0, 1.0, v0
; VI-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; VI-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; VI-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; VI-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; VI-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; VI-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; VI-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; VI-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; VI-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; VI-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; VI-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; VI-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; VI-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; VI-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; VI-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; VI-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; VI-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; VI-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; VI-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; VI-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; VI-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; VI-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; VI-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; VI-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; VI-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; VI-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; VI-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; VI-NEXT:  .LBB32_4: ; %end
; VI-NEXT:    s_or_b64 exec, exec, s[4:5]
; VI-NEXT:    v_lshlrev_b32_e32 v47, 16, v47
; VI-NEXT:    v_lshlrev_b32_e32 v46, 16, v46
; VI-NEXT:    v_lshlrev_b32_e32 v45, 16, v45
; VI-NEXT:    v_lshlrev_b32_e32 v44, 16, v44
; VI-NEXT:    v_lshlrev_b32_e32 v43, 16, v43
; VI-NEXT:    v_lshlrev_b32_e32 v42, 16, v42
; VI-NEXT:    v_lshlrev_b32_e32 v41, 16, v41
; VI-NEXT:    v_lshlrev_b32_e32 v40, 16, v40
; VI-NEXT:    v_or_b32_sdwa v0, v0, v47 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v1, v1, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v2, v2, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v3, v3, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v4, v4, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v5, v5, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v6, v6, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v7, v7, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; VI-NEXT:    v_lshlrev_b32_e32 v55, 16, v55
; VI-NEXT:    v_lshlrev_b32_e32 v54, 16, v54
; VI-NEXT:    v_lshlrev_b32_e32 v53, 16, v53
; VI-NEXT:    v_lshlrev_b32_e32 v52, 16, v52
; VI-NEXT:    v_lshlrev_b32_e32 v51, 16, v51
; VI-NEXT:    v_lshlrev_b32_e32 v50, 16, v50
; VI-NEXT:    v_lshlrev_b32_e32 v49, 16, v49
; VI-NEXT:    v_lshlrev_b32_e32 v48, 16, v48
; VI-NEXT:    v_lshlrev_b32_e32 v39, 16, v39
; VI-NEXT:    v_lshlrev_b32_e32 v38, 16, v38
; VI-NEXT:    v_lshlrev_b32_e32 v37, 16, v37
; VI-NEXT:    v_lshlrev_b32_e32 v36, 16, v36
; VI-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v34
; VI-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; VI-NEXT:    v_lshlrev_b32_e32 v32, 16, v32
; VI-NEXT:    v_lshlrev_b32_e32 v31, 16, v31
; VI-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; VI-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; VI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; VI-NEXT:    v_or_b32_sdwa v8, v8, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v9, v9, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v10, v10, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v11, v11, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v12, v12, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v13, v13, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v14, v14, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v15, v15, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v16, v16, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v17, v17, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v18, v18, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v19, v19, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v20, v20, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v21, v21, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v22, v22, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v23, v23, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v24, v24, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v25, v25, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v26, v26, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v28f32_to_v56f16:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT:    ; implicit-def: $vgpr47
; GFX9-NEXT:    ; implicit-def: $vgpr46
; GFX9-NEXT:    ; implicit-def: $vgpr45
; GFX9-NEXT:    ; implicit-def: $vgpr44
; GFX9-NEXT:    ; implicit-def: $vgpr43
; GFX9-NEXT:    ; implicit-def: $vgpr42
; GFX9-NEXT:    ; implicit-def: $vgpr41
; GFX9-NEXT:    ; implicit-def: $vgpr40
; GFX9-NEXT:    ; implicit-def: $vgpr55
; GFX9-NEXT:    ; implicit-def: $vgpr54
; GFX9-NEXT:    ; implicit-def: $vgpr53
; GFX9-NEXT:    ; implicit-def: $vgpr52
; GFX9-NEXT:    ; implicit-def: $vgpr51
; GFX9-NEXT:    ; implicit-def: $vgpr50
; GFX9-NEXT:    ; implicit-def: $vgpr49
; GFX9-NEXT:    ; implicit-def: $vgpr48
; GFX9-NEXT:    ; implicit-def: $vgpr39
; GFX9-NEXT:    ; implicit-def: $vgpr38
; GFX9-NEXT:    ; implicit-def: $vgpr37
; GFX9-NEXT:    ; implicit-def: $vgpr36
; GFX9-NEXT:    ; implicit-def: $vgpr35
; GFX9-NEXT:    ; implicit-def: $vgpr34
; GFX9-NEXT:    ; implicit-def: $vgpr33
; GFX9-NEXT:    ; implicit-def: $vgpr32
; GFX9-NEXT:    ; implicit-def: $vgpr31
; GFX9-NEXT:    ; implicit-def: $vgpr30
; GFX9-NEXT:    ; implicit-def: $vgpr29
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB32_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX9-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX9-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX9-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX9-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX9-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX9-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX9-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX9-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX9-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX9-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX9-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX9-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX9-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX9-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX9-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX9-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; GFX9-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; GFX9-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; GFX9-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; GFX9-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; GFX9-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; GFX9-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; GFX9-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; GFX9-NEXT:  .LBB32_2: ; %Flow
; GFX9-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB32_4
; GFX9-NEXT:  ; %bb.3: ; %cmp.true
; GFX9-NEXT:    v_add_f32_e32 v27, 1.0, v27
; GFX9-NEXT:    v_add_f32_e32 v26, 1.0, v26
; GFX9-NEXT:    v_add_f32_e32 v25, 1.0, v25
; GFX9-NEXT:    v_add_f32_e32 v24, 1.0, v24
; GFX9-NEXT:    v_add_f32_e32 v23, 1.0, v23
; GFX9-NEXT:    v_add_f32_e32 v22, 1.0, v22
; GFX9-NEXT:    v_add_f32_e32 v21, 1.0, v21
; GFX9-NEXT:    v_add_f32_e32 v20, 1.0, v20
; GFX9-NEXT:    v_add_f32_e32 v19, 1.0, v19
; GFX9-NEXT:    v_add_f32_e32 v18, 1.0, v18
; GFX9-NEXT:    v_add_f32_e32 v17, 1.0, v17
; GFX9-NEXT:    v_add_f32_e32 v16, 1.0, v16
; GFX9-NEXT:    v_add_f32_e32 v15, 1.0, v15
; GFX9-NEXT:    v_add_f32_e32 v14, 1.0, v14
; GFX9-NEXT:    v_add_f32_e32 v13, 1.0, v13
; GFX9-NEXT:    v_add_f32_e32 v12, 1.0, v12
; GFX9-NEXT:    v_add_f32_e32 v11, 1.0, v11
; GFX9-NEXT:    v_add_f32_e32 v10, 1.0, v10
; GFX9-NEXT:    v_add_f32_e32 v9, 1.0, v9
; GFX9-NEXT:    v_add_f32_e32 v8, 1.0, v8
; GFX9-NEXT:    v_add_f32_e32 v7, 1.0, v7
; GFX9-NEXT:    v_add_f32_e32 v6, 1.0, v6
; GFX9-NEXT:    v_add_f32_e32 v5, 1.0, v5
; GFX9-NEXT:    v_add_f32_e32 v4, 1.0, v4
; GFX9-NEXT:    v_add_f32_e32 v3, 1.0, v3
; GFX9-NEXT:    v_add_f32_e32 v2, 1.0, v2
; GFX9-NEXT:    v_add_f32_e32 v1, 1.0, v1
; GFX9-NEXT:    v_add_f32_e32 v0, 1.0, v0
; GFX9-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX9-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX9-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX9-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX9-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX9-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX9-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX9-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX9-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX9-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX9-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX9-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX9-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX9-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX9-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX9-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX9-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; GFX9-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; GFX9-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; GFX9-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; GFX9-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; GFX9-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; GFX9-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; GFX9-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; GFX9-NEXT:  .LBB32_4: ; %end
; GFX9-NEXT:    s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT:    s_mov_b32 s4, 0x5040100
; GFX9-NEXT:    v_perm_b32 v0, v47, v0, s4
; GFX9-NEXT:    v_perm_b32 v1, v46, v1, s4
; GFX9-NEXT:    v_perm_b32 v2, v45, v2, s4
; GFX9-NEXT:    v_perm_b32 v3, v44, v3, s4
; GFX9-NEXT:    v_perm_b32 v4, v43, v4, s4
; GFX9-NEXT:    v_perm_b32 v5, v42, v5, s4
; GFX9-NEXT:    v_perm_b32 v6, v41, v6, s4
; GFX9-NEXT:    v_perm_b32 v7, v40, v7, s4
; GFX9-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; GFX9-NEXT:    v_perm_b32 v8, v55, v8, s4
; GFX9-NEXT:    v_perm_b32 v9, v54, v9, s4
; GFX9-NEXT:    v_perm_b32 v10, v53, v10, s4
; GFX9-NEXT:    v_perm_b32 v11, v52, v11, s4
; GFX9-NEXT:    v_perm_b32 v12, v51, v12, s4
; GFX9-NEXT:    v_perm_b32 v13, v50, v13, s4
; GFX9-NEXT:    v_perm_b32 v14, v49, v14, s4
; GFX9-NEXT:    v_perm_b32 v15, v48, v15, s4
; GFX9-NEXT:    v_perm_b32 v16, v39, v16, s4
; GFX9-NEXT:    v_perm_b32 v17, v38, v17, s4
; GFX9-NEXT:    v_perm_b32 v18, v37, v18, s4
; GFX9-NEXT:    v_perm_b32 v19, v36, v19, s4
; GFX9-NEXT:    v_perm_b32 v20, v35, v20, s4
; GFX9-NEXT:    v_perm_b32 v21, v34, v21, s4
; GFX9-NEXT:    v_perm_b32 v22, v33, v22, s4
; GFX9-NEXT:    v_perm_b32 v23, v32, v23, s4
; GFX9-NEXT:    v_perm_b32 v24, v31, v24, s4
; GFX9-NEXT:    v_perm_b32 v25, v30, v25, s4
; GFX9-NEXT:    v_perm_b32 v26, v29, v26, s4
; GFX9-NEXT:    v_perm_b32 v27, v28, v27, s4
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-TRUE16-LABEL: bitcast_v28f32_to_v56f16:
; GFX11-TRUE16:       ; %bb.0:
; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-TRUE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT:    s_cbranch_execz .LBB32_2
; GFX11-TRUE16-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-TRUE16-NEXT:    v_dual_add_f32 v27, 1.0, v27 :: v_dual_add_f32 v26, 1.0, v26
; GFX11-TRUE16-NEXT:    v_dual_add_f32 v25, 1.0, v25 :: v_dual_add_f32 v24, 1.0, v24
; GFX11-TRUE16-NEXT:    v_dual_add_f32 v23, 1.0, v23 :: v_dual_add_f32 v22, 1.0, v22
; GFX11-TRUE16-NEXT:    v_dual_add_f32 v21, 1.0, v21 :: v_dual_add_f32 v20, 1.0, v20
; GFX11-TRUE16-NEXT:    v_dual_add_f32 v19, 1.0, v19 :: v_dual_add_f32 v18, 1.0, v18
; GFX11-TRUE16-NEXT:    v_dual_add_f32 v17, 1.0, v17 :: v_dual_add_f32 v16, 1.0, v16
; GFX11-TRUE16-NEXT:    v_dual_add_f32 v15, 1.0, v15 :: v_dual_add_f32 v14, 1.0, v14
; GFX11-TRUE16-NEXT:    v_dual_add_f32 v13, 1.0, v13 :: v_dual_add_f32 v12, 1.0, v12
; GFX11-TRUE16-NEXT:    v_dual_add_f32 v11, 1.0, v11 :: v_dual_add_f32 v10, 1.0, v10
; GFX11-TRUE16-NEXT:    v_dual_add_f32 v9, 1.0, v9 :: v_dual_add_f32 v8, 1.0, v8
; GFX11-TRUE16-NEXT:    v_dual_add_f32 v7, 1.0, v7 :: v_dual_add_f32 v6, 1.0, v6
; GFX11-TRUE16-NEXT:    v_dual_add_f32 v5, 1.0, v5 :: v_dual_add_f32 v4, 1.0, v4
; GFX11-TRUE16-NEXT:    v_dual_add_f32 v3, 1.0, v3 :: v_dual_add_f32 v2, 1.0, v2
; GFX11-TRUE16-NEXT:    v_dual_add_f32 v1, 1.0, v1 :: v_dual_add_f32 v0, 1.0, v0
; GFX11-TRUE16-NEXT:  .LBB32_2: ; %end
; GFX11-TRUE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v28f32_to_v56f16:
; GFX11-FAKE16:       ; %bb.0:
; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v28
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr71
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr70
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr69
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr68
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr67
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr66
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr65
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr64
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr55
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr54
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr53
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr52
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr51
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr50
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr49
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr48
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr39
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr38
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr37
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr36
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr35
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr34
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr33
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr32
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr31
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr30
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr29
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr28
; GFX11-FAKE16-NEXT:    s_and_saveexec_b32 s0, vcc_lo
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_cbranch_execz .LBB32_2
; GFX11-FAKE16-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v3
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v2
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v0
; GFX11-FAKE16-NEXT:  .LBB32_2: ; %Flow
; GFX11-FAKE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-FAKE16-NEXT:    s_cbranch_execz .LBB32_4
; GFX11-FAKE16-NEXT:  ; %bb.3: ; %cmp.true
; GFX11-FAKE16-NEXT:    v_dual_add_f32 v27, 1.0, v27 :: v_dual_add_f32 v26, 1.0, v26
; GFX11-FAKE16-NEXT:    v_dual_add_f32 v25, 1.0, v25 :: v_dual_add_f32 v24, 1.0, v24
; GFX11-FAKE16-NEXT:    v_dual_add_f32 v23, 1.0, v23 :: v_dual_add_f32 v22, 1.0, v22
; GFX11-FAKE16-NEXT:    v_dual_add_f32 v21, 1.0, v21 :: v_dual_add_f32 v20, 1.0, v20
; GFX11-FAKE16-NEXT:    v_dual_add_f32 v19, 1.0, v19 :: v_dual_add_f32 v18, 1.0, v18
; GFX11-FAKE16-NEXT:    v_dual_add_f32 v17, 1.0, v17 :: v_dual_add_f32 v16, 1.0, v16
; GFX11-FAKE16-NEXT:    v_dual_add_f32 v15, 1.0, v15 :: v_dual_add_f32 v14, 1.0, v14
; GFX11-FAKE16-NEXT:    v_dual_add_f32 v13, 1.0, v13 :: v_dual_add_f32 v12, 1.0, v12
; GFX11-FAKE16-NEXT:    v_dual_add_f32 v11, 1.0, v11 :: v_dual_add_f32 v10, 1.0, v10
; GFX11-FAKE16-NEXT:    v_dual_add_f32 v9, 1.0, v9 :: v_dual_add_f32 v8, 1.0, v8
; GFX11-FAKE16-NEXT:    v_dual_add_f32 v7, 1.0, v7 :: v_dual_add_f32 v6, 1.0, v6
; GFX11-FAKE16-NEXT:    v_dual_add_f32 v5, 1.0, v5 :: v_dual_add_f32 v4, 1.0, v4
; GFX11-FAKE16-NEXT:    v_dual_add_f32 v3, 1.0, v3 :: v_dual_add_f32 v2, 1.0, v2
; GFX11-FAKE16-NEXT:    v_dual_add_f32 v1, 1.0, v1 :: v_dual_add_f32 v0, 1.0, v0
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v3
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v2
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v0
; GFX11-FAKE16-NEXT:  .LBB32_4: ; %end
; GFX11-FAKE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v71, v0, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v1, v70, v1, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v2, v69, v2, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v3, v68, v3, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v4, v67, v4, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v5, v66, v5, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v6, v65, v6, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v7, v64, v7, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v8, v55, v8, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v9, v54, v9, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v10, v53, v10, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v11, v52, v11, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v12, v51, v12, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v13, v50, v13, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v14, v49, v14, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v15, v48, v15, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v16, v39, v16, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v17, v38, v17, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v18, v37, v18, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v19, v36, v19, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v20, v35, v20, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v21, v34, v21, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v22, v33, v22, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v23, v32, v23, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v24, v31, v24, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v25, v30, v25, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v26, v29, v26, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v27, v28, v27, 0x5040100
; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = fadd <28 x float> %a, splat (float 1.000000e+00)
  %a2 = bitcast <28 x float> %a1 to <56 x half>
  br label %end

cmp.false:
  %a3 = bitcast <28 x float> %a to <56 x half>
  br label %end

end:
  %phi = phi <56 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <56 x half> %phi
}

define inreg <56 x half> @bitcast_v28f32_to_v56f16_scalar(<28 x float> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v28f32_to_v56f16_scalar:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    s_or_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v56, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    v_writelane_b32 v57, s34, 0
; SI-NEXT:    v_writelane_b32 v57, s35, 1
; SI-NEXT:    v_writelane_b32 v57, s36, 2
; SI-NEXT:    v_writelane_b32 v57, s37, 3
; SI-NEXT:    v_writelane_b32 v57, s38, 4
; SI-NEXT:    v_writelane_b32 v57, s39, 5
; SI-NEXT:    v_writelane_b32 v57, s48, 6
; SI-NEXT:    v_writelane_b32 v57, s49, 7
; SI-NEXT:    v_writelane_b32 v57, s30, 8
; SI-NEXT:    v_writelane_b32 v57, s31, 9
; SI-NEXT:    v_readfirstlane_b32 s40, v14
; SI-NEXT:    v_readfirstlane_b32 s5, v13
; SI-NEXT:    v_readfirstlane_b32 s4, v12
; SI-NEXT:    v_readfirstlane_b32 s7, v11
; SI-NEXT:    v_readfirstlane_b32 s6, v10
; SI-NEXT:    v_readfirstlane_b32 s9, v9
; SI-NEXT:    v_readfirstlane_b32 s8, v8
; SI-NEXT:    v_readfirstlane_b32 s11, v7
; SI-NEXT:    v_readfirstlane_b32 s10, v6
; SI-NEXT:    v_readfirstlane_b32 s13, v5
; SI-NEXT:    v_readfirstlane_b32 s12, v4
; SI-NEXT:    v_readfirstlane_b32 s15, v3
; SI-NEXT:    v_readfirstlane_b32 s14, v2
; SI-NEXT:    v_readfirstlane_b32 s41, v1
; SI-NEXT:    s_cmp_lg_u32 s40, 0
; SI-NEXT:    v_readfirstlane_b32 s40, v0
; SI-NEXT:    s_cbranch_scc0 .LBB33_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    s_lshr_b32 s94, s5, 16
; SI-NEXT:    s_lshr_b32 s95, s7, 16
; SI-NEXT:    s_lshr_b32 vcc_lo, s9, 16
; SI-NEXT:    s_lshr_b32 vcc_hi, s11, 16
; SI-NEXT:    s_lshr_b32 s30, s13, 16
; SI-NEXT:    s_lshr_b32 s31, s15, 16
; SI-NEXT:    s_lshr_b32 s34, s41, 16
; SI-NEXT:    s_lshr_b32 s35, s29, 16
; SI-NEXT:    s_lshr_b32 s36, s27, 16
; SI-NEXT:    s_lshr_b32 s37, s25, 16
; SI-NEXT:    s_lshr_b32 s38, s23, 16
; SI-NEXT:    s_lshr_b32 s39, s21, 16
; SI-NEXT:    s_lshr_b32 s48, s19, 16
; SI-NEXT:    s_lshr_b32 s49, s17, 16
; SI-NEXT:    s_lshr_b64 s[42:43], s[4:5], 16
; SI-NEXT:    s_lshr_b64 s[44:45], s[6:7], 16
; SI-NEXT:    s_lshr_b64 s[46:47], s[8:9], 16
; SI-NEXT:    s_lshr_b64 s[56:57], s[10:11], 16
; SI-NEXT:    s_lshr_b64 s[58:59], s[12:13], 16
; SI-NEXT:    s_lshr_b64 s[60:61], s[14:15], 16
; SI-NEXT:    s_lshr_b64 s[62:63], s[40:41], 16
; SI-NEXT:    s_lshr_b64 s[72:73], s[28:29], 16
; SI-NEXT:    s_lshr_b64 s[74:75], s[26:27], 16
; SI-NEXT:    s_lshr_b64 s[76:77], s[24:25], 16
; SI-NEXT:    s_lshr_b64 s[78:79], s[22:23], 16
; SI-NEXT:    s_lshr_b64 s[88:89], s[20:21], 16
; SI-NEXT:    s_lshr_b64 s[90:91], s[18:19], 16
; SI-NEXT:    s_lshr_b64 s[92:93], s[16:17], 16
; SI-NEXT:    v_mov_b32_e32 v0, s16
; SI-NEXT:    v_mov_b32_e32 v1, s17
; SI-NEXT:    v_mov_b32_e32 v2, s18
; SI-NEXT:    v_mov_b32_e32 v3, s19
; SI-NEXT:    v_mov_b32_e32 v4, s20
; SI-NEXT:    v_mov_b32_e32 v5, s21
; SI-NEXT:    v_mov_b32_e32 v6, s22
; SI-NEXT:    v_mov_b32_e32 v7, s23
; SI-NEXT:    v_mov_b32_e32 v8, s24
; SI-NEXT:    v_mov_b32_e32 v9, s25
; SI-NEXT:    v_mov_b32_e32 v10, s26
; SI-NEXT:    v_mov_b32_e32 v11, s27
; SI-NEXT:    v_mov_b32_e32 v12, s28
; SI-NEXT:    v_mov_b32_e32 v13, s29
; SI-NEXT:    v_mov_b32_e32 v14, s40
; SI-NEXT:    v_mov_b32_e32 v15, s41
; SI-NEXT:    v_mov_b32_e32 v16, s14
; SI-NEXT:    v_mov_b32_e32 v17, s15
; SI-NEXT:    v_mov_b32_e32 v18, s12
; SI-NEXT:    v_mov_b32_e32 v19, s13
; SI-NEXT:    v_mov_b32_e32 v20, s10
; SI-NEXT:    v_mov_b32_e32 v21, s11
; SI-NEXT:    v_mov_b32_e32 v22, s8
; SI-NEXT:    v_mov_b32_e32 v23, s9
; SI-NEXT:    v_mov_b32_e32 v24, s6
; SI-NEXT:    v_mov_b32_e32 v25, s7
; SI-NEXT:    v_mov_b32_e32 v26, s4
; SI-NEXT:    v_mov_b32_e32 v27, s5
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_mov_b32_e32 v47, s49
; SI-NEXT:    v_mov_b32_e32 v46, s48
; SI-NEXT:    v_mov_b32_e32 v45, s39
; SI-NEXT:    v_mov_b32_e32 v44, s38
; SI-NEXT:    v_mov_b32_e32 v43, s37
; SI-NEXT:    v_mov_b32_e32 v51, s36
; SI-NEXT:    v_mov_b32_e32 v42, s35
; SI-NEXT:    v_mov_b32_e32 v41, s34
; SI-NEXT:    v_mov_b32_e32 v40, s31
; SI-NEXT:    v_mov_b32_e32 v39, s30
; SI-NEXT:    v_mov_b32_e32 v55, vcc_hi
; SI-NEXT:    v_mov_b32_e32 v54, vcc_lo
; SI-NEXT:    v_mov_b32_e32 v53, s95
; SI-NEXT:    v_mov_b32_e32 v52, s94
; SI-NEXT:    v_mov_b32_e32 v28, s42
; SI-NEXT:    v_mov_b32_e32 v29, s44
; SI-NEXT:    v_mov_b32_e32 v30, s46
; SI-NEXT:    v_mov_b32_e32 v31, s56
; SI-NEXT:    v_mov_b32_e32 v32, s58
; SI-NEXT:    v_mov_b32_e32 v33, s60
; SI-NEXT:    v_mov_b32_e32 v34, s62
; SI-NEXT:    v_mov_b32_e32 v35, s72
; SI-NEXT:    v_mov_b32_e32 v36, s74
; SI-NEXT:    v_mov_b32_e32 v37, s76
; SI-NEXT:    v_mov_b32_e32 v38, s78
; SI-NEXT:    v_mov_b32_e32 v48, s88
; SI-NEXT:    v_mov_b32_e32 v49, s90
; SI-NEXT:    v_mov_b32_e32 v50, s92
; SI-NEXT:    s_branch .LBB33_3
; SI-NEXT:  .LBB33_2: ; %cmp.true
; SI-NEXT:    v_add_f32_e64 v27, s5, 1.0
; SI-NEXT:    v_add_f32_e64 v26, s4, 1.0
; SI-NEXT:    v_add_f32_e64 v25, s7, 1.0
; SI-NEXT:    v_add_f32_e64 v24, s6, 1.0
; SI-NEXT:    v_lshr_b64 v[28:29], v[26:27], 16
; SI-NEXT:    v_add_f32_e64 v23, s9, 1.0
; SI-NEXT:    v_add_f32_e64 v22, s8, 1.0
; SI-NEXT:    v_lshr_b64 v[29:30], v[24:25], 16
; SI-NEXT:    v_add_f32_e64 v21, s11, 1.0
; SI-NEXT:    v_add_f32_e64 v20, s10, 1.0
; SI-NEXT:    v_lshr_b64 v[30:31], v[22:23], 16
; SI-NEXT:    v_add_f32_e64 v19, s13, 1.0
; SI-NEXT:    v_add_f32_e64 v18, s12, 1.0
; SI-NEXT:    v_lshr_b64 v[31:32], v[20:21], 16
; SI-NEXT:    v_add_f32_e64 v17, s15, 1.0
; SI-NEXT:    v_add_f32_e64 v16, s14, 1.0
; SI-NEXT:    v_lshr_b64 v[32:33], v[18:19], 16
; SI-NEXT:    v_add_f32_e64 v15, s41, 1.0
; SI-NEXT:    v_add_f32_e64 v14, s40, 1.0
; SI-NEXT:    v_lshr_b64 v[33:34], v[16:17], 16
; SI-NEXT:    v_add_f32_e64 v13, s29, 1.0
; SI-NEXT:    v_add_f32_e64 v12, s28, 1.0
; SI-NEXT:    v_lshr_b64 v[34:35], v[14:15], 16
; SI-NEXT:    v_add_f32_e64 v11, s27, 1.0
; SI-NEXT:    v_add_f32_e64 v10, s26, 1.0
; SI-NEXT:    v_lshr_b64 v[35:36], v[12:13], 16
; SI-NEXT:    v_add_f32_e64 v9, s25, 1.0
; SI-NEXT:    v_add_f32_e64 v8, s24, 1.0
; SI-NEXT:    v_lshr_b64 v[36:37], v[10:11], 16
; SI-NEXT:    v_add_f32_e64 v7, s23, 1.0
; SI-NEXT:    v_add_f32_e64 v6, s22, 1.0
; SI-NEXT:    v_lshr_b64 v[37:38], v[8:9], 16
; SI-NEXT:    v_add_f32_e64 v5, s21, 1.0
; SI-NEXT:    v_add_f32_e64 v4, s20, 1.0
; SI-NEXT:    v_lshrrev_b32_e32 v48, 16, v19
; SI-NEXT:    v_lshr_b64 v[38:39], v[6:7], 16
; SI-NEXT:    v_add_f32_e64 v3, s19, 1.0
; SI-NEXT:    v_add_f32_e64 v2, s18, 1.0
; SI-NEXT:    v_mov_b32_e32 v39, v48
; SI-NEXT:    v_lshr_b64 v[48:49], v[4:5], 16
; SI-NEXT:    v_add_f32_e64 v1, s17, 1.0
; SI-NEXT:    v_add_f32_e64 v0, s16, 1.0
; SI-NEXT:    v_lshr_b64 v[49:50], v[2:3], 16
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v56, 16, v11
; SI-NEXT:    v_lshr_b64 v[50:51], v[0:1], 16
; SI-NEXT:    v_lshrrev_b32_e32 v52, 16, v27
; SI-NEXT:    v_lshrrev_b32_e32 v53, 16, v25
; SI-NEXT:    v_lshrrev_b32_e32 v54, 16, v23
; SI-NEXT:    v_lshrrev_b32_e32 v55, 16, v21
; SI-NEXT:    v_lshrrev_b32_e32 v40, 16, v17
; SI-NEXT:    v_lshrrev_b32_e32 v41, 16, v15
; SI-NEXT:    v_lshrrev_b32_e32 v42, 16, v13
; SI-NEXT:    v_lshrrev_b32_e32 v43, 16, v9
; SI-NEXT:    v_lshrrev_b32_e32 v44, 16, v7
; SI-NEXT:    v_lshrrev_b32_e32 v45, 16, v5
; SI-NEXT:    v_lshrrev_b32_e32 v46, 16, v3
; SI-NEXT:    v_lshrrev_b32_e32 v47, 16, v1
; SI-NEXT:    v_mov_b32_e32 v51, v56
; SI-NEXT:  .LBB33_3: ; %end
; SI-NEXT:    v_lshlrev_b32_e32 v50, 16, v50
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT:    v_lshlrev_b32_e32 v49, 16, v49
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT:    v_lshlrev_b32_e32 v48, 16, v48
; SI-NEXT:    v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT:    v_lshlrev_b32_e32 v38, 16, v38
; SI-NEXT:    v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT:    v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT:    v_lshlrev_b32_e32 v37, 16, v37
; SI-NEXT:    v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; SI-NEXT:    v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT:    v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT:    v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; SI-NEXT:    v_or_b32_e32 v0, v0, v50
; SI-NEXT:    v_lshlrev_b32_e32 v50, 16, v47
; SI-NEXT:    v_or_b32_e32 v2, v2, v49
; SI-NEXT:    v_lshlrev_b32_e32 v49, 16, v46
; SI-NEXT:    v_or_b32_e32 v4, v4, v48
; SI-NEXT:    v_lshlrev_b32_e32 v48, 16, v45
; SI-NEXT:    v_or_b32_e32 v6, v6, v38
; SI-NEXT:    v_lshlrev_b32_e32 v38, 16, v44
; SI-NEXT:    v_or_b32_e32 v8, v8, v37
; SI-NEXT:    v_lshlrev_b32_e32 v37, 16, v43
; SI-NEXT:    v_or_b32_e32 v12, v12, v35
; SI-NEXT:    v_lshlrev_b32_e32 v35, 16, v42
; SI-NEXT:    v_or_b32_e32 v14, v14, v34
; SI-NEXT:    v_lshlrev_b32_e32 v34, 16, v41
; SI-NEXT:    v_or_b32_e32 v16, v16, v33
; SI-NEXT:    v_lshlrev_b32_e32 v33, 16, v40
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    buffer_load_dword v56, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; SI-NEXT:    v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT:    v_lshlrev_b32_e32 v36, 16, v36
; SI-NEXT:    v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT:    v_lshlrev_b32_e32 v32, 16, v32
; SI-NEXT:    v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT:    v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT:    v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; SI-NEXT:    v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; SI-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT:    v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT:    v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT:    v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT:    v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT:    v_or_b32_e32 v10, v10, v36
; SI-NEXT:    v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT:    v_lshlrev_b32_e32 v36, 16, v51
; SI-NEXT:    v_and_b32_e32 v13, 0xffff, v13
; SI-NEXT:    v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT:    v_and_b32_e32 v17, 0xffff, v17
; SI-NEXT:    v_or_b32_e32 v18, v18, v32
; SI-NEXT:    v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT:    v_lshlrev_b32_e32 v32, 16, v39
; SI-NEXT:    v_or_b32_e32 v20, v20, v31
; SI-NEXT:    v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT:    v_lshlrev_b32_e32 v31, 16, v55
; SI-NEXT:    v_or_b32_e32 v22, v22, v30
; SI-NEXT:    v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v54
; SI-NEXT:    v_or_b32_e32 v24, v24, v29
; SI-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v53
; SI-NEXT:    v_or_b32_e32 v26, v26, v28
; SI-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v52
; SI-NEXT:    v_readlane_b32 s30, v57, 8
; SI-NEXT:    v_or_b32_e32 v1, v1, v50
; SI-NEXT:    v_or_b32_e32 v3, v3, v49
; SI-NEXT:    v_or_b32_e32 v5, v5, v48
; SI-NEXT:    v_or_b32_e32 v7, v7, v38
; SI-NEXT:    v_or_b32_e32 v9, v9, v37
; SI-NEXT:    v_or_b32_e32 v11, v11, v36
; SI-NEXT:    v_or_b32_e32 v13, v13, v35
; SI-NEXT:    v_or_b32_e32 v15, v15, v34
; SI-NEXT:    v_or_b32_e32 v17, v17, v33
; SI-NEXT:    v_or_b32_e32 v19, v19, v32
; SI-NEXT:    v_or_b32_e32 v21, v21, v31
; SI-NEXT:    v_or_b32_e32 v23, v23, v30
; SI-NEXT:    v_or_b32_e32 v25, v25, v29
; SI-NEXT:    v_or_b32_e32 v27, v27, v28
; SI-NEXT:    v_readlane_b32 s31, v57, 9
; SI-NEXT:    v_readlane_b32 s49, v57, 7
; SI-NEXT:    v_readlane_b32 s48, v57, 6
; SI-NEXT:    v_readlane_b32 s39, v57, 5
; SI-NEXT:    v_readlane_b32 s38, v57, 4
; SI-NEXT:    v_readlane_b32 s37, v57, 3
; SI-NEXT:    v_readlane_b32 s36, v57, 2
; SI-NEXT:    v_readlane_b32 s35, v57, 1
; SI-NEXT:    v_readlane_b32 s34, v57, 0
; SI-NEXT:    s_or_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_load_dword v57, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v28f32_to_v56f16_scalar:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    v_readfirstlane_b32 s41, v14
; VI-NEXT:    v_readfirstlane_b32 s4, v13
; VI-NEXT:    v_readfirstlane_b32 s5, v12
; VI-NEXT:    v_readfirstlane_b32 s6, v11
; VI-NEXT:    v_readfirstlane_b32 s7, v10
; VI-NEXT:    v_readfirstlane_b32 s8, v9
; VI-NEXT:    v_readfirstlane_b32 s9, v8
; VI-NEXT:    v_readfirstlane_b32 s10, v7
; VI-NEXT:    v_readfirstlane_b32 s11, v6
; VI-NEXT:    v_readfirstlane_b32 s12, v5
; VI-NEXT:    v_readfirstlane_b32 s13, v4
; VI-NEXT:    v_readfirstlane_b32 s14, v3
; VI-NEXT:    v_readfirstlane_b32 s15, v2
; VI-NEXT:    v_readfirstlane_b32 s40, v1
; VI-NEXT:    s_cmp_lg_u32 s41, 0
; VI-NEXT:    v_readfirstlane_b32 s41, v0
; VI-NEXT:    s_cbranch_scc0 .LBB33_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    s_lshr_b32 s42, s4, 16
; VI-NEXT:    s_lshr_b32 s43, s5, 16
; VI-NEXT:    s_lshr_b32 s44, s6, 16
; VI-NEXT:    s_lshr_b32 s45, s7, 16
; VI-NEXT:    s_lshr_b32 s46, s8, 16
; VI-NEXT:    s_lshr_b32 s47, s9, 16
; VI-NEXT:    s_lshr_b32 s56, s10, 16
; VI-NEXT:    s_lshr_b32 s57, s11, 16
; VI-NEXT:    s_lshr_b32 s58, s12, 16
; VI-NEXT:    s_lshr_b32 s59, s13, 16
; VI-NEXT:    s_lshr_b32 s60, s14, 16
; VI-NEXT:    s_lshr_b32 s61, s15, 16
; VI-NEXT:    s_lshr_b32 s62, s40, 16
; VI-NEXT:    s_lshr_b32 s63, s41, 16
; VI-NEXT:    s_lshr_b32 s72, s29, 16
; VI-NEXT:    s_lshr_b32 s73, s28, 16
; VI-NEXT:    s_lshr_b32 s74, s27, 16
; VI-NEXT:    s_lshr_b32 s75, s26, 16
; VI-NEXT:    s_lshr_b32 s76, s25, 16
; VI-NEXT:    s_lshr_b32 s77, s24, 16
; VI-NEXT:    s_lshr_b32 s78, s23, 16
; VI-NEXT:    s_lshr_b32 s79, s22, 16
; VI-NEXT:    s_lshr_b32 s88, s21, 16
; VI-NEXT:    s_lshr_b32 s89, s20, 16
; VI-NEXT:    s_lshr_b32 s90, s19, 16
; VI-NEXT:    s_lshr_b32 s91, s18, 16
; VI-NEXT:    s_lshr_b32 vcc_lo, s17, 16
; VI-NEXT:    s_lshr_b32 vcc_hi, s16, 16
; VI-NEXT:    v_mov_b32_e32 v0, s16
; VI-NEXT:    v_mov_b32_e32 v1, s17
; VI-NEXT:    v_mov_b32_e32 v2, s18
; VI-NEXT:    v_mov_b32_e32 v3, s19
; VI-NEXT:    v_mov_b32_e32 v4, s20
; VI-NEXT:    v_mov_b32_e32 v5, s21
; VI-NEXT:    v_mov_b32_e32 v6, s22
; VI-NEXT:    v_mov_b32_e32 v7, s23
; VI-NEXT:    v_mov_b32_e32 v8, s24
; VI-NEXT:    v_mov_b32_e32 v9, s25
; VI-NEXT:    v_mov_b32_e32 v10, s26
; VI-NEXT:    v_mov_b32_e32 v11, s27
; VI-NEXT:    v_mov_b32_e32 v12, s28
; VI-NEXT:    v_mov_b32_e32 v13, s29
; VI-NEXT:    v_mov_b32_e32 v14, s41
; VI-NEXT:    v_mov_b32_e32 v15, s40
; VI-NEXT:    v_mov_b32_e32 v16, s15
; VI-NEXT:    v_mov_b32_e32 v17, s14
; VI-NEXT:    v_mov_b32_e32 v18, s13
; VI-NEXT:    v_mov_b32_e32 v19, s12
; VI-NEXT:    v_mov_b32_e32 v20, s11
; VI-NEXT:    v_mov_b32_e32 v21, s10
; VI-NEXT:    v_mov_b32_e32 v22, s9
; VI-NEXT:    v_mov_b32_e32 v23, s8
; VI-NEXT:    v_mov_b32_e32 v24, s7
; VI-NEXT:    v_mov_b32_e32 v25, s6
; VI-NEXT:    v_mov_b32_e32 v26, s5
; VI-NEXT:    v_mov_b32_e32 v27, s4
; VI-NEXT:    v_mov_b32_e32 v47, vcc_hi
; VI-NEXT:    v_mov_b32_e32 v46, vcc_lo
; VI-NEXT:    v_mov_b32_e32 v45, s91
; VI-NEXT:    v_mov_b32_e32 v44, s90
; VI-NEXT:    v_mov_b32_e32 v43, s89
; VI-NEXT:    v_mov_b32_e32 v42, s88
; VI-NEXT:    v_mov_b32_e32 v41, s79
; VI-NEXT:    v_mov_b32_e32 v40, s78
; VI-NEXT:    v_mov_b32_e32 v55, s77
; VI-NEXT:    v_mov_b32_e32 v54, s76
; VI-NEXT:    v_mov_b32_e32 v53, s75
; VI-NEXT:    v_mov_b32_e32 v52, s74
; VI-NEXT:    v_mov_b32_e32 v51, s73
; VI-NEXT:    v_mov_b32_e32 v50, s72
; VI-NEXT:    v_mov_b32_e32 v49, s63
; VI-NEXT:    v_mov_b32_e32 v48, s62
; VI-NEXT:    v_mov_b32_e32 v39, s61
; VI-NEXT:    v_mov_b32_e32 v38, s60
; VI-NEXT:    v_mov_b32_e32 v37, s59
; VI-NEXT:    v_mov_b32_e32 v36, s58
; VI-NEXT:    v_mov_b32_e32 v35, s57
; VI-NEXT:    v_mov_b32_e32 v34, s56
; VI-NEXT:    v_mov_b32_e32 v33, s47
; VI-NEXT:    v_mov_b32_e32 v32, s46
; VI-NEXT:    v_mov_b32_e32 v31, s45
; VI-NEXT:    v_mov_b32_e32 v30, s44
; VI-NEXT:    v_mov_b32_e32 v29, s43
; VI-NEXT:    v_mov_b32_e32 v28, s42
; VI-NEXT:    s_branch .LBB33_3
; VI-NEXT:  .LBB33_2: ; %cmp.true
; VI-NEXT:    v_add_f32_e64 v27, s4, 1.0
; VI-NEXT:    v_add_f32_e64 v26, s5, 1.0
; VI-NEXT:    v_add_f32_e64 v25, s6, 1.0
; VI-NEXT:    v_add_f32_e64 v24, s7, 1.0
; VI-NEXT:    v_add_f32_e64 v23, s8, 1.0
; VI-NEXT:    v_add_f32_e64 v22, s9, 1.0
; VI-NEXT:    v_add_f32_e64 v21, s10, 1.0
; VI-NEXT:    v_add_f32_e64 v20, s11, 1.0
; VI-NEXT:    v_add_f32_e64 v19, s12, 1.0
; VI-NEXT:    v_add_f32_e64 v18, s13, 1.0
; VI-NEXT:    v_add_f32_e64 v17, s14, 1.0
; VI-NEXT:    v_add_f32_e64 v16, s15, 1.0
; VI-NEXT:    v_add_f32_e64 v15, s40, 1.0
; VI-NEXT:    v_add_f32_e64 v14, s41, 1.0
; VI-NEXT:    v_add_f32_e64 v13, s29, 1.0
; VI-NEXT:    v_add_f32_e64 v12, s28, 1.0
; VI-NEXT:    v_add_f32_e64 v11, s27, 1.0
; VI-NEXT:    v_add_f32_e64 v10, s26, 1.0
; VI-NEXT:    v_add_f32_e64 v9, s25, 1.0
; VI-NEXT:    v_add_f32_e64 v8, s24, 1.0
; VI-NEXT:    v_add_f32_e64 v7, s23, 1.0
; VI-NEXT:    v_add_f32_e64 v6, s22, 1.0
; VI-NEXT:    v_add_f32_e64 v5, s21, 1.0
; VI-NEXT:    v_add_f32_e64 v4, s20, 1.0
; VI-NEXT:    v_add_f32_e64 v3, s19, 1.0
; VI-NEXT:    v_add_f32_e64 v2, s18, 1.0
; VI-NEXT:    v_add_f32_e64 v1, s17, 1.0
; VI-NEXT:    v_add_f32_e64 v0, s16, 1.0
; VI-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; VI-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; VI-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; VI-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; VI-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; VI-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; VI-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; VI-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; VI-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; VI-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; VI-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; VI-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; VI-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; VI-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; VI-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; VI-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; VI-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; VI-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; VI-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; VI-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; VI-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; VI-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; VI-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; VI-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; VI-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; VI-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; VI-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; VI-NEXT:  .LBB33_3: ; %end
; VI-NEXT:    v_lshlrev_b32_e32 v47, 16, v47
; VI-NEXT:    v_lshlrev_b32_e32 v46, 16, v46
; VI-NEXT:    v_lshlrev_b32_e32 v45, 16, v45
; VI-NEXT:    v_lshlrev_b32_e32 v44, 16, v44
; VI-NEXT:    v_lshlrev_b32_e32 v43, 16, v43
; VI-NEXT:    v_lshlrev_b32_e32 v42, 16, v42
; VI-NEXT:    v_lshlrev_b32_e32 v41, 16, v41
; VI-NEXT:    v_lshlrev_b32_e32 v40, 16, v40
; VI-NEXT:    v_or_b32_sdwa v0, v0, v47 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v1, v1, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v2, v2, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v3, v3, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v4, v4, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v5, v5, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v6, v6, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v7, v7, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; VI-NEXT:    v_lshlrev_b32_e32 v55, 16, v55
; VI-NEXT:    v_lshlrev_b32_e32 v54, 16, v54
; VI-NEXT:    v_lshlrev_b32_e32 v53, 16, v53
; VI-NEXT:    v_lshlrev_b32_e32 v52, 16, v52
; VI-NEXT:    v_lshlrev_b32_e32 v51, 16, v51
; VI-NEXT:    v_lshlrev_b32_e32 v50, 16, v50
; VI-NEXT:    v_lshlrev_b32_e32 v49, 16, v49
; VI-NEXT:    v_lshlrev_b32_e32 v48, 16, v48
; VI-NEXT:    v_lshlrev_b32_e32 v39, 16, v39
; VI-NEXT:    v_lshlrev_b32_e32 v38, 16, v38
; VI-NEXT:    v_lshlrev_b32_e32 v37, 16, v37
; VI-NEXT:    v_lshlrev_b32_e32 v36, 16, v36
; VI-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v34
; VI-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; VI-NEXT:    v_lshlrev_b32_e32 v32, 16, v32
; VI-NEXT:    v_lshlrev_b32_e32 v31, 16, v31
; VI-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; VI-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; VI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; VI-NEXT:    v_or_b32_sdwa v8, v8, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v9, v9, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v10, v10, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v11, v11, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v12, v12, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v13, v13, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v14, v14, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v15, v15, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v16, v16, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v17, v17, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v18, v18, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v19, v19, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v20, v20, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v21, v21, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v22, v22, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v23, v23, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v24, v24, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v25, v25, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v26, v26, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v28f32_to_v56f16_scalar:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    v_readfirstlane_b32 s41, v14
; GFX9-NEXT:    v_readfirstlane_b32 s4, v13
; GFX9-NEXT:    v_readfirstlane_b32 s5, v12
; GFX9-NEXT:    v_readfirstlane_b32 s6, v11
; GFX9-NEXT:    v_readfirstlane_b32 s7, v10
; GFX9-NEXT:    v_readfirstlane_b32 s8, v9
; GFX9-NEXT:    v_readfirstlane_b32 s9, v8
; GFX9-NEXT:    v_readfirstlane_b32 s10, v7
; GFX9-NEXT:    v_readfirstlane_b32 s11, v6
; GFX9-NEXT:    v_readfirstlane_b32 s12, v5
; GFX9-NEXT:    v_readfirstlane_b32 s13, v4
; GFX9-NEXT:    v_readfirstlane_b32 s14, v3
; GFX9-NEXT:    v_readfirstlane_b32 s15, v2
; GFX9-NEXT:    v_readfirstlane_b32 s40, v1
; GFX9-NEXT:    s_cmp_lg_u32 s41, 0
; GFX9-NEXT:    v_readfirstlane_b32 s41, v0
; GFX9-NEXT:    s_cbranch_scc0 .LBB33_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    s_lshr_b32 s42, s4, 16
; GFX9-NEXT:    s_lshr_b32 s43, s5, 16
; GFX9-NEXT:    s_lshr_b32 s44, s6, 16
; GFX9-NEXT:    s_lshr_b32 s45, s7, 16
; GFX9-NEXT:    s_lshr_b32 s46, s8, 16
; GFX9-NEXT:    s_lshr_b32 s47, s9, 16
; GFX9-NEXT:    s_lshr_b32 s56, s10, 16
; GFX9-NEXT:    s_lshr_b32 s57, s11, 16
; GFX9-NEXT:    s_lshr_b32 s58, s12, 16
; GFX9-NEXT:    s_lshr_b32 s59, s13, 16
; GFX9-NEXT:    s_lshr_b32 s60, s14, 16
; GFX9-NEXT:    s_lshr_b32 s61, s15, 16
; GFX9-NEXT:    s_lshr_b32 s62, s40, 16
; GFX9-NEXT:    s_lshr_b32 s63, s41, 16
; GFX9-NEXT:    s_lshr_b32 s72, s29, 16
; GFX9-NEXT:    s_lshr_b32 s73, s28, 16
; GFX9-NEXT:    s_lshr_b32 s74, s27, 16
; GFX9-NEXT:    s_lshr_b32 s75, s26, 16
; GFX9-NEXT:    s_lshr_b32 s76, s25, 16
; GFX9-NEXT:    s_lshr_b32 s77, s24, 16
; GFX9-NEXT:    s_lshr_b32 s78, s23, 16
; GFX9-NEXT:    s_lshr_b32 s79, s22, 16
; GFX9-NEXT:    s_lshr_b32 s88, s21, 16
; GFX9-NEXT:    s_lshr_b32 s89, s20, 16
; GFX9-NEXT:    s_lshr_b32 s90, s19, 16
; GFX9-NEXT:    s_lshr_b32 s91, s18, 16
; GFX9-NEXT:    s_lshr_b32 s92, s17, 16
; GFX9-NEXT:    s_lshr_b32 s93, s16, 16
; GFX9-NEXT:    v_mov_b32_e32 v0, s16
; GFX9-NEXT:    v_mov_b32_e32 v1, s17
; GFX9-NEXT:    v_mov_b32_e32 v2, s18
; GFX9-NEXT:    v_mov_b32_e32 v3, s19
; GFX9-NEXT:    v_mov_b32_e32 v4, s20
; GFX9-NEXT:    v_mov_b32_e32 v5, s21
; GFX9-NEXT:    v_mov_b32_e32 v6, s22
; GFX9-NEXT:    v_mov_b32_e32 v7, s23
; GFX9-NEXT:    v_mov_b32_e32 v8, s24
; GFX9-NEXT:    v_mov_b32_e32 v9, s25
; GFX9-NEXT:    v_mov_b32_e32 v10, s26
; GFX9-NEXT:    v_mov_b32_e32 v11, s27
; GFX9-NEXT:    v_mov_b32_e32 v12, s28
; GFX9-NEXT:    v_mov_b32_e32 v13, s29
; GFX9-NEXT:    v_mov_b32_e32 v14, s41
; GFX9-NEXT:    v_mov_b32_e32 v15, s40
; GFX9-NEXT:    v_mov_b32_e32 v16, s15
; GFX9-NEXT:    v_mov_b32_e32 v17, s14
; GFX9-NEXT:    v_mov_b32_e32 v18, s13
; GFX9-NEXT:    v_mov_b32_e32 v19, s12
; GFX9-NEXT:    v_mov_b32_e32 v20, s11
; GFX9-NEXT:    v_mov_b32_e32 v21, s10
; GFX9-NEXT:    v_mov_b32_e32 v22, s9
; GFX9-NEXT:    v_mov_b32_e32 v23, s8
; GFX9-NEXT:    v_mov_b32_e32 v24, s7
; GFX9-NEXT:    v_mov_b32_e32 v25, s6
; GFX9-NEXT:    v_mov_b32_e32 v26, s5
; GFX9-NEXT:    v_mov_b32_e32 v27, s4
; GFX9-NEXT:    v_mov_b32_e32 v47, s93
; GFX9-NEXT:    v_mov_b32_e32 v46, s92
; GFX9-NEXT:    v_mov_b32_e32 v45, s91
; GFX9-NEXT:    v_mov_b32_e32 v44, s90
; GFX9-NEXT:    v_mov_b32_e32 v43, s89
; GFX9-NEXT:    v_mov_b32_e32 v42, s88
; GFX9-NEXT:    v_mov_b32_e32 v41, s79
; GFX9-NEXT:    v_mov_b32_e32 v40, s78
; GFX9-NEXT:    v_mov_b32_e32 v55, s77
; GFX9-NEXT:    v_mov_b32_e32 v54, s76
; GFX9-NEXT:    v_mov_b32_e32 v53, s75
; GFX9-NEXT:    v_mov_b32_e32 v52, s74
; GFX9-NEXT:    v_mov_b32_e32 v51, s73
; GFX9-NEXT:    v_mov_b32_e32 v50, s72
; GFX9-NEXT:    v_mov_b32_e32 v49, s63
; GFX9-NEXT:    v_mov_b32_e32 v48, s62
; GFX9-NEXT:    v_mov_b32_e32 v39, s61
; GFX9-NEXT:    v_mov_b32_e32 v38, s60
; GFX9-NEXT:    v_mov_b32_e32 v37, s59
; GFX9-NEXT:    v_mov_b32_e32 v36, s58
; GFX9-NEXT:    v_mov_b32_e32 v35, s57
; GFX9-NEXT:    v_mov_b32_e32 v34, s56
; GFX9-NEXT:    v_mov_b32_e32 v33, s47
; GFX9-NEXT:    v_mov_b32_e32 v32, s46
; GFX9-NEXT:    v_mov_b32_e32 v31, s45
; GFX9-NEXT:    v_mov_b32_e32 v30, s44
; GFX9-NEXT:    v_mov_b32_e32 v29, s43
; GFX9-NEXT:    v_mov_b32_e32 v28, s42
; GFX9-NEXT:    s_branch .LBB33_3
; GFX9-NEXT:  .LBB33_2: ; %cmp.true
; GFX9-NEXT:    v_add_f32_e64 v27, s4, 1.0
; GFX9-NEXT:    v_add_f32_e64 v26, s5, 1.0
; GFX9-NEXT:    v_add_f32_e64 v25, s6, 1.0
; GFX9-NEXT:    v_add_f32_e64 v24, s7, 1.0
; GFX9-NEXT:    v_add_f32_e64 v23, s8, 1.0
; GFX9-NEXT:    v_add_f32_e64 v22, s9, 1.0
; GFX9-NEXT:    v_add_f32_e64 v21, s10, 1.0
; GFX9-NEXT:    v_add_f32_e64 v20, s11, 1.0
; GFX9-NEXT:    v_add_f32_e64 v19, s12, 1.0
; GFX9-NEXT:    v_add_f32_e64 v18, s13, 1.0
; GFX9-NEXT:    v_add_f32_e64 v17, s14, 1.0
; GFX9-NEXT:    v_add_f32_e64 v16, s15, 1.0
; GFX9-NEXT:    v_add_f32_e64 v15, s40, 1.0
; GFX9-NEXT:    v_add_f32_e64 v14, s41, 1.0
; GFX9-NEXT:    v_add_f32_e64 v13, s29, 1.0
; GFX9-NEXT:    v_add_f32_e64 v12, s28, 1.0
; GFX9-NEXT:    v_add_f32_e64 v11, s27, 1.0
; GFX9-NEXT:    v_add_f32_e64 v10, s26, 1.0
; GFX9-NEXT:    v_add_f32_e64 v9, s25, 1.0
; GFX9-NEXT:    v_add_f32_e64 v8, s24, 1.0
; GFX9-NEXT:    v_add_f32_e64 v7, s23, 1.0
; GFX9-NEXT:    v_add_f32_e64 v6, s22, 1.0
; GFX9-NEXT:    v_add_f32_e64 v5, s21, 1.0
; GFX9-NEXT:    v_add_f32_e64 v4, s20, 1.0
; GFX9-NEXT:    v_add_f32_e64 v3, s19, 1.0
; GFX9-NEXT:    v_add_f32_e64 v2, s18, 1.0
; GFX9-NEXT:    v_add_f32_e64 v1, s17, 1.0
; GFX9-NEXT:    v_add_f32_e64 v0, s16, 1.0
; GFX9-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX9-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX9-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX9-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX9-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX9-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX9-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX9-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX9-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX9-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX9-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX9-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX9-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX9-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX9-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX9-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX9-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; GFX9-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; GFX9-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; GFX9-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; GFX9-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; GFX9-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; GFX9-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; GFX9-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; GFX9-NEXT:  .LBB33_3: ; %end
; GFX9-NEXT:    v_lshlrev_b32_e32 v47, 16, v47
; GFX9-NEXT:    v_lshlrev_b32_e32 v46, 16, v46
; GFX9-NEXT:    v_lshlrev_b32_e32 v45, 16, v45
; GFX9-NEXT:    v_lshlrev_b32_e32 v44, 16, v44
; GFX9-NEXT:    v_lshlrev_b32_e32 v43, 16, v43
; GFX9-NEXT:    v_lshlrev_b32_e32 v42, 16, v42
; GFX9-NEXT:    v_lshlrev_b32_e32 v41, 16, v41
; GFX9-NEXT:    v_lshlrev_b32_e32 v40, 16, v40
; GFX9-NEXT:    v_or_b32_sdwa v0, v47, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v1, v46, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v2, v45, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v3, v44, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v4, v43, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v5, v42, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v6, v41, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v7, v40, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; GFX9-NEXT:    v_lshlrev_b32_e32 v55, 16, v55
; GFX9-NEXT:    v_lshlrev_b32_e32 v54, 16, v54
; GFX9-NEXT:    v_lshlrev_b32_e32 v53, 16, v53
; GFX9-NEXT:    v_lshlrev_b32_e32 v52, 16, v52
; GFX9-NEXT:    v_lshlrev_b32_e32 v51, 16, v51
; GFX9-NEXT:    v_lshlrev_b32_e32 v50, 16, v50
; GFX9-NEXT:    v_lshlrev_b32_e32 v49, 16, v49
; GFX9-NEXT:    v_lshlrev_b32_e32 v48, 16, v48
; GFX9-NEXT:    v_lshlrev_b32_e32 v39, 16, v39
; GFX9-NEXT:    v_lshlrev_b32_e32 v38, 16, v38
; GFX9-NEXT:    v_lshlrev_b32_e32 v37, 16, v37
; GFX9-NEXT:    v_lshlrev_b32_e32 v36, 16, v36
; GFX9-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; GFX9-NEXT:    v_lshlrev_b32_e32 v34, 16, v34
; GFX9-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; GFX9-NEXT:    v_lshlrev_b32_e32 v32, 16, v32
; GFX9-NEXT:    v_lshlrev_b32_e32 v31, 16, v31
; GFX9-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; GFX9-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; GFX9-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; GFX9-NEXT:    v_or_b32_sdwa v8, v55, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v9, v54, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v10, v53, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v11, v52, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v12, v51, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v13, v50, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v14, v49, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v15, v48, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v16, v39, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v17, v38, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v18, v37, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v19, v36, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v20, v35, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v21, v34, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v22, v33, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v23, v32, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v24, v31, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v25, v30, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v26, v29, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v27, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-TRUE16-LABEL: bitcast_v28f32_to_v56f16_scalar:
; GFX11-TRUE16:       ; %bb.0:
; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s14, v10
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s4, v9
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s5, v8
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s6, v7
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s7, v6
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s8, v5
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s9, v4
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s10, v3
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s11, v2
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s12, v1
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s13, v0
; GFX11-TRUE16-NEXT:    s_cmp_lg_u32 s14, 0
; GFX11-TRUE16-NEXT:    s_cbranch_scc0 .LBB33_2
; GFX11-TRUE16-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-TRUE16-NEXT:    s_lshr_b32 s14, s4, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s15, s5, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s40, s6, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s41, s7, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s42, s8, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s43, s9, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s44, s10, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s45, s11, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s46, s12, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s47, s13, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s56, s29, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s57, s28, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s58, s27, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s59, s26, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s60, s25, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s61, s24, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s62, s23, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s63, s22, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s72, s21, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s73, s20, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s74, s19, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s75, s18, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s76, s17, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s77, s16, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s78, s3, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s79, s2, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s88, s1, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s89, s0, 16
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v18, s13 :: v_dual_mov_b32 v19, s12
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v20, s11 :: v_dual_mov_b32 v21, s10
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v22, s9 :: v_dual_mov_b32 v23, s8
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s6
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s4
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v71, s89 :: v_dual_mov_b32 v70, s88
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v69, s79 :: v_dual_mov_b32 v68, s78
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v67, s77 :: v_dual_mov_b32 v66, s76
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v65, s75 :: v_dual_mov_b32 v64, s74
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v55, s73 :: v_dual_mov_b32 v54, s72
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v53, s63 :: v_dual_mov_b32 v52, s62
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v51, s61 :: v_dual_mov_b32 v50, s60
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v49, s59 :: v_dual_mov_b32 v48, s58
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v39, s57 :: v_dual_mov_b32 v38, s56
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v37, s47 :: v_dual_mov_b32 v36, s46
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v35, s45 :: v_dual_mov_b32 v34, s44
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v33, s43 :: v_dual_mov_b32 v32, s42
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v31, s41 :: v_dual_mov_b32 v30, s40
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v29, s15 :: v_dual_mov_b32 v28, s14
; GFX11-TRUE16-NEXT:    s_branch .LBB33_3
; GFX11-TRUE16-NEXT:  .LBB33_2: ; %cmp.true
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v27, s4, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v26, s5, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v25, s6, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v24, s7, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v23, s8, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v22, s9, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v21, s10, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v20, s11, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v19, s12, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v18, s13, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v17, s29, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v16, s28, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v15, s27, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v14, s26, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v13, s25, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v12, s24, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v11, s23, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v10, s22, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v9, s21, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v8, s20, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v7, s19, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v6, s18, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v5, s17, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v4, s16, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v3, s3, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v2, s2, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v1, s1, 1.0
; GFX11-TRUE16-NEXT:    v_add_f32_e64 v0, s0, 1.0
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v7
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v6
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v5
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v4
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v3
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v2
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v0
; GFX11-TRUE16-NEXT:  .LBB33_3: ; %end
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v0.h, v71.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v1.h, v70.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v2.h, v69.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v3.h, v68.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v4.h, v67.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v5.h, v66.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v6.h, v65.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v7.h, v64.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v8.h, v55.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v9.h, v54.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v10.h, v53.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v11.h, v52.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v12.h, v51.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v13.h, v50.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v14.h, v49.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v15.h, v48.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v16.h, v39.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v17.h, v38.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v18.h, v37.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v19.h, v36.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v20.h, v35.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v21.h, v34.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v22.h, v33.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v23.h, v32.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v24.h, v31.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v25.h, v30.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v26.h, v29.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v27.h, v28.l
; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v28f32_to_v56f16_scalar:
; GFX11-FAKE16:       ; %bb.0:
; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s14, v10
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s4, v9
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s5, v8
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s6, v7
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s7, v6
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s8, v5
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s9, v4
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s10, v3
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s11, v2
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s12, v1
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s13, v0
; GFX11-FAKE16-NEXT:    s_cmp_lg_u32 s14, 0
; GFX11-FAKE16-NEXT:    s_cbranch_scc0 .LBB33_2
; GFX11-FAKE16-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-FAKE16-NEXT:    s_lshr_b32 s14, s4, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s15, s5, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s40, s6, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s41, s7, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s42, s8, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s43, s9, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s44, s10, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s45, s11, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s46, s12, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s47, s13, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s56, s29, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s57, s28, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s58, s27, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s59, s26, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s60, s25, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s61, s24, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s62, s23, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s63, s22, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s72, s21, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s73, s20, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s74, s19, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s75, s18, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s76, s17, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s77, s16, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s78, s3, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s79, s2, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s88, s1, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s89, s0, 16
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v1, s1
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v7, s3
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v6, s16 :: v_dual_mov_b32 v5, s17
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v4, s18 :: v_dual_mov_b32 v3, s19
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v12, s20 :: v_dual_mov_b32 v11, s21
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v9, s23
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v8, s24 :: v_dual_mov_b32 v17, s25
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v16, s26 :: v_dual_mov_b32 v15, s27
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v14, s28 :: v_dual_mov_b32 v13, s29
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v22, s13 :: v_dual_mov_b32 v21, s12
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v20, s11 :: v_dual_mov_b32 v19, s10
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v18, s9 :: v_dual_mov_b32 v27, s8
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v26, s7 :: v_dual_mov_b32 v25, s6
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v24, s5 :: v_dual_mov_b32 v23, s4
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v71, s89 :: v_dual_mov_b32 v70, s88
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v69, s79 :: v_dual_mov_b32 v68, s78
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v67, s77 :: v_dual_mov_b32 v66, s76
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v65, s75 :: v_dual_mov_b32 v64, s74
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v55, s73 :: v_dual_mov_b32 v54, s72
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v53, s63 :: v_dual_mov_b32 v52, s62
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v51, s61 :: v_dual_mov_b32 v50, s60
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v49, s59 :: v_dual_mov_b32 v48, s58
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v39, s57 :: v_dual_mov_b32 v38, s56
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v37, s47 :: v_dual_mov_b32 v36, s46
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v35, s45 :: v_dual_mov_b32 v34, s44
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v33, s43 :: v_dual_mov_b32 v32, s42
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v31, s41 :: v_dual_mov_b32 v30, s40
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v29, s15 :: v_dual_mov_b32 v28, s14
; GFX11-FAKE16-NEXT:    s_branch .LBB33_3
; GFX11-FAKE16-NEXT:  .LBB33_2: ; %cmp.true
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v23, s4, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v24, s5, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v25, s6, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v26, s7, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v27, s8, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v18, s9, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v19, s10, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v20, s11, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v21, s12, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v22, s13, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v13, s29, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v14, s28, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v15, s27, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v16, s26, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v17, s25, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v8, s24, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v9, s23, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v10, s22, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v11, s21, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v12, s20, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v3, s19, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v4, s18, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v5, s17, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v6, s16, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v7, s3, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v0, s2, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v1, s1, 1.0
; GFX11-FAKE16-NEXT:    v_add_f32_e64 v2, s0, 1.0
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v28, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v3
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v0
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v2
; GFX11-FAKE16-NEXT:  .LBB33_3: ; %end
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v2, 0xffff, v2
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v80, 0xffff, v0
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v7, 0xffff, v7
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v6, 0xffff, v6
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v0, v71, 16, v2
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v1, v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v2, v69, 16, v80
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v69, 0xffff, v4
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v70, 0xffff, v3
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v3, v68, 16, v7
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v4, v67, 16, v6
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v12, 0xffff, v12
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v6, v65, 16, v69
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v7, v64, 16, v70
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v11, 0xffff, v11
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v64, 0xffff, v9
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v65, 0xffff, v8
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v8, v55, 16, v12
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v17, 0xffff, v17
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v9, v54, 16, v11
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v11, v52, 16, v64
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v12, v51, 16, v65
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v16, 0xffff, v16
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v51, 0xffff, v14
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v52, 0xffff, v13
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v13, v50, 16, v17
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v22, 0xffff, v22
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v14, v49, 16, v16
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v16, v39, 16, v51
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v17, v38, 16, v52
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v21, 0xffff, v21
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v38, 0xffff, v19
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v39, 0xffff, v18
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v5, 0xffff, v5
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v10, 0xffff, v10
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v15, 0xffff, v15
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v20, 0xffff, v20
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v18, v37, 16, v22
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v19, v36, 16, v21
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v21, v34, 16, v38
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v22, v33, 16, v39
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v33, 0xffff, v24
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v34, 0xffff, v23
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v5, v66, 16, v5
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v10, v53, 16, v10
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v15, v48, 16, v15
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v20, v35, 16, v20
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v23, v32, 16, v27
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v24, v31, 16, v26
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v25, v30, 16, v25
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v26, v29, 16, v33
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v27, v28, 16, v34
; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = fadd <28 x float> %a, splat (float 1.000000e+00)
  %a2 = bitcast <28 x float> %a1 to <56 x half>
  br label %end

cmp.false:
  %a3 = bitcast <28 x float> %a to <56 x half>
  br label %end

end:
  %phi = phi <56 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <56 x half> %phi
}

define <28 x float> @bitcast_v56f16_to_v28f32(<56 x half> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v56f16_to_v28f32:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(4)
; SI-NEXT:    v_mov_b32_e32 v59, v0
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v27
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v26
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v25
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v24
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v23, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v23
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v22
; SI-NEXT:    v_mov_b32_e32 v39, v20
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v21
; SI-NEXT:    v_mov_b32_e32 v48, v19
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v39
; SI-NEXT:    v_mov_b32_e32 v49, v18
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v48
; SI-NEXT:    v_mov_b32_e32 v50, v17
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v49
; SI-NEXT:    v_mov_b32_e32 v51, v16
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v50
; SI-NEXT:    v_mov_b32_e32 v52, v15
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v51
; SI-NEXT:    v_mov_b32_e32 v53, v14
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v52
; SI-NEXT:    v_mov_b32_e32 v54, v13
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v53
; SI-NEXT:    v_mov_b32_e32 v55, v12
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v54
; SI-NEXT:    v_mov_b32_e32 v40, v11
; SI-NEXT:    v_mov_b32_e32 v41, v10
; SI-NEXT:    v_mov_b32_e32 v42, v9
; SI-NEXT:    v_mov_b32_e32 v43, v8
; SI-NEXT:    v_mov_b32_e32 v44, v7
; SI-NEXT:    v_mov_b32_e32 v45, v6
; SI-NEXT:    v_mov_b32_e32 v46, v5
; SI-NEXT:    v_mov_b32_e32 v47, v4
; SI-NEXT:    v_mov_b32_e32 v56, v3
; SI-NEXT:    v_mov_b32_e32 v57, v2
; SI-NEXT:    v_mov_b32_e32 v58, v1
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v55
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v40
; SI-NEXT:    v_lshrrev_b32_e32 v60, 16, v41
; SI-NEXT:    v_lshrrev_b32_e32 v33, 16, v42
; SI-NEXT:    v_lshrrev_b32_e32 v61, 16, v43
; SI-NEXT:    v_lshrrev_b32_e32 v34, 16, v44
; SI-NEXT:    v_lshrrev_b32_e32 v35, 16, v45
; SI-NEXT:    v_lshrrev_b32_e32 v62, 16, v46
; SI-NEXT:    v_lshrrev_b32_e32 v36, 16, v47
; SI-NEXT:    v_lshrrev_b32_e32 v63, 16, v56
; SI-NEXT:    v_lshrrev_b32_e32 v37, 16, v57
; SI-NEXT:    v_lshrrev_b32_e32 v32, 16, v58
; SI-NEXT:    v_lshrrev_b32_e32 v38, 16, v59
; SI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT:    buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT:    ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB34_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    buffer_load_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v13, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v18, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v19, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v20, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v21, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v59
; SI-NEXT:    v_lshlrev_b32_e32 v1, 16, v38
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v58
; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v32
; SI-NEXT:    v_or_b32_e32 v0, v0, v1
; SI-NEXT:    v_or_b32_e32 v1, v2, v3
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v57
; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v37
; SI-NEXT:    v_or_b32_e32 v2, v2, v3
; SI-NEXT:    v_and_b32_e32 v3, 0xffff, v56
; SI-NEXT:    v_lshlrev_b32_e32 v4, 16, v63
; SI-NEXT:    v_or_b32_e32 v3, v3, v4
; SI-NEXT:    v_and_b32_e32 v4, 0xffff, v47
; SI-NEXT:    v_lshlrev_b32_e32 v5, 16, v36
; SI-NEXT:    v_or_b32_e32 v4, v4, v5
; SI-NEXT:    v_and_b32_e32 v5, 0xffff, v46
; SI-NEXT:    v_lshlrev_b32_e32 v6, 16, v62
; SI-NEXT:    v_or_b32_e32 v5, v5, v6
; SI-NEXT:    v_and_b32_e32 v6, 0xffff, v45
; SI-NEXT:    v_lshlrev_b32_e32 v7, 16, v35
; SI-NEXT:    v_or_b32_e32 v6, v6, v7
; SI-NEXT:    v_and_b32_e32 v7, 0xffff, v44
; SI-NEXT:    v_lshlrev_b32_e32 v8, 16, v34
; SI-NEXT:    v_or_b32_e32 v7, v7, v8
; SI-NEXT:    v_and_b32_e32 v8, 0xffff, v43
; SI-NEXT:    v_lshlrev_b32_e32 v9, 16, v61
; SI-NEXT:    v_or_b32_e32 v8, v8, v9
; SI-NEXT:    v_and_b32_e32 v9, 0xffff, v42
; SI-NEXT:    v_lshlrev_b32_e32 v10, 16, v33
; SI-NEXT:    v_or_b32_e32 v9, v9, v10
; SI-NEXT:    v_and_b32_e32 v10, 0xffff, v41
; SI-NEXT:    v_lshlrev_b32_e32 v11, 16, v60
; SI-NEXT:    v_or_b32_e32 v10, v10, v11
; SI-NEXT:    v_and_b32_e32 v11, 0xffff, v40
; SI-NEXT:    ; implicit-def: $vgpr59
; SI-NEXT:    ; implicit-def: $vgpr58
; SI-NEXT:    ; implicit-def: $vgpr57
; SI-NEXT:    ; implicit-def: $vgpr56
; SI-NEXT:    ; implicit-def: $vgpr47
; SI-NEXT:    ; implicit-def: $vgpr46
; SI-NEXT:    ; implicit-def: $vgpr45
; SI-NEXT:    ; implicit-def: $vgpr44
; SI-NEXT:    ; implicit-def: $vgpr43
; SI-NEXT:    ; implicit-def: $vgpr42
; SI-NEXT:    ; implicit-def: $vgpr41
; SI-NEXT:    ; implicit-def: $vgpr40
; SI-NEXT:    ; implicit-def: $vgpr38
; SI-NEXT:    ; implicit-def: $vgpr32
; SI-NEXT:    ; implicit-def: $vgpr37
; SI-NEXT:    ; implicit-def: $vgpr63
; SI-NEXT:    ; implicit-def: $vgpr36
; SI-NEXT:    ; implicit-def: $vgpr62
; SI-NEXT:    ; implicit-def: $vgpr35
; SI-NEXT:    ; implicit-def: $vgpr34
; SI-NEXT:    ; implicit-def: $vgpr61
; SI-NEXT:    ; implicit-def: $vgpr33
; SI-NEXT:    ; implicit-def: $vgpr60
; SI-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(14)
; SI-NEXT:    v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT:    v_or_b32_e32 v11, v11, v12
; SI-NEXT:    v_and_b32_e32 v12, 0xffff, v55
; SI-NEXT:    v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT:    v_or_b32_e32 v12, v12, v13
; SI-NEXT:    v_and_b32_e32 v13, 0xffff, v54
; SI-NEXT:    v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT:    v_or_b32_e32 v13, v13, v14
; SI-NEXT:    v_and_b32_e32 v14, 0xffff, v53
; SI-NEXT:    s_waitcnt vmcnt(13)
; SI-NEXT:    v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT:    v_or_b32_e32 v14, v14, v15
; SI-NEXT:    v_and_b32_e32 v15, 0xffff, v52
; SI-NEXT:    s_waitcnt vmcnt(12)
; SI-NEXT:    v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT:    v_or_b32_e32 v15, v15, v16
; SI-NEXT:    v_and_b32_e32 v16, 0xffff, v51
; SI-NEXT:    s_waitcnt vmcnt(11)
; SI-NEXT:    v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT:    v_or_b32_e32 v16, v16, v17
; SI-NEXT:    v_and_b32_e32 v17, 0xffff, v50
; SI-NEXT:    s_waitcnt vmcnt(10)
; SI-NEXT:    v_lshlrev_b32_e32 v18, 16, v18
; SI-NEXT:    v_or_b32_e32 v17, v17, v18
; SI-NEXT:    v_and_b32_e32 v18, 0xffff, v49
; SI-NEXT:    s_waitcnt vmcnt(9)
; SI-NEXT:    v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT:    v_or_b32_e32 v18, v18, v19
; SI-NEXT:    v_and_b32_e32 v19, 0xffff, v48
; SI-NEXT:    s_waitcnt vmcnt(8)
; SI-NEXT:    v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT:    v_or_b32_e32 v19, v19, v20
; SI-NEXT:    v_and_b32_e32 v20, 0xffff, v39
; SI-NEXT:    s_waitcnt vmcnt(7)
; SI-NEXT:    v_lshlrev_b32_e32 v21, 16, v21
; SI-NEXT:    v_or_b32_e32 v20, v20, v21
; SI-NEXT:    buffer_load_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT:    ; implicit-def: $vgpr55
; SI-NEXT:    ; implicit-def: $vgpr54
; SI-NEXT:    ; implicit-def: $vgpr53
; SI-NEXT:    ; implicit-def: $vgpr52
; SI-NEXT:    ; implicit-def: $vgpr51
; SI-NEXT:    ; implicit-def: $vgpr50
; SI-NEXT:    ; implicit-def: $vgpr49
; SI-NEXT:    ; implicit-def: $vgpr48
; SI-NEXT:    ; implicit-def: $vgpr39
; SI-NEXT:    s_waitcnt vmcnt(7)
; SI-NEXT:    v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT:    s_waitcnt vmcnt(6)
; SI-NEXT:    v_lshlrev_b32_e32 v23, 16, v23
; SI-NEXT:    s_waitcnt vmcnt(5)
; SI-NEXT:    v_lshlrev_b32_e32 v24, 16, v24
; SI-NEXT:    s_waitcnt vmcnt(4)
; SI-NEXT:    v_lshlrev_b32_e32 v25, 16, v25
; SI-NEXT:    s_waitcnt vmcnt(3)
; SI-NEXT:    v_lshlrev_b32_e32 v26, 16, v26
; SI-NEXT:    s_waitcnt vmcnt(2)
; SI-NEXT:    v_lshlrev_b32_e32 v27, 16, v27
; SI-NEXT:    s_waitcnt vmcnt(1)
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT:    v_or_b32_e32 v21, v21, v22
; SI-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT:    v_or_b32_e32 v22, v22, v23
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT:    v_or_b32_e32 v23, v23, v24
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT:    v_or_b32_e32 v24, v24, v25
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT:    v_or_b32_e32 v25, v25, v26
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT:    v_or_b32_e32 v26, v26, v27
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT:    v_or_b32_e32 v27, v27, v28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:  .LBB34_2: ; %Flow
; SI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB34_4
; SI-NEXT:  ; %bb.3: ; %cmp.true
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v0, v38
; SI-NEXT:    v_cvt_f32_f16_e32 v2, v32
; SI-NEXT:    v_cvt_f32_f16_e32 v1, v59
; SI-NEXT:    v_cvt_f32_f16_e32 v3, v58
; SI-NEXT:    v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT:    v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT:    v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT:    v_cvt_f16_f32_e32 v0, v0
; SI-NEXT:    v_cvt_f16_f32_e32 v2, v2
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v1, v1
; SI-NEXT:    v_cvt_f16_f32_e32 v3, v3
; SI-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
; SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT:    v_or_b32_e32 v0, v1, v0
; SI-NEXT:    v_or_b32_e32 v1, v3, v2
; SI-NEXT:    v_cvt_f32_f16_e32 v2, v37
; SI-NEXT:    v_cvt_f32_f16_e32 v3, v57
; SI-NEXT:    v_cvt_f32_f16_e32 v4, v56
; SI-NEXT:    v_cvt_f32_f16_e32 v5, v47
; SI-NEXT:    v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT:    v_cvt_f16_f32_e32 v2, v2
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v3, v3
; SI-NEXT:    v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT:    v_cvt_f16_f32_e32 v4, v4
; SI-NEXT:    v_or_b32_e32 v2, v3, v2
; SI-NEXT:    v_cvt_f32_f16_e32 v3, v63
; SI-NEXT:    v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT:    v_cvt_f16_f32_e32 v5, v5
; SI-NEXT:    v_cvt_f32_f16_e32 v6, v46
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v3, v3
; SI-NEXT:    v_cvt_f32_f16_e32 v7, v45
; SI-NEXT:    v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT:    v_cvt_f16_f32_e32 v6, v6
; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT:    v_or_b32_e32 v3, v4, v3
; SI-NEXT:    v_cvt_f32_f16_e32 v4, v36
; SI-NEXT:    v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT:    v_cvt_f16_f32_e32 v7, v7
; SI-NEXT:    v_cvt_f32_f16_e32 v8, v44
; SI-NEXT:    v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT:    v_cvt_f16_f32_e32 v4, v4
; SI-NEXT:    v_cvt_f32_f16_e32 v9, v43
; SI-NEXT:    v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT:    v_cvt_f16_f32_e32 v8, v8
; SI-NEXT:    v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT:    v_or_b32_e32 v4, v5, v4
; SI-NEXT:    v_cvt_f32_f16_e32 v5, v62
; SI-NEXT:    v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT:    v_cvt_f16_f32_e32 v9, v9
; SI-NEXT:    v_cvt_f32_f16_e32 v10, v42
; SI-NEXT:    v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT:    v_cvt_f16_f32_e32 v5, v5
; SI-NEXT:    v_cvt_f32_f16_e32 v11, v41
; SI-NEXT:    v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT:    v_cvt_f16_f32_e32 v10, v10
; SI-NEXT:    v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT:    v_or_b32_e32 v5, v6, v5
; SI-NEXT:    v_cvt_f32_f16_e32 v6, v35
; SI-NEXT:    v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT:    v_cvt_f16_f32_e32 v11, v11
; SI-NEXT:    v_cvt_f32_f16_e32 v12, v40
; SI-NEXT:    v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT:    v_cvt_f16_f32_e32 v6, v6
; SI-NEXT:    v_cvt_f32_f16_e32 v13, v55
; SI-NEXT:    v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT:    v_cvt_f16_f32_e32 v12, v12
; SI-NEXT:    v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT:    v_or_b32_e32 v6, v7, v6
; SI-NEXT:    v_cvt_f32_f16_e32 v7, v34
; SI-NEXT:    v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT:    v_cvt_f16_f32_e32 v13, v13
; SI-NEXT:    v_cvt_f32_f16_e32 v14, v54
; SI-NEXT:    v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT:    v_cvt_f16_f32_e32 v7, v7
; SI-NEXT:    v_cvt_f32_f16_e32 v15, v53
; SI-NEXT:    v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT:    v_cvt_f16_f32_e32 v14, v14
; SI-NEXT:    v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT:    v_or_b32_e32 v7, v8, v7
; SI-NEXT:    v_cvt_f32_f16_e32 v8, v61
; SI-NEXT:    v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT:    v_cvt_f16_f32_e32 v15, v15
; SI-NEXT:    v_cvt_f32_f16_e32 v17, v52
; SI-NEXT:    v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT:    v_cvt_f16_f32_e32 v8, v8
; SI-NEXT:    v_cvt_f32_f16_e32 v18, v51
; SI-NEXT:    v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT:    v_cvt_f16_f32_e32 v17, v17
; SI-NEXT:    v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT:    v_or_b32_e32 v8, v9, v8
; SI-NEXT:    v_cvt_f32_f16_e32 v9, v33
; SI-NEXT:    v_add_f32_e32 v18, 0x38000000, v18
; SI-NEXT:    v_cvt_f16_f32_e32 v18, v18
; SI-NEXT:    v_cvt_f32_f16_e32 v20, v49
; SI-NEXT:    v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT:    v_cvt_f16_f32_e32 v9, v9
; SI-NEXT:    v_cvt_f32_f16_e32 v21, v48
; SI-NEXT:    v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT:    v_cvt_f16_f32_e32 v20, v20
; SI-NEXT:    v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT:    v_or_b32_e32 v9, v10, v9
; SI-NEXT:    v_cvt_f32_f16_e32 v10, v60
; SI-NEXT:    v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT:    v_cvt_f16_f32_e32 v21, v21
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT:    v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT:    v_cvt_f16_f32_e32 v10, v10
; SI-NEXT:    buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v19, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT:    v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT:    v_or_b32_e32 v10, v11, v10
; SI-NEXT:    buffer_load_dword v11, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(10)
; SI-NEXT:    v_cvt_f32_f16_e32 v24, v24
; SI-NEXT:    s_waitcnt vmcnt(9)
; SI-NEXT:    v_cvt_f32_f16_e32 v27, v27
; SI-NEXT:    s_waitcnt vmcnt(8)
; SI-NEXT:    v_cvt_f32_f16_e32 v22, v22
; SI-NEXT:    s_waitcnt vmcnt(7)
; SI-NEXT:    v_cvt_f32_f16_e32 v25, v25
; SI-NEXT:    v_add_f32_e32 v24, 0x38000000, v24
; SI-NEXT:    v_cvt_f16_f32_e32 v24, v24
; SI-NEXT:    v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT:    s_waitcnt vmcnt(5)
; SI-NEXT:    v_cvt_f32_f16_e32 v16, v16
; SI-NEXT:    s_waitcnt vmcnt(4)
; SI-NEXT:    v_cvt_f32_f16_e32 v19, v19
; SI-NEXT:    v_cvt_f16_f32_e32 v22, v22
; SI-NEXT:    v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT:    v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT:    v_cvt_f16_f32_e32 v16, v16
; SI-NEXT:    v_add_f32_e32 v19, 0x38000000, v19
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v11, v11
; SI-NEXT:    v_cvt_f16_f32_e32 v19, v19
; SI-NEXT:    v_cvt_f16_f32_e32 v25, v25
; SI-NEXT:    v_add_f32_e32 v27, 0x38000000, v27
; SI-NEXT:    v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT:    v_cvt_f16_f32_e32 v11, v11
; SI-NEXT:    v_cvt_f16_f32_e32 v27, v27
; SI-NEXT:    v_cvt_f32_f16_e32 v28, v28
; SI-NEXT:    v_cvt_f32_f16_e32 v29, v29
; SI-NEXT:    v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT:    v_or_b32_e32 v11, v12, v11
; SI-NEXT:    buffer_load_dword v12, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT:    v_add_f32_e32 v28, 0x38000000, v28
; SI-NEXT:    v_cvt_f16_f32_e32 v28, v28
; SI-NEXT:    v_add_f32_e32 v29, 0x38000000, v29
; SI-NEXT:    v_cvt_f16_f32_e32 v29, v29
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v12, v12
; SI-NEXT:    v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT:    v_cvt_f16_f32_e32 v12, v12
; SI-NEXT:    v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT:    v_or_b32_e32 v12, v13, v12
; SI-NEXT:    buffer_load_dword v13, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v13, v13
; SI-NEXT:    v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT:    v_cvt_f16_f32_e32 v13, v13
; SI-NEXT:    v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT:    v_or_b32_e32 v13, v14, v13
; SI-NEXT:    buffer_load_dword v14, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v14, v14
; SI-NEXT:    v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT:    v_cvt_f16_f32_e32 v14, v14
; SI-NEXT:    v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT:    v_or_b32_e32 v14, v15, v14
; SI-NEXT:    v_lshlrev_b32_e32 v15, 16, v16
; SI-NEXT:    buffer_load_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT:    v_or_b32_e32 v15, v17, v15
; SI-NEXT:    buffer_load_dword v17, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(1)
; SI-NEXT:    v_cvt_f32_f16_e32 v16, v16
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v17, v17
; SI-NEXT:    v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT:    v_cvt_f16_f32_e32 v16, v16
; SI-NEXT:    v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT:    v_cvt_f16_f32_e32 v17, v17
; SI-NEXT:    v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT:    v_or_b32_e32 v16, v18, v16
; SI-NEXT:    v_cvt_f32_f16_e32 v18, v50
; SI-NEXT:    v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT:    v_add_f32_e32 v18, 0x38000000, v18
; SI-NEXT:    v_cvt_f16_f32_e32 v18, v18
; SI-NEXT:    v_or_b32_e32 v17, v18, v17
; SI-NEXT:    v_lshlrev_b32_e32 v18, 16, v19
; SI-NEXT:    buffer_load_dword v19, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT:    v_or_b32_e32 v18, v20, v18
; SI-NEXT:    buffer_load_dword v20, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(1)
; SI-NEXT:    v_cvt_f32_f16_e32 v19, v19
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v20, v20
; SI-NEXT:    v_add_f32_e32 v19, 0x38000000, v19
; SI-NEXT:    v_cvt_f16_f32_e32 v19, v19
; SI-NEXT:    v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT:    v_cvt_f16_f32_e32 v20, v20
; SI-NEXT:    v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT:    v_or_b32_e32 v19, v21, v19
; SI-NEXT:    v_cvt_f32_f16_e32 v21, v39
; SI-NEXT:    v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT:    v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT:    v_cvt_f16_f32_e32 v21, v21
; SI-NEXT:    v_or_b32_e32 v20, v21, v20
; SI-NEXT:    v_lshlrev_b32_e32 v21, 16, v22
; SI-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v22, v22
; SI-NEXT:    v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT:    v_cvt_f16_f32_e32 v22, v22
; SI-NEXT:    v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT:    v_or_b32_e32 v22, v24, v22
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT:    v_cvt_f32_f16_e32 v23, v23
; SI-NEXT:    v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT:    v_cvt_f16_f32_e32 v23, v23
; SI-NEXT:    v_or_b32_e32 v21, v23, v21
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(1)
; SI-NEXT:    v_cvt_f32_f16_e32 v24, v24
; SI-NEXT:    v_add_f32_e32 v24, 0x38000000, v24
; SI-NEXT:    v_cvt_f16_f32_e32 v24, v24
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v23, v23
; SI-NEXT:    v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT:    v_cvt_f16_f32_e32 v23, v23
; SI-NEXT:    v_lshlrev_b32_e32 v23, 16, v23
; SI-NEXT:    v_or_b32_e32 v23, v24, v23
; SI-NEXT:    v_lshlrev_b32_e32 v24, 16, v25
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v25, v25
; SI-NEXT:    v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT:    v_cvt_f16_f32_e32 v25, v25
; SI-NEXT:    v_lshlrev_b32_e32 v25, 16, v25
; SI-NEXT:    v_or_b32_e32 v25, v27, v25
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT:    v_cvt_f32_f16_e32 v26, v26
; SI-NEXT:    v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT:    v_cvt_f16_f32_e32 v26, v26
; SI-NEXT:    v_or_b32_e32 v24, v26, v24
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(1)
; SI-NEXT:    v_cvt_f32_f16_e32 v27, v27
; SI-NEXT:    v_add_f32_e32 v27, 0x38000000, v27
; SI-NEXT:    v_cvt_f16_f32_e32 v27, v27
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v26, v26
; SI-NEXT:    v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT:    v_cvt_f16_f32_e32 v26, v26
; SI-NEXT:    v_lshlrev_b32_e32 v26, 16, v26
; SI-NEXT:    v_or_b32_e32 v26, v27, v26
; SI-NEXT:    v_lshlrev_b32_e32 v27, 16, v28
; SI-NEXT:    v_or_b32_e32 v27, v29, v27
; SI-NEXT:  .LBB34_4: ; %end
; SI-NEXT:    s_or_b64 exec, exec, s[4:5]
; SI-NEXT:    buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v56f16_to_v28f32:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v56, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v58, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v59, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    v_mov_b32_e32 v32, v27
; VI-NEXT:    v_mov_b32_e32 v33, v26
; VI-NEXT:    v_mov_b32_e32 v34, v25
; VI-NEXT:    v_mov_b32_e32 v35, v24
; VI-NEXT:    v_mov_b32_e32 v36, v23
; VI-NEXT:    v_mov_b32_e32 v37, v22
; VI-NEXT:    v_mov_b32_e32 v38, v21
; VI-NEXT:    v_mov_b32_e32 v39, v20
; VI-NEXT:    v_mov_b32_e32 v48, v19
; VI-NEXT:    v_mov_b32_e32 v49, v18
; VI-NEXT:    v_mov_b32_e32 v50, v17
; VI-NEXT:    v_mov_b32_e32 v51, v16
; VI-NEXT:    v_mov_b32_e32 v52, v15
; VI-NEXT:    v_mov_b32_e32 v53, v14
; VI-NEXT:    v_mov_b32_e32 v54, v13
; VI-NEXT:    v_mov_b32_e32 v55, v12
; VI-NEXT:    v_mov_b32_e32 v40, v11
; VI-NEXT:    v_mov_b32_e32 v41, v10
; VI-NEXT:    v_mov_b32_e32 v42, v9
; VI-NEXT:    v_mov_b32_e32 v43, v8
; VI-NEXT:    v_mov_b32_e32 v44, v7
; VI-NEXT:    v_mov_b32_e32 v45, v6
; VI-NEXT:    v_mov_b32_e32 v46, v5
; VI-NEXT:    v_mov_b32_e32 v47, v4
; VI-NEXT:    v_mov_b32_e32 v56, v3
; VI-NEXT:    v_mov_b32_e32 v57, v2
; VI-NEXT:    v_mov_b32_e32 v58, v1
; VI-NEXT:    v_mov_b32_e32 v59, v0
; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT:    ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; VI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB34_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    v_mov_b32_e32 v27, 16
; VI-NEXT:    v_lshlrev_b32_sdwa v0, v27, v59 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v1, v27, v58 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v2, v27, v57 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v3, v27, v56 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v4, v27, v47 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v5, v27, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v6, v27, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v7, v27, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v8, v27, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v9, v27, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v10, v27, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v11, v27, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v12, v27, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v13, v27, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v14, v27, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v15, v27, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v16, v27, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v17, v27, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v18, v27, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v19, v27, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v20, v27, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v21, v27, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v22, v27, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v23, v27, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v24, v27, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v25, v27, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v26, v27, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v27, v27, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_or_b32_sdwa v0, v59, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v1, v58, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v2, v57, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v3, v56, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v4, v47, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v5, v46, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v6, v45, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v7, v44, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v8, v43, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v9, v42, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v10, v41, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v11, v40, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v12, v55, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v13, v54, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v14, v53, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v15, v52, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v16, v51, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v17, v50, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v18, v49, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v19, v48, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v20, v39, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v21, v38, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v22, v37, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v23, v36, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v24, v35, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v25, v34, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v26, v33, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v27, v32, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    ; implicit-def: $vgpr59
; VI-NEXT:    ; implicit-def: $vgpr58
; VI-NEXT:    ; implicit-def: $vgpr57
; VI-NEXT:    ; implicit-def: $vgpr56
; VI-NEXT:    ; implicit-def: $vgpr47
; VI-NEXT:    ; implicit-def: $vgpr46
; VI-NEXT:    ; implicit-def: $vgpr45
; VI-NEXT:    ; implicit-def: $vgpr44
; VI-NEXT:    ; implicit-def: $vgpr43
; VI-NEXT:    ; implicit-def: $vgpr42
; VI-NEXT:    ; implicit-def: $vgpr41
; VI-NEXT:    ; implicit-def: $vgpr40
; VI-NEXT:    ; implicit-def: $vgpr55
; VI-NEXT:    ; implicit-def: $vgpr54
; VI-NEXT:    ; implicit-def: $vgpr53
; VI-NEXT:    ; implicit-def: $vgpr52
; VI-NEXT:    ; implicit-def: $vgpr51
; VI-NEXT:    ; implicit-def: $vgpr50
; VI-NEXT:    ; implicit-def: $vgpr49
; VI-NEXT:    ; implicit-def: $vgpr48
; VI-NEXT:    ; implicit-def: $vgpr39
; VI-NEXT:    ; implicit-def: $vgpr38
; VI-NEXT:    ; implicit-def: $vgpr37
; VI-NEXT:    ; implicit-def: $vgpr36
; VI-NEXT:    ; implicit-def: $vgpr35
; VI-NEXT:    ; implicit-def: $vgpr34
; VI-NEXT:    ; implicit-def: $vgpr33
; VI-NEXT:    ; implicit-def: $vgpr32
; VI-NEXT:  .LBB34_2: ; %Flow
; VI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB34_4
; VI-NEXT:  ; %bb.3: ; %cmp.true
; VI-NEXT:    v_mov_b32_e32 v27, 0x200
; VI-NEXT:    v_add_f16_sdwa v0, v59, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v1, 0x200, v59
; VI-NEXT:    v_add_f16_sdwa v2, v58, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v3, 0x200, v58
; VI-NEXT:    v_or_b32_e32 v0, v1, v0
; VI-NEXT:    v_or_b32_e32 v1, v3, v2
; VI-NEXT:    v_add_f16_sdwa v2, v57, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v3, 0x200, v57
; VI-NEXT:    v_or_b32_e32 v2, v3, v2
; VI-NEXT:    v_add_f16_sdwa v3, v56, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v4, 0x200, v56
; VI-NEXT:    v_or_b32_e32 v3, v4, v3
; VI-NEXT:    v_add_f16_sdwa v4, v47, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v5, 0x200, v47
; VI-NEXT:    v_or_b32_e32 v4, v5, v4
; VI-NEXT:    v_add_f16_sdwa v5, v46, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v6, 0x200, v46
; VI-NEXT:    v_or_b32_e32 v5, v6, v5
; VI-NEXT:    v_add_f16_sdwa v6, v45, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v7, 0x200, v45
; VI-NEXT:    v_or_b32_e32 v6, v7, v6
; VI-NEXT:    v_add_f16_sdwa v7, v44, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v8, 0x200, v44
; VI-NEXT:    v_or_b32_e32 v7, v8, v7
; VI-NEXT:    v_add_f16_sdwa v8, v43, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v9, 0x200, v43
; VI-NEXT:    v_or_b32_e32 v8, v9, v8
; VI-NEXT:    v_add_f16_sdwa v9, v42, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v10, 0x200, v42
; VI-NEXT:    v_or_b32_e32 v9, v10, v9
; VI-NEXT:    v_add_f16_sdwa v10, v41, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v11, 0x200, v41
; VI-NEXT:    v_or_b32_e32 v10, v11, v10
; VI-NEXT:    v_add_f16_sdwa v11, v40, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v12, 0x200, v40
; VI-NEXT:    v_or_b32_e32 v11, v12, v11
; VI-NEXT:    v_add_f16_sdwa v12, v55, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v13, 0x200, v55
; VI-NEXT:    v_or_b32_e32 v12, v13, v12
; VI-NEXT:    v_add_f16_sdwa v13, v54, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v14, 0x200, v54
; VI-NEXT:    v_or_b32_e32 v13, v14, v13
; VI-NEXT:    v_add_f16_sdwa v14, v53, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v15, 0x200, v53
; VI-NEXT:    v_or_b32_e32 v14, v15, v14
; VI-NEXT:    v_add_f16_sdwa v15, v52, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v16, 0x200, v52
; VI-NEXT:    v_or_b32_e32 v15, v16, v15
; VI-NEXT:    v_add_f16_sdwa v16, v51, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v17, 0x200, v51
; VI-NEXT:    v_or_b32_e32 v16, v17, v16
; VI-NEXT:    v_add_f16_sdwa v17, v50, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v18, 0x200, v50
; VI-NEXT:    v_or_b32_e32 v17, v18, v17
; VI-NEXT:    v_add_f16_sdwa v18, v49, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v19, 0x200, v49
; VI-NEXT:    v_or_b32_e32 v18, v19, v18
; VI-NEXT:    v_add_f16_sdwa v19, v48, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v20, 0x200, v48
; VI-NEXT:    v_or_b32_e32 v19, v20, v19
; VI-NEXT:    v_add_f16_sdwa v20, v39, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v21, 0x200, v39
; VI-NEXT:    v_or_b32_e32 v20, v21, v20
; VI-NEXT:    v_add_f16_sdwa v21, v38, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v22, 0x200, v38
; VI-NEXT:    v_or_b32_e32 v21, v22, v21
; VI-NEXT:    v_add_f16_sdwa v22, v37, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v23, 0x200, v37
; VI-NEXT:    v_or_b32_e32 v22, v23, v22
; VI-NEXT:    v_add_f16_sdwa v23, v36, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v24, 0x200, v36
; VI-NEXT:    v_or_b32_e32 v23, v24, v23
; VI-NEXT:    v_add_f16_sdwa v24, v35, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v25, 0x200, v35
; VI-NEXT:    v_or_b32_e32 v24, v25, v24
; VI-NEXT:    v_add_f16_sdwa v25, v34, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v26, 0x200, v34
; VI-NEXT:    v_or_b32_e32 v25, v26, v25
; VI-NEXT:    v_add_f16_sdwa v26, v33, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v28, 0x200, v33
; VI-NEXT:    v_or_b32_e32 v26, v28, v26
; VI-NEXT:    v_add_f16_sdwa v27, v32, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v28, 0x200, v32
; VI-NEXT:    v_or_b32_e32 v27, v28, v27
; VI-NEXT:  .LBB34_4: ; %end
; VI-NEXT:    s_or_b64 exec, exec, s[4:5]
; VI-NEXT:    buffer_load_dword v59, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v58, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v57, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v56, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v56f16_to_v28f32:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    v_mov_b32_e32 v59, v0
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v27
; GFX9-NEXT:    v_mov_b32_e32 v34, v25
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v26
; GFX9-NEXT:    v_mov_b32_e32 v35, v24
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v34
; GFX9-NEXT:    v_mov_b32_e32 v36, v23
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT:    v_mov_b32_e32 v37, v22
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT:    v_mov_b32_e32 v38, v21
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT:    v_mov_b32_e32 v39, v20
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT:    v_mov_b32_e32 v48, v19
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT:    v_mov_b32_e32 v49, v18
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT:    v_mov_b32_e32 v50, v17
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT:    v_mov_b32_e32 v51, v16
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT:    v_mov_b32_e32 v52, v15
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT:    v_mov_b32_e32 v53, v14
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT:    v_mov_b32_e32 v54, v13
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT:    v_mov_b32_e32 v55, v12
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT:    v_mov_b32_e32 v40, v11
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT:    v_mov_b32_e32 v41, v10
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT:    v_mov_b32_e32 v42, v9
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT:    v_mov_b32_e32 v43, v8
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT:    v_mov_b32_e32 v44, v7
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT:    v_mov_b32_e32 v45, v6
; GFX9-NEXT:    v_mov_b32_e32 v46, v5
; GFX9-NEXT:    v_mov_b32_e32 v47, v4
; GFX9-NEXT:    v_mov_b32_e32 v56, v3
; GFX9-NEXT:    v_mov_b32_e32 v57, v2
; GFX9-NEXT:    v_mov_b32_e32 v58, v1
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v44
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v45
; GFX9-NEXT:    v_lshrrev_b32_e32 v62, 16, v46
; GFX9-NEXT:    v_lshrrev_b32_e32 v63, 16, v47
; GFX9-NEXT:    v_lshrrev_b32_e32 v60, 16, v56
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v57
; GFX9-NEXT:    v_lshrrev_b32_e32 v61, 16, v58
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v59
; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT:    buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT:    ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB34_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT:    s_mov_b32 s6, 0x5040100
; GFX9-NEXT:    v_lshrrev_b32_e32 v6, 16, v45
; GFX9-NEXT:    v_lshrrev_b32_e32 v7, 16, v44
; GFX9-NEXT:    v_lshrrev_b32_e32 v8, 16, v43
; GFX9-NEXT:    v_lshrrev_b32_e32 v9, 16, v42
; GFX9-NEXT:    v_lshrrev_b32_e32 v10, 16, v41
; GFX9-NEXT:    v_lshrrev_b32_e32 v11, 16, v40
; GFX9-NEXT:    v_lshrrev_b32_e32 v12, 16, v55
; GFX9-NEXT:    v_lshrrev_b32_e32 v13, 16, v54
; GFX9-NEXT:    v_lshrrev_b32_e32 v14, 16, v53
; GFX9-NEXT:    v_lshrrev_b32_e32 v15, 16, v52
; GFX9-NEXT:    v_lshrrev_b32_e32 v16, 16, v51
; GFX9-NEXT:    v_lshrrev_b32_e32 v17, 16, v50
; GFX9-NEXT:    v_lshrrev_b32_e32 v18, 16, v49
; GFX9-NEXT:    v_lshrrev_b32_e32 v19, 16, v48
; GFX9-NEXT:    v_lshrrev_b32_e32 v20, 16, v39
; GFX9-NEXT:    v_lshrrev_b32_e32 v21, 16, v38
; GFX9-NEXT:    v_lshrrev_b32_e32 v22, 16, v37
; GFX9-NEXT:    v_lshrrev_b32_e32 v23, 16, v36
; GFX9-NEXT:    v_lshrrev_b32_e32 v24, 16, v35
; GFX9-NEXT:    v_lshrrev_b32_e32 v25, 16, v34
; GFX9-NEXT:    v_perm_b32 v0, v33, v59, s6
; GFX9-NEXT:    v_perm_b32 v1, v61, v58, s6
; GFX9-NEXT:    v_perm_b32 v2, v32, v57, s6
; GFX9-NEXT:    v_perm_b32 v3, v60, v56, s6
; GFX9-NEXT:    v_perm_b32 v4, v63, v47, s6
; GFX9-NEXT:    v_perm_b32 v5, v62, v46, s6
; GFX9-NEXT:    v_perm_b32 v6, v6, v45, s6
; GFX9-NEXT:    v_perm_b32 v7, v7, v44, s6
; GFX9-NEXT:    v_perm_b32 v8, v8, v43, s6
; GFX9-NEXT:    v_perm_b32 v9, v9, v42, s6
; GFX9-NEXT:    v_perm_b32 v10, v10, v41, s6
; GFX9-NEXT:    v_perm_b32 v11, v11, v40, s6
; GFX9-NEXT:    v_perm_b32 v12, v12, v55, s6
; GFX9-NEXT:    v_perm_b32 v13, v13, v54, s6
; GFX9-NEXT:    v_perm_b32 v14, v14, v53, s6
; GFX9-NEXT:    v_perm_b32 v15, v15, v52, s6
; GFX9-NEXT:    v_perm_b32 v16, v16, v51, s6
; GFX9-NEXT:    v_perm_b32 v17, v17, v50, s6
; GFX9-NEXT:    v_perm_b32 v18, v18, v49, s6
; GFX9-NEXT:    v_perm_b32 v19, v19, v48, s6
; GFX9-NEXT:    v_perm_b32 v20, v20, v39, s6
; GFX9-NEXT:    v_perm_b32 v21, v21, v38, s6
; GFX9-NEXT:    v_perm_b32 v22, v22, v37, s6
; GFX9-NEXT:    v_perm_b32 v23, v23, v36, s6
; GFX9-NEXT:    v_perm_b32 v24, v24, v35, s6
; GFX9-NEXT:    v_perm_b32 v25, v25, v34, s6
; GFX9-NEXT:    ; implicit-def: $vgpr59
; GFX9-NEXT:    ; implicit-def: $vgpr58
; GFX9-NEXT:    ; implicit-def: $vgpr57
; GFX9-NEXT:    ; implicit-def: $vgpr56
; GFX9-NEXT:    ; implicit-def: $vgpr47
; GFX9-NEXT:    ; implicit-def: $vgpr46
; GFX9-NEXT:    ; implicit-def: $vgpr45
; GFX9-NEXT:    ; implicit-def: $vgpr44
; GFX9-NEXT:    ; implicit-def: $vgpr43
; GFX9-NEXT:    ; implicit-def: $vgpr42
; GFX9-NEXT:    ; implicit-def: $vgpr41
; GFX9-NEXT:    ; implicit-def: $vgpr40
; GFX9-NEXT:    ; implicit-def: $vgpr55
; GFX9-NEXT:    ; implicit-def: $vgpr54
; GFX9-NEXT:    ; implicit-def: $vgpr53
; GFX9-NEXT:    ; implicit-def: $vgpr52
; GFX9-NEXT:    ; implicit-def: $vgpr51
; GFX9-NEXT:    ; implicit-def: $vgpr50
; GFX9-NEXT:    ; implicit-def: $vgpr49
; GFX9-NEXT:    ; implicit-def: $vgpr48
; GFX9-NEXT:    ; implicit-def: $vgpr39
; GFX9-NEXT:    ; implicit-def: $vgpr38
; GFX9-NEXT:    ; implicit-def: $vgpr37
; GFX9-NEXT:    ; implicit-def: $vgpr36
; GFX9-NEXT:    ; implicit-def: $vgpr35
; GFX9-NEXT:    ; implicit-def: $vgpr34
; GFX9-NEXT:    ; implicit-def: $vgpr62
; GFX9-NEXT:    ; implicit-def: $vgpr63
; GFX9-NEXT:    ; implicit-def: $vgpr60
; GFX9-NEXT:    ; implicit-def: $vgpr32
; GFX9-NEXT:    ; implicit-def: $vgpr61
; GFX9-NEXT:    ; implicit-def: $vgpr33
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:  .LBB34_2: ; %Flow
; GFX9-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB34_4
; GFX9-NEXT:  ; %bb.3: ; %cmp.true
; GFX9-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT:    s_mov_b32 s6, 0x5040100
; GFX9-NEXT:    buffer_load_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v7, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v8, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v14, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v19, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT:    v_perm_b32 v0, v33, v59, s6
; GFX9-NEXT:    s_movk_i32 s7, 0x200
; GFX9-NEXT:    v_perm_b32 v1, v61, v58, s6
; GFX9-NEXT:    v_perm_b32 v2, v32, v57, s6
; GFX9-NEXT:    v_perm_b32 v3, v60, v56, s6
; GFX9-NEXT:    v_perm_b32 v4, v63, v47, s6
; GFX9-NEXT:    v_perm_b32 v5, v62, v46, s6
; GFX9-NEXT:    v_pk_add_f16 v0, v0, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v1, v1, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v2, v2, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v3, v3, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v4, v4, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v5, v5, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    s_waitcnt vmcnt(20)
; GFX9-NEXT:    v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT:    s_waitcnt vmcnt(21)
; GFX9-NEXT:    v_perm_b32 v6, v6, v45, s6
; GFX9-NEXT:    s_waitcnt vmcnt(20)
; GFX9-NEXT:    v_perm_b32 v7, v7, v44, s6
; GFX9-NEXT:    s_waitcnt vmcnt(19)
; GFX9-NEXT:    v_perm_b32 v8, v8, v43, s6
; GFX9-NEXT:    s_waitcnt vmcnt(18)
; GFX9-NEXT:    v_perm_b32 v9, v9, v42, s6
; GFX9-NEXT:    s_waitcnt vmcnt(17)
; GFX9-NEXT:    v_perm_b32 v10, v10, v41, s6
; GFX9-NEXT:    s_waitcnt vmcnt(16)
; GFX9-NEXT:    v_perm_b32 v11, v11, v40, s6
; GFX9-NEXT:    s_waitcnt vmcnt(15)
; GFX9-NEXT:    v_perm_b32 v12, v12, v55, s6
; GFX9-NEXT:    s_waitcnt vmcnt(14)
; GFX9-NEXT:    v_perm_b32 v13, v13, v54, s6
; GFX9-NEXT:    s_waitcnt vmcnt(13)
; GFX9-NEXT:    v_perm_b32 v14, v14, v53, s6
; GFX9-NEXT:    s_waitcnt vmcnt(12)
; GFX9-NEXT:    v_perm_b32 v15, v15, v52, s6
; GFX9-NEXT:    s_waitcnt vmcnt(11)
; GFX9-NEXT:    v_perm_b32 v16, v16, v51, s6
; GFX9-NEXT:    s_waitcnt vmcnt(10)
; GFX9-NEXT:    v_perm_b32 v17, v17, v50, s6
; GFX9-NEXT:    s_waitcnt vmcnt(9)
; GFX9-NEXT:    v_perm_b32 v18, v18, v49, s6
; GFX9-NEXT:    s_waitcnt vmcnt(8)
; GFX9-NEXT:    v_perm_b32 v19, v19, v48, s6
; GFX9-NEXT:    s_waitcnt vmcnt(7)
; GFX9-NEXT:    v_perm_b32 v20, v20, v39, s6
; GFX9-NEXT:    s_waitcnt vmcnt(6)
; GFX9-NEXT:    v_perm_b32 v21, v21, v38, s6
; GFX9-NEXT:    s_waitcnt vmcnt(5)
; GFX9-NEXT:    v_perm_b32 v22, v22, v37, s6
; GFX9-NEXT:    s_waitcnt vmcnt(4)
; GFX9-NEXT:    v_perm_b32 v23, v23, v36, s6
; GFX9-NEXT:    s_waitcnt vmcnt(3)
; GFX9-NEXT:    v_perm_b32 v24, v24, v35, s6
; GFX9-NEXT:    s_waitcnt vmcnt(2)
; GFX9-NEXT:    v_perm_b32 v25, v25, v34, s6
; GFX9-NEXT:    v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v9, v9, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v10, v10, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v11, v11, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v12, v12, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v13, v13, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v14, v14, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v15, v15, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v16, v16, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v17, v17, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v18, v18, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v19, v19, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v20, v20, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v21, v21, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v22, v22, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v23, v23, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v24, v24, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v25, v25, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v26, v26, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT:    v_pk_add_f16 v27, v27, s7 op_sel_hi:[1,0]
; GFX9-NEXT:  .LBB34_4: ; %end
; GFX9-NEXT:    s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT:    buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-TRUE16-LABEL: bitcast_v56f16_to_v28f32:
; GFX11-TRUE16:       ; %bb.0:
; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-TRUE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT:    s_cbranch_execz .LBB34_2
; GFX11-TRUE16-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v0, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v1, v1, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v2, v2, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v3, v3, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v4, v4, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v5, v5, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v6, v6, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v7, v7, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v8, v8, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v9, v9, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v10, v10, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v11, v11, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v12, v12, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v13, v13, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v14, v14, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v15, v15, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v16, v16, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v17, v17, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v18, v18, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v19, v19, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v20, v20, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v21, v21, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v22, v22, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v23, v23, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v24, v24, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v25, v25, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v26, v26, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v27, v27, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:  .LBB34_2: ; %end
; GFX11-TRUE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v56f16_to_v28f32:
; GFX11-FAKE16:       ; %bb.0:
; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v0
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v2
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v80, 16, v3
; GFX11-FAKE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v28
; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v69, v0, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v1, v70, v1, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v2, v71, v2, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v3, v80, v3, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v4, v68, v4, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v5, v67, v5, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v6, v66, v6, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v7, v65, v7, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v8, v64, v8, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v9, v55, v9, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v10, v54, v10, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v11, v53, v11, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v12, v52, v12, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v13, v51, v13, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v14, v50, v14, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v15, v49, v15, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v16, v48, v16, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v17, v39, v17, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v18, v38, v18, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v19, v37, v19, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v20, v36, v20, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v21, v35, v21, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v22, v34, v22, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v23, v33, v23, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v24, v32, v24, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v25, v31, v25, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v26, v30, v26, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v27, v29, v27, 0x5040100
; GFX11-FAKE16-NEXT:    s_and_saveexec_b32 s0, vcc_lo
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-FAKE16-NEXT:    s_cbranch_execz .LBB34_2
; GFX11-FAKE16-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v0, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v1, v1, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v2, v2, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v3, v3, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v4, v4, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v5, v5, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v6, v6, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v7, v7, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v8, v8, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v9, v9, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v10, v10, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v11, v11, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v12, v12, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v13, v13, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v14, v14, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v15, v15, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v16, v16, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v17, v17, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v18, v18, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v19, v19, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v20, v20, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v21, v21, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v22, v22, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v23, v23, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v24, v24, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v25, v25, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v26, v26, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v27, v27, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:  .LBB34_2: ; %end
; GFX11-FAKE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = fadd <56 x half> %a, splat (half 0xH0200)
  %a2 = bitcast <56 x half> %a1 to <28 x float>
  br label %end

cmp.false:
  %a3 = bitcast <56 x half> %a to <28 x float>
  br label %end

end:
  %phi = phi <28 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <28 x float> %phi
}

define inreg <28 x float> @bitcast_v56f16_to_v28f32_scalar(<56 x half> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v56f16_to_v28f32_scalar:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_writelane_b32 v32, s36, 0
; SI-NEXT:    v_writelane_b32 v32, s37, 1
; SI-NEXT:    v_writelane_b32 v32, s38, 2
; SI-NEXT:    v_writelane_b32 v32, s39, 3
; SI-NEXT:    v_writelane_b32 v32, s48, 4
; SI-NEXT:    v_writelane_b32 v32, s49, 5
; SI-NEXT:    v_writelane_b32 v32, s50, 6
; SI-NEXT:    v_writelane_b32 v32, s51, 7
; SI-NEXT:    v_writelane_b32 v32, s52, 8
; SI-NEXT:    v_writelane_b32 v32, s53, 9
; SI-NEXT:    v_writelane_b32 v32, s54, 10
; SI-NEXT:    v_writelane_b32 v32, s55, 11
; SI-NEXT:    v_readfirstlane_b32 s4, v13
; SI-NEXT:    v_readfirstlane_b32 s6, v12
; SI-NEXT:    v_readfirstlane_b32 s8, v11
; SI-NEXT:    v_readfirstlane_b32 s10, v10
; SI-NEXT:    v_readfirstlane_b32 s12, v9
; SI-NEXT:    v_readfirstlane_b32 s14, v8
; SI-NEXT:    v_readfirstlane_b32 s57, v7
; SI-NEXT:    v_readfirstlane_b32 s56, v6
; SI-NEXT:    v_readfirstlane_b32 s60, v5
; SI-NEXT:    v_readfirstlane_b32 s62, v4
; SI-NEXT:    v_readfirstlane_b32 s72, v3
; SI-NEXT:    v_readfirstlane_b32 s74, v2
; SI-NEXT:    v_readfirstlane_b32 s77, v1
; SI-NEXT:    v_readfirstlane_b32 s88, v0
; SI-NEXT:    s_lshr_b32 s75, s29, 16
; SI-NEXT:    s_lshr_b32 s78, s28, 16
; SI-NEXT:    s_lshr_b32 s47, s27, 16
; SI-NEXT:    s_lshr_b32 s46, s26, 16
; SI-NEXT:    s_lshr_b32 s45, s25, 16
; SI-NEXT:    s_lshr_b32 s44, s24, 16
; SI-NEXT:    s_lshr_b32 s43, s23, 16
; SI-NEXT:    s_lshr_b32 s42, s22, 16
; SI-NEXT:    s_lshr_b32 s41, s21, 16
; SI-NEXT:    s_lshr_b32 s40, s20, 16
; SI-NEXT:    s_lshr_b32 s90, s19, 16
; SI-NEXT:    s_lshr_b32 s91, s18, 16
; SI-NEXT:    s_lshr_b32 s92, s17, 16
; SI-NEXT:    s_lshr_b32 s93, s16, 16
; SI-NEXT:    s_lshr_b32 s5, s4, 16
; SI-NEXT:    s_lshr_b32 s7, s6, 16
; SI-NEXT:    s_lshr_b32 s9, s8, 16
; SI-NEXT:    s_lshr_b32 s11, s10, 16
; SI-NEXT:    s_lshr_b32 s13, s12, 16
; SI-NEXT:    s_lshr_b32 s15, s14, 16
; SI-NEXT:    s_lshr_b32 s58, s57, 16
; SI-NEXT:    s_lshr_b32 s59, s56, 16
; SI-NEXT:    s_lshr_b32 s61, s60, 16
; SI-NEXT:    s_lshr_b32 s63, s62, 16
; SI-NEXT:    s_lshr_b32 s73, s72, 16
; SI-NEXT:    s_lshr_b32 s76, s74, 16
; SI-NEXT:    s_lshr_b32 s79, s77, 16
; SI-NEXT:    s_lshr_b32 s89, s88, 16
; SI-NEXT:    v_readfirstlane_b32 s94, v14
; SI-NEXT:    s_cmp_lg_u32 s94, 0
; SI-NEXT:    s_cbranch_scc0 .LBB35_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    s_and_b32 s16, s16, 0xffff
; SI-NEXT:    s_lshl_b32 s93, s93, 16
; SI-NEXT:    s_and_b32 s17, s17, 0xffff
; SI-NEXT:    s_lshl_b32 s92, s92, 16
; SI-NEXT:    s_or_b32 s36, s16, s93
; SI-NEXT:    s_or_b32 s37, s17, s92
; SI-NEXT:    s_and_b32 s16, s18, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s91, 16
; SI-NEXT:    s_or_b32 s38, s16, s17
; SI-NEXT:    s_and_b32 s16, s19, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s90, 16
; SI-NEXT:    s_or_b32 s39, s16, s17
; SI-NEXT:    s_and_b32 s16, s20, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s40, 16
; SI-NEXT:    s_or_b32 s40, s16, s17
; SI-NEXT:    s_and_b32 s16, s21, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s41, 16
; SI-NEXT:    s_or_b32 s41, s16, s17
; SI-NEXT:    s_and_b32 s16, s22, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s42, 16
; SI-NEXT:    s_or_b32 s42, s16, s17
; SI-NEXT:    s_and_b32 s16, s23, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s43, 16
; SI-NEXT:    s_or_b32 s43, s16, s17
; SI-NEXT:    s_and_b32 s16, s24, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s44, 16
; SI-NEXT:    s_or_b32 s44, s16, s17
; SI-NEXT:    s_and_b32 s16, s25, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s45, 16
; SI-NEXT:    s_or_b32 s45, s16, s17
; SI-NEXT:    s_and_b32 s16, s26, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s46, 16
; SI-NEXT:    s_or_b32 s46, s16, s17
; SI-NEXT:    s_and_b32 s16, s27, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s47, 16
; SI-NEXT:    s_or_b32 s47, s16, s17
; SI-NEXT:    s_and_b32 s16, s28, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s78, 16
; SI-NEXT:    s_or_b32 s48, s16, s17
; SI-NEXT:    s_and_b32 s16, s29, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s75, 16
; SI-NEXT:    s_or_b32 s49, s16, s17
; SI-NEXT:    s_and_b32 s16, s88, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s89, 16
; SI-NEXT:    s_or_b32 s50, s16, s17
; SI-NEXT:    s_and_b32 s16, s77, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s79, 16
; SI-NEXT:    s_or_b32 s51, s16, s17
; SI-NEXT:    s_and_b32 s16, s74, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s76, 16
; SI-NEXT:    s_or_b32 s52, s16, s17
; SI-NEXT:    s_and_b32 s16, s72, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s73, 16
; SI-NEXT:    s_or_b32 s53, s16, s17
; SI-NEXT:    s_and_b32 s16, s62, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s63, 16
; SI-NEXT:    s_or_b32 s54, s16, s17
; SI-NEXT:    s_and_b32 s16, s60, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s61, 16
; SI-NEXT:    s_or_b32 s55, s16, s17
; SI-NEXT:    s_and_b32 s16, s56, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s59, 16
; SI-NEXT:    s_or_b32 s56, s16, s17
; SI-NEXT:    s_and_b32 s16, s57, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s58, 16
; SI-NEXT:    s_and_b32 s14, s14, 0xffff
; SI-NEXT:    s_lshl_b32 s15, s15, 16
; SI-NEXT:    s_and_b32 s12, s12, 0xffff
; SI-NEXT:    s_lshl_b32 s13, s13, 16
; SI-NEXT:    s_and_b32 s10, s10, 0xffff
; SI-NEXT:    s_lshl_b32 s11, s11, 16
; SI-NEXT:    s_and_b32 s8, s8, 0xffff
; SI-NEXT:    s_lshl_b32 s9, s9, 16
; SI-NEXT:    s_and_b32 s6, s6, 0xffff
; SI-NEXT:    s_lshl_b32 s7, s7, 16
; SI-NEXT:    s_and_b32 s4, s4, 0xffff
; SI-NEXT:    s_lshl_b32 s5, s5, 16
; SI-NEXT:    s_or_b32 s57, s16, s17
; SI-NEXT:    s_or_b32 s58, s14, s15
; SI-NEXT:    s_or_b32 s59, s12, s13
; SI-NEXT:    s_or_b32 s60, s10, s11
; SI-NEXT:    s_or_b32 s61, s8, s9
; SI-NEXT:    s_or_b32 s62, s6, s7
; SI-NEXT:    s_or_b32 s63, s4, s5
; SI-NEXT:    v_mov_b32_e32 v0, s36
; SI-NEXT:    v_mov_b32_e32 v1, s37
; SI-NEXT:    v_mov_b32_e32 v2, s38
; SI-NEXT:    v_mov_b32_e32 v3, s39
; SI-NEXT:    v_mov_b32_e32 v4, s40
; SI-NEXT:    v_mov_b32_e32 v5, s41
; SI-NEXT:    v_mov_b32_e32 v6, s42
; SI-NEXT:    v_mov_b32_e32 v7, s43
; SI-NEXT:    v_mov_b32_e32 v8, s44
; SI-NEXT:    v_mov_b32_e32 v9, s45
; SI-NEXT:    v_mov_b32_e32 v10, s46
; SI-NEXT:    v_mov_b32_e32 v11, s47
; SI-NEXT:    v_mov_b32_e32 v12, s48
; SI-NEXT:    v_mov_b32_e32 v13, s49
; SI-NEXT:    v_mov_b32_e32 v14, s50
; SI-NEXT:    v_mov_b32_e32 v15, s51
; SI-NEXT:    v_mov_b32_e32 v16, s52
; SI-NEXT:    v_mov_b32_e32 v17, s53
; SI-NEXT:    v_mov_b32_e32 v18, s54
; SI-NEXT:    v_mov_b32_e32 v19, s55
; SI-NEXT:    v_mov_b32_e32 v20, s56
; SI-NEXT:    v_mov_b32_e32 v21, s57
; SI-NEXT:    v_mov_b32_e32 v22, s58
; SI-NEXT:    v_mov_b32_e32 v23, s59
; SI-NEXT:    v_mov_b32_e32 v24, s60
; SI-NEXT:    v_mov_b32_e32 v25, s61
; SI-NEXT:    v_mov_b32_e32 v26, s62
; SI-NEXT:    v_mov_b32_e32 v27, s63
; SI-NEXT:    v_mov_b32_e32 v28, s64
; SI-NEXT:    v_mov_b32_e32 v29, s65
; SI-NEXT:    v_mov_b32_e32 v30, s66
; SI-NEXT:    v_mov_b32_e32 v31, s67
; SI-NEXT:    s_branch .LBB35_3
; SI-NEXT:  .LBB35_2: ; %cmp.true
; SI-NEXT:    v_cvt_f32_f16_e32 v0, s93
; SI-NEXT:    v_cvt_f32_f16_e32 v2, s92
; SI-NEXT:    v_cvt_f32_f16_e32 v1, s16
; SI-NEXT:    v_cvt_f32_f16_e32 v3, s17
; SI-NEXT:    v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT:    v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT:    v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT:    v_cvt_f16_f32_e32 v0, v0
; SI-NEXT:    v_cvt_f16_f32_e32 v2, v2
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v1, v1
; SI-NEXT:    v_cvt_f16_f32_e32 v3, v3
; SI-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
; SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT:    v_or_b32_e32 v0, v1, v0
; SI-NEXT:    v_or_b32_e32 v1, v3, v2
; SI-NEXT:    v_cvt_f32_f16_e32 v2, s91
; SI-NEXT:    v_cvt_f32_f16_e32 v3, s18
; SI-NEXT:    v_cvt_f32_f16_e32 v4, s19
; SI-NEXT:    v_cvt_f32_f16_e32 v5, s20
; SI-NEXT:    v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT:    v_cvt_f16_f32_e32 v2, v2
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v3, v3
; SI-NEXT:    v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT:    v_cvt_f16_f32_e32 v4, v4
; SI-NEXT:    v_or_b32_e32 v2, v3, v2
; SI-NEXT:    v_cvt_f32_f16_e32 v3, s90
; SI-NEXT:    v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT:    v_cvt_f16_f32_e32 v5, v5
; SI-NEXT:    v_cvt_f32_f16_e32 v6, s21
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v3, v3
; SI-NEXT:    v_cvt_f32_f16_e32 v7, s22
; SI-NEXT:    v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT:    v_cvt_f16_f32_e32 v6, v6
; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT:    v_or_b32_e32 v3, v4, v3
; SI-NEXT:    v_cvt_f32_f16_e32 v4, s40
; SI-NEXT:    v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT:    v_cvt_f16_f32_e32 v7, v7
; SI-NEXT:    v_cvt_f32_f16_e32 v8, s23
; SI-NEXT:    v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT:    v_cvt_f16_f32_e32 v4, v4
; SI-NEXT:    v_cvt_f32_f16_e32 v9, s24
; SI-NEXT:    v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT:    v_cvt_f16_f32_e32 v8, v8
; SI-NEXT:    v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT:    v_or_b32_e32 v4, v5, v4
; SI-NEXT:    v_cvt_f32_f16_e32 v5, s41
; SI-NEXT:    v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT:    v_cvt_f16_f32_e32 v9, v9
; SI-NEXT:    v_cvt_f32_f16_e32 v10, s25
; SI-NEXT:    v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT:    v_cvt_f16_f32_e32 v5, v5
; SI-NEXT:    v_cvt_f32_f16_e32 v11, s26
; SI-NEXT:    v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT:    v_cvt_f16_f32_e32 v10, v10
; SI-NEXT:    v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT:    v_or_b32_e32 v5, v6, v5
; SI-NEXT:    v_cvt_f32_f16_e32 v6, s42
; SI-NEXT:    v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT:    v_cvt_f16_f32_e32 v11, v11
; SI-NEXT:    v_cvt_f32_f16_e32 v12, s27
; SI-NEXT:    v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT:    v_cvt_f16_f32_e32 v6, v6
; SI-NEXT:    v_cvt_f32_f16_e32 v13, s28
; SI-NEXT:    v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT:    v_cvt_f16_f32_e32 v12, v12
; SI-NEXT:    v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT:    v_or_b32_e32 v6, v7, v6
; SI-NEXT:    v_cvt_f32_f16_e32 v7, s43
; SI-NEXT:    v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT:    v_cvt_f16_f32_e32 v13, v13
; SI-NEXT:    v_cvt_f32_f16_e32 v14, s29
; SI-NEXT:    v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT:    v_cvt_f16_f32_e32 v7, v7
; SI-NEXT:    v_cvt_f32_f16_e32 v15, s88
; SI-NEXT:    v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT:    v_cvt_f16_f32_e32 v14, v14
; SI-NEXT:    v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT:    v_or_b32_e32 v7, v8, v7
; SI-NEXT:    v_cvt_f32_f16_e32 v8, s44
; SI-NEXT:    v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT:    v_cvt_f16_f32_e32 v15, v15
; SI-NEXT:    v_cvt_f32_f16_e32 v16, s77
; SI-NEXT:    v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT:    v_cvt_f16_f32_e32 v8, v8
; SI-NEXT:    v_cvt_f32_f16_e32 v17, s74
; SI-NEXT:    v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT:    v_cvt_f16_f32_e32 v16, v16
; SI-NEXT:    v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT:    v_or_b32_e32 v8, v9, v8
; SI-NEXT:    v_cvt_f32_f16_e32 v9, s45
; SI-NEXT:    v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT:    v_cvt_f16_f32_e32 v17, v17
; SI-NEXT:    v_cvt_f32_f16_e32 v18, s72
; SI-NEXT:    v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT:    v_cvt_f16_f32_e32 v9, v9
; SI-NEXT:    v_cvt_f32_f16_e32 v19, s62
; SI-NEXT:    v_add_f32_e32 v18, 0x38000000, v18
; SI-NEXT:    v_cvt_f16_f32_e32 v18, v18
; SI-NEXT:    v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT:    v_or_b32_e32 v9, v10, v9
; SI-NEXT:    v_cvt_f32_f16_e32 v10, s46
; SI-NEXT:    v_add_f32_e32 v19, 0x38000000, v19
; SI-NEXT:    v_cvt_f16_f32_e32 v19, v19
; SI-NEXT:    v_cvt_f32_f16_e32 v20, s60
; SI-NEXT:    v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT:    v_cvt_f16_f32_e32 v10, v10
; SI-NEXT:    v_cvt_f32_f16_e32 v21, s56
; SI-NEXT:    v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT:    v_cvt_f16_f32_e32 v20, v20
; SI-NEXT:    v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT:    v_or_b32_e32 v10, v11, v10
; SI-NEXT:    v_cvt_f32_f16_e32 v11, s47
; SI-NEXT:    v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT:    v_cvt_f16_f32_e32 v21, v21
; SI-NEXT:    v_cvt_f32_f16_e32 v22, s57
; SI-NEXT:    v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT:    v_cvt_f16_f32_e32 v11, v11
; SI-NEXT:    v_cvt_f32_f16_e32 v23, s14
; SI-NEXT:    v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT:    v_cvt_f16_f32_e32 v22, v22
; SI-NEXT:    v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT:    v_or_b32_e32 v11, v12, v11
; SI-NEXT:    v_cvt_f32_f16_e32 v12, s78
; SI-NEXT:    v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT:    v_cvt_f16_f32_e32 v23, v23
; SI-NEXT:    v_cvt_f32_f16_e32 v24, s12
; SI-NEXT:    v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT:    v_cvt_f16_f32_e32 v12, v12
; SI-NEXT:    v_cvt_f32_f16_e32 v25, s10
; SI-NEXT:    v_add_f32_e32 v24, 0x38000000, v24
; SI-NEXT:    v_cvt_f16_f32_e32 v24, v24
; SI-NEXT:    v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT:    v_or_b32_e32 v12, v13, v12
; SI-NEXT:    v_cvt_f32_f16_e32 v13, s75
; SI-NEXT:    v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT:    v_cvt_f16_f32_e32 v25, v25
; SI-NEXT:    v_cvt_f32_f16_e32 v26, s8
; SI-NEXT:    v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT:    v_cvt_f16_f32_e32 v13, v13
; SI-NEXT:    v_cvt_f32_f16_e32 v27, s6
; SI-NEXT:    v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT:    v_cvt_f16_f32_e32 v26, v26
; SI-NEXT:    v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT:    v_or_b32_e32 v13, v14, v13
; SI-NEXT:    v_cvt_f32_f16_e32 v14, s89
; SI-NEXT:    v_add_f32_e32 v27, 0x38000000, v27
; SI-NEXT:    v_cvt_f16_f32_e32 v27, v27
; SI-NEXT:    v_cvt_f32_f16_e32 v28, s4
; SI-NEXT:    v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT:    v_cvt_f16_f32_e32 v14, v14
; SI-NEXT:    v_add_f32_e32 v28, 0x38000000, v28
; SI-NEXT:    v_cvt_f16_f32_e32 v28, v28
; SI-NEXT:    v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT:    v_or_b32_e32 v14, v15, v14
; SI-NEXT:    v_cvt_f32_f16_e32 v15, s79
; SI-NEXT:    v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT:    v_cvt_f16_f32_e32 v15, v15
; SI-NEXT:    v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT:    v_or_b32_e32 v15, v16, v15
; SI-NEXT:    v_cvt_f32_f16_e32 v16, s76
; SI-NEXT:    v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT:    v_cvt_f16_f32_e32 v16, v16
; SI-NEXT:    v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT:    v_or_b32_e32 v16, v17, v16
; SI-NEXT:    v_cvt_f32_f16_e32 v17, s73
; SI-NEXT:    v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT:    v_cvt_f16_f32_e32 v17, v17
; SI-NEXT:    v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT:    v_or_b32_e32 v17, v18, v17
; SI-NEXT:    v_cvt_f32_f16_e32 v18, s63
; SI-NEXT:    v_add_f32_e32 v18, 0x38000000, v18
; SI-NEXT:    v_cvt_f16_f32_e32 v18, v18
; SI-NEXT:    v_lshlrev_b32_e32 v18, 16, v18
; SI-NEXT:    v_or_b32_e32 v18, v19, v18
; SI-NEXT:    v_cvt_f32_f16_e32 v19, s61
; SI-NEXT:    v_add_f32_e32 v19, 0x38000000, v19
; SI-NEXT:    v_cvt_f16_f32_e32 v19, v19
; SI-NEXT:    v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT:    v_or_b32_e32 v19, v20, v19
; SI-NEXT:    v_cvt_f32_f16_e32 v20, s59
; SI-NEXT:    v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT:    v_cvt_f16_f32_e32 v20, v20
; SI-NEXT:    v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT:    v_or_b32_e32 v20, v21, v20
; SI-NEXT:    v_cvt_f32_f16_e32 v21, s58
; SI-NEXT:    v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT:    v_cvt_f16_f32_e32 v21, v21
; SI-NEXT:    v_lshlrev_b32_e32 v21, 16, v21
; SI-NEXT:    v_or_b32_e32 v21, v22, v21
; SI-NEXT:    v_cvt_f32_f16_e32 v22, s15
; SI-NEXT:    v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT:    v_cvt_f16_f32_e32 v22, v22
; SI-NEXT:    v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT:    v_or_b32_e32 v22, v23, v22
; SI-NEXT:    v_cvt_f32_f16_e32 v23, s13
; SI-NEXT:    v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT:    v_cvt_f16_f32_e32 v23, v23
; SI-NEXT:    v_lshlrev_b32_e32 v23, 16, v23
; SI-NEXT:    v_or_b32_e32 v23, v24, v23
; SI-NEXT:    v_cvt_f32_f16_e32 v24, s11
; SI-NEXT:    v_add_f32_e32 v24, 0x38000000, v24
; SI-NEXT:    v_cvt_f16_f32_e32 v24, v24
; SI-NEXT:    v_lshlrev_b32_e32 v24, 16, v24
; SI-NEXT:    v_or_b32_e32 v24, v25, v24
; SI-NEXT:    v_cvt_f32_f16_e32 v25, s9
; SI-NEXT:    v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT:    v_cvt_f16_f32_e32 v25, v25
; SI-NEXT:    v_lshlrev_b32_e32 v25, 16, v25
; SI-NEXT:    v_or_b32_e32 v25, v26, v25
; SI-NEXT:    v_cvt_f32_f16_e32 v26, s7
; SI-NEXT:    v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT:    v_cvt_f16_f32_e32 v26, v26
; SI-NEXT:    v_lshlrev_b32_e32 v26, 16, v26
; SI-NEXT:    v_or_b32_e32 v26, v27, v26
; SI-NEXT:    v_cvt_f32_f16_e32 v27, s5
; SI-NEXT:    v_add_f32_e32 v27, 0x38000000, v27
; SI-NEXT:    v_cvt_f16_f32_e32 v27, v27
; SI-NEXT:    v_lshlrev_b32_e32 v27, 16, v27
; SI-NEXT:    v_or_b32_e32 v27, v28, v27
; SI-NEXT:  .LBB35_3: ; %end
; SI-NEXT:    v_readlane_b32 s55, v32, 11
; SI-NEXT:    v_readlane_b32 s54, v32, 10
; SI-NEXT:    v_readlane_b32 s53, v32, 9
; SI-NEXT:    v_readlane_b32 s52, v32, 8
; SI-NEXT:    v_readlane_b32 s51, v32, 7
; SI-NEXT:    v_readlane_b32 s50, v32, 6
; SI-NEXT:    v_readlane_b32 s49, v32, 5
; SI-NEXT:    v_readlane_b32 s48, v32, 4
; SI-NEXT:    v_readlane_b32 s39, v32, 3
; SI-NEXT:    v_readlane_b32 s38, v32, 2
; SI-NEXT:    v_readlane_b32 s37, v32, 1
; SI-NEXT:    v_readlane_b32 s36, v32, 0
; SI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v56f16_to_v28f32_scalar:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    v_writelane_b32 v32, s36, 0
; VI-NEXT:    v_writelane_b32 v32, s37, 1
; VI-NEXT:    v_writelane_b32 v32, s38, 2
; VI-NEXT:    v_writelane_b32 v32, s39, 3
; VI-NEXT:    v_writelane_b32 v32, s48, 4
; VI-NEXT:    v_writelane_b32 v32, s49, 5
; VI-NEXT:    v_writelane_b32 v32, s50, 6
; VI-NEXT:    v_writelane_b32 v32, s51, 7
; VI-NEXT:    v_writelane_b32 v32, s52, 8
; VI-NEXT:    v_writelane_b32 v32, s53, 9
; VI-NEXT:    v_writelane_b32 v32, s54, 10
; VI-NEXT:    v_writelane_b32 v32, s55, 11
; VI-NEXT:    v_writelane_b32 v32, s30, 12
; VI-NEXT:    v_writelane_b32 v32, s31, 13
; VI-NEXT:    v_readfirstlane_b32 s4, v13
; VI-NEXT:    v_readfirstlane_b32 s6, v12
; VI-NEXT:    v_readfirstlane_b32 s8, v11
; VI-NEXT:    v_readfirstlane_b32 s10, v10
; VI-NEXT:    v_readfirstlane_b32 s12, v9
; VI-NEXT:    v_readfirstlane_b32 s14, v8
; VI-NEXT:    v_readfirstlane_b32 s57, v7
; VI-NEXT:    v_readfirstlane_b32 s56, v6
; VI-NEXT:    v_readfirstlane_b32 s60, v5
; VI-NEXT:    v_readfirstlane_b32 s62, v4
; VI-NEXT:    v_readfirstlane_b32 s73, v3
; VI-NEXT:    v_readfirstlane_b32 s76, v2
; VI-NEXT:    v_readfirstlane_b32 s78, v1
; VI-NEXT:    v_readfirstlane_b32 s88, v0
; VI-NEXT:    s_lshr_b32 s72, s29, 16
; VI-NEXT:    s_lshr_b32 s75, s28, 16
; VI-NEXT:    s_lshr_b32 s47, s27, 16
; VI-NEXT:    s_lshr_b32 s46, s26, 16
; VI-NEXT:    s_lshr_b32 s45, s25, 16
; VI-NEXT:    s_lshr_b32 s44, s24, 16
; VI-NEXT:    s_lshr_b32 s43, s23, 16
; VI-NEXT:    s_lshr_b32 s42, s22, 16
; VI-NEXT:    s_lshr_b32 s41, s21, 16
; VI-NEXT:    s_lshr_b32 s40, s20, 16
; VI-NEXT:    s_lshr_b32 s90, s19, 16
; VI-NEXT:    s_lshr_b32 s91, s18, 16
; VI-NEXT:    s_lshr_b32 vcc_lo, s17, 16
; VI-NEXT:    s_lshr_b32 vcc_hi, s16, 16
; VI-NEXT:    s_lshr_b32 s5, s4, 16
; VI-NEXT:    s_lshr_b32 s7, s6, 16
; VI-NEXT:    s_lshr_b32 s9, s8, 16
; VI-NEXT:    s_lshr_b32 s11, s10, 16
; VI-NEXT:    s_lshr_b32 s13, s12, 16
; VI-NEXT:    s_lshr_b32 s15, s14, 16
; VI-NEXT:    s_lshr_b32 s58, s57, 16
; VI-NEXT:    s_lshr_b32 s59, s56, 16
; VI-NEXT:    s_lshr_b32 s61, s60, 16
; VI-NEXT:    s_lshr_b32 s63, s62, 16
; VI-NEXT:    s_lshr_b32 s74, s73, 16
; VI-NEXT:    s_lshr_b32 s77, s76, 16
; VI-NEXT:    s_lshr_b32 s79, s78, 16
; VI-NEXT:    s_lshr_b32 s89, s88, 16
; VI-NEXT:    v_readfirstlane_b32 s30, v14
; VI-NEXT:    s_cmp_lg_u32 s30, 0
; VI-NEXT:    s_cbranch_scc0 .LBB35_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    s_and_b32 s16, 0xffff, s16
; VI-NEXT:    s_lshl_b32 vcc_hi, vcc_hi, 16
; VI-NEXT:    s_and_b32 s17, 0xffff, s17
; VI-NEXT:    s_lshl_b32 vcc_lo, vcc_lo, 16
; VI-NEXT:    s_or_b32 s36, s16, vcc_hi
; VI-NEXT:    s_or_b32 s37, s17, vcc_lo
; VI-NEXT:    s_and_b32 s16, 0xffff, s18
; VI-NEXT:    s_lshl_b32 s17, s91, 16
; VI-NEXT:    s_or_b32 s38, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s19
; VI-NEXT:    s_lshl_b32 s17, s90, 16
; VI-NEXT:    s_or_b32 s39, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s20
; VI-NEXT:    s_lshl_b32 s17, s40, 16
; VI-NEXT:    s_or_b32 s40, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s21
; VI-NEXT:    s_lshl_b32 s17, s41, 16
; VI-NEXT:    s_or_b32 s41, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s22
; VI-NEXT:    s_lshl_b32 s17, s42, 16
; VI-NEXT:    s_or_b32 s42, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s23
; VI-NEXT:    s_lshl_b32 s17, s43, 16
; VI-NEXT:    s_or_b32 s43, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s24
; VI-NEXT:    s_lshl_b32 s17, s44, 16
; VI-NEXT:    s_or_b32 s44, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s25
; VI-NEXT:    s_lshl_b32 s17, s45, 16
; VI-NEXT:    s_or_b32 s45, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s26
; VI-NEXT:    s_lshl_b32 s17, s46, 16
; VI-NEXT:    s_or_b32 s46, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s27
; VI-NEXT:    s_lshl_b32 s17, s47, 16
; VI-NEXT:    s_or_b32 s47, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s28
; VI-NEXT:    s_lshl_b32 s17, s75, 16
; VI-NEXT:    s_or_b32 s48, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s29
; VI-NEXT:    s_lshl_b32 s17, s72, 16
; VI-NEXT:    s_or_b32 s49, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s88
; VI-NEXT:    s_lshl_b32 s17, s89, 16
; VI-NEXT:    s_or_b32 s50, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s78
; VI-NEXT:    s_lshl_b32 s17, s79, 16
; VI-NEXT:    s_or_b32 s51, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s76
; VI-NEXT:    s_lshl_b32 s17, s77, 16
; VI-NEXT:    s_or_b32 s52, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s73
; VI-NEXT:    s_lshl_b32 s17, s74, 16
; VI-NEXT:    s_or_b32 s53, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s62
; VI-NEXT:    s_lshl_b32 s17, s63, 16
; VI-NEXT:    s_or_b32 s54, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s60
; VI-NEXT:    s_lshl_b32 s17, s61, 16
; VI-NEXT:    s_or_b32 s55, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s56
; VI-NEXT:    s_lshl_b32 s17, s59, 16
; VI-NEXT:    s_or_b32 s56, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s57
; VI-NEXT:    s_lshl_b32 s17, s58, 16
; VI-NEXT:    s_and_b32 s14, 0xffff, s14
; VI-NEXT:    s_lshl_b32 s15, s15, 16
; VI-NEXT:    s_and_b32 s12, 0xffff, s12
; VI-NEXT:    s_lshl_b32 s13, s13, 16
; VI-NEXT:    s_and_b32 s10, 0xffff, s10
; VI-NEXT:    s_lshl_b32 s11, s11, 16
; VI-NEXT:    s_and_b32 s8, 0xffff, s8
; VI-NEXT:    s_lshl_b32 s9, s9, 16
; VI-NEXT:    s_and_b32 s6, 0xffff, s6
; VI-NEXT:    s_lshl_b32 s7, s7, 16
; VI-NEXT:    s_and_b32 s4, 0xffff, s4
; VI-NEXT:    s_lshl_b32 s5, s5, 16
; VI-NEXT:    s_or_b32 s57, s16, s17
; VI-NEXT:    s_or_b32 s58, s14, s15
; VI-NEXT:    s_or_b32 s59, s12, s13
; VI-NEXT:    s_or_b32 s60, s10, s11
; VI-NEXT:    s_or_b32 s61, s8, s9
; VI-NEXT:    s_or_b32 s62, s6, s7
; VI-NEXT:    s_or_b32 s63, s4, s5
; VI-NEXT:    v_mov_b32_e32 v0, s36
; VI-NEXT:    v_mov_b32_e32 v1, s37
; VI-NEXT:    v_mov_b32_e32 v2, s38
; VI-NEXT:    v_mov_b32_e32 v3, s39
; VI-NEXT:    v_mov_b32_e32 v4, s40
; VI-NEXT:    v_mov_b32_e32 v5, s41
; VI-NEXT:    v_mov_b32_e32 v6, s42
; VI-NEXT:    v_mov_b32_e32 v7, s43
; VI-NEXT:    v_mov_b32_e32 v8, s44
; VI-NEXT:    v_mov_b32_e32 v9, s45
; VI-NEXT:    v_mov_b32_e32 v10, s46
; VI-NEXT:    v_mov_b32_e32 v11, s47
; VI-NEXT:    v_mov_b32_e32 v12, s48
; VI-NEXT:    v_mov_b32_e32 v13, s49
; VI-NEXT:    v_mov_b32_e32 v14, s50
; VI-NEXT:    v_mov_b32_e32 v15, s51
; VI-NEXT:    v_mov_b32_e32 v16, s52
; VI-NEXT:    v_mov_b32_e32 v17, s53
; VI-NEXT:    v_mov_b32_e32 v18, s54
; VI-NEXT:    v_mov_b32_e32 v19, s55
; VI-NEXT:    v_mov_b32_e32 v20, s56
; VI-NEXT:    v_mov_b32_e32 v21, s57
; VI-NEXT:    v_mov_b32_e32 v22, s58
; VI-NEXT:    v_mov_b32_e32 v23, s59
; VI-NEXT:    v_mov_b32_e32 v24, s60
; VI-NEXT:    v_mov_b32_e32 v25, s61
; VI-NEXT:    v_mov_b32_e32 v26, s62
; VI-NEXT:    v_mov_b32_e32 v27, s63
; VI-NEXT:    v_mov_b32_e32 v28, s64
; VI-NEXT:    v_mov_b32_e32 v29, s65
; VI-NEXT:    v_mov_b32_e32 v30, s66
; VI-NEXT:    v_mov_b32_e32 v31, s67
; VI-NEXT:    s_branch .LBB35_3
; VI-NEXT:  .LBB35_2: ; %cmp.true
; VI-NEXT:    v_mov_b32_e32 v27, 0x200
; VI-NEXT:    v_mov_b32_e32 v0, vcc_hi
; VI-NEXT:    v_mov_b32_e32 v2, vcc_lo
; VI-NEXT:    v_add_f16_sdwa v0, v0, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v1, s16, v27
; VI-NEXT:    v_add_f16_sdwa v2, v2, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v3, s17, v27
; VI-NEXT:    v_or_b32_e32 v0, v1, v0
; VI-NEXT:    v_or_b32_e32 v1, v3, v2
; VI-NEXT:    v_mov_b32_e32 v2, s91
; VI-NEXT:    v_add_f16_sdwa v2, v2, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v3, s18, v27
; VI-NEXT:    v_or_b32_e32 v2, v3, v2
; VI-NEXT:    v_mov_b32_e32 v3, s90
; VI-NEXT:    v_add_f16_sdwa v3, v3, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v4, s19, v27
; VI-NEXT:    v_or_b32_e32 v3, v4, v3
; VI-NEXT:    v_mov_b32_e32 v4, s40
; VI-NEXT:    v_add_f16_sdwa v4, v4, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v5, s20, v27
; VI-NEXT:    v_or_b32_e32 v4, v5, v4
; VI-NEXT:    v_mov_b32_e32 v5, s41
; VI-NEXT:    v_add_f16_sdwa v5, v5, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v6, s21, v27
; VI-NEXT:    v_or_b32_e32 v5, v6, v5
; VI-NEXT:    v_mov_b32_e32 v6, s42
; VI-NEXT:    v_add_f16_sdwa v6, v6, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v7, s22, v27
; VI-NEXT:    v_or_b32_e32 v6, v7, v6
; VI-NEXT:    v_mov_b32_e32 v7, s43
; VI-NEXT:    v_add_f16_sdwa v7, v7, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v8, s23, v27
; VI-NEXT:    v_or_b32_e32 v7, v8, v7
; VI-NEXT:    v_mov_b32_e32 v8, s44
; VI-NEXT:    v_add_f16_sdwa v8, v8, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v9, s24, v27
; VI-NEXT:    v_or_b32_e32 v8, v9, v8
; VI-NEXT:    v_mov_b32_e32 v9, s45
; VI-NEXT:    v_add_f16_sdwa v9, v9, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v10, s25, v27
; VI-NEXT:    v_or_b32_e32 v9, v10, v9
; VI-NEXT:    v_mov_b32_e32 v10, s46
; VI-NEXT:    v_add_f16_sdwa v10, v10, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v11, s26, v27
; VI-NEXT:    v_or_b32_e32 v10, v11, v10
; VI-NEXT:    v_mov_b32_e32 v11, s47
; VI-NEXT:    v_add_f16_sdwa v11, v11, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v12, s27, v27
; VI-NEXT:    v_or_b32_e32 v11, v12, v11
; VI-NEXT:    v_mov_b32_e32 v12, s75
; VI-NEXT:    v_add_f16_sdwa v12, v12, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v13, s28, v27
; VI-NEXT:    v_or_b32_e32 v12, v13, v12
; VI-NEXT:    v_mov_b32_e32 v13, s72
; VI-NEXT:    v_add_f16_sdwa v13, v13, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v14, s29, v27
; VI-NEXT:    v_or_b32_e32 v13, v14, v13
; VI-NEXT:    v_mov_b32_e32 v14, s89
; VI-NEXT:    v_add_f16_sdwa v14, v14, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v15, s88, v27
; VI-NEXT:    v_or_b32_e32 v14, v15, v14
; VI-NEXT:    v_mov_b32_e32 v15, s79
; VI-NEXT:    v_add_f16_sdwa v15, v15, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v16, s78, v27
; VI-NEXT:    v_or_b32_e32 v15, v16, v15
; VI-NEXT:    v_mov_b32_e32 v16, s77
; VI-NEXT:    v_add_f16_sdwa v16, v16, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v17, s76, v27
; VI-NEXT:    v_or_b32_e32 v16, v17, v16
; VI-NEXT:    v_mov_b32_e32 v17, s74
; VI-NEXT:    v_add_f16_sdwa v17, v17, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v18, s73, v27
; VI-NEXT:    v_or_b32_e32 v17, v18, v17
; VI-NEXT:    v_mov_b32_e32 v18, s63
; VI-NEXT:    v_add_f16_sdwa v18, v18, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v19, s62, v27
; VI-NEXT:    v_or_b32_e32 v18, v19, v18
; VI-NEXT:    v_mov_b32_e32 v19, s61
; VI-NEXT:    v_add_f16_sdwa v19, v19, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v20, s60, v27
; VI-NEXT:    v_or_b32_e32 v19, v20, v19
; VI-NEXT:    v_mov_b32_e32 v20, s59
; VI-NEXT:    v_add_f16_sdwa v20, v20, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v21, s56, v27
; VI-NEXT:    v_or_b32_e32 v20, v21, v20
; VI-NEXT:    v_mov_b32_e32 v21, s58
; VI-NEXT:    v_add_f16_sdwa v21, v21, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v22, s57, v27
; VI-NEXT:    v_or_b32_e32 v21, v22, v21
; VI-NEXT:    v_mov_b32_e32 v22, s15
; VI-NEXT:    v_add_f16_sdwa v22, v22, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v23, s14, v27
; VI-NEXT:    v_or_b32_e32 v22, v23, v22
; VI-NEXT:    v_mov_b32_e32 v23, s13
; VI-NEXT:    v_add_f16_sdwa v23, v23, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v24, s12, v27
; VI-NEXT:    v_or_b32_e32 v23, v24, v23
; VI-NEXT:    v_mov_b32_e32 v24, s11
; VI-NEXT:    v_add_f16_sdwa v24, v24, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v25, s10, v27
; VI-NEXT:    v_or_b32_e32 v24, v25, v24
; VI-NEXT:    v_mov_b32_e32 v25, s9
; VI-NEXT:    v_add_f16_sdwa v25, v25, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v26, s8, v27
; VI-NEXT:    v_or_b32_e32 v25, v26, v25
; VI-NEXT:    v_mov_b32_e32 v26, s7
; VI-NEXT:    v_add_f16_sdwa v26, v26, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v28, s6, v27
; VI-NEXT:    v_or_b32_e32 v26, v28, v26
; VI-NEXT:    v_mov_b32_e32 v28, s5
; VI-NEXT:    v_add_f16_sdwa v28, v28, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v27, s4, v27
; VI-NEXT:    v_or_b32_e32 v27, v27, v28
; VI-NEXT:  .LBB35_3: ; %end
; VI-NEXT:    v_readlane_b32 s30, v32, 12
; VI-NEXT:    v_readlane_b32 s31, v32, 13
; VI-NEXT:    v_readlane_b32 s55, v32, 11
; VI-NEXT:    v_readlane_b32 s54, v32, 10
; VI-NEXT:    v_readlane_b32 s53, v32, 9
; VI-NEXT:    v_readlane_b32 s52, v32, 8
; VI-NEXT:    v_readlane_b32 s51, v32, 7
; VI-NEXT:    v_readlane_b32 s50, v32, 6
; VI-NEXT:    v_readlane_b32 s49, v32, 5
; VI-NEXT:    v_readlane_b32 s48, v32, 4
; VI-NEXT:    v_readlane_b32 s39, v32, 3
; VI-NEXT:    v_readlane_b32 s38, v32, 2
; VI-NEXT:    v_readlane_b32 s37, v32, 1
; VI-NEXT:    v_readlane_b32 s36, v32, 0
; VI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v56f16_to_v28f32_scalar:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    s_mov_b64 exec, s[4:5]
; GFX9-NEXT:    v_writelane_b32 v32, s36, 0
; GFX9-NEXT:    v_writelane_b32 v32, s37, 1
; GFX9-NEXT:    v_writelane_b32 v32, s38, 2
; GFX9-NEXT:    v_writelane_b32 v32, s39, 3
; GFX9-NEXT:    v_writelane_b32 v32, s48, 4
; GFX9-NEXT:    v_writelane_b32 v32, s49, 5
; GFX9-NEXT:    v_writelane_b32 v32, s50, 6
; GFX9-NEXT:    v_writelane_b32 v32, s51, 7
; GFX9-NEXT:    v_writelane_b32 v32, s52, 8
; GFX9-NEXT:    v_writelane_b32 v32, s53, 9
; GFX9-NEXT:    v_writelane_b32 v32, s54, 10
; GFX9-NEXT:    v_writelane_b32 v32, s55, 11
; GFX9-NEXT:    v_readfirstlane_b32 s4, v13
; GFX9-NEXT:    v_readfirstlane_b32 s6, v12
; GFX9-NEXT:    v_readfirstlane_b32 s8, v11
; GFX9-NEXT:    v_readfirstlane_b32 s10, v10
; GFX9-NEXT:    v_readfirstlane_b32 s12, v9
; GFX9-NEXT:    v_readfirstlane_b32 s14, v8
; GFX9-NEXT:    v_readfirstlane_b32 s57, v7
; GFX9-NEXT:    v_readfirstlane_b32 s60, v6
; GFX9-NEXT:    v_readfirstlane_b32 s62, v5
; GFX9-NEXT:    v_readfirstlane_b32 s72, v4
; GFX9-NEXT:    v_readfirstlane_b32 s74, v3
; GFX9-NEXT:    v_readfirstlane_b32 s76, v2
; GFX9-NEXT:    v_readfirstlane_b32 s78, v1
; GFX9-NEXT:    v_readfirstlane_b32 s88, v0
; GFX9-NEXT:    s_lshr_b32 s56, s29, 16
; GFX9-NEXT:    s_lshr_b32 s59, s28, 16
; GFX9-NEXT:    s_lshr_b32 s47, s27, 16
; GFX9-NEXT:    s_lshr_b32 s46, s26, 16
; GFX9-NEXT:    s_lshr_b32 s45, s25, 16
; GFX9-NEXT:    s_lshr_b32 s44, s24, 16
; GFX9-NEXT:    s_lshr_b32 s43, s23, 16
; GFX9-NEXT:    s_lshr_b32 s42, s22, 16
; GFX9-NEXT:    s_lshr_b32 s41, s21, 16
; GFX9-NEXT:    s_lshr_b32 s40, s20, 16
; GFX9-NEXT:    s_lshr_b32 s90, s19, 16
; GFX9-NEXT:    s_lshr_b32 s91, s18, 16
; GFX9-NEXT:    s_lshr_b32 s92, s17, 16
; GFX9-NEXT:    s_lshr_b32 s93, s16, 16
; GFX9-NEXT:    s_lshr_b32 s5, s4, 16
; GFX9-NEXT:    s_lshr_b32 s7, s6, 16
; GFX9-NEXT:    s_lshr_b32 s9, s8, 16
; GFX9-NEXT:    s_lshr_b32 s11, s10, 16
; GFX9-NEXT:    s_lshr_b32 s13, s12, 16
; GFX9-NEXT:    s_lshr_b32 s15, s14, 16
; GFX9-NEXT:    s_lshr_b32 s58, s57, 16
; GFX9-NEXT:    s_lshr_b32 s61, s60, 16
; GFX9-NEXT:    s_lshr_b32 s63, s62, 16
; GFX9-NEXT:    s_lshr_b32 s73, s72, 16
; GFX9-NEXT:    s_lshr_b32 s75, s74, 16
; GFX9-NEXT:    s_lshr_b32 s77, s76, 16
; GFX9-NEXT:    s_lshr_b32 s79, s78, 16
; GFX9-NEXT:    s_lshr_b32 s89, s88, 16
; GFX9-NEXT:    v_readfirstlane_b32 s94, v14
; GFX9-NEXT:    s_cmp_lg_u32 s94, 0
; GFX9-NEXT:    s_cbranch_scc0 .LBB35_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    s_pack_ll_b32_b16 s36, s16, s93
; GFX9-NEXT:    s_pack_ll_b32_b16 s37, s17, s92
; GFX9-NEXT:    s_pack_ll_b32_b16 s38, s18, s91
; GFX9-NEXT:    s_pack_ll_b32_b16 s39, s19, s90
; GFX9-NEXT:    s_pack_ll_b32_b16 s40, s20, s40
; GFX9-NEXT:    s_pack_ll_b32_b16 s41, s21, s41
; GFX9-NEXT:    s_pack_ll_b32_b16 s42, s22, s42
; GFX9-NEXT:    s_pack_ll_b32_b16 s43, s23, s43
; GFX9-NEXT:    s_pack_ll_b32_b16 s44, s24, s44
; GFX9-NEXT:    s_pack_ll_b32_b16 s45, s25, s45
; GFX9-NEXT:    s_pack_ll_b32_b16 s46, s26, s46
; GFX9-NEXT:    s_pack_ll_b32_b16 s47, s27, s47
; GFX9-NEXT:    s_pack_ll_b32_b16 s48, s28, s59
; GFX9-NEXT:    s_pack_ll_b32_b16 s49, s29, s56
; GFX9-NEXT:    s_pack_ll_b32_b16 s50, s88, s89
; GFX9-NEXT:    s_pack_ll_b32_b16 s51, s78, s79
; GFX9-NEXT:    s_pack_ll_b32_b16 s52, s76, s77
; GFX9-NEXT:    s_pack_ll_b32_b16 s53, s74, s75
; GFX9-NEXT:    s_pack_ll_b32_b16 s54, s72, s73
; GFX9-NEXT:    s_pack_ll_b32_b16 s55, s62, s63
; GFX9-NEXT:    s_pack_ll_b32_b16 s56, s60, s61
; GFX9-NEXT:    s_pack_ll_b32_b16 s57, s57, s58
; GFX9-NEXT:    s_pack_ll_b32_b16 s58, s14, s15
; GFX9-NEXT:    s_pack_ll_b32_b16 s59, s12, s13
; GFX9-NEXT:    s_pack_ll_b32_b16 s60, s10, s11
; GFX9-NEXT:    s_pack_ll_b32_b16 s61, s8, s9
; GFX9-NEXT:    s_pack_ll_b32_b16 s62, s6, s7
; GFX9-NEXT:    s_pack_ll_b32_b16 s63, s4, s5
; GFX9-NEXT:    v_mov_b32_e32 v0, s36
; GFX9-NEXT:    v_mov_b32_e32 v1, s37
; GFX9-NEXT:    v_mov_b32_e32 v2, s38
; GFX9-NEXT:    v_mov_b32_e32 v3, s39
; GFX9-NEXT:    v_mov_b32_e32 v4, s40
; GFX9-NEXT:    v_mov_b32_e32 v5, s41
; GFX9-NEXT:    v_mov_b32_e32 v6, s42
; GFX9-NEXT:    v_mov_b32_e32 v7, s43
; GFX9-NEXT:    v_mov_b32_e32 v8, s44
; GFX9-NEXT:    v_mov_b32_e32 v9, s45
; GFX9-NEXT:    v_mov_b32_e32 v10, s46
; GFX9-NEXT:    v_mov_b32_e32 v11, s47
; GFX9-NEXT:    v_mov_b32_e32 v12, s48
; GFX9-NEXT:    v_mov_b32_e32 v13, s49
; GFX9-NEXT:    v_mov_b32_e32 v14, s50
; GFX9-NEXT:    v_mov_b32_e32 v15, s51
; GFX9-NEXT:    v_mov_b32_e32 v16, s52
; GFX9-NEXT:    v_mov_b32_e32 v17, s53
; GFX9-NEXT:    v_mov_b32_e32 v18, s54
; GFX9-NEXT:    v_mov_b32_e32 v19, s55
; GFX9-NEXT:    v_mov_b32_e32 v20, s56
; GFX9-NEXT:    v_mov_b32_e32 v21, s57
; GFX9-NEXT:    v_mov_b32_e32 v22, s58
; GFX9-NEXT:    v_mov_b32_e32 v23, s59
; GFX9-NEXT:    v_mov_b32_e32 v24, s60
; GFX9-NEXT:    v_mov_b32_e32 v25, s61
; GFX9-NEXT:    v_mov_b32_e32 v26, s62
; GFX9-NEXT:    v_mov_b32_e32 v27, s63
; GFX9-NEXT:    v_mov_b32_e32 v28, s64
; GFX9-NEXT:    v_mov_b32_e32 v29, s65
; GFX9-NEXT:    v_mov_b32_e32 v30, s66
; GFX9-NEXT:    v_mov_b32_e32 v31, s67
; GFX9-NEXT:    s_branch .LBB35_3
; GFX9-NEXT:  .LBB35_2: ; %cmp.true
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s16, s93
; GFX9-NEXT:    v_mov_b32_e32 v27, 0x200
; GFX9-NEXT:    v_pk_add_f16 v0, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s18, s91
; GFX9-NEXT:    v_pk_add_f16 v2, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s19, s90
; GFX9-NEXT:    v_pk_add_f16 v3, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s20, s40
; GFX9-NEXT:    v_pk_add_f16 v4, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s21, s41
; GFX9-NEXT:    v_pk_add_f16 v5, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s22, s42
; GFX9-NEXT:    v_pk_add_f16 v6, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s23, s43
; GFX9-NEXT:    v_pk_add_f16 v7, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s24, s44
; GFX9-NEXT:    v_pk_add_f16 v8, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s25, s45
; GFX9-NEXT:    v_pk_add_f16 v9, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s26, s46
; GFX9-NEXT:    v_pk_add_f16 v10, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s27, s47
; GFX9-NEXT:    v_pk_add_f16 v11, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s28, s59
; GFX9-NEXT:    v_pk_add_f16 v12, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s29, s56
; GFX9-NEXT:    v_pk_add_f16 v13, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s88, s89
; GFX9-NEXT:    v_pk_add_f16 v14, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s78, s79
; GFX9-NEXT:    v_pk_add_f16 v15, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s76, s77
; GFX9-NEXT:    v_pk_add_f16 v16, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s74, s75
; GFX9-NEXT:    v_pk_add_f16 v17, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s72, s73
; GFX9-NEXT:    v_pk_add_f16 v18, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s62, s63
; GFX9-NEXT:    v_pk_add_f16 v19, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s60, s61
; GFX9-NEXT:    s_pack_ll_b32_b16 s17, s17, s92
; GFX9-NEXT:    v_pk_add_f16 v20, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s57, s58
; GFX9-NEXT:    s_pack_ll_b32_b16 s14, s14, s15
; GFX9-NEXT:    s_pack_ll_b32_b16 s12, s12, s13
; GFX9-NEXT:    s_pack_ll_b32_b16 s10, s10, s11
; GFX9-NEXT:    s_pack_ll_b32_b16 s8, s8, s9
; GFX9-NEXT:    s_pack_ll_b32_b16 s6, s6, s7
; GFX9-NEXT:    s_pack_ll_b32_b16 s4, s4, s5
; GFX9-NEXT:    v_pk_add_f16 v1, s17, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v21, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v22, s14, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v23, s12, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v24, s10, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v25, s8, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v26, s6, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v27, s4, v27 op_sel_hi:[1,0]
; GFX9-NEXT:  .LBB35_3: ; %end
; GFX9-NEXT:    v_readlane_b32 s55, v32, 11
; GFX9-NEXT:    v_readlane_b32 s54, v32, 10
; GFX9-NEXT:    v_readlane_b32 s53, v32, 9
; GFX9-NEXT:    v_readlane_b32 s52, v32, 8
; GFX9-NEXT:    v_readlane_b32 s51, v32, 7
; GFX9-NEXT:    v_readlane_b32 s50, v32, 6
; GFX9-NEXT:    v_readlane_b32 s49, v32, 5
; GFX9-NEXT:    v_readlane_b32 s48, v32, 4
; GFX9-NEXT:    v_readlane_b32 s39, v32, 3
; GFX9-NEXT:    v_readlane_b32 s38, v32, 2
; GFX9-NEXT:    v_readlane_b32 s37, v32, 1
; GFX9-NEXT:    v_readlane_b32 s36, v32, 0
; GFX9-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    s_mov_b64 exec, s[4:5]
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v56f16_to_v28f32_scalar:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_readfirstlane_b32 s40, v9
; GFX11-NEXT:    v_readfirstlane_b32 s42, v8
; GFX11-NEXT:    v_readfirstlane_b32 s43, v7
; GFX11-NEXT:    v_readfirstlane_b32 s46, v6
; GFX11-NEXT:    v_readfirstlane_b32 s57, v5
; GFX11-NEXT:    v_readfirstlane_b32 s59, v4
; GFX11-NEXT:    v_readfirstlane_b32 s62, v3
; GFX11-NEXT:    v_readfirstlane_b32 s63, v2
; GFX11-NEXT:    v_readfirstlane_b32 s73, v1
; GFX11-NEXT:    v_readfirstlane_b32 s75, v0
; GFX11-NEXT:    v_readfirstlane_b32 s90, v10
; GFX11-NEXT:    s_lshr_b32 s88, s1, 16
; GFX11-NEXT:    s_lshr_b32 s89, s0, 16
; GFX11-NEXT:    s_lshr_b32 s44, s29, 16
; GFX11-NEXT:    s_lshr_b32 s47, s28, 16
; GFX11-NEXT:    s_lshr_b32 s15, s27, 16
; GFX11-NEXT:    s_lshr_b32 s14, s26, 16
; GFX11-NEXT:    s_lshr_b32 s13, s25, 16
; GFX11-NEXT:    s_lshr_b32 s12, s24, 16
; GFX11-NEXT:    s_lshr_b32 s11, s23, 16
; GFX11-NEXT:    s_lshr_b32 s10, s22, 16
; GFX11-NEXT:    s_lshr_b32 s9, s21, 16
; GFX11-NEXT:    s_lshr_b32 s8, s20, 16
; GFX11-NEXT:    s_lshr_b32 s7, s19, 16
; GFX11-NEXT:    s_lshr_b32 s6, s18, 16
; GFX11-NEXT:    s_lshr_b32 s5, s17, 16
; GFX11-NEXT:    s_lshr_b32 s4, s16, 16
; GFX11-NEXT:    s_lshr_b32 s78, s3, 16
; GFX11-NEXT:    s_lshr_b32 s79, s2, 16
; GFX11-NEXT:    s_lshr_b32 s41, s40, 16
; GFX11-NEXT:    s_lshr_b32 s45, s42, 16
; GFX11-NEXT:    s_lshr_b32 s56, s43, 16
; GFX11-NEXT:    s_lshr_b32 s58, s46, 16
; GFX11-NEXT:    s_lshr_b32 s60, s57, 16
; GFX11-NEXT:    s_lshr_b32 s61, s59, 16
; GFX11-NEXT:    s_lshr_b32 s72, s62, 16
; GFX11-NEXT:    s_lshr_b32 s74, s63, 16
; GFX11-NEXT:    s_lshr_b32 s76, s73, 16
; GFX11-NEXT:    s_lshr_b32 s77, s75, 16
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s0, s89
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s1, s88
; GFX11-NEXT:    s_cmp_lg_u32 s90, 0
; GFX11-NEXT:    s_cbranch_scc0 .LBB35_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-NEXT:    s_pack_ll_b32_b16 s2, s2, s79
; GFX11-NEXT:    s_pack_ll_b32_b16 s3, s3, s78
; GFX11-NEXT:    s_pack_ll_b32_b16 s4, s16, s4
; GFX11-NEXT:    s_pack_ll_b32_b16 s5, s17, s5
; GFX11-NEXT:    s_pack_ll_b32_b16 s6, s18, s6
; GFX11-NEXT:    s_pack_ll_b32_b16 s7, s19, s7
; GFX11-NEXT:    s_pack_ll_b32_b16 s8, s20, s8
; GFX11-NEXT:    s_pack_ll_b32_b16 s9, s21, s9
; GFX11-NEXT:    s_pack_ll_b32_b16 s10, s22, s10
; GFX11-NEXT:    s_pack_ll_b32_b16 s11, s23, s11
; GFX11-NEXT:    s_pack_ll_b32_b16 s12, s24, s12
; GFX11-NEXT:    s_pack_ll_b32_b16 s13, s25, s13
; GFX11-NEXT:    s_pack_ll_b32_b16 s14, s26, s14
; GFX11-NEXT:    s_pack_ll_b32_b16 s15, s27, s15
; GFX11-NEXT:    s_pack_ll_b32_b16 s16, s28, s47
; GFX11-NEXT:    s_pack_ll_b32_b16 s17, s29, s44
; GFX11-NEXT:    s_pack_ll_b32_b16 s18, s75, s77
; GFX11-NEXT:    s_pack_ll_b32_b16 s19, s73, s76
; GFX11-NEXT:    s_pack_ll_b32_b16 s20, s63, s74
; GFX11-NEXT:    s_pack_ll_b32_b16 s21, s62, s72
; GFX11-NEXT:    s_pack_ll_b32_b16 s22, s59, s61
; GFX11-NEXT:    s_pack_ll_b32_b16 s23, s57, s60
; GFX11-NEXT:    s_pack_ll_b32_b16 s24, s46, s58
; GFX11-NEXT:    s_pack_ll_b32_b16 s25, s43, s56
; GFX11-NEXT:    s_pack_ll_b32_b16 s26, s42, s45
; GFX11-NEXT:    s_pack_ll_b32_b16 s27, s40, s41
; GFX11-NEXT:    v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX11-NEXT:    v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; GFX11-NEXT:    v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
; GFX11-NEXT:    v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
; GFX11-NEXT:    v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
; GFX11-NEXT:    v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
; GFX11-NEXT:    v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
; GFX11-NEXT:    v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
; GFX11-NEXT:    v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
; GFX11-NEXT:    v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
; GFX11-NEXT:    v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
; GFX11-NEXT:    v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
; GFX11-NEXT:    v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
; GFX11-NEXT:    v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
; GFX11-NEXT:    v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
; GFX11-NEXT:    v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
; GFX11-NEXT:    s_setpc_b64 s[30:31]
; GFX11-NEXT:  .LBB35_2: ; %cmp.true
; GFX11-NEXT:    v_pk_add_f16 v0, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v1, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s2, s79
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s3, s78
; GFX11-NEXT:    v_pk_add_f16 v2, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v3, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s16, s4
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s17, s5
; GFX11-NEXT:    v_pk_add_f16 v4, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v5, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s18, s6
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s19, s7
; GFX11-NEXT:    v_pk_add_f16 v6, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v7, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s20, s8
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s21, s9
; GFX11-NEXT:    v_pk_add_f16 v8, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v9, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s22, s10
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s23, s11
; GFX11-NEXT:    v_pk_add_f16 v10, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v11, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s24, s12
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s25, s13
; GFX11-NEXT:    v_pk_add_f16 v12, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v13, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s26, s14
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s27, s15
; GFX11-NEXT:    v_pk_add_f16 v14, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v15, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s28, s47
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s29, s44
; GFX11-NEXT:    v_pk_add_f16 v16, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v17, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s75, s77
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s73, s76
; GFX11-NEXT:    v_pk_add_f16 v18, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v19, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s63, s74
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s62, s72
; GFX11-NEXT:    v_pk_add_f16 v20, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v21, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s59, s61
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s57, s60
; GFX11-NEXT:    v_pk_add_f16 v22, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v23, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s46, s58
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s43, s56
; GFX11-NEXT:    v_pk_add_f16 v24, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v25, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s42, s45
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s40, s41
; GFX11-NEXT:    v_pk_add_f16 v26, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v27, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = fadd <56 x half> %a, splat (half 0xH0200)
  %a2 = bitcast <56 x half> %a1 to <28 x float>
  br label %end

cmp.false:
  %a3 = bitcast <56 x half> %a to <28 x float>
  br label %end

end:
  %phi = phi <28 x float> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <28 x float> %phi
}

define <14 x double> @bitcast_v14i64_to_v14f64(<14 x i64> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v14i64_to_v14f64:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB36_2
; SI-NEXT:  ; %bb.1: ; %cmp.true
; SI-NEXT:    v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; SI-NEXT:    v_add_i32_e32 v2, vcc, 3, v2
; SI-NEXT:    v_addc_u32_e32 v3, vcc, 0, v3, vcc
; SI-NEXT:    v_add_i32_e32 v4, vcc, 3, v4
; SI-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
; SI-NEXT:    v_add_i32_e32 v6, vcc, 3, v6
; SI-NEXT:    v_addc_u32_e32 v7, vcc, 0, v7, vcc
; SI-NEXT:    v_add_i32_e32 v8, vcc, 3, v8
; SI-NEXT:    v_addc_u32_e32 v9, vcc, 0, v9, vcc
; SI-NEXT:    v_add_i32_e32 v10, vcc, 3, v10
; SI-NEXT:    v_addc_u32_e32 v11, vcc, 0, v11, vcc
; SI-NEXT:    v_add_i32_e32 v12, vcc, 3, v12
; SI-NEXT:    v_addc_u32_e32 v13, vcc, 0, v13, vcc
; SI-NEXT:    v_add_i32_e32 v14, vcc, 3, v14
; SI-NEXT:    v_addc_u32_e32 v15, vcc, 0, v15, vcc
; SI-NEXT:    v_add_i32_e32 v16, vcc, 3, v16
; SI-NEXT:    v_addc_u32_e32 v17, vcc, 0, v17, vcc
; SI-NEXT:    v_add_i32_e32 v18, vcc, 3, v18
; SI-NEXT:    v_addc_u32_e32 v19, vcc, 0, v19, vcc
; SI-NEXT:    v_add_i32_e32 v20, vcc, 3, v20
; SI-NEXT:    v_addc_u32_e32 v21, vcc, 0, v21, vcc
; SI-NEXT:    v_add_i32_e32 v22, vcc, 3, v22
; SI-NEXT:    v_addc_u32_e32 v23, vcc, 0, v23, vcc
; SI-NEXT:    v_add_i32_e32 v24, vcc, 3, v24
; SI-NEXT:    v_addc_u32_e32 v25, vcc, 0, v25, vcc
; SI-NEXT:    v_add_i32_e32 v26, vcc, 3, v26
; SI-NEXT:    v_addc_u32_e32 v27, vcc, 0, v27, vcc
; SI-NEXT:  .LBB36_2: ; %end
; SI-NEXT:    s_or_b64 exec, exec, s[4:5]
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v14i64_to_v14f64:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB36_2
; VI-NEXT:  ; %bb.1: ; %cmp.true
; VI-NEXT:    v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT:    v_add_u32_e32 v2, vcc, 3, v2
; VI-NEXT:    v_addc_u32_e32 v3, vcc, 0, v3, vcc
; VI-NEXT:    v_add_u32_e32 v4, vcc, 3, v4
; VI-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
; VI-NEXT:    v_add_u32_e32 v6, vcc, 3, v6
; VI-NEXT:    v_addc_u32_e32 v7, vcc, 0, v7, vcc
; VI-NEXT:    v_add_u32_e32 v8, vcc, 3, v8
; VI-NEXT:    v_addc_u32_e32 v9, vcc, 0, v9, vcc
; VI-NEXT:    v_add_u32_e32 v10, vcc, 3, v10
; VI-NEXT:    v_addc_u32_e32 v11, vcc, 0, v11, vcc
; VI-NEXT:    v_add_u32_e32 v12, vcc, 3, v12
; VI-NEXT:    v_addc_u32_e32 v13, vcc, 0, v13, vcc
; VI-NEXT:    v_add_u32_e32 v14, vcc, 3, v14
; VI-NEXT:    v_addc_u32_e32 v15, vcc, 0, v15, vcc
; VI-NEXT:    v_add_u32_e32 v16, vcc, 3, v16
; VI-NEXT:    v_addc_u32_e32 v17, vcc, 0, v17, vcc
; VI-NEXT:    v_add_u32_e32 v18, vcc, 3, v18
; VI-NEXT:    v_addc_u32_e32 v19, vcc, 0, v19, vcc
; VI-NEXT:    v_add_u32_e32 v20, vcc, 3, v20
; VI-NEXT:    v_addc_u32_e32 v21, vcc, 0, v21, vcc
; VI-NEXT:    v_add_u32_e32 v22, vcc, 3, v22
; VI-NEXT:    v_addc_u32_e32 v23, vcc, 0, v23, vcc
; VI-NEXT:    v_add_u32_e32 v24, vcc, 3, v24
; VI-NEXT:    v_addc_u32_e32 v25, vcc, 0, v25, vcc
; VI-NEXT:    v_add_u32_e32 v26, vcc, 3, v26
; VI-NEXT:    v_addc_u32_e32 v27, vcc, 0, v27, vcc
; VI-NEXT:  .LBB36_2: ; %end
; VI-NEXT:    s_or_b64 exec, exec, s[4:5]
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v14i64_to_v14f64:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB36_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.true
; GFX9-NEXT:    v_add_co_u32_e32 v0, vcc, 3, v0
; GFX9-NEXT:    v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v2, vcc, 3, v2
; GFX9-NEXT:    v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v4, vcc, 3, v4
; GFX9-NEXT:    v_addc_co_u32_e32 v5, vcc, 0, v5, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v6, vcc, 3, v6
; GFX9-NEXT:    v_addc_co_u32_e32 v7, vcc, 0, v7, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v8, vcc, 3, v8
; GFX9-NEXT:    v_addc_co_u32_e32 v9, vcc, 0, v9, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v10, vcc, 3, v10
; GFX9-NEXT:    v_addc_co_u32_e32 v11, vcc, 0, v11, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v12, vcc, 3, v12
; GFX9-NEXT:    v_addc_co_u32_e32 v13, vcc, 0, v13, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v14, vcc, 3, v14
; GFX9-NEXT:    v_addc_co_u32_e32 v15, vcc, 0, v15, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v16, vcc, 3, v16
; GFX9-NEXT:    v_addc_co_u32_e32 v17, vcc, 0, v17, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v18, vcc, 3, v18
; GFX9-NEXT:    v_addc_co_u32_e32 v19, vcc, 0, v19, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v20, vcc, 3, v20
; GFX9-NEXT:    v_addc_co_u32_e32 v21, vcc, 0, v21, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v22, vcc, 3, v22
; GFX9-NEXT:    v_addc_co_u32_e32 v23, vcc, 0, v23, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v24, vcc, 3, v24
; GFX9-NEXT:    v_addc_co_u32_e32 v25, vcc, 0, v25, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v26, vcc, 3, v26
; GFX9-NEXT:    v_addc_co_u32_e32 v27, vcc, 0, v27, vcc
; GFX9-NEXT:  .LBB36_2: ; %end
; GFX9-NEXT:    s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v14i64_to_v14f64:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-NEXT:    s_cbranch_execz .LBB36_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-NEXT:    v_add_co_u32 v0, vcc_lo, v0, 3
; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-NEXT:    v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v2, vcc_lo, v2, 3
; GFX11-NEXT:    v_add_co_ci_u32_e64 v3, null, 0, v3, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v4, vcc_lo, v4, 3
; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-NEXT:    v_add_co_ci_u32_e64 v5, null, 0, v5, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v6, vcc_lo, v6, 3
; GFX11-NEXT:    v_add_co_ci_u32_e64 v7, null, 0, v7, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v8, vcc_lo, v8, 3
; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-NEXT:    v_add_co_ci_u32_e64 v9, null, 0, v9, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v10, vcc_lo, v10, 3
; GFX11-NEXT:    v_add_co_ci_u32_e64 v11, null, 0, v11, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v12, vcc_lo, v12, 3
; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-NEXT:    v_add_co_ci_u32_e64 v13, null, 0, v13, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v14, vcc_lo, v14, 3
; GFX11-NEXT:    v_add_co_ci_u32_e64 v15, null, 0, v15, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v16, vcc_lo, v16, 3
; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-NEXT:    v_add_co_ci_u32_e64 v17, null, 0, v17, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v18, vcc_lo, v18, 3
; GFX11-NEXT:    v_add_co_ci_u32_e64 v19, null, 0, v19, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v20, vcc_lo, v20, 3
; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-NEXT:    v_add_co_ci_u32_e64 v21, null, 0, v21, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v22, vcc_lo, v22, 3
; GFX11-NEXT:    v_add_co_ci_u32_e64 v23, null, 0, v23, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v24, vcc_lo, v24, 3
; GFX11-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-NEXT:    v_add_co_ci_u32_e64 v25, null, 0, v25, vcc_lo
; GFX11-NEXT:    v_add_co_u32 v26, vcc_lo, v26, 3
; GFX11-NEXT:    v_add_co_ci_u32_e64 v27, null, 0, v27, vcc_lo
; GFX11-NEXT:  .LBB36_2: ; %end
; GFX11-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = add <14 x i64> %a, splat (i64 3)
  %a2 = bitcast <14 x i64> %a1 to <14 x double>
  br label %end

cmp.false:
  %a3 = bitcast <14 x i64> %a to <14 x double>
  br label %end

end:
  %phi = phi <14 x double> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <14 x double> %phi
}

define inreg <14 x double> @bitcast_v14i64_to_v14f64_scalar(<14 x i64> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v14i64_to_v14f64_scalar:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    v_readfirstlane_b32 s41, v14
; SI-NEXT:    v_readfirstlane_b32 s4, v13
; SI-NEXT:    v_readfirstlane_b32 s5, v12
; SI-NEXT:    v_readfirstlane_b32 s6, v11
; SI-NEXT:    v_readfirstlane_b32 s7, v10
; SI-NEXT:    v_readfirstlane_b32 s8, v9
; SI-NEXT:    v_readfirstlane_b32 s9, v8
; SI-NEXT:    v_readfirstlane_b32 s10, v7
; SI-NEXT:    v_readfirstlane_b32 s11, v6
; SI-NEXT:    v_readfirstlane_b32 s12, v5
; SI-NEXT:    v_readfirstlane_b32 s13, v4
; SI-NEXT:    v_readfirstlane_b32 s14, v3
; SI-NEXT:    v_readfirstlane_b32 s15, v2
; SI-NEXT:    v_readfirstlane_b32 s40, v1
; SI-NEXT:    s_cmp_lg_u32 s41, 0
; SI-NEXT:    v_readfirstlane_b32 s41, v0
; SI-NEXT:    s_cbranch_scc1 .LBB37_2
; SI-NEXT:  ; %bb.1: ; %cmp.true
; SI-NEXT:    s_add_u32 s16, s16, 3
; SI-NEXT:    s_addc_u32 s17, s17, 0
; SI-NEXT:    s_add_u32 s18, s18, 3
; SI-NEXT:    s_addc_u32 s19, s19, 0
; SI-NEXT:    s_add_u32 s20, s20, 3
; SI-NEXT:    s_addc_u32 s21, s21, 0
; SI-NEXT:    s_add_u32 s22, s22, 3
; SI-NEXT:    s_addc_u32 s23, s23, 0
; SI-NEXT:    s_add_u32 s24, s24, 3
; SI-NEXT:    s_addc_u32 s25, s25, 0
; SI-NEXT:    s_add_u32 s26, s26, 3
; SI-NEXT:    s_addc_u32 s27, s27, 0
; SI-NEXT:    s_add_u32 s28, s28, 3
; SI-NEXT:    s_addc_u32 s29, s29, 0
; SI-NEXT:    s_add_u32 s41, s41, 3
; SI-NEXT:    s_addc_u32 s40, s40, 0
; SI-NEXT:    s_add_u32 s15, s15, 3
; SI-NEXT:    s_addc_u32 s14, s14, 0
; SI-NEXT:    s_add_u32 s13, s13, 3
; SI-NEXT:    s_addc_u32 s12, s12, 0
; SI-NEXT:    s_add_u32 s11, s11, 3
; SI-NEXT:    s_addc_u32 s10, s10, 0
; SI-NEXT:    s_add_u32 s9, s9, 3
; SI-NEXT:    s_addc_u32 s8, s8, 0
; SI-NEXT:    s_add_u32 s7, s7, 3
; SI-NEXT:    s_addc_u32 s6, s6, 0
; SI-NEXT:    s_add_u32 s5, s5, 3
; SI-NEXT:    s_addc_u32 s4, s4, 0
; SI-NEXT:  .LBB37_2: ; %end
; SI-NEXT:    v_mov_b32_e32 v0, s16
; SI-NEXT:    v_mov_b32_e32 v1, s17
; SI-NEXT:    v_mov_b32_e32 v2, s18
; SI-NEXT:    v_mov_b32_e32 v3, s19
; SI-NEXT:    v_mov_b32_e32 v4, s20
; SI-NEXT:    v_mov_b32_e32 v5, s21
; SI-NEXT:    v_mov_b32_e32 v6, s22
; SI-NEXT:    v_mov_b32_e32 v7, s23
; SI-NEXT:    v_mov_b32_e32 v8, s24
; SI-NEXT:    v_mov_b32_e32 v9, s25
; SI-NEXT:    v_mov_b32_e32 v10, s26
; SI-NEXT:    v_mov_b32_e32 v11, s27
; SI-NEXT:    v_mov_b32_e32 v12, s28
; SI-NEXT:    v_mov_b32_e32 v13, s29
; SI-NEXT:    v_mov_b32_e32 v14, s41
; SI-NEXT:    v_mov_b32_e32 v15, s40
; SI-NEXT:    v_mov_b32_e32 v16, s15
; SI-NEXT:    v_mov_b32_e32 v17, s14
; SI-NEXT:    v_mov_b32_e32 v18, s13
; SI-NEXT:    v_mov_b32_e32 v19, s12
; SI-NEXT:    v_mov_b32_e32 v20, s11
; SI-NEXT:    v_mov_b32_e32 v21, s10
; SI-NEXT:    v_mov_b32_e32 v22, s9
; SI-NEXT:    v_mov_b32_e32 v23, s8
; SI-NEXT:    v_mov_b32_e32 v24, s7
; SI-NEXT:    v_mov_b32_e32 v25, s6
; SI-NEXT:    v_mov_b32_e32 v26, s5
; SI-NEXT:    v_mov_b32_e32 v27, s4
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v14i64_to_v14f64_scalar:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    v_readfirstlane_b32 s41, v14
; VI-NEXT:    v_readfirstlane_b32 s4, v13
; VI-NEXT:    v_readfirstlane_b32 s5, v12
; VI-NEXT:    v_readfirstlane_b32 s6, v11
; VI-NEXT:    v_readfirstlane_b32 s7, v10
; VI-NEXT:    v_readfirstlane_b32 s8, v9
; VI-NEXT:    v_readfirstlane_b32 s9, v8
; VI-NEXT:    v_readfirstlane_b32 s10, v7
; VI-NEXT:    v_readfirstlane_b32 s11, v6
; VI-NEXT:    v_readfirstlane_b32 s12, v5
; VI-NEXT:    v_readfirstlane_b32 s13, v4
; VI-NEXT:    v_readfirstlane_b32 s14, v3
; VI-NEXT:    v_readfirstlane_b32 s15, v2
; VI-NEXT:    v_readfirstlane_b32 s40, v1
; VI-NEXT:    s_cmp_lg_u32 s41, 0
; VI-NEXT:    v_readfirstlane_b32 s41, v0
; VI-NEXT:    s_cbranch_scc1 .LBB37_2
; VI-NEXT:  ; %bb.1: ; %cmp.true
; VI-NEXT:    s_add_u32 s16, s16, 3
; VI-NEXT:    s_addc_u32 s17, s17, 0
; VI-NEXT:    s_add_u32 s18, s18, 3
; VI-NEXT:    s_addc_u32 s19, s19, 0
; VI-NEXT:    s_add_u32 s20, s20, 3
; VI-NEXT:    s_addc_u32 s21, s21, 0
; VI-NEXT:    s_add_u32 s22, s22, 3
; VI-NEXT:    s_addc_u32 s23, s23, 0
; VI-NEXT:    s_add_u32 s24, s24, 3
; VI-NEXT:    s_addc_u32 s25, s25, 0
; VI-NEXT:    s_add_u32 s26, s26, 3
; VI-NEXT:    s_addc_u32 s27, s27, 0
; VI-NEXT:    s_add_u32 s28, s28, 3
; VI-NEXT:    s_addc_u32 s29, s29, 0
; VI-NEXT:    s_add_u32 s41, s41, 3
; VI-NEXT:    s_addc_u32 s40, s40, 0
; VI-NEXT:    s_add_u32 s15, s15, 3
; VI-NEXT:    s_addc_u32 s14, s14, 0
; VI-NEXT:    s_add_u32 s13, s13, 3
; VI-NEXT:    s_addc_u32 s12, s12, 0
; VI-NEXT:    s_add_u32 s11, s11, 3
; VI-NEXT:    s_addc_u32 s10, s10, 0
; VI-NEXT:    s_add_u32 s9, s9, 3
; VI-NEXT:    s_addc_u32 s8, s8, 0
; VI-NEXT:    s_add_u32 s7, s7, 3
; VI-NEXT:    s_addc_u32 s6, s6, 0
; VI-NEXT:    s_add_u32 s5, s5, 3
; VI-NEXT:    s_addc_u32 s4, s4, 0
; VI-NEXT:  .LBB37_2: ; %end
; VI-NEXT:    v_mov_b32_e32 v0, s16
; VI-NEXT:    v_mov_b32_e32 v1, s17
; VI-NEXT:    v_mov_b32_e32 v2, s18
; VI-NEXT:    v_mov_b32_e32 v3, s19
; VI-NEXT:    v_mov_b32_e32 v4, s20
; VI-NEXT:    v_mov_b32_e32 v5, s21
; VI-NEXT:    v_mov_b32_e32 v6, s22
; VI-NEXT:    v_mov_b32_e32 v7, s23
; VI-NEXT:    v_mov_b32_e32 v8, s24
; VI-NEXT:    v_mov_b32_e32 v9, s25
; VI-NEXT:    v_mov_b32_e32 v10, s26
; VI-NEXT:    v_mov_b32_e32 v11, s27
; VI-NEXT:    v_mov_b32_e32 v12, s28
; VI-NEXT:    v_mov_b32_e32 v13, s29
; VI-NEXT:    v_mov_b32_e32 v14, s41
; VI-NEXT:    v_mov_b32_e32 v15, s40
; VI-NEXT:    v_mov_b32_e32 v16, s15
; VI-NEXT:    v_mov_b32_e32 v17, s14
; VI-NEXT:    v_mov_b32_e32 v18, s13
; VI-NEXT:    v_mov_b32_e32 v19, s12
; VI-NEXT:    v_mov_b32_e32 v20, s11
; VI-NEXT:    v_mov_b32_e32 v21, s10
; VI-NEXT:    v_mov_b32_e32 v22, s9
; VI-NEXT:    v_mov_b32_e32 v23, s8
; VI-NEXT:    v_mov_b32_e32 v24, s7
; VI-NEXT:    v_mov_b32_e32 v25, s6
; VI-NEXT:    v_mov_b32_e32 v26, s5
; VI-NEXT:    v_mov_b32_e32 v27, s4
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v14i64_to_v14f64_scalar:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_readfirstlane_b32 s41, v14
; GFX9-NEXT:    v_readfirstlane_b32 s4, v13
; GFX9-NEXT:    v_readfirstlane_b32 s5, v12
; GFX9-NEXT:    v_readfirstlane_b32 s6, v11
; GFX9-NEXT:    v_readfirstlane_b32 s7, v10
; GFX9-NEXT:    v_readfirstlane_b32 s8, v9
; GFX9-NEXT:    v_readfirstlane_b32 s9, v8
; GFX9-NEXT:    v_readfirstlane_b32 s10, v7
; GFX9-NEXT:    v_readfirstlane_b32 s11, v6
; GFX9-NEXT:    v_readfirstlane_b32 s12, v5
; GFX9-NEXT:    v_readfirstlane_b32 s13, v4
; GFX9-NEXT:    v_readfirstlane_b32 s14, v3
; GFX9-NEXT:    v_readfirstlane_b32 s15, v2
; GFX9-NEXT:    v_readfirstlane_b32 s40, v1
; GFX9-NEXT:    s_cmp_lg_u32 s41, 0
; GFX9-NEXT:    v_readfirstlane_b32 s41, v0
; GFX9-NEXT:    s_cbranch_scc1 .LBB37_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.true
; GFX9-NEXT:    s_add_u32 s16, s16, 3
; GFX9-NEXT:    s_addc_u32 s17, s17, 0
; GFX9-NEXT:    s_add_u32 s18, s18, 3
; GFX9-NEXT:    s_addc_u32 s19, s19, 0
; GFX9-NEXT:    s_add_u32 s20, s20, 3
; GFX9-NEXT:    s_addc_u32 s21, s21, 0
; GFX9-NEXT:    s_add_u32 s22, s22, 3
; GFX9-NEXT:    s_addc_u32 s23, s23, 0
; GFX9-NEXT:    s_add_u32 s24, s24, 3
; GFX9-NEXT:    s_addc_u32 s25, s25, 0
; GFX9-NEXT:    s_add_u32 s26, s26, 3
; GFX9-NEXT:    s_addc_u32 s27, s27, 0
; GFX9-NEXT:    s_add_u32 s28, s28, 3
; GFX9-NEXT:    s_addc_u32 s29, s29, 0
; GFX9-NEXT:    s_add_u32 s41, s41, 3
; GFX9-NEXT:    s_addc_u32 s40, s40, 0
; GFX9-NEXT:    s_add_u32 s15, s15, 3
; GFX9-NEXT:    s_addc_u32 s14, s14, 0
; GFX9-NEXT:    s_add_u32 s13, s13, 3
; GFX9-NEXT:    s_addc_u32 s12, s12, 0
; GFX9-NEXT:    s_add_u32 s11, s11, 3
; GFX9-NEXT:    s_addc_u32 s10, s10, 0
; GFX9-NEXT:    s_add_u32 s9, s9, 3
; GFX9-NEXT:    s_addc_u32 s8, s8, 0
; GFX9-NEXT:    s_add_u32 s7, s7, 3
; GFX9-NEXT:    s_addc_u32 s6, s6, 0
; GFX9-NEXT:    s_add_u32 s5, s5, 3
; GFX9-NEXT:    s_addc_u32 s4, s4, 0
; GFX9-NEXT:  .LBB37_2: ; %end
; GFX9-NEXT:    v_mov_b32_e32 v0, s16
; GFX9-NEXT:    v_mov_b32_e32 v1, s17
; GFX9-NEXT:    v_mov_b32_e32 v2, s18
; GFX9-NEXT:    v_mov_b32_e32 v3, s19
; GFX9-NEXT:    v_mov_b32_e32 v4, s20
; GFX9-NEXT:    v_mov_b32_e32 v5, s21
; GFX9-NEXT:    v_mov_b32_e32 v6, s22
; GFX9-NEXT:    v_mov_b32_e32 v7, s23
; GFX9-NEXT:    v_mov_b32_e32 v8, s24
; GFX9-NEXT:    v_mov_b32_e32 v9, s25
; GFX9-NEXT:    v_mov_b32_e32 v10, s26
; GFX9-NEXT:    v_mov_b32_e32 v11, s27
; GFX9-NEXT:    v_mov_b32_e32 v12, s28
; GFX9-NEXT:    v_mov_b32_e32 v13, s29
; GFX9-NEXT:    v_mov_b32_e32 v14, s41
; GFX9-NEXT:    v_mov_b32_e32 v15, s40
; GFX9-NEXT:    v_mov_b32_e32 v16, s15
; GFX9-NEXT:    v_mov_b32_e32 v17, s14
; GFX9-NEXT:    v_mov_b32_e32 v18, s13
; GFX9-NEXT:    v_mov_b32_e32 v19, s12
; GFX9-NEXT:    v_mov_b32_e32 v20, s11
; GFX9-NEXT:    v_mov_b32_e32 v21, s10
; GFX9-NEXT:    v_mov_b32_e32 v22, s9
; GFX9-NEXT:    v_mov_b32_e32 v23, s8
; GFX9-NEXT:    v_mov_b32_e32 v24, s7
; GFX9-NEXT:    v_mov_b32_e32 v25, s6
; GFX9-NEXT:    v_mov_b32_e32 v26, s5
; GFX9-NEXT:    v_mov_b32_e32 v27, s4
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v14i64_to_v14f64_scalar:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_readfirstlane_b32 s14, v10
; GFX11-NEXT:    v_readfirstlane_b32 s4, v9
; GFX11-NEXT:    v_readfirstlane_b32 s5, v8
; GFX11-NEXT:    v_readfirstlane_b32 s6, v7
; GFX11-NEXT:    v_readfirstlane_b32 s7, v6
; GFX11-NEXT:    v_readfirstlane_b32 s8, v5
; GFX11-NEXT:    v_readfirstlane_b32 s9, v4
; GFX11-NEXT:    v_readfirstlane_b32 s10, v3
; GFX11-NEXT:    v_readfirstlane_b32 s11, v2
; GFX11-NEXT:    v_readfirstlane_b32 s12, v1
; GFX11-NEXT:    v_readfirstlane_b32 s13, v0
; GFX11-NEXT:    s_cmp_lg_u32 s14, 0
; GFX11-NEXT:    s_cbranch_scc1 .LBB37_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-NEXT:    s_add_u32 s0, s0, 3
; GFX11-NEXT:    s_addc_u32 s1, s1, 0
; GFX11-NEXT:    s_add_u32 s2, s2, 3
; GFX11-NEXT:    s_addc_u32 s3, s3, 0
; GFX11-NEXT:    s_add_u32 s16, s16, 3
; GFX11-NEXT:    s_addc_u32 s17, s17, 0
; GFX11-NEXT:    s_add_u32 s18, s18, 3
; GFX11-NEXT:    s_addc_u32 s19, s19, 0
; GFX11-NEXT:    s_add_u32 s20, s20, 3
; GFX11-NEXT:    s_addc_u32 s21, s21, 0
; GFX11-NEXT:    s_add_u32 s22, s22, 3
; GFX11-NEXT:    s_addc_u32 s23, s23, 0
; GFX11-NEXT:    s_add_u32 s24, s24, 3
; GFX11-NEXT:    s_addc_u32 s25, s25, 0
; GFX11-NEXT:    s_add_u32 s26, s26, 3
; GFX11-NEXT:    s_addc_u32 s27, s27, 0
; GFX11-NEXT:    s_add_u32 s28, s28, 3
; GFX11-NEXT:    s_addc_u32 s29, s29, 0
; GFX11-NEXT:    s_add_u32 s13, s13, 3
; GFX11-NEXT:    s_addc_u32 s12, s12, 0
; GFX11-NEXT:    s_add_u32 s11, s11, 3
; GFX11-NEXT:    s_addc_u32 s10, s10, 0
; GFX11-NEXT:    s_add_u32 s9, s9, 3
; GFX11-NEXT:    s_addc_u32 s8, s8, 0
; GFX11-NEXT:    s_add_u32 s7, s7, 3
; GFX11-NEXT:    s_addc_u32 s6, s6, 0
; GFX11-NEXT:    s_add_u32 s5, s5, 3
; GFX11-NEXT:    s_addc_u32 s4, s4, 0
; GFX11-NEXT:  .LBB37_2: ; %end
; GFX11-NEXT:    v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX11-NEXT:    v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; GFX11-NEXT:    v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
; GFX11-NEXT:    v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
; GFX11-NEXT:    v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
; GFX11-NEXT:    v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
; GFX11-NEXT:    v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
; GFX11-NEXT:    v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
; GFX11-NEXT:    v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
; GFX11-NEXT:    v_dual_mov_b32 v18, s13 :: v_dual_mov_b32 v19, s12
; GFX11-NEXT:    v_dual_mov_b32 v20, s11 :: v_dual_mov_b32 v21, s10
; GFX11-NEXT:    v_dual_mov_b32 v22, s9 :: v_dual_mov_b32 v23, s8
; GFX11-NEXT:    v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s6
; GFX11-NEXT:    v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s4
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = add <14 x i64> %a, splat (i64 3)
  %a2 = bitcast <14 x i64> %a1 to <14 x double>
  br label %end

cmp.false:
  %a3 = bitcast <14 x i64> %a to <14 x double>
  br label %end

end:
  %phi = phi <14 x double> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <14 x double> %phi
}

define <14 x i64> @bitcast_v14f64_to_v14i64(<14 x double> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v14f64_to_v14i64:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB38_2
; SI-NEXT:  ; %bb.1: ; %cmp.true
; SI-NEXT:    v_add_f64 v[0:1], v[0:1], 1.0
; SI-NEXT:    v_add_f64 v[2:3], v[2:3], 1.0
; SI-NEXT:    v_add_f64 v[4:5], v[4:5], 1.0
; SI-NEXT:    v_add_f64 v[6:7], v[6:7], 1.0
; SI-NEXT:    v_add_f64 v[8:9], v[8:9], 1.0
; SI-NEXT:    v_add_f64 v[10:11], v[10:11], 1.0
; SI-NEXT:    v_add_f64 v[12:13], v[12:13], 1.0
; SI-NEXT:    v_add_f64 v[14:15], v[14:15], 1.0
; SI-NEXT:    v_add_f64 v[16:17], v[16:17], 1.0
; SI-NEXT:    v_add_f64 v[18:19], v[18:19], 1.0
; SI-NEXT:    v_add_f64 v[20:21], v[20:21], 1.0
; SI-NEXT:    v_add_f64 v[22:23], v[22:23], 1.0
; SI-NEXT:    v_add_f64 v[24:25], v[24:25], 1.0
; SI-NEXT:    v_add_f64 v[26:27], v[26:27], 1.0
; SI-NEXT:  .LBB38_2: ; %end
; SI-NEXT:    s_or_b64 exec, exec, s[4:5]
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v14f64_to_v14i64:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB38_2
; VI-NEXT:  ; %bb.1: ; %cmp.true
; VI-NEXT:    v_add_f64 v[0:1], v[0:1], 1.0
; VI-NEXT:    v_add_f64 v[2:3], v[2:3], 1.0
; VI-NEXT:    v_add_f64 v[4:5], v[4:5], 1.0
; VI-NEXT:    v_add_f64 v[6:7], v[6:7], 1.0
; VI-NEXT:    v_add_f64 v[8:9], v[8:9], 1.0
; VI-NEXT:    v_add_f64 v[10:11], v[10:11], 1.0
; VI-NEXT:    v_add_f64 v[12:13], v[12:13], 1.0
; VI-NEXT:    v_add_f64 v[14:15], v[14:15], 1.0
; VI-NEXT:    v_add_f64 v[16:17], v[16:17], 1.0
; VI-NEXT:    v_add_f64 v[18:19], v[18:19], 1.0
; VI-NEXT:    v_add_f64 v[20:21], v[20:21], 1.0
; VI-NEXT:    v_add_f64 v[22:23], v[22:23], 1.0
; VI-NEXT:    v_add_f64 v[24:25], v[24:25], 1.0
; VI-NEXT:    v_add_f64 v[26:27], v[26:27], 1.0
; VI-NEXT:  .LBB38_2: ; %end
; VI-NEXT:    s_or_b64 exec, exec, s[4:5]
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v14f64_to_v14i64:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB38_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.true
; GFX9-NEXT:    v_add_f64 v[0:1], v[0:1], 1.0
; GFX9-NEXT:    v_add_f64 v[2:3], v[2:3], 1.0
; GFX9-NEXT:    v_add_f64 v[4:5], v[4:5], 1.0
; GFX9-NEXT:    v_add_f64 v[6:7], v[6:7], 1.0
; GFX9-NEXT:    v_add_f64 v[8:9], v[8:9], 1.0
; GFX9-NEXT:    v_add_f64 v[10:11], v[10:11], 1.0
; GFX9-NEXT:    v_add_f64 v[12:13], v[12:13], 1.0
; GFX9-NEXT:    v_add_f64 v[14:15], v[14:15], 1.0
; GFX9-NEXT:    v_add_f64 v[16:17], v[16:17], 1.0
; GFX9-NEXT:    v_add_f64 v[18:19], v[18:19], 1.0
; GFX9-NEXT:    v_add_f64 v[20:21], v[20:21], 1.0
; GFX9-NEXT:    v_add_f64 v[22:23], v[22:23], 1.0
; GFX9-NEXT:    v_add_f64 v[24:25], v[24:25], 1.0
; GFX9-NEXT:    v_add_f64 v[26:27], v[26:27], 1.0
; GFX9-NEXT:  .LBB38_2: ; %end
; GFX9-NEXT:    s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v14f64_to_v14i64:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-NEXT:    s_cbranch_execz .LBB38_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-NEXT:    v_add_f64 v[0:1], v[0:1], 1.0
; GFX11-NEXT:    v_add_f64 v[2:3], v[2:3], 1.0
; GFX11-NEXT:    v_add_f64 v[4:5], v[4:5], 1.0
; GFX11-NEXT:    v_add_f64 v[6:7], v[6:7], 1.0
; GFX11-NEXT:    v_add_f64 v[8:9], v[8:9], 1.0
; GFX11-NEXT:    v_add_f64 v[10:11], v[10:11], 1.0
; GFX11-NEXT:    v_add_f64 v[12:13], v[12:13], 1.0
; GFX11-NEXT:    v_add_f64 v[14:15], v[14:15], 1.0
; GFX11-NEXT:    v_add_f64 v[16:17], v[16:17], 1.0
; GFX11-NEXT:    v_add_f64 v[18:19], v[18:19], 1.0
; GFX11-NEXT:    v_add_f64 v[20:21], v[20:21], 1.0
; GFX11-NEXT:    v_add_f64 v[22:23], v[22:23], 1.0
; GFX11-NEXT:    v_add_f64 v[24:25], v[24:25], 1.0
; GFX11-NEXT:    v_add_f64 v[26:27], v[26:27], 1.0
; GFX11-NEXT:  .LBB38_2: ; %end
; GFX11-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = fadd <14 x double> %a, splat (double 1.000000e+00)
  %a2 = bitcast <14 x double> %a1 to <14 x i64>
  br label %end

cmp.false:
  %a3 = bitcast <14 x double> %a to <14 x i64>
  br label %end

end:
  %phi = phi <14 x i64> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <14 x i64> %phi
}

define inreg <14 x i64> @bitcast_v14f64_to_v14i64_scalar(<14 x double> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v14f64_to_v14i64_scalar:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_writelane_b32 v32, s36, 0
; SI-NEXT:    v_writelane_b32 v32, s37, 1
; SI-NEXT:    v_writelane_b32 v32, s38, 2
; SI-NEXT:    v_writelane_b32 v32, s39, 3
; SI-NEXT:    v_writelane_b32 v32, s48, 4
; SI-NEXT:    v_writelane_b32 v32, s49, 5
; SI-NEXT:    v_writelane_b32 v32, s50, 6
; SI-NEXT:    v_writelane_b32 v32, s51, 7
; SI-NEXT:    v_writelane_b32 v32, s52, 8
; SI-NEXT:    v_writelane_b32 v32, s53, 9
; SI-NEXT:    v_writelane_b32 v32, s54, 10
; SI-NEXT:    v_writelane_b32 v32, s55, 11
; SI-NEXT:    v_readfirstlane_b32 s4, v14
; SI-NEXT:    s_mov_b32 s49, s29
; SI-NEXT:    s_mov_b32 s48, s28
; SI-NEXT:    s_mov_b32 s47, s27
; SI-NEXT:    s_mov_b32 s46, s26
; SI-NEXT:    s_mov_b32 s45, s25
; SI-NEXT:    s_mov_b32 s44, s24
; SI-NEXT:    s_mov_b32 s43, s23
; SI-NEXT:    s_mov_b32 s42, s22
; SI-NEXT:    s_mov_b32 s41, s21
; SI-NEXT:    s_mov_b32 s40, s20
; SI-NEXT:    s_mov_b32 s39, s19
; SI-NEXT:    s_mov_b32 s38, s18
; SI-NEXT:    s_mov_b32 s37, s17
; SI-NEXT:    s_mov_b32 s36, s16
; SI-NEXT:    v_readfirstlane_b32 s63, v13
; SI-NEXT:    v_readfirstlane_b32 s62, v12
; SI-NEXT:    v_readfirstlane_b32 s61, v11
; SI-NEXT:    v_readfirstlane_b32 s60, v10
; SI-NEXT:    v_readfirstlane_b32 s59, v9
; SI-NEXT:    v_readfirstlane_b32 s58, v8
; SI-NEXT:    v_readfirstlane_b32 s57, v7
; SI-NEXT:    v_readfirstlane_b32 s56, v6
; SI-NEXT:    v_readfirstlane_b32 s55, v5
; SI-NEXT:    v_readfirstlane_b32 s54, v4
; SI-NEXT:    v_readfirstlane_b32 s53, v3
; SI-NEXT:    v_readfirstlane_b32 s52, v2
; SI-NEXT:    v_readfirstlane_b32 s51, v1
; SI-NEXT:    s_cmp_lg_u32 s4, 0
; SI-NEXT:    v_readfirstlane_b32 s50, v0
; SI-NEXT:    s_cbranch_scc0 .LBB39_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    v_mov_b32_e32 v0, s36
; SI-NEXT:    v_mov_b32_e32 v1, s37
; SI-NEXT:    v_mov_b32_e32 v2, s38
; SI-NEXT:    v_mov_b32_e32 v3, s39
; SI-NEXT:    v_mov_b32_e32 v4, s40
; SI-NEXT:    v_mov_b32_e32 v5, s41
; SI-NEXT:    v_mov_b32_e32 v6, s42
; SI-NEXT:    v_mov_b32_e32 v7, s43
; SI-NEXT:    v_mov_b32_e32 v8, s44
; SI-NEXT:    v_mov_b32_e32 v9, s45
; SI-NEXT:    v_mov_b32_e32 v10, s46
; SI-NEXT:    v_mov_b32_e32 v11, s47
; SI-NEXT:    v_mov_b32_e32 v12, s48
; SI-NEXT:    v_mov_b32_e32 v13, s49
; SI-NEXT:    v_mov_b32_e32 v14, s50
; SI-NEXT:    v_mov_b32_e32 v15, s51
; SI-NEXT:    v_mov_b32_e32 v16, s52
; SI-NEXT:    v_mov_b32_e32 v17, s53
; SI-NEXT:    v_mov_b32_e32 v18, s54
; SI-NEXT:    v_mov_b32_e32 v19, s55
; SI-NEXT:    v_mov_b32_e32 v20, s56
; SI-NEXT:    v_mov_b32_e32 v21, s57
; SI-NEXT:    v_mov_b32_e32 v22, s58
; SI-NEXT:    v_mov_b32_e32 v23, s59
; SI-NEXT:    v_mov_b32_e32 v24, s60
; SI-NEXT:    v_mov_b32_e32 v25, s61
; SI-NEXT:    v_mov_b32_e32 v26, s62
; SI-NEXT:    v_mov_b32_e32 v27, s63
; SI-NEXT:    v_mov_b32_e32 v28, s64
; SI-NEXT:    v_mov_b32_e32 v29, s65
; SI-NEXT:    v_mov_b32_e32 v30, s66
; SI-NEXT:    v_mov_b32_e32 v31, s67
; SI-NEXT:    s_branch .LBB39_3
; SI-NEXT:  .LBB39_2: ; %cmp.true
; SI-NEXT:    v_add_f64 v[0:1], s[36:37], 1.0
; SI-NEXT:    v_add_f64 v[2:3], s[38:39], 1.0
; SI-NEXT:    v_add_f64 v[4:5], s[40:41], 1.0
; SI-NEXT:    v_add_f64 v[6:7], s[42:43], 1.0
; SI-NEXT:    v_add_f64 v[8:9], s[44:45], 1.0
; SI-NEXT:    v_add_f64 v[10:11], s[46:47], 1.0
; SI-NEXT:    v_add_f64 v[12:13], s[48:49], 1.0
; SI-NEXT:    v_add_f64 v[14:15], s[50:51], 1.0
; SI-NEXT:    v_add_f64 v[16:17], s[52:53], 1.0
; SI-NEXT:    v_add_f64 v[18:19], s[54:55], 1.0
; SI-NEXT:    v_add_f64 v[20:21], s[56:57], 1.0
; SI-NEXT:    v_add_f64 v[22:23], s[58:59], 1.0
; SI-NEXT:    v_add_f64 v[24:25], s[60:61], 1.0
; SI-NEXT:    v_add_f64 v[26:27], s[62:63], 1.0
; SI-NEXT:  .LBB39_3: ; %end
; SI-NEXT:    v_readlane_b32 s55, v32, 11
; SI-NEXT:    v_readlane_b32 s54, v32, 10
; SI-NEXT:    v_readlane_b32 s53, v32, 9
; SI-NEXT:    v_readlane_b32 s52, v32, 8
; SI-NEXT:    v_readlane_b32 s51, v32, 7
; SI-NEXT:    v_readlane_b32 s50, v32, 6
; SI-NEXT:    v_readlane_b32 s49, v32, 5
; SI-NEXT:    v_readlane_b32 s48, v32, 4
; SI-NEXT:    v_readlane_b32 s39, v32, 3
; SI-NEXT:    v_readlane_b32 s38, v32, 2
; SI-NEXT:    v_readlane_b32 s37, v32, 1
; SI-NEXT:    v_readlane_b32 s36, v32, 0
; SI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v14f64_to_v14i64_scalar:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    v_writelane_b32 v32, s36, 0
; VI-NEXT:    v_writelane_b32 v32, s37, 1
; VI-NEXT:    v_writelane_b32 v32, s38, 2
; VI-NEXT:    v_writelane_b32 v32, s39, 3
; VI-NEXT:    v_writelane_b32 v32, s48, 4
; VI-NEXT:    v_writelane_b32 v32, s49, 5
; VI-NEXT:    v_writelane_b32 v32, s50, 6
; VI-NEXT:    v_writelane_b32 v32, s51, 7
; VI-NEXT:    v_writelane_b32 v32, s52, 8
; VI-NEXT:    v_writelane_b32 v32, s53, 9
; VI-NEXT:    v_writelane_b32 v32, s54, 10
; VI-NEXT:    v_writelane_b32 v32, s55, 11
; VI-NEXT:    v_readfirstlane_b32 s4, v14
; VI-NEXT:    s_mov_b32 s49, s29
; VI-NEXT:    s_mov_b32 s48, s28
; VI-NEXT:    s_mov_b32 s47, s27
; VI-NEXT:    s_mov_b32 s46, s26
; VI-NEXT:    s_mov_b32 s45, s25
; VI-NEXT:    s_mov_b32 s44, s24
; VI-NEXT:    s_mov_b32 s43, s23
; VI-NEXT:    s_mov_b32 s42, s22
; VI-NEXT:    s_mov_b32 s41, s21
; VI-NEXT:    s_mov_b32 s40, s20
; VI-NEXT:    s_mov_b32 s39, s19
; VI-NEXT:    s_mov_b32 s38, s18
; VI-NEXT:    s_mov_b32 s37, s17
; VI-NEXT:    s_mov_b32 s36, s16
; VI-NEXT:    v_readfirstlane_b32 s63, v13
; VI-NEXT:    v_readfirstlane_b32 s62, v12
; VI-NEXT:    v_readfirstlane_b32 s61, v11
; VI-NEXT:    v_readfirstlane_b32 s60, v10
; VI-NEXT:    v_readfirstlane_b32 s59, v9
; VI-NEXT:    v_readfirstlane_b32 s58, v8
; VI-NEXT:    v_readfirstlane_b32 s57, v7
; VI-NEXT:    v_readfirstlane_b32 s56, v6
; VI-NEXT:    v_readfirstlane_b32 s55, v5
; VI-NEXT:    v_readfirstlane_b32 s54, v4
; VI-NEXT:    v_readfirstlane_b32 s53, v3
; VI-NEXT:    v_readfirstlane_b32 s52, v2
; VI-NEXT:    v_readfirstlane_b32 s51, v1
; VI-NEXT:    s_cmp_lg_u32 s4, 0
; VI-NEXT:    v_readfirstlane_b32 s50, v0
; VI-NEXT:    s_cbranch_scc0 .LBB39_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    v_mov_b32_e32 v0, s36
; VI-NEXT:    v_mov_b32_e32 v1, s37
; VI-NEXT:    v_mov_b32_e32 v2, s38
; VI-NEXT:    v_mov_b32_e32 v3, s39
; VI-NEXT:    v_mov_b32_e32 v4, s40
; VI-NEXT:    v_mov_b32_e32 v5, s41
; VI-NEXT:    v_mov_b32_e32 v6, s42
; VI-NEXT:    v_mov_b32_e32 v7, s43
; VI-NEXT:    v_mov_b32_e32 v8, s44
; VI-NEXT:    v_mov_b32_e32 v9, s45
; VI-NEXT:    v_mov_b32_e32 v10, s46
; VI-NEXT:    v_mov_b32_e32 v11, s47
; VI-NEXT:    v_mov_b32_e32 v12, s48
; VI-NEXT:    v_mov_b32_e32 v13, s49
; VI-NEXT:    v_mov_b32_e32 v14, s50
; VI-NEXT:    v_mov_b32_e32 v15, s51
; VI-NEXT:    v_mov_b32_e32 v16, s52
; VI-NEXT:    v_mov_b32_e32 v17, s53
; VI-NEXT:    v_mov_b32_e32 v18, s54
; VI-NEXT:    v_mov_b32_e32 v19, s55
; VI-NEXT:    v_mov_b32_e32 v20, s56
; VI-NEXT:    v_mov_b32_e32 v21, s57
; VI-NEXT:    v_mov_b32_e32 v22, s58
; VI-NEXT:    v_mov_b32_e32 v23, s59
; VI-NEXT:    v_mov_b32_e32 v24, s60
; VI-NEXT:    v_mov_b32_e32 v25, s61
; VI-NEXT:    v_mov_b32_e32 v26, s62
; VI-NEXT:    v_mov_b32_e32 v27, s63
; VI-NEXT:    v_mov_b32_e32 v28, s64
; VI-NEXT:    v_mov_b32_e32 v29, s65
; VI-NEXT:    v_mov_b32_e32 v30, s66
; VI-NEXT:    v_mov_b32_e32 v31, s67
; VI-NEXT:    s_branch .LBB39_3
; VI-NEXT:  .LBB39_2: ; %cmp.true
; VI-NEXT:    v_add_f64 v[0:1], s[36:37], 1.0
; VI-NEXT:    v_add_f64 v[2:3], s[38:39], 1.0
; VI-NEXT:    v_add_f64 v[4:5], s[40:41], 1.0
; VI-NEXT:    v_add_f64 v[6:7], s[42:43], 1.0
; VI-NEXT:    v_add_f64 v[8:9], s[44:45], 1.0
; VI-NEXT:    v_add_f64 v[10:11], s[46:47], 1.0
; VI-NEXT:    v_add_f64 v[12:13], s[48:49], 1.0
; VI-NEXT:    v_add_f64 v[14:15], s[50:51], 1.0
; VI-NEXT:    v_add_f64 v[16:17], s[52:53], 1.0
; VI-NEXT:    v_add_f64 v[18:19], s[54:55], 1.0
; VI-NEXT:    v_add_f64 v[20:21], s[56:57], 1.0
; VI-NEXT:    v_add_f64 v[22:23], s[58:59], 1.0
; VI-NEXT:    v_add_f64 v[24:25], s[60:61], 1.0
; VI-NEXT:    v_add_f64 v[26:27], s[62:63], 1.0
; VI-NEXT:  .LBB39_3: ; %end
; VI-NEXT:    v_readlane_b32 s55, v32, 11
; VI-NEXT:    v_readlane_b32 s54, v32, 10
; VI-NEXT:    v_readlane_b32 s53, v32, 9
; VI-NEXT:    v_readlane_b32 s52, v32, 8
; VI-NEXT:    v_readlane_b32 s51, v32, 7
; VI-NEXT:    v_readlane_b32 s50, v32, 6
; VI-NEXT:    v_readlane_b32 s49, v32, 5
; VI-NEXT:    v_readlane_b32 s48, v32, 4
; VI-NEXT:    v_readlane_b32 s39, v32, 3
; VI-NEXT:    v_readlane_b32 s38, v32, 2
; VI-NEXT:    v_readlane_b32 s37, v32, 1
; VI-NEXT:    v_readlane_b32 s36, v32, 0
; VI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v14f64_to_v14i64_scalar:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    s_mov_b64 exec, s[4:5]
; GFX9-NEXT:    v_writelane_b32 v32, s36, 0
; GFX9-NEXT:    v_writelane_b32 v32, s37, 1
; GFX9-NEXT:    v_writelane_b32 v32, s38, 2
; GFX9-NEXT:    v_writelane_b32 v32, s39, 3
; GFX9-NEXT:    v_writelane_b32 v32, s48, 4
; GFX9-NEXT:    v_writelane_b32 v32, s49, 5
; GFX9-NEXT:    v_writelane_b32 v32, s50, 6
; GFX9-NEXT:    v_writelane_b32 v32, s51, 7
; GFX9-NEXT:    v_writelane_b32 v32, s52, 8
; GFX9-NEXT:    v_writelane_b32 v32, s53, 9
; GFX9-NEXT:    v_writelane_b32 v32, s54, 10
; GFX9-NEXT:    v_writelane_b32 v32, s55, 11
; GFX9-NEXT:    v_readfirstlane_b32 s4, v14
; GFX9-NEXT:    s_mov_b32 s49, s29
; GFX9-NEXT:    s_mov_b32 s48, s28
; GFX9-NEXT:    s_mov_b32 s47, s27
; GFX9-NEXT:    s_mov_b32 s46, s26
; GFX9-NEXT:    s_mov_b32 s45, s25
; GFX9-NEXT:    s_mov_b32 s44, s24
; GFX9-NEXT:    s_mov_b32 s43, s23
; GFX9-NEXT:    s_mov_b32 s42, s22
; GFX9-NEXT:    s_mov_b32 s41, s21
; GFX9-NEXT:    s_mov_b32 s40, s20
; GFX9-NEXT:    s_mov_b32 s39, s19
; GFX9-NEXT:    s_mov_b32 s38, s18
; GFX9-NEXT:    s_mov_b32 s37, s17
; GFX9-NEXT:    s_mov_b32 s36, s16
; GFX9-NEXT:    v_readfirstlane_b32 s63, v13
; GFX9-NEXT:    v_readfirstlane_b32 s62, v12
; GFX9-NEXT:    v_readfirstlane_b32 s61, v11
; GFX9-NEXT:    v_readfirstlane_b32 s60, v10
; GFX9-NEXT:    v_readfirstlane_b32 s59, v9
; GFX9-NEXT:    v_readfirstlane_b32 s58, v8
; GFX9-NEXT:    v_readfirstlane_b32 s57, v7
; GFX9-NEXT:    v_readfirstlane_b32 s56, v6
; GFX9-NEXT:    v_readfirstlane_b32 s55, v5
; GFX9-NEXT:    v_readfirstlane_b32 s54, v4
; GFX9-NEXT:    v_readfirstlane_b32 s53, v3
; GFX9-NEXT:    v_readfirstlane_b32 s52, v2
; GFX9-NEXT:    v_readfirstlane_b32 s51, v1
; GFX9-NEXT:    s_cmp_lg_u32 s4, 0
; GFX9-NEXT:    v_readfirstlane_b32 s50, v0
; GFX9-NEXT:    s_cbranch_scc0 .LBB39_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    v_mov_b32_e32 v0, s36
; GFX9-NEXT:    v_mov_b32_e32 v1, s37
; GFX9-NEXT:    v_mov_b32_e32 v2, s38
; GFX9-NEXT:    v_mov_b32_e32 v3, s39
; GFX9-NEXT:    v_mov_b32_e32 v4, s40
; GFX9-NEXT:    v_mov_b32_e32 v5, s41
; GFX9-NEXT:    v_mov_b32_e32 v6, s42
; GFX9-NEXT:    v_mov_b32_e32 v7, s43
; GFX9-NEXT:    v_mov_b32_e32 v8, s44
; GFX9-NEXT:    v_mov_b32_e32 v9, s45
; GFX9-NEXT:    v_mov_b32_e32 v10, s46
; GFX9-NEXT:    v_mov_b32_e32 v11, s47
; GFX9-NEXT:    v_mov_b32_e32 v12, s48
; GFX9-NEXT:    v_mov_b32_e32 v13, s49
; GFX9-NEXT:    v_mov_b32_e32 v14, s50
; GFX9-NEXT:    v_mov_b32_e32 v15, s51
; GFX9-NEXT:    v_mov_b32_e32 v16, s52
; GFX9-NEXT:    v_mov_b32_e32 v17, s53
; GFX9-NEXT:    v_mov_b32_e32 v18, s54
; GFX9-NEXT:    v_mov_b32_e32 v19, s55
; GFX9-NEXT:    v_mov_b32_e32 v20, s56
; GFX9-NEXT:    v_mov_b32_e32 v21, s57
; GFX9-NEXT:    v_mov_b32_e32 v22, s58
; GFX9-NEXT:    v_mov_b32_e32 v23, s59
; GFX9-NEXT:    v_mov_b32_e32 v24, s60
; GFX9-NEXT:    v_mov_b32_e32 v25, s61
; GFX9-NEXT:    v_mov_b32_e32 v26, s62
; GFX9-NEXT:    v_mov_b32_e32 v27, s63
; GFX9-NEXT:    v_mov_b32_e32 v28, s64
; GFX9-NEXT:    v_mov_b32_e32 v29, s65
; GFX9-NEXT:    v_mov_b32_e32 v30, s66
; GFX9-NEXT:    v_mov_b32_e32 v31, s67
; GFX9-NEXT:    s_branch .LBB39_3
; GFX9-NEXT:  .LBB39_2: ; %cmp.true
; GFX9-NEXT:    v_add_f64 v[0:1], s[36:37], 1.0
; GFX9-NEXT:    v_add_f64 v[2:3], s[38:39], 1.0
; GFX9-NEXT:    v_add_f64 v[4:5], s[40:41], 1.0
; GFX9-NEXT:    v_add_f64 v[6:7], s[42:43], 1.0
; GFX9-NEXT:    v_add_f64 v[8:9], s[44:45], 1.0
; GFX9-NEXT:    v_add_f64 v[10:11], s[46:47], 1.0
; GFX9-NEXT:    v_add_f64 v[12:13], s[48:49], 1.0
; GFX9-NEXT:    v_add_f64 v[14:15], s[50:51], 1.0
; GFX9-NEXT:    v_add_f64 v[16:17], s[52:53], 1.0
; GFX9-NEXT:    v_add_f64 v[18:19], s[54:55], 1.0
; GFX9-NEXT:    v_add_f64 v[20:21], s[56:57], 1.0
; GFX9-NEXT:    v_add_f64 v[22:23], s[58:59], 1.0
; GFX9-NEXT:    v_add_f64 v[24:25], s[60:61], 1.0
; GFX9-NEXT:    v_add_f64 v[26:27], s[62:63], 1.0
; GFX9-NEXT:  .LBB39_3: ; %end
; GFX9-NEXT:    v_readlane_b32 s55, v32, 11
; GFX9-NEXT:    v_readlane_b32 s54, v32, 10
; GFX9-NEXT:    v_readlane_b32 s53, v32, 9
; GFX9-NEXT:    v_readlane_b32 s52, v32, 8
; GFX9-NEXT:    v_readlane_b32 s51, v32, 7
; GFX9-NEXT:    v_readlane_b32 s50, v32, 6
; GFX9-NEXT:    v_readlane_b32 s49, v32, 5
; GFX9-NEXT:    v_readlane_b32 s48, v32, 4
; GFX9-NEXT:    v_readlane_b32 s39, v32, 3
; GFX9-NEXT:    v_readlane_b32 s38, v32, 2
; GFX9-NEXT:    v_readlane_b32 s37, v32, 1
; GFX9-NEXT:    v_readlane_b32 s36, v32, 0
; GFX9-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    s_mov_b64 exec, s[4:5]
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v14f64_to_v14i64_scalar:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    s_xor_saveexec_b32 s4, -1
; GFX11-NEXT:    scratch_store_b32 off, v32, s32 ; 4-byte Folded Spill
; GFX11-NEXT:    s_mov_b32 exec_lo, s4
; GFX11-NEXT:    v_writelane_b32 v32, s36, 0
; GFX11-NEXT:    v_writelane_b32 v32, s37, 1
; GFX11-NEXT:    v_writelane_b32 v32, s38, 2
; GFX11-NEXT:    v_writelane_b32 v32, s39, 3
; GFX11-NEXT:    v_writelane_b32 v32, s48, 4
; GFX11-NEXT:    v_writelane_b32 v32, s49, 5
; GFX11-NEXT:    v_writelane_b32 v32, s50, 6
; GFX11-NEXT:    v_writelane_b32 v32, s51, 7
; GFX11-NEXT:    v_writelane_b32 v32, s52, 8
; GFX11-NEXT:    v_writelane_b32 v32, s53, 9
; GFX11-NEXT:    v_writelane_b32 v32, s54, 10
; GFX11-NEXT:    v_writelane_b32 v32, s55, 11
; GFX11-NEXT:    s_mov_b32 s36, s0
; GFX11-NEXT:    v_readfirstlane_b32 s0, v10
; GFX11-NEXT:    v_readfirstlane_b32 s63, v9
; GFX11-NEXT:    v_readfirstlane_b32 s62, v8
; GFX11-NEXT:    v_readfirstlane_b32 s61, v7
; GFX11-NEXT:    v_readfirstlane_b32 s60, v6
; GFX11-NEXT:    v_readfirstlane_b32 s59, v5
; GFX11-NEXT:    v_readfirstlane_b32 s58, v4
; GFX11-NEXT:    v_readfirstlane_b32 s57, v3
; GFX11-NEXT:    v_readfirstlane_b32 s56, v2
; GFX11-NEXT:    v_readfirstlane_b32 s55, v1
; GFX11-NEXT:    v_readfirstlane_b32 s54, v0
; GFX11-NEXT:    s_mov_b32 s53, s29
; GFX11-NEXT:    s_mov_b32 s52, s28
; GFX11-NEXT:    s_mov_b32 s51, s27
; GFX11-NEXT:    s_mov_b32 s50, s26
; GFX11-NEXT:    s_mov_b32 s49, s25
; GFX11-NEXT:    s_mov_b32 s48, s24
; GFX11-NEXT:    s_mov_b32 s47, s23
; GFX11-NEXT:    s_mov_b32 s46, s22
; GFX11-NEXT:    s_mov_b32 s45, s21
; GFX11-NEXT:    s_mov_b32 s44, s20
; GFX11-NEXT:    s_mov_b32 s43, s19
; GFX11-NEXT:    s_mov_b32 s42, s18
; GFX11-NEXT:    s_mov_b32 s41, s17
; GFX11-NEXT:    s_mov_b32 s40, s16
; GFX11-NEXT:    s_mov_b32 s39, s3
; GFX11-NEXT:    s_mov_b32 s38, s2
; GFX11-NEXT:    s_mov_b32 s37, s1
; GFX11-NEXT:    s_cmp_lg_u32 s0, 0
; GFX11-NEXT:    s_cbranch_scc0 .LBB39_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-NEXT:    v_dual_mov_b32 v0, s36 :: v_dual_mov_b32 v1, s37
; GFX11-NEXT:    v_dual_mov_b32 v2, s38 :: v_dual_mov_b32 v3, s39
; GFX11-NEXT:    v_dual_mov_b32 v4, s40 :: v_dual_mov_b32 v5, s41
; GFX11-NEXT:    v_dual_mov_b32 v6, s42 :: v_dual_mov_b32 v7, s43
; GFX11-NEXT:    v_dual_mov_b32 v8, s44 :: v_dual_mov_b32 v9, s45
; GFX11-NEXT:    v_dual_mov_b32 v10, s46 :: v_dual_mov_b32 v11, s47
; GFX11-NEXT:    v_dual_mov_b32 v12, s48 :: v_dual_mov_b32 v13, s49
; GFX11-NEXT:    v_dual_mov_b32 v14, s50 :: v_dual_mov_b32 v15, s51
; GFX11-NEXT:    v_dual_mov_b32 v16, s52 :: v_dual_mov_b32 v17, s53
; GFX11-NEXT:    v_dual_mov_b32 v18, s54 :: v_dual_mov_b32 v19, s55
; GFX11-NEXT:    v_dual_mov_b32 v20, s56 :: v_dual_mov_b32 v21, s57
; GFX11-NEXT:    v_dual_mov_b32 v22, s58 :: v_dual_mov_b32 v23, s59
; GFX11-NEXT:    v_dual_mov_b32 v24, s60 :: v_dual_mov_b32 v25, s61
; GFX11-NEXT:    v_dual_mov_b32 v26, s62 :: v_dual_mov_b32 v27, s63
; GFX11-NEXT:    v_dual_mov_b32 v28, s64 :: v_dual_mov_b32 v29, s65
; GFX11-NEXT:    v_dual_mov_b32 v30, s66 :: v_dual_mov_b32 v31, s67
; GFX11-NEXT:    s_branch .LBB39_3
; GFX11-NEXT:  .LBB39_2: ; %cmp.true
; GFX11-NEXT:    v_add_f64 v[0:1], s[36:37], 1.0
; GFX11-NEXT:    v_add_f64 v[2:3], s[38:39], 1.0
; GFX11-NEXT:    v_add_f64 v[4:5], s[40:41], 1.0
; GFX11-NEXT:    v_add_f64 v[6:7], s[42:43], 1.0
; GFX11-NEXT:    v_add_f64 v[8:9], s[44:45], 1.0
; GFX11-NEXT:    v_add_f64 v[10:11], s[46:47], 1.0
; GFX11-NEXT:    v_add_f64 v[12:13], s[48:49], 1.0
; GFX11-NEXT:    v_add_f64 v[14:15], s[50:51], 1.0
; GFX11-NEXT:    v_add_f64 v[16:17], s[52:53], 1.0
; GFX11-NEXT:    v_add_f64 v[18:19], s[54:55], 1.0
; GFX11-NEXT:    v_add_f64 v[20:21], s[56:57], 1.0
; GFX11-NEXT:    v_add_f64 v[22:23], s[58:59], 1.0
; GFX11-NEXT:    v_add_f64 v[24:25], s[60:61], 1.0
; GFX11-NEXT:    v_add_f64 v[26:27], s[62:63], 1.0
; GFX11-NEXT:  .LBB39_3: ; %end
; GFX11-NEXT:    v_readlane_b32 s55, v32, 11
; GFX11-NEXT:    v_readlane_b32 s54, v32, 10
; GFX11-NEXT:    v_readlane_b32 s53, v32, 9
; GFX11-NEXT:    v_readlane_b32 s52, v32, 8
; GFX11-NEXT:    v_readlane_b32 s51, v32, 7
; GFX11-NEXT:    v_readlane_b32 s50, v32, 6
; GFX11-NEXT:    v_readlane_b32 s49, v32, 5
; GFX11-NEXT:    v_readlane_b32 s48, v32, 4
; GFX11-NEXT:    v_readlane_b32 s39, v32, 3
; GFX11-NEXT:    v_readlane_b32 s38, v32, 2
; GFX11-NEXT:    v_readlane_b32 s37, v32, 1
; GFX11-NEXT:    v_readlane_b32 s36, v32, 0
; GFX11-NEXT:    s_xor_saveexec_b32 s0, -1
; GFX11-NEXT:    scratch_load_b32 v32, off, s32 ; 4-byte Folded Reload
; GFX11-NEXT:    s_mov_b32 exec_lo, s0
; GFX11-NEXT:    s_waitcnt vmcnt(0)
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = fadd <14 x double> %a, splat (double 1.000000e+00)
  %a2 = bitcast <14 x double> %a1 to <14 x i64>
  br label %end

cmp.false:
  %a3 = bitcast <14 x double> %a to <14 x i64>
  br label %end

end:
  %phi = phi <14 x i64> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <14 x i64> %phi
}

define <56 x i16> @bitcast_v14i64_to_v56i16(<14 x i64> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v14i64_to_v56i16:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT:    ; implicit-def: $vgpr40
; SI-NEXT:    ; implicit-def: $vgpr47
; SI-NEXT:    ; implicit-def: $vgpr53
; SI-NEXT:    ; implicit-def: $vgpr46
; SI-NEXT:    ; implicit-def: $vgpr50
; SI-NEXT:    ; implicit-def: $vgpr45
; SI-NEXT:    ; implicit-def: $vgpr39
; SI-NEXT:    ; implicit-def: $vgpr44
; SI-NEXT:    ; implicit-def: $vgpr37
; SI-NEXT:    ; implicit-def: $vgpr43
; SI-NEXT:    ; implicit-def: $vgpr36
; SI-NEXT:    ; implicit-def: $vgpr42
; SI-NEXT:    ; implicit-def: $vgpr35
; SI-NEXT:    ; implicit-def: $vgpr41
; SI-NEXT:    ; implicit-def: $vgpr34
; SI-NEXT:    ; implicit-def: $vgpr55
; SI-NEXT:    ; implicit-def: $vgpr33
; SI-NEXT:    ; implicit-def: $vgpr54
; SI-NEXT:    ; implicit-def: $vgpr32
; SI-NEXT:    ; implicit-def: $vgpr52
; SI-NEXT:    ; implicit-def: $vgpr31
; SI-NEXT:    ; implicit-def: $vgpr51
; SI-NEXT:    ; implicit-def: $vgpr30
; SI-NEXT:    ; implicit-def: $vgpr49
; SI-NEXT:    ; implicit-def: $vgpr29
; SI-NEXT:    ; implicit-def: $vgpr48
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr38
; SI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB40_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    v_alignbit_b32 v28, v27, v26, 16
; SI-NEXT:    v_alignbit_b32 v29, v25, v24, 16
; SI-NEXT:    v_alignbit_b32 v30, v23, v22, 16
; SI-NEXT:    v_alignbit_b32 v31, v21, v20, 16
; SI-NEXT:    v_alignbit_b32 v32, v19, v18, 16
; SI-NEXT:    v_alignbit_b32 v33, v17, v16, 16
; SI-NEXT:    v_alignbit_b32 v34, v15, v14, 16
; SI-NEXT:    v_alignbit_b32 v35, v13, v12, 16
; SI-NEXT:    v_alignbit_b32 v36, v11, v10, 16
; SI-NEXT:    v_alignbit_b32 v37, v9, v8, 16
; SI-NEXT:    v_alignbit_b32 v39, v7, v6, 16
; SI-NEXT:    v_alignbit_b32 v50, v5, v4, 16
; SI-NEXT:    v_alignbit_b32 v53, v3, v2, 16
; SI-NEXT:    v_alignbit_b32 v40, v1, v0, 16
; SI-NEXT:    v_lshrrev_b32_e32 v38, 16, v27
; SI-NEXT:    v_lshrrev_b32_e32 v48, 16, v25
; SI-NEXT:    v_lshrrev_b32_e32 v49, 16, v23
; SI-NEXT:    v_lshrrev_b32_e32 v51, 16, v21
; SI-NEXT:    v_lshrrev_b32_e32 v52, 16, v19
; SI-NEXT:    v_lshrrev_b32_e32 v54, 16, v17
; SI-NEXT:    v_lshrrev_b32_e32 v55, 16, v15
; SI-NEXT:    s_waitcnt expcnt(6)
; SI-NEXT:    v_lshrrev_b32_e32 v41, 16, v13
; SI-NEXT:    s_waitcnt expcnt(5)
; SI-NEXT:    v_lshrrev_b32_e32 v42, 16, v11
; SI-NEXT:    s_waitcnt expcnt(4)
; SI-NEXT:    v_lshrrev_b32_e32 v43, 16, v9
; SI-NEXT:    s_waitcnt expcnt(3)
; SI-NEXT:    v_lshrrev_b32_e32 v44, 16, v7
; SI-NEXT:    s_waitcnt expcnt(2)
; SI-NEXT:    v_lshrrev_b32_e32 v45, 16, v5
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v46, 16, v3
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v47, 16, v1
; SI-NEXT:  .LBB40_2: ; %Flow
; SI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB40_4
; SI-NEXT:  ; %bb.3: ; %cmp.true
; SI-NEXT:    v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; SI-NEXT:    v_add_i32_e32 v2, vcc, 3, v2
; SI-NEXT:    v_addc_u32_e32 v3, vcc, 0, v3, vcc
; SI-NEXT:    v_add_i32_e32 v4, vcc, 3, v4
; SI-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
; SI-NEXT:    v_add_i32_e32 v6, vcc, 3, v6
; SI-NEXT:    v_addc_u32_e32 v7, vcc, 0, v7, vcc
; SI-NEXT:    v_add_i32_e32 v8, vcc, 3, v8
; SI-NEXT:    v_addc_u32_e32 v9, vcc, 0, v9, vcc
; SI-NEXT:    v_add_i32_e32 v10, vcc, 3, v10
; SI-NEXT:    v_addc_u32_e32 v11, vcc, 0, v11, vcc
; SI-NEXT:    v_add_i32_e32 v12, vcc, 3, v12
; SI-NEXT:    v_addc_u32_e32 v13, vcc, 0, v13, vcc
; SI-NEXT:    v_add_i32_e32 v14, vcc, 3, v14
; SI-NEXT:    v_addc_u32_e32 v15, vcc, 0, v15, vcc
; SI-NEXT:    v_add_i32_e32 v16, vcc, 3, v16
; SI-NEXT:    v_addc_u32_e32 v17, vcc, 0, v17, vcc
; SI-NEXT:    v_add_i32_e32 v18, vcc, 3, v18
; SI-NEXT:    v_addc_u32_e32 v19, vcc, 0, v19, vcc
; SI-NEXT:    v_add_i32_e32 v20, vcc, 3, v20
; SI-NEXT:    v_addc_u32_e32 v21, vcc, 0, v21, vcc
; SI-NEXT:    v_add_i32_e32 v22, vcc, 3, v22
; SI-NEXT:    v_addc_u32_e32 v23, vcc, 0, v23, vcc
; SI-NEXT:    v_add_i32_e32 v24, vcc, 3, v24
; SI-NEXT:    v_addc_u32_e32 v25, vcc, 0, v25, vcc
; SI-NEXT:    v_add_i32_e32 v26, vcc, 3, v26
; SI-NEXT:    v_addc_u32_e32 v27, vcc, 0, v27, vcc
; SI-NEXT:    v_alignbit_b32 v28, v27, v26, 16
; SI-NEXT:    v_alignbit_b32 v29, v25, v24, 16
; SI-NEXT:    v_alignbit_b32 v30, v23, v22, 16
; SI-NEXT:    v_alignbit_b32 v31, v21, v20, 16
; SI-NEXT:    v_alignbit_b32 v32, v19, v18, 16
; SI-NEXT:    v_alignbit_b32 v33, v17, v16, 16
; SI-NEXT:    v_alignbit_b32 v34, v15, v14, 16
; SI-NEXT:    v_alignbit_b32 v35, v13, v12, 16
; SI-NEXT:    v_alignbit_b32 v36, v11, v10, 16
; SI-NEXT:    v_alignbit_b32 v37, v9, v8, 16
; SI-NEXT:    v_alignbit_b32 v39, v7, v6, 16
; SI-NEXT:    v_alignbit_b32 v50, v5, v4, 16
; SI-NEXT:    v_alignbit_b32 v53, v3, v2, 16
; SI-NEXT:    v_alignbit_b32 v40, v1, v0, 16
; SI-NEXT:    v_lshrrev_b32_e32 v38, 16, v27
; SI-NEXT:    v_lshrrev_b32_e32 v48, 16, v25
; SI-NEXT:    v_lshrrev_b32_e32 v49, 16, v23
; SI-NEXT:    v_lshrrev_b32_e32 v51, 16, v21
; SI-NEXT:    v_lshrrev_b32_e32 v52, 16, v19
; SI-NEXT:    v_lshrrev_b32_e32 v54, 16, v17
; SI-NEXT:    v_lshrrev_b32_e32 v55, 16, v15
; SI-NEXT:    s_waitcnt expcnt(6)
; SI-NEXT:    v_lshrrev_b32_e32 v41, 16, v13
; SI-NEXT:    s_waitcnt expcnt(5)
; SI-NEXT:    v_lshrrev_b32_e32 v42, 16, v11
; SI-NEXT:    s_waitcnt expcnt(4)
; SI-NEXT:    v_lshrrev_b32_e32 v43, 16, v9
; SI-NEXT:    s_waitcnt expcnt(3)
; SI-NEXT:    v_lshrrev_b32_e32 v44, 16, v7
; SI-NEXT:    s_waitcnt expcnt(2)
; SI-NEXT:    v_lshrrev_b32_e32 v45, 16, v5
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v46, 16, v3
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v47, 16, v1
; SI-NEXT:  .LBB40_4: ; %end
; SI-NEXT:    s_or_b64 exec, exec, s[4:5]
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT:    v_lshlrev_b32_e32 v40, 16, v40
; SI-NEXT:    v_or_b32_e32 v0, v0, v40
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT:    v_lshlrev_b32_e32 v40, 16, v47
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT:    v_lshlrev_b32_e32 v53, 16, v53
; SI-NEXT:    v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT:    v_lshlrev_b32_e32 v50, 16, v50
; SI-NEXT:    v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT:    v_lshlrev_b32_e32 v39, 16, v39
; SI-NEXT:    v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT:    v_lshlrev_b32_e32 v37, 16, v37
; SI-NEXT:    v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT:    v_lshlrev_b32_e32 v36, 16, v36
; SI-NEXT:    v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; SI-NEXT:    v_or_b32_e32 v1, v1, v40
; SI-NEXT:    v_or_b32_e32 v2, v2, v53
; SI-NEXT:    v_lshlrev_b32_e32 v53, 16, v46
; SI-NEXT:    v_or_b32_e32 v4, v4, v50
; SI-NEXT:    v_lshlrev_b32_e32 v50, 16, v45
; SI-NEXT:    v_or_b32_e32 v6, v6, v39
; SI-NEXT:    v_lshlrev_b32_e32 v39, 16, v44
; SI-NEXT:    v_or_b32_e32 v8, v8, v37
; SI-NEXT:    v_lshlrev_b32_e32 v37, 16, v43
; SI-NEXT:    v_or_b32_e32 v10, v10, v36
; SI-NEXT:    v_lshlrev_b32_e32 v36, 16, v42
; SI-NEXT:    v_or_b32_e32 v12, v12, v35
; SI-NEXT:    v_lshlrev_b32_e32 v35, 16, v41
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; SI-NEXT:    v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT:    v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT:    v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; SI-NEXT:    v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT:    v_lshlrev_b32_e32 v32, 16, v32
; SI-NEXT:    v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT:    v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT:    v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; SI-NEXT:    v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; SI-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; SI-NEXT:    v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT:    v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT:    v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT:    v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT:    v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT:    v_and_b32_e32 v13, 0xffff, v13
; SI-NEXT:    v_or_b32_e32 v14, v14, v34
; SI-NEXT:    v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT:    v_lshlrev_b32_e32 v34, 16, v55
; SI-NEXT:    v_or_b32_e32 v16, v16, v33
; SI-NEXT:    v_and_b32_e32 v17, 0xffff, v17
; SI-NEXT:    v_lshlrev_b32_e32 v33, 16, v54
; SI-NEXT:    v_or_b32_e32 v18, v18, v32
; SI-NEXT:    v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT:    v_lshlrev_b32_e32 v32, 16, v52
; SI-NEXT:    v_or_b32_e32 v20, v20, v31
; SI-NEXT:    v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT:    v_lshlrev_b32_e32 v31, 16, v51
; SI-NEXT:    v_or_b32_e32 v22, v22, v30
; SI-NEXT:    v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v49
; SI-NEXT:    v_or_b32_e32 v24, v24, v29
; SI-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v48
; SI-NEXT:    v_or_b32_e32 v26, v26, v28
; SI-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v38
; SI-NEXT:    v_or_b32_e32 v3, v3, v53
; SI-NEXT:    v_or_b32_e32 v5, v5, v50
; SI-NEXT:    v_or_b32_e32 v7, v7, v39
; SI-NEXT:    v_or_b32_e32 v9, v9, v37
; SI-NEXT:    v_or_b32_e32 v11, v11, v36
; SI-NEXT:    v_or_b32_e32 v13, v13, v35
; SI-NEXT:    v_or_b32_e32 v15, v15, v34
; SI-NEXT:    v_or_b32_e32 v17, v17, v33
; SI-NEXT:    v_or_b32_e32 v19, v19, v32
; SI-NEXT:    v_or_b32_e32 v21, v21, v31
; SI-NEXT:    v_or_b32_e32 v23, v23, v30
; SI-NEXT:    v_or_b32_e32 v25, v25, v29
; SI-NEXT:    v_or_b32_e32 v27, v27, v28
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v14i64_to_v56i16:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT:    ; implicit-def: $vgpr47
; VI-NEXT:    ; implicit-def: $vgpr46
; VI-NEXT:    ; implicit-def: $vgpr45
; VI-NEXT:    ; implicit-def: $vgpr44
; VI-NEXT:    ; implicit-def: $vgpr43
; VI-NEXT:    ; implicit-def: $vgpr42
; VI-NEXT:    ; implicit-def: $vgpr41
; VI-NEXT:    ; implicit-def: $vgpr40
; VI-NEXT:    ; implicit-def: $vgpr55
; VI-NEXT:    ; implicit-def: $vgpr54
; VI-NEXT:    ; implicit-def: $vgpr53
; VI-NEXT:    ; implicit-def: $vgpr52
; VI-NEXT:    ; implicit-def: $vgpr51
; VI-NEXT:    ; implicit-def: $vgpr50
; VI-NEXT:    ; implicit-def: $vgpr49
; VI-NEXT:    ; implicit-def: $vgpr48
; VI-NEXT:    ; implicit-def: $vgpr39
; VI-NEXT:    ; implicit-def: $vgpr38
; VI-NEXT:    ; implicit-def: $vgpr37
; VI-NEXT:    ; implicit-def: $vgpr36
; VI-NEXT:    ; implicit-def: $vgpr35
; VI-NEXT:    ; implicit-def: $vgpr34
; VI-NEXT:    ; implicit-def: $vgpr33
; VI-NEXT:    ; implicit-def: $vgpr32
; VI-NEXT:    ; implicit-def: $vgpr31
; VI-NEXT:    ; implicit-def: $vgpr30
; VI-NEXT:    ; implicit-def: $vgpr29
; VI-NEXT:    ; implicit-def: $vgpr28
; VI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB40_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; VI-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; VI-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; VI-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; VI-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; VI-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; VI-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; VI-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; VI-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; VI-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; VI-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; VI-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; VI-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; VI-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; VI-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; VI-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; VI-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; VI-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; VI-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; VI-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; VI-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; VI-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; VI-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; VI-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; VI-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; VI-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; VI-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; VI-NEXT:  .LBB40_2: ; %Flow
; VI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB40_4
; VI-NEXT:  ; %bb.3: ; %cmp.true
; VI-NEXT:    v_add_u32_e32 v26, vcc, 3, v26
; VI-NEXT:    v_addc_u32_e32 v27, vcc, 0, v27, vcc
; VI-NEXT:    v_add_u32_e32 v24, vcc, 3, v24
; VI-NEXT:    v_addc_u32_e32 v25, vcc, 0, v25, vcc
; VI-NEXT:    v_add_u32_e32 v22, vcc, 3, v22
; VI-NEXT:    v_addc_u32_e32 v23, vcc, 0, v23, vcc
; VI-NEXT:    v_add_u32_e32 v20, vcc, 3, v20
; VI-NEXT:    v_addc_u32_e32 v21, vcc, 0, v21, vcc
; VI-NEXT:    v_add_u32_e32 v18, vcc, 3, v18
; VI-NEXT:    v_addc_u32_e32 v19, vcc, 0, v19, vcc
; VI-NEXT:    v_add_u32_e32 v16, vcc, 3, v16
; VI-NEXT:    v_addc_u32_e32 v17, vcc, 0, v17, vcc
; VI-NEXT:    v_add_u32_e32 v14, vcc, 3, v14
; VI-NEXT:    v_addc_u32_e32 v15, vcc, 0, v15, vcc
; VI-NEXT:    v_add_u32_e32 v12, vcc, 3, v12
; VI-NEXT:    v_addc_u32_e32 v13, vcc, 0, v13, vcc
; VI-NEXT:    v_add_u32_e32 v10, vcc, 3, v10
; VI-NEXT:    v_addc_u32_e32 v11, vcc, 0, v11, vcc
; VI-NEXT:    v_add_u32_e32 v8, vcc, 3, v8
; VI-NEXT:    v_addc_u32_e32 v9, vcc, 0, v9, vcc
; VI-NEXT:    v_add_u32_e32 v6, vcc, 3, v6
; VI-NEXT:    v_addc_u32_e32 v7, vcc, 0, v7, vcc
; VI-NEXT:    v_add_u32_e32 v4, vcc, 3, v4
; VI-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
; VI-NEXT:    v_add_u32_e32 v2, vcc, 3, v2
; VI-NEXT:    v_addc_u32_e32 v3, vcc, 0, v3, vcc
; VI-NEXT:    v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; VI-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; VI-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; VI-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; VI-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; VI-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; VI-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; VI-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; VI-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; VI-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; VI-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; VI-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; VI-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; VI-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; VI-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; VI-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; VI-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; VI-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; VI-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; VI-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; VI-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; VI-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; VI-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; VI-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; VI-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; VI-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; VI-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; VI-NEXT:  .LBB40_4: ; %end
; VI-NEXT:    s_or_b64 exec, exec, s[4:5]
; VI-NEXT:    v_lshlrev_b32_e32 v47, 16, v47
; VI-NEXT:    v_lshlrev_b32_e32 v46, 16, v46
; VI-NEXT:    v_lshlrev_b32_e32 v45, 16, v45
; VI-NEXT:    v_lshlrev_b32_e32 v44, 16, v44
; VI-NEXT:    v_lshlrev_b32_e32 v43, 16, v43
; VI-NEXT:    v_lshlrev_b32_e32 v42, 16, v42
; VI-NEXT:    v_lshlrev_b32_e32 v41, 16, v41
; VI-NEXT:    v_lshlrev_b32_e32 v40, 16, v40
; VI-NEXT:    v_or_b32_sdwa v0, v0, v47 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v1, v1, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v2, v2, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v3, v3, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v4, v4, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v5, v5, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v6, v6, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v7, v7, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; VI-NEXT:    v_lshlrev_b32_e32 v55, 16, v55
; VI-NEXT:    v_lshlrev_b32_e32 v54, 16, v54
; VI-NEXT:    v_lshlrev_b32_e32 v53, 16, v53
; VI-NEXT:    v_lshlrev_b32_e32 v52, 16, v52
; VI-NEXT:    v_lshlrev_b32_e32 v51, 16, v51
; VI-NEXT:    v_lshlrev_b32_e32 v50, 16, v50
; VI-NEXT:    v_lshlrev_b32_e32 v49, 16, v49
; VI-NEXT:    v_lshlrev_b32_e32 v48, 16, v48
; VI-NEXT:    v_lshlrev_b32_e32 v39, 16, v39
; VI-NEXT:    v_lshlrev_b32_e32 v38, 16, v38
; VI-NEXT:    v_lshlrev_b32_e32 v37, 16, v37
; VI-NEXT:    v_lshlrev_b32_e32 v36, 16, v36
; VI-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v34
; VI-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; VI-NEXT:    v_lshlrev_b32_e32 v32, 16, v32
; VI-NEXT:    v_lshlrev_b32_e32 v31, 16, v31
; VI-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; VI-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; VI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; VI-NEXT:    v_or_b32_sdwa v8, v8, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v9, v9, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v10, v10, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v11, v11, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v12, v12, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v13, v13, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v14, v14, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v15, v15, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v16, v16, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v17, v17, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v18, v18, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v19, v19, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v20, v20, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v21, v21, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v22, v22, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v23, v23, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v24, v24, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v25, v25, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v26, v26, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v14i64_to_v56i16:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT:    ; implicit-def: $vgpr47
; GFX9-NEXT:    ; implicit-def: $vgpr46
; GFX9-NEXT:    ; implicit-def: $vgpr45
; GFX9-NEXT:    ; implicit-def: $vgpr44
; GFX9-NEXT:    ; implicit-def: $vgpr43
; GFX9-NEXT:    ; implicit-def: $vgpr42
; GFX9-NEXT:    ; implicit-def: $vgpr41
; GFX9-NEXT:    ; implicit-def: $vgpr40
; GFX9-NEXT:    ; implicit-def: $vgpr55
; GFX9-NEXT:    ; implicit-def: $vgpr54
; GFX9-NEXT:    ; implicit-def: $vgpr53
; GFX9-NEXT:    ; implicit-def: $vgpr52
; GFX9-NEXT:    ; implicit-def: $vgpr51
; GFX9-NEXT:    ; implicit-def: $vgpr50
; GFX9-NEXT:    ; implicit-def: $vgpr49
; GFX9-NEXT:    ; implicit-def: $vgpr48
; GFX9-NEXT:    ; implicit-def: $vgpr39
; GFX9-NEXT:    ; implicit-def: $vgpr38
; GFX9-NEXT:    ; implicit-def: $vgpr37
; GFX9-NEXT:    ; implicit-def: $vgpr36
; GFX9-NEXT:    ; implicit-def: $vgpr35
; GFX9-NEXT:    ; implicit-def: $vgpr34
; GFX9-NEXT:    ; implicit-def: $vgpr33
; GFX9-NEXT:    ; implicit-def: $vgpr32
; GFX9-NEXT:    ; implicit-def: $vgpr31
; GFX9-NEXT:    ; implicit-def: $vgpr30
; GFX9-NEXT:    ; implicit-def: $vgpr29
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB40_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX9-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX9-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX9-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX9-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX9-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX9-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX9-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX9-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX9-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX9-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX9-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX9-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX9-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX9-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX9-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX9-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; GFX9-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; GFX9-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; GFX9-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; GFX9-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; GFX9-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; GFX9-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; GFX9-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; GFX9-NEXT:  .LBB40_2: ; %Flow
; GFX9-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB40_4
; GFX9-NEXT:  ; %bb.3: ; %cmp.true
; GFX9-NEXT:    v_add_co_u32_e32 v26, vcc, 3, v26
; GFX9-NEXT:    v_addc_co_u32_e32 v27, vcc, 0, v27, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v24, vcc, 3, v24
; GFX9-NEXT:    v_addc_co_u32_e32 v25, vcc, 0, v25, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v22, vcc, 3, v22
; GFX9-NEXT:    v_addc_co_u32_e32 v23, vcc, 0, v23, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v20, vcc, 3, v20
; GFX9-NEXT:    v_addc_co_u32_e32 v21, vcc, 0, v21, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v18, vcc, 3, v18
; GFX9-NEXT:    v_addc_co_u32_e32 v19, vcc, 0, v19, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v16, vcc, 3, v16
; GFX9-NEXT:    v_addc_co_u32_e32 v17, vcc, 0, v17, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v14, vcc, 3, v14
; GFX9-NEXT:    v_addc_co_u32_e32 v15, vcc, 0, v15, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v12, vcc, 3, v12
; GFX9-NEXT:    v_addc_co_u32_e32 v13, vcc, 0, v13, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v10, vcc, 3, v10
; GFX9-NEXT:    v_addc_co_u32_e32 v11, vcc, 0, v11, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v8, vcc, 3, v8
; GFX9-NEXT:    v_addc_co_u32_e32 v9, vcc, 0, v9, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v6, vcc, 3, v6
; GFX9-NEXT:    v_addc_co_u32_e32 v7, vcc, 0, v7, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v4, vcc, 3, v4
; GFX9-NEXT:    v_addc_co_u32_e32 v5, vcc, 0, v5, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v2, vcc, 3, v2
; GFX9-NEXT:    v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v0, vcc, 3, v0
; GFX9-NEXT:    v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX9-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX9-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX9-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX9-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX9-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX9-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX9-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX9-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX9-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX9-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX9-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX9-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX9-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX9-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX9-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX9-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX9-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; GFX9-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; GFX9-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; GFX9-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; GFX9-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; GFX9-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; GFX9-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; GFX9-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; GFX9-NEXT:  .LBB40_4: ; %end
; GFX9-NEXT:    s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT:    s_mov_b32 s4, 0x5040100
; GFX9-NEXT:    v_perm_b32 v0, v47, v0, s4
; GFX9-NEXT:    v_perm_b32 v1, v46, v1, s4
; GFX9-NEXT:    v_perm_b32 v2, v45, v2, s4
; GFX9-NEXT:    v_perm_b32 v3, v44, v3, s4
; GFX9-NEXT:    v_perm_b32 v4, v43, v4, s4
; GFX9-NEXT:    v_perm_b32 v5, v42, v5, s4
; GFX9-NEXT:    v_perm_b32 v6, v41, v6, s4
; GFX9-NEXT:    v_perm_b32 v7, v40, v7, s4
; GFX9-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; GFX9-NEXT:    v_perm_b32 v8, v55, v8, s4
; GFX9-NEXT:    v_perm_b32 v9, v54, v9, s4
; GFX9-NEXT:    v_perm_b32 v10, v53, v10, s4
; GFX9-NEXT:    v_perm_b32 v11, v52, v11, s4
; GFX9-NEXT:    v_perm_b32 v12, v51, v12, s4
; GFX9-NEXT:    v_perm_b32 v13, v50, v13, s4
; GFX9-NEXT:    v_perm_b32 v14, v49, v14, s4
; GFX9-NEXT:    v_perm_b32 v15, v48, v15, s4
; GFX9-NEXT:    v_perm_b32 v16, v39, v16, s4
; GFX9-NEXT:    v_perm_b32 v17, v38, v17, s4
; GFX9-NEXT:    v_perm_b32 v18, v37, v18, s4
; GFX9-NEXT:    v_perm_b32 v19, v36, v19, s4
; GFX9-NEXT:    v_perm_b32 v20, v35, v20, s4
; GFX9-NEXT:    v_perm_b32 v21, v34, v21, s4
; GFX9-NEXT:    v_perm_b32 v22, v33, v22, s4
; GFX9-NEXT:    v_perm_b32 v23, v32, v23, s4
; GFX9-NEXT:    v_perm_b32 v24, v31, v24, s4
; GFX9-NEXT:    v_perm_b32 v25, v30, v25, s4
; GFX9-NEXT:    v_perm_b32 v26, v29, v26, s4
; GFX9-NEXT:    v_perm_b32 v27, v28, v27, s4
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-TRUE16-LABEL: bitcast_v14i64_to_v56i16:
; GFX11-TRUE16:       ; %bb.0:
; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-TRUE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT:    s_cbranch_execz .LBB40_2
; GFX11-TRUE16-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-TRUE16-NEXT:    v_add_co_u32 v26, vcc_lo, v26, 3
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT:    v_add_co_ci_u32_e64 v27, null, 0, v27, vcc_lo
; GFX11-TRUE16-NEXT:    v_add_co_u32 v24, vcc_lo, v24, 3
; GFX11-TRUE16-NEXT:    v_add_co_ci_u32_e64 v25, null, 0, v25, vcc_lo
; GFX11-TRUE16-NEXT:    v_add_co_u32 v22, vcc_lo, v22, 3
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT:    v_add_co_ci_u32_e64 v23, null, 0, v23, vcc_lo
; GFX11-TRUE16-NEXT:    v_add_co_u32 v20, vcc_lo, v20, 3
; GFX11-TRUE16-NEXT:    v_add_co_ci_u32_e64 v21, null, 0, v21, vcc_lo
; GFX11-TRUE16-NEXT:    v_add_co_u32 v18, vcc_lo, v18, 3
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT:    v_add_co_ci_u32_e64 v19, null, 0, v19, vcc_lo
; GFX11-TRUE16-NEXT:    v_add_co_u32 v16, vcc_lo, v16, 3
; GFX11-TRUE16-NEXT:    v_add_co_ci_u32_e64 v17, null, 0, v17, vcc_lo
; GFX11-TRUE16-NEXT:    v_add_co_u32 v14, vcc_lo, v14, 3
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT:    v_add_co_ci_u32_e64 v15, null, 0, v15, vcc_lo
; GFX11-TRUE16-NEXT:    v_add_co_u32 v12, vcc_lo, v12, 3
; GFX11-TRUE16-NEXT:    v_add_co_ci_u32_e64 v13, null, 0, v13, vcc_lo
; GFX11-TRUE16-NEXT:    v_add_co_u32 v10, vcc_lo, v10, 3
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT:    v_add_co_ci_u32_e64 v11, null, 0, v11, vcc_lo
; GFX11-TRUE16-NEXT:    v_add_co_u32 v8, vcc_lo, v8, 3
; GFX11-TRUE16-NEXT:    v_add_co_ci_u32_e64 v9, null, 0, v9, vcc_lo
; GFX11-TRUE16-NEXT:    v_add_co_u32 v6, vcc_lo, v6, 3
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT:    v_add_co_ci_u32_e64 v7, null, 0, v7, vcc_lo
; GFX11-TRUE16-NEXT:    v_add_co_u32 v4, vcc_lo, v4, 3
; GFX11-TRUE16-NEXT:    v_add_co_ci_u32_e64 v5, null, 0, v5, vcc_lo
; GFX11-TRUE16-NEXT:    v_add_co_u32 v2, vcc_lo, v2, 3
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT:    v_add_co_ci_u32_e64 v3, null, 0, v3, vcc_lo
; GFX11-TRUE16-NEXT:    v_add_co_u32 v0, vcc_lo, v0, 3
; GFX11-TRUE16-NEXT:    v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX11-TRUE16-NEXT:  .LBB40_2: ; %end
; GFX11-TRUE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v14i64_to_v56i16:
; GFX11-FAKE16:       ; %bb.0:
; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v28
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr71
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr70
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr69
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr68
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr67
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr66
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr65
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr64
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr55
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr54
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr53
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr52
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr51
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr50
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr49
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr48
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr39
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr38
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr37
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr36
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr35
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr34
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr33
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr32
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr31
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr30
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr29
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr28
; GFX11-FAKE16-NEXT:    s_and_saveexec_b32 s0, vcc_lo
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_cbranch_execz .LBB40_2
; GFX11-FAKE16-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v3
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v2
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v0
; GFX11-FAKE16-NEXT:  .LBB40_2: ; %Flow
; GFX11-FAKE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-FAKE16-NEXT:    s_cbranch_execz .LBB40_4
; GFX11-FAKE16-NEXT:  ; %bb.3: ; %cmp.true
; GFX11-FAKE16-NEXT:    v_add_co_u32 v26, vcc_lo, v26, 3
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT:    v_add_co_ci_u32_e64 v27, null, 0, v27, vcc_lo
; GFX11-FAKE16-NEXT:    v_add_co_u32 v24, vcc_lo, v24, 3
; GFX11-FAKE16-NEXT:    v_add_co_ci_u32_e64 v25, null, 0, v25, vcc_lo
; GFX11-FAKE16-NEXT:    v_add_co_u32 v22, vcc_lo, v22, 3
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT:    v_add_co_ci_u32_e64 v23, null, 0, v23, vcc_lo
; GFX11-FAKE16-NEXT:    v_add_co_u32 v20, vcc_lo, v20, 3
; GFX11-FAKE16-NEXT:    v_add_co_ci_u32_e64 v21, null, 0, v21, vcc_lo
; GFX11-FAKE16-NEXT:    v_add_co_u32 v18, vcc_lo, v18, 3
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT:    v_add_co_ci_u32_e64 v19, null, 0, v19, vcc_lo
; GFX11-FAKE16-NEXT:    v_add_co_u32 v16, vcc_lo, v16, 3
; GFX11-FAKE16-NEXT:    v_add_co_ci_u32_e64 v17, null, 0, v17, vcc_lo
; GFX11-FAKE16-NEXT:    v_add_co_u32 v14, vcc_lo, v14, 3
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT:    v_add_co_ci_u32_e64 v15, null, 0, v15, vcc_lo
; GFX11-FAKE16-NEXT:    v_add_co_u32 v12, vcc_lo, v12, 3
; GFX11-FAKE16-NEXT:    v_add_co_ci_u32_e64 v13, null, 0, v13, vcc_lo
; GFX11-FAKE16-NEXT:    v_add_co_u32 v10, vcc_lo, v10, 3
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT:    v_add_co_ci_u32_e64 v11, null, 0, v11, vcc_lo
; GFX11-FAKE16-NEXT:    v_add_co_u32 v8, vcc_lo, v8, 3
; GFX11-FAKE16-NEXT:    v_add_co_ci_u32_e64 v9, null, 0, v9, vcc_lo
; GFX11-FAKE16-NEXT:    v_add_co_u32 v6, vcc_lo, v6, 3
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT:    v_add_co_ci_u32_e64 v7, null, 0, v7, vcc_lo
; GFX11-FAKE16-NEXT:    v_add_co_u32 v4, vcc_lo, v4, 3
; GFX11-FAKE16-NEXT:    v_add_co_ci_u32_e64 v5, null, 0, v5, vcc_lo
; GFX11-FAKE16-NEXT:    v_add_co_u32 v2, vcc_lo, v2, 3
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT:    v_add_co_ci_u32_e64 v3, null, 0, v3, vcc_lo
; GFX11-FAKE16-NEXT:    v_add_co_u32 v0, vcc_lo, v0, 3
; GFX11-FAKE16-NEXT:    v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v3
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v2
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v0
; GFX11-FAKE16-NEXT:  .LBB40_4: ; %end
; GFX11-FAKE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v71, v0, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v1, v70, v1, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v2, v69, v2, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v3, v68, v3, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v4, v67, v4, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v5, v66, v5, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v6, v65, v6, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v7, v64, v7, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v8, v55, v8, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v9, v54, v9, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v10, v53, v10, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v11, v52, v11, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v12, v51, v12, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v13, v50, v13, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v14, v49, v14, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v15, v48, v15, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v16, v39, v16, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v17, v38, v17, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v18, v37, v18, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v19, v36, v19, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v20, v35, v20, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v21, v34, v21, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v22, v33, v22, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v23, v32, v23, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v24, v31, v24, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v25, v30, v25, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v26, v29, v26, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v27, v28, v27, 0x5040100
; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = add <14 x i64> %a, splat (i64 3)
  %a2 = bitcast <14 x i64> %a1 to <56 x i16>
  br label %end

cmp.false:
  %a3 = bitcast <14 x i64> %a to <56 x i16>
  br label %end

end:
  %phi = phi <56 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <56 x i16> %phi
}

define inreg <56 x i16> @bitcast_v14i64_to_v56i16_scalar(<14 x i64> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v14i64_to_v56i16_scalar:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_store_dword v28, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_writelane_b32 v28, s34, 0
; SI-NEXT:    v_writelane_b32 v28, s35, 1
; SI-NEXT:    v_writelane_b32 v28, s36, 2
; SI-NEXT:    v_writelane_b32 v28, s37, 3
; SI-NEXT:    v_writelane_b32 v28, s38, 4
; SI-NEXT:    v_writelane_b32 v28, s39, 5
; SI-NEXT:    v_writelane_b32 v28, s48, 6
; SI-NEXT:    v_writelane_b32 v28, s49, 7
; SI-NEXT:    v_writelane_b32 v28, s30, 8
; SI-NEXT:    v_writelane_b32 v28, s31, 9
; SI-NEXT:    v_readfirstlane_b32 s40, v14
; SI-NEXT:    v_readfirstlane_b32 s5, v13
; SI-NEXT:    v_readfirstlane_b32 s4, v12
; SI-NEXT:    v_readfirstlane_b32 s7, v11
; SI-NEXT:    v_readfirstlane_b32 s6, v10
; SI-NEXT:    v_readfirstlane_b32 s9, v9
; SI-NEXT:    v_readfirstlane_b32 s8, v8
; SI-NEXT:    v_readfirstlane_b32 s11, v7
; SI-NEXT:    v_readfirstlane_b32 s10, v6
; SI-NEXT:    v_readfirstlane_b32 s13, v5
; SI-NEXT:    v_readfirstlane_b32 s12, v4
; SI-NEXT:    v_readfirstlane_b32 s15, v3
; SI-NEXT:    v_readfirstlane_b32 s14, v2
; SI-NEXT:    v_readfirstlane_b32 s41, v1
; SI-NEXT:    s_cmp_lg_u32 s40, 0
; SI-NEXT:    v_readfirstlane_b32 s40, v0
; SI-NEXT:    s_cbranch_scc1 .LBB41_2
; SI-NEXT:  ; %bb.1: ; %cmp.true
; SI-NEXT:    s_add_u32 s4, s4, 3
; SI-NEXT:    s_addc_u32 s5, s5, 0
; SI-NEXT:    s_add_u32 s6, s6, 3
; SI-NEXT:    s_addc_u32 s7, s7, 0
; SI-NEXT:    s_add_u32 s8, s8, 3
; SI-NEXT:    s_addc_u32 s9, s9, 0
; SI-NEXT:    s_add_u32 s10, s10, 3
; SI-NEXT:    s_addc_u32 s11, s11, 0
; SI-NEXT:    s_add_u32 s12, s12, 3
; SI-NEXT:    s_addc_u32 s13, s13, 0
; SI-NEXT:    s_add_u32 s14, s14, 3
; SI-NEXT:    s_addc_u32 s15, s15, 0
; SI-NEXT:    s_add_u32 s40, s40, 3
; SI-NEXT:    s_addc_u32 s41, s41, 0
; SI-NEXT:    s_add_u32 s28, s28, 3
; SI-NEXT:    s_addc_u32 s29, s29, 0
; SI-NEXT:    s_add_u32 s26, s26, 3
; SI-NEXT:    s_addc_u32 s27, s27, 0
; SI-NEXT:    s_add_u32 s24, s24, 3
; SI-NEXT:    s_addc_u32 s25, s25, 0
; SI-NEXT:    s_add_u32 s22, s22, 3
; SI-NEXT:    s_addc_u32 s23, s23, 0
; SI-NEXT:    s_add_u32 s20, s20, 3
; SI-NEXT:    s_addc_u32 s21, s21, 0
; SI-NEXT:    s_add_u32 s18, s18, 3
; SI-NEXT:    s_addc_u32 s19, s19, 0
; SI-NEXT:    s_add_u32 s16, s16, 3
; SI-NEXT:    s_addc_u32 s17, s17, 0
; SI-NEXT:  .LBB41_2: ; %cmp.false
; SI-NEXT:    s_lshr_b64 s[42:43], s[4:5], 16
; SI-NEXT:    s_lshr_b64 s[92:93], s[16:17], 16
; SI-NEXT:    s_lshr_b32 s49, s17, 16
; SI-NEXT:    s_lshl_b32 s43, s92, 16
; SI-NEXT:    s_and_b32 s16, s16, 0xffff
; SI-NEXT:    s_lshr_b64 s[90:91], s[18:19], 16
; SI-NEXT:    s_or_b32 s16, s16, s43
; SI-NEXT:    s_and_b32 s17, s17, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s49, 16
; SI-NEXT:    s_lshr_b32 s48, s19, 16
; SI-NEXT:    s_or_b32 s17, s17, s43
; SI-NEXT:    s_lshl_b32 s43, s90, 16
; SI-NEXT:    s_and_b32 s18, s18, 0xffff
; SI-NEXT:    s_lshr_b64 s[88:89], s[20:21], 16
; SI-NEXT:    s_or_b32 s18, s18, s43
; SI-NEXT:    s_and_b32 s19, s19, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s48, 16
; SI-NEXT:    s_lshr_b32 s39, s21, 16
; SI-NEXT:    s_or_b32 s19, s19, s43
; SI-NEXT:    s_lshl_b32 s43, s88, 16
; SI-NEXT:    s_and_b32 s20, s20, 0xffff
; SI-NEXT:    s_lshr_b64 s[78:79], s[22:23], 16
; SI-NEXT:    s_or_b32 s20, s20, s43
; SI-NEXT:    s_and_b32 s21, s21, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s39, 16
; SI-NEXT:    s_lshr_b32 s38, s23, 16
; SI-NEXT:    s_or_b32 s21, s21, s43
; SI-NEXT:    s_lshl_b32 s43, s78, 16
; SI-NEXT:    s_and_b32 s22, s22, 0xffff
; SI-NEXT:    s_lshr_b64 s[76:77], s[24:25], 16
; SI-NEXT:    s_or_b32 s22, s22, s43
; SI-NEXT:    s_and_b32 s23, s23, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s38, 16
; SI-NEXT:    s_lshr_b32 s37, s25, 16
; SI-NEXT:    s_or_b32 s23, s23, s43
; SI-NEXT:    s_and_b32 s24, s24, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s76, 16
; SI-NEXT:    s_lshr_b64 s[74:75], s[26:27], 16
; SI-NEXT:    s_or_b32 s24, s24, s43
; SI-NEXT:    s_and_b32 s25, s25, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s37, 16
; SI-NEXT:    s_lshr_b32 s36, s27, 16
; SI-NEXT:    s_or_b32 s25, s25, s43
; SI-NEXT:    s_and_b32 s26, s26, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s74, 16
; SI-NEXT:    s_lshr_b64 s[72:73], s[28:29], 16
; SI-NEXT:    s_or_b32 s26, s26, s43
; SI-NEXT:    s_and_b32 s27, s27, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s36, 16
; SI-NEXT:    s_lshr_b32 s35, s29, 16
; SI-NEXT:    s_or_b32 s27, s27, s43
; SI-NEXT:    s_and_b32 s28, s28, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s72, 16
; SI-NEXT:    s_lshr_b64 s[62:63], s[40:41], 16
; SI-NEXT:    s_or_b32 s28, s28, s43
; SI-NEXT:    s_and_b32 s29, s29, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s35, 16
; SI-NEXT:    s_lshr_b32 s34, s41, 16
; SI-NEXT:    s_or_b32 s29, s29, s43
; SI-NEXT:    s_and_b32 s40, s40, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s62, 16
; SI-NEXT:    s_lshr_b64 s[60:61], s[14:15], 16
; SI-NEXT:    s_or_b32 s40, s40, s43
; SI-NEXT:    s_and_b32 s41, s41, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s34, 16
; SI-NEXT:    s_lshr_b32 s31, s15, 16
; SI-NEXT:    s_or_b32 s41, s41, s43
; SI-NEXT:    s_and_b32 s14, s14, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s60, 16
; SI-NEXT:    s_lshr_b64 s[58:59], s[12:13], 16
; SI-NEXT:    s_or_b32 s14, s14, s43
; SI-NEXT:    s_and_b32 s15, s15, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s31, 16
; SI-NEXT:    s_lshr_b32 s30, s13, 16
; SI-NEXT:    s_or_b32 s15, s15, s43
; SI-NEXT:    s_and_b32 s12, s12, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s58, 16
; SI-NEXT:    s_lshr_b64 s[56:57], s[10:11], 16
; SI-NEXT:    s_or_b32 s12, s12, s43
; SI-NEXT:    s_and_b32 s13, s13, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s30, 16
; SI-NEXT:    s_lshr_b32 vcc_hi, s11, 16
; SI-NEXT:    s_or_b32 s13, s13, s43
; SI-NEXT:    s_and_b32 s10, s10, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s56, 16
; SI-NEXT:    s_lshr_b64 s[46:47], s[8:9], 16
; SI-NEXT:    s_or_b32 s10, s10, s43
; SI-NEXT:    s_and_b32 s11, s11, 0xffff
; SI-NEXT:    s_lshl_b32 s43, vcc_hi, 16
; SI-NEXT:    s_lshr_b32 vcc_lo, s9, 16
; SI-NEXT:    s_or_b32 s11, s11, s43
; SI-NEXT:    s_and_b32 s8, s8, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s46, 16
; SI-NEXT:    s_lshr_b64 s[44:45], s[6:7], 16
; SI-NEXT:    s_or_b32 s8, s8, s43
; SI-NEXT:    s_and_b32 s9, s9, 0xffff
; SI-NEXT:    s_lshl_b32 s43, vcc_lo, 16
; SI-NEXT:    s_lshr_b32 s94, s5, 16
; SI-NEXT:    s_lshr_b32 s95, s7, 16
; SI-NEXT:    s_or_b32 s9, s9, s43
; SI-NEXT:    s_and_b32 s6, s6, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s44, 16
; SI-NEXT:    s_and_b32 s4, s4, 0xffff
; SI-NEXT:    s_lshl_b32 s42, s42, 16
; SI-NEXT:    s_or_b32 s6, s6, s43
; SI-NEXT:    s_and_b32 s7, s7, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s95, 16
; SI-NEXT:    s_or_b32 s4, s4, s42
; SI-NEXT:    s_and_b32 s5, s5, 0xffff
; SI-NEXT:    s_lshl_b32 s42, s94, 16
; SI-NEXT:    s_or_b32 s7, s7, s43
; SI-NEXT:    s_or_b32 s5, s5, s42
; SI-NEXT:    v_readlane_b32 s30, v28, 8
; SI-NEXT:    v_mov_b32_e32 v0, s16
; SI-NEXT:    v_mov_b32_e32 v1, s17
; SI-NEXT:    v_mov_b32_e32 v2, s18
; SI-NEXT:    v_mov_b32_e32 v3, s19
; SI-NEXT:    v_mov_b32_e32 v4, s20
; SI-NEXT:    v_mov_b32_e32 v5, s21
; SI-NEXT:    v_mov_b32_e32 v6, s22
; SI-NEXT:    v_mov_b32_e32 v7, s23
; SI-NEXT:    v_mov_b32_e32 v8, s24
; SI-NEXT:    v_mov_b32_e32 v9, s25
; SI-NEXT:    v_mov_b32_e32 v10, s26
; SI-NEXT:    v_mov_b32_e32 v11, s27
; SI-NEXT:    v_mov_b32_e32 v12, s28
; SI-NEXT:    v_mov_b32_e32 v13, s29
; SI-NEXT:    v_mov_b32_e32 v14, s40
; SI-NEXT:    v_mov_b32_e32 v15, s41
; SI-NEXT:    v_mov_b32_e32 v16, s14
; SI-NEXT:    v_mov_b32_e32 v17, s15
; SI-NEXT:    v_mov_b32_e32 v18, s12
; SI-NEXT:    v_mov_b32_e32 v19, s13
; SI-NEXT:    v_mov_b32_e32 v20, s10
; SI-NEXT:    v_mov_b32_e32 v21, s11
; SI-NEXT:    v_mov_b32_e32 v22, s8
; SI-NEXT:    v_mov_b32_e32 v23, s9
; SI-NEXT:    v_mov_b32_e32 v24, s6
; SI-NEXT:    v_mov_b32_e32 v25, s7
; SI-NEXT:    v_mov_b32_e32 v26, s4
; SI-NEXT:    v_mov_b32_e32 v27, s5
; SI-NEXT:    v_readlane_b32 s31, v28, 9
; SI-NEXT:    v_readlane_b32 s49, v28, 7
; SI-NEXT:    v_readlane_b32 s48, v28, 6
; SI-NEXT:    v_readlane_b32 s39, v28, 5
; SI-NEXT:    v_readlane_b32 s38, v28, 4
; SI-NEXT:    v_readlane_b32 s37, v28, 3
; SI-NEXT:    v_readlane_b32 s36, v28, 2
; SI-NEXT:    v_readlane_b32 s35, v28, 1
; SI-NEXT:    v_readlane_b32 s34, v28, 0
; SI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v14i64_to_v56i16_scalar:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    v_readfirstlane_b32 s41, v14
; VI-NEXT:    v_readfirstlane_b32 s4, v13
; VI-NEXT:    v_readfirstlane_b32 s5, v12
; VI-NEXT:    v_readfirstlane_b32 s6, v11
; VI-NEXT:    v_readfirstlane_b32 s7, v10
; VI-NEXT:    v_readfirstlane_b32 s8, v9
; VI-NEXT:    v_readfirstlane_b32 s9, v8
; VI-NEXT:    v_readfirstlane_b32 s10, v7
; VI-NEXT:    v_readfirstlane_b32 s11, v6
; VI-NEXT:    v_readfirstlane_b32 s12, v5
; VI-NEXT:    v_readfirstlane_b32 s13, v4
; VI-NEXT:    v_readfirstlane_b32 s14, v3
; VI-NEXT:    v_readfirstlane_b32 s15, v2
; VI-NEXT:    v_readfirstlane_b32 s40, v1
; VI-NEXT:    s_cmp_lg_u32 s41, 0
; VI-NEXT:    v_readfirstlane_b32 s41, v0
; VI-NEXT:    s_cbranch_scc1 .LBB41_2
; VI-NEXT:  ; %bb.1: ; %cmp.true
; VI-NEXT:    s_add_u32 s5, s5, 3
; VI-NEXT:    s_addc_u32 s4, s4, 0
; VI-NEXT:    s_add_u32 s7, s7, 3
; VI-NEXT:    s_addc_u32 s6, s6, 0
; VI-NEXT:    s_add_u32 s9, s9, 3
; VI-NEXT:    s_addc_u32 s8, s8, 0
; VI-NEXT:    s_add_u32 s11, s11, 3
; VI-NEXT:    s_addc_u32 s10, s10, 0
; VI-NEXT:    s_add_u32 s13, s13, 3
; VI-NEXT:    s_addc_u32 s12, s12, 0
; VI-NEXT:    s_add_u32 s15, s15, 3
; VI-NEXT:    s_addc_u32 s14, s14, 0
; VI-NEXT:    s_add_u32 s41, s41, 3
; VI-NEXT:    s_addc_u32 s40, s40, 0
; VI-NEXT:    s_add_u32 s28, s28, 3
; VI-NEXT:    s_addc_u32 s29, s29, 0
; VI-NEXT:    s_add_u32 s26, s26, 3
; VI-NEXT:    s_addc_u32 s27, s27, 0
; VI-NEXT:    s_add_u32 s24, s24, 3
; VI-NEXT:    s_addc_u32 s25, s25, 0
; VI-NEXT:    s_add_u32 s22, s22, 3
; VI-NEXT:    s_addc_u32 s23, s23, 0
; VI-NEXT:    s_add_u32 s20, s20, 3
; VI-NEXT:    s_addc_u32 s21, s21, 0
; VI-NEXT:    s_add_u32 s18, s18, 3
; VI-NEXT:    s_addc_u32 s19, s19, 0
; VI-NEXT:    s_add_u32 s16, s16, 3
; VI-NEXT:    s_addc_u32 s17, s17, 0
; VI-NEXT:  .LBB41_2: ; %cmp.false
; VI-NEXT:    s_lshr_b32 s42, s4, 16
; VI-NEXT:    s_lshr_b32 s43, s5, 16
; VI-NEXT:    s_lshr_b32 s44, s6, 16
; VI-NEXT:    s_lshr_b32 s45, s7, 16
; VI-NEXT:    s_lshr_b32 s46, s8, 16
; VI-NEXT:    s_lshr_b32 s47, s9, 16
; VI-NEXT:    s_lshr_b32 s56, s10, 16
; VI-NEXT:    s_lshr_b32 s57, s11, 16
; VI-NEXT:    s_lshr_b32 s58, s12, 16
; VI-NEXT:    s_lshr_b32 s59, s13, 16
; VI-NEXT:    s_lshr_b32 s60, s14, 16
; VI-NEXT:    s_lshr_b32 s61, s15, 16
; VI-NEXT:    s_lshr_b32 s62, s40, 16
; VI-NEXT:    s_lshr_b32 s63, s41, 16
; VI-NEXT:    s_lshr_b32 s72, s29, 16
; VI-NEXT:    s_lshr_b32 s73, s28, 16
; VI-NEXT:    s_lshr_b32 s74, s27, 16
; VI-NEXT:    s_lshr_b32 s75, s26, 16
; VI-NEXT:    s_lshr_b32 s76, s25, 16
; VI-NEXT:    s_lshr_b32 s77, s24, 16
; VI-NEXT:    s_lshr_b32 s78, s23, 16
; VI-NEXT:    s_lshr_b32 s79, s22, 16
; VI-NEXT:    s_lshr_b32 s88, s21, 16
; VI-NEXT:    s_lshr_b32 s89, s20, 16
; VI-NEXT:    s_lshr_b32 s90, s19, 16
; VI-NEXT:    s_lshr_b32 s91, s18, 16
; VI-NEXT:    s_lshr_b32 vcc_lo, s17, 16
; VI-NEXT:    s_lshr_b32 vcc_hi, s16, 16
; VI-NEXT:    s_and_b32 s16, 0xffff, s16
; VI-NEXT:    s_lshl_b32 vcc_hi, vcc_hi, 16
; VI-NEXT:    s_and_b32 s17, 0xffff, s17
; VI-NEXT:    s_lshl_b32 vcc_lo, vcc_lo, 16
; VI-NEXT:    s_and_b32 s18, 0xffff, s18
; VI-NEXT:    s_lshl_b32 s91, s91, 16
; VI-NEXT:    s_and_b32 s19, 0xffff, s19
; VI-NEXT:    s_lshl_b32 s90, s90, 16
; VI-NEXT:    s_and_b32 s20, 0xffff, s20
; VI-NEXT:    s_lshl_b32 s89, s89, 16
; VI-NEXT:    s_and_b32 s21, 0xffff, s21
; VI-NEXT:    s_lshl_b32 s88, s88, 16
; VI-NEXT:    s_and_b32 s22, 0xffff, s22
; VI-NEXT:    s_lshl_b32 s79, s79, 16
; VI-NEXT:    s_and_b32 s23, 0xffff, s23
; VI-NEXT:    s_lshl_b32 s78, s78, 16
; VI-NEXT:    s_and_b32 s24, 0xffff, s24
; VI-NEXT:    s_lshl_b32 s77, s77, 16
; VI-NEXT:    s_and_b32 s25, 0xffff, s25
; VI-NEXT:    s_lshl_b32 s76, s76, 16
; VI-NEXT:    s_and_b32 s26, 0xffff, s26
; VI-NEXT:    s_lshl_b32 s75, s75, 16
; VI-NEXT:    s_and_b32 s27, 0xffff, s27
; VI-NEXT:    s_lshl_b32 s74, s74, 16
; VI-NEXT:    s_and_b32 s28, 0xffff, s28
; VI-NEXT:    s_lshl_b32 s73, s73, 16
; VI-NEXT:    s_and_b32 s29, 0xffff, s29
; VI-NEXT:    s_lshl_b32 s72, s72, 16
; VI-NEXT:    s_and_b32 s41, 0xffff, s41
; VI-NEXT:    s_lshl_b32 s63, s63, 16
; VI-NEXT:    s_and_b32 s40, 0xffff, s40
; VI-NEXT:    s_lshl_b32 s62, s62, 16
; VI-NEXT:    s_and_b32 s15, 0xffff, s15
; VI-NEXT:    s_lshl_b32 s61, s61, 16
; VI-NEXT:    s_and_b32 s14, 0xffff, s14
; VI-NEXT:    s_lshl_b32 s60, s60, 16
; VI-NEXT:    s_and_b32 s13, 0xffff, s13
; VI-NEXT:    s_lshl_b32 s59, s59, 16
; VI-NEXT:    s_and_b32 s12, 0xffff, s12
; VI-NEXT:    s_lshl_b32 s58, s58, 16
; VI-NEXT:    s_and_b32 s11, 0xffff, s11
; VI-NEXT:    s_lshl_b32 s57, s57, 16
; VI-NEXT:    s_and_b32 s10, 0xffff, s10
; VI-NEXT:    s_lshl_b32 s56, s56, 16
; VI-NEXT:    s_and_b32 s9, 0xffff, s9
; VI-NEXT:    s_lshl_b32 s47, s47, 16
; VI-NEXT:    s_and_b32 s8, 0xffff, s8
; VI-NEXT:    s_lshl_b32 s46, s46, 16
; VI-NEXT:    s_and_b32 s7, 0xffff, s7
; VI-NEXT:    s_lshl_b32 s45, s45, 16
; VI-NEXT:    s_and_b32 s6, 0xffff, s6
; VI-NEXT:    s_lshl_b32 s44, s44, 16
; VI-NEXT:    s_and_b32 s5, 0xffff, s5
; VI-NEXT:    s_lshl_b32 s43, s43, 16
; VI-NEXT:    s_and_b32 s4, 0xffff, s4
; VI-NEXT:    s_lshl_b32 s42, s42, 16
; VI-NEXT:    s_or_b32 s16, s16, vcc_hi
; VI-NEXT:    s_or_b32 s17, s17, vcc_lo
; VI-NEXT:    s_or_b32 s18, s18, s91
; VI-NEXT:    s_or_b32 s19, s19, s90
; VI-NEXT:    s_or_b32 s20, s20, s89
; VI-NEXT:    s_or_b32 s21, s21, s88
; VI-NEXT:    s_or_b32 s22, s22, s79
; VI-NEXT:    s_or_b32 s23, s23, s78
; VI-NEXT:    s_or_b32 s24, s24, s77
; VI-NEXT:    s_or_b32 s25, s25, s76
; VI-NEXT:    s_or_b32 s26, s26, s75
; VI-NEXT:    s_or_b32 s27, s27, s74
; VI-NEXT:    s_or_b32 s28, s28, s73
; VI-NEXT:    s_or_b32 s29, s29, s72
; VI-NEXT:    s_or_b32 s41, s41, s63
; VI-NEXT:    s_or_b32 s40, s40, s62
; VI-NEXT:    s_or_b32 s15, s15, s61
; VI-NEXT:    s_or_b32 s14, s14, s60
; VI-NEXT:    s_or_b32 s13, s13, s59
; VI-NEXT:    s_or_b32 s12, s12, s58
; VI-NEXT:    s_or_b32 s11, s11, s57
; VI-NEXT:    s_or_b32 s10, s10, s56
; VI-NEXT:    s_or_b32 s9, s9, s47
; VI-NEXT:    s_or_b32 s8, s8, s46
; VI-NEXT:    s_or_b32 s7, s7, s45
; VI-NEXT:    s_or_b32 s6, s6, s44
; VI-NEXT:    s_or_b32 s5, s5, s43
; VI-NEXT:    s_or_b32 s4, s4, s42
; VI-NEXT:    v_mov_b32_e32 v0, s16
; VI-NEXT:    v_mov_b32_e32 v1, s17
; VI-NEXT:    v_mov_b32_e32 v2, s18
; VI-NEXT:    v_mov_b32_e32 v3, s19
; VI-NEXT:    v_mov_b32_e32 v4, s20
; VI-NEXT:    v_mov_b32_e32 v5, s21
; VI-NEXT:    v_mov_b32_e32 v6, s22
; VI-NEXT:    v_mov_b32_e32 v7, s23
; VI-NEXT:    v_mov_b32_e32 v8, s24
; VI-NEXT:    v_mov_b32_e32 v9, s25
; VI-NEXT:    v_mov_b32_e32 v10, s26
; VI-NEXT:    v_mov_b32_e32 v11, s27
; VI-NEXT:    v_mov_b32_e32 v12, s28
; VI-NEXT:    v_mov_b32_e32 v13, s29
; VI-NEXT:    v_mov_b32_e32 v14, s41
; VI-NEXT:    v_mov_b32_e32 v15, s40
; VI-NEXT:    v_mov_b32_e32 v16, s15
; VI-NEXT:    v_mov_b32_e32 v17, s14
; VI-NEXT:    v_mov_b32_e32 v18, s13
; VI-NEXT:    v_mov_b32_e32 v19, s12
; VI-NEXT:    v_mov_b32_e32 v20, s11
; VI-NEXT:    v_mov_b32_e32 v21, s10
; VI-NEXT:    v_mov_b32_e32 v22, s9
; VI-NEXT:    v_mov_b32_e32 v23, s8
; VI-NEXT:    v_mov_b32_e32 v24, s7
; VI-NEXT:    v_mov_b32_e32 v25, s6
; VI-NEXT:    v_mov_b32_e32 v26, s5
; VI-NEXT:    v_mov_b32_e32 v27, s4
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v14i64_to_v56i16_scalar:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_readfirstlane_b32 s41, v14
; GFX9-NEXT:    v_readfirstlane_b32 s4, v13
; GFX9-NEXT:    v_readfirstlane_b32 s5, v12
; GFX9-NEXT:    v_readfirstlane_b32 s6, v11
; GFX9-NEXT:    v_readfirstlane_b32 s7, v10
; GFX9-NEXT:    v_readfirstlane_b32 s8, v9
; GFX9-NEXT:    v_readfirstlane_b32 s9, v8
; GFX9-NEXT:    v_readfirstlane_b32 s10, v7
; GFX9-NEXT:    v_readfirstlane_b32 s11, v6
; GFX9-NEXT:    v_readfirstlane_b32 s12, v5
; GFX9-NEXT:    v_readfirstlane_b32 s13, v4
; GFX9-NEXT:    v_readfirstlane_b32 s14, v3
; GFX9-NEXT:    v_readfirstlane_b32 s15, v2
; GFX9-NEXT:    v_readfirstlane_b32 s40, v1
; GFX9-NEXT:    s_cmp_lg_u32 s41, 0
; GFX9-NEXT:    v_readfirstlane_b32 s41, v0
; GFX9-NEXT:    s_cbranch_scc1 .LBB41_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.true
; GFX9-NEXT:    s_add_u32 s5, s5, 3
; GFX9-NEXT:    s_addc_u32 s4, s4, 0
; GFX9-NEXT:    s_add_u32 s7, s7, 3
; GFX9-NEXT:    s_addc_u32 s6, s6, 0
; GFX9-NEXT:    s_add_u32 s9, s9, 3
; GFX9-NEXT:    s_addc_u32 s8, s8, 0
; GFX9-NEXT:    s_add_u32 s11, s11, 3
; GFX9-NEXT:    s_addc_u32 s10, s10, 0
; GFX9-NEXT:    s_add_u32 s13, s13, 3
; GFX9-NEXT:    s_addc_u32 s12, s12, 0
; GFX9-NEXT:    s_add_u32 s15, s15, 3
; GFX9-NEXT:    s_addc_u32 s14, s14, 0
; GFX9-NEXT:    s_add_u32 s41, s41, 3
; GFX9-NEXT:    s_addc_u32 s40, s40, 0
; GFX9-NEXT:    s_add_u32 s28, s28, 3
; GFX9-NEXT:    s_addc_u32 s29, s29, 0
; GFX9-NEXT:    s_add_u32 s26, s26, 3
; GFX9-NEXT:    s_addc_u32 s27, s27, 0
; GFX9-NEXT:    s_add_u32 s24, s24, 3
; GFX9-NEXT:    s_addc_u32 s25, s25, 0
; GFX9-NEXT:    s_add_u32 s22, s22, 3
; GFX9-NEXT:    s_addc_u32 s23, s23, 0
; GFX9-NEXT:    s_add_u32 s20, s20, 3
; GFX9-NEXT:    s_addc_u32 s21, s21, 0
; GFX9-NEXT:    s_add_u32 s18, s18, 3
; GFX9-NEXT:    s_addc_u32 s19, s19, 0
; GFX9-NEXT:    s_add_u32 s16, s16, 3
; GFX9-NEXT:    s_addc_u32 s17, s17, 0
; GFX9-NEXT:  .LBB41_2: ; %cmp.false
; GFX9-NEXT:    s_lshr_b32 s42, s4, 16
; GFX9-NEXT:    s_lshr_b32 s43, s5, 16
; GFX9-NEXT:    s_lshr_b32 s44, s6, 16
; GFX9-NEXT:    s_lshr_b32 s45, s7, 16
; GFX9-NEXT:    s_lshr_b32 s46, s8, 16
; GFX9-NEXT:    s_lshr_b32 s47, s9, 16
; GFX9-NEXT:    s_lshr_b32 s56, s10, 16
; GFX9-NEXT:    s_lshr_b32 s57, s11, 16
; GFX9-NEXT:    s_lshr_b32 s58, s12, 16
; GFX9-NEXT:    s_lshr_b32 s59, s13, 16
; GFX9-NEXT:    s_lshr_b32 s60, s14, 16
; GFX9-NEXT:    s_lshr_b32 s61, s15, 16
; GFX9-NEXT:    s_lshr_b32 s62, s40, 16
; GFX9-NEXT:    s_lshr_b32 s63, s41, 16
; GFX9-NEXT:    s_lshr_b32 s72, s29, 16
; GFX9-NEXT:    s_lshr_b32 s73, s28, 16
; GFX9-NEXT:    s_lshr_b32 s74, s27, 16
; GFX9-NEXT:    s_lshr_b32 s75, s26, 16
; GFX9-NEXT:    s_lshr_b32 s76, s25, 16
; GFX9-NEXT:    s_lshr_b32 s77, s24, 16
; GFX9-NEXT:    s_lshr_b32 s78, s23, 16
; GFX9-NEXT:    s_lshr_b32 s79, s22, 16
; GFX9-NEXT:    s_lshr_b32 s88, s21, 16
; GFX9-NEXT:    s_lshr_b32 s89, s20, 16
; GFX9-NEXT:    s_lshr_b32 s90, s19, 16
; GFX9-NEXT:    s_lshr_b32 s91, s18, 16
; GFX9-NEXT:    s_lshr_b32 s92, s17, 16
; GFX9-NEXT:    s_lshr_b32 s93, s16, 16
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s16, s93
; GFX9-NEXT:    s_pack_ll_b32_b16 s17, s17, s92
; GFX9-NEXT:    s_pack_ll_b32_b16 s18, s18, s91
; GFX9-NEXT:    s_pack_ll_b32_b16 s19, s19, s90
; GFX9-NEXT:    s_pack_ll_b32_b16 s20, s20, s89
; GFX9-NEXT:    s_pack_ll_b32_b16 s21, s21, s88
; GFX9-NEXT:    s_pack_ll_b32_b16 s22, s22, s79
; GFX9-NEXT:    s_pack_ll_b32_b16 s23, s23, s78
; GFX9-NEXT:    s_pack_ll_b32_b16 s24, s24, s77
; GFX9-NEXT:    s_pack_ll_b32_b16 s25, s25, s76
; GFX9-NEXT:    s_pack_ll_b32_b16 s26, s26, s75
; GFX9-NEXT:    s_pack_ll_b32_b16 s27, s27, s74
; GFX9-NEXT:    s_pack_ll_b32_b16 s28, s28, s73
; GFX9-NEXT:    s_pack_ll_b32_b16 s29, s29, s72
; GFX9-NEXT:    s_pack_ll_b32_b16 s41, s41, s63
; GFX9-NEXT:    s_pack_ll_b32_b16 s40, s40, s62
; GFX9-NEXT:    s_pack_ll_b32_b16 s15, s15, s61
; GFX9-NEXT:    s_pack_ll_b32_b16 s14, s14, s60
; GFX9-NEXT:    s_pack_ll_b32_b16 s13, s13, s59
; GFX9-NEXT:    s_pack_ll_b32_b16 s12, s12, s58
; GFX9-NEXT:    s_pack_ll_b32_b16 s11, s11, s57
; GFX9-NEXT:    s_pack_ll_b32_b16 s10, s10, s56
; GFX9-NEXT:    s_pack_ll_b32_b16 s9, s9, s47
; GFX9-NEXT:    s_pack_ll_b32_b16 s8, s8, s46
; GFX9-NEXT:    s_pack_ll_b32_b16 s7, s7, s45
; GFX9-NEXT:    s_pack_ll_b32_b16 s6, s6, s44
; GFX9-NEXT:    s_pack_ll_b32_b16 s5, s5, s43
; GFX9-NEXT:    s_pack_ll_b32_b16 s4, s4, s42
; GFX9-NEXT:    v_mov_b32_e32 v0, s16
; GFX9-NEXT:    v_mov_b32_e32 v1, s17
; GFX9-NEXT:    v_mov_b32_e32 v2, s18
; GFX9-NEXT:    v_mov_b32_e32 v3, s19
; GFX9-NEXT:    v_mov_b32_e32 v4, s20
; GFX9-NEXT:    v_mov_b32_e32 v5, s21
; GFX9-NEXT:    v_mov_b32_e32 v6, s22
; GFX9-NEXT:    v_mov_b32_e32 v7, s23
; GFX9-NEXT:    v_mov_b32_e32 v8, s24
; GFX9-NEXT:    v_mov_b32_e32 v9, s25
; GFX9-NEXT:    v_mov_b32_e32 v10, s26
; GFX9-NEXT:    v_mov_b32_e32 v11, s27
; GFX9-NEXT:    v_mov_b32_e32 v12, s28
; GFX9-NEXT:    v_mov_b32_e32 v13, s29
; GFX9-NEXT:    v_mov_b32_e32 v14, s41
; GFX9-NEXT:    v_mov_b32_e32 v15, s40
; GFX9-NEXT:    v_mov_b32_e32 v16, s15
; GFX9-NEXT:    v_mov_b32_e32 v17, s14
; GFX9-NEXT:    v_mov_b32_e32 v18, s13
; GFX9-NEXT:    v_mov_b32_e32 v19, s12
; GFX9-NEXT:    v_mov_b32_e32 v20, s11
; GFX9-NEXT:    v_mov_b32_e32 v21, s10
; GFX9-NEXT:    v_mov_b32_e32 v22, s9
; GFX9-NEXT:    v_mov_b32_e32 v23, s8
; GFX9-NEXT:    v_mov_b32_e32 v24, s7
; GFX9-NEXT:    v_mov_b32_e32 v25, s6
; GFX9-NEXT:    v_mov_b32_e32 v26, s5
; GFX9-NEXT:    v_mov_b32_e32 v27, s4
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v14i64_to_v56i16_scalar:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_readfirstlane_b32 s14, v10
; GFX11-NEXT:    v_readfirstlane_b32 s4, v9
; GFX11-NEXT:    v_readfirstlane_b32 s5, v8
; GFX11-NEXT:    v_readfirstlane_b32 s6, v7
; GFX11-NEXT:    v_readfirstlane_b32 s7, v6
; GFX11-NEXT:    v_readfirstlane_b32 s8, v5
; GFX11-NEXT:    v_readfirstlane_b32 s9, v4
; GFX11-NEXT:    v_readfirstlane_b32 s10, v3
; GFX11-NEXT:    v_readfirstlane_b32 s11, v2
; GFX11-NEXT:    v_readfirstlane_b32 s12, v1
; GFX11-NEXT:    v_readfirstlane_b32 s13, v0
; GFX11-NEXT:    s_cmp_lg_u32 s14, 0
; GFX11-NEXT:    s_cbranch_scc1 .LBB41_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-NEXT:    s_add_u32 s5, s5, 3
; GFX11-NEXT:    s_addc_u32 s4, s4, 0
; GFX11-NEXT:    s_add_u32 s7, s7, 3
; GFX11-NEXT:    s_addc_u32 s6, s6, 0
; GFX11-NEXT:    s_add_u32 s9, s9, 3
; GFX11-NEXT:    s_addc_u32 s8, s8, 0
; GFX11-NEXT:    s_add_u32 s11, s11, 3
; GFX11-NEXT:    s_addc_u32 s10, s10, 0
; GFX11-NEXT:    s_add_u32 s13, s13, 3
; GFX11-NEXT:    s_addc_u32 s12, s12, 0
; GFX11-NEXT:    s_add_u32 s28, s28, 3
; GFX11-NEXT:    s_addc_u32 s29, s29, 0
; GFX11-NEXT:    s_add_u32 s26, s26, 3
; GFX11-NEXT:    s_addc_u32 s27, s27, 0
; GFX11-NEXT:    s_add_u32 s24, s24, 3
; GFX11-NEXT:    s_addc_u32 s25, s25, 0
; GFX11-NEXT:    s_add_u32 s22, s22, 3
; GFX11-NEXT:    s_addc_u32 s23, s23, 0
; GFX11-NEXT:    s_add_u32 s20, s20, 3
; GFX11-NEXT:    s_addc_u32 s21, s21, 0
; GFX11-NEXT:    s_add_u32 s18, s18, 3
; GFX11-NEXT:    s_addc_u32 s19, s19, 0
; GFX11-NEXT:    s_add_u32 s16, s16, 3
; GFX11-NEXT:    s_addc_u32 s17, s17, 0
; GFX11-NEXT:    s_add_u32 s2, s2, 3
; GFX11-NEXT:    s_addc_u32 s3, s3, 0
; GFX11-NEXT:    s_add_u32 s0, s0, 3
; GFX11-NEXT:    s_addc_u32 s1, s1, 0
; GFX11-NEXT:  .LBB41_2: ; %cmp.false
; GFX11-NEXT:    s_lshr_b32 s14, s4, 16
; GFX11-NEXT:    s_lshr_b32 s15, s5, 16
; GFX11-NEXT:    s_lshr_b32 s40, s6, 16
; GFX11-NEXT:    s_lshr_b32 s41, s7, 16
; GFX11-NEXT:    s_lshr_b32 s42, s8, 16
; GFX11-NEXT:    s_lshr_b32 s43, s9, 16
; GFX11-NEXT:    s_lshr_b32 s44, s10, 16
; GFX11-NEXT:    s_lshr_b32 s45, s11, 16
; GFX11-NEXT:    s_lshr_b32 s46, s12, 16
; GFX11-NEXT:    s_lshr_b32 s47, s13, 16
; GFX11-NEXT:    s_lshr_b32 s56, s29, 16
; GFX11-NEXT:    s_lshr_b32 s57, s28, 16
; GFX11-NEXT:    s_lshr_b32 s58, s27, 16
; GFX11-NEXT:    s_lshr_b32 s59, s26, 16
; GFX11-NEXT:    s_lshr_b32 s60, s25, 16
; GFX11-NEXT:    s_lshr_b32 s61, s24, 16
; GFX11-NEXT:    s_lshr_b32 s62, s23, 16
; GFX11-NEXT:    s_lshr_b32 s63, s22, 16
; GFX11-NEXT:    s_lshr_b32 s72, s21, 16
; GFX11-NEXT:    s_lshr_b32 s73, s20, 16
; GFX11-NEXT:    s_lshr_b32 s74, s19, 16
; GFX11-NEXT:    s_lshr_b32 s75, s18, 16
; GFX11-NEXT:    s_lshr_b32 s76, s17, 16
; GFX11-NEXT:    s_lshr_b32 s77, s16, 16
; GFX11-NEXT:    s_lshr_b32 s78, s3, 16
; GFX11-NEXT:    s_lshr_b32 s79, s2, 16
; GFX11-NEXT:    s_lshr_b32 s88, s1, 16
; GFX11-NEXT:    s_lshr_b32 s89, s0, 16
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s1, s88
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s0, s89
; GFX11-NEXT:    s_pack_ll_b32_b16 s2, s2, s79
; GFX11-NEXT:    s_pack_ll_b32_b16 s3, s3, s78
; GFX11-NEXT:    s_pack_ll_b32_b16 s16, s16, s77
; GFX11-NEXT:    s_pack_ll_b32_b16 s17, s17, s76
; GFX11-NEXT:    s_pack_ll_b32_b16 s18, s18, s75
; GFX11-NEXT:    s_pack_ll_b32_b16 s19, s19, s74
; GFX11-NEXT:    s_pack_ll_b32_b16 s20, s20, s73
; GFX11-NEXT:    s_pack_ll_b32_b16 s21, s21, s72
; GFX11-NEXT:    s_pack_ll_b32_b16 s22, s22, s63
; GFX11-NEXT:    s_pack_ll_b32_b16 s23, s23, s62
; GFX11-NEXT:    s_pack_ll_b32_b16 s24, s24, s61
; GFX11-NEXT:    s_pack_ll_b32_b16 s25, s25, s60
; GFX11-NEXT:    s_pack_ll_b32_b16 s26, s26, s59
; GFX11-NEXT:    s_pack_ll_b32_b16 s27, s27, s58
; GFX11-NEXT:    s_pack_ll_b32_b16 s28, s28, s57
; GFX11-NEXT:    s_pack_ll_b32_b16 s29, s29, s56
; GFX11-NEXT:    s_pack_ll_b32_b16 s13, s13, s47
; GFX11-NEXT:    s_pack_ll_b32_b16 s12, s12, s46
; GFX11-NEXT:    s_pack_ll_b32_b16 s11, s11, s45
; GFX11-NEXT:    s_pack_ll_b32_b16 s10, s10, s44
; GFX11-NEXT:    s_pack_ll_b32_b16 s9, s9, s43
; GFX11-NEXT:    s_pack_ll_b32_b16 s8, s8, s42
; GFX11-NEXT:    s_pack_ll_b32_b16 s7, s7, s41
; GFX11-NEXT:    s_pack_ll_b32_b16 s6, s6, s40
; GFX11-NEXT:    s_pack_ll_b32_b16 s5, s5, s15
; GFX11-NEXT:    s_pack_ll_b32_b16 s4, s4, s14
; GFX11-NEXT:    v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX11-NEXT:    v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; GFX11-NEXT:    v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
; GFX11-NEXT:    v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
; GFX11-NEXT:    v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
; GFX11-NEXT:    v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
; GFX11-NEXT:    v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
; GFX11-NEXT:    v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
; GFX11-NEXT:    v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
; GFX11-NEXT:    v_dual_mov_b32 v18, s13 :: v_dual_mov_b32 v19, s12
; GFX11-NEXT:    v_dual_mov_b32 v20, s11 :: v_dual_mov_b32 v21, s10
; GFX11-NEXT:    v_dual_mov_b32 v22, s9 :: v_dual_mov_b32 v23, s8
; GFX11-NEXT:    v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s6
; GFX11-NEXT:    v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s4
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = add <14 x i64> %a, splat (i64 3)
  %a2 = bitcast <14 x i64> %a1 to <56 x i16>
  br label %end

cmp.false:
  %a3 = bitcast <14 x i64> %a to <56 x i16>
  br label %end

end:
  %phi = phi <56 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <56 x i16> %phi
}

define <14 x i64> @bitcast_v56i16_to_v14i64(<56 x i16> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v56i16_to_v14i64:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    v_mov_b32_e32 v37, v22
; SI-NEXT:    v_mov_b32_e32 v38, v21
; SI-NEXT:    v_mov_b32_e32 v39, v20
; SI-NEXT:    v_mov_b32_e32 v48, v19
; SI-NEXT:    v_mov_b32_e32 v49, v18
; SI-NEXT:    v_mov_b32_e32 v50, v17
; SI-NEXT:    v_mov_b32_e32 v51, v16
; SI-NEXT:    v_mov_b32_e32 v52, v15
; SI-NEXT:    v_mov_b32_e32 v53, v14
; SI-NEXT:    v_mov_b32_e32 v54, v13
; SI-NEXT:    v_mov_b32_e32 v55, v12
; SI-NEXT:    v_mov_b32_e32 v40, v11
; SI-NEXT:    v_mov_b32_e32 v41, v10
; SI-NEXT:    v_mov_b32_e32 v42, v9
; SI-NEXT:    v_mov_b32_e32 v43, v8
; SI-NEXT:    v_mov_b32_e32 v44, v7
; SI-NEXT:    v_mov_b32_e32 v45, v6
; SI-NEXT:    v_mov_b32_e32 v46, v5
; SI-NEXT:    v_mov_b32_e32 v47, v4
; SI-NEXT:    v_mov_b32_e32 v56, v3
; SI-NEXT:    s_waitcnt expcnt(6)
; SI-NEXT:    v_mov_b32_e32 v57, v2
; SI-NEXT:    s_waitcnt expcnt(5)
; SI-NEXT:    v_mov_b32_e32 v58, v1
; SI-NEXT:    s_waitcnt expcnt(4)
; SI-NEXT:    v_mov_b32_e32 v59, v0
; SI-NEXT:    buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v27
; SI-NEXT:    buffer_store_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT:    v_lshrrev_b32_e32 v1, 16, v26
; SI-NEXT:    buffer_store_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT:    v_lshrrev_b32_e32 v2, 16, v25
; SI-NEXT:    buffer_store_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT:    v_lshrrev_b32_e32 v3, 16, v24
; SI-NEXT:    buffer_store_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT:    v_lshrrev_b32_e32 v4, 16, v23
; SI-NEXT:    v_lshrrev_b32_e32 v5, 16, v37
; SI-NEXT:    v_lshrrev_b32_e32 v6, 16, v38
; SI-NEXT:    v_lshrrev_b32_e32 v7, 16, v39
; SI-NEXT:    v_lshrrev_b32_e32 v8, 16, v48
; SI-NEXT:    v_lshrrev_b32_e32 v9, 16, v49
; SI-NEXT:    v_lshrrev_b32_e32 v10, 16, v50
; SI-NEXT:    v_lshrrev_b32_e32 v11, 16, v51
; SI-NEXT:    v_lshrrev_b32_e32 v12, 16, v52
; SI-NEXT:    v_lshrrev_b32_e32 v13, 16, v53
; SI-NEXT:    v_lshrrev_b32_e32 v14, 16, v54
; SI-NEXT:    v_lshrrev_b32_e32 v15, 16, v55
; SI-NEXT:    v_lshrrev_b32_e32 v16, 16, v40
; SI-NEXT:    v_lshrrev_b32_e32 v17, 16, v41
; SI-NEXT:    v_lshrrev_b32_e32 v18, 16, v42
; SI-NEXT:    v_lshrrev_b32_e32 v19, 16, v43
; SI-NEXT:    v_lshrrev_b32_e32 v20, 16, v44
; SI-NEXT:    v_lshrrev_b32_e32 v21, 16, v45
; SI-NEXT:    v_lshrrev_b32_e32 v22, 16, v46
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v23, 16, v47
; SI-NEXT:    v_lshrrev_b32_e32 v24, 16, v56
; SI-NEXT:    v_lshrrev_b32_e32 v25, 16, v57
; SI-NEXT:    v_lshrrev_b32_e32 v26, 16, v58
; SI-NEXT:    v_lshrrev_b32_e32 v27, 16, v59
; SI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT:    v_lshlrev_b32_e32 v32, 16, v27
; SI-NEXT:    v_lshlrev_b32_e32 v36, 16, v26
; SI-NEXT:    v_lshlrev_b32_e32 v61, 16, v25
; SI-NEXT:    v_lshlrev_b32_e32 v35, 16, v24
; SI-NEXT:    v_lshlrev_b32_e32 v60, 16, v23
; SI-NEXT:    v_lshlrev_b32_e32 v34, 16, v22
; SI-NEXT:    v_lshlrev_b32_e32 v63, 16, v21
; SI-NEXT:    v_lshlrev_b32_e32 v33, 16, v20
; SI-NEXT:    v_lshlrev_b32_e32 v62, 16, v19
; SI-NEXT:    v_lshlrev_b32_e32 v18, 16, v18
; SI-NEXT:    v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT:    v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT:    v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT:    v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT:    v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT:    v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT:    v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT:    v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT:    v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT:    v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT:    v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT:    v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT:    v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT:    v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
; SI-NEXT:    buffer_store_dword v18, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v16, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v13, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v11, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v8, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v7, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v6, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v5, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v4, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT:    ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB42_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v19, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT:    v_and_b32_e32 v9, 0xffff, v42
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v59
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v58
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v57
; SI-NEXT:    v_and_b32_e32 v3, 0xffff, v56
; SI-NEXT:    v_and_b32_e32 v4, 0xffff, v47
; SI-NEXT:    v_and_b32_e32 v5, 0xffff, v46
; SI-NEXT:    v_and_b32_e32 v6, 0xffff, v45
; SI-NEXT:    v_and_b32_e32 v7, 0xffff, v44
; SI-NEXT:    v_and_b32_e32 v8, 0xffff, v43
; SI-NEXT:    v_or_b32_e32 v0, v0, v32
; SI-NEXT:    v_or_b32_e32 v1, v1, v36
; SI-NEXT:    v_or_b32_e32 v2, v2, v61
; SI-NEXT:    v_or_b32_e32 v3, v3, v35
; SI-NEXT:    v_or_b32_e32 v4, v4, v60
; SI-NEXT:    v_or_b32_e32 v5, v5, v34
; SI-NEXT:    v_or_b32_e32 v6, v6, v63
; SI-NEXT:    v_or_b32_e32 v7, v7, v33
; SI-NEXT:    v_or_b32_e32 v8, v8, v62
; SI-NEXT:    ; implicit-def: $vgpr59
; SI-NEXT:    ; implicit-def: $vgpr58
; SI-NEXT:    ; implicit-def: $vgpr57
; SI-NEXT:    ; implicit-def: $vgpr56
; SI-NEXT:    ; implicit-def: $vgpr47
; SI-NEXT:    ; implicit-def: $vgpr46
; SI-NEXT:    ; implicit-def: $vgpr45
; SI-NEXT:    ; implicit-def: $vgpr44
; SI-NEXT:    ; implicit-def: $vgpr43
; SI-NEXT:    ; implicit-def: $vgpr42
; SI-NEXT:    ; implicit-def: $vgpr32
; SI-NEXT:    ; implicit-def: $vgpr36
; SI-NEXT:    ; implicit-def: $vgpr61
; SI-NEXT:    ; implicit-def: $vgpr35
; SI-NEXT:    ; implicit-def: $vgpr60
; SI-NEXT:    ; implicit-def: $vgpr34
; SI-NEXT:    ; implicit-def: $vgpr63
; SI-NEXT:    ; implicit-def: $vgpr33
; SI-NEXT:    ; implicit-def: $vgpr62
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(14)
; SI-NEXT:    v_or_b32_e32 v9, v9, v10
; SI-NEXT:    v_and_b32_e32 v10, 0xffff, v41
; SI-NEXT:    v_or_b32_e32 v10, v10, v11
; SI-NEXT:    v_and_b32_e32 v11, 0xffff, v40
; SI-NEXT:    v_or_b32_e32 v11, v11, v12
; SI-NEXT:    v_and_b32_e32 v12, 0xffff, v55
; SI-NEXT:    v_or_b32_e32 v12, v12, v13
; SI-NEXT:    v_and_b32_e32 v13, 0xffff, v54
; SI-NEXT:    v_or_b32_e32 v13, v13, v14
; SI-NEXT:    v_and_b32_e32 v14, 0xffff, v53
; SI-NEXT:    s_waitcnt vmcnt(13)
; SI-NEXT:    v_or_b32_e32 v14, v14, v15
; SI-NEXT:    v_and_b32_e32 v15, 0xffff, v52
; SI-NEXT:    s_waitcnt vmcnt(12)
; SI-NEXT:    v_or_b32_e32 v15, v15, v16
; SI-NEXT:    v_and_b32_e32 v16, 0xffff, v51
; SI-NEXT:    s_waitcnt vmcnt(11)
; SI-NEXT:    v_or_b32_e32 v16, v16, v17
; SI-NEXT:    v_and_b32_e32 v17, 0xffff, v50
; SI-NEXT:    s_waitcnt vmcnt(10)
; SI-NEXT:    v_or_b32_e32 v17, v17, v18
; SI-NEXT:    v_and_b32_e32 v18, 0xffff, v49
; SI-NEXT:    s_waitcnt vmcnt(9)
; SI-NEXT:    v_or_b32_e32 v18, v18, v19
; SI-NEXT:    v_and_b32_e32 v19, 0xffff, v48
; SI-NEXT:    s_waitcnt vmcnt(8)
; SI-NEXT:    v_or_b32_e32 v19, v19, v20
; SI-NEXT:    v_and_b32_e32 v20, 0xffff, v39
; SI-NEXT:    s_waitcnt vmcnt(7)
; SI-NEXT:    v_or_b32_e32 v20, v20, v21
; SI-NEXT:    v_and_b32_e32 v21, 0xffff, v38
; SI-NEXT:    s_waitcnt vmcnt(6)
; SI-NEXT:    v_or_b32_e32 v21, v21, v22
; SI-NEXT:    v_and_b32_e32 v22, 0xffff, v37
; SI-NEXT:    s_waitcnt vmcnt(5)
; SI-NEXT:    v_or_b32_e32 v22, v22, v23
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT:    ; implicit-def: $vgpr41
; SI-NEXT:    ; implicit-def: $vgpr40
; SI-NEXT:    ; implicit-def: $vgpr55
; SI-NEXT:    ; implicit-def: $vgpr54
; SI-NEXT:    ; implicit-def: $vgpr53
; SI-NEXT:    ; implicit-def: $vgpr52
; SI-NEXT:    ; implicit-def: $vgpr51
; SI-NEXT:    ; implicit-def: $vgpr50
; SI-NEXT:    ; implicit-def: $vgpr49
; SI-NEXT:    ; implicit-def: $vgpr48
; SI-NEXT:    ; implicit-def: $vgpr39
; SI-NEXT:    ; implicit-def: $vgpr38
; SI-NEXT:    ; implicit-def: $vgpr37
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT:    v_or_b32_e32 v23, v23, v24
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT:    v_or_b32_e32 v24, v24, v25
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT:    v_or_b32_e32 v25, v25, v26
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT:    v_or_b32_e32 v26, v26, v27
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT:    v_or_b32_e32 v27, v27, v28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:  .LBB42_2: ; %Flow
; SI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB42_4
; SI-NEXT:  ; %bb.3: ; %cmp.true
; SI-NEXT:    buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v19, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT:    v_add_i32_e32 v9, vcc, 3, v42
; SI-NEXT:    v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_add_i32_e32 v0, vcc, 3, v59
; SI-NEXT:    v_add_i32_e32 v1, vcc, 3, v58
; SI-NEXT:    v_add_i32_e32 v2, vcc, 3, v57
; SI-NEXT:    v_add_i32_e32 v3, vcc, 3, v56
; SI-NEXT:    v_add_i32_e32 v4, vcc, 3, v47
; SI-NEXT:    v_add_i32_e32 v5, vcc, 3, v46
; SI-NEXT:    v_add_i32_e32 v6, vcc, 3, v45
; SI-NEXT:    v_add_i32_e32 v7, vcc, 3, v44
; SI-NEXT:    v_add_i32_e32 v8, vcc, 3, v43
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT:    v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT:    v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT:    v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT:    v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT:    v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT:    v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT:    v_or_b32_e32 v0, v32, v0
; SI-NEXT:    v_or_b32_e32 v1, v36, v1
; SI-NEXT:    v_or_b32_e32 v2, v61, v2
; SI-NEXT:    v_or_b32_e32 v3, v35, v3
; SI-NEXT:    v_or_b32_e32 v4, v60, v4
; SI-NEXT:    v_or_b32_e32 v5, v34, v5
; SI-NEXT:    v_or_b32_e32 v6, v63, v6
; SI-NEXT:    v_or_b32_e32 v7, v33, v7
; SI-NEXT:    v_or_b32_e32 v8, v62, v8
; SI-NEXT:    v_add_i32_e32 v0, vcc, 0x30000, v0
; SI-NEXT:    v_add_i32_e32 v1, vcc, 0x30000, v1
; SI-NEXT:    v_add_i32_e32 v2, vcc, 0x30000, v2
; SI-NEXT:    v_add_i32_e32 v3, vcc, 0x30000, v3
; SI-NEXT:    v_add_i32_e32 v4, vcc, 0x30000, v4
; SI-NEXT:    v_add_i32_e32 v5, vcc, 0x30000, v5
; SI-NEXT:    v_add_i32_e32 v6, vcc, 0x30000, v6
; SI-NEXT:    v_add_i32_e32 v7, vcc, 0x30000, v7
; SI-NEXT:    v_add_i32_e32 v8, vcc, 0x30000, v8
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(14)
; SI-NEXT:    v_or_b32_e32 v9, v10, v9
; SI-NEXT:    v_add_i32_e32 v10, vcc, 3, v41
; SI-NEXT:    v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT:    v_or_b32_e32 v10, v11, v10
; SI-NEXT:    v_add_i32_e32 v11, vcc, 3, v40
; SI-NEXT:    v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT:    v_or_b32_e32 v11, v12, v11
; SI-NEXT:    v_add_i32_e32 v12, vcc, 3, v55
; SI-NEXT:    v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT:    v_or_b32_e32 v12, v13, v12
; SI-NEXT:    v_add_i32_e32 v13, vcc, 3, v54
; SI-NEXT:    v_and_b32_e32 v13, 0xffff, v13
; SI-NEXT:    v_or_b32_e32 v13, v14, v13
; SI-NEXT:    v_add_i32_e32 v14, vcc, 3, v53
; SI-NEXT:    v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT:    s_waitcnt vmcnt(13)
; SI-NEXT:    v_or_b32_e32 v14, v15, v14
; SI-NEXT:    v_add_i32_e32 v15, vcc, 3, v52
; SI-NEXT:    v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT:    s_waitcnt vmcnt(12)
; SI-NEXT:    v_or_b32_e32 v15, v16, v15
; SI-NEXT:    v_add_i32_e32 v16, vcc, 3, v51
; SI-NEXT:    v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT:    s_waitcnt vmcnt(11)
; SI-NEXT:    v_or_b32_e32 v16, v17, v16
; SI-NEXT:    v_add_i32_e32 v17, vcc, 3, v50
; SI-NEXT:    v_and_b32_e32 v17, 0xffff, v17
; SI-NEXT:    s_waitcnt vmcnt(10)
; SI-NEXT:    v_or_b32_e32 v17, v18, v17
; SI-NEXT:    v_add_i32_e32 v18, vcc, 3, v49
; SI-NEXT:    v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT:    s_waitcnt vmcnt(9)
; SI-NEXT:    v_or_b32_e32 v18, v19, v18
; SI-NEXT:    v_add_i32_e32 v19, vcc, 3, v48
; SI-NEXT:    v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT:    s_waitcnt vmcnt(8)
; SI-NEXT:    v_or_b32_e32 v19, v20, v19
; SI-NEXT:    v_add_i32_e32 v20, vcc, 3, v39
; SI-NEXT:    v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT:    s_waitcnt vmcnt(7)
; SI-NEXT:    v_or_b32_e32 v20, v21, v20
; SI-NEXT:    v_add_i32_e32 v21, vcc, 3, v38
; SI-NEXT:    v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT:    s_waitcnt vmcnt(6)
; SI-NEXT:    v_or_b32_e32 v21, v22, v21
; SI-NEXT:    v_add_i32_e32 v22, vcc, 3, v37
; SI-NEXT:    v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT:    s_waitcnt vmcnt(5)
; SI-NEXT:    v_or_b32_e32 v22, v23, v22
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT:    v_add_i32_e32 v9, vcc, 0x30000, v9
; SI-NEXT:    v_add_i32_e32 v10, vcc, 0x30000, v10
; SI-NEXT:    v_add_i32_e32 v11, vcc, 0x30000, v11
; SI-NEXT:    v_add_i32_e32 v12, vcc, 0x30000, v12
; SI-NEXT:    v_add_i32_e32 v13, vcc, 0x30000, v13
; SI-NEXT:    v_add_i32_e32 v14, vcc, 0x30000, v14
; SI-NEXT:    v_add_i32_e32 v15, vcc, 0x30000, v15
; SI-NEXT:    v_add_i32_e32 v16, vcc, 0x30000, v16
; SI-NEXT:    v_add_i32_e32 v17, vcc, 0x30000, v17
; SI-NEXT:    v_add_i32_e32 v18, vcc, 0x30000, v18
; SI-NEXT:    v_add_i32_e32 v19, vcc, 0x30000, v19
; SI-NEXT:    v_add_i32_e32 v20, vcc, 0x30000, v20
; SI-NEXT:    v_add_i32_e32 v21, vcc, 0x30000, v21
; SI-NEXT:    v_add_i32_e32 v22, vcc, 0x30000, v22
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_add_i32_e32 v23, vcc, 3, v23
; SI-NEXT:    v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT:    v_or_b32_e32 v23, v24, v23
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT:    v_add_i32_e32 v23, vcc, 0x30000, v23
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_add_i32_e32 v24, vcc, 3, v24
; SI-NEXT:    v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT:    v_or_b32_e32 v24, v25, v24
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT:    v_add_i32_e32 v24, vcc, 0x30000, v24
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_add_i32_e32 v25, vcc, 3, v25
; SI-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT:    v_or_b32_e32 v25, v26, v25
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT:    v_add_i32_e32 v25, vcc, 0x30000, v25
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_add_i32_e32 v26, vcc, 3, v26
; SI-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT:    v_or_b32_e32 v26, v27, v26
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT:    v_add_i32_e32 v26, vcc, 0x30000, v26
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_add_i32_e32 v27, vcc, 3, v27
; SI-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT:    v_or_b32_e32 v27, v28, v27
; SI-NEXT:    v_add_i32_e32 v27, vcc, 0x30000, v27
; SI-NEXT:  .LBB42_4: ; %end
; SI-NEXT:    s_or_b64 exec, exec, s[4:5]
; SI-NEXT:    buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v56i16_to_v14i64:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v56, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v58, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v59, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    v_mov_b32_e32 v32, v27
; VI-NEXT:    v_mov_b32_e32 v33, v26
; VI-NEXT:    v_mov_b32_e32 v34, v25
; VI-NEXT:    v_mov_b32_e32 v35, v24
; VI-NEXT:    v_mov_b32_e32 v36, v23
; VI-NEXT:    v_mov_b32_e32 v37, v22
; VI-NEXT:    v_mov_b32_e32 v38, v21
; VI-NEXT:    v_mov_b32_e32 v39, v20
; VI-NEXT:    v_mov_b32_e32 v48, v19
; VI-NEXT:    v_mov_b32_e32 v49, v18
; VI-NEXT:    v_mov_b32_e32 v50, v17
; VI-NEXT:    v_mov_b32_e32 v51, v16
; VI-NEXT:    v_mov_b32_e32 v52, v15
; VI-NEXT:    v_mov_b32_e32 v53, v14
; VI-NEXT:    v_mov_b32_e32 v54, v13
; VI-NEXT:    v_mov_b32_e32 v55, v12
; VI-NEXT:    v_mov_b32_e32 v40, v11
; VI-NEXT:    v_mov_b32_e32 v41, v10
; VI-NEXT:    v_mov_b32_e32 v42, v9
; VI-NEXT:    v_mov_b32_e32 v43, v8
; VI-NEXT:    v_mov_b32_e32 v44, v7
; VI-NEXT:    v_mov_b32_e32 v45, v6
; VI-NEXT:    v_mov_b32_e32 v46, v5
; VI-NEXT:    v_mov_b32_e32 v47, v4
; VI-NEXT:    v_mov_b32_e32 v56, v3
; VI-NEXT:    v_mov_b32_e32 v57, v2
; VI-NEXT:    v_mov_b32_e32 v58, v1
; VI-NEXT:    v_mov_b32_e32 v59, v0
; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT:    ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; VI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB42_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    v_mov_b32_e32 v27, 16
; VI-NEXT:    v_lshlrev_b32_sdwa v0, v27, v59 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v1, v27, v58 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v2, v27, v57 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v3, v27, v56 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v4, v27, v47 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v5, v27, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v6, v27, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v7, v27, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v8, v27, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v9, v27, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v10, v27, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v11, v27, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v12, v27, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v13, v27, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v14, v27, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v15, v27, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v16, v27, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v17, v27, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v18, v27, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v19, v27, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v20, v27, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v21, v27, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v22, v27, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v23, v27, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v24, v27, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v25, v27, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v26, v27, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v27, v27, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_or_b32_sdwa v0, v59, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v1, v58, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v2, v57, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v3, v56, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v4, v47, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v5, v46, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v6, v45, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v7, v44, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v8, v43, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v9, v42, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v10, v41, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v11, v40, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v12, v55, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v13, v54, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v14, v53, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v15, v52, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v16, v51, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v17, v50, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v18, v49, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v19, v48, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v20, v39, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v21, v38, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v22, v37, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v23, v36, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v24, v35, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v25, v34, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v26, v33, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v27, v32, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    ; implicit-def: $vgpr59
; VI-NEXT:    ; implicit-def: $vgpr58
; VI-NEXT:    ; implicit-def: $vgpr57
; VI-NEXT:    ; implicit-def: $vgpr56
; VI-NEXT:    ; implicit-def: $vgpr47
; VI-NEXT:    ; implicit-def: $vgpr46
; VI-NEXT:    ; implicit-def: $vgpr45
; VI-NEXT:    ; implicit-def: $vgpr44
; VI-NEXT:    ; implicit-def: $vgpr43
; VI-NEXT:    ; implicit-def: $vgpr42
; VI-NEXT:    ; implicit-def: $vgpr41
; VI-NEXT:    ; implicit-def: $vgpr40
; VI-NEXT:    ; implicit-def: $vgpr55
; VI-NEXT:    ; implicit-def: $vgpr54
; VI-NEXT:    ; implicit-def: $vgpr53
; VI-NEXT:    ; implicit-def: $vgpr52
; VI-NEXT:    ; implicit-def: $vgpr51
; VI-NEXT:    ; implicit-def: $vgpr50
; VI-NEXT:    ; implicit-def: $vgpr49
; VI-NEXT:    ; implicit-def: $vgpr48
; VI-NEXT:    ; implicit-def: $vgpr39
; VI-NEXT:    ; implicit-def: $vgpr38
; VI-NEXT:    ; implicit-def: $vgpr37
; VI-NEXT:    ; implicit-def: $vgpr36
; VI-NEXT:    ; implicit-def: $vgpr35
; VI-NEXT:    ; implicit-def: $vgpr34
; VI-NEXT:    ; implicit-def: $vgpr33
; VI-NEXT:    ; implicit-def: $vgpr32
; VI-NEXT:  .LBB42_2: ; %Flow
; VI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB42_4
; VI-NEXT:  ; %bb.3: ; %cmp.true
; VI-NEXT:    v_mov_b32_e32 v27, 3
; VI-NEXT:    v_add_u16_e32 v0, 3, v59
; VI-NEXT:    v_add_u16_sdwa v1, v59, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_u16_e32 v2, 3, v58
; VI-NEXT:    v_add_u16_sdwa v3, v58, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v0, v0, v1
; VI-NEXT:    v_or_b32_e32 v1, v2, v3
; VI-NEXT:    v_add_u16_e32 v2, 3, v57
; VI-NEXT:    v_add_u16_sdwa v3, v57, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v2, v2, v3
; VI-NEXT:    v_add_u16_e32 v3, 3, v56
; VI-NEXT:    v_add_u16_sdwa v4, v56, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v3, v3, v4
; VI-NEXT:    v_add_u16_e32 v4, 3, v47
; VI-NEXT:    v_add_u16_sdwa v5, v47, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v4, v4, v5
; VI-NEXT:    v_add_u16_e32 v5, 3, v46
; VI-NEXT:    v_add_u16_sdwa v6, v46, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v5, v5, v6
; VI-NEXT:    v_add_u16_e32 v6, 3, v45
; VI-NEXT:    v_add_u16_sdwa v7, v45, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v6, v6, v7
; VI-NEXT:    v_add_u16_e32 v7, 3, v44
; VI-NEXT:    v_add_u16_sdwa v8, v44, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v7, v7, v8
; VI-NEXT:    v_add_u16_e32 v8, 3, v43
; VI-NEXT:    v_add_u16_sdwa v9, v43, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v8, v8, v9
; VI-NEXT:    v_add_u16_e32 v9, 3, v42
; VI-NEXT:    v_add_u16_sdwa v10, v42, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v9, v9, v10
; VI-NEXT:    v_add_u16_e32 v10, 3, v41
; VI-NEXT:    v_add_u16_sdwa v11, v41, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v10, v10, v11
; VI-NEXT:    v_add_u16_e32 v11, 3, v40
; VI-NEXT:    v_add_u16_sdwa v12, v40, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v11, v11, v12
; VI-NEXT:    v_add_u16_e32 v12, 3, v55
; VI-NEXT:    v_add_u16_sdwa v13, v55, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v12, v12, v13
; VI-NEXT:    v_add_u16_e32 v13, 3, v54
; VI-NEXT:    v_add_u16_sdwa v14, v54, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v13, v13, v14
; VI-NEXT:    v_add_u16_e32 v14, 3, v53
; VI-NEXT:    v_add_u16_sdwa v15, v53, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v14, v14, v15
; VI-NEXT:    v_add_u16_e32 v15, 3, v52
; VI-NEXT:    v_add_u16_sdwa v16, v52, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v15, v15, v16
; VI-NEXT:    v_add_u16_e32 v16, 3, v51
; VI-NEXT:    v_add_u16_sdwa v17, v51, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v16, v16, v17
; VI-NEXT:    v_add_u16_e32 v17, 3, v50
; VI-NEXT:    v_add_u16_sdwa v18, v50, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v17, v17, v18
; VI-NEXT:    v_add_u16_e32 v18, 3, v49
; VI-NEXT:    v_add_u16_sdwa v19, v49, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v18, v18, v19
; VI-NEXT:    v_add_u16_e32 v19, 3, v48
; VI-NEXT:    v_add_u16_sdwa v20, v48, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v19, v19, v20
; VI-NEXT:    v_add_u16_e32 v20, 3, v39
; VI-NEXT:    v_add_u16_sdwa v21, v39, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v20, v20, v21
; VI-NEXT:    v_add_u16_e32 v21, 3, v38
; VI-NEXT:    v_add_u16_sdwa v22, v38, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v21, v21, v22
; VI-NEXT:    v_add_u16_e32 v22, 3, v37
; VI-NEXT:    v_add_u16_sdwa v23, v37, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v22, v22, v23
; VI-NEXT:    v_add_u16_e32 v23, 3, v36
; VI-NEXT:    v_add_u16_sdwa v24, v36, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v23, v23, v24
; VI-NEXT:    v_add_u16_e32 v24, 3, v35
; VI-NEXT:    v_add_u16_sdwa v25, v35, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v24, v24, v25
; VI-NEXT:    v_add_u16_e32 v25, 3, v34
; VI-NEXT:    v_add_u16_sdwa v26, v34, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v25, v25, v26
; VI-NEXT:    v_add_u16_e32 v26, 3, v33
; VI-NEXT:    v_add_u16_sdwa v28, v33, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v26, v26, v28
; VI-NEXT:    v_add_u16_e32 v28, 3, v32
; VI-NEXT:    v_add_u16_sdwa v27, v32, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v27, v28, v27
; VI-NEXT:  .LBB42_4: ; %end
; VI-NEXT:    s_or_b64 exec, exec, s[4:5]
; VI-NEXT:    buffer_load_dword v59, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v58, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v57, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v56, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v56i16_to_v14i64:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    v_mov_b32_e32 v59, v0
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v27
; GFX9-NEXT:    v_mov_b32_e32 v34, v25
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v26
; GFX9-NEXT:    v_mov_b32_e32 v35, v24
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v34
; GFX9-NEXT:    v_mov_b32_e32 v36, v23
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT:    v_mov_b32_e32 v37, v22
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT:    v_mov_b32_e32 v38, v21
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT:    v_mov_b32_e32 v39, v20
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT:    v_mov_b32_e32 v48, v19
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT:    v_mov_b32_e32 v49, v18
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT:    v_mov_b32_e32 v50, v17
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT:    v_mov_b32_e32 v51, v16
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT:    v_mov_b32_e32 v52, v15
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT:    v_mov_b32_e32 v53, v14
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT:    v_mov_b32_e32 v54, v13
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT:    v_mov_b32_e32 v55, v12
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT:    v_mov_b32_e32 v40, v11
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT:    v_mov_b32_e32 v41, v10
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT:    v_mov_b32_e32 v42, v9
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT:    v_mov_b32_e32 v43, v8
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT:    v_mov_b32_e32 v44, v7
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT:    v_mov_b32_e32 v45, v6
; GFX9-NEXT:    v_mov_b32_e32 v46, v5
; GFX9-NEXT:    v_mov_b32_e32 v47, v4
; GFX9-NEXT:    v_mov_b32_e32 v56, v3
; GFX9-NEXT:    v_mov_b32_e32 v57, v2
; GFX9-NEXT:    v_mov_b32_e32 v58, v1
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v44
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v45
; GFX9-NEXT:    v_lshrrev_b32_e32 v62, 16, v46
; GFX9-NEXT:    v_lshrrev_b32_e32 v63, 16, v47
; GFX9-NEXT:    v_lshrrev_b32_e32 v60, 16, v56
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v57
; GFX9-NEXT:    v_lshrrev_b32_e32 v61, 16, v58
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v59
; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT:    buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT:    ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB42_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT:    s_mov_b32 s6, 0x5040100
; GFX9-NEXT:    v_lshrrev_b32_e32 v6, 16, v45
; GFX9-NEXT:    v_lshrrev_b32_e32 v7, 16, v44
; GFX9-NEXT:    v_lshrrev_b32_e32 v8, 16, v43
; GFX9-NEXT:    v_lshrrev_b32_e32 v9, 16, v42
; GFX9-NEXT:    v_lshrrev_b32_e32 v10, 16, v41
; GFX9-NEXT:    v_lshrrev_b32_e32 v11, 16, v40
; GFX9-NEXT:    v_lshrrev_b32_e32 v12, 16, v55
; GFX9-NEXT:    v_lshrrev_b32_e32 v13, 16, v54
; GFX9-NEXT:    v_lshrrev_b32_e32 v14, 16, v53
; GFX9-NEXT:    v_lshrrev_b32_e32 v15, 16, v52
; GFX9-NEXT:    v_lshrrev_b32_e32 v16, 16, v51
; GFX9-NEXT:    v_lshrrev_b32_e32 v17, 16, v50
; GFX9-NEXT:    v_lshrrev_b32_e32 v18, 16, v49
; GFX9-NEXT:    v_lshrrev_b32_e32 v19, 16, v48
; GFX9-NEXT:    v_lshrrev_b32_e32 v20, 16, v39
; GFX9-NEXT:    v_lshrrev_b32_e32 v21, 16, v38
; GFX9-NEXT:    v_lshrrev_b32_e32 v22, 16, v37
; GFX9-NEXT:    v_lshrrev_b32_e32 v23, 16, v36
; GFX9-NEXT:    v_lshrrev_b32_e32 v24, 16, v35
; GFX9-NEXT:    v_lshrrev_b32_e32 v25, 16, v34
; GFX9-NEXT:    v_perm_b32 v0, v33, v59, s6
; GFX9-NEXT:    v_perm_b32 v1, v61, v58, s6
; GFX9-NEXT:    v_perm_b32 v2, v32, v57, s6
; GFX9-NEXT:    v_perm_b32 v3, v60, v56, s6
; GFX9-NEXT:    v_perm_b32 v4, v63, v47, s6
; GFX9-NEXT:    v_perm_b32 v5, v62, v46, s6
; GFX9-NEXT:    v_perm_b32 v6, v6, v45, s6
; GFX9-NEXT:    v_perm_b32 v7, v7, v44, s6
; GFX9-NEXT:    v_perm_b32 v8, v8, v43, s6
; GFX9-NEXT:    v_perm_b32 v9, v9, v42, s6
; GFX9-NEXT:    v_perm_b32 v10, v10, v41, s6
; GFX9-NEXT:    v_perm_b32 v11, v11, v40, s6
; GFX9-NEXT:    v_perm_b32 v12, v12, v55, s6
; GFX9-NEXT:    v_perm_b32 v13, v13, v54, s6
; GFX9-NEXT:    v_perm_b32 v14, v14, v53, s6
; GFX9-NEXT:    v_perm_b32 v15, v15, v52, s6
; GFX9-NEXT:    v_perm_b32 v16, v16, v51, s6
; GFX9-NEXT:    v_perm_b32 v17, v17, v50, s6
; GFX9-NEXT:    v_perm_b32 v18, v18, v49, s6
; GFX9-NEXT:    v_perm_b32 v19, v19, v48, s6
; GFX9-NEXT:    v_perm_b32 v20, v20, v39, s6
; GFX9-NEXT:    v_perm_b32 v21, v21, v38, s6
; GFX9-NEXT:    v_perm_b32 v22, v22, v37, s6
; GFX9-NEXT:    v_perm_b32 v23, v23, v36, s6
; GFX9-NEXT:    v_perm_b32 v24, v24, v35, s6
; GFX9-NEXT:    v_perm_b32 v25, v25, v34, s6
; GFX9-NEXT:    ; implicit-def: $vgpr59
; GFX9-NEXT:    ; implicit-def: $vgpr58
; GFX9-NEXT:    ; implicit-def: $vgpr57
; GFX9-NEXT:    ; implicit-def: $vgpr56
; GFX9-NEXT:    ; implicit-def: $vgpr47
; GFX9-NEXT:    ; implicit-def: $vgpr46
; GFX9-NEXT:    ; implicit-def: $vgpr45
; GFX9-NEXT:    ; implicit-def: $vgpr44
; GFX9-NEXT:    ; implicit-def: $vgpr43
; GFX9-NEXT:    ; implicit-def: $vgpr42
; GFX9-NEXT:    ; implicit-def: $vgpr41
; GFX9-NEXT:    ; implicit-def: $vgpr40
; GFX9-NEXT:    ; implicit-def: $vgpr55
; GFX9-NEXT:    ; implicit-def: $vgpr54
; GFX9-NEXT:    ; implicit-def: $vgpr53
; GFX9-NEXT:    ; implicit-def: $vgpr52
; GFX9-NEXT:    ; implicit-def: $vgpr51
; GFX9-NEXT:    ; implicit-def: $vgpr50
; GFX9-NEXT:    ; implicit-def: $vgpr49
; GFX9-NEXT:    ; implicit-def: $vgpr48
; GFX9-NEXT:    ; implicit-def: $vgpr39
; GFX9-NEXT:    ; implicit-def: $vgpr38
; GFX9-NEXT:    ; implicit-def: $vgpr37
; GFX9-NEXT:    ; implicit-def: $vgpr36
; GFX9-NEXT:    ; implicit-def: $vgpr35
; GFX9-NEXT:    ; implicit-def: $vgpr34
; GFX9-NEXT:    ; implicit-def: $vgpr62
; GFX9-NEXT:    ; implicit-def: $vgpr63
; GFX9-NEXT:    ; implicit-def: $vgpr60
; GFX9-NEXT:    ; implicit-def: $vgpr32
; GFX9-NEXT:    ; implicit-def: $vgpr61
; GFX9-NEXT:    ; implicit-def: $vgpr33
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:  .LBB42_2: ; %Flow
; GFX9-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB42_4
; GFX9-NEXT:  ; %bb.3: ; %cmp.true
; GFX9-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT:    s_mov_b32 s6, 0x5040100
; GFX9-NEXT:    buffer_load_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v7, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v8, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v14, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v19, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT:    v_perm_b32 v0, v33, v59, s6
; GFX9-NEXT:    v_perm_b32 v1, v61, v58, s6
; GFX9-NEXT:    v_perm_b32 v2, v32, v57, s6
; GFX9-NEXT:    v_perm_b32 v3, v60, v56, s6
; GFX9-NEXT:    v_perm_b32 v4, v63, v47, s6
; GFX9-NEXT:    v_perm_b32 v5, v62, v46, s6
; GFX9-NEXT:    v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_waitcnt vmcnt(20)
; GFX9-NEXT:    v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT:    s_waitcnt vmcnt(21)
; GFX9-NEXT:    v_perm_b32 v6, v6, v45, s6
; GFX9-NEXT:    s_waitcnt vmcnt(20)
; GFX9-NEXT:    v_perm_b32 v7, v7, v44, s6
; GFX9-NEXT:    s_waitcnt vmcnt(19)
; GFX9-NEXT:    v_perm_b32 v8, v8, v43, s6
; GFX9-NEXT:    s_waitcnt vmcnt(18)
; GFX9-NEXT:    v_perm_b32 v9, v9, v42, s6
; GFX9-NEXT:    s_waitcnt vmcnt(17)
; GFX9-NEXT:    v_perm_b32 v10, v10, v41, s6
; GFX9-NEXT:    s_waitcnt vmcnt(16)
; GFX9-NEXT:    v_perm_b32 v11, v11, v40, s6
; GFX9-NEXT:    s_waitcnt vmcnt(15)
; GFX9-NEXT:    v_perm_b32 v12, v12, v55, s6
; GFX9-NEXT:    s_waitcnt vmcnt(14)
; GFX9-NEXT:    v_perm_b32 v13, v13, v54, s6
; GFX9-NEXT:    s_waitcnt vmcnt(13)
; GFX9-NEXT:    v_perm_b32 v14, v14, v53, s6
; GFX9-NEXT:    s_waitcnt vmcnt(12)
; GFX9-NEXT:    v_perm_b32 v15, v15, v52, s6
; GFX9-NEXT:    s_waitcnt vmcnt(11)
; GFX9-NEXT:    v_perm_b32 v16, v16, v51, s6
; GFX9-NEXT:    s_waitcnt vmcnt(10)
; GFX9-NEXT:    v_perm_b32 v17, v17, v50, s6
; GFX9-NEXT:    s_waitcnt vmcnt(9)
; GFX9-NEXT:    v_perm_b32 v18, v18, v49, s6
; GFX9-NEXT:    s_waitcnt vmcnt(8)
; GFX9-NEXT:    v_perm_b32 v19, v19, v48, s6
; GFX9-NEXT:    s_waitcnt vmcnt(7)
; GFX9-NEXT:    v_perm_b32 v20, v20, v39, s6
; GFX9-NEXT:    s_waitcnt vmcnt(6)
; GFX9-NEXT:    v_perm_b32 v21, v21, v38, s6
; GFX9-NEXT:    s_waitcnt vmcnt(5)
; GFX9-NEXT:    v_perm_b32 v22, v22, v37, s6
; GFX9-NEXT:    s_waitcnt vmcnt(4)
; GFX9-NEXT:    v_perm_b32 v23, v23, v36, s6
; GFX9-NEXT:    s_waitcnt vmcnt(3)
; GFX9-NEXT:    v_perm_b32 v24, v24, v35, s6
; GFX9-NEXT:    s_waitcnt vmcnt(2)
; GFX9-NEXT:    v_perm_b32 v25, v25, v34, s6
; GFX9-NEXT:    v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT:    v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
; GFX9-NEXT:  .LBB42_4: ; %end
; GFX9-NEXT:    s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT:    buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-TRUE16-LABEL: bitcast_v56i16_to_v14i64:
; GFX11-TRUE16:       ; %bb.0:
; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-TRUE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT:    s_cbranch_execz .LBB42_2
; GFX11-TRUE16-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:  .LBB42_2: ; %end
; GFX11-TRUE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v56i16_to_v14i64:
; GFX11-FAKE16:       ; %bb.0:
; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v0
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v2
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v80, 16, v3
; GFX11-FAKE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v28
; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v69, v0, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v1, v70, v1, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v2, v71, v2, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v3, v80, v3, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v4, v68, v4, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v5, v67, v5, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v6, v66, v6, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v7, v65, v7, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v8, v64, v8, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v9, v55, v9, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v10, v54, v10, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v11, v53, v11, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v12, v52, v12, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v13, v51, v13, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v14, v50, v14, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v15, v49, v15, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v16, v48, v16, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v17, v39, v17, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v18, v38, v18, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v19, v37, v19, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v20, v36, v20, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v21, v35, v21, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v22, v34, v22, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v23, v33, v23, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v24, v32, v24, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v25, v31, v25, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v26, v30, v26, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v27, v29, v27, 0x5040100
; GFX11-FAKE16-NEXT:    s_and_saveexec_b32 s0, vcc_lo
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-FAKE16-NEXT:    s_cbranch_execz .LBB42_2
; GFX11-FAKE16-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:  .LBB42_2: ; %end
; GFX11-FAKE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = add <56 x i16> %a, splat (i16 3)
  %a2 = bitcast <56 x i16> %a1 to <14 x i64>
  br label %end

cmp.false:
  %a3 = bitcast <56 x i16> %a to <14 x i64>
  br label %end

end:
  %phi = phi <14 x i64> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <14 x i64> %phi
}

define inreg <14 x i64> @bitcast_v56i16_to_v14i64_scalar(<56 x i16> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v56i16_to_v14i64_scalar:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    v_readfirstlane_b32 s41, v13
; SI-NEXT:    v_readfirstlane_b32 s43, v12
; SI-NEXT:    v_readfirstlane_b32 s45, v11
; SI-NEXT:    v_readfirstlane_b32 s47, v10
; SI-NEXT:    v_readfirstlane_b32 s57, v9
; SI-NEXT:    v_readfirstlane_b32 s59, v8
; SI-NEXT:    v_readfirstlane_b32 s61, v7
; SI-NEXT:    v_readfirstlane_b32 s63, v6
; SI-NEXT:    v_readfirstlane_b32 s73, v5
; SI-NEXT:    v_readfirstlane_b32 s75, v4
; SI-NEXT:    v_readfirstlane_b32 s78, v3
; SI-NEXT:    v_readfirstlane_b32 s89, v2
; SI-NEXT:    v_readfirstlane_b32 s91, v1
; SI-NEXT:    v_readfirstlane_b32 s93, v0
; SI-NEXT:    s_lshr_b32 s76, s29, 16
; SI-NEXT:    s_lshr_b32 s79, s28, 16
; SI-NEXT:    s_lshr_b32 s15, s27, 16
; SI-NEXT:    s_lshr_b32 s14, s26, 16
; SI-NEXT:    s_lshr_b32 s13, s25, 16
; SI-NEXT:    s_lshr_b32 s12, s24, 16
; SI-NEXT:    s_lshr_b32 s11, s23, 16
; SI-NEXT:    s_lshr_b32 s10, s22, 16
; SI-NEXT:    s_lshr_b32 s9, s21, 16
; SI-NEXT:    s_lshr_b32 s8, s20, 16
; SI-NEXT:    s_lshr_b32 s7, s19, 16
; SI-NEXT:    s_lshr_b32 s6, s18, 16
; SI-NEXT:    s_lshr_b32 s5, s17, 16
; SI-NEXT:    s_lshr_b32 s4, s16, 16
; SI-NEXT:    s_lshr_b32 s40, s41, 16
; SI-NEXT:    s_lshr_b32 s42, s43, 16
; SI-NEXT:    s_lshr_b32 s44, s45, 16
; SI-NEXT:    s_lshr_b32 s46, s47, 16
; SI-NEXT:    s_lshr_b32 s56, s57, 16
; SI-NEXT:    s_lshr_b32 s58, s59, 16
; SI-NEXT:    s_lshr_b32 s60, s61, 16
; SI-NEXT:    s_lshr_b32 s62, s63, 16
; SI-NEXT:    s_lshr_b32 s72, s73, 16
; SI-NEXT:    s_lshr_b32 s74, s75, 16
; SI-NEXT:    s_lshr_b32 s77, s78, 16
; SI-NEXT:    s_lshr_b32 s88, s89, 16
; SI-NEXT:    s_lshr_b32 s90, s91, 16
; SI-NEXT:    s_lshr_b32 s92, s93, 16
; SI-NEXT:    v_readfirstlane_b32 s94, v14
; SI-NEXT:    s_cmp_lg_u32 s94, 0
; SI-NEXT:    s_cbranch_scc0 .LBB43_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    s_and_b32 s16, s16, 0xffff
; SI-NEXT:    s_lshl_b32 s4, s4, 16
; SI-NEXT:    s_or_b32 s4, s16, s4
; SI-NEXT:    s_and_b32 s16, s17, 0xffff
; SI-NEXT:    s_lshl_b32 s5, s5, 16
; SI-NEXT:    s_or_b32 s5, s16, s5
; SI-NEXT:    s_and_b32 s16, s18, 0xffff
; SI-NEXT:    s_lshl_b32 s6, s6, 16
; SI-NEXT:    s_or_b32 s6, s16, s6
; SI-NEXT:    s_and_b32 s16, s19, 0xffff
; SI-NEXT:    s_lshl_b32 s7, s7, 16
; SI-NEXT:    s_or_b32 s7, s16, s7
; SI-NEXT:    s_and_b32 s16, s20, 0xffff
; SI-NEXT:    s_lshl_b32 s8, s8, 16
; SI-NEXT:    s_or_b32 s8, s16, s8
; SI-NEXT:    s_and_b32 s16, s21, 0xffff
; SI-NEXT:    s_lshl_b32 s9, s9, 16
; SI-NEXT:    s_or_b32 s9, s16, s9
; SI-NEXT:    s_and_b32 s16, s22, 0xffff
; SI-NEXT:    s_lshl_b32 s10, s10, 16
; SI-NEXT:    s_or_b32 s10, s16, s10
; SI-NEXT:    s_and_b32 s16, s23, 0xffff
; SI-NEXT:    s_lshl_b32 s11, s11, 16
; SI-NEXT:    s_or_b32 s11, s16, s11
; SI-NEXT:    s_and_b32 s16, s24, 0xffff
; SI-NEXT:    s_lshl_b32 s12, s12, 16
; SI-NEXT:    s_or_b32 s12, s16, s12
; SI-NEXT:    s_and_b32 s16, s25, 0xffff
; SI-NEXT:    s_lshl_b32 s13, s13, 16
; SI-NEXT:    s_or_b32 s13, s16, s13
; SI-NEXT:    s_and_b32 s16, s26, 0xffff
; SI-NEXT:    s_lshl_b32 s14, s14, 16
; SI-NEXT:    s_or_b32 s14, s16, s14
; SI-NEXT:    s_and_b32 s16, s27, 0xffff
; SI-NEXT:    s_lshl_b32 s15, s15, 16
; SI-NEXT:    s_or_b32 s15, s16, s15
; SI-NEXT:    s_and_b32 s16, s28, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s79, 16
; SI-NEXT:    s_or_b32 s16, s16, s17
; SI-NEXT:    s_and_b32 s17, s29, 0xffff
; SI-NEXT:    s_lshl_b32 s18, s76, 16
; SI-NEXT:    s_or_b32 s17, s17, s18
; SI-NEXT:    s_and_b32 s18, s93, 0xffff
; SI-NEXT:    s_lshl_b32 s19, s92, 16
; SI-NEXT:    s_or_b32 s18, s18, s19
; SI-NEXT:    s_and_b32 s19, s91, 0xffff
; SI-NEXT:    s_lshl_b32 s20, s90, 16
; SI-NEXT:    s_or_b32 s19, s19, s20
; SI-NEXT:    s_and_b32 s20, s89, 0xffff
; SI-NEXT:    s_lshl_b32 s21, s88, 16
; SI-NEXT:    s_or_b32 s20, s20, s21
; SI-NEXT:    s_and_b32 s21, s78, 0xffff
; SI-NEXT:    s_lshl_b32 s22, s77, 16
; SI-NEXT:    s_or_b32 s21, s21, s22
; SI-NEXT:    s_and_b32 s22, s75, 0xffff
; SI-NEXT:    s_lshl_b32 s23, s74, 16
; SI-NEXT:    s_or_b32 s22, s22, s23
; SI-NEXT:    s_and_b32 s23, s73, 0xffff
; SI-NEXT:    s_lshl_b32 s24, s72, 16
; SI-NEXT:    s_or_b32 s23, s23, s24
; SI-NEXT:    s_and_b32 s24, s63, 0xffff
; SI-NEXT:    s_lshl_b32 s25, s62, 16
; SI-NEXT:    s_or_b32 s24, s24, s25
; SI-NEXT:    s_and_b32 s25, s61, 0xffff
; SI-NEXT:    s_lshl_b32 s26, s60, 16
; SI-NEXT:    s_or_b32 s25, s25, s26
; SI-NEXT:    s_and_b32 s26, s59, 0xffff
; SI-NEXT:    s_lshl_b32 s27, s58, 16
; SI-NEXT:    s_or_b32 s26, s26, s27
; SI-NEXT:    s_and_b32 s27, s57, 0xffff
; SI-NEXT:    s_lshl_b32 s28, s56, 16
; SI-NEXT:    s_or_b32 s27, s27, s28
; SI-NEXT:    s_and_b32 s28, s47, 0xffff
; SI-NEXT:    s_lshl_b32 s29, s46, 16
; SI-NEXT:    s_or_b32 s28, s28, s29
; SI-NEXT:    s_and_b32 s29, s45, 0xffff
; SI-NEXT:    s_lshl_b32 s44, s44, 16
; SI-NEXT:    s_and_b32 s43, s43, 0xffff
; SI-NEXT:    s_lshl_b32 s42, s42, 16
; SI-NEXT:    s_and_b32 s41, s41, 0xffff
; SI-NEXT:    s_lshl_b32 s40, s40, 16
; SI-NEXT:    s_or_b32 s29, s29, s44
; SI-NEXT:    s_or_b32 s42, s43, s42
; SI-NEXT:    s_or_b32 s40, s41, s40
; SI-NEXT:    s_branch .LBB43_3
; SI-NEXT:  .LBB43_2: ; %cmp.true
; SI-NEXT:    s_add_i32 s16, s16, 3
; SI-NEXT:    s_and_b32 s16, s16, 0xffff
; SI-NEXT:    s_lshl_b32 s4, s4, 16
; SI-NEXT:    s_add_i32 s17, s17, 3
; SI-NEXT:    s_or_b32 s4, s4, s16
; SI-NEXT:    s_and_b32 s16, s17, 0xffff
; SI-NEXT:    s_lshl_b32 s5, s5, 16
; SI-NEXT:    s_add_i32 s18, s18, 3
; SI-NEXT:    s_or_b32 s5, s5, s16
; SI-NEXT:    s_and_b32 s16, s18, 0xffff
; SI-NEXT:    s_lshl_b32 s6, s6, 16
; SI-NEXT:    s_add_i32 s19, s19, 3
; SI-NEXT:    s_or_b32 s6, s6, s16
; SI-NEXT:    s_and_b32 s16, s19, 0xffff
; SI-NEXT:    s_lshl_b32 s7, s7, 16
; SI-NEXT:    s_add_i32 s20, s20, 3
; SI-NEXT:    s_or_b32 s7, s7, s16
; SI-NEXT:    s_and_b32 s16, s20, 0xffff
; SI-NEXT:    s_lshl_b32 s8, s8, 16
; SI-NEXT:    s_add_i32 s21, s21, 3
; SI-NEXT:    s_or_b32 s8, s8, s16
; SI-NEXT:    s_and_b32 s16, s21, 0xffff
; SI-NEXT:    s_lshl_b32 s9, s9, 16
; SI-NEXT:    s_add_i32 s22, s22, 3
; SI-NEXT:    s_or_b32 s9, s9, s16
; SI-NEXT:    s_and_b32 s16, s22, 0xffff
; SI-NEXT:    s_lshl_b32 s10, s10, 16
; SI-NEXT:    s_add_i32 s23, s23, 3
; SI-NEXT:    s_or_b32 s10, s10, s16
; SI-NEXT:    s_and_b32 s16, s23, 0xffff
; SI-NEXT:    s_lshl_b32 s11, s11, 16
; SI-NEXT:    s_add_i32 s24, s24, 3
; SI-NEXT:    s_or_b32 s11, s11, s16
; SI-NEXT:    s_and_b32 s16, s24, 0xffff
; SI-NEXT:    s_lshl_b32 s12, s12, 16
; SI-NEXT:    s_add_i32 s25, s25, 3
; SI-NEXT:    s_or_b32 s12, s12, s16
; SI-NEXT:    s_and_b32 s16, s25, 0xffff
; SI-NEXT:    s_lshl_b32 s13, s13, 16
; SI-NEXT:    s_add_i32 s26, s26, 3
; SI-NEXT:    s_or_b32 s13, s13, s16
; SI-NEXT:    s_and_b32 s16, s26, 0xffff
; SI-NEXT:    s_lshl_b32 s14, s14, 16
; SI-NEXT:    s_add_i32 s27, s27, 3
; SI-NEXT:    s_or_b32 s14, s14, s16
; SI-NEXT:    s_and_b32 s16, s27, 0xffff
; SI-NEXT:    s_lshl_b32 s15, s15, 16
; SI-NEXT:    s_add_i32 s28, s28, 3
; SI-NEXT:    s_or_b32 s15, s15, s16
; SI-NEXT:    s_and_b32 s16, s28, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s79, 16
; SI-NEXT:    s_add_i32 s29, s29, 3
; SI-NEXT:    s_or_b32 s16, s17, s16
; SI-NEXT:    s_and_b32 s17, s29, 0xffff
; SI-NEXT:    s_lshl_b32 s18, s76, 16
; SI-NEXT:    s_add_i32 s93, s93, 3
; SI-NEXT:    s_or_b32 s17, s18, s17
; SI-NEXT:    s_and_b32 s18, s93, 0xffff
; SI-NEXT:    s_lshl_b32 s19, s92, 16
; SI-NEXT:    s_add_i32 s91, s91, 3
; SI-NEXT:    s_or_b32 s18, s19, s18
; SI-NEXT:    s_and_b32 s19, s91, 0xffff
; SI-NEXT:    s_lshl_b32 s20, s90, 16
; SI-NEXT:    s_add_i32 s89, s89, 3
; SI-NEXT:    s_or_b32 s19, s20, s19
; SI-NEXT:    s_and_b32 s20, s89, 0xffff
; SI-NEXT:    s_lshl_b32 s21, s88, 16
; SI-NEXT:    s_add_i32 s78, s78, 3
; SI-NEXT:    s_or_b32 s20, s21, s20
; SI-NEXT:    s_and_b32 s21, s78, 0xffff
; SI-NEXT:    s_lshl_b32 s22, s77, 16
; SI-NEXT:    s_add_i32 s75, s75, 3
; SI-NEXT:    s_or_b32 s21, s22, s21
; SI-NEXT:    s_and_b32 s22, s75, 0xffff
; SI-NEXT:    s_lshl_b32 s23, s74, 16
; SI-NEXT:    s_add_i32 s73, s73, 3
; SI-NEXT:    s_or_b32 s22, s23, s22
; SI-NEXT:    s_and_b32 s23, s73, 0xffff
; SI-NEXT:    s_lshl_b32 s24, s72, 16
; SI-NEXT:    s_add_i32 s63, s63, 3
; SI-NEXT:    s_or_b32 s23, s24, s23
; SI-NEXT:    s_and_b32 s24, s63, 0xffff
; SI-NEXT:    s_lshl_b32 s25, s62, 16
; SI-NEXT:    s_add_i32 s61, s61, 3
; SI-NEXT:    s_or_b32 s24, s25, s24
; SI-NEXT:    s_and_b32 s25, s61, 0xffff
; SI-NEXT:    s_lshl_b32 s26, s60, 16
; SI-NEXT:    s_add_i32 s59, s59, 3
; SI-NEXT:    s_or_b32 s25, s26, s25
; SI-NEXT:    s_and_b32 s26, s59, 0xffff
; SI-NEXT:    s_lshl_b32 s27, s58, 16
; SI-NEXT:    s_add_i32 s57, s57, 3
; SI-NEXT:    s_or_b32 s26, s27, s26
; SI-NEXT:    s_and_b32 s27, s57, 0xffff
; SI-NEXT:    s_lshl_b32 s28, s56, 16
; SI-NEXT:    s_add_i32 s47, s47, 3
; SI-NEXT:    s_or_b32 s27, s28, s27
; SI-NEXT:    s_and_b32 s28, s47, 0xffff
; SI-NEXT:    s_lshl_b32 s29, s46, 16
; SI-NEXT:    s_add_i32 s45, s45, 3
; SI-NEXT:    s_add_i32 s43, s43, 3
; SI-NEXT:    s_add_i32 s41, s41, 3
; SI-NEXT:    s_or_b32 s28, s29, s28
; SI-NEXT:    s_and_b32 s29, s45, 0xffff
; SI-NEXT:    s_lshl_b32 s44, s44, 16
; SI-NEXT:    s_and_b32 s43, s43, 0xffff
; SI-NEXT:    s_lshl_b32 s42, s42, 16
; SI-NEXT:    s_and_b32 s41, s41, 0xffff
; SI-NEXT:    s_lshl_b32 s40, s40, 16
; SI-NEXT:    s_or_b32 s29, s44, s29
; SI-NEXT:    s_or_b32 s42, s42, s43
; SI-NEXT:    s_or_b32 s40, s40, s41
; SI-NEXT:    s_add_i32 s4, s4, 0x30000
; SI-NEXT:    s_add_i32 s5, s5, 0x30000
; SI-NEXT:    s_add_i32 s6, s6, 0x30000
; SI-NEXT:    s_add_i32 s7, s7, 0x30000
; SI-NEXT:    s_add_i32 s8, s8, 0x30000
; SI-NEXT:    s_add_i32 s9, s9, 0x30000
; SI-NEXT:    s_add_i32 s10, s10, 0x30000
; SI-NEXT:    s_add_i32 s11, s11, 0x30000
; SI-NEXT:    s_add_i32 s12, s12, 0x30000
; SI-NEXT:    s_add_i32 s13, s13, 0x30000
; SI-NEXT:    s_add_i32 s14, s14, 0x30000
; SI-NEXT:    s_add_i32 s15, s15, 0x30000
; SI-NEXT:    s_add_i32 s16, s16, 0x30000
; SI-NEXT:    s_add_i32 s17, s17, 0x30000
; SI-NEXT:    s_add_i32 s18, s18, 0x30000
; SI-NEXT:    s_add_i32 s19, s19, 0x30000
; SI-NEXT:    s_add_i32 s20, s20, 0x30000
; SI-NEXT:    s_add_i32 s21, s21, 0x30000
; SI-NEXT:    s_add_i32 s22, s22, 0x30000
; SI-NEXT:    s_add_i32 s23, s23, 0x30000
; SI-NEXT:    s_add_i32 s24, s24, 0x30000
; SI-NEXT:    s_add_i32 s25, s25, 0x30000
; SI-NEXT:    s_add_i32 s26, s26, 0x30000
; SI-NEXT:    s_add_i32 s27, s27, 0x30000
; SI-NEXT:    s_add_i32 s28, s28, 0x30000
; SI-NEXT:    s_add_i32 s29, s29, 0x30000
; SI-NEXT:    s_add_i32 s42, s42, 0x30000
; SI-NEXT:    s_add_i32 s40, s40, 0x30000
; SI-NEXT:  .LBB43_3: ; %end
; SI-NEXT:    v_mov_b32_e32 v0, s4
; SI-NEXT:    v_mov_b32_e32 v1, s5
; SI-NEXT:    v_mov_b32_e32 v2, s6
; SI-NEXT:    v_mov_b32_e32 v3, s7
; SI-NEXT:    v_mov_b32_e32 v4, s8
; SI-NEXT:    v_mov_b32_e32 v5, s9
; SI-NEXT:    v_mov_b32_e32 v6, s10
; SI-NEXT:    v_mov_b32_e32 v7, s11
; SI-NEXT:    v_mov_b32_e32 v8, s12
; SI-NEXT:    v_mov_b32_e32 v9, s13
; SI-NEXT:    v_mov_b32_e32 v10, s14
; SI-NEXT:    v_mov_b32_e32 v11, s15
; SI-NEXT:    v_mov_b32_e32 v12, s16
; SI-NEXT:    v_mov_b32_e32 v13, s17
; SI-NEXT:    v_mov_b32_e32 v14, s18
; SI-NEXT:    v_mov_b32_e32 v15, s19
; SI-NEXT:    v_mov_b32_e32 v16, s20
; SI-NEXT:    v_mov_b32_e32 v17, s21
; SI-NEXT:    v_mov_b32_e32 v18, s22
; SI-NEXT:    v_mov_b32_e32 v19, s23
; SI-NEXT:    v_mov_b32_e32 v20, s24
; SI-NEXT:    v_mov_b32_e32 v21, s25
; SI-NEXT:    v_mov_b32_e32 v22, s26
; SI-NEXT:    v_mov_b32_e32 v23, s27
; SI-NEXT:    v_mov_b32_e32 v24, s28
; SI-NEXT:    v_mov_b32_e32 v25, s29
; SI-NEXT:    v_mov_b32_e32 v26, s42
; SI-NEXT:    v_mov_b32_e32 v27, s40
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v56i16_to_v14i64_scalar:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_store_dword v28, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    v_writelane_b32 v28, s30, 0
; VI-NEXT:    v_writelane_b32 v28, s31, 1
; VI-NEXT:    v_readfirstlane_b32 s41, v13
; VI-NEXT:    v_readfirstlane_b32 s43, v12
; VI-NEXT:    v_readfirstlane_b32 s45, v11
; VI-NEXT:    v_readfirstlane_b32 s47, v10
; VI-NEXT:    v_readfirstlane_b32 s57, v9
; VI-NEXT:    v_readfirstlane_b32 s59, v8
; VI-NEXT:    v_readfirstlane_b32 s61, v7
; VI-NEXT:    v_readfirstlane_b32 s63, v6
; VI-NEXT:    v_readfirstlane_b32 s73, v5
; VI-NEXT:    v_readfirstlane_b32 s75, v4
; VI-NEXT:    v_readfirstlane_b32 s78, v3
; VI-NEXT:    v_readfirstlane_b32 s89, v2
; VI-NEXT:    v_readfirstlane_b32 s91, v1
; VI-NEXT:    v_readfirstlane_b32 vcc_hi, v0
; VI-NEXT:    s_lshr_b32 s76, s29, 16
; VI-NEXT:    s_lshr_b32 s79, s28, 16
; VI-NEXT:    s_lshr_b32 s15, s27, 16
; VI-NEXT:    s_lshr_b32 s14, s26, 16
; VI-NEXT:    s_lshr_b32 s13, s25, 16
; VI-NEXT:    s_lshr_b32 s12, s24, 16
; VI-NEXT:    s_lshr_b32 s11, s23, 16
; VI-NEXT:    s_lshr_b32 s10, s22, 16
; VI-NEXT:    s_lshr_b32 s9, s21, 16
; VI-NEXT:    s_lshr_b32 s8, s20, 16
; VI-NEXT:    s_lshr_b32 s7, s19, 16
; VI-NEXT:    s_lshr_b32 s6, s18, 16
; VI-NEXT:    s_lshr_b32 s5, s17, 16
; VI-NEXT:    s_lshr_b32 s4, s16, 16
; VI-NEXT:    s_lshr_b32 s40, s41, 16
; VI-NEXT:    s_lshr_b32 s42, s43, 16
; VI-NEXT:    s_lshr_b32 s44, s45, 16
; VI-NEXT:    s_lshr_b32 s46, s47, 16
; VI-NEXT:    s_lshr_b32 s56, s57, 16
; VI-NEXT:    s_lshr_b32 s58, s59, 16
; VI-NEXT:    s_lshr_b32 s60, s61, 16
; VI-NEXT:    s_lshr_b32 s62, s63, 16
; VI-NEXT:    s_lshr_b32 s72, s73, 16
; VI-NEXT:    s_lshr_b32 s74, s75, 16
; VI-NEXT:    s_lshr_b32 s77, s78, 16
; VI-NEXT:    s_lshr_b32 s88, s89, 16
; VI-NEXT:    s_lshr_b32 s90, s91, 16
; VI-NEXT:    s_lshr_b32 vcc_lo, vcc_hi, 16
; VI-NEXT:    v_readfirstlane_b32 s30, v14
; VI-NEXT:    s_cmp_lg_u32 s30, 0
; VI-NEXT:    s_cbranch_scc0 .LBB43_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    s_and_b32 s16, 0xffff, s16
; VI-NEXT:    s_lshl_b32 s4, s4, 16
; VI-NEXT:    s_or_b32 s4, s16, s4
; VI-NEXT:    s_and_b32 s16, 0xffff, s17
; VI-NEXT:    s_lshl_b32 s5, s5, 16
; VI-NEXT:    s_or_b32 s5, s16, s5
; VI-NEXT:    s_and_b32 s16, 0xffff, s18
; VI-NEXT:    s_lshl_b32 s6, s6, 16
; VI-NEXT:    s_or_b32 s6, s16, s6
; VI-NEXT:    s_and_b32 s16, 0xffff, s19
; VI-NEXT:    s_lshl_b32 s7, s7, 16
; VI-NEXT:    s_or_b32 s7, s16, s7
; VI-NEXT:    s_and_b32 s16, 0xffff, s20
; VI-NEXT:    s_lshl_b32 s8, s8, 16
; VI-NEXT:    s_or_b32 s8, s16, s8
; VI-NEXT:    s_and_b32 s16, 0xffff, s21
; VI-NEXT:    s_lshl_b32 s9, s9, 16
; VI-NEXT:    s_or_b32 s9, s16, s9
; VI-NEXT:    s_and_b32 s16, 0xffff, s22
; VI-NEXT:    s_lshl_b32 s10, s10, 16
; VI-NEXT:    s_or_b32 s10, s16, s10
; VI-NEXT:    s_and_b32 s16, 0xffff, s23
; VI-NEXT:    s_lshl_b32 s11, s11, 16
; VI-NEXT:    s_or_b32 s11, s16, s11
; VI-NEXT:    s_and_b32 s16, 0xffff, s24
; VI-NEXT:    s_lshl_b32 s12, s12, 16
; VI-NEXT:    s_or_b32 s12, s16, s12
; VI-NEXT:    s_and_b32 s16, 0xffff, s25
; VI-NEXT:    s_lshl_b32 s13, s13, 16
; VI-NEXT:    s_or_b32 s13, s16, s13
; VI-NEXT:    s_and_b32 s16, 0xffff, s26
; VI-NEXT:    s_lshl_b32 s14, s14, 16
; VI-NEXT:    s_or_b32 s14, s16, s14
; VI-NEXT:    s_and_b32 s16, 0xffff, s27
; VI-NEXT:    s_lshl_b32 s15, s15, 16
; VI-NEXT:    s_or_b32 s15, s16, s15
; VI-NEXT:    s_and_b32 s16, 0xffff, s28
; VI-NEXT:    s_lshl_b32 s17, s79, 16
; VI-NEXT:    s_or_b32 s16, s16, s17
; VI-NEXT:    s_and_b32 s17, 0xffff, s29
; VI-NEXT:    s_lshl_b32 s18, s76, 16
; VI-NEXT:    s_or_b32 s17, s17, s18
; VI-NEXT:    s_and_b32 s18, 0xffff, vcc_hi
; VI-NEXT:    s_lshl_b32 s19, vcc_lo, 16
; VI-NEXT:    s_or_b32 s18, s18, s19
; VI-NEXT:    s_and_b32 s19, 0xffff, s91
; VI-NEXT:    s_lshl_b32 s20, s90, 16
; VI-NEXT:    s_or_b32 s19, s19, s20
; VI-NEXT:    s_and_b32 s20, 0xffff, s89
; VI-NEXT:    s_lshl_b32 s21, s88, 16
; VI-NEXT:    s_or_b32 s20, s20, s21
; VI-NEXT:    s_and_b32 s21, 0xffff, s78
; VI-NEXT:    s_lshl_b32 s22, s77, 16
; VI-NEXT:    s_or_b32 s21, s21, s22
; VI-NEXT:    s_and_b32 s22, 0xffff, s75
; VI-NEXT:    s_lshl_b32 s23, s74, 16
; VI-NEXT:    s_or_b32 s22, s22, s23
; VI-NEXT:    s_and_b32 s23, 0xffff, s73
; VI-NEXT:    s_lshl_b32 s24, s72, 16
; VI-NEXT:    s_or_b32 s23, s23, s24
; VI-NEXT:    s_and_b32 s24, 0xffff, s63
; VI-NEXT:    s_lshl_b32 s25, s62, 16
; VI-NEXT:    s_or_b32 s24, s24, s25
; VI-NEXT:    s_and_b32 s25, 0xffff, s61
; VI-NEXT:    s_lshl_b32 s26, s60, 16
; VI-NEXT:    s_or_b32 s25, s25, s26
; VI-NEXT:    s_and_b32 s26, 0xffff, s59
; VI-NEXT:    s_lshl_b32 s27, s58, 16
; VI-NEXT:    s_or_b32 s26, s26, s27
; VI-NEXT:    s_and_b32 s27, 0xffff, s57
; VI-NEXT:    s_lshl_b32 s28, s56, 16
; VI-NEXT:    s_or_b32 s27, s27, s28
; VI-NEXT:    s_and_b32 s28, 0xffff, s47
; VI-NEXT:    s_lshl_b32 s29, s46, 16
; VI-NEXT:    s_or_b32 s28, s28, s29
; VI-NEXT:    s_and_b32 s29, 0xffff, s45
; VI-NEXT:    s_lshl_b32 s44, s44, 16
; VI-NEXT:    s_and_b32 s43, 0xffff, s43
; VI-NEXT:    s_lshl_b32 s42, s42, 16
; VI-NEXT:    s_and_b32 s41, 0xffff, s41
; VI-NEXT:    s_lshl_b32 s40, s40, 16
; VI-NEXT:    s_or_b32 s29, s29, s44
; VI-NEXT:    s_or_b32 s42, s43, s42
; VI-NEXT:    s_or_b32 s40, s41, s40
; VI-NEXT:    s_branch .LBB43_3
; VI-NEXT:  .LBB43_2: ; %cmp.true
; VI-NEXT:    s_add_i32 s16, s16, 3
; VI-NEXT:    s_and_b32 s16, s16, 0xffff
; VI-NEXT:    s_lshl_b32 s4, s4, 16
; VI-NEXT:    s_add_i32 s17, s17, 3
; VI-NEXT:    s_or_b32 s4, s4, s16
; VI-NEXT:    s_and_b32 s16, s17, 0xffff
; VI-NEXT:    s_lshl_b32 s5, s5, 16
; VI-NEXT:    s_add_i32 s18, s18, 3
; VI-NEXT:    s_or_b32 s5, s5, s16
; VI-NEXT:    s_and_b32 s16, s18, 0xffff
; VI-NEXT:    s_lshl_b32 s6, s6, 16
; VI-NEXT:    s_add_i32 s19, s19, 3
; VI-NEXT:    s_or_b32 s6, s6, s16
; VI-NEXT:    s_and_b32 s16, s19, 0xffff
; VI-NEXT:    s_lshl_b32 s7, s7, 16
; VI-NEXT:    s_add_i32 s20, s20, 3
; VI-NEXT:    s_or_b32 s7, s7, s16
; VI-NEXT:    s_and_b32 s16, s20, 0xffff
; VI-NEXT:    s_lshl_b32 s8, s8, 16
; VI-NEXT:    s_add_i32 s21, s21, 3
; VI-NEXT:    s_or_b32 s8, s8, s16
; VI-NEXT:    s_and_b32 s16, s21, 0xffff
; VI-NEXT:    s_lshl_b32 s9, s9, 16
; VI-NEXT:    s_add_i32 s22, s22, 3
; VI-NEXT:    s_or_b32 s9, s9, s16
; VI-NEXT:    s_and_b32 s16, s22, 0xffff
; VI-NEXT:    s_lshl_b32 s10, s10, 16
; VI-NEXT:    s_add_i32 s23, s23, 3
; VI-NEXT:    s_or_b32 s10, s10, s16
; VI-NEXT:    s_and_b32 s16, s23, 0xffff
; VI-NEXT:    s_lshl_b32 s11, s11, 16
; VI-NEXT:    s_add_i32 s24, s24, 3
; VI-NEXT:    s_or_b32 s11, s11, s16
; VI-NEXT:    s_and_b32 s16, s24, 0xffff
; VI-NEXT:    s_lshl_b32 s12, s12, 16
; VI-NEXT:    s_add_i32 s25, s25, 3
; VI-NEXT:    s_or_b32 s12, s12, s16
; VI-NEXT:    s_and_b32 s16, s25, 0xffff
; VI-NEXT:    s_lshl_b32 s13, s13, 16
; VI-NEXT:    s_add_i32 s26, s26, 3
; VI-NEXT:    s_or_b32 s13, s13, s16
; VI-NEXT:    s_and_b32 s16, s26, 0xffff
; VI-NEXT:    s_lshl_b32 s14, s14, 16
; VI-NEXT:    s_add_i32 s27, s27, 3
; VI-NEXT:    s_or_b32 s14, s14, s16
; VI-NEXT:    s_and_b32 s16, s27, 0xffff
; VI-NEXT:    s_lshl_b32 s15, s15, 16
; VI-NEXT:    s_add_i32 s28, s28, 3
; VI-NEXT:    s_or_b32 s15, s15, s16
; VI-NEXT:    s_and_b32 s16, s28, 0xffff
; VI-NEXT:    s_lshl_b32 s17, s79, 16
; VI-NEXT:    s_add_i32 s29, s29, 3
; VI-NEXT:    s_or_b32 s16, s17, s16
; VI-NEXT:    s_and_b32 s17, s29, 0xffff
; VI-NEXT:    s_lshl_b32 s18, s76, 16
; VI-NEXT:    s_add_i32 vcc_hi, vcc_hi, 3
; VI-NEXT:    s_or_b32 s17, s18, s17
; VI-NEXT:    s_and_b32 s18, vcc_hi, 0xffff
; VI-NEXT:    s_lshl_b32 s19, vcc_lo, 16
; VI-NEXT:    s_add_i32 s91, s91, 3
; VI-NEXT:    s_or_b32 s18, s19, s18
; VI-NEXT:    s_and_b32 s19, s91, 0xffff
; VI-NEXT:    s_lshl_b32 s20, s90, 16
; VI-NEXT:    s_add_i32 s89, s89, 3
; VI-NEXT:    s_or_b32 s19, s20, s19
; VI-NEXT:    s_and_b32 s20, s89, 0xffff
; VI-NEXT:    s_lshl_b32 s21, s88, 16
; VI-NEXT:    s_add_i32 s78, s78, 3
; VI-NEXT:    s_or_b32 s20, s21, s20
; VI-NEXT:    s_and_b32 s21, s78, 0xffff
; VI-NEXT:    s_lshl_b32 s22, s77, 16
; VI-NEXT:    s_add_i32 s75, s75, 3
; VI-NEXT:    s_or_b32 s21, s22, s21
; VI-NEXT:    s_and_b32 s22, s75, 0xffff
; VI-NEXT:    s_lshl_b32 s23, s74, 16
; VI-NEXT:    s_add_i32 s73, s73, 3
; VI-NEXT:    s_or_b32 s22, s23, s22
; VI-NEXT:    s_and_b32 s23, s73, 0xffff
; VI-NEXT:    s_lshl_b32 s24, s72, 16
; VI-NEXT:    s_add_i32 s63, s63, 3
; VI-NEXT:    s_or_b32 s23, s24, s23
; VI-NEXT:    s_and_b32 s24, s63, 0xffff
; VI-NEXT:    s_lshl_b32 s25, s62, 16
; VI-NEXT:    s_add_i32 s61, s61, 3
; VI-NEXT:    s_or_b32 s24, s25, s24
; VI-NEXT:    s_and_b32 s25, s61, 0xffff
; VI-NEXT:    s_lshl_b32 s26, s60, 16
; VI-NEXT:    s_add_i32 s59, s59, 3
; VI-NEXT:    s_or_b32 s25, s26, s25
; VI-NEXT:    s_and_b32 s26, s59, 0xffff
; VI-NEXT:    s_lshl_b32 s27, s58, 16
; VI-NEXT:    s_add_i32 s57, s57, 3
; VI-NEXT:    s_or_b32 s26, s27, s26
; VI-NEXT:    s_and_b32 s27, s57, 0xffff
; VI-NEXT:    s_lshl_b32 s28, s56, 16
; VI-NEXT:    s_add_i32 s47, s47, 3
; VI-NEXT:    s_or_b32 s27, s28, s27
; VI-NEXT:    s_and_b32 s28, s47, 0xffff
; VI-NEXT:    s_lshl_b32 s29, s46, 16
; VI-NEXT:    s_add_i32 s45, s45, 3
; VI-NEXT:    s_add_i32 s43, s43, 3
; VI-NEXT:    s_add_i32 s41, s41, 3
; VI-NEXT:    s_or_b32 s28, s29, s28
; VI-NEXT:    s_and_b32 s29, s45, 0xffff
; VI-NEXT:    s_lshl_b32 s44, s44, 16
; VI-NEXT:    s_and_b32 s43, s43, 0xffff
; VI-NEXT:    s_lshl_b32 s42, s42, 16
; VI-NEXT:    s_and_b32 s41, s41, 0xffff
; VI-NEXT:    s_lshl_b32 s40, s40, 16
; VI-NEXT:    s_or_b32 s29, s44, s29
; VI-NEXT:    s_or_b32 s42, s42, s43
; VI-NEXT:    s_or_b32 s40, s40, s41
; VI-NEXT:    s_add_i32 s4, s4, 0x30000
; VI-NEXT:    s_add_i32 s5, s5, 0x30000
; VI-NEXT:    s_add_i32 s6, s6, 0x30000
; VI-NEXT:    s_add_i32 s7, s7, 0x30000
; VI-NEXT:    s_add_i32 s8, s8, 0x30000
; VI-NEXT:    s_add_i32 s9, s9, 0x30000
; VI-NEXT:    s_add_i32 s10, s10, 0x30000
; VI-NEXT:    s_add_i32 s11, s11, 0x30000
; VI-NEXT:    s_add_i32 s12, s12, 0x30000
; VI-NEXT:    s_add_i32 s13, s13, 0x30000
; VI-NEXT:    s_add_i32 s14, s14, 0x30000
; VI-NEXT:    s_add_i32 s15, s15, 0x30000
; VI-NEXT:    s_add_i32 s16, s16, 0x30000
; VI-NEXT:    s_add_i32 s17, s17, 0x30000
; VI-NEXT:    s_add_i32 s18, s18, 0x30000
; VI-NEXT:    s_add_i32 s19, s19, 0x30000
; VI-NEXT:    s_add_i32 s20, s20, 0x30000
; VI-NEXT:    s_add_i32 s21, s21, 0x30000
; VI-NEXT:    s_add_i32 s22, s22, 0x30000
; VI-NEXT:    s_add_i32 s23, s23, 0x30000
; VI-NEXT:    s_add_i32 s24, s24, 0x30000
; VI-NEXT:    s_add_i32 s25, s25, 0x30000
; VI-NEXT:    s_add_i32 s26, s26, 0x30000
; VI-NEXT:    s_add_i32 s27, s27, 0x30000
; VI-NEXT:    s_add_i32 s28, s28, 0x30000
; VI-NEXT:    s_add_i32 s29, s29, 0x30000
; VI-NEXT:    s_add_i32 s42, s42, 0x30000
; VI-NEXT:    s_add_i32 s40, s40, 0x30000
; VI-NEXT:  .LBB43_3: ; %end
; VI-NEXT:    v_readlane_b32 s30, v28, 0
; VI-NEXT:    v_mov_b32_e32 v0, s4
; VI-NEXT:    v_mov_b32_e32 v1, s5
; VI-NEXT:    v_mov_b32_e32 v2, s6
; VI-NEXT:    v_mov_b32_e32 v3, s7
; VI-NEXT:    v_mov_b32_e32 v4, s8
; VI-NEXT:    v_mov_b32_e32 v5, s9
; VI-NEXT:    v_mov_b32_e32 v6, s10
; VI-NEXT:    v_mov_b32_e32 v7, s11
; VI-NEXT:    v_mov_b32_e32 v8, s12
; VI-NEXT:    v_mov_b32_e32 v9, s13
; VI-NEXT:    v_mov_b32_e32 v10, s14
; VI-NEXT:    v_mov_b32_e32 v11, s15
; VI-NEXT:    v_mov_b32_e32 v12, s16
; VI-NEXT:    v_mov_b32_e32 v13, s17
; VI-NEXT:    v_mov_b32_e32 v14, s18
; VI-NEXT:    v_mov_b32_e32 v15, s19
; VI-NEXT:    v_mov_b32_e32 v16, s20
; VI-NEXT:    v_mov_b32_e32 v17, s21
; VI-NEXT:    v_mov_b32_e32 v18, s22
; VI-NEXT:    v_mov_b32_e32 v19, s23
; VI-NEXT:    v_mov_b32_e32 v20, s24
; VI-NEXT:    v_mov_b32_e32 v21, s25
; VI-NEXT:    v_mov_b32_e32 v22, s26
; VI-NEXT:    v_mov_b32_e32 v23, s27
; VI-NEXT:    v_mov_b32_e32 v24, s28
; VI-NEXT:    v_mov_b32_e32 v25, s29
; VI-NEXT:    v_mov_b32_e32 v26, s42
; VI-NEXT:    v_mov_b32_e32 v27, s40
; VI-NEXT:    v_readlane_b32 s31, v28, 1
; VI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v56i16_to_v14i64_scalar:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    s_mov_b64 exec, s[4:5]
; GFX9-NEXT:    v_writelane_b32 v32, s36, 0
; GFX9-NEXT:    v_writelane_b32 v32, s37, 1
; GFX9-NEXT:    v_writelane_b32 v32, s38, 2
; GFX9-NEXT:    v_writelane_b32 v32, s39, 3
; GFX9-NEXT:    v_writelane_b32 v32, s48, 4
; GFX9-NEXT:    v_writelane_b32 v32, s49, 5
; GFX9-NEXT:    v_writelane_b32 v32, s50, 6
; GFX9-NEXT:    v_writelane_b32 v32, s51, 7
; GFX9-NEXT:    v_writelane_b32 v32, s52, 8
; GFX9-NEXT:    v_writelane_b32 v32, s53, 9
; GFX9-NEXT:    v_writelane_b32 v32, s54, 10
; GFX9-NEXT:    v_writelane_b32 v32, s55, 11
; GFX9-NEXT:    v_readfirstlane_b32 s4, v13
; GFX9-NEXT:    v_readfirstlane_b32 s6, v12
; GFX9-NEXT:    v_readfirstlane_b32 s8, v11
; GFX9-NEXT:    v_readfirstlane_b32 s10, v10
; GFX9-NEXT:    v_readfirstlane_b32 s12, v9
; GFX9-NEXT:    v_readfirstlane_b32 s14, v8
; GFX9-NEXT:    v_readfirstlane_b32 s57, v7
; GFX9-NEXT:    v_readfirstlane_b32 s60, v6
; GFX9-NEXT:    v_readfirstlane_b32 s62, v5
; GFX9-NEXT:    v_readfirstlane_b32 s72, v4
; GFX9-NEXT:    v_readfirstlane_b32 s74, v3
; GFX9-NEXT:    v_readfirstlane_b32 s76, v2
; GFX9-NEXT:    v_readfirstlane_b32 s78, v1
; GFX9-NEXT:    v_readfirstlane_b32 s88, v0
; GFX9-NEXT:    s_lshr_b32 s56, s29, 16
; GFX9-NEXT:    s_lshr_b32 s59, s28, 16
; GFX9-NEXT:    s_lshr_b32 s47, s27, 16
; GFX9-NEXT:    s_lshr_b32 s46, s26, 16
; GFX9-NEXT:    s_lshr_b32 s45, s25, 16
; GFX9-NEXT:    s_lshr_b32 s44, s24, 16
; GFX9-NEXT:    s_lshr_b32 s43, s23, 16
; GFX9-NEXT:    s_lshr_b32 s42, s22, 16
; GFX9-NEXT:    s_lshr_b32 s41, s21, 16
; GFX9-NEXT:    s_lshr_b32 s40, s20, 16
; GFX9-NEXT:    s_lshr_b32 s90, s19, 16
; GFX9-NEXT:    s_lshr_b32 s91, s18, 16
; GFX9-NEXT:    s_lshr_b32 s92, s17, 16
; GFX9-NEXT:    s_lshr_b32 s93, s16, 16
; GFX9-NEXT:    s_lshr_b32 s5, s4, 16
; GFX9-NEXT:    s_lshr_b32 s7, s6, 16
; GFX9-NEXT:    s_lshr_b32 s9, s8, 16
; GFX9-NEXT:    s_lshr_b32 s11, s10, 16
; GFX9-NEXT:    s_lshr_b32 s13, s12, 16
; GFX9-NEXT:    s_lshr_b32 s15, s14, 16
; GFX9-NEXT:    s_lshr_b32 s58, s57, 16
; GFX9-NEXT:    s_lshr_b32 s61, s60, 16
; GFX9-NEXT:    s_lshr_b32 s63, s62, 16
; GFX9-NEXT:    s_lshr_b32 s73, s72, 16
; GFX9-NEXT:    s_lshr_b32 s75, s74, 16
; GFX9-NEXT:    s_lshr_b32 s77, s76, 16
; GFX9-NEXT:    s_lshr_b32 s79, s78, 16
; GFX9-NEXT:    s_lshr_b32 s89, s88, 16
; GFX9-NEXT:    v_readfirstlane_b32 s94, v14
; GFX9-NEXT:    s_cmp_lg_u32 s94, 0
; GFX9-NEXT:    s_cbranch_scc0 .LBB43_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    s_pack_ll_b32_b16 s36, s16, s93
; GFX9-NEXT:    s_pack_ll_b32_b16 s37, s17, s92
; GFX9-NEXT:    s_pack_ll_b32_b16 s38, s18, s91
; GFX9-NEXT:    s_pack_ll_b32_b16 s39, s19, s90
; GFX9-NEXT:    s_pack_ll_b32_b16 s40, s20, s40
; GFX9-NEXT:    s_pack_ll_b32_b16 s41, s21, s41
; GFX9-NEXT:    s_pack_ll_b32_b16 s42, s22, s42
; GFX9-NEXT:    s_pack_ll_b32_b16 s43, s23, s43
; GFX9-NEXT:    s_pack_ll_b32_b16 s44, s24, s44
; GFX9-NEXT:    s_pack_ll_b32_b16 s45, s25, s45
; GFX9-NEXT:    s_pack_ll_b32_b16 s46, s26, s46
; GFX9-NEXT:    s_pack_ll_b32_b16 s47, s27, s47
; GFX9-NEXT:    s_pack_ll_b32_b16 s48, s28, s59
; GFX9-NEXT:    s_pack_ll_b32_b16 s49, s29, s56
; GFX9-NEXT:    s_pack_ll_b32_b16 s50, s88, s89
; GFX9-NEXT:    s_pack_ll_b32_b16 s51, s78, s79
; GFX9-NEXT:    s_pack_ll_b32_b16 s52, s76, s77
; GFX9-NEXT:    s_pack_ll_b32_b16 s53, s74, s75
; GFX9-NEXT:    s_pack_ll_b32_b16 s54, s72, s73
; GFX9-NEXT:    s_pack_ll_b32_b16 s55, s62, s63
; GFX9-NEXT:    s_pack_ll_b32_b16 s56, s60, s61
; GFX9-NEXT:    s_pack_ll_b32_b16 s57, s57, s58
; GFX9-NEXT:    s_pack_ll_b32_b16 s58, s14, s15
; GFX9-NEXT:    s_pack_ll_b32_b16 s59, s12, s13
; GFX9-NEXT:    s_pack_ll_b32_b16 s60, s10, s11
; GFX9-NEXT:    s_pack_ll_b32_b16 s61, s8, s9
; GFX9-NEXT:    s_pack_ll_b32_b16 s62, s6, s7
; GFX9-NEXT:    s_pack_ll_b32_b16 s63, s4, s5
; GFX9-NEXT:    v_mov_b32_e32 v0, s36
; GFX9-NEXT:    v_mov_b32_e32 v1, s37
; GFX9-NEXT:    v_mov_b32_e32 v2, s38
; GFX9-NEXT:    v_mov_b32_e32 v3, s39
; GFX9-NEXT:    v_mov_b32_e32 v4, s40
; GFX9-NEXT:    v_mov_b32_e32 v5, s41
; GFX9-NEXT:    v_mov_b32_e32 v6, s42
; GFX9-NEXT:    v_mov_b32_e32 v7, s43
; GFX9-NEXT:    v_mov_b32_e32 v8, s44
; GFX9-NEXT:    v_mov_b32_e32 v9, s45
; GFX9-NEXT:    v_mov_b32_e32 v10, s46
; GFX9-NEXT:    v_mov_b32_e32 v11, s47
; GFX9-NEXT:    v_mov_b32_e32 v12, s48
; GFX9-NEXT:    v_mov_b32_e32 v13, s49
; GFX9-NEXT:    v_mov_b32_e32 v14, s50
; GFX9-NEXT:    v_mov_b32_e32 v15, s51
; GFX9-NEXT:    v_mov_b32_e32 v16, s52
; GFX9-NEXT:    v_mov_b32_e32 v17, s53
; GFX9-NEXT:    v_mov_b32_e32 v18, s54
; GFX9-NEXT:    v_mov_b32_e32 v19, s55
; GFX9-NEXT:    v_mov_b32_e32 v20, s56
; GFX9-NEXT:    v_mov_b32_e32 v21, s57
; GFX9-NEXT:    v_mov_b32_e32 v22, s58
; GFX9-NEXT:    v_mov_b32_e32 v23, s59
; GFX9-NEXT:    v_mov_b32_e32 v24, s60
; GFX9-NEXT:    v_mov_b32_e32 v25, s61
; GFX9-NEXT:    v_mov_b32_e32 v26, s62
; GFX9-NEXT:    v_mov_b32_e32 v27, s63
; GFX9-NEXT:    v_mov_b32_e32 v28, s64
; GFX9-NEXT:    v_mov_b32_e32 v29, s65
; GFX9-NEXT:    v_mov_b32_e32 v30, s66
; GFX9-NEXT:    v_mov_b32_e32 v31, s67
; GFX9-NEXT:    s_branch .LBB43_3
; GFX9-NEXT:  .LBB43_2: ; %cmp.true
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s16, s93
; GFX9-NEXT:    v_pk_add_u16 v0, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s18, s91
; GFX9-NEXT:    v_pk_add_u16 v2, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s19, s90
; GFX9-NEXT:    v_pk_add_u16 v3, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s20, s40
; GFX9-NEXT:    v_pk_add_u16 v4, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s21, s41
; GFX9-NEXT:    v_pk_add_u16 v5, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s22, s42
; GFX9-NEXT:    v_pk_add_u16 v6, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s23, s43
; GFX9-NEXT:    v_pk_add_u16 v7, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s24, s44
; GFX9-NEXT:    v_pk_add_u16 v8, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s25, s45
; GFX9-NEXT:    v_pk_add_u16 v9, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s26, s46
; GFX9-NEXT:    v_pk_add_u16 v10, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s27, s47
; GFX9-NEXT:    v_pk_add_u16 v11, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s28, s59
; GFX9-NEXT:    v_pk_add_u16 v12, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s29, s56
; GFX9-NEXT:    v_pk_add_u16 v13, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s88, s89
; GFX9-NEXT:    v_pk_add_u16 v14, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s78, s79
; GFX9-NEXT:    v_pk_add_u16 v15, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s76, s77
; GFX9-NEXT:    v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s74, s75
; GFX9-NEXT:    v_pk_add_u16 v17, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s72, s73
; GFX9-NEXT:    v_pk_add_u16 v18, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s62, s63
; GFX9-NEXT:    v_pk_add_u16 v19, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s60, s61
; GFX9-NEXT:    s_pack_ll_b32_b16 s17, s17, s92
; GFX9-NEXT:    v_pk_add_u16 v20, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s57, s58
; GFX9-NEXT:    s_pack_ll_b32_b16 s14, s14, s15
; GFX9-NEXT:    s_pack_ll_b32_b16 s12, s12, s13
; GFX9-NEXT:    s_pack_ll_b32_b16 s10, s10, s11
; GFX9-NEXT:    s_pack_ll_b32_b16 s8, s8, s9
; GFX9-NEXT:    s_pack_ll_b32_b16 s6, s6, s7
; GFX9-NEXT:    s_pack_ll_b32_b16 s4, s4, s5
; GFX9-NEXT:    v_pk_add_u16 v1, s17, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v21, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v22, s14, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v23, s12, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v24, s10, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v25, s8, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v26, s6, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v27, s4, 3 op_sel_hi:[1,0]
; GFX9-NEXT:  .LBB43_3: ; %end
; GFX9-NEXT:    v_readlane_b32 s55, v32, 11
; GFX9-NEXT:    v_readlane_b32 s54, v32, 10
; GFX9-NEXT:    v_readlane_b32 s53, v32, 9
; GFX9-NEXT:    v_readlane_b32 s52, v32, 8
; GFX9-NEXT:    v_readlane_b32 s51, v32, 7
; GFX9-NEXT:    v_readlane_b32 s50, v32, 6
; GFX9-NEXT:    v_readlane_b32 s49, v32, 5
; GFX9-NEXT:    v_readlane_b32 s48, v32, 4
; GFX9-NEXT:    v_readlane_b32 s39, v32, 3
; GFX9-NEXT:    v_readlane_b32 s38, v32, 2
; GFX9-NEXT:    v_readlane_b32 s37, v32, 1
; GFX9-NEXT:    v_readlane_b32 s36, v32, 0
; GFX9-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    s_mov_b64 exec, s[4:5]
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v56i16_to_v14i64_scalar:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_readfirstlane_b32 s40, v9
; GFX11-NEXT:    v_readfirstlane_b32 s42, v8
; GFX11-NEXT:    v_readfirstlane_b32 s43, v7
; GFX11-NEXT:    v_readfirstlane_b32 s46, v6
; GFX11-NEXT:    v_readfirstlane_b32 s57, v5
; GFX11-NEXT:    v_readfirstlane_b32 s59, v4
; GFX11-NEXT:    v_readfirstlane_b32 s62, v3
; GFX11-NEXT:    v_readfirstlane_b32 s63, v2
; GFX11-NEXT:    v_readfirstlane_b32 s73, v1
; GFX11-NEXT:    v_readfirstlane_b32 s75, v0
; GFX11-NEXT:    v_readfirstlane_b32 s90, v10
; GFX11-NEXT:    s_lshr_b32 s88, s1, 16
; GFX11-NEXT:    s_lshr_b32 s89, s0, 16
; GFX11-NEXT:    s_lshr_b32 s44, s29, 16
; GFX11-NEXT:    s_lshr_b32 s47, s28, 16
; GFX11-NEXT:    s_lshr_b32 s15, s27, 16
; GFX11-NEXT:    s_lshr_b32 s14, s26, 16
; GFX11-NEXT:    s_lshr_b32 s13, s25, 16
; GFX11-NEXT:    s_lshr_b32 s12, s24, 16
; GFX11-NEXT:    s_lshr_b32 s11, s23, 16
; GFX11-NEXT:    s_lshr_b32 s10, s22, 16
; GFX11-NEXT:    s_lshr_b32 s9, s21, 16
; GFX11-NEXT:    s_lshr_b32 s8, s20, 16
; GFX11-NEXT:    s_lshr_b32 s7, s19, 16
; GFX11-NEXT:    s_lshr_b32 s6, s18, 16
; GFX11-NEXT:    s_lshr_b32 s5, s17, 16
; GFX11-NEXT:    s_lshr_b32 s4, s16, 16
; GFX11-NEXT:    s_lshr_b32 s78, s3, 16
; GFX11-NEXT:    s_lshr_b32 s79, s2, 16
; GFX11-NEXT:    s_lshr_b32 s41, s40, 16
; GFX11-NEXT:    s_lshr_b32 s45, s42, 16
; GFX11-NEXT:    s_lshr_b32 s56, s43, 16
; GFX11-NEXT:    s_lshr_b32 s58, s46, 16
; GFX11-NEXT:    s_lshr_b32 s60, s57, 16
; GFX11-NEXT:    s_lshr_b32 s61, s59, 16
; GFX11-NEXT:    s_lshr_b32 s72, s62, 16
; GFX11-NEXT:    s_lshr_b32 s74, s63, 16
; GFX11-NEXT:    s_lshr_b32 s76, s73, 16
; GFX11-NEXT:    s_lshr_b32 s77, s75, 16
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s0, s89
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s1, s88
; GFX11-NEXT:    s_cmp_lg_u32 s90, 0
; GFX11-NEXT:    s_cbranch_scc0 .LBB43_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-NEXT:    s_pack_ll_b32_b16 s2, s2, s79
; GFX11-NEXT:    s_pack_ll_b32_b16 s3, s3, s78
; GFX11-NEXT:    s_pack_ll_b32_b16 s4, s16, s4
; GFX11-NEXT:    s_pack_ll_b32_b16 s5, s17, s5
; GFX11-NEXT:    s_pack_ll_b32_b16 s6, s18, s6
; GFX11-NEXT:    s_pack_ll_b32_b16 s7, s19, s7
; GFX11-NEXT:    s_pack_ll_b32_b16 s8, s20, s8
; GFX11-NEXT:    s_pack_ll_b32_b16 s9, s21, s9
; GFX11-NEXT:    s_pack_ll_b32_b16 s10, s22, s10
; GFX11-NEXT:    s_pack_ll_b32_b16 s11, s23, s11
; GFX11-NEXT:    s_pack_ll_b32_b16 s12, s24, s12
; GFX11-NEXT:    s_pack_ll_b32_b16 s13, s25, s13
; GFX11-NEXT:    s_pack_ll_b32_b16 s14, s26, s14
; GFX11-NEXT:    s_pack_ll_b32_b16 s15, s27, s15
; GFX11-NEXT:    s_pack_ll_b32_b16 s16, s28, s47
; GFX11-NEXT:    s_pack_ll_b32_b16 s17, s29, s44
; GFX11-NEXT:    s_pack_ll_b32_b16 s18, s75, s77
; GFX11-NEXT:    s_pack_ll_b32_b16 s19, s73, s76
; GFX11-NEXT:    s_pack_ll_b32_b16 s20, s63, s74
; GFX11-NEXT:    s_pack_ll_b32_b16 s21, s62, s72
; GFX11-NEXT:    s_pack_ll_b32_b16 s22, s59, s61
; GFX11-NEXT:    s_pack_ll_b32_b16 s23, s57, s60
; GFX11-NEXT:    s_pack_ll_b32_b16 s24, s46, s58
; GFX11-NEXT:    s_pack_ll_b32_b16 s25, s43, s56
; GFX11-NEXT:    s_pack_ll_b32_b16 s26, s42, s45
; GFX11-NEXT:    s_pack_ll_b32_b16 s27, s40, s41
; GFX11-NEXT:    v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX11-NEXT:    v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; GFX11-NEXT:    v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
; GFX11-NEXT:    v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
; GFX11-NEXT:    v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
; GFX11-NEXT:    v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
; GFX11-NEXT:    v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
; GFX11-NEXT:    v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
; GFX11-NEXT:    v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
; GFX11-NEXT:    v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
; GFX11-NEXT:    v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
; GFX11-NEXT:    v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
; GFX11-NEXT:    v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
; GFX11-NEXT:    v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
; GFX11-NEXT:    v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
; GFX11-NEXT:    v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
; GFX11-NEXT:    s_setpc_b64 s[30:31]
; GFX11-NEXT:  .LBB43_2: ; %cmp.true
; GFX11-NEXT:    v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s2, s79
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s3, s78
; GFX11-NEXT:    v_pk_add_u16 v2, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v3, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s16, s4
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s17, s5
; GFX11-NEXT:    v_pk_add_u16 v4, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v5, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s18, s6
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s19, s7
; GFX11-NEXT:    v_pk_add_u16 v6, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v7, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s20, s8
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s21, s9
; GFX11-NEXT:    v_pk_add_u16 v8, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v9, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s22, s10
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s23, s11
; GFX11-NEXT:    v_pk_add_u16 v10, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v11, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s24, s12
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s25, s13
; GFX11-NEXT:    v_pk_add_u16 v12, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v13, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s26, s14
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s27, s15
; GFX11-NEXT:    v_pk_add_u16 v14, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v15, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s28, s47
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s29, s44
; GFX11-NEXT:    v_pk_add_u16 v16, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v17, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s75, s77
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s73, s76
; GFX11-NEXT:    v_pk_add_u16 v18, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v19, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s63, s74
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s62, s72
; GFX11-NEXT:    v_pk_add_u16 v20, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v21, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s59, s61
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s57, s60
; GFX11-NEXT:    v_pk_add_u16 v22, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v23, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s46, s58
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s43, s56
; GFX11-NEXT:    v_pk_add_u16 v24, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v25, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s42, s45
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s40, s41
; GFX11-NEXT:    v_pk_add_u16 v26, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v27, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = add <56 x i16> %a, splat (i16 3)
  %a2 = bitcast <56 x i16> %a1 to <14 x i64>
  br label %end

cmp.false:
  %a3 = bitcast <56 x i16> %a to <14 x i64>
  br label %end

end:
  %phi = phi <14 x i64> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <14 x i64> %phi
}

define <56 x half> @bitcast_v14i64_to_v56f16(<14 x i64> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v14i64_to_v56f16:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT:    ; implicit-def: $vgpr40
; SI-NEXT:    ; implicit-def: $vgpr47
; SI-NEXT:    ; implicit-def: $vgpr53
; SI-NEXT:    ; implicit-def: $vgpr46
; SI-NEXT:    ; implicit-def: $vgpr50
; SI-NEXT:    ; implicit-def: $vgpr45
; SI-NEXT:    ; implicit-def: $vgpr39
; SI-NEXT:    ; implicit-def: $vgpr44
; SI-NEXT:    ; implicit-def: $vgpr37
; SI-NEXT:    ; implicit-def: $vgpr43
; SI-NEXT:    ; implicit-def: $vgpr36
; SI-NEXT:    ; implicit-def: $vgpr42
; SI-NEXT:    ; implicit-def: $vgpr35
; SI-NEXT:    ; implicit-def: $vgpr41
; SI-NEXT:    ; implicit-def: $vgpr34
; SI-NEXT:    ; implicit-def: $vgpr55
; SI-NEXT:    ; implicit-def: $vgpr33
; SI-NEXT:    ; implicit-def: $vgpr54
; SI-NEXT:    ; implicit-def: $vgpr32
; SI-NEXT:    ; implicit-def: $vgpr52
; SI-NEXT:    ; implicit-def: $vgpr31
; SI-NEXT:    ; implicit-def: $vgpr51
; SI-NEXT:    ; implicit-def: $vgpr30
; SI-NEXT:    ; implicit-def: $vgpr49
; SI-NEXT:    ; implicit-def: $vgpr29
; SI-NEXT:    ; implicit-def: $vgpr48
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr38
; SI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB44_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    v_alignbit_b32 v28, v27, v26, 16
; SI-NEXT:    v_alignbit_b32 v29, v25, v24, 16
; SI-NEXT:    v_alignbit_b32 v30, v23, v22, 16
; SI-NEXT:    v_alignbit_b32 v31, v21, v20, 16
; SI-NEXT:    v_alignbit_b32 v32, v19, v18, 16
; SI-NEXT:    v_alignbit_b32 v33, v17, v16, 16
; SI-NEXT:    v_alignbit_b32 v34, v15, v14, 16
; SI-NEXT:    v_alignbit_b32 v35, v13, v12, 16
; SI-NEXT:    v_alignbit_b32 v36, v11, v10, 16
; SI-NEXT:    v_alignbit_b32 v37, v9, v8, 16
; SI-NEXT:    v_alignbit_b32 v39, v7, v6, 16
; SI-NEXT:    v_alignbit_b32 v50, v5, v4, 16
; SI-NEXT:    v_alignbit_b32 v53, v3, v2, 16
; SI-NEXT:    v_alignbit_b32 v40, v1, v0, 16
; SI-NEXT:    v_lshrrev_b32_e32 v38, 16, v27
; SI-NEXT:    v_lshrrev_b32_e32 v48, 16, v25
; SI-NEXT:    v_lshrrev_b32_e32 v49, 16, v23
; SI-NEXT:    v_lshrrev_b32_e32 v51, 16, v21
; SI-NEXT:    v_lshrrev_b32_e32 v52, 16, v19
; SI-NEXT:    v_lshrrev_b32_e32 v54, 16, v17
; SI-NEXT:    v_lshrrev_b32_e32 v55, 16, v15
; SI-NEXT:    s_waitcnt expcnt(6)
; SI-NEXT:    v_lshrrev_b32_e32 v41, 16, v13
; SI-NEXT:    s_waitcnt expcnt(5)
; SI-NEXT:    v_lshrrev_b32_e32 v42, 16, v11
; SI-NEXT:    s_waitcnt expcnt(4)
; SI-NEXT:    v_lshrrev_b32_e32 v43, 16, v9
; SI-NEXT:    s_waitcnt expcnt(3)
; SI-NEXT:    v_lshrrev_b32_e32 v44, 16, v7
; SI-NEXT:    s_waitcnt expcnt(2)
; SI-NEXT:    v_lshrrev_b32_e32 v45, 16, v5
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v46, 16, v3
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v47, 16, v1
; SI-NEXT:  .LBB44_2: ; %Flow
; SI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB44_4
; SI-NEXT:  ; %bb.3: ; %cmp.true
; SI-NEXT:    v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; SI-NEXT:    v_add_i32_e32 v2, vcc, 3, v2
; SI-NEXT:    v_addc_u32_e32 v3, vcc, 0, v3, vcc
; SI-NEXT:    v_add_i32_e32 v4, vcc, 3, v4
; SI-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
; SI-NEXT:    v_add_i32_e32 v6, vcc, 3, v6
; SI-NEXT:    v_addc_u32_e32 v7, vcc, 0, v7, vcc
; SI-NEXT:    v_add_i32_e32 v8, vcc, 3, v8
; SI-NEXT:    v_addc_u32_e32 v9, vcc, 0, v9, vcc
; SI-NEXT:    v_add_i32_e32 v10, vcc, 3, v10
; SI-NEXT:    v_addc_u32_e32 v11, vcc, 0, v11, vcc
; SI-NEXT:    v_add_i32_e32 v12, vcc, 3, v12
; SI-NEXT:    v_addc_u32_e32 v13, vcc, 0, v13, vcc
; SI-NEXT:    v_add_i32_e32 v14, vcc, 3, v14
; SI-NEXT:    v_addc_u32_e32 v15, vcc, 0, v15, vcc
; SI-NEXT:    v_add_i32_e32 v16, vcc, 3, v16
; SI-NEXT:    v_addc_u32_e32 v17, vcc, 0, v17, vcc
; SI-NEXT:    v_add_i32_e32 v18, vcc, 3, v18
; SI-NEXT:    v_addc_u32_e32 v19, vcc, 0, v19, vcc
; SI-NEXT:    v_add_i32_e32 v20, vcc, 3, v20
; SI-NEXT:    v_addc_u32_e32 v21, vcc, 0, v21, vcc
; SI-NEXT:    v_add_i32_e32 v22, vcc, 3, v22
; SI-NEXT:    v_addc_u32_e32 v23, vcc, 0, v23, vcc
; SI-NEXT:    v_add_i32_e32 v24, vcc, 3, v24
; SI-NEXT:    v_addc_u32_e32 v25, vcc, 0, v25, vcc
; SI-NEXT:    v_add_i32_e32 v26, vcc, 3, v26
; SI-NEXT:    v_addc_u32_e32 v27, vcc, 0, v27, vcc
; SI-NEXT:    v_alignbit_b32 v28, v27, v26, 16
; SI-NEXT:    v_alignbit_b32 v29, v25, v24, 16
; SI-NEXT:    v_alignbit_b32 v30, v23, v22, 16
; SI-NEXT:    v_alignbit_b32 v31, v21, v20, 16
; SI-NEXT:    v_alignbit_b32 v32, v19, v18, 16
; SI-NEXT:    v_alignbit_b32 v33, v17, v16, 16
; SI-NEXT:    v_alignbit_b32 v34, v15, v14, 16
; SI-NEXT:    v_alignbit_b32 v35, v13, v12, 16
; SI-NEXT:    v_alignbit_b32 v36, v11, v10, 16
; SI-NEXT:    v_alignbit_b32 v37, v9, v8, 16
; SI-NEXT:    v_alignbit_b32 v39, v7, v6, 16
; SI-NEXT:    v_alignbit_b32 v50, v5, v4, 16
; SI-NEXT:    v_alignbit_b32 v53, v3, v2, 16
; SI-NEXT:    v_alignbit_b32 v40, v1, v0, 16
; SI-NEXT:    v_lshrrev_b32_e32 v38, 16, v27
; SI-NEXT:    v_lshrrev_b32_e32 v48, 16, v25
; SI-NEXT:    v_lshrrev_b32_e32 v49, 16, v23
; SI-NEXT:    v_lshrrev_b32_e32 v51, 16, v21
; SI-NEXT:    v_lshrrev_b32_e32 v52, 16, v19
; SI-NEXT:    v_lshrrev_b32_e32 v54, 16, v17
; SI-NEXT:    v_lshrrev_b32_e32 v55, 16, v15
; SI-NEXT:    s_waitcnt expcnt(6)
; SI-NEXT:    v_lshrrev_b32_e32 v41, 16, v13
; SI-NEXT:    s_waitcnt expcnt(5)
; SI-NEXT:    v_lshrrev_b32_e32 v42, 16, v11
; SI-NEXT:    s_waitcnt expcnt(4)
; SI-NEXT:    v_lshrrev_b32_e32 v43, 16, v9
; SI-NEXT:    s_waitcnt expcnt(3)
; SI-NEXT:    v_lshrrev_b32_e32 v44, 16, v7
; SI-NEXT:    s_waitcnt expcnt(2)
; SI-NEXT:    v_lshrrev_b32_e32 v45, 16, v5
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v46, 16, v3
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v47, 16, v1
; SI-NEXT:  .LBB44_4: ; %end
; SI-NEXT:    s_or_b64 exec, exec, s[4:5]
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT:    v_lshlrev_b32_e32 v40, 16, v40
; SI-NEXT:    v_or_b32_e32 v0, v0, v40
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT:    v_lshlrev_b32_e32 v40, 16, v47
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT:    v_lshlrev_b32_e32 v53, 16, v53
; SI-NEXT:    v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT:    v_lshlrev_b32_e32 v50, 16, v50
; SI-NEXT:    v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT:    v_lshlrev_b32_e32 v39, 16, v39
; SI-NEXT:    v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT:    v_lshlrev_b32_e32 v37, 16, v37
; SI-NEXT:    v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT:    v_lshlrev_b32_e32 v36, 16, v36
; SI-NEXT:    v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; SI-NEXT:    v_or_b32_e32 v1, v1, v40
; SI-NEXT:    v_or_b32_e32 v2, v2, v53
; SI-NEXT:    v_lshlrev_b32_e32 v53, 16, v46
; SI-NEXT:    v_or_b32_e32 v4, v4, v50
; SI-NEXT:    v_lshlrev_b32_e32 v50, 16, v45
; SI-NEXT:    v_or_b32_e32 v6, v6, v39
; SI-NEXT:    v_lshlrev_b32_e32 v39, 16, v44
; SI-NEXT:    v_or_b32_e32 v8, v8, v37
; SI-NEXT:    v_lshlrev_b32_e32 v37, 16, v43
; SI-NEXT:    v_or_b32_e32 v10, v10, v36
; SI-NEXT:    v_lshlrev_b32_e32 v36, 16, v42
; SI-NEXT:    v_or_b32_e32 v12, v12, v35
; SI-NEXT:    v_lshlrev_b32_e32 v35, 16, v41
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; SI-NEXT:    v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT:    v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT:    v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; SI-NEXT:    v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT:    v_lshlrev_b32_e32 v32, 16, v32
; SI-NEXT:    v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT:    v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT:    v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; SI-NEXT:    v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; SI-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; SI-NEXT:    v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT:    v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT:    v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT:    v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT:    v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT:    v_and_b32_e32 v13, 0xffff, v13
; SI-NEXT:    v_or_b32_e32 v14, v14, v34
; SI-NEXT:    v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT:    v_lshlrev_b32_e32 v34, 16, v55
; SI-NEXT:    v_or_b32_e32 v16, v16, v33
; SI-NEXT:    v_and_b32_e32 v17, 0xffff, v17
; SI-NEXT:    v_lshlrev_b32_e32 v33, 16, v54
; SI-NEXT:    v_or_b32_e32 v18, v18, v32
; SI-NEXT:    v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT:    v_lshlrev_b32_e32 v32, 16, v52
; SI-NEXT:    v_or_b32_e32 v20, v20, v31
; SI-NEXT:    v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT:    v_lshlrev_b32_e32 v31, 16, v51
; SI-NEXT:    v_or_b32_e32 v22, v22, v30
; SI-NEXT:    v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v49
; SI-NEXT:    v_or_b32_e32 v24, v24, v29
; SI-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v48
; SI-NEXT:    v_or_b32_e32 v26, v26, v28
; SI-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v38
; SI-NEXT:    v_or_b32_e32 v3, v3, v53
; SI-NEXT:    v_or_b32_e32 v5, v5, v50
; SI-NEXT:    v_or_b32_e32 v7, v7, v39
; SI-NEXT:    v_or_b32_e32 v9, v9, v37
; SI-NEXT:    v_or_b32_e32 v11, v11, v36
; SI-NEXT:    v_or_b32_e32 v13, v13, v35
; SI-NEXT:    v_or_b32_e32 v15, v15, v34
; SI-NEXT:    v_or_b32_e32 v17, v17, v33
; SI-NEXT:    v_or_b32_e32 v19, v19, v32
; SI-NEXT:    v_or_b32_e32 v21, v21, v31
; SI-NEXT:    v_or_b32_e32 v23, v23, v30
; SI-NEXT:    v_or_b32_e32 v25, v25, v29
; SI-NEXT:    v_or_b32_e32 v27, v27, v28
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v14i64_to_v56f16:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT:    ; implicit-def: $vgpr47
; VI-NEXT:    ; implicit-def: $vgpr46
; VI-NEXT:    ; implicit-def: $vgpr45
; VI-NEXT:    ; implicit-def: $vgpr44
; VI-NEXT:    ; implicit-def: $vgpr43
; VI-NEXT:    ; implicit-def: $vgpr42
; VI-NEXT:    ; implicit-def: $vgpr41
; VI-NEXT:    ; implicit-def: $vgpr40
; VI-NEXT:    ; implicit-def: $vgpr55
; VI-NEXT:    ; implicit-def: $vgpr54
; VI-NEXT:    ; implicit-def: $vgpr53
; VI-NEXT:    ; implicit-def: $vgpr52
; VI-NEXT:    ; implicit-def: $vgpr51
; VI-NEXT:    ; implicit-def: $vgpr50
; VI-NEXT:    ; implicit-def: $vgpr49
; VI-NEXT:    ; implicit-def: $vgpr48
; VI-NEXT:    ; implicit-def: $vgpr39
; VI-NEXT:    ; implicit-def: $vgpr38
; VI-NEXT:    ; implicit-def: $vgpr37
; VI-NEXT:    ; implicit-def: $vgpr36
; VI-NEXT:    ; implicit-def: $vgpr35
; VI-NEXT:    ; implicit-def: $vgpr34
; VI-NEXT:    ; implicit-def: $vgpr33
; VI-NEXT:    ; implicit-def: $vgpr32
; VI-NEXT:    ; implicit-def: $vgpr31
; VI-NEXT:    ; implicit-def: $vgpr30
; VI-NEXT:    ; implicit-def: $vgpr29
; VI-NEXT:    ; implicit-def: $vgpr28
; VI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB44_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; VI-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; VI-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; VI-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; VI-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; VI-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; VI-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; VI-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; VI-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; VI-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; VI-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; VI-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; VI-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; VI-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; VI-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; VI-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; VI-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; VI-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; VI-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; VI-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; VI-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; VI-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; VI-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; VI-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; VI-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; VI-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; VI-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; VI-NEXT:  .LBB44_2: ; %Flow
; VI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB44_4
; VI-NEXT:  ; %bb.3: ; %cmp.true
; VI-NEXT:    v_add_u32_e32 v26, vcc, 3, v26
; VI-NEXT:    v_addc_u32_e32 v27, vcc, 0, v27, vcc
; VI-NEXT:    v_add_u32_e32 v24, vcc, 3, v24
; VI-NEXT:    v_addc_u32_e32 v25, vcc, 0, v25, vcc
; VI-NEXT:    v_add_u32_e32 v22, vcc, 3, v22
; VI-NEXT:    v_addc_u32_e32 v23, vcc, 0, v23, vcc
; VI-NEXT:    v_add_u32_e32 v20, vcc, 3, v20
; VI-NEXT:    v_addc_u32_e32 v21, vcc, 0, v21, vcc
; VI-NEXT:    v_add_u32_e32 v18, vcc, 3, v18
; VI-NEXT:    v_addc_u32_e32 v19, vcc, 0, v19, vcc
; VI-NEXT:    v_add_u32_e32 v16, vcc, 3, v16
; VI-NEXT:    v_addc_u32_e32 v17, vcc, 0, v17, vcc
; VI-NEXT:    v_add_u32_e32 v14, vcc, 3, v14
; VI-NEXT:    v_addc_u32_e32 v15, vcc, 0, v15, vcc
; VI-NEXT:    v_add_u32_e32 v12, vcc, 3, v12
; VI-NEXT:    v_addc_u32_e32 v13, vcc, 0, v13, vcc
; VI-NEXT:    v_add_u32_e32 v10, vcc, 3, v10
; VI-NEXT:    v_addc_u32_e32 v11, vcc, 0, v11, vcc
; VI-NEXT:    v_add_u32_e32 v8, vcc, 3, v8
; VI-NEXT:    v_addc_u32_e32 v9, vcc, 0, v9, vcc
; VI-NEXT:    v_add_u32_e32 v6, vcc, 3, v6
; VI-NEXT:    v_addc_u32_e32 v7, vcc, 0, v7, vcc
; VI-NEXT:    v_add_u32_e32 v4, vcc, 3, v4
; VI-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
; VI-NEXT:    v_add_u32_e32 v2, vcc, 3, v2
; VI-NEXT:    v_addc_u32_e32 v3, vcc, 0, v3, vcc
; VI-NEXT:    v_add_u32_e32 v0, vcc, 3, v0
; VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; VI-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; VI-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; VI-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; VI-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; VI-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; VI-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; VI-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; VI-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; VI-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; VI-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; VI-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; VI-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; VI-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; VI-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; VI-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; VI-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; VI-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; VI-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; VI-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; VI-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; VI-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; VI-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; VI-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; VI-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; VI-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; VI-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; VI-NEXT:  .LBB44_4: ; %end
; VI-NEXT:    s_or_b64 exec, exec, s[4:5]
; VI-NEXT:    v_lshlrev_b32_e32 v47, 16, v47
; VI-NEXT:    v_lshlrev_b32_e32 v46, 16, v46
; VI-NEXT:    v_lshlrev_b32_e32 v45, 16, v45
; VI-NEXT:    v_lshlrev_b32_e32 v44, 16, v44
; VI-NEXT:    v_lshlrev_b32_e32 v43, 16, v43
; VI-NEXT:    v_lshlrev_b32_e32 v42, 16, v42
; VI-NEXT:    v_lshlrev_b32_e32 v41, 16, v41
; VI-NEXT:    v_lshlrev_b32_e32 v40, 16, v40
; VI-NEXT:    v_or_b32_sdwa v0, v0, v47 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v1, v1, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v2, v2, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v3, v3, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v4, v4, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v5, v5, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v6, v6, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v7, v7, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; VI-NEXT:    v_lshlrev_b32_e32 v55, 16, v55
; VI-NEXT:    v_lshlrev_b32_e32 v54, 16, v54
; VI-NEXT:    v_lshlrev_b32_e32 v53, 16, v53
; VI-NEXT:    v_lshlrev_b32_e32 v52, 16, v52
; VI-NEXT:    v_lshlrev_b32_e32 v51, 16, v51
; VI-NEXT:    v_lshlrev_b32_e32 v50, 16, v50
; VI-NEXT:    v_lshlrev_b32_e32 v49, 16, v49
; VI-NEXT:    v_lshlrev_b32_e32 v48, 16, v48
; VI-NEXT:    v_lshlrev_b32_e32 v39, 16, v39
; VI-NEXT:    v_lshlrev_b32_e32 v38, 16, v38
; VI-NEXT:    v_lshlrev_b32_e32 v37, 16, v37
; VI-NEXT:    v_lshlrev_b32_e32 v36, 16, v36
; VI-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v34
; VI-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; VI-NEXT:    v_lshlrev_b32_e32 v32, 16, v32
; VI-NEXT:    v_lshlrev_b32_e32 v31, 16, v31
; VI-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; VI-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; VI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; VI-NEXT:    v_or_b32_sdwa v8, v8, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v9, v9, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v10, v10, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v11, v11, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v12, v12, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v13, v13, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v14, v14, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v15, v15, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v16, v16, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v17, v17, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v18, v18, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v19, v19, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v20, v20, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v21, v21, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v22, v22, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v23, v23, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v24, v24, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v25, v25, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v26, v26, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v14i64_to_v56f16:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT:    ; implicit-def: $vgpr47
; GFX9-NEXT:    ; implicit-def: $vgpr46
; GFX9-NEXT:    ; implicit-def: $vgpr45
; GFX9-NEXT:    ; implicit-def: $vgpr44
; GFX9-NEXT:    ; implicit-def: $vgpr43
; GFX9-NEXT:    ; implicit-def: $vgpr42
; GFX9-NEXT:    ; implicit-def: $vgpr41
; GFX9-NEXT:    ; implicit-def: $vgpr40
; GFX9-NEXT:    ; implicit-def: $vgpr55
; GFX9-NEXT:    ; implicit-def: $vgpr54
; GFX9-NEXT:    ; implicit-def: $vgpr53
; GFX9-NEXT:    ; implicit-def: $vgpr52
; GFX9-NEXT:    ; implicit-def: $vgpr51
; GFX9-NEXT:    ; implicit-def: $vgpr50
; GFX9-NEXT:    ; implicit-def: $vgpr49
; GFX9-NEXT:    ; implicit-def: $vgpr48
; GFX9-NEXT:    ; implicit-def: $vgpr39
; GFX9-NEXT:    ; implicit-def: $vgpr38
; GFX9-NEXT:    ; implicit-def: $vgpr37
; GFX9-NEXT:    ; implicit-def: $vgpr36
; GFX9-NEXT:    ; implicit-def: $vgpr35
; GFX9-NEXT:    ; implicit-def: $vgpr34
; GFX9-NEXT:    ; implicit-def: $vgpr33
; GFX9-NEXT:    ; implicit-def: $vgpr32
; GFX9-NEXT:    ; implicit-def: $vgpr31
; GFX9-NEXT:    ; implicit-def: $vgpr30
; GFX9-NEXT:    ; implicit-def: $vgpr29
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB44_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX9-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX9-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX9-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX9-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX9-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX9-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX9-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX9-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX9-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX9-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX9-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX9-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX9-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX9-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX9-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX9-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; GFX9-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; GFX9-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; GFX9-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; GFX9-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; GFX9-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; GFX9-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; GFX9-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; GFX9-NEXT:  .LBB44_2: ; %Flow
; GFX9-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB44_4
; GFX9-NEXT:  ; %bb.3: ; %cmp.true
; GFX9-NEXT:    v_add_co_u32_e32 v26, vcc, 3, v26
; GFX9-NEXT:    v_addc_co_u32_e32 v27, vcc, 0, v27, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v24, vcc, 3, v24
; GFX9-NEXT:    v_addc_co_u32_e32 v25, vcc, 0, v25, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v22, vcc, 3, v22
; GFX9-NEXT:    v_addc_co_u32_e32 v23, vcc, 0, v23, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v20, vcc, 3, v20
; GFX9-NEXT:    v_addc_co_u32_e32 v21, vcc, 0, v21, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v18, vcc, 3, v18
; GFX9-NEXT:    v_addc_co_u32_e32 v19, vcc, 0, v19, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v16, vcc, 3, v16
; GFX9-NEXT:    v_addc_co_u32_e32 v17, vcc, 0, v17, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v14, vcc, 3, v14
; GFX9-NEXT:    v_addc_co_u32_e32 v15, vcc, 0, v15, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v12, vcc, 3, v12
; GFX9-NEXT:    v_addc_co_u32_e32 v13, vcc, 0, v13, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v10, vcc, 3, v10
; GFX9-NEXT:    v_addc_co_u32_e32 v11, vcc, 0, v11, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v8, vcc, 3, v8
; GFX9-NEXT:    v_addc_co_u32_e32 v9, vcc, 0, v9, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v6, vcc, 3, v6
; GFX9-NEXT:    v_addc_co_u32_e32 v7, vcc, 0, v7, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v4, vcc, 3, v4
; GFX9-NEXT:    v_addc_co_u32_e32 v5, vcc, 0, v5, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v2, vcc, 3, v2
; GFX9-NEXT:    v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT:    v_add_co_u32_e32 v0, vcc, 3, v0
; GFX9-NEXT:    v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX9-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX9-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX9-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX9-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX9-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX9-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX9-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX9-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX9-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX9-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX9-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX9-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX9-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX9-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX9-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX9-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX9-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; GFX9-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; GFX9-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; GFX9-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; GFX9-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; GFX9-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; GFX9-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; GFX9-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; GFX9-NEXT:  .LBB44_4: ; %end
; GFX9-NEXT:    s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT:    s_mov_b32 s4, 0x5040100
; GFX9-NEXT:    v_perm_b32 v0, v47, v0, s4
; GFX9-NEXT:    v_perm_b32 v1, v46, v1, s4
; GFX9-NEXT:    v_perm_b32 v2, v45, v2, s4
; GFX9-NEXT:    v_perm_b32 v3, v44, v3, s4
; GFX9-NEXT:    v_perm_b32 v4, v43, v4, s4
; GFX9-NEXT:    v_perm_b32 v5, v42, v5, s4
; GFX9-NEXT:    v_perm_b32 v6, v41, v6, s4
; GFX9-NEXT:    v_perm_b32 v7, v40, v7, s4
; GFX9-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; GFX9-NEXT:    v_perm_b32 v8, v55, v8, s4
; GFX9-NEXT:    v_perm_b32 v9, v54, v9, s4
; GFX9-NEXT:    v_perm_b32 v10, v53, v10, s4
; GFX9-NEXT:    v_perm_b32 v11, v52, v11, s4
; GFX9-NEXT:    v_perm_b32 v12, v51, v12, s4
; GFX9-NEXT:    v_perm_b32 v13, v50, v13, s4
; GFX9-NEXT:    v_perm_b32 v14, v49, v14, s4
; GFX9-NEXT:    v_perm_b32 v15, v48, v15, s4
; GFX9-NEXT:    v_perm_b32 v16, v39, v16, s4
; GFX9-NEXT:    v_perm_b32 v17, v38, v17, s4
; GFX9-NEXT:    v_perm_b32 v18, v37, v18, s4
; GFX9-NEXT:    v_perm_b32 v19, v36, v19, s4
; GFX9-NEXT:    v_perm_b32 v20, v35, v20, s4
; GFX9-NEXT:    v_perm_b32 v21, v34, v21, s4
; GFX9-NEXT:    v_perm_b32 v22, v33, v22, s4
; GFX9-NEXT:    v_perm_b32 v23, v32, v23, s4
; GFX9-NEXT:    v_perm_b32 v24, v31, v24, s4
; GFX9-NEXT:    v_perm_b32 v25, v30, v25, s4
; GFX9-NEXT:    v_perm_b32 v26, v29, v26, s4
; GFX9-NEXT:    v_perm_b32 v27, v28, v27, s4
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-TRUE16-LABEL: bitcast_v14i64_to_v56f16:
; GFX11-TRUE16:       ; %bb.0:
; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-TRUE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT:    s_cbranch_execz .LBB44_2
; GFX11-TRUE16-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-TRUE16-NEXT:    v_add_co_u32 v26, vcc_lo, v26, 3
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT:    v_add_co_ci_u32_e64 v27, null, 0, v27, vcc_lo
; GFX11-TRUE16-NEXT:    v_add_co_u32 v24, vcc_lo, v24, 3
; GFX11-TRUE16-NEXT:    v_add_co_ci_u32_e64 v25, null, 0, v25, vcc_lo
; GFX11-TRUE16-NEXT:    v_add_co_u32 v22, vcc_lo, v22, 3
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT:    v_add_co_ci_u32_e64 v23, null, 0, v23, vcc_lo
; GFX11-TRUE16-NEXT:    v_add_co_u32 v20, vcc_lo, v20, 3
; GFX11-TRUE16-NEXT:    v_add_co_ci_u32_e64 v21, null, 0, v21, vcc_lo
; GFX11-TRUE16-NEXT:    v_add_co_u32 v18, vcc_lo, v18, 3
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT:    v_add_co_ci_u32_e64 v19, null, 0, v19, vcc_lo
; GFX11-TRUE16-NEXT:    v_add_co_u32 v16, vcc_lo, v16, 3
; GFX11-TRUE16-NEXT:    v_add_co_ci_u32_e64 v17, null, 0, v17, vcc_lo
; GFX11-TRUE16-NEXT:    v_add_co_u32 v14, vcc_lo, v14, 3
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT:    v_add_co_ci_u32_e64 v15, null, 0, v15, vcc_lo
; GFX11-TRUE16-NEXT:    v_add_co_u32 v12, vcc_lo, v12, 3
; GFX11-TRUE16-NEXT:    v_add_co_ci_u32_e64 v13, null, 0, v13, vcc_lo
; GFX11-TRUE16-NEXT:    v_add_co_u32 v10, vcc_lo, v10, 3
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT:    v_add_co_ci_u32_e64 v11, null, 0, v11, vcc_lo
; GFX11-TRUE16-NEXT:    v_add_co_u32 v8, vcc_lo, v8, 3
; GFX11-TRUE16-NEXT:    v_add_co_ci_u32_e64 v9, null, 0, v9, vcc_lo
; GFX11-TRUE16-NEXT:    v_add_co_u32 v6, vcc_lo, v6, 3
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT:    v_add_co_ci_u32_e64 v7, null, 0, v7, vcc_lo
; GFX11-TRUE16-NEXT:    v_add_co_u32 v4, vcc_lo, v4, 3
; GFX11-TRUE16-NEXT:    v_add_co_ci_u32_e64 v5, null, 0, v5, vcc_lo
; GFX11-TRUE16-NEXT:    v_add_co_u32 v2, vcc_lo, v2, 3
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-TRUE16-NEXT:    v_add_co_ci_u32_e64 v3, null, 0, v3, vcc_lo
; GFX11-TRUE16-NEXT:    v_add_co_u32 v0, vcc_lo, v0, 3
; GFX11-TRUE16-NEXT:    v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX11-TRUE16-NEXT:  .LBB44_2: ; %end
; GFX11-TRUE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v14i64_to_v56f16:
; GFX11-FAKE16:       ; %bb.0:
; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v28
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr71
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr70
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr69
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr68
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr67
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr66
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr65
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr64
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr55
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr54
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr53
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr52
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr51
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr50
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr49
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr48
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr39
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr38
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr37
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr36
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr35
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr34
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr33
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr32
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr31
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr30
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr29
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr28
; GFX11-FAKE16-NEXT:    s_and_saveexec_b32 s0, vcc_lo
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_cbranch_execz .LBB44_2
; GFX11-FAKE16-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v3
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v2
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v0
; GFX11-FAKE16-NEXT:  .LBB44_2: ; %Flow
; GFX11-FAKE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-FAKE16-NEXT:    s_cbranch_execz .LBB44_4
; GFX11-FAKE16-NEXT:  ; %bb.3: ; %cmp.true
; GFX11-FAKE16-NEXT:    v_add_co_u32 v26, vcc_lo, v26, 3
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT:    v_add_co_ci_u32_e64 v27, null, 0, v27, vcc_lo
; GFX11-FAKE16-NEXT:    v_add_co_u32 v24, vcc_lo, v24, 3
; GFX11-FAKE16-NEXT:    v_add_co_ci_u32_e64 v25, null, 0, v25, vcc_lo
; GFX11-FAKE16-NEXT:    v_add_co_u32 v22, vcc_lo, v22, 3
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT:    v_add_co_ci_u32_e64 v23, null, 0, v23, vcc_lo
; GFX11-FAKE16-NEXT:    v_add_co_u32 v20, vcc_lo, v20, 3
; GFX11-FAKE16-NEXT:    v_add_co_ci_u32_e64 v21, null, 0, v21, vcc_lo
; GFX11-FAKE16-NEXT:    v_add_co_u32 v18, vcc_lo, v18, 3
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT:    v_add_co_ci_u32_e64 v19, null, 0, v19, vcc_lo
; GFX11-FAKE16-NEXT:    v_add_co_u32 v16, vcc_lo, v16, 3
; GFX11-FAKE16-NEXT:    v_add_co_ci_u32_e64 v17, null, 0, v17, vcc_lo
; GFX11-FAKE16-NEXT:    v_add_co_u32 v14, vcc_lo, v14, 3
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT:    v_add_co_ci_u32_e64 v15, null, 0, v15, vcc_lo
; GFX11-FAKE16-NEXT:    v_add_co_u32 v12, vcc_lo, v12, 3
; GFX11-FAKE16-NEXT:    v_add_co_ci_u32_e64 v13, null, 0, v13, vcc_lo
; GFX11-FAKE16-NEXT:    v_add_co_u32 v10, vcc_lo, v10, 3
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT:    v_add_co_ci_u32_e64 v11, null, 0, v11, vcc_lo
; GFX11-FAKE16-NEXT:    v_add_co_u32 v8, vcc_lo, v8, 3
; GFX11-FAKE16-NEXT:    v_add_co_ci_u32_e64 v9, null, 0, v9, vcc_lo
; GFX11-FAKE16-NEXT:    v_add_co_u32 v6, vcc_lo, v6, 3
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT:    v_add_co_ci_u32_e64 v7, null, 0, v7, vcc_lo
; GFX11-FAKE16-NEXT:    v_add_co_u32 v4, vcc_lo, v4, 3
; GFX11-FAKE16-NEXT:    v_add_co_ci_u32_e64 v5, null, 0, v5, vcc_lo
; GFX11-FAKE16-NEXT:    v_add_co_u32 v2, vcc_lo, v2, 3
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-FAKE16-NEXT:    v_add_co_ci_u32_e64 v3, null, 0, v3, vcc_lo
; GFX11-FAKE16-NEXT:    v_add_co_u32 v0, vcc_lo, v0, 3
; GFX11-FAKE16-NEXT:    v_add_co_ci_u32_e64 v1, null, 0, v1, vcc_lo
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v3
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v2
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v0
; GFX11-FAKE16-NEXT:  .LBB44_4: ; %end
; GFX11-FAKE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v71, v0, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v1, v70, v1, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v2, v69, v2, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v3, v68, v3, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v4, v67, v4, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v5, v66, v5, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v6, v65, v6, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v7, v64, v7, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v8, v55, v8, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v9, v54, v9, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v10, v53, v10, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v11, v52, v11, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v12, v51, v12, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v13, v50, v13, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v14, v49, v14, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v15, v48, v15, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v16, v39, v16, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v17, v38, v17, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v18, v37, v18, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v19, v36, v19, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v20, v35, v20, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v21, v34, v21, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v22, v33, v22, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v23, v32, v23, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v24, v31, v24, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v25, v30, v25, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v26, v29, v26, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v27, v28, v27, 0x5040100
; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = add <14 x i64> %a, splat (i64 3)
  %a2 = bitcast <14 x i64> %a1 to <56 x half>
  br label %end

cmp.false:
  %a3 = bitcast <14 x i64> %a to <56 x half>
  br label %end

end:
  %phi = phi <56 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <56 x half> %phi
}

define inreg <56 x half> @bitcast_v14i64_to_v56f16_scalar(<14 x i64> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v14i64_to_v56f16_scalar:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_store_dword v28, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_writelane_b32 v28, s34, 0
; SI-NEXT:    v_writelane_b32 v28, s35, 1
; SI-NEXT:    v_writelane_b32 v28, s36, 2
; SI-NEXT:    v_writelane_b32 v28, s37, 3
; SI-NEXT:    v_writelane_b32 v28, s38, 4
; SI-NEXT:    v_writelane_b32 v28, s39, 5
; SI-NEXT:    v_writelane_b32 v28, s48, 6
; SI-NEXT:    v_writelane_b32 v28, s49, 7
; SI-NEXT:    v_writelane_b32 v28, s30, 8
; SI-NEXT:    v_writelane_b32 v28, s31, 9
; SI-NEXT:    v_readfirstlane_b32 s40, v14
; SI-NEXT:    v_readfirstlane_b32 s5, v13
; SI-NEXT:    v_readfirstlane_b32 s4, v12
; SI-NEXT:    v_readfirstlane_b32 s7, v11
; SI-NEXT:    v_readfirstlane_b32 s6, v10
; SI-NEXT:    v_readfirstlane_b32 s9, v9
; SI-NEXT:    v_readfirstlane_b32 s8, v8
; SI-NEXT:    v_readfirstlane_b32 s11, v7
; SI-NEXT:    v_readfirstlane_b32 s10, v6
; SI-NEXT:    v_readfirstlane_b32 s13, v5
; SI-NEXT:    v_readfirstlane_b32 s12, v4
; SI-NEXT:    v_readfirstlane_b32 s15, v3
; SI-NEXT:    v_readfirstlane_b32 s14, v2
; SI-NEXT:    v_readfirstlane_b32 s41, v1
; SI-NEXT:    s_cmp_lg_u32 s40, 0
; SI-NEXT:    v_readfirstlane_b32 s40, v0
; SI-NEXT:    s_cbranch_scc1 .LBB45_2
; SI-NEXT:  ; %bb.1: ; %cmp.true
; SI-NEXT:    s_add_u32 s4, s4, 3
; SI-NEXT:    s_addc_u32 s5, s5, 0
; SI-NEXT:    s_add_u32 s6, s6, 3
; SI-NEXT:    s_addc_u32 s7, s7, 0
; SI-NEXT:    s_add_u32 s8, s8, 3
; SI-NEXT:    s_addc_u32 s9, s9, 0
; SI-NEXT:    s_add_u32 s10, s10, 3
; SI-NEXT:    s_addc_u32 s11, s11, 0
; SI-NEXT:    s_add_u32 s12, s12, 3
; SI-NEXT:    s_addc_u32 s13, s13, 0
; SI-NEXT:    s_add_u32 s14, s14, 3
; SI-NEXT:    s_addc_u32 s15, s15, 0
; SI-NEXT:    s_add_u32 s40, s40, 3
; SI-NEXT:    s_addc_u32 s41, s41, 0
; SI-NEXT:    s_add_u32 s28, s28, 3
; SI-NEXT:    s_addc_u32 s29, s29, 0
; SI-NEXT:    s_add_u32 s26, s26, 3
; SI-NEXT:    s_addc_u32 s27, s27, 0
; SI-NEXT:    s_add_u32 s24, s24, 3
; SI-NEXT:    s_addc_u32 s25, s25, 0
; SI-NEXT:    s_add_u32 s22, s22, 3
; SI-NEXT:    s_addc_u32 s23, s23, 0
; SI-NEXT:    s_add_u32 s20, s20, 3
; SI-NEXT:    s_addc_u32 s21, s21, 0
; SI-NEXT:    s_add_u32 s18, s18, 3
; SI-NEXT:    s_addc_u32 s19, s19, 0
; SI-NEXT:    s_add_u32 s16, s16, 3
; SI-NEXT:    s_addc_u32 s17, s17, 0
; SI-NEXT:  .LBB45_2: ; %cmp.false
; SI-NEXT:    s_lshr_b64 s[42:43], s[4:5], 16
; SI-NEXT:    s_lshr_b64 s[92:93], s[16:17], 16
; SI-NEXT:    s_lshr_b32 s49, s17, 16
; SI-NEXT:    s_lshl_b32 s43, s92, 16
; SI-NEXT:    s_and_b32 s16, s16, 0xffff
; SI-NEXT:    s_lshr_b64 s[90:91], s[18:19], 16
; SI-NEXT:    s_or_b32 s16, s16, s43
; SI-NEXT:    s_and_b32 s17, s17, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s49, 16
; SI-NEXT:    s_lshr_b32 s48, s19, 16
; SI-NEXT:    s_or_b32 s17, s17, s43
; SI-NEXT:    s_lshl_b32 s43, s90, 16
; SI-NEXT:    s_and_b32 s18, s18, 0xffff
; SI-NEXT:    s_lshr_b64 s[88:89], s[20:21], 16
; SI-NEXT:    s_or_b32 s18, s18, s43
; SI-NEXT:    s_and_b32 s19, s19, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s48, 16
; SI-NEXT:    s_lshr_b32 s39, s21, 16
; SI-NEXT:    s_or_b32 s19, s19, s43
; SI-NEXT:    s_lshl_b32 s43, s88, 16
; SI-NEXT:    s_and_b32 s20, s20, 0xffff
; SI-NEXT:    s_lshr_b64 s[78:79], s[22:23], 16
; SI-NEXT:    s_or_b32 s20, s20, s43
; SI-NEXT:    s_and_b32 s21, s21, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s39, 16
; SI-NEXT:    s_lshr_b32 s38, s23, 16
; SI-NEXT:    s_or_b32 s21, s21, s43
; SI-NEXT:    s_lshl_b32 s43, s78, 16
; SI-NEXT:    s_and_b32 s22, s22, 0xffff
; SI-NEXT:    s_lshr_b64 s[76:77], s[24:25], 16
; SI-NEXT:    s_or_b32 s22, s22, s43
; SI-NEXT:    s_and_b32 s23, s23, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s38, 16
; SI-NEXT:    s_lshr_b32 s37, s25, 16
; SI-NEXT:    s_or_b32 s23, s23, s43
; SI-NEXT:    s_and_b32 s24, s24, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s76, 16
; SI-NEXT:    s_lshr_b64 s[74:75], s[26:27], 16
; SI-NEXT:    s_or_b32 s24, s24, s43
; SI-NEXT:    s_and_b32 s25, s25, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s37, 16
; SI-NEXT:    s_lshr_b32 s36, s27, 16
; SI-NEXT:    s_or_b32 s25, s25, s43
; SI-NEXT:    s_and_b32 s26, s26, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s74, 16
; SI-NEXT:    s_lshr_b64 s[72:73], s[28:29], 16
; SI-NEXT:    s_or_b32 s26, s26, s43
; SI-NEXT:    s_and_b32 s27, s27, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s36, 16
; SI-NEXT:    s_lshr_b32 s35, s29, 16
; SI-NEXT:    s_or_b32 s27, s27, s43
; SI-NEXT:    s_and_b32 s28, s28, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s72, 16
; SI-NEXT:    s_lshr_b64 s[62:63], s[40:41], 16
; SI-NEXT:    s_or_b32 s28, s28, s43
; SI-NEXT:    s_and_b32 s29, s29, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s35, 16
; SI-NEXT:    s_lshr_b32 s34, s41, 16
; SI-NEXT:    s_or_b32 s29, s29, s43
; SI-NEXT:    s_and_b32 s40, s40, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s62, 16
; SI-NEXT:    s_lshr_b64 s[60:61], s[14:15], 16
; SI-NEXT:    s_or_b32 s40, s40, s43
; SI-NEXT:    s_and_b32 s41, s41, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s34, 16
; SI-NEXT:    s_lshr_b32 s31, s15, 16
; SI-NEXT:    s_or_b32 s41, s41, s43
; SI-NEXT:    s_and_b32 s14, s14, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s60, 16
; SI-NEXT:    s_lshr_b64 s[58:59], s[12:13], 16
; SI-NEXT:    s_or_b32 s14, s14, s43
; SI-NEXT:    s_and_b32 s15, s15, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s31, 16
; SI-NEXT:    s_lshr_b32 s30, s13, 16
; SI-NEXT:    s_or_b32 s15, s15, s43
; SI-NEXT:    s_and_b32 s12, s12, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s58, 16
; SI-NEXT:    s_lshr_b64 s[56:57], s[10:11], 16
; SI-NEXT:    s_or_b32 s12, s12, s43
; SI-NEXT:    s_and_b32 s13, s13, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s30, 16
; SI-NEXT:    s_lshr_b32 vcc_hi, s11, 16
; SI-NEXT:    s_or_b32 s13, s13, s43
; SI-NEXT:    s_and_b32 s10, s10, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s56, 16
; SI-NEXT:    s_lshr_b64 s[46:47], s[8:9], 16
; SI-NEXT:    s_or_b32 s10, s10, s43
; SI-NEXT:    s_and_b32 s11, s11, 0xffff
; SI-NEXT:    s_lshl_b32 s43, vcc_hi, 16
; SI-NEXT:    s_lshr_b32 vcc_lo, s9, 16
; SI-NEXT:    s_or_b32 s11, s11, s43
; SI-NEXT:    s_and_b32 s8, s8, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s46, 16
; SI-NEXT:    s_lshr_b64 s[44:45], s[6:7], 16
; SI-NEXT:    s_or_b32 s8, s8, s43
; SI-NEXT:    s_and_b32 s9, s9, 0xffff
; SI-NEXT:    s_lshl_b32 s43, vcc_lo, 16
; SI-NEXT:    s_lshr_b32 s94, s5, 16
; SI-NEXT:    s_lshr_b32 s95, s7, 16
; SI-NEXT:    s_or_b32 s9, s9, s43
; SI-NEXT:    s_and_b32 s6, s6, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s44, 16
; SI-NEXT:    s_and_b32 s4, s4, 0xffff
; SI-NEXT:    s_lshl_b32 s42, s42, 16
; SI-NEXT:    s_or_b32 s6, s6, s43
; SI-NEXT:    s_and_b32 s7, s7, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s95, 16
; SI-NEXT:    s_or_b32 s4, s4, s42
; SI-NEXT:    s_and_b32 s5, s5, 0xffff
; SI-NEXT:    s_lshl_b32 s42, s94, 16
; SI-NEXT:    s_or_b32 s7, s7, s43
; SI-NEXT:    s_or_b32 s5, s5, s42
; SI-NEXT:    v_readlane_b32 s30, v28, 8
; SI-NEXT:    v_mov_b32_e32 v0, s16
; SI-NEXT:    v_mov_b32_e32 v1, s17
; SI-NEXT:    v_mov_b32_e32 v2, s18
; SI-NEXT:    v_mov_b32_e32 v3, s19
; SI-NEXT:    v_mov_b32_e32 v4, s20
; SI-NEXT:    v_mov_b32_e32 v5, s21
; SI-NEXT:    v_mov_b32_e32 v6, s22
; SI-NEXT:    v_mov_b32_e32 v7, s23
; SI-NEXT:    v_mov_b32_e32 v8, s24
; SI-NEXT:    v_mov_b32_e32 v9, s25
; SI-NEXT:    v_mov_b32_e32 v10, s26
; SI-NEXT:    v_mov_b32_e32 v11, s27
; SI-NEXT:    v_mov_b32_e32 v12, s28
; SI-NEXT:    v_mov_b32_e32 v13, s29
; SI-NEXT:    v_mov_b32_e32 v14, s40
; SI-NEXT:    v_mov_b32_e32 v15, s41
; SI-NEXT:    v_mov_b32_e32 v16, s14
; SI-NEXT:    v_mov_b32_e32 v17, s15
; SI-NEXT:    v_mov_b32_e32 v18, s12
; SI-NEXT:    v_mov_b32_e32 v19, s13
; SI-NEXT:    v_mov_b32_e32 v20, s10
; SI-NEXT:    v_mov_b32_e32 v21, s11
; SI-NEXT:    v_mov_b32_e32 v22, s8
; SI-NEXT:    v_mov_b32_e32 v23, s9
; SI-NEXT:    v_mov_b32_e32 v24, s6
; SI-NEXT:    v_mov_b32_e32 v25, s7
; SI-NEXT:    v_mov_b32_e32 v26, s4
; SI-NEXT:    v_mov_b32_e32 v27, s5
; SI-NEXT:    v_readlane_b32 s31, v28, 9
; SI-NEXT:    v_readlane_b32 s49, v28, 7
; SI-NEXT:    v_readlane_b32 s48, v28, 6
; SI-NEXT:    v_readlane_b32 s39, v28, 5
; SI-NEXT:    v_readlane_b32 s38, v28, 4
; SI-NEXT:    v_readlane_b32 s37, v28, 3
; SI-NEXT:    v_readlane_b32 s36, v28, 2
; SI-NEXT:    v_readlane_b32 s35, v28, 1
; SI-NEXT:    v_readlane_b32 s34, v28, 0
; SI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v14i64_to_v56f16_scalar:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    v_readfirstlane_b32 s41, v14
; VI-NEXT:    v_readfirstlane_b32 s4, v13
; VI-NEXT:    v_readfirstlane_b32 s5, v12
; VI-NEXT:    v_readfirstlane_b32 s6, v11
; VI-NEXT:    v_readfirstlane_b32 s7, v10
; VI-NEXT:    v_readfirstlane_b32 s8, v9
; VI-NEXT:    v_readfirstlane_b32 s9, v8
; VI-NEXT:    v_readfirstlane_b32 s10, v7
; VI-NEXT:    v_readfirstlane_b32 s11, v6
; VI-NEXT:    v_readfirstlane_b32 s12, v5
; VI-NEXT:    v_readfirstlane_b32 s13, v4
; VI-NEXT:    v_readfirstlane_b32 s14, v3
; VI-NEXT:    v_readfirstlane_b32 s15, v2
; VI-NEXT:    v_readfirstlane_b32 s40, v1
; VI-NEXT:    s_cmp_lg_u32 s41, 0
; VI-NEXT:    v_readfirstlane_b32 s41, v0
; VI-NEXT:    s_cbranch_scc1 .LBB45_2
; VI-NEXT:  ; %bb.1: ; %cmp.true
; VI-NEXT:    s_add_u32 s5, s5, 3
; VI-NEXT:    s_addc_u32 s4, s4, 0
; VI-NEXT:    s_add_u32 s7, s7, 3
; VI-NEXT:    s_addc_u32 s6, s6, 0
; VI-NEXT:    s_add_u32 s9, s9, 3
; VI-NEXT:    s_addc_u32 s8, s8, 0
; VI-NEXT:    s_add_u32 s11, s11, 3
; VI-NEXT:    s_addc_u32 s10, s10, 0
; VI-NEXT:    s_add_u32 s13, s13, 3
; VI-NEXT:    s_addc_u32 s12, s12, 0
; VI-NEXT:    s_add_u32 s15, s15, 3
; VI-NEXT:    s_addc_u32 s14, s14, 0
; VI-NEXT:    s_add_u32 s41, s41, 3
; VI-NEXT:    s_addc_u32 s40, s40, 0
; VI-NEXT:    s_add_u32 s28, s28, 3
; VI-NEXT:    s_addc_u32 s29, s29, 0
; VI-NEXT:    s_add_u32 s26, s26, 3
; VI-NEXT:    s_addc_u32 s27, s27, 0
; VI-NEXT:    s_add_u32 s24, s24, 3
; VI-NEXT:    s_addc_u32 s25, s25, 0
; VI-NEXT:    s_add_u32 s22, s22, 3
; VI-NEXT:    s_addc_u32 s23, s23, 0
; VI-NEXT:    s_add_u32 s20, s20, 3
; VI-NEXT:    s_addc_u32 s21, s21, 0
; VI-NEXT:    s_add_u32 s18, s18, 3
; VI-NEXT:    s_addc_u32 s19, s19, 0
; VI-NEXT:    s_add_u32 s16, s16, 3
; VI-NEXT:    s_addc_u32 s17, s17, 0
; VI-NEXT:  .LBB45_2: ; %cmp.false
; VI-NEXT:    s_lshr_b32 s42, s4, 16
; VI-NEXT:    s_lshr_b32 s43, s5, 16
; VI-NEXT:    s_lshr_b32 s44, s6, 16
; VI-NEXT:    s_lshr_b32 s45, s7, 16
; VI-NEXT:    s_lshr_b32 s46, s8, 16
; VI-NEXT:    s_lshr_b32 s47, s9, 16
; VI-NEXT:    s_lshr_b32 s56, s10, 16
; VI-NEXT:    s_lshr_b32 s57, s11, 16
; VI-NEXT:    s_lshr_b32 s58, s12, 16
; VI-NEXT:    s_lshr_b32 s59, s13, 16
; VI-NEXT:    s_lshr_b32 s60, s14, 16
; VI-NEXT:    s_lshr_b32 s61, s15, 16
; VI-NEXT:    s_lshr_b32 s62, s40, 16
; VI-NEXT:    s_lshr_b32 s63, s41, 16
; VI-NEXT:    s_lshr_b32 s72, s29, 16
; VI-NEXT:    s_lshr_b32 s73, s28, 16
; VI-NEXT:    s_lshr_b32 s74, s27, 16
; VI-NEXT:    s_lshr_b32 s75, s26, 16
; VI-NEXT:    s_lshr_b32 s76, s25, 16
; VI-NEXT:    s_lshr_b32 s77, s24, 16
; VI-NEXT:    s_lshr_b32 s78, s23, 16
; VI-NEXT:    s_lshr_b32 s79, s22, 16
; VI-NEXT:    s_lshr_b32 s88, s21, 16
; VI-NEXT:    s_lshr_b32 s89, s20, 16
; VI-NEXT:    s_lshr_b32 s90, s19, 16
; VI-NEXT:    s_lshr_b32 s91, s18, 16
; VI-NEXT:    s_lshr_b32 vcc_lo, s17, 16
; VI-NEXT:    s_lshr_b32 vcc_hi, s16, 16
; VI-NEXT:    s_and_b32 s16, 0xffff, s16
; VI-NEXT:    s_lshl_b32 vcc_hi, vcc_hi, 16
; VI-NEXT:    s_and_b32 s17, 0xffff, s17
; VI-NEXT:    s_lshl_b32 vcc_lo, vcc_lo, 16
; VI-NEXT:    s_and_b32 s18, 0xffff, s18
; VI-NEXT:    s_lshl_b32 s91, s91, 16
; VI-NEXT:    s_and_b32 s19, 0xffff, s19
; VI-NEXT:    s_lshl_b32 s90, s90, 16
; VI-NEXT:    s_and_b32 s20, 0xffff, s20
; VI-NEXT:    s_lshl_b32 s89, s89, 16
; VI-NEXT:    s_and_b32 s21, 0xffff, s21
; VI-NEXT:    s_lshl_b32 s88, s88, 16
; VI-NEXT:    s_and_b32 s22, 0xffff, s22
; VI-NEXT:    s_lshl_b32 s79, s79, 16
; VI-NEXT:    s_and_b32 s23, 0xffff, s23
; VI-NEXT:    s_lshl_b32 s78, s78, 16
; VI-NEXT:    s_and_b32 s24, 0xffff, s24
; VI-NEXT:    s_lshl_b32 s77, s77, 16
; VI-NEXT:    s_and_b32 s25, 0xffff, s25
; VI-NEXT:    s_lshl_b32 s76, s76, 16
; VI-NEXT:    s_and_b32 s26, 0xffff, s26
; VI-NEXT:    s_lshl_b32 s75, s75, 16
; VI-NEXT:    s_and_b32 s27, 0xffff, s27
; VI-NEXT:    s_lshl_b32 s74, s74, 16
; VI-NEXT:    s_and_b32 s28, 0xffff, s28
; VI-NEXT:    s_lshl_b32 s73, s73, 16
; VI-NEXT:    s_and_b32 s29, 0xffff, s29
; VI-NEXT:    s_lshl_b32 s72, s72, 16
; VI-NEXT:    s_and_b32 s41, 0xffff, s41
; VI-NEXT:    s_lshl_b32 s63, s63, 16
; VI-NEXT:    s_and_b32 s40, 0xffff, s40
; VI-NEXT:    s_lshl_b32 s62, s62, 16
; VI-NEXT:    s_and_b32 s15, 0xffff, s15
; VI-NEXT:    s_lshl_b32 s61, s61, 16
; VI-NEXT:    s_and_b32 s14, 0xffff, s14
; VI-NEXT:    s_lshl_b32 s60, s60, 16
; VI-NEXT:    s_and_b32 s13, 0xffff, s13
; VI-NEXT:    s_lshl_b32 s59, s59, 16
; VI-NEXT:    s_and_b32 s12, 0xffff, s12
; VI-NEXT:    s_lshl_b32 s58, s58, 16
; VI-NEXT:    s_and_b32 s11, 0xffff, s11
; VI-NEXT:    s_lshl_b32 s57, s57, 16
; VI-NEXT:    s_and_b32 s10, 0xffff, s10
; VI-NEXT:    s_lshl_b32 s56, s56, 16
; VI-NEXT:    s_and_b32 s9, 0xffff, s9
; VI-NEXT:    s_lshl_b32 s47, s47, 16
; VI-NEXT:    s_and_b32 s8, 0xffff, s8
; VI-NEXT:    s_lshl_b32 s46, s46, 16
; VI-NEXT:    s_and_b32 s7, 0xffff, s7
; VI-NEXT:    s_lshl_b32 s45, s45, 16
; VI-NEXT:    s_and_b32 s6, 0xffff, s6
; VI-NEXT:    s_lshl_b32 s44, s44, 16
; VI-NEXT:    s_and_b32 s5, 0xffff, s5
; VI-NEXT:    s_lshl_b32 s43, s43, 16
; VI-NEXT:    s_and_b32 s4, 0xffff, s4
; VI-NEXT:    s_lshl_b32 s42, s42, 16
; VI-NEXT:    s_or_b32 s16, s16, vcc_hi
; VI-NEXT:    s_or_b32 s17, s17, vcc_lo
; VI-NEXT:    s_or_b32 s18, s18, s91
; VI-NEXT:    s_or_b32 s19, s19, s90
; VI-NEXT:    s_or_b32 s20, s20, s89
; VI-NEXT:    s_or_b32 s21, s21, s88
; VI-NEXT:    s_or_b32 s22, s22, s79
; VI-NEXT:    s_or_b32 s23, s23, s78
; VI-NEXT:    s_or_b32 s24, s24, s77
; VI-NEXT:    s_or_b32 s25, s25, s76
; VI-NEXT:    s_or_b32 s26, s26, s75
; VI-NEXT:    s_or_b32 s27, s27, s74
; VI-NEXT:    s_or_b32 s28, s28, s73
; VI-NEXT:    s_or_b32 s29, s29, s72
; VI-NEXT:    s_or_b32 s41, s41, s63
; VI-NEXT:    s_or_b32 s40, s40, s62
; VI-NEXT:    s_or_b32 s15, s15, s61
; VI-NEXT:    s_or_b32 s14, s14, s60
; VI-NEXT:    s_or_b32 s13, s13, s59
; VI-NEXT:    s_or_b32 s12, s12, s58
; VI-NEXT:    s_or_b32 s11, s11, s57
; VI-NEXT:    s_or_b32 s10, s10, s56
; VI-NEXT:    s_or_b32 s9, s9, s47
; VI-NEXT:    s_or_b32 s8, s8, s46
; VI-NEXT:    s_or_b32 s7, s7, s45
; VI-NEXT:    s_or_b32 s6, s6, s44
; VI-NEXT:    s_or_b32 s5, s5, s43
; VI-NEXT:    s_or_b32 s4, s4, s42
; VI-NEXT:    v_mov_b32_e32 v0, s16
; VI-NEXT:    v_mov_b32_e32 v1, s17
; VI-NEXT:    v_mov_b32_e32 v2, s18
; VI-NEXT:    v_mov_b32_e32 v3, s19
; VI-NEXT:    v_mov_b32_e32 v4, s20
; VI-NEXT:    v_mov_b32_e32 v5, s21
; VI-NEXT:    v_mov_b32_e32 v6, s22
; VI-NEXT:    v_mov_b32_e32 v7, s23
; VI-NEXT:    v_mov_b32_e32 v8, s24
; VI-NEXT:    v_mov_b32_e32 v9, s25
; VI-NEXT:    v_mov_b32_e32 v10, s26
; VI-NEXT:    v_mov_b32_e32 v11, s27
; VI-NEXT:    v_mov_b32_e32 v12, s28
; VI-NEXT:    v_mov_b32_e32 v13, s29
; VI-NEXT:    v_mov_b32_e32 v14, s41
; VI-NEXT:    v_mov_b32_e32 v15, s40
; VI-NEXT:    v_mov_b32_e32 v16, s15
; VI-NEXT:    v_mov_b32_e32 v17, s14
; VI-NEXT:    v_mov_b32_e32 v18, s13
; VI-NEXT:    v_mov_b32_e32 v19, s12
; VI-NEXT:    v_mov_b32_e32 v20, s11
; VI-NEXT:    v_mov_b32_e32 v21, s10
; VI-NEXT:    v_mov_b32_e32 v22, s9
; VI-NEXT:    v_mov_b32_e32 v23, s8
; VI-NEXT:    v_mov_b32_e32 v24, s7
; VI-NEXT:    v_mov_b32_e32 v25, s6
; VI-NEXT:    v_mov_b32_e32 v26, s5
; VI-NEXT:    v_mov_b32_e32 v27, s4
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v14i64_to_v56f16_scalar:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    v_readfirstlane_b32 s41, v14
; GFX9-NEXT:    v_readfirstlane_b32 s4, v13
; GFX9-NEXT:    v_readfirstlane_b32 s5, v12
; GFX9-NEXT:    v_readfirstlane_b32 s6, v11
; GFX9-NEXT:    v_readfirstlane_b32 s7, v10
; GFX9-NEXT:    v_readfirstlane_b32 s8, v9
; GFX9-NEXT:    v_readfirstlane_b32 s9, v8
; GFX9-NEXT:    v_readfirstlane_b32 s10, v7
; GFX9-NEXT:    v_readfirstlane_b32 s11, v6
; GFX9-NEXT:    v_readfirstlane_b32 s12, v5
; GFX9-NEXT:    v_readfirstlane_b32 s13, v4
; GFX9-NEXT:    v_readfirstlane_b32 s14, v3
; GFX9-NEXT:    v_readfirstlane_b32 s15, v2
; GFX9-NEXT:    v_readfirstlane_b32 s40, v1
; GFX9-NEXT:    s_cmp_lg_u32 s41, 0
; GFX9-NEXT:    v_readfirstlane_b32 s41, v0
; GFX9-NEXT:    s_cbranch_scc1 .LBB45_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.true
; GFX9-NEXT:    s_add_u32 s5, s5, 3
; GFX9-NEXT:    s_addc_u32 s4, s4, 0
; GFX9-NEXT:    s_add_u32 s7, s7, 3
; GFX9-NEXT:    s_addc_u32 s6, s6, 0
; GFX9-NEXT:    s_add_u32 s9, s9, 3
; GFX9-NEXT:    s_addc_u32 s8, s8, 0
; GFX9-NEXT:    s_add_u32 s11, s11, 3
; GFX9-NEXT:    s_addc_u32 s10, s10, 0
; GFX9-NEXT:    s_add_u32 s13, s13, 3
; GFX9-NEXT:    s_addc_u32 s12, s12, 0
; GFX9-NEXT:    s_add_u32 s15, s15, 3
; GFX9-NEXT:    s_addc_u32 s14, s14, 0
; GFX9-NEXT:    s_add_u32 s41, s41, 3
; GFX9-NEXT:    s_addc_u32 s40, s40, 0
; GFX9-NEXT:    s_add_u32 s28, s28, 3
; GFX9-NEXT:    s_addc_u32 s29, s29, 0
; GFX9-NEXT:    s_add_u32 s26, s26, 3
; GFX9-NEXT:    s_addc_u32 s27, s27, 0
; GFX9-NEXT:    s_add_u32 s24, s24, 3
; GFX9-NEXT:    s_addc_u32 s25, s25, 0
; GFX9-NEXT:    s_add_u32 s22, s22, 3
; GFX9-NEXT:    s_addc_u32 s23, s23, 0
; GFX9-NEXT:    s_add_u32 s20, s20, 3
; GFX9-NEXT:    s_addc_u32 s21, s21, 0
; GFX9-NEXT:    s_add_u32 s18, s18, 3
; GFX9-NEXT:    s_addc_u32 s19, s19, 0
; GFX9-NEXT:    s_add_u32 s16, s16, 3
; GFX9-NEXT:    s_addc_u32 s17, s17, 0
; GFX9-NEXT:  .LBB45_2: ; %cmp.false
; GFX9-NEXT:    s_lshr_b32 s42, s4, 16
; GFX9-NEXT:    s_lshr_b32 s43, s5, 16
; GFX9-NEXT:    s_lshr_b32 s44, s6, 16
; GFX9-NEXT:    s_lshr_b32 s45, s7, 16
; GFX9-NEXT:    s_lshr_b32 s46, s8, 16
; GFX9-NEXT:    s_lshr_b32 s47, s9, 16
; GFX9-NEXT:    s_lshr_b32 s56, s10, 16
; GFX9-NEXT:    s_lshr_b32 s57, s11, 16
; GFX9-NEXT:    s_lshr_b32 s58, s12, 16
; GFX9-NEXT:    s_lshr_b32 s59, s13, 16
; GFX9-NEXT:    s_lshr_b32 s60, s14, 16
; GFX9-NEXT:    s_lshr_b32 s61, s15, 16
; GFX9-NEXT:    s_lshr_b32 s62, s40, 16
; GFX9-NEXT:    s_lshr_b32 s63, s41, 16
; GFX9-NEXT:    s_lshr_b32 s72, s29, 16
; GFX9-NEXT:    s_lshr_b32 s73, s28, 16
; GFX9-NEXT:    s_lshr_b32 s74, s27, 16
; GFX9-NEXT:    s_lshr_b32 s75, s26, 16
; GFX9-NEXT:    s_lshr_b32 s76, s25, 16
; GFX9-NEXT:    s_lshr_b32 s77, s24, 16
; GFX9-NEXT:    s_lshr_b32 s78, s23, 16
; GFX9-NEXT:    s_lshr_b32 s79, s22, 16
; GFX9-NEXT:    s_lshr_b32 s88, s21, 16
; GFX9-NEXT:    s_lshr_b32 s89, s20, 16
; GFX9-NEXT:    s_lshr_b32 s90, s19, 16
; GFX9-NEXT:    s_lshr_b32 s91, s18, 16
; GFX9-NEXT:    s_lshr_b32 s92, s17, 16
; GFX9-NEXT:    s_lshr_b32 s93, s16, 16
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s16, s93
; GFX9-NEXT:    s_pack_ll_b32_b16 s17, s17, s92
; GFX9-NEXT:    s_pack_ll_b32_b16 s18, s18, s91
; GFX9-NEXT:    s_pack_ll_b32_b16 s19, s19, s90
; GFX9-NEXT:    s_pack_ll_b32_b16 s20, s20, s89
; GFX9-NEXT:    s_pack_ll_b32_b16 s21, s21, s88
; GFX9-NEXT:    s_pack_ll_b32_b16 s22, s22, s79
; GFX9-NEXT:    s_pack_ll_b32_b16 s23, s23, s78
; GFX9-NEXT:    s_pack_ll_b32_b16 s24, s24, s77
; GFX9-NEXT:    s_pack_ll_b32_b16 s25, s25, s76
; GFX9-NEXT:    s_pack_ll_b32_b16 s26, s26, s75
; GFX9-NEXT:    s_pack_ll_b32_b16 s27, s27, s74
; GFX9-NEXT:    s_pack_ll_b32_b16 s28, s28, s73
; GFX9-NEXT:    s_pack_ll_b32_b16 s29, s29, s72
; GFX9-NEXT:    s_pack_ll_b32_b16 s41, s41, s63
; GFX9-NEXT:    s_pack_ll_b32_b16 s40, s40, s62
; GFX9-NEXT:    s_pack_ll_b32_b16 s15, s15, s61
; GFX9-NEXT:    s_pack_ll_b32_b16 s14, s14, s60
; GFX9-NEXT:    s_pack_ll_b32_b16 s13, s13, s59
; GFX9-NEXT:    s_pack_ll_b32_b16 s12, s12, s58
; GFX9-NEXT:    s_pack_ll_b32_b16 s11, s11, s57
; GFX9-NEXT:    s_pack_ll_b32_b16 s10, s10, s56
; GFX9-NEXT:    s_pack_ll_b32_b16 s9, s9, s47
; GFX9-NEXT:    s_pack_ll_b32_b16 s8, s8, s46
; GFX9-NEXT:    s_pack_ll_b32_b16 s7, s7, s45
; GFX9-NEXT:    s_pack_ll_b32_b16 s6, s6, s44
; GFX9-NEXT:    s_pack_ll_b32_b16 s5, s5, s43
; GFX9-NEXT:    s_pack_ll_b32_b16 s4, s4, s42
; GFX9-NEXT:    v_mov_b32_e32 v0, s16
; GFX9-NEXT:    v_mov_b32_e32 v1, s17
; GFX9-NEXT:    v_mov_b32_e32 v2, s18
; GFX9-NEXT:    v_mov_b32_e32 v3, s19
; GFX9-NEXT:    v_mov_b32_e32 v4, s20
; GFX9-NEXT:    v_mov_b32_e32 v5, s21
; GFX9-NEXT:    v_mov_b32_e32 v6, s22
; GFX9-NEXT:    v_mov_b32_e32 v7, s23
; GFX9-NEXT:    v_mov_b32_e32 v8, s24
; GFX9-NEXT:    v_mov_b32_e32 v9, s25
; GFX9-NEXT:    v_mov_b32_e32 v10, s26
; GFX9-NEXT:    v_mov_b32_e32 v11, s27
; GFX9-NEXT:    v_mov_b32_e32 v12, s28
; GFX9-NEXT:    v_mov_b32_e32 v13, s29
; GFX9-NEXT:    v_mov_b32_e32 v14, s41
; GFX9-NEXT:    v_mov_b32_e32 v15, s40
; GFX9-NEXT:    v_mov_b32_e32 v16, s15
; GFX9-NEXT:    v_mov_b32_e32 v17, s14
; GFX9-NEXT:    v_mov_b32_e32 v18, s13
; GFX9-NEXT:    v_mov_b32_e32 v19, s12
; GFX9-NEXT:    v_mov_b32_e32 v20, s11
; GFX9-NEXT:    v_mov_b32_e32 v21, s10
; GFX9-NEXT:    v_mov_b32_e32 v22, s9
; GFX9-NEXT:    v_mov_b32_e32 v23, s8
; GFX9-NEXT:    v_mov_b32_e32 v24, s7
; GFX9-NEXT:    v_mov_b32_e32 v25, s6
; GFX9-NEXT:    v_mov_b32_e32 v26, s5
; GFX9-NEXT:    v_mov_b32_e32 v27, s4
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v14i64_to_v56f16_scalar:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_readfirstlane_b32 s14, v10
; GFX11-NEXT:    v_readfirstlane_b32 s4, v9
; GFX11-NEXT:    v_readfirstlane_b32 s5, v8
; GFX11-NEXT:    v_readfirstlane_b32 s6, v7
; GFX11-NEXT:    v_readfirstlane_b32 s7, v6
; GFX11-NEXT:    v_readfirstlane_b32 s8, v5
; GFX11-NEXT:    v_readfirstlane_b32 s9, v4
; GFX11-NEXT:    v_readfirstlane_b32 s10, v3
; GFX11-NEXT:    v_readfirstlane_b32 s11, v2
; GFX11-NEXT:    v_readfirstlane_b32 s12, v1
; GFX11-NEXT:    v_readfirstlane_b32 s13, v0
; GFX11-NEXT:    s_cmp_lg_u32 s14, 0
; GFX11-NEXT:    s_cbranch_scc1 .LBB45_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-NEXT:    s_add_u32 s5, s5, 3
; GFX11-NEXT:    s_addc_u32 s4, s4, 0
; GFX11-NEXT:    s_add_u32 s7, s7, 3
; GFX11-NEXT:    s_addc_u32 s6, s6, 0
; GFX11-NEXT:    s_add_u32 s9, s9, 3
; GFX11-NEXT:    s_addc_u32 s8, s8, 0
; GFX11-NEXT:    s_add_u32 s11, s11, 3
; GFX11-NEXT:    s_addc_u32 s10, s10, 0
; GFX11-NEXT:    s_add_u32 s13, s13, 3
; GFX11-NEXT:    s_addc_u32 s12, s12, 0
; GFX11-NEXT:    s_add_u32 s28, s28, 3
; GFX11-NEXT:    s_addc_u32 s29, s29, 0
; GFX11-NEXT:    s_add_u32 s26, s26, 3
; GFX11-NEXT:    s_addc_u32 s27, s27, 0
; GFX11-NEXT:    s_add_u32 s24, s24, 3
; GFX11-NEXT:    s_addc_u32 s25, s25, 0
; GFX11-NEXT:    s_add_u32 s22, s22, 3
; GFX11-NEXT:    s_addc_u32 s23, s23, 0
; GFX11-NEXT:    s_add_u32 s20, s20, 3
; GFX11-NEXT:    s_addc_u32 s21, s21, 0
; GFX11-NEXT:    s_add_u32 s18, s18, 3
; GFX11-NEXT:    s_addc_u32 s19, s19, 0
; GFX11-NEXT:    s_add_u32 s16, s16, 3
; GFX11-NEXT:    s_addc_u32 s17, s17, 0
; GFX11-NEXT:    s_add_u32 s2, s2, 3
; GFX11-NEXT:    s_addc_u32 s3, s3, 0
; GFX11-NEXT:    s_add_u32 s0, s0, 3
; GFX11-NEXT:    s_addc_u32 s1, s1, 0
; GFX11-NEXT:  .LBB45_2: ; %cmp.false
; GFX11-NEXT:    s_lshr_b32 s14, s4, 16
; GFX11-NEXT:    s_lshr_b32 s15, s5, 16
; GFX11-NEXT:    s_lshr_b32 s40, s6, 16
; GFX11-NEXT:    s_lshr_b32 s41, s7, 16
; GFX11-NEXT:    s_lshr_b32 s42, s8, 16
; GFX11-NEXT:    s_lshr_b32 s43, s9, 16
; GFX11-NEXT:    s_lshr_b32 s44, s10, 16
; GFX11-NEXT:    s_lshr_b32 s45, s11, 16
; GFX11-NEXT:    s_lshr_b32 s46, s12, 16
; GFX11-NEXT:    s_lshr_b32 s47, s13, 16
; GFX11-NEXT:    s_lshr_b32 s56, s29, 16
; GFX11-NEXT:    s_lshr_b32 s57, s28, 16
; GFX11-NEXT:    s_lshr_b32 s58, s27, 16
; GFX11-NEXT:    s_lshr_b32 s59, s26, 16
; GFX11-NEXT:    s_lshr_b32 s60, s25, 16
; GFX11-NEXT:    s_lshr_b32 s61, s24, 16
; GFX11-NEXT:    s_lshr_b32 s62, s23, 16
; GFX11-NEXT:    s_lshr_b32 s63, s22, 16
; GFX11-NEXT:    s_lshr_b32 s72, s21, 16
; GFX11-NEXT:    s_lshr_b32 s73, s20, 16
; GFX11-NEXT:    s_lshr_b32 s74, s19, 16
; GFX11-NEXT:    s_lshr_b32 s75, s18, 16
; GFX11-NEXT:    s_lshr_b32 s76, s17, 16
; GFX11-NEXT:    s_lshr_b32 s77, s16, 16
; GFX11-NEXT:    s_lshr_b32 s78, s3, 16
; GFX11-NEXT:    s_lshr_b32 s79, s2, 16
; GFX11-NEXT:    s_lshr_b32 s88, s1, 16
; GFX11-NEXT:    s_lshr_b32 s89, s0, 16
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s1, s88
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s0, s89
; GFX11-NEXT:    s_pack_ll_b32_b16 s2, s2, s79
; GFX11-NEXT:    s_pack_ll_b32_b16 s3, s3, s78
; GFX11-NEXT:    s_pack_ll_b32_b16 s16, s16, s77
; GFX11-NEXT:    s_pack_ll_b32_b16 s17, s17, s76
; GFX11-NEXT:    s_pack_ll_b32_b16 s18, s18, s75
; GFX11-NEXT:    s_pack_ll_b32_b16 s19, s19, s74
; GFX11-NEXT:    s_pack_ll_b32_b16 s20, s20, s73
; GFX11-NEXT:    s_pack_ll_b32_b16 s21, s21, s72
; GFX11-NEXT:    s_pack_ll_b32_b16 s22, s22, s63
; GFX11-NEXT:    s_pack_ll_b32_b16 s23, s23, s62
; GFX11-NEXT:    s_pack_ll_b32_b16 s24, s24, s61
; GFX11-NEXT:    s_pack_ll_b32_b16 s25, s25, s60
; GFX11-NEXT:    s_pack_ll_b32_b16 s26, s26, s59
; GFX11-NEXT:    s_pack_ll_b32_b16 s27, s27, s58
; GFX11-NEXT:    s_pack_ll_b32_b16 s28, s28, s57
; GFX11-NEXT:    s_pack_ll_b32_b16 s29, s29, s56
; GFX11-NEXT:    s_pack_ll_b32_b16 s13, s13, s47
; GFX11-NEXT:    s_pack_ll_b32_b16 s12, s12, s46
; GFX11-NEXT:    s_pack_ll_b32_b16 s11, s11, s45
; GFX11-NEXT:    s_pack_ll_b32_b16 s10, s10, s44
; GFX11-NEXT:    s_pack_ll_b32_b16 s9, s9, s43
; GFX11-NEXT:    s_pack_ll_b32_b16 s8, s8, s42
; GFX11-NEXT:    s_pack_ll_b32_b16 s7, s7, s41
; GFX11-NEXT:    s_pack_ll_b32_b16 s6, s6, s40
; GFX11-NEXT:    s_pack_ll_b32_b16 s5, s5, s15
; GFX11-NEXT:    s_pack_ll_b32_b16 s4, s4, s14
; GFX11-NEXT:    v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX11-NEXT:    v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; GFX11-NEXT:    v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
; GFX11-NEXT:    v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
; GFX11-NEXT:    v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
; GFX11-NEXT:    v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
; GFX11-NEXT:    v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
; GFX11-NEXT:    v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
; GFX11-NEXT:    v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
; GFX11-NEXT:    v_dual_mov_b32 v18, s13 :: v_dual_mov_b32 v19, s12
; GFX11-NEXT:    v_dual_mov_b32 v20, s11 :: v_dual_mov_b32 v21, s10
; GFX11-NEXT:    v_dual_mov_b32 v22, s9 :: v_dual_mov_b32 v23, s8
; GFX11-NEXT:    v_dual_mov_b32 v24, s7 :: v_dual_mov_b32 v25, s6
; GFX11-NEXT:    v_dual_mov_b32 v26, s5 :: v_dual_mov_b32 v27, s4
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = add <14 x i64> %a, splat (i64 3)
  %a2 = bitcast <14 x i64> %a1 to <56 x half>
  br label %end

cmp.false:
  %a3 = bitcast <14 x i64> %a to <56 x half>
  br label %end

end:
  %phi = phi <56 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <56 x half> %phi
}

define <14 x i64> @bitcast_v56f16_to_v14i64(<56 x half> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v56f16_to_v14i64:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(4)
; SI-NEXT:    v_mov_b32_e32 v59, v0
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v27
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v26
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v25
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v24
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v23, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v23
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v22
; SI-NEXT:    v_mov_b32_e32 v39, v20
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v21
; SI-NEXT:    v_mov_b32_e32 v48, v19
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v39
; SI-NEXT:    v_mov_b32_e32 v49, v18
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v48
; SI-NEXT:    v_mov_b32_e32 v50, v17
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v49
; SI-NEXT:    v_mov_b32_e32 v51, v16
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v50
; SI-NEXT:    v_mov_b32_e32 v52, v15
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v51
; SI-NEXT:    v_mov_b32_e32 v53, v14
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v52
; SI-NEXT:    v_mov_b32_e32 v54, v13
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v53
; SI-NEXT:    v_mov_b32_e32 v55, v12
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v54
; SI-NEXT:    v_mov_b32_e32 v40, v11
; SI-NEXT:    v_mov_b32_e32 v41, v10
; SI-NEXT:    v_mov_b32_e32 v42, v9
; SI-NEXT:    v_mov_b32_e32 v43, v8
; SI-NEXT:    v_mov_b32_e32 v44, v7
; SI-NEXT:    v_mov_b32_e32 v45, v6
; SI-NEXT:    v_mov_b32_e32 v46, v5
; SI-NEXT:    v_mov_b32_e32 v47, v4
; SI-NEXT:    v_mov_b32_e32 v56, v3
; SI-NEXT:    v_mov_b32_e32 v57, v2
; SI-NEXT:    v_mov_b32_e32 v58, v1
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v55
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v40
; SI-NEXT:    v_lshrrev_b32_e32 v60, 16, v41
; SI-NEXT:    v_lshrrev_b32_e32 v33, 16, v42
; SI-NEXT:    v_lshrrev_b32_e32 v61, 16, v43
; SI-NEXT:    v_lshrrev_b32_e32 v34, 16, v44
; SI-NEXT:    v_lshrrev_b32_e32 v35, 16, v45
; SI-NEXT:    v_lshrrev_b32_e32 v62, 16, v46
; SI-NEXT:    v_lshrrev_b32_e32 v36, 16, v47
; SI-NEXT:    v_lshrrev_b32_e32 v63, 16, v56
; SI-NEXT:    v_lshrrev_b32_e32 v37, 16, v57
; SI-NEXT:    v_lshrrev_b32_e32 v32, 16, v58
; SI-NEXT:    v_lshrrev_b32_e32 v38, 16, v59
; SI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT:    buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT:    ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB46_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    buffer_load_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v13, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v18, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v19, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v20, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v21, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v59
; SI-NEXT:    v_lshlrev_b32_e32 v1, 16, v38
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v58
; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v32
; SI-NEXT:    v_or_b32_e32 v0, v0, v1
; SI-NEXT:    v_or_b32_e32 v1, v2, v3
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v57
; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v37
; SI-NEXT:    v_or_b32_e32 v2, v2, v3
; SI-NEXT:    v_and_b32_e32 v3, 0xffff, v56
; SI-NEXT:    v_lshlrev_b32_e32 v4, 16, v63
; SI-NEXT:    v_or_b32_e32 v3, v3, v4
; SI-NEXT:    v_and_b32_e32 v4, 0xffff, v47
; SI-NEXT:    v_lshlrev_b32_e32 v5, 16, v36
; SI-NEXT:    v_or_b32_e32 v4, v4, v5
; SI-NEXT:    v_and_b32_e32 v5, 0xffff, v46
; SI-NEXT:    v_lshlrev_b32_e32 v6, 16, v62
; SI-NEXT:    v_or_b32_e32 v5, v5, v6
; SI-NEXT:    v_and_b32_e32 v6, 0xffff, v45
; SI-NEXT:    v_lshlrev_b32_e32 v7, 16, v35
; SI-NEXT:    v_or_b32_e32 v6, v6, v7
; SI-NEXT:    v_and_b32_e32 v7, 0xffff, v44
; SI-NEXT:    v_lshlrev_b32_e32 v8, 16, v34
; SI-NEXT:    v_or_b32_e32 v7, v7, v8
; SI-NEXT:    v_and_b32_e32 v8, 0xffff, v43
; SI-NEXT:    v_lshlrev_b32_e32 v9, 16, v61
; SI-NEXT:    v_or_b32_e32 v8, v8, v9
; SI-NEXT:    v_and_b32_e32 v9, 0xffff, v42
; SI-NEXT:    v_lshlrev_b32_e32 v10, 16, v33
; SI-NEXT:    v_or_b32_e32 v9, v9, v10
; SI-NEXT:    v_and_b32_e32 v10, 0xffff, v41
; SI-NEXT:    v_lshlrev_b32_e32 v11, 16, v60
; SI-NEXT:    v_or_b32_e32 v10, v10, v11
; SI-NEXT:    v_and_b32_e32 v11, 0xffff, v40
; SI-NEXT:    ; implicit-def: $vgpr59
; SI-NEXT:    ; implicit-def: $vgpr58
; SI-NEXT:    ; implicit-def: $vgpr57
; SI-NEXT:    ; implicit-def: $vgpr56
; SI-NEXT:    ; implicit-def: $vgpr47
; SI-NEXT:    ; implicit-def: $vgpr46
; SI-NEXT:    ; implicit-def: $vgpr45
; SI-NEXT:    ; implicit-def: $vgpr44
; SI-NEXT:    ; implicit-def: $vgpr43
; SI-NEXT:    ; implicit-def: $vgpr42
; SI-NEXT:    ; implicit-def: $vgpr41
; SI-NEXT:    ; implicit-def: $vgpr40
; SI-NEXT:    ; implicit-def: $vgpr38
; SI-NEXT:    ; implicit-def: $vgpr32
; SI-NEXT:    ; implicit-def: $vgpr37
; SI-NEXT:    ; implicit-def: $vgpr63
; SI-NEXT:    ; implicit-def: $vgpr36
; SI-NEXT:    ; implicit-def: $vgpr62
; SI-NEXT:    ; implicit-def: $vgpr35
; SI-NEXT:    ; implicit-def: $vgpr34
; SI-NEXT:    ; implicit-def: $vgpr61
; SI-NEXT:    ; implicit-def: $vgpr33
; SI-NEXT:    ; implicit-def: $vgpr60
; SI-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(14)
; SI-NEXT:    v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT:    v_or_b32_e32 v11, v11, v12
; SI-NEXT:    v_and_b32_e32 v12, 0xffff, v55
; SI-NEXT:    v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT:    v_or_b32_e32 v12, v12, v13
; SI-NEXT:    v_and_b32_e32 v13, 0xffff, v54
; SI-NEXT:    v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT:    v_or_b32_e32 v13, v13, v14
; SI-NEXT:    v_and_b32_e32 v14, 0xffff, v53
; SI-NEXT:    s_waitcnt vmcnt(13)
; SI-NEXT:    v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT:    v_or_b32_e32 v14, v14, v15
; SI-NEXT:    v_and_b32_e32 v15, 0xffff, v52
; SI-NEXT:    s_waitcnt vmcnt(12)
; SI-NEXT:    v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT:    v_or_b32_e32 v15, v15, v16
; SI-NEXT:    v_and_b32_e32 v16, 0xffff, v51
; SI-NEXT:    s_waitcnt vmcnt(11)
; SI-NEXT:    v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT:    v_or_b32_e32 v16, v16, v17
; SI-NEXT:    v_and_b32_e32 v17, 0xffff, v50
; SI-NEXT:    s_waitcnt vmcnt(10)
; SI-NEXT:    v_lshlrev_b32_e32 v18, 16, v18
; SI-NEXT:    v_or_b32_e32 v17, v17, v18
; SI-NEXT:    v_and_b32_e32 v18, 0xffff, v49
; SI-NEXT:    s_waitcnt vmcnt(9)
; SI-NEXT:    v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT:    v_or_b32_e32 v18, v18, v19
; SI-NEXT:    v_and_b32_e32 v19, 0xffff, v48
; SI-NEXT:    s_waitcnt vmcnt(8)
; SI-NEXT:    v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT:    v_or_b32_e32 v19, v19, v20
; SI-NEXT:    v_and_b32_e32 v20, 0xffff, v39
; SI-NEXT:    s_waitcnt vmcnt(7)
; SI-NEXT:    v_lshlrev_b32_e32 v21, 16, v21
; SI-NEXT:    v_or_b32_e32 v20, v20, v21
; SI-NEXT:    buffer_load_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT:    ; implicit-def: $vgpr55
; SI-NEXT:    ; implicit-def: $vgpr54
; SI-NEXT:    ; implicit-def: $vgpr53
; SI-NEXT:    ; implicit-def: $vgpr52
; SI-NEXT:    ; implicit-def: $vgpr51
; SI-NEXT:    ; implicit-def: $vgpr50
; SI-NEXT:    ; implicit-def: $vgpr49
; SI-NEXT:    ; implicit-def: $vgpr48
; SI-NEXT:    ; implicit-def: $vgpr39
; SI-NEXT:    s_waitcnt vmcnt(7)
; SI-NEXT:    v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT:    s_waitcnt vmcnt(6)
; SI-NEXT:    v_lshlrev_b32_e32 v23, 16, v23
; SI-NEXT:    s_waitcnt vmcnt(5)
; SI-NEXT:    v_lshlrev_b32_e32 v24, 16, v24
; SI-NEXT:    s_waitcnt vmcnt(4)
; SI-NEXT:    v_lshlrev_b32_e32 v25, 16, v25
; SI-NEXT:    s_waitcnt vmcnt(3)
; SI-NEXT:    v_lshlrev_b32_e32 v26, 16, v26
; SI-NEXT:    s_waitcnt vmcnt(2)
; SI-NEXT:    v_lshlrev_b32_e32 v27, 16, v27
; SI-NEXT:    s_waitcnt vmcnt(1)
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT:    v_or_b32_e32 v21, v21, v22
; SI-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT:    v_or_b32_e32 v22, v22, v23
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT:    v_or_b32_e32 v23, v23, v24
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT:    v_or_b32_e32 v24, v24, v25
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT:    v_or_b32_e32 v25, v25, v26
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT:    v_or_b32_e32 v26, v26, v27
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT:    v_or_b32_e32 v27, v27, v28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:  .LBB46_2: ; %Flow
; SI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB46_4
; SI-NEXT:  ; %bb.3: ; %cmp.true
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v0, v38
; SI-NEXT:    v_cvt_f32_f16_e32 v2, v32
; SI-NEXT:    v_cvt_f32_f16_e32 v1, v59
; SI-NEXT:    v_cvt_f32_f16_e32 v3, v58
; SI-NEXT:    v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT:    v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT:    v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT:    v_cvt_f16_f32_e32 v0, v0
; SI-NEXT:    v_cvt_f16_f32_e32 v2, v2
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v1, v1
; SI-NEXT:    v_cvt_f16_f32_e32 v3, v3
; SI-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
; SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT:    v_or_b32_e32 v0, v1, v0
; SI-NEXT:    v_or_b32_e32 v1, v3, v2
; SI-NEXT:    v_cvt_f32_f16_e32 v2, v37
; SI-NEXT:    v_cvt_f32_f16_e32 v3, v57
; SI-NEXT:    v_cvt_f32_f16_e32 v4, v56
; SI-NEXT:    v_cvt_f32_f16_e32 v5, v47
; SI-NEXT:    v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT:    v_cvt_f16_f32_e32 v2, v2
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v3, v3
; SI-NEXT:    v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT:    v_cvt_f16_f32_e32 v4, v4
; SI-NEXT:    v_or_b32_e32 v2, v3, v2
; SI-NEXT:    v_cvt_f32_f16_e32 v3, v63
; SI-NEXT:    v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT:    v_cvt_f16_f32_e32 v5, v5
; SI-NEXT:    v_cvt_f32_f16_e32 v6, v46
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v3, v3
; SI-NEXT:    v_cvt_f32_f16_e32 v7, v45
; SI-NEXT:    v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT:    v_cvt_f16_f32_e32 v6, v6
; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT:    v_or_b32_e32 v3, v4, v3
; SI-NEXT:    v_cvt_f32_f16_e32 v4, v36
; SI-NEXT:    v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT:    v_cvt_f16_f32_e32 v7, v7
; SI-NEXT:    v_cvt_f32_f16_e32 v8, v44
; SI-NEXT:    v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT:    v_cvt_f16_f32_e32 v4, v4
; SI-NEXT:    v_cvt_f32_f16_e32 v9, v43
; SI-NEXT:    v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT:    v_cvt_f16_f32_e32 v8, v8
; SI-NEXT:    v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT:    v_or_b32_e32 v4, v5, v4
; SI-NEXT:    v_cvt_f32_f16_e32 v5, v62
; SI-NEXT:    v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT:    v_cvt_f16_f32_e32 v9, v9
; SI-NEXT:    v_cvt_f32_f16_e32 v10, v42
; SI-NEXT:    v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT:    v_cvt_f16_f32_e32 v5, v5
; SI-NEXT:    v_cvt_f32_f16_e32 v11, v41
; SI-NEXT:    v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT:    v_cvt_f16_f32_e32 v10, v10
; SI-NEXT:    v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT:    v_or_b32_e32 v5, v6, v5
; SI-NEXT:    v_cvt_f32_f16_e32 v6, v35
; SI-NEXT:    v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT:    v_cvt_f16_f32_e32 v11, v11
; SI-NEXT:    v_cvt_f32_f16_e32 v12, v40
; SI-NEXT:    v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT:    v_cvt_f16_f32_e32 v6, v6
; SI-NEXT:    v_cvt_f32_f16_e32 v13, v55
; SI-NEXT:    v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT:    v_cvt_f16_f32_e32 v12, v12
; SI-NEXT:    v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT:    v_or_b32_e32 v6, v7, v6
; SI-NEXT:    v_cvt_f32_f16_e32 v7, v34
; SI-NEXT:    v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT:    v_cvt_f16_f32_e32 v13, v13
; SI-NEXT:    v_cvt_f32_f16_e32 v14, v54
; SI-NEXT:    v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT:    v_cvt_f16_f32_e32 v7, v7
; SI-NEXT:    v_cvt_f32_f16_e32 v15, v53
; SI-NEXT:    v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT:    v_cvt_f16_f32_e32 v14, v14
; SI-NEXT:    v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT:    v_or_b32_e32 v7, v8, v7
; SI-NEXT:    v_cvt_f32_f16_e32 v8, v61
; SI-NEXT:    v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT:    v_cvt_f16_f32_e32 v15, v15
; SI-NEXT:    v_cvt_f32_f16_e32 v17, v52
; SI-NEXT:    v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT:    v_cvt_f16_f32_e32 v8, v8
; SI-NEXT:    v_cvt_f32_f16_e32 v18, v51
; SI-NEXT:    v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT:    v_cvt_f16_f32_e32 v17, v17
; SI-NEXT:    v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT:    v_or_b32_e32 v8, v9, v8
; SI-NEXT:    v_cvt_f32_f16_e32 v9, v33
; SI-NEXT:    v_add_f32_e32 v18, 0x38000000, v18
; SI-NEXT:    v_cvt_f16_f32_e32 v18, v18
; SI-NEXT:    v_cvt_f32_f16_e32 v20, v49
; SI-NEXT:    v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT:    v_cvt_f16_f32_e32 v9, v9
; SI-NEXT:    v_cvt_f32_f16_e32 v21, v48
; SI-NEXT:    v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT:    v_cvt_f16_f32_e32 v20, v20
; SI-NEXT:    v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT:    v_or_b32_e32 v9, v10, v9
; SI-NEXT:    v_cvt_f32_f16_e32 v10, v60
; SI-NEXT:    v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT:    v_cvt_f16_f32_e32 v21, v21
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT:    v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT:    v_cvt_f16_f32_e32 v10, v10
; SI-NEXT:    buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v19, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT:    v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT:    v_or_b32_e32 v10, v11, v10
; SI-NEXT:    buffer_load_dword v11, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(10)
; SI-NEXT:    v_cvt_f32_f16_e32 v24, v24
; SI-NEXT:    s_waitcnt vmcnt(9)
; SI-NEXT:    v_cvt_f32_f16_e32 v27, v27
; SI-NEXT:    s_waitcnt vmcnt(8)
; SI-NEXT:    v_cvt_f32_f16_e32 v22, v22
; SI-NEXT:    s_waitcnt vmcnt(7)
; SI-NEXT:    v_cvt_f32_f16_e32 v25, v25
; SI-NEXT:    v_add_f32_e32 v24, 0x38000000, v24
; SI-NEXT:    v_cvt_f16_f32_e32 v24, v24
; SI-NEXT:    v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT:    s_waitcnt vmcnt(5)
; SI-NEXT:    v_cvt_f32_f16_e32 v16, v16
; SI-NEXT:    s_waitcnt vmcnt(4)
; SI-NEXT:    v_cvt_f32_f16_e32 v19, v19
; SI-NEXT:    v_cvt_f16_f32_e32 v22, v22
; SI-NEXT:    v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT:    v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT:    v_cvt_f16_f32_e32 v16, v16
; SI-NEXT:    v_add_f32_e32 v19, 0x38000000, v19
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v11, v11
; SI-NEXT:    v_cvt_f16_f32_e32 v19, v19
; SI-NEXT:    v_cvt_f16_f32_e32 v25, v25
; SI-NEXT:    v_add_f32_e32 v27, 0x38000000, v27
; SI-NEXT:    v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT:    v_cvt_f16_f32_e32 v11, v11
; SI-NEXT:    v_cvt_f16_f32_e32 v27, v27
; SI-NEXT:    v_cvt_f32_f16_e32 v28, v28
; SI-NEXT:    v_cvt_f32_f16_e32 v29, v29
; SI-NEXT:    v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT:    v_or_b32_e32 v11, v12, v11
; SI-NEXT:    buffer_load_dword v12, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT:    v_add_f32_e32 v28, 0x38000000, v28
; SI-NEXT:    v_cvt_f16_f32_e32 v28, v28
; SI-NEXT:    v_add_f32_e32 v29, 0x38000000, v29
; SI-NEXT:    v_cvt_f16_f32_e32 v29, v29
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v12, v12
; SI-NEXT:    v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT:    v_cvt_f16_f32_e32 v12, v12
; SI-NEXT:    v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT:    v_or_b32_e32 v12, v13, v12
; SI-NEXT:    buffer_load_dword v13, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v13, v13
; SI-NEXT:    v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT:    v_cvt_f16_f32_e32 v13, v13
; SI-NEXT:    v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT:    v_or_b32_e32 v13, v14, v13
; SI-NEXT:    buffer_load_dword v14, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v14, v14
; SI-NEXT:    v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT:    v_cvt_f16_f32_e32 v14, v14
; SI-NEXT:    v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT:    v_or_b32_e32 v14, v15, v14
; SI-NEXT:    v_lshlrev_b32_e32 v15, 16, v16
; SI-NEXT:    buffer_load_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT:    v_or_b32_e32 v15, v17, v15
; SI-NEXT:    buffer_load_dword v17, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(1)
; SI-NEXT:    v_cvt_f32_f16_e32 v16, v16
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v17, v17
; SI-NEXT:    v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT:    v_cvt_f16_f32_e32 v16, v16
; SI-NEXT:    v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT:    v_cvt_f16_f32_e32 v17, v17
; SI-NEXT:    v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT:    v_or_b32_e32 v16, v18, v16
; SI-NEXT:    v_cvt_f32_f16_e32 v18, v50
; SI-NEXT:    v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT:    v_add_f32_e32 v18, 0x38000000, v18
; SI-NEXT:    v_cvt_f16_f32_e32 v18, v18
; SI-NEXT:    v_or_b32_e32 v17, v18, v17
; SI-NEXT:    v_lshlrev_b32_e32 v18, 16, v19
; SI-NEXT:    buffer_load_dword v19, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT:    v_or_b32_e32 v18, v20, v18
; SI-NEXT:    buffer_load_dword v20, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(1)
; SI-NEXT:    v_cvt_f32_f16_e32 v19, v19
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v20, v20
; SI-NEXT:    v_add_f32_e32 v19, 0x38000000, v19
; SI-NEXT:    v_cvt_f16_f32_e32 v19, v19
; SI-NEXT:    v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT:    v_cvt_f16_f32_e32 v20, v20
; SI-NEXT:    v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT:    v_or_b32_e32 v19, v21, v19
; SI-NEXT:    v_cvt_f32_f16_e32 v21, v39
; SI-NEXT:    v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT:    v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT:    v_cvt_f16_f32_e32 v21, v21
; SI-NEXT:    v_or_b32_e32 v20, v21, v20
; SI-NEXT:    v_lshlrev_b32_e32 v21, 16, v22
; SI-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v22, v22
; SI-NEXT:    v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT:    v_cvt_f16_f32_e32 v22, v22
; SI-NEXT:    v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT:    v_or_b32_e32 v22, v24, v22
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT:    v_cvt_f32_f16_e32 v23, v23
; SI-NEXT:    v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT:    v_cvt_f16_f32_e32 v23, v23
; SI-NEXT:    v_or_b32_e32 v21, v23, v21
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(1)
; SI-NEXT:    v_cvt_f32_f16_e32 v24, v24
; SI-NEXT:    v_add_f32_e32 v24, 0x38000000, v24
; SI-NEXT:    v_cvt_f16_f32_e32 v24, v24
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v23, v23
; SI-NEXT:    v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT:    v_cvt_f16_f32_e32 v23, v23
; SI-NEXT:    v_lshlrev_b32_e32 v23, 16, v23
; SI-NEXT:    v_or_b32_e32 v23, v24, v23
; SI-NEXT:    v_lshlrev_b32_e32 v24, 16, v25
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v25, v25
; SI-NEXT:    v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT:    v_cvt_f16_f32_e32 v25, v25
; SI-NEXT:    v_lshlrev_b32_e32 v25, 16, v25
; SI-NEXT:    v_or_b32_e32 v25, v27, v25
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT:    v_cvt_f32_f16_e32 v26, v26
; SI-NEXT:    v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT:    v_cvt_f16_f32_e32 v26, v26
; SI-NEXT:    v_or_b32_e32 v24, v26, v24
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(1)
; SI-NEXT:    v_cvt_f32_f16_e32 v27, v27
; SI-NEXT:    v_add_f32_e32 v27, 0x38000000, v27
; SI-NEXT:    v_cvt_f16_f32_e32 v27, v27
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v26, v26
; SI-NEXT:    v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT:    v_cvt_f16_f32_e32 v26, v26
; SI-NEXT:    v_lshlrev_b32_e32 v26, 16, v26
; SI-NEXT:    v_or_b32_e32 v26, v27, v26
; SI-NEXT:    v_lshlrev_b32_e32 v27, 16, v28
; SI-NEXT:    v_or_b32_e32 v27, v29, v27
; SI-NEXT:  .LBB46_4: ; %end
; SI-NEXT:    s_or_b64 exec, exec, s[4:5]
; SI-NEXT:    buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v56f16_to_v14i64:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v56, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v58, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v59, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    v_mov_b32_e32 v32, v27
; VI-NEXT:    v_mov_b32_e32 v33, v26
; VI-NEXT:    v_mov_b32_e32 v34, v25
; VI-NEXT:    v_mov_b32_e32 v35, v24
; VI-NEXT:    v_mov_b32_e32 v36, v23
; VI-NEXT:    v_mov_b32_e32 v37, v22
; VI-NEXT:    v_mov_b32_e32 v38, v21
; VI-NEXT:    v_mov_b32_e32 v39, v20
; VI-NEXT:    v_mov_b32_e32 v48, v19
; VI-NEXT:    v_mov_b32_e32 v49, v18
; VI-NEXT:    v_mov_b32_e32 v50, v17
; VI-NEXT:    v_mov_b32_e32 v51, v16
; VI-NEXT:    v_mov_b32_e32 v52, v15
; VI-NEXT:    v_mov_b32_e32 v53, v14
; VI-NEXT:    v_mov_b32_e32 v54, v13
; VI-NEXT:    v_mov_b32_e32 v55, v12
; VI-NEXT:    v_mov_b32_e32 v40, v11
; VI-NEXT:    v_mov_b32_e32 v41, v10
; VI-NEXT:    v_mov_b32_e32 v42, v9
; VI-NEXT:    v_mov_b32_e32 v43, v8
; VI-NEXT:    v_mov_b32_e32 v44, v7
; VI-NEXT:    v_mov_b32_e32 v45, v6
; VI-NEXT:    v_mov_b32_e32 v46, v5
; VI-NEXT:    v_mov_b32_e32 v47, v4
; VI-NEXT:    v_mov_b32_e32 v56, v3
; VI-NEXT:    v_mov_b32_e32 v57, v2
; VI-NEXT:    v_mov_b32_e32 v58, v1
; VI-NEXT:    v_mov_b32_e32 v59, v0
; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT:    ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; VI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB46_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    v_mov_b32_e32 v27, 16
; VI-NEXT:    v_lshlrev_b32_sdwa v0, v27, v59 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v1, v27, v58 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v2, v27, v57 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v3, v27, v56 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v4, v27, v47 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v5, v27, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v6, v27, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v7, v27, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v8, v27, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v9, v27, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v10, v27, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v11, v27, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v12, v27, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v13, v27, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v14, v27, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v15, v27, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v16, v27, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v17, v27, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v18, v27, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v19, v27, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v20, v27, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v21, v27, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v22, v27, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v23, v27, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v24, v27, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v25, v27, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v26, v27, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v27, v27, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_or_b32_sdwa v0, v59, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v1, v58, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v2, v57, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v3, v56, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v4, v47, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v5, v46, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v6, v45, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v7, v44, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v8, v43, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v9, v42, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v10, v41, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v11, v40, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v12, v55, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v13, v54, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v14, v53, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v15, v52, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v16, v51, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v17, v50, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v18, v49, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v19, v48, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v20, v39, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v21, v38, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v22, v37, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v23, v36, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v24, v35, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v25, v34, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v26, v33, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v27, v32, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    ; implicit-def: $vgpr59
; VI-NEXT:    ; implicit-def: $vgpr58
; VI-NEXT:    ; implicit-def: $vgpr57
; VI-NEXT:    ; implicit-def: $vgpr56
; VI-NEXT:    ; implicit-def: $vgpr47
; VI-NEXT:    ; implicit-def: $vgpr46
; VI-NEXT:    ; implicit-def: $vgpr45
; VI-NEXT:    ; implicit-def: $vgpr44
; VI-NEXT:    ; implicit-def: $vgpr43
; VI-NEXT:    ; implicit-def: $vgpr42
; VI-NEXT:    ; implicit-def: $vgpr41
; VI-NEXT:    ; implicit-def: $vgpr40
; VI-NEXT:    ; implicit-def: $vgpr55
; VI-NEXT:    ; implicit-def: $vgpr54
; VI-NEXT:    ; implicit-def: $vgpr53
; VI-NEXT:    ; implicit-def: $vgpr52
; VI-NEXT:    ; implicit-def: $vgpr51
; VI-NEXT:    ; implicit-def: $vgpr50
; VI-NEXT:    ; implicit-def: $vgpr49
; VI-NEXT:    ; implicit-def: $vgpr48
; VI-NEXT:    ; implicit-def: $vgpr39
; VI-NEXT:    ; implicit-def: $vgpr38
; VI-NEXT:    ; implicit-def: $vgpr37
; VI-NEXT:    ; implicit-def: $vgpr36
; VI-NEXT:    ; implicit-def: $vgpr35
; VI-NEXT:    ; implicit-def: $vgpr34
; VI-NEXT:    ; implicit-def: $vgpr33
; VI-NEXT:    ; implicit-def: $vgpr32
; VI-NEXT:  .LBB46_2: ; %Flow
; VI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB46_4
; VI-NEXT:  ; %bb.3: ; %cmp.true
; VI-NEXT:    v_mov_b32_e32 v27, 0x200
; VI-NEXT:    v_add_f16_sdwa v0, v59, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v1, 0x200, v59
; VI-NEXT:    v_add_f16_sdwa v2, v58, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v3, 0x200, v58
; VI-NEXT:    v_or_b32_e32 v0, v1, v0
; VI-NEXT:    v_or_b32_e32 v1, v3, v2
; VI-NEXT:    v_add_f16_sdwa v2, v57, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v3, 0x200, v57
; VI-NEXT:    v_or_b32_e32 v2, v3, v2
; VI-NEXT:    v_add_f16_sdwa v3, v56, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v4, 0x200, v56
; VI-NEXT:    v_or_b32_e32 v3, v4, v3
; VI-NEXT:    v_add_f16_sdwa v4, v47, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v5, 0x200, v47
; VI-NEXT:    v_or_b32_e32 v4, v5, v4
; VI-NEXT:    v_add_f16_sdwa v5, v46, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v6, 0x200, v46
; VI-NEXT:    v_or_b32_e32 v5, v6, v5
; VI-NEXT:    v_add_f16_sdwa v6, v45, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v7, 0x200, v45
; VI-NEXT:    v_or_b32_e32 v6, v7, v6
; VI-NEXT:    v_add_f16_sdwa v7, v44, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v8, 0x200, v44
; VI-NEXT:    v_or_b32_e32 v7, v8, v7
; VI-NEXT:    v_add_f16_sdwa v8, v43, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v9, 0x200, v43
; VI-NEXT:    v_or_b32_e32 v8, v9, v8
; VI-NEXT:    v_add_f16_sdwa v9, v42, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v10, 0x200, v42
; VI-NEXT:    v_or_b32_e32 v9, v10, v9
; VI-NEXT:    v_add_f16_sdwa v10, v41, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v11, 0x200, v41
; VI-NEXT:    v_or_b32_e32 v10, v11, v10
; VI-NEXT:    v_add_f16_sdwa v11, v40, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v12, 0x200, v40
; VI-NEXT:    v_or_b32_e32 v11, v12, v11
; VI-NEXT:    v_add_f16_sdwa v12, v55, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v13, 0x200, v55
; VI-NEXT:    v_or_b32_e32 v12, v13, v12
; VI-NEXT:    v_add_f16_sdwa v13, v54, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v14, 0x200, v54
; VI-NEXT:    v_or_b32_e32 v13, v14, v13
; VI-NEXT:    v_add_f16_sdwa v14, v53, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v15, 0x200, v53
; VI-NEXT:    v_or_b32_e32 v14, v15, v14
; VI-NEXT:    v_add_f16_sdwa v15, v52, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v16, 0x200, v52
; VI-NEXT:    v_or_b32_e32 v15, v16, v15
; VI-NEXT:    v_add_f16_sdwa v16, v51, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v17, 0x200, v51
; VI-NEXT:    v_or_b32_e32 v16, v17, v16
; VI-NEXT:    v_add_f16_sdwa v17, v50, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v18, 0x200, v50
; VI-NEXT:    v_or_b32_e32 v17, v18, v17
; VI-NEXT:    v_add_f16_sdwa v18, v49, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v19, 0x200, v49
; VI-NEXT:    v_or_b32_e32 v18, v19, v18
; VI-NEXT:    v_add_f16_sdwa v19, v48, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v20, 0x200, v48
; VI-NEXT:    v_or_b32_e32 v19, v20, v19
; VI-NEXT:    v_add_f16_sdwa v20, v39, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v21, 0x200, v39
; VI-NEXT:    v_or_b32_e32 v20, v21, v20
; VI-NEXT:    v_add_f16_sdwa v21, v38, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v22, 0x200, v38
; VI-NEXT:    v_or_b32_e32 v21, v22, v21
; VI-NEXT:    v_add_f16_sdwa v22, v37, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v23, 0x200, v37
; VI-NEXT:    v_or_b32_e32 v22, v23, v22
; VI-NEXT:    v_add_f16_sdwa v23, v36, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v24, 0x200, v36
; VI-NEXT:    v_or_b32_e32 v23, v24, v23
; VI-NEXT:    v_add_f16_sdwa v24, v35, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v25, 0x200, v35
; VI-NEXT:    v_or_b32_e32 v24, v25, v24
; VI-NEXT:    v_add_f16_sdwa v25, v34, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v26, 0x200, v34
; VI-NEXT:    v_or_b32_e32 v25, v26, v25
; VI-NEXT:    v_add_f16_sdwa v26, v33, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v28, 0x200, v33
; VI-NEXT:    v_or_b32_e32 v26, v28, v26
; VI-NEXT:    v_add_f16_sdwa v27, v32, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v28, 0x200, v32
; VI-NEXT:    v_or_b32_e32 v27, v28, v27
; VI-NEXT:  .LBB46_4: ; %end
; VI-NEXT:    s_or_b64 exec, exec, s[4:5]
; VI-NEXT:    buffer_load_dword v59, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v58, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v57, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v56, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v56f16_to_v14i64:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    v_mov_b32_e32 v59, v0
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v27
; GFX9-NEXT:    v_mov_b32_e32 v34, v25
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v26
; GFX9-NEXT:    v_mov_b32_e32 v35, v24
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v34
; GFX9-NEXT:    v_mov_b32_e32 v36, v23
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT:    v_mov_b32_e32 v37, v22
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT:    v_mov_b32_e32 v38, v21
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT:    v_mov_b32_e32 v39, v20
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT:    v_mov_b32_e32 v48, v19
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT:    v_mov_b32_e32 v49, v18
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT:    v_mov_b32_e32 v50, v17
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT:    v_mov_b32_e32 v51, v16
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT:    v_mov_b32_e32 v52, v15
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT:    v_mov_b32_e32 v53, v14
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT:    v_mov_b32_e32 v54, v13
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT:    v_mov_b32_e32 v55, v12
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT:    v_mov_b32_e32 v40, v11
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT:    v_mov_b32_e32 v41, v10
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT:    v_mov_b32_e32 v42, v9
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT:    v_mov_b32_e32 v43, v8
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT:    v_mov_b32_e32 v44, v7
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT:    v_mov_b32_e32 v45, v6
; GFX9-NEXT:    v_mov_b32_e32 v46, v5
; GFX9-NEXT:    v_mov_b32_e32 v47, v4
; GFX9-NEXT:    v_mov_b32_e32 v56, v3
; GFX9-NEXT:    v_mov_b32_e32 v57, v2
; GFX9-NEXT:    v_mov_b32_e32 v58, v1
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v44
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v45
; GFX9-NEXT:    v_lshrrev_b32_e32 v62, 16, v46
; GFX9-NEXT:    v_lshrrev_b32_e32 v63, 16, v47
; GFX9-NEXT:    v_lshrrev_b32_e32 v60, 16, v56
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v57
; GFX9-NEXT:    v_lshrrev_b32_e32 v61, 16, v58
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v59
; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT:    buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT:    ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB46_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT:    s_mov_b32 s6, 0x5040100
; GFX9-NEXT:    v_lshrrev_b32_e32 v6, 16, v45
; GFX9-NEXT:    v_lshrrev_b32_e32 v7, 16, v44
; GFX9-NEXT:    v_lshrrev_b32_e32 v8, 16, v43
; GFX9-NEXT:    v_lshrrev_b32_e32 v9, 16, v42
; GFX9-NEXT:    v_lshrrev_b32_e32 v10, 16, v41
; GFX9-NEXT:    v_lshrrev_b32_e32 v11, 16, v40
; GFX9-NEXT:    v_lshrrev_b32_e32 v12, 16, v55
; GFX9-NEXT:    v_lshrrev_b32_e32 v13, 16, v54
; GFX9-NEXT:    v_lshrrev_b32_e32 v14, 16, v53
; GFX9-NEXT:    v_lshrrev_b32_e32 v15, 16, v52
; GFX9-NEXT:    v_lshrrev_b32_e32 v16, 16, v51
; GFX9-NEXT:    v_lshrrev_b32_e32 v17, 16, v50
; GFX9-NEXT:    v_lshrrev_b32_e32 v18, 16, v49
; GFX9-NEXT:    v_lshrrev_b32_e32 v19, 16, v48
; GFX9-NEXT:    v_lshrrev_b32_e32 v20, 16, v39
; GFX9-NEXT:    v_lshrrev_b32_e32 v21, 16, v38
; GFX9-NEXT:    v_lshrrev_b32_e32 v22, 16, v37
; GFX9-NEXT:    v_lshrrev_b32_e32 v23, 16, v36
; GFX9-NEXT:    v_lshrrev_b32_e32 v24, 16, v35
; GFX9-NEXT:    v_lshrrev_b32_e32 v25, 16, v34
; GFX9-NEXT:    v_perm_b32 v0, v33, v59, s6
; GFX9-NEXT:    v_perm_b32 v1, v61, v58, s6
; GFX9-NEXT:    v_perm_b32 v2, v32, v57, s6
; GFX9-NEXT:    v_perm_b32 v3, v60, v56, s6
; GFX9-NEXT:    v_perm_b32 v4, v63, v47, s6
; GFX9-NEXT:    v_perm_b32 v5, v62, v46, s6
; GFX9-NEXT:    v_perm_b32 v6, v6, v45, s6
; GFX9-NEXT:    v_perm_b32 v7, v7, v44, s6
; GFX9-NEXT:    v_perm_b32 v8, v8, v43, s6
; GFX9-NEXT:    v_perm_b32 v9, v9, v42, s6
; GFX9-NEXT:    v_perm_b32 v10, v10, v41, s6
; GFX9-NEXT:    v_perm_b32 v11, v11, v40, s6
; GFX9-NEXT:    v_perm_b32 v12, v12, v55, s6
; GFX9-NEXT:    v_perm_b32 v13, v13, v54, s6
; GFX9-NEXT:    v_perm_b32 v14, v14, v53, s6
; GFX9-NEXT:    v_perm_b32 v15, v15, v52, s6
; GFX9-NEXT:    v_perm_b32 v16, v16, v51, s6
; GFX9-NEXT:    v_perm_b32 v17, v17, v50, s6
; GFX9-NEXT:    v_perm_b32 v18, v18, v49, s6
; GFX9-NEXT:    v_perm_b32 v19, v19, v48, s6
; GFX9-NEXT:    v_perm_b32 v20, v20, v39, s6
; GFX9-NEXT:    v_perm_b32 v21, v21, v38, s6
; GFX9-NEXT:    v_perm_b32 v22, v22, v37, s6
; GFX9-NEXT:    v_perm_b32 v23, v23, v36, s6
; GFX9-NEXT:    v_perm_b32 v24, v24, v35, s6
; GFX9-NEXT:    v_perm_b32 v25, v25, v34, s6
; GFX9-NEXT:    ; implicit-def: $vgpr59
; GFX9-NEXT:    ; implicit-def: $vgpr58
; GFX9-NEXT:    ; implicit-def: $vgpr57
; GFX9-NEXT:    ; implicit-def: $vgpr56
; GFX9-NEXT:    ; implicit-def: $vgpr47
; GFX9-NEXT:    ; implicit-def: $vgpr46
; GFX9-NEXT:    ; implicit-def: $vgpr45
; GFX9-NEXT:    ; implicit-def: $vgpr44
; GFX9-NEXT:    ; implicit-def: $vgpr43
; GFX9-NEXT:    ; implicit-def: $vgpr42
; GFX9-NEXT:    ; implicit-def: $vgpr41
; GFX9-NEXT:    ; implicit-def: $vgpr40
; GFX9-NEXT:    ; implicit-def: $vgpr55
; GFX9-NEXT:    ; implicit-def: $vgpr54
; GFX9-NEXT:    ; implicit-def: $vgpr53
; GFX9-NEXT:    ; implicit-def: $vgpr52
; GFX9-NEXT:    ; implicit-def: $vgpr51
; GFX9-NEXT:    ; implicit-def: $vgpr50
; GFX9-NEXT:    ; implicit-def: $vgpr49
; GFX9-NEXT:    ; implicit-def: $vgpr48
; GFX9-NEXT:    ; implicit-def: $vgpr39
; GFX9-NEXT:    ; implicit-def: $vgpr38
; GFX9-NEXT:    ; implicit-def: $vgpr37
; GFX9-NEXT:    ; implicit-def: $vgpr36
; GFX9-NEXT:    ; implicit-def: $vgpr35
; GFX9-NEXT:    ; implicit-def: $vgpr34
; GFX9-NEXT:    ; implicit-def: $vgpr62
; GFX9-NEXT:    ; implicit-def: $vgpr63
; GFX9-NEXT:    ; implicit-def: $vgpr60
; GFX9-NEXT:    ; implicit-def: $vgpr32
; GFX9-NEXT:    ; implicit-def: $vgpr61
; GFX9-NEXT:    ; implicit-def: $vgpr33
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:  .LBB46_2: ; %Flow
; GFX9-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB46_4
; GFX9-NEXT:  ; %bb.3: ; %cmp.true
; GFX9-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT:    s_mov_b32 s6, 0x5040100
; GFX9-NEXT:    buffer_load_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v7, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v8, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v14, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v19, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT:    v_perm_b32 v0, v33, v59, s6
; GFX9-NEXT:    s_movk_i32 s7, 0x200
; GFX9-NEXT:    v_perm_b32 v1, v61, v58, s6
; GFX9-NEXT:    v_perm_b32 v2, v32, v57, s6
; GFX9-NEXT:    v_perm_b32 v3, v60, v56, s6
; GFX9-NEXT:    v_perm_b32 v4, v63, v47, s6
; GFX9-NEXT:    v_perm_b32 v5, v62, v46, s6
; GFX9-NEXT:    v_pk_add_f16 v0, v0, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v1, v1, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v2, v2, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v3, v3, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v4, v4, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v5, v5, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    s_waitcnt vmcnt(20)
; GFX9-NEXT:    v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT:    s_waitcnt vmcnt(21)
; GFX9-NEXT:    v_perm_b32 v6, v6, v45, s6
; GFX9-NEXT:    s_waitcnt vmcnt(20)
; GFX9-NEXT:    v_perm_b32 v7, v7, v44, s6
; GFX9-NEXT:    s_waitcnt vmcnt(19)
; GFX9-NEXT:    v_perm_b32 v8, v8, v43, s6
; GFX9-NEXT:    s_waitcnt vmcnt(18)
; GFX9-NEXT:    v_perm_b32 v9, v9, v42, s6
; GFX9-NEXT:    s_waitcnt vmcnt(17)
; GFX9-NEXT:    v_perm_b32 v10, v10, v41, s6
; GFX9-NEXT:    s_waitcnt vmcnt(16)
; GFX9-NEXT:    v_perm_b32 v11, v11, v40, s6
; GFX9-NEXT:    s_waitcnt vmcnt(15)
; GFX9-NEXT:    v_perm_b32 v12, v12, v55, s6
; GFX9-NEXT:    s_waitcnt vmcnt(14)
; GFX9-NEXT:    v_perm_b32 v13, v13, v54, s6
; GFX9-NEXT:    s_waitcnt vmcnt(13)
; GFX9-NEXT:    v_perm_b32 v14, v14, v53, s6
; GFX9-NEXT:    s_waitcnt vmcnt(12)
; GFX9-NEXT:    v_perm_b32 v15, v15, v52, s6
; GFX9-NEXT:    s_waitcnt vmcnt(11)
; GFX9-NEXT:    v_perm_b32 v16, v16, v51, s6
; GFX9-NEXT:    s_waitcnt vmcnt(10)
; GFX9-NEXT:    v_perm_b32 v17, v17, v50, s6
; GFX9-NEXT:    s_waitcnt vmcnt(9)
; GFX9-NEXT:    v_perm_b32 v18, v18, v49, s6
; GFX9-NEXT:    s_waitcnt vmcnt(8)
; GFX9-NEXT:    v_perm_b32 v19, v19, v48, s6
; GFX9-NEXT:    s_waitcnt vmcnt(7)
; GFX9-NEXT:    v_perm_b32 v20, v20, v39, s6
; GFX9-NEXT:    s_waitcnt vmcnt(6)
; GFX9-NEXT:    v_perm_b32 v21, v21, v38, s6
; GFX9-NEXT:    s_waitcnt vmcnt(5)
; GFX9-NEXT:    v_perm_b32 v22, v22, v37, s6
; GFX9-NEXT:    s_waitcnt vmcnt(4)
; GFX9-NEXT:    v_perm_b32 v23, v23, v36, s6
; GFX9-NEXT:    s_waitcnt vmcnt(3)
; GFX9-NEXT:    v_perm_b32 v24, v24, v35, s6
; GFX9-NEXT:    s_waitcnt vmcnt(2)
; GFX9-NEXT:    v_perm_b32 v25, v25, v34, s6
; GFX9-NEXT:    v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v9, v9, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v10, v10, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v11, v11, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v12, v12, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v13, v13, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v14, v14, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v15, v15, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v16, v16, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v17, v17, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v18, v18, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v19, v19, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v20, v20, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v21, v21, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v22, v22, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v23, v23, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v24, v24, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v25, v25, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v26, v26, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT:    v_pk_add_f16 v27, v27, s7 op_sel_hi:[1,0]
; GFX9-NEXT:  .LBB46_4: ; %end
; GFX9-NEXT:    s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT:    buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-TRUE16-LABEL: bitcast_v56f16_to_v14i64:
; GFX11-TRUE16:       ; %bb.0:
; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-TRUE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT:    s_cbranch_execz .LBB46_2
; GFX11-TRUE16-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v0, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v1, v1, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v2, v2, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v3, v3, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v4, v4, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v5, v5, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v6, v6, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v7, v7, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v8, v8, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v9, v9, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v10, v10, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v11, v11, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v12, v12, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v13, v13, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v14, v14, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v15, v15, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v16, v16, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v17, v17, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v18, v18, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v19, v19, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v20, v20, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v21, v21, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v22, v22, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v23, v23, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v24, v24, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v25, v25, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v26, v26, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v27, v27, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:  .LBB46_2: ; %end
; GFX11-TRUE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v56f16_to_v14i64:
; GFX11-FAKE16:       ; %bb.0:
; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v0
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v2
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v80, 16, v3
; GFX11-FAKE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v28
; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v69, v0, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v1, v70, v1, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v2, v71, v2, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v3, v80, v3, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v4, v68, v4, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v5, v67, v5, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v6, v66, v6, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v7, v65, v7, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v8, v64, v8, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v9, v55, v9, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v10, v54, v10, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v11, v53, v11, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v12, v52, v12, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v13, v51, v13, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v14, v50, v14, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v15, v49, v15, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v16, v48, v16, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v17, v39, v17, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v18, v38, v18, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v19, v37, v19, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v20, v36, v20, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v21, v35, v21, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v22, v34, v22, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v23, v33, v23, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v24, v32, v24, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v25, v31, v25, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v26, v30, v26, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v27, v29, v27, 0x5040100
; GFX11-FAKE16-NEXT:    s_and_saveexec_b32 s0, vcc_lo
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-FAKE16-NEXT:    s_cbranch_execz .LBB46_2
; GFX11-FAKE16-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v0, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v1, v1, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v2, v2, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v3, v3, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v4, v4, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v5, v5, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v6, v6, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v7, v7, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v8, v8, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v9, v9, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v10, v10, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v11, v11, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v12, v12, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v13, v13, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v14, v14, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v15, v15, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v16, v16, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v17, v17, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v18, v18, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v19, v19, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v20, v20, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v21, v21, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v22, v22, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v23, v23, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v24, v24, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v25, v25, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v26, v26, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v27, v27, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:  .LBB46_2: ; %end
; GFX11-FAKE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = fadd <56 x half> %a, splat (half 0xH0200)
  %a2 = bitcast <56 x half> %a1 to <14 x i64>
  br label %end

cmp.false:
  %a3 = bitcast <56 x half> %a to <14 x i64>
  br label %end

end:
  %phi = phi <14 x i64> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <14 x i64> %phi
}

define inreg <14 x i64> @bitcast_v56f16_to_v14i64_scalar(<56 x half> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v56f16_to_v14i64_scalar:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_writelane_b32 v32, s36, 0
; SI-NEXT:    v_writelane_b32 v32, s37, 1
; SI-NEXT:    v_writelane_b32 v32, s38, 2
; SI-NEXT:    v_writelane_b32 v32, s39, 3
; SI-NEXT:    v_writelane_b32 v32, s48, 4
; SI-NEXT:    v_writelane_b32 v32, s49, 5
; SI-NEXT:    v_writelane_b32 v32, s50, 6
; SI-NEXT:    v_writelane_b32 v32, s51, 7
; SI-NEXT:    v_writelane_b32 v32, s52, 8
; SI-NEXT:    v_writelane_b32 v32, s53, 9
; SI-NEXT:    v_writelane_b32 v32, s54, 10
; SI-NEXT:    v_writelane_b32 v32, s55, 11
; SI-NEXT:    v_readfirstlane_b32 s4, v13
; SI-NEXT:    v_readfirstlane_b32 s6, v12
; SI-NEXT:    v_readfirstlane_b32 s8, v11
; SI-NEXT:    v_readfirstlane_b32 s10, v10
; SI-NEXT:    v_readfirstlane_b32 s12, v9
; SI-NEXT:    v_readfirstlane_b32 s14, v8
; SI-NEXT:    v_readfirstlane_b32 s57, v7
; SI-NEXT:    v_readfirstlane_b32 s56, v6
; SI-NEXT:    v_readfirstlane_b32 s60, v5
; SI-NEXT:    v_readfirstlane_b32 s62, v4
; SI-NEXT:    v_readfirstlane_b32 s72, v3
; SI-NEXT:    v_readfirstlane_b32 s74, v2
; SI-NEXT:    v_readfirstlane_b32 s77, v1
; SI-NEXT:    v_readfirstlane_b32 s88, v0
; SI-NEXT:    s_lshr_b32 s75, s29, 16
; SI-NEXT:    s_lshr_b32 s78, s28, 16
; SI-NEXT:    s_lshr_b32 s47, s27, 16
; SI-NEXT:    s_lshr_b32 s46, s26, 16
; SI-NEXT:    s_lshr_b32 s45, s25, 16
; SI-NEXT:    s_lshr_b32 s44, s24, 16
; SI-NEXT:    s_lshr_b32 s43, s23, 16
; SI-NEXT:    s_lshr_b32 s42, s22, 16
; SI-NEXT:    s_lshr_b32 s41, s21, 16
; SI-NEXT:    s_lshr_b32 s40, s20, 16
; SI-NEXT:    s_lshr_b32 s90, s19, 16
; SI-NEXT:    s_lshr_b32 s91, s18, 16
; SI-NEXT:    s_lshr_b32 s92, s17, 16
; SI-NEXT:    s_lshr_b32 s93, s16, 16
; SI-NEXT:    s_lshr_b32 s5, s4, 16
; SI-NEXT:    s_lshr_b32 s7, s6, 16
; SI-NEXT:    s_lshr_b32 s9, s8, 16
; SI-NEXT:    s_lshr_b32 s11, s10, 16
; SI-NEXT:    s_lshr_b32 s13, s12, 16
; SI-NEXT:    s_lshr_b32 s15, s14, 16
; SI-NEXT:    s_lshr_b32 s58, s57, 16
; SI-NEXT:    s_lshr_b32 s59, s56, 16
; SI-NEXT:    s_lshr_b32 s61, s60, 16
; SI-NEXT:    s_lshr_b32 s63, s62, 16
; SI-NEXT:    s_lshr_b32 s73, s72, 16
; SI-NEXT:    s_lshr_b32 s76, s74, 16
; SI-NEXT:    s_lshr_b32 s79, s77, 16
; SI-NEXT:    s_lshr_b32 s89, s88, 16
; SI-NEXT:    v_readfirstlane_b32 s94, v14
; SI-NEXT:    s_cmp_lg_u32 s94, 0
; SI-NEXT:    s_cbranch_scc0 .LBB47_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    s_and_b32 s16, s16, 0xffff
; SI-NEXT:    s_lshl_b32 s93, s93, 16
; SI-NEXT:    s_and_b32 s17, s17, 0xffff
; SI-NEXT:    s_lshl_b32 s92, s92, 16
; SI-NEXT:    s_or_b32 s36, s16, s93
; SI-NEXT:    s_or_b32 s37, s17, s92
; SI-NEXT:    s_and_b32 s16, s18, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s91, 16
; SI-NEXT:    s_or_b32 s38, s16, s17
; SI-NEXT:    s_and_b32 s16, s19, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s90, 16
; SI-NEXT:    s_or_b32 s39, s16, s17
; SI-NEXT:    s_and_b32 s16, s20, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s40, 16
; SI-NEXT:    s_or_b32 s40, s16, s17
; SI-NEXT:    s_and_b32 s16, s21, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s41, 16
; SI-NEXT:    s_or_b32 s41, s16, s17
; SI-NEXT:    s_and_b32 s16, s22, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s42, 16
; SI-NEXT:    s_or_b32 s42, s16, s17
; SI-NEXT:    s_and_b32 s16, s23, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s43, 16
; SI-NEXT:    s_or_b32 s43, s16, s17
; SI-NEXT:    s_and_b32 s16, s24, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s44, 16
; SI-NEXT:    s_or_b32 s44, s16, s17
; SI-NEXT:    s_and_b32 s16, s25, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s45, 16
; SI-NEXT:    s_or_b32 s45, s16, s17
; SI-NEXT:    s_and_b32 s16, s26, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s46, 16
; SI-NEXT:    s_or_b32 s46, s16, s17
; SI-NEXT:    s_and_b32 s16, s27, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s47, 16
; SI-NEXT:    s_or_b32 s47, s16, s17
; SI-NEXT:    s_and_b32 s16, s28, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s78, 16
; SI-NEXT:    s_or_b32 s48, s16, s17
; SI-NEXT:    s_and_b32 s16, s29, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s75, 16
; SI-NEXT:    s_or_b32 s49, s16, s17
; SI-NEXT:    s_and_b32 s16, s88, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s89, 16
; SI-NEXT:    s_or_b32 s50, s16, s17
; SI-NEXT:    s_and_b32 s16, s77, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s79, 16
; SI-NEXT:    s_or_b32 s51, s16, s17
; SI-NEXT:    s_and_b32 s16, s74, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s76, 16
; SI-NEXT:    s_or_b32 s52, s16, s17
; SI-NEXT:    s_and_b32 s16, s72, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s73, 16
; SI-NEXT:    s_or_b32 s53, s16, s17
; SI-NEXT:    s_and_b32 s16, s62, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s63, 16
; SI-NEXT:    s_or_b32 s54, s16, s17
; SI-NEXT:    s_and_b32 s16, s60, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s61, 16
; SI-NEXT:    s_or_b32 s55, s16, s17
; SI-NEXT:    s_and_b32 s16, s56, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s59, 16
; SI-NEXT:    s_or_b32 s56, s16, s17
; SI-NEXT:    s_and_b32 s16, s57, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s58, 16
; SI-NEXT:    s_and_b32 s14, s14, 0xffff
; SI-NEXT:    s_lshl_b32 s15, s15, 16
; SI-NEXT:    s_and_b32 s12, s12, 0xffff
; SI-NEXT:    s_lshl_b32 s13, s13, 16
; SI-NEXT:    s_and_b32 s10, s10, 0xffff
; SI-NEXT:    s_lshl_b32 s11, s11, 16
; SI-NEXT:    s_and_b32 s8, s8, 0xffff
; SI-NEXT:    s_lshl_b32 s9, s9, 16
; SI-NEXT:    s_and_b32 s6, s6, 0xffff
; SI-NEXT:    s_lshl_b32 s7, s7, 16
; SI-NEXT:    s_and_b32 s4, s4, 0xffff
; SI-NEXT:    s_lshl_b32 s5, s5, 16
; SI-NEXT:    s_or_b32 s57, s16, s17
; SI-NEXT:    s_or_b32 s58, s14, s15
; SI-NEXT:    s_or_b32 s59, s12, s13
; SI-NEXT:    s_or_b32 s60, s10, s11
; SI-NEXT:    s_or_b32 s61, s8, s9
; SI-NEXT:    s_or_b32 s62, s6, s7
; SI-NEXT:    s_or_b32 s63, s4, s5
; SI-NEXT:    v_mov_b32_e32 v0, s36
; SI-NEXT:    v_mov_b32_e32 v1, s37
; SI-NEXT:    v_mov_b32_e32 v2, s38
; SI-NEXT:    v_mov_b32_e32 v3, s39
; SI-NEXT:    v_mov_b32_e32 v4, s40
; SI-NEXT:    v_mov_b32_e32 v5, s41
; SI-NEXT:    v_mov_b32_e32 v6, s42
; SI-NEXT:    v_mov_b32_e32 v7, s43
; SI-NEXT:    v_mov_b32_e32 v8, s44
; SI-NEXT:    v_mov_b32_e32 v9, s45
; SI-NEXT:    v_mov_b32_e32 v10, s46
; SI-NEXT:    v_mov_b32_e32 v11, s47
; SI-NEXT:    v_mov_b32_e32 v12, s48
; SI-NEXT:    v_mov_b32_e32 v13, s49
; SI-NEXT:    v_mov_b32_e32 v14, s50
; SI-NEXT:    v_mov_b32_e32 v15, s51
; SI-NEXT:    v_mov_b32_e32 v16, s52
; SI-NEXT:    v_mov_b32_e32 v17, s53
; SI-NEXT:    v_mov_b32_e32 v18, s54
; SI-NEXT:    v_mov_b32_e32 v19, s55
; SI-NEXT:    v_mov_b32_e32 v20, s56
; SI-NEXT:    v_mov_b32_e32 v21, s57
; SI-NEXT:    v_mov_b32_e32 v22, s58
; SI-NEXT:    v_mov_b32_e32 v23, s59
; SI-NEXT:    v_mov_b32_e32 v24, s60
; SI-NEXT:    v_mov_b32_e32 v25, s61
; SI-NEXT:    v_mov_b32_e32 v26, s62
; SI-NEXT:    v_mov_b32_e32 v27, s63
; SI-NEXT:    v_mov_b32_e32 v28, s64
; SI-NEXT:    v_mov_b32_e32 v29, s65
; SI-NEXT:    v_mov_b32_e32 v30, s66
; SI-NEXT:    v_mov_b32_e32 v31, s67
; SI-NEXT:    s_branch .LBB47_3
; SI-NEXT:  .LBB47_2: ; %cmp.true
; SI-NEXT:    v_cvt_f32_f16_e32 v0, s93
; SI-NEXT:    v_cvt_f32_f16_e32 v2, s92
; SI-NEXT:    v_cvt_f32_f16_e32 v1, s16
; SI-NEXT:    v_cvt_f32_f16_e32 v3, s17
; SI-NEXT:    v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT:    v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT:    v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT:    v_cvt_f16_f32_e32 v0, v0
; SI-NEXT:    v_cvt_f16_f32_e32 v2, v2
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v1, v1
; SI-NEXT:    v_cvt_f16_f32_e32 v3, v3
; SI-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
; SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT:    v_or_b32_e32 v0, v1, v0
; SI-NEXT:    v_or_b32_e32 v1, v3, v2
; SI-NEXT:    v_cvt_f32_f16_e32 v2, s91
; SI-NEXT:    v_cvt_f32_f16_e32 v3, s18
; SI-NEXT:    v_cvt_f32_f16_e32 v4, s19
; SI-NEXT:    v_cvt_f32_f16_e32 v5, s20
; SI-NEXT:    v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT:    v_cvt_f16_f32_e32 v2, v2
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v3, v3
; SI-NEXT:    v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT:    v_cvt_f16_f32_e32 v4, v4
; SI-NEXT:    v_or_b32_e32 v2, v3, v2
; SI-NEXT:    v_cvt_f32_f16_e32 v3, s90
; SI-NEXT:    v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT:    v_cvt_f16_f32_e32 v5, v5
; SI-NEXT:    v_cvt_f32_f16_e32 v6, s21
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v3, v3
; SI-NEXT:    v_cvt_f32_f16_e32 v7, s22
; SI-NEXT:    v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT:    v_cvt_f16_f32_e32 v6, v6
; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT:    v_or_b32_e32 v3, v4, v3
; SI-NEXT:    v_cvt_f32_f16_e32 v4, s40
; SI-NEXT:    v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT:    v_cvt_f16_f32_e32 v7, v7
; SI-NEXT:    v_cvt_f32_f16_e32 v8, s23
; SI-NEXT:    v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT:    v_cvt_f16_f32_e32 v4, v4
; SI-NEXT:    v_cvt_f32_f16_e32 v9, s24
; SI-NEXT:    v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT:    v_cvt_f16_f32_e32 v8, v8
; SI-NEXT:    v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT:    v_or_b32_e32 v4, v5, v4
; SI-NEXT:    v_cvt_f32_f16_e32 v5, s41
; SI-NEXT:    v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT:    v_cvt_f16_f32_e32 v9, v9
; SI-NEXT:    v_cvt_f32_f16_e32 v10, s25
; SI-NEXT:    v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT:    v_cvt_f16_f32_e32 v5, v5
; SI-NEXT:    v_cvt_f32_f16_e32 v11, s26
; SI-NEXT:    v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT:    v_cvt_f16_f32_e32 v10, v10
; SI-NEXT:    v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT:    v_or_b32_e32 v5, v6, v5
; SI-NEXT:    v_cvt_f32_f16_e32 v6, s42
; SI-NEXT:    v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT:    v_cvt_f16_f32_e32 v11, v11
; SI-NEXT:    v_cvt_f32_f16_e32 v12, s27
; SI-NEXT:    v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT:    v_cvt_f16_f32_e32 v6, v6
; SI-NEXT:    v_cvt_f32_f16_e32 v13, s28
; SI-NEXT:    v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT:    v_cvt_f16_f32_e32 v12, v12
; SI-NEXT:    v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT:    v_or_b32_e32 v6, v7, v6
; SI-NEXT:    v_cvt_f32_f16_e32 v7, s43
; SI-NEXT:    v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT:    v_cvt_f16_f32_e32 v13, v13
; SI-NEXT:    v_cvt_f32_f16_e32 v14, s29
; SI-NEXT:    v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT:    v_cvt_f16_f32_e32 v7, v7
; SI-NEXT:    v_cvt_f32_f16_e32 v15, s88
; SI-NEXT:    v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT:    v_cvt_f16_f32_e32 v14, v14
; SI-NEXT:    v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT:    v_or_b32_e32 v7, v8, v7
; SI-NEXT:    v_cvt_f32_f16_e32 v8, s44
; SI-NEXT:    v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT:    v_cvt_f16_f32_e32 v15, v15
; SI-NEXT:    v_cvt_f32_f16_e32 v16, s77
; SI-NEXT:    v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT:    v_cvt_f16_f32_e32 v8, v8
; SI-NEXT:    v_cvt_f32_f16_e32 v17, s74
; SI-NEXT:    v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT:    v_cvt_f16_f32_e32 v16, v16
; SI-NEXT:    v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT:    v_or_b32_e32 v8, v9, v8
; SI-NEXT:    v_cvt_f32_f16_e32 v9, s45
; SI-NEXT:    v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT:    v_cvt_f16_f32_e32 v17, v17
; SI-NEXT:    v_cvt_f32_f16_e32 v18, s72
; SI-NEXT:    v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT:    v_cvt_f16_f32_e32 v9, v9
; SI-NEXT:    v_cvt_f32_f16_e32 v19, s62
; SI-NEXT:    v_add_f32_e32 v18, 0x38000000, v18
; SI-NEXT:    v_cvt_f16_f32_e32 v18, v18
; SI-NEXT:    v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT:    v_or_b32_e32 v9, v10, v9
; SI-NEXT:    v_cvt_f32_f16_e32 v10, s46
; SI-NEXT:    v_add_f32_e32 v19, 0x38000000, v19
; SI-NEXT:    v_cvt_f16_f32_e32 v19, v19
; SI-NEXT:    v_cvt_f32_f16_e32 v20, s60
; SI-NEXT:    v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT:    v_cvt_f16_f32_e32 v10, v10
; SI-NEXT:    v_cvt_f32_f16_e32 v21, s56
; SI-NEXT:    v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT:    v_cvt_f16_f32_e32 v20, v20
; SI-NEXT:    v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT:    v_or_b32_e32 v10, v11, v10
; SI-NEXT:    v_cvt_f32_f16_e32 v11, s47
; SI-NEXT:    v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT:    v_cvt_f16_f32_e32 v21, v21
; SI-NEXT:    v_cvt_f32_f16_e32 v22, s57
; SI-NEXT:    v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT:    v_cvt_f16_f32_e32 v11, v11
; SI-NEXT:    v_cvt_f32_f16_e32 v23, s14
; SI-NEXT:    v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT:    v_cvt_f16_f32_e32 v22, v22
; SI-NEXT:    v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT:    v_or_b32_e32 v11, v12, v11
; SI-NEXT:    v_cvt_f32_f16_e32 v12, s78
; SI-NEXT:    v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT:    v_cvt_f16_f32_e32 v23, v23
; SI-NEXT:    v_cvt_f32_f16_e32 v24, s12
; SI-NEXT:    v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT:    v_cvt_f16_f32_e32 v12, v12
; SI-NEXT:    v_cvt_f32_f16_e32 v25, s10
; SI-NEXT:    v_add_f32_e32 v24, 0x38000000, v24
; SI-NEXT:    v_cvt_f16_f32_e32 v24, v24
; SI-NEXT:    v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT:    v_or_b32_e32 v12, v13, v12
; SI-NEXT:    v_cvt_f32_f16_e32 v13, s75
; SI-NEXT:    v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT:    v_cvt_f16_f32_e32 v25, v25
; SI-NEXT:    v_cvt_f32_f16_e32 v26, s8
; SI-NEXT:    v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT:    v_cvt_f16_f32_e32 v13, v13
; SI-NEXT:    v_cvt_f32_f16_e32 v27, s6
; SI-NEXT:    v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT:    v_cvt_f16_f32_e32 v26, v26
; SI-NEXT:    v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT:    v_or_b32_e32 v13, v14, v13
; SI-NEXT:    v_cvt_f32_f16_e32 v14, s89
; SI-NEXT:    v_add_f32_e32 v27, 0x38000000, v27
; SI-NEXT:    v_cvt_f16_f32_e32 v27, v27
; SI-NEXT:    v_cvt_f32_f16_e32 v28, s4
; SI-NEXT:    v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT:    v_cvt_f16_f32_e32 v14, v14
; SI-NEXT:    v_add_f32_e32 v28, 0x38000000, v28
; SI-NEXT:    v_cvt_f16_f32_e32 v28, v28
; SI-NEXT:    v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT:    v_or_b32_e32 v14, v15, v14
; SI-NEXT:    v_cvt_f32_f16_e32 v15, s79
; SI-NEXT:    v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT:    v_cvt_f16_f32_e32 v15, v15
; SI-NEXT:    v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT:    v_or_b32_e32 v15, v16, v15
; SI-NEXT:    v_cvt_f32_f16_e32 v16, s76
; SI-NEXT:    v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT:    v_cvt_f16_f32_e32 v16, v16
; SI-NEXT:    v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT:    v_or_b32_e32 v16, v17, v16
; SI-NEXT:    v_cvt_f32_f16_e32 v17, s73
; SI-NEXT:    v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT:    v_cvt_f16_f32_e32 v17, v17
; SI-NEXT:    v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT:    v_or_b32_e32 v17, v18, v17
; SI-NEXT:    v_cvt_f32_f16_e32 v18, s63
; SI-NEXT:    v_add_f32_e32 v18, 0x38000000, v18
; SI-NEXT:    v_cvt_f16_f32_e32 v18, v18
; SI-NEXT:    v_lshlrev_b32_e32 v18, 16, v18
; SI-NEXT:    v_or_b32_e32 v18, v19, v18
; SI-NEXT:    v_cvt_f32_f16_e32 v19, s61
; SI-NEXT:    v_add_f32_e32 v19, 0x38000000, v19
; SI-NEXT:    v_cvt_f16_f32_e32 v19, v19
; SI-NEXT:    v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT:    v_or_b32_e32 v19, v20, v19
; SI-NEXT:    v_cvt_f32_f16_e32 v20, s59
; SI-NEXT:    v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT:    v_cvt_f16_f32_e32 v20, v20
; SI-NEXT:    v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT:    v_or_b32_e32 v20, v21, v20
; SI-NEXT:    v_cvt_f32_f16_e32 v21, s58
; SI-NEXT:    v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT:    v_cvt_f16_f32_e32 v21, v21
; SI-NEXT:    v_lshlrev_b32_e32 v21, 16, v21
; SI-NEXT:    v_or_b32_e32 v21, v22, v21
; SI-NEXT:    v_cvt_f32_f16_e32 v22, s15
; SI-NEXT:    v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT:    v_cvt_f16_f32_e32 v22, v22
; SI-NEXT:    v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT:    v_or_b32_e32 v22, v23, v22
; SI-NEXT:    v_cvt_f32_f16_e32 v23, s13
; SI-NEXT:    v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT:    v_cvt_f16_f32_e32 v23, v23
; SI-NEXT:    v_lshlrev_b32_e32 v23, 16, v23
; SI-NEXT:    v_or_b32_e32 v23, v24, v23
; SI-NEXT:    v_cvt_f32_f16_e32 v24, s11
; SI-NEXT:    v_add_f32_e32 v24, 0x38000000, v24
; SI-NEXT:    v_cvt_f16_f32_e32 v24, v24
; SI-NEXT:    v_lshlrev_b32_e32 v24, 16, v24
; SI-NEXT:    v_or_b32_e32 v24, v25, v24
; SI-NEXT:    v_cvt_f32_f16_e32 v25, s9
; SI-NEXT:    v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT:    v_cvt_f16_f32_e32 v25, v25
; SI-NEXT:    v_lshlrev_b32_e32 v25, 16, v25
; SI-NEXT:    v_or_b32_e32 v25, v26, v25
; SI-NEXT:    v_cvt_f32_f16_e32 v26, s7
; SI-NEXT:    v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT:    v_cvt_f16_f32_e32 v26, v26
; SI-NEXT:    v_lshlrev_b32_e32 v26, 16, v26
; SI-NEXT:    v_or_b32_e32 v26, v27, v26
; SI-NEXT:    v_cvt_f32_f16_e32 v27, s5
; SI-NEXT:    v_add_f32_e32 v27, 0x38000000, v27
; SI-NEXT:    v_cvt_f16_f32_e32 v27, v27
; SI-NEXT:    v_lshlrev_b32_e32 v27, 16, v27
; SI-NEXT:    v_or_b32_e32 v27, v28, v27
; SI-NEXT:  .LBB47_3: ; %end
; SI-NEXT:    v_readlane_b32 s55, v32, 11
; SI-NEXT:    v_readlane_b32 s54, v32, 10
; SI-NEXT:    v_readlane_b32 s53, v32, 9
; SI-NEXT:    v_readlane_b32 s52, v32, 8
; SI-NEXT:    v_readlane_b32 s51, v32, 7
; SI-NEXT:    v_readlane_b32 s50, v32, 6
; SI-NEXT:    v_readlane_b32 s49, v32, 5
; SI-NEXT:    v_readlane_b32 s48, v32, 4
; SI-NEXT:    v_readlane_b32 s39, v32, 3
; SI-NEXT:    v_readlane_b32 s38, v32, 2
; SI-NEXT:    v_readlane_b32 s37, v32, 1
; SI-NEXT:    v_readlane_b32 s36, v32, 0
; SI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v56f16_to_v14i64_scalar:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    v_writelane_b32 v32, s36, 0
; VI-NEXT:    v_writelane_b32 v32, s37, 1
; VI-NEXT:    v_writelane_b32 v32, s38, 2
; VI-NEXT:    v_writelane_b32 v32, s39, 3
; VI-NEXT:    v_writelane_b32 v32, s48, 4
; VI-NEXT:    v_writelane_b32 v32, s49, 5
; VI-NEXT:    v_writelane_b32 v32, s50, 6
; VI-NEXT:    v_writelane_b32 v32, s51, 7
; VI-NEXT:    v_writelane_b32 v32, s52, 8
; VI-NEXT:    v_writelane_b32 v32, s53, 9
; VI-NEXT:    v_writelane_b32 v32, s54, 10
; VI-NEXT:    v_writelane_b32 v32, s55, 11
; VI-NEXT:    v_writelane_b32 v32, s30, 12
; VI-NEXT:    v_writelane_b32 v32, s31, 13
; VI-NEXT:    v_readfirstlane_b32 s4, v13
; VI-NEXT:    v_readfirstlane_b32 s6, v12
; VI-NEXT:    v_readfirstlane_b32 s8, v11
; VI-NEXT:    v_readfirstlane_b32 s10, v10
; VI-NEXT:    v_readfirstlane_b32 s12, v9
; VI-NEXT:    v_readfirstlane_b32 s14, v8
; VI-NEXT:    v_readfirstlane_b32 s57, v7
; VI-NEXT:    v_readfirstlane_b32 s56, v6
; VI-NEXT:    v_readfirstlane_b32 s60, v5
; VI-NEXT:    v_readfirstlane_b32 s62, v4
; VI-NEXT:    v_readfirstlane_b32 s73, v3
; VI-NEXT:    v_readfirstlane_b32 s76, v2
; VI-NEXT:    v_readfirstlane_b32 s78, v1
; VI-NEXT:    v_readfirstlane_b32 s88, v0
; VI-NEXT:    s_lshr_b32 s72, s29, 16
; VI-NEXT:    s_lshr_b32 s75, s28, 16
; VI-NEXT:    s_lshr_b32 s47, s27, 16
; VI-NEXT:    s_lshr_b32 s46, s26, 16
; VI-NEXT:    s_lshr_b32 s45, s25, 16
; VI-NEXT:    s_lshr_b32 s44, s24, 16
; VI-NEXT:    s_lshr_b32 s43, s23, 16
; VI-NEXT:    s_lshr_b32 s42, s22, 16
; VI-NEXT:    s_lshr_b32 s41, s21, 16
; VI-NEXT:    s_lshr_b32 s40, s20, 16
; VI-NEXT:    s_lshr_b32 s90, s19, 16
; VI-NEXT:    s_lshr_b32 s91, s18, 16
; VI-NEXT:    s_lshr_b32 vcc_lo, s17, 16
; VI-NEXT:    s_lshr_b32 vcc_hi, s16, 16
; VI-NEXT:    s_lshr_b32 s5, s4, 16
; VI-NEXT:    s_lshr_b32 s7, s6, 16
; VI-NEXT:    s_lshr_b32 s9, s8, 16
; VI-NEXT:    s_lshr_b32 s11, s10, 16
; VI-NEXT:    s_lshr_b32 s13, s12, 16
; VI-NEXT:    s_lshr_b32 s15, s14, 16
; VI-NEXT:    s_lshr_b32 s58, s57, 16
; VI-NEXT:    s_lshr_b32 s59, s56, 16
; VI-NEXT:    s_lshr_b32 s61, s60, 16
; VI-NEXT:    s_lshr_b32 s63, s62, 16
; VI-NEXT:    s_lshr_b32 s74, s73, 16
; VI-NEXT:    s_lshr_b32 s77, s76, 16
; VI-NEXT:    s_lshr_b32 s79, s78, 16
; VI-NEXT:    s_lshr_b32 s89, s88, 16
; VI-NEXT:    v_readfirstlane_b32 s30, v14
; VI-NEXT:    s_cmp_lg_u32 s30, 0
; VI-NEXT:    s_cbranch_scc0 .LBB47_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    s_and_b32 s16, 0xffff, s16
; VI-NEXT:    s_lshl_b32 vcc_hi, vcc_hi, 16
; VI-NEXT:    s_and_b32 s17, 0xffff, s17
; VI-NEXT:    s_lshl_b32 vcc_lo, vcc_lo, 16
; VI-NEXT:    s_or_b32 s36, s16, vcc_hi
; VI-NEXT:    s_or_b32 s37, s17, vcc_lo
; VI-NEXT:    s_and_b32 s16, 0xffff, s18
; VI-NEXT:    s_lshl_b32 s17, s91, 16
; VI-NEXT:    s_or_b32 s38, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s19
; VI-NEXT:    s_lshl_b32 s17, s90, 16
; VI-NEXT:    s_or_b32 s39, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s20
; VI-NEXT:    s_lshl_b32 s17, s40, 16
; VI-NEXT:    s_or_b32 s40, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s21
; VI-NEXT:    s_lshl_b32 s17, s41, 16
; VI-NEXT:    s_or_b32 s41, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s22
; VI-NEXT:    s_lshl_b32 s17, s42, 16
; VI-NEXT:    s_or_b32 s42, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s23
; VI-NEXT:    s_lshl_b32 s17, s43, 16
; VI-NEXT:    s_or_b32 s43, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s24
; VI-NEXT:    s_lshl_b32 s17, s44, 16
; VI-NEXT:    s_or_b32 s44, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s25
; VI-NEXT:    s_lshl_b32 s17, s45, 16
; VI-NEXT:    s_or_b32 s45, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s26
; VI-NEXT:    s_lshl_b32 s17, s46, 16
; VI-NEXT:    s_or_b32 s46, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s27
; VI-NEXT:    s_lshl_b32 s17, s47, 16
; VI-NEXT:    s_or_b32 s47, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s28
; VI-NEXT:    s_lshl_b32 s17, s75, 16
; VI-NEXT:    s_or_b32 s48, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s29
; VI-NEXT:    s_lshl_b32 s17, s72, 16
; VI-NEXT:    s_or_b32 s49, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s88
; VI-NEXT:    s_lshl_b32 s17, s89, 16
; VI-NEXT:    s_or_b32 s50, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s78
; VI-NEXT:    s_lshl_b32 s17, s79, 16
; VI-NEXT:    s_or_b32 s51, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s76
; VI-NEXT:    s_lshl_b32 s17, s77, 16
; VI-NEXT:    s_or_b32 s52, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s73
; VI-NEXT:    s_lshl_b32 s17, s74, 16
; VI-NEXT:    s_or_b32 s53, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s62
; VI-NEXT:    s_lshl_b32 s17, s63, 16
; VI-NEXT:    s_or_b32 s54, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s60
; VI-NEXT:    s_lshl_b32 s17, s61, 16
; VI-NEXT:    s_or_b32 s55, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s56
; VI-NEXT:    s_lshl_b32 s17, s59, 16
; VI-NEXT:    s_or_b32 s56, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s57
; VI-NEXT:    s_lshl_b32 s17, s58, 16
; VI-NEXT:    s_and_b32 s14, 0xffff, s14
; VI-NEXT:    s_lshl_b32 s15, s15, 16
; VI-NEXT:    s_and_b32 s12, 0xffff, s12
; VI-NEXT:    s_lshl_b32 s13, s13, 16
; VI-NEXT:    s_and_b32 s10, 0xffff, s10
; VI-NEXT:    s_lshl_b32 s11, s11, 16
; VI-NEXT:    s_and_b32 s8, 0xffff, s8
; VI-NEXT:    s_lshl_b32 s9, s9, 16
; VI-NEXT:    s_and_b32 s6, 0xffff, s6
; VI-NEXT:    s_lshl_b32 s7, s7, 16
; VI-NEXT:    s_and_b32 s4, 0xffff, s4
; VI-NEXT:    s_lshl_b32 s5, s5, 16
; VI-NEXT:    s_or_b32 s57, s16, s17
; VI-NEXT:    s_or_b32 s58, s14, s15
; VI-NEXT:    s_or_b32 s59, s12, s13
; VI-NEXT:    s_or_b32 s60, s10, s11
; VI-NEXT:    s_or_b32 s61, s8, s9
; VI-NEXT:    s_or_b32 s62, s6, s7
; VI-NEXT:    s_or_b32 s63, s4, s5
; VI-NEXT:    v_mov_b32_e32 v0, s36
; VI-NEXT:    v_mov_b32_e32 v1, s37
; VI-NEXT:    v_mov_b32_e32 v2, s38
; VI-NEXT:    v_mov_b32_e32 v3, s39
; VI-NEXT:    v_mov_b32_e32 v4, s40
; VI-NEXT:    v_mov_b32_e32 v5, s41
; VI-NEXT:    v_mov_b32_e32 v6, s42
; VI-NEXT:    v_mov_b32_e32 v7, s43
; VI-NEXT:    v_mov_b32_e32 v8, s44
; VI-NEXT:    v_mov_b32_e32 v9, s45
; VI-NEXT:    v_mov_b32_e32 v10, s46
; VI-NEXT:    v_mov_b32_e32 v11, s47
; VI-NEXT:    v_mov_b32_e32 v12, s48
; VI-NEXT:    v_mov_b32_e32 v13, s49
; VI-NEXT:    v_mov_b32_e32 v14, s50
; VI-NEXT:    v_mov_b32_e32 v15, s51
; VI-NEXT:    v_mov_b32_e32 v16, s52
; VI-NEXT:    v_mov_b32_e32 v17, s53
; VI-NEXT:    v_mov_b32_e32 v18, s54
; VI-NEXT:    v_mov_b32_e32 v19, s55
; VI-NEXT:    v_mov_b32_e32 v20, s56
; VI-NEXT:    v_mov_b32_e32 v21, s57
; VI-NEXT:    v_mov_b32_e32 v22, s58
; VI-NEXT:    v_mov_b32_e32 v23, s59
; VI-NEXT:    v_mov_b32_e32 v24, s60
; VI-NEXT:    v_mov_b32_e32 v25, s61
; VI-NEXT:    v_mov_b32_e32 v26, s62
; VI-NEXT:    v_mov_b32_e32 v27, s63
; VI-NEXT:    v_mov_b32_e32 v28, s64
; VI-NEXT:    v_mov_b32_e32 v29, s65
; VI-NEXT:    v_mov_b32_e32 v30, s66
; VI-NEXT:    v_mov_b32_e32 v31, s67
; VI-NEXT:    s_branch .LBB47_3
; VI-NEXT:  .LBB47_2: ; %cmp.true
; VI-NEXT:    v_mov_b32_e32 v27, 0x200
; VI-NEXT:    v_mov_b32_e32 v0, vcc_hi
; VI-NEXT:    v_mov_b32_e32 v2, vcc_lo
; VI-NEXT:    v_add_f16_sdwa v0, v0, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v1, s16, v27
; VI-NEXT:    v_add_f16_sdwa v2, v2, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v3, s17, v27
; VI-NEXT:    v_or_b32_e32 v0, v1, v0
; VI-NEXT:    v_or_b32_e32 v1, v3, v2
; VI-NEXT:    v_mov_b32_e32 v2, s91
; VI-NEXT:    v_add_f16_sdwa v2, v2, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v3, s18, v27
; VI-NEXT:    v_or_b32_e32 v2, v3, v2
; VI-NEXT:    v_mov_b32_e32 v3, s90
; VI-NEXT:    v_add_f16_sdwa v3, v3, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v4, s19, v27
; VI-NEXT:    v_or_b32_e32 v3, v4, v3
; VI-NEXT:    v_mov_b32_e32 v4, s40
; VI-NEXT:    v_add_f16_sdwa v4, v4, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v5, s20, v27
; VI-NEXT:    v_or_b32_e32 v4, v5, v4
; VI-NEXT:    v_mov_b32_e32 v5, s41
; VI-NEXT:    v_add_f16_sdwa v5, v5, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v6, s21, v27
; VI-NEXT:    v_or_b32_e32 v5, v6, v5
; VI-NEXT:    v_mov_b32_e32 v6, s42
; VI-NEXT:    v_add_f16_sdwa v6, v6, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v7, s22, v27
; VI-NEXT:    v_or_b32_e32 v6, v7, v6
; VI-NEXT:    v_mov_b32_e32 v7, s43
; VI-NEXT:    v_add_f16_sdwa v7, v7, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v8, s23, v27
; VI-NEXT:    v_or_b32_e32 v7, v8, v7
; VI-NEXT:    v_mov_b32_e32 v8, s44
; VI-NEXT:    v_add_f16_sdwa v8, v8, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v9, s24, v27
; VI-NEXT:    v_or_b32_e32 v8, v9, v8
; VI-NEXT:    v_mov_b32_e32 v9, s45
; VI-NEXT:    v_add_f16_sdwa v9, v9, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v10, s25, v27
; VI-NEXT:    v_or_b32_e32 v9, v10, v9
; VI-NEXT:    v_mov_b32_e32 v10, s46
; VI-NEXT:    v_add_f16_sdwa v10, v10, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v11, s26, v27
; VI-NEXT:    v_or_b32_e32 v10, v11, v10
; VI-NEXT:    v_mov_b32_e32 v11, s47
; VI-NEXT:    v_add_f16_sdwa v11, v11, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v12, s27, v27
; VI-NEXT:    v_or_b32_e32 v11, v12, v11
; VI-NEXT:    v_mov_b32_e32 v12, s75
; VI-NEXT:    v_add_f16_sdwa v12, v12, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v13, s28, v27
; VI-NEXT:    v_or_b32_e32 v12, v13, v12
; VI-NEXT:    v_mov_b32_e32 v13, s72
; VI-NEXT:    v_add_f16_sdwa v13, v13, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v14, s29, v27
; VI-NEXT:    v_or_b32_e32 v13, v14, v13
; VI-NEXT:    v_mov_b32_e32 v14, s89
; VI-NEXT:    v_add_f16_sdwa v14, v14, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v15, s88, v27
; VI-NEXT:    v_or_b32_e32 v14, v15, v14
; VI-NEXT:    v_mov_b32_e32 v15, s79
; VI-NEXT:    v_add_f16_sdwa v15, v15, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v16, s78, v27
; VI-NEXT:    v_or_b32_e32 v15, v16, v15
; VI-NEXT:    v_mov_b32_e32 v16, s77
; VI-NEXT:    v_add_f16_sdwa v16, v16, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v17, s76, v27
; VI-NEXT:    v_or_b32_e32 v16, v17, v16
; VI-NEXT:    v_mov_b32_e32 v17, s74
; VI-NEXT:    v_add_f16_sdwa v17, v17, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v18, s73, v27
; VI-NEXT:    v_or_b32_e32 v17, v18, v17
; VI-NEXT:    v_mov_b32_e32 v18, s63
; VI-NEXT:    v_add_f16_sdwa v18, v18, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v19, s62, v27
; VI-NEXT:    v_or_b32_e32 v18, v19, v18
; VI-NEXT:    v_mov_b32_e32 v19, s61
; VI-NEXT:    v_add_f16_sdwa v19, v19, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v20, s60, v27
; VI-NEXT:    v_or_b32_e32 v19, v20, v19
; VI-NEXT:    v_mov_b32_e32 v20, s59
; VI-NEXT:    v_add_f16_sdwa v20, v20, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v21, s56, v27
; VI-NEXT:    v_or_b32_e32 v20, v21, v20
; VI-NEXT:    v_mov_b32_e32 v21, s58
; VI-NEXT:    v_add_f16_sdwa v21, v21, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v22, s57, v27
; VI-NEXT:    v_or_b32_e32 v21, v22, v21
; VI-NEXT:    v_mov_b32_e32 v22, s15
; VI-NEXT:    v_add_f16_sdwa v22, v22, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v23, s14, v27
; VI-NEXT:    v_or_b32_e32 v22, v23, v22
; VI-NEXT:    v_mov_b32_e32 v23, s13
; VI-NEXT:    v_add_f16_sdwa v23, v23, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v24, s12, v27
; VI-NEXT:    v_or_b32_e32 v23, v24, v23
; VI-NEXT:    v_mov_b32_e32 v24, s11
; VI-NEXT:    v_add_f16_sdwa v24, v24, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v25, s10, v27
; VI-NEXT:    v_or_b32_e32 v24, v25, v24
; VI-NEXT:    v_mov_b32_e32 v25, s9
; VI-NEXT:    v_add_f16_sdwa v25, v25, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v26, s8, v27
; VI-NEXT:    v_or_b32_e32 v25, v26, v25
; VI-NEXT:    v_mov_b32_e32 v26, s7
; VI-NEXT:    v_add_f16_sdwa v26, v26, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v28, s6, v27
; VI-NEXT:    v_or_b32_e32 v26, v28, v26
; VI-NEXT:    v_mov_b32_e32 v28, s5
; VI-NEXT:    v_add_f16_sdwa v28, v28, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v27, s4, v27
; VI-NEXT:    v_or_b32_e32 v27, v27, v28
; VI-NEXT:  .LBB47_3: ; %end
; VI-NEXT:    v_readlane_b32 s30, v32, 12
; VI-NEXT:    v_readlane_b32 s31, v32, 13
; VI-NEXT:    v_readlane_b32 s55, v32, 11
; VI-NEXT:    v_readlane_b32 s54, v32, 10
; VI-NEXT:    v_readlane_b32 s53, v32, 9
; VI-NEXT:    v_readlane_b32 s52, v32, 8
; VI-NEXT:    v_readlane_b32 s51, v32, 7
; VI-NEXT:    v_readlane_b32 s50, v32, 6
; VI-NEXT:    v_readlane_b32 s49, v32, 5
; VI-NEXT:    v_readlane_b32 s48, v32, 4
; VI-NEXT:    v_readlane_b32 s39, v32, 3
; VI-NEXT:    v_readlane_b32 s38, v32, 2
; VI-NEXT:    v_readlane_b32 s37, v32, 1
; VI-NEXT:    v_readlane_b32 s36, v32, 0
; VI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v56f16_to_v14i64_scalar:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    s_mov_b64 exec, s[4:5]
; GFX9-NEXT:    v_writelane_b32 v32, s36, 0
; GFX9-NEXT:    v_writelane_b32 v32, s37, 1
; GFX9-NEXT:    v_writelane_b32 v32, s38, 2
; GFX9-NEXT:    v_writelane_b32 v32, s39, 3
; GFX9-NEXT:    v_writelane_b32 v32, s48, 4
; GFX9-NEXT:    v_writelane_b32 v32, s49, 5
; GFX9-NEXT:    v_writelane_b32 v32, s50, 6
; GFX9-NEXT:    v_writelane_b32 v32, s51, 7
; GFX9-NEXT:    v_writelane_b32 v32, s52, 8
; GFX9-NEXT:    v_writelane_b32 v32, s53, 9
; GFX9-NEXT:    v_writelane_b32 v32, s54, 10
; GFX9-NEXT:    v_writelane_b32 v32, s55, 11
; GFX9-NEXT:    v_readfirstlane_b32 s4, v13
; GFX9-NEXT:    v_readfirstlane_b32 s6, v12
; GFX9-NEXT:    v_readfirstlane_b32 s8, v11
; GFX9-NEXT:    v_readfirstlane_b32 s10, v10
; GFX9-NEXT:    v_readfirstlane_b32 s12, v9
; GFX9-NEXT:    v_readfirstlane_b32 s14, v8
; GFX9-NEXT:    v_readfirstlane_b32 s57, v7
; GFX9-NEXT:    v_readfirstlane_b32 s60, v6
; GFX9-NEXT:    v_readfirstlane_b32 s62, v5
; GFX9-NEXT:    v_readfirstlane_b32 s72, v4
; GFX9-NEXT:    v_readfirstlane_b32 s74, v3
; GFX9-NEXT:    v_readfirstlane_b32 s76, v2
; GFX9-NEXT:    v_readfirstlane_b32 s78, v1
; GFX9-NEXT:    v_readfirstlane_b32 s88, v0
; GFX9-NEXT:    s_lshr_b32 s56, s29, 16
; GFX9-NEXT:    s_lshr_b32 s59, s28, 16
; GFX9-NEXT:    s_lshr_b32 s47, s27, 16
; GFX9-NEXT:    s_lshr_b32 s46, s26, 16
; GFX9-NEXT:    s_lshr_b32 s45, s25, 16
; GFX9-NEXT:    s_lshr_b32 s44, s24, 16
; GFX9-NEXT:    s_lshr_b32 s43, s23, 16
; GFX9-NEXT:    s_lshr_b32 s42, s22, 16
; GFX9-NEXT:    s_lshr_b32 s41, s21, 16
; GFX9-NEXT:    s_lshr_b32 s40, s20, 16
; GFX9-NEXT:    s_lshr_b32 s90, s19, 16
; GFX9-NEXT:    s_lshr_b32 s91, s18, 16
; GFX9-NEXT:    s_lshr_b32 s92, s17, 16
; GFX9-NEXT:    s_lshr_b32 s93, s16, 16
; GFX9-NEXT:    s_lshr_b32 s5, s4, 16
; GFX9-NEXT:    s_lshr_b32 s7, s6, 16
; GFX9-NEXT:    s_lshr_b32 s9, s8, 16
; GFX9-NEXT:    s_lshr_b32 s11, s10, 16
; GFX9-NEXT:    s_lshr_b32 s13, s12, 16
; GFX9-NEXT:    s_lshr_b32 s15, s14, 16
; GFX9-NEXT:    s_lshr_b32 s58, s57, 16
; GFX9-NEXT:    s_lshr_b32 s61, s60, 16
; GFX9-NEXT:    s_lshr_b32 s63, s62, 16
; GFX9-NEXT:    s_lshr_b32 s73, s72, 16
; GFX9-NEXT:    s_lshr_b32 s75, s74, 16
; GFX9-NEXT:    s_lshr_b32 s77, s76, 16
; GFX9-NEXT:    s_lshr_b32 s79, s78, 16
; GFX9-NEXT:    s_lshr_b32 s89, s88, 16
; GFX9-NEXT:    v_readfirstlane_b32 s94, v14
; GFX9-NEXT:    s_cmp_lg_u32 s94, 0
; GFX9-NEXT:    s_cbranch_scc0 .LBB47_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    s_pack_ll_b32_b16 s36, s16, s93
; GFX9-NEXT:    s_pack_ll_b32_b16 s37, s17, s92
; GFX9-NEXT:    s_pack_ll_b32_b16 s38, s18, s91
; GFX9-NEXT:    s_pack_ll_b32_b16 s39, s19, s90
; GFX9-NEXT:    s_pack_ll_b32_b16 s40, s20, s40
; GFX9-NEXT:    s_pack_ll_b32_b16 s41, s21, s41
; GFX9-NEXT:    s_pack_ll_b32_b16 s42, s22, s42
; GFX9-NEXT:    s_pack_ll_b32_b16 s43, s23, s43
; GFX9-NEXT:    s_pack_ll_b32_b16 s44, s24, s44
; GFX9-NEXT:    s_pack_ll_b32_b16 s45, s25, s45
; GFX9-NEXT:    s_pack_ll_b32_b16 s46, s26, s46
; GFX9-NEXT:    s_pack_ll_b32_b16 s47, s27, s47
; GFX9-NEXT:    s_pack_ll_b32_b16 s48, s28, s59
; GFX9-NEXT:    s_pack_ll_b32_b16 s49, s29, s56
; GFX9-NEXT:    s_pack_ll_b32_b16 s50, s88, s89
; GFX9-NEXT:    s_pack_ll_b32_b16 s51, s78, s79
; GFX9-NEXT:    s_pack_ll_b32_b16 s52, s76, s77
; GFX9-NEXT:    s_pack_ll_b32_b16 s53, s74, s75
; GFX9-NEXT:    s_pack_ll_b32_b16 s54, s72, s73
; GFX9-NEXT:    s_pack_ll_b32_b16 s55, s62, s63
; GFX9-NEXT:    s_pack_ll_b32_b16 s56, s60, s61
; GFX9-NEXT:    s_pack_ll_b32_b16 s57, s57, s58
; GFX9-NEXT:    s_pack_ll_b32_b16 s58, s14, s15
; GFX9-NEXT:    s_pack_ll_b32_b16 s59, s12, s13
; GFX9-NEXT:    s_pack_ll_b32_b16 s60, s10, s11
; GFX9-NEXT:    s_pack_ll_b32_b16 s61, s8, s9
; GFX9-NEXT:    s_pack_ll_b32_b16 s62, s6, s7
; GFX9-NEXT:    s_pack_ll_b32_b16 s63, s4, s5
; GFX9-NEXT:    v_mov_b32_e32 v0, s36
; GFX9-NEXT:    v_mov_b32_e32 v1, s37
; GFX9-NEXT:    v_mov_b32_e32 v2, s38
; GFX9-NEXT:    v_mov_b32_e32 v3, s39
; GFX9-NEXT:    v_mov_b32_e32 v4, s40
; GFX9-NEXT:    v_mov_b32_e32 v5, s41
; GFX9-NEXT:    v_mov_b32_e32 v6, s42
; GFX9-NEXT:    v_mov_b32_e32 v7, s43
; GFX9-NEXT:    v_mov_b32_e32 v8, s44
; GFX9-NEXT:    v_mov_b32_e32 v9, s45
; GFX9-NEXT:    v_mov_b32_e32 v10, s46
; GFX9-NEXT:    v_mov_b32_e32 v11, s47
; GFX9-NEXT:    v_mov_b32_e32 v12, s48
; GFX9-NEXT:    v_mov_b32_e32 v13, s49
; GFX9-NEXT:    v_mov_b32_e32 v14, s50
; GFX9-NEXT:    v_mov_b32_e32 v15, s51
; GFX9-NEXT:    v_mov_b32_e32 v16, s52
; GFX9-NEXT:    v_mov_b32_e32 v17, s53
; GFX9-NEXT:    v_mov_b32_e32 v18, s54
; GFX9-NEXT:    v_mov_b32_e32 v19, s55
; GFX9-NEXT:    v_mov_b32_e32 v20, s56
; GFX9-NEXT:    v_mov_b32_e32 v21, s57
; GFX9-NEXT:    v_mov_b32_e32 v22, s58
; GFX9-NEXT:    v_mov_b32_e32 v23, s59
; GFX9-NEXT:    v_mov_b32_e32 v24, s60
; GFX9-NEXT:    v_mov_b32_e32 v25, s61
; GFX9-NEXT:    v_mov_b32_e32 v26, s62
; GFX9-NEXT:    v_mov_b32_e32 v27, s63
; GFX9-NEXT:    v_mov_b32_e32 v28, s64
; GFX9-NEXT:    v_mov_b32_e32 v29, s65
; GFX9-NEXT:    v_mov_b32_e32 v30, s66
; GFX9-NEXT:    v_mov_b32_e32 v31, s67
; GFX9-NEXT:    s_branch .LBB47_3
; GFX9-NEXT:  .LBB47_2: ; %cmp.true
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s16, s93
; GFX9-NEXT:    v_mov_b32_e32 v27, 0x200
; GFX9-NEXT:    v_pk_add_f16 v0, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s18, s91
; GFX9-NEXT:    v_pk_add_f16 v2, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s19, s90
; GFX9-NEXT:    v_pk_add_f16 v3, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s20, s40
; GFX9-NEXT:    v_pk_add_f16 v4, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s21, s41
; GFX9-NEXT:    v_pk_add_f16 v5, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s22, s42
; GFX9-NEXT:    v_pk_add_f16 v6, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s23, s43
; GFX9-NEXT:    v_pk_add_f16 v7, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s24, s44
; GFX9-NEXT:    v_pk_add_f16 v8, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s25, s45
; GFX9-NEXT:    v_pk_add_f16 v9, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s26, s46
; GFX9-NEXT:    v_pk_add_f16 v10, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s27, s47
; GFX9-NEXT:    v_pk_add_f16 v11, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s28, s59
; GFX9-NEXT:    v_pk_add_f16 v12, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s29, s56
; GFX9-NEXT:    v_pk_add_f16 v13, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s88, s89
; GFX9-NEXT:    v_pk_add_f16 v14, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s78, s79
; GFX9-NEXT:    v_pk_add_f16 v15, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s76, s77
; GFX9-NEXT:    v_pk_add_f16 v16, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s74, s75
; GFX9-NEXT:    v_pk_add_f16 v17, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s72, s73
; GFX9-NEXT:    v_pk_add_f16 v18, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s62, s63
; GFX9-NEXT:    v_pk_add_f16 v19, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s60, s61
; GFX9-NEXT:    s_pack_ll_b32_b16 s17, s17, s92
; GFX9-NEXT:    v_pk_add_f16 v20, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s57, s58
; GFX9-NEXT:    s_pack_ll_b32_b16 s14, s14, s15
; GFX9-NEXT:    s_pack_ll_b32_b16 s12, s12, s13
; GFX9-NEXT:    s_pack_ll_b32_b16 s10, s10, s11
; GFX9-NEXT:    s_pack_ll_b32_b16 s8, s8, s9
; GFX9-NEXT:    s_pack_ll_b32_b16 s6, s6, s7
; GFX9-NEXT:    s_pack_ll_b32_b16 s4, s4, s5
; GFX9-NEXT:    v_pk_add_f16 v1, s17, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v21, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v22, s14, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v23, s12, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v24, s10, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v25, s8, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v26, s6, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v27, s4, v27 op_sel_hi:[1,0]
; GFX9-NEXT:  .LBB47_3: ; %end
; GFX9-NEXT:    v_readlane_b32 s55, v32, 11
; GFX9-NEXT:    v_readlane_b32 s54, v32, 10
; GFX9-NEXT:    v_readlane_b32 s53, v32, 9
; GFX9-NEXT:    v_readlane_b32 s52, v32, 8
; GFX9-NEXT:    v_readlane_b32 s51, v32, 7
; GFX9-NEXT:    v_readlane_b32 s50, v32, 6
; GFX9-NEXT:    v_readlane_b32 s49, v32, 5
; GFX9-NEXT:    v_readlane_b32 s48, v32, 4
; GFX9-NEXT:    v_readlane_b32 s39, v32, 3
; GFX9-NEXT:    v_readlane_b32 s38, v32, 2
; GFX9-NEXT:    v_readlane_b32 s37, v32, 1
; GFX9-NEXT:    v_readlane_b32 s36, v32, 0
; GFX9-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    s_mov_b64 exec, s[4:5]
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v56f16_to_v14i64_scalar:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_readfirstlane_b32 s40, v9
; GFX11-NEXT:    v_readfirstlane_b32 s42, v8
; GFX11-NEXT:    v_readfirstlane_b32 s43, v7
; GFX11-NEXT:    v_readfirstlane_b32 s46, v6
; GFX11-NEXT:    v_readfirstlane_b32 s57, v5
; GFX11-NEXT:    v_readfirstlane_b32 s59, v4
; GFX11-NEXT:    v_readfirstlane_b32 s62, v3
; GFX11-NEXT:    v_readfirstlane_b32 s63, v2
; GFX11-NEXT:    v_readfirstlane_b32 s73, v1
; GFX11-NEXT:    v_readfirstlane_b32 s75, v0
; GFX11-NEXT:    v_readfirstlane_b32 s90, v10
; GFX11-NEXT:    s_lshr_b32 s88, s1, 16
; GFX11-NEXT:    s_lshr_b32 s89, s0, 16
; GFX11-NEXT:    s_lshr_b32 s44, s29, 16
; GFX11-NEXT:    s_lshr_b32 s47, s28, 16
; GFX11-NEXT:    s_lshr_b32 s15, s27, 16
; GFX11-NEXT:    s_lshr_b32 s14, s26, 16
; GFX11-NEXT:    s_lshr_b32 s13, s25, 16
; GFX11-NEXT:    s_lshr_b32 s12, s24, 16
; GFX11-NEXT:    s_lshr_b32 s11, s23, 16
; GFX11-NEXT:    s_lshr_b32 s10, s22, 16
; GFX11-NEXT:    s_lshr_b32 s9, s21, 16
; GFX11-NEXT:    s_lshr_b32 s8, s20, 16
; GFX11-NEXT:    s_lshr_b32 s7, s19, 16
; GFX11-NEXT:    s_lshr_b32 s6, s18, 16
; GFX11-NEXT:    s_lshr_b32 s5, s17, 16
; GFX11-NEXT:    s_lshr_b32 s4, s16, 16
; GFX11-NEXT:    s_lshr_b32 s78, s3, 16
; GFX11-NEXT:    s_lshr_b32 s79, s2, 16
; GFX11-NEXT:    s_lshr_b32 s41, s40, 16
; GFX11-NEXT:    s_lshr_b32 s45, s42, 16
; GFX11-NEXT:    s_lshr_b32 s56, s43, 16
; GFX11-NEXT:    s_lshr_b32 s58, s46, 16
; GFX11-NEXT:    s_lshr_b32 s60, s57, 16
; GFX11-NEXT:    s_lshr_b32 s61, s59, 16
; GFX11-NEXT:    s_lshr_b32 s72, s62, 16
; GFX11-NEXT:    s_lshr_b32 s74, s63, 16
; GFX11-NEXT:    s_lshr_b32 s76, s73, 16
; GFX11-NEXT:    s_lshr_b32 s77, s75, 16
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s0, s89
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s1, s88
; GFX11-NEXT:    s_cmp_lg_u32 s90, 0
; GFX11-NEXT:    s_cbranch_scc0 .LBB47_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-NEXT:    s_pack_ll_b32_b16 s2, s2, s79
; GFX11-NEXT:    s_pack_ll_b32_b16 s3, s3, s78
; GFX11-NEXT:    s_pack_ll_b32_b16 s4, s16, s4
; GFX11-NEXT:    s_pack_ll_b32_b16 s5, s17, s5
; GFX11-NEXT:    s_pack_ll_b32_b16 s6, s18, s6
; GFX11-NEXT:    s_pack_ll_b32_b16 s7, s19, s7
; GFX11-NEXT:    s_pack_ll_b32_b16 s8, s20, s8
; GFX11-NEXT:    s_pack_ll_b32_b16 s9, s21, s9
; GFX11-NEXT:    s_pack_ll_b32_b16 s10, s22, s10
; GFX11-NEXT:    s_pack_ll_b32_b16 s11, s23, s11
; GFX11-NEXT:    s_pack_ll_b32_b16 s12, s24, s12
; GFX11-NEXT:    s_pack_ll_b32_b16 s13, s25, s13
; GFX11-NEXT:    s_pack_ll_b32_b16 s14, s26, s14
; GFX11-NEXT:    s_pack_ll_b32_b16 s15, s27, s15
; GFX11-NEXT:    s_pack_ll_b32_b16 s16, s28, s47
; GFX11-NEXT:    s_pack_ll_b32_b16 s17, s29, s44
; GFX11-NEXT:    s_pack_ll_b32_b16 s18, s75, s77
; GFX11-NEXT:    s_pack_ll_b32_b16 s19, s73, s76
; GFX11-NEXT:    s_pack_ll_b32_b16 s20, s63, s74
; GFX11-NEXT:    s_pack_ll_b32_b16 s21, s62, s72
; GFX11-NEXT:    s_pack_ll_b32_b16 s22, s59, s61
; GFX11-NEXT:    s_pack_ll_b32_b16 s23, s57, s60
; GFX11-NEXT:    s_pack_ll_b32_b16 s24, s46, s58
; GFX11-NEXT:    s_pack_ll_b32_b16 s25, s43, s56
; GFX11-NEXT:    s_pack_ll_b32_b16 s26, s42, s45
; GFX11-NEXT:    s_pack_ll_b32_b16 s27, s40, s41
; GFX11-NEXT:    v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX11-NEXT:    v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; GFX11-NEXT:    v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
; GFX11-NEXT:    v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
; GFX11-NEXT:    v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
; GFX11-NEXT:    v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
; GFX11-NEXT:    v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
; GFX11-NEXT:    v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
; GFX11-NEXT:    v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
; GFX11-NEXT:    v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
; GFX11-NEXT:    v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
; GFX11-NEXT:    v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
; GFX11-NEXT:    v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
; GFX11-NEXT:    v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
; GFX11-NEXT:    v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
; GFX11-NEXT:    v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
; GFX11-NEXT:    s_setpc_b64 s[30:31]
; GFX11-NEXT:  .LBB47_2: ; %cmp.true
; GFX11-NEXT:    v_pk_add_f16 v0, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v1, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s2, s79
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s3, s78
; GFX11-NEXT:    v_pk_add_f16 v2, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v3, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s16, s4
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s17, s5
; GFX11-NEXT:    v_pk_add_f16 v4, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v5, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s18, s6
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s19, s7
; GFX11-NEXT:    v_pk_add_f16 v6, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v7, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s20, s8
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s21, s9
; GFX11-NEXT:    v_pk_add_f16 v8, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v9, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s22, s10
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s23, s11
; GFX11-NEXT:    v_pk_add_f16 v10, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v11, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s24, s12
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s25, s13
; GFX11-NEXT:    v_pk_add_f16 v12, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v13, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s26, s14
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s27, s15
; GFX11-NEXT:    v_pk_add_f16 v14, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v15, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s28, s47
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s29, s44
; GFX11-NEXT:    v_pk_add_f16 v16, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v17, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s75, s77
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s73, s76
; GFX11-NEXT:    v_pk_add_f16 v18, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v19, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s63, s74
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s62, s72
; GFX11-NEXT:    v_pk_add_f16 v20, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v21, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s59, s61
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s57, s60
; GFX11-NEXT:    v_pk_add_f16 v22, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v23, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s46, s58
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s43, s56
; GFX11-NEXT:    v_pk_add_f16 v24, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v25, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s42, s45
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s40, s41
; GFX11-NEXT:    v_pk_add_f16 v26, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v27, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = fadd <56 x half> %a, splat (half 0xH0200)
  %a2 = bitcast <56 x half> %a1 to <14 x i64>
  br label %end

cmp.false:
  %a3 = bitcast <56 x half> %a to <14 x i64>
  br label %end

end:
  %phi = phi <14 x i64> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <14 x i64> %phi
}

define <56 x i16> @bitcast_v14f64_to_v56i16(<14 x double> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v14f64_to_v56i16:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT:    ; implicit-def: $vgpr40
; SI-NEXT:    ; implicit-def: $vgpr47
; SI-NEXT:    ; implicit-def: $vgpr53
; SI-NEXT:    ; implicit-def: $vgpr46
; SI-NEXT:    ; implicit-def: $vgpr50
; SI-NEXT:    ; implicit-def: $vgpr45
; SI-NEXT:    ; implicit-def: $vgpr39
; SI-NEXT:    ; implicit-def: $vgpr44
; SI-NEXT:    ; implicit-def: $vgpr37
; SI-NEXT:    ; implicit-def: $vgpr43
; SI-NEXT:    ; implicit-def: $vgpr36
; SI-NEXT:    ; implicit-def: $vgpr42
; SI-NEXT:    ; implicit-def: $vgpr35
; SI-NEXT:    ; implicit-def: $vgpr41
; SI-NEXT:    ; implicit-def: $vgpr34
; SI-NEXT:    ; implicit-def: $vgpr55
; SI-NEXT:    ; implicit-def: $vgpr33
; SI-NEXT:    ; implicit-def: $vgpr54
; SI-NEXT:    ; implicit-def: $vgpr32
; SI-NEXT:    ; implicit-def: $vgpr52
; SI-NEXT:    ; implicit-def: $vgpr31
; SI-NEXT:    ; implicit-def: $vgpr51
; SI-NEXT:    ; implicit-def: $vgpr30
; SI-NEXT:    ; implicit-def: $vgpr49
; SI-NEXT:    ; implicit-def: $vgpr29
; SI-NEXT:    ; implicit-def: $vgpr48
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr38
; SI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB48_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    v_alignbit_b32 v28, v27, v26, 16
; SI-NEXT:    v_alignbit_b32 v29, v25, v24, 16
; SI-NEXT:    v_alignbit_b32 v30, v23, v22, 16
; SI-NEXT:    v_alignbit_b32 v31, v21, v20, 16
; SI-NEXT:    v_alignbit_b32 v32, v19, v18, 16
; SI-NEXT:    v_alignbit_b32 v33, v17, v16, 16
; SI-NEXT:    v_alignbit_b32 v34, v15, v14, 16
; SI-NEXT:    v_alignbit_b32 v35, v13, v12, 16
; SI-NEXT:    v_alignbit_b32 v36, v11, v10, 16
; SI-NEXT:    v_alignbit_b32 v37, v9, v8, 16
; SI-NEXT:    v_alignbit_b32 v39, v7, v6, 16
; SI-NEXT:    v_alignbit_b32 v50, v5, v4, 16
; SI-NEXT:    v_alignbit_b32 v53, v3, v2, 16
; SI-NEXT:    v_alignbit_b32 v40, v1, v0, 16
; SI-NEXT:    v_lshrrev_b32_e32 v38, 16, v27
; SI-NEXT:    v_lshrrev_b32_e32 v48, 16, v25
; SI-NEXT:    v_lshrrev_b32_e32 v49, 16, v23
; SI-NEXT:    v_lshrrev_b32_e32 v51, 16, v21
; SI-NEXT:    v_lshrrev_b32_e32 v52, 16, v19
; SI-NEXT:    v_lshrrev_b32_e32 v54, 16, v17
; SI-NEXT:    v_lshrrev_b32_e32 v55, 16, v15
; SI-NEXT:    s_waitcnt expcnt(6)
; SI-NEXT:    v_lshrrev_b32_e32 v41, 16, v13
; SI-NEXT:    s_waitcnt expcnt(5)
; SI-NEXT:    v_lshrrev_b32_e32 v42, 16, v11
; SI-NEXT:    s_waitcnt expcnt(4)
; SI-NEXT:    v_lshrrev_b32_e32 v43, 16, v9
; SI-NEXT:    s_waitcnt expcnt(3)
; SI-NEXT:    v_lshrrev_b32_e32 v44, 16, v7
; SI-NEXT:    s_waitcnt expcnt(2)
; SI-NEXT:    v_lshrrev_b32_e32 v45, 16, v5
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v46, 16, v3
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v47, 16, v1
; SI-NEXT:  .LBB48_2: ; %Flow
; SI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB48_4
; SI-NEXT:  ; %bb.3: ; %cmp.true
; SI-NEXT:    v_add_f64 v[0:1], v[0:1], 1.0
; SI-NEXT:    v_add_f64 v[2:3], v[2:3], 1.0
; SI-NEXT:    v_add_f64 v[4:5], v[4:5], 1.0
; SI-NEXT:    v_add_f64 v[6:7], v[6:7], 1.0
; SI-NEXT:    v_add_f64 v[8:9], v[8:9], 1.0
; SI-NEXT:    v_add_f64 v[10:11], v[10:11], 1.0
; SI-NEXT:    v_add_f64 v[12:13], v[12:13], 1.0
; SI-NEXT:    v_add_f64 v[14:15], v[14:15], 1.0
; SI-NEXT:    v_add_f64 v[16:17], v[16:17], 1.0
; SI-NEXT:    v_add_f64 v[18:19], v[18:19], 1.0
; SI-NEXT:    v_add_f64 v[20:21], v[20:21], 1.0
; SI-NEXT:    v_add_f64 v[22:23], v[22:23], 1.0
; SI-NEXT:    v_add_f64 v[26:27], v[26:27], 1.0
; SI-NEXT:    v_add_f64 v[24:25], v[24:25], 1.0
; SI-NEXT:    v_alignbit_b32 v28, v27, v26, 16
; SI-NEXT:    v_alignbit_b32 v29, v25, v24, 16
; SI-NEXT:    v_alignbit_b32 v30, v23, v22, 16
; SI-NEXT:    v_alignbit_b32 v31, v21, v20, 16
; SI-NEXT:    v_alignbit_b32 v32, v19, v18, 16
; SI-NEXT:    v_alignbit_b32 v33, v17, v16, 16
; SI-NEXT:    v_alignbit_b32 v34, v15, v14, 16
; SI-NEXT:    v_alignbit_b32 v35, v13, v12, 16
; SI-NEXT:    v_alignbit_b32 v36, v11, v10, 16
; SI-NEXT:    v_alignbit_b32 v37, v9, v8, 16
; SI-NEXT:    v_alignbit_b32 v39, v7, v6, 16
; SI-NEXT:    v_alignbit_b32 v50, v5, v4, 16
; SI-NEXT:    v_alignbit_b32 v53, v3, v2, 16
; SI-NEXT:    v_alignbit_b32 v40, v1, v0, 16
; SI-NEXT:    v_lshrrev_b32_e32 v38, 16, v27
; SI-NEXT:    v_lshrrev_b32_e32 v48, 16, v25
; SI-NEXT:    v_lshrrev_b32_e32 v49, 16, v23
; SI-NEXT:    v_lshrrev_b32_e32 v51, 16, v21
; SI-NEXT:    v_lshrrev_b32_e32 v52, 16, v19
; SI-NEXT:    v_lshrrev_b32_e32 v54, 16, v17
; SI-NEXT:    v_lshrrev_b32_e32 v55, 16, v15
; SI-NEXT:    s_waitcnt expcnt(6)
; SI-NEXT:    v_lshrrev_b32_e32 v41, 16, v13
; SI-NEXT:    s_waitcnt expcnt(5)
; SI-NEXT:    v_lshrrev_b32_e32 v42, 16, v11
; SI-NEXT:    s_waitcnt expcnt(4)
; SI-NEXT:    v_lshrrev_b32_e32 v43, 16, v9
; SI-NEXT:    s_waitcnt expcnt(3)
; SI-NEXT:    v_lshrrev_b32_e32 v44, 16, v7
; SI-NEXT:    s_waitcnt expcnt(2)
; SI-NEXT:    v_lshrrev_b32_e32 v45, 16, v5
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v46, 16, v3
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v47, 16, v1
; SI-NEXT:  .LBB48_4: ; %end
; SI-NEXT:    s_or_b64 exec, exec, s[4:5]
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT:    v_lshlrev_b32_e32 v40, 16, v40
; SI-NEXT:    v_or_b32_e32 v0, v0, v40
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT:    v_lshlrev_b32_e32 v40, 16, v47
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT:    v_lshlrev_b32_e32 v53, 16, v53
; SI-NEXT:    v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT:    v_lshlrev_b32_e32 v50, 16, v50
; SI-NEXT:    v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT:    v_lshlrev_b32_e32 v39, 16, v39
; SI-NEXT:    v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT:    v_lshlrev_b32_e32 v37, 16, v37
; SI-NEXT:    v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT:    v_lshlrev_b32_e32 v36, 16, v36
; SI-NEXT:    v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; SI-NEXT:    v_or_b32_e32 v1, v1, v40
; SI-NEXT:    v_or_b32_e32 v2, v2, v53
; SI-NEXT:    v_lshlrev_b32_e32 v53, 16, v46
; SI-NEXT:    v_or_b32_e32 v4, v4, v50
; SI-NEXT:    v_lshlrev_b32_e32 v50, 16, v45
; SI-NEXT:    v_or_b32_e32 v6, v6, v39
; SI-NEXT:    v_lshlrev_b32_e32 v39, 16, v44
; SI-NEXT:    v_or_b32_e32 v8, v8, v37
; SI-NEXT:    v_lshlrev_b32_e32 v37, 16, v43
; SI-NEXT:    v_or_b32_e32 v10, v10, v36
; SI-NEXT:    v_lshlrev_b32_e32 v36, 16, v42
; SI-NEXT:    v_or_b32_e32 v12, v12, v35
; SI-NEXT:    v_lshlrev_b32_e32 v35, 16, v41
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; SI-NEXT:    v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT:    v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT:    v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; SI-NEXT:    v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT:    v_lshlrev_b32_e32 v32, 16, v32
; SI-NEXT:    v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT:    v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT:    v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; SI-NEXT:    v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; SI-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; SI-NEXT:    v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT:    v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT:    v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT:    v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT:    v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT:    v_and_b32_e32 v13, 0xffff, v13
; SI-NEXT:    v_or_b32_e32 v14, v14, v34
; SI-NEXT:    v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT:    v_lshlrev_b32_e32 v34, 16, v55
; SI-NEXT:    v_or_b32_e32 v16, v16, v33
; SI-NEXT:    v_and_b32_e32 v17, 0xffff, v17
; SI-NEXT:    v_lshlrev_b32_e32 v33, 16, v54
; SI-NEXT:    v_or_b32_e32 v18, v18, v32
; SI-NEXT:    v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT:    v_lshlrev_b32_e32 v32, 16, v52
; SI-NEXT:    v_or_b32_e32 v20, v20, v31
; SI-NEXT:    v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT:    v_lshlrev_b32_e32 v31, 16, v51
; SI-NEXT:    v_or_b32_e32 v22, v22, v30
; SI-NEXT:    v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v49
; SI-NEXT:    v_or_b32_e32 v24, v24, v29
; SI-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v48
; SI-NEXT:    v_or_b32_e32 v26, v26, v28
; SI-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v38
; SI-NEXT:    v_or_b32_e32 v3, v3, v53
; SI-NEXT:    v_or_b32_e32 v5, v5, v50
; SI-NEXT:    v_or_b32_e32 v7, v7, v39
; SI-NEXT:    v_or_b32_e32 v9, v9, v37
; SI-NEXT:    v_or_b32_e32 v11, v11, v36
; SI-NEXT:    v_or_b32_e32 v13, v13, v35
; SI-NEXT:    v_or_b32_e32 v15, v15, v34
; SI-NEXT:    v_or_b32_e32 v17, v17, v33
; SI-NEXT:    v_or_b32_e32 v19, v19, v32
; SI-NEXT:    v_or_b32_e32 v21, v21, v31
; SI-NEXT:    v_or_b32_e32 v23, v23, v30
; SI-NEXT:    v_or_b32_e32 v25, v25, v29
; SI-NEXT:    v_or_b32_e32 v27, v27, v28
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v14f64_to_v56i16:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT:    ; implicit-def: $vgpr47
; VI-NEXT:    ; implicit-def: $vgpr46
; VI-NEXT:    ; implicit-def: $vgpr45
; VI-NEXT:    ; implicit-def: $vgpr44
; VI-NEXT:    ; implicit-def: $vgpr43
; VI-NEXT:    ; implicit-def: $vgpr42
; VI-NEXT:    ; implicit-def: $vgpr41
; VI-NEXT:    ; implicit-def: $vgpr40
; VI-NEXT:    ; implicit-def: $vgpr55
; VI-NEXT:    ; implicit-def: $vgpr54
; VI-NEXT:    ; implicit-def: $vgpr53
; VI-NEXT:    ; implicit-def: $vgpr52
; VI-NEXT:    ; implicit-def: $vgpr51
; VI-NEXT:    ; implicit-def: $vgpr50
; VI-NEXT:    ; implicit-def: $vgpr49
; VI-NEXT:    ; implicit-def: $vgpr48
; VI-NEXT:    ; implicit-def: $vgpr39
; VI-NEXT:    ; implicit-def: $vgpr38
; VI-NEXT:    ; implicit-def: $vgpr37
; VI-NEXT:    ; implicit-def: $vgpr36
; VI-NEXT:    ; implicit-def: $vgpr35
; VI-NEXT:    ; implicit-def: $vgpr34
; VI-NEXT:    ; implicit-def: $vgpr33
; VI-NEXT:    ; implicit-def: $vgpr32
; VI-NEXT:    ; implicit-def: $vgpr31
; VI-NEXT:    ; implicit-def: $vgpr30
; VI-NEXT:    ; implicit-def: $vgpr29
; VI-NEXT:    ; implicit-def: $vgpr28
; VI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB48_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; VI-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; VI-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; VI-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; VI-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; VI-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; VI-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; VI-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; VI-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; VI-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; VI-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; VI-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; VI-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; VI-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; VI-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; VI-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; VI-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; VI-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; VI-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; VI-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; VI-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; VI-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; VI-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; VI-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; VI-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; VI-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; VI-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; VI-NEXT:  .LBB48_2: ; %Flow
; VI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB48_4
; VI-NEXT:  ; %bb.3: ; %cmp.true
; VI-NEXT:    v_add_f64 v[26:27], v[26:27], 1.0
; VI-NEXT:    v_add_f64 v[24:25], v[24:25], 1.0
; VI-NEXT:    v_add_f64 v[22:23], v[22:23], 1.0
; VI-NEXT:    v_add_f64 v[20:21], v[20:21], 1.0
; VI-NEXT:    v_add_f64 v[18:19], v[18:19], 1.0
; VI-NEXT:    v_add_f64 v[16:17], v[16:17], 1.0
; VI-NEXT:    v_add_f64 v[14:15], v[14:15], 1.0
; VI-NEXT:    v_add_f64 v[12:13], v[12:13], 1.0
; VI-NEXT:    v_add_f64 v[10:11], v[10:11], 1.0
; VI-NEXT:    v_add_f64 v[8:9], v[8:9], 1.0
; VI-NEXT:    v_add_f64 v[6:7], v[6:7], 1.0
; VI-NEXT:    v_add_f64 v[4:5], v[4:5], 1.0
; VI-NEXT:    v_add_f64 v[2:3], v[2:3], 1.0
; VI-NEXT:    v_add_f64 v[0:1], v[0:1], 1.0
; VI-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; VI-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; VI-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; VI-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; VI-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; VI-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; VI-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; VI-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; VI-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; VI-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; VI-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; VI-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; VI-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; VI-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; VI-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; VI-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; VI-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; VI-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; VI-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; VI-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; VI-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; VI-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; VI-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; VI-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; VI-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; VI-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; VI-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; VI-NEXT:  .LBB48_4: ; %end
; VI-NEXT:    s_or_b64 exec, exec, s[4:5]
; VI-NEXT:    v_lshlrev_b32_e32 v47, 16, v47
; VI-NEXT:    v_lshlrev_b32_e32 v46, 16, v46
; VI-NEXT:    v_lshlrev_b32_e32 v45, 16, v45
; VI-NEXT:    v_lshlrev_b32_e32 v44, 16, v44
; VI-NEXT:    v_lshlrev_b32_e32 v43, 16, v43
; VI-NEXT:    v_lshlrev_b32_e32 v42, 16, v42
; VI-NEXT:    v_lshlrev_b32_e32 v41, 16, v41
; VI-NEXT:    v_lshlrev_b32_e32 v40, 16, v40
; VI-NEXT:    v_or_b32_sdwa v0, v0, v47 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v1, v1, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v2, v2, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v3, v3, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v4, v4, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v5, v5, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v6, v6, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v7, v7, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; VI-NEXT:    v_lshlrev_b32_e32 v55, 16, v55
; VI-NEXT:    v_lshlrev_b32_e32 v54, 16, v54
; VI-NEXT:    v_lshlrev_b32_e32 v53, 16, v53
; VI-NEXT:    v_lshlrev_b32_e32 v52, 16, v52
; VI-NEXT:    v_lshlrev_b32_e32 v51, 16, v51
; VI-NEXT:    v_lshlrev_b32_e32 v50, 16, v50
; VI-NEXT:    v_lshlrev_b32_e32 v49, 16, v49
; VI-NEXT:    v_lshlrev_b32_e32 v48, 16, v48
; VI-NEXT:    v_lshlrev_b32_e32 v39, 16, v39
; VI-NEXT:    v_lshlrev_b32_e32 v38, 16, v38
; VI-NEXT:    v_lshlrev_b32_e32 v37, 16, v37
; VI-NEXT:    v_lshlrev_b32_e32 v36, 16, v36
; VI-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v34
; VI-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; VI-NEXT:    v_lshlrev_b32_e32 v32, 16, v32
; VI-NEXT:    v_lshlrev_b32_e32 v31, 16, v31
; VI-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; VI-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; VI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; VI-NEXT:    v_or_b32_sdwa v8, v8, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v9, v9, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v10, v10, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v11, v11, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v12, v12, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v13, v13, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v14, v14, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v15, v15, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v16, v16, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v17, v17, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v18, v18, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v19, v19, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v20, v20, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v21, v21, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v22, v22, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v23, v23, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v24, v24, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v25, v25, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v26, v26, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v14f64_to_v56i16:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT:    ; implicit-def: $vgpr47
; GFX9-NEXT:    ; implicit-def: $vgpr46
; GFX9-NEXT:    ; implicit-def: $vgpr45
; GFX9-NEXT:    ; implicit-def: $vgpr44
; GFX9-NEXT:    ; implicit-def: $vgpr43
; GFX9-NEXT:    ; implicit-def: $vgpr42
; GFX9-NEXT:    ; implicit-def: $vgpr41
; GFX9-NEXT:    ; implicit-def: $vgpr40
; GFX9-NEXT:    ; implicit-def: $vgpr55
; GFX9-NEXT:    ; implicit-def: $vgpr54
; GFX9-NEXT:    ; implicit-def: $vgpr53
; GFX9-NEXT:    ; implicit-def: $vgpr52
; GFX9-NEXT:    ; implicit-def: $vgpr51
; GFX9-NEXT:    ; implicit-def: $vgpr50
; GFX9-NEXT:    ; implicit-def: $vgpr49
; GFX9-NEXT:    ; implicit-def: $vgpr48
; GFX9-NEXT:    ; implicit-def: $vgpr39
; GFX9-NEXT:    ; implicit-def: $vgpr38
; GFX9-NEXT:    ; implicit-def: $vgpr37
; GFX9-NEXT:    ; implicit-def: $vgpr36
; GFX9-NEXT:    ; implicit-def: $vgpr35
; GFX9-NEXT:    ; implicit-def: $vgpr34
; GFX9-NEXT:    ; implicit-def: $vgpr33
; GFX9-NEXT:    ; implicit-def: $vgpr32
; GFX9-NEXT:    ; implicit-def: $vgpr31
; GFX9-NEXT:    ; implicit-def: $vgpr30
; GFX9-NEXT:    ; implicit-def: $vgpr29
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB48_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX9-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX9-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX9-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX9-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX9-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX9-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX9-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX9-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX9-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX9-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX9-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX9-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX9-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX9-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX9-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX9-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; GFX9-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; GFX9-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; GFX9-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; GFX9-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; GFX9-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; GFX9-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; GFX9-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; GFX9-NEXT:  .LBB48_2: ; %Flow
; GFX9-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB48_4
; GFX9-NEXT:  ; %bb.3: ; %cmp.true
; GFX9-NEXT:    v_add_f64 v[26:27], v[26:27], 1.0
; GFX9-NEXT:    v_add_f64 v[24:25], v[24:25], 1.0
; GFX9-NEXT:    v_add_f64 v[22:23], v[22:23], 1.0
; GFX9-NEXT:    v_add_f64 v[20:21], v[20:21], 1.0
; GFX9-NEXT:    v_add_f64 v[18:19], v[18:19], 1.0
; GFX9-NEXT:    v_add_f64 v[16:17], v[16:17], 1.0
; GFX9-NEXT:    v_add_f64 v[14:15], v[14:15], 1.0
; GFX9-NEXT:    v_add_f64 v[12:13], v[12:13], 1.0
; GFX9-NEXT:    v_add_f64 v[10:11], v[10:11], 1.0
; GFX9-NEXT:    v_add_f64 v[8:9], v[8:9], 1.0
; GFX9-NEXT:    v_add_f64 v[6:7], v[6:7], 1.0
; GFX9-NEXT:    v_add_f64 v[4:5], v[4:5], 1.0
; GFX9-NEXT:    v_add_f64 v[2:3], v[2:3], 1.0
; GFX9-NEXT:    v_add_f64 v[0:1], v[0:1], 1.0
; GFX9-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX9-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX9-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX9-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX9-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX9-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX9-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX9-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX9-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX9-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX9-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX9-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX9-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX9-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX9-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX9-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX9-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; GFX9-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; GFX9-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; GFX9-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; GFX9-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; GFX9-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; GFX9-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; GFX9-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; GFX9-NEXT:  .LBB48_4: ; %end
; GFX9-NEXT:    s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT:    s_mov_b32 s4, 0x5040100
; GFX9-NEXT:    v_perm_b32 v0, v47, v0, s4
; GFX9-NEXT:    v_perm_b32 v1, v46, v1, s4
; GFX9-NEXT:    v_perm_b32 v2, v45, v2, s4
; GFX9-NEXT:    v_perm_b32 v3, v44, v3, s4
; GFX9-NEXT:    v_perm_b32 v4, v43, v4, s4
; GFX9-NEXT:    v_perm_b32 v5, v42, v5, s4
; GFX9-NEXT:    v_perm_b32 v6, v41, v6, s4
; GFX9-NEXT:    v_perm_b32 v7, v40, v7, s4
; GFX9-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; GFX9-NEXT:    v_perm_b32 v8, v55, v8, s4
; GFX9-NEXT:    v_perm_b32 v9, v54, v9, s4
; GFX9-NEXT:    v_perm_b32 v10, v53, v10, s4
; GFX9-NEXT:    v_perm_b32 v11, v52, v11, s4
; GFX9-NEXT:    v_perm_b32 v12, v51, v12, s4
; GFX9-NEXT:    v_perm_b32 v13, v50, v13, s4
; GFX9-NEXT:    v_perm_b32 v14, v49, v14, s4
; GFX9-NEXT:    v_perm_b32 v15, v48, v15, s4
; GFX9-NEXT:    v_perm_b32 v16, v39, v16, s4
; GFX9-NEXT:    v_perm_b32 v17, v38, v17, s4
; GFX9-NEXT:    v_perm_b32 v18, v37, v18, s4
; GFX9-NEXT:    v_perm_b32 v19, v36, v19, s4
; GFX9-NEXT:    v_perm_b32 v20, v35, v20, s4
; GFX9-NEXT:    v_perm_b32 v21, v34, v21, s4
; GFX9-NEXT:    v_perm_b32 v22, v33, v22, s4
; GFX9-NEXT:    v_perm_b32 v23, v32, v23, s4
; GFX9-NEXT:    v_perm_b32 v24, v31, v24, s4
; GFX9-NEXT:    v_perm_b32 v25, v30, v25, s4
; GFX9-NEXT:    v_perm_b32 v26, v29, v26, s4
; GFX9-NEXT:    v_perm_b32 v27, v28, v27, s4
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-TRUE16-LABEL: bitcast_v14f64_to_v56i16:
; GFX11-TRUE16:       ; %bb.0:
; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-TRUE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT:    s_cbranch_execz .LBB48_2
; GFX11-TRUE16-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-TRUE16-NEXT:    v_add_f64 v[26:27], v[26:27], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[24:25], v[24:25], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[22:23], v[22:23], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[20:21], v[20:21], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[18:19], v[18:19], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[16:17], v[16:17], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[14:15], v[14:15], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[12:13], v[12:13], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[10:11], v[10:11], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[8:9], v[8:9], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[6:7], v[6:7], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[4:5], v[4:5], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[2:3], v[2:3], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[0:1], v[0:1], 1.0
; GFX11-TRUE16-NEXT:  .LBB48_2: ; %end
; GFX11-TRUE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v14f64_to_v56i16:
; GFX11-FAKE16:       ; %bb.0:
; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v28
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr71
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr70
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr69
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr68
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr67
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr66
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr65
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr64
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr55
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr54
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr53
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr52
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr51
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr50
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr49
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr48
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr39
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr38
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr37
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr36
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr35
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr34
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr33
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr32
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr31
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr30
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr29
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr28
; GFX11-FAKE16-NEXT:    s_and_saveexec_b32 s0, vcc_lo
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_cbranch_execz .LBB48_2
; GFX11-FAKE16-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v3
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v2
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v0
; GFX11-FAKE16-NEXT:  .LBB48_2: ; %Flow
; GFX11-FAKE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-FAKE16-NEXT:    s_cbranch_execz .LBB48_4
; GFX11-FAKE16-NEXT:  ; %bb.3: ; %cmp.true
; GFX11-FAKE16-NEXT:    v_add_f64 v[26:27], v[26:27], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[24:25], v[24:25], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[22:23], v[22:23], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[20:21], v[20:21], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[18:19], v[18:19], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[16:17], v[16:17], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[14:15], v[14:15], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[12:13], v[12:13], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[10:11], v[10:11], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[8:9], v[8:9], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[6:7], v[6:7], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[4:5], v[4:5], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[2:3], v[2:3], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[0:1], v[0:1], 1.0
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v3
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v2
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v0
; GFX11-FAKE16-NEXT:  .LBB48_4: ; %end
; GFX11-FAKE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v71, v0, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v1, v70, v1, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v2, v69, v2, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v3, v68, v3, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v4, v67, v4, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v5, v66, v5, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v6, v65, v6, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v7, v64, v7, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v8, v55, v8, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v9, v54, v9, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v10, v53, v10, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v11, v52, v11, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v12, v51, v12, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v13, v50, v13, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v14, v49, v14, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v15, v48, v15, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v16, v39, v16, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v17, v38, v17, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v18, v37, v18, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v19, v36, v19, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v20, v35, v20, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v21, v34, v21, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v22, v33, v22, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v23, v32, v23, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v24, v31, v24, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v25, v30, v25, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v26, v29, v26, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v27, v28, v27, 0x5040100
; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = fadd <14 x double> %a, splat (double 1.000000e+00)
  %a2 = bitcast <14 x double> %a1 to <56 x i16>
  br label %end

cmp.false:
  %a3 = bitcast <14 x double> %a to <56 x i16>
  br label %end

end:
  %phi = phi <56 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <56 x i16> %phi
}

define inreg <56 x i16> @bitcast_v14f64_to_v56i16_scalar(<14 x double> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v14f64_to_v56i16_scalar:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    s_or_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v56, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    v_writelane_b32 v57, s34, 0
; SI-NEXT:    v_writelane_b32 v57, s35, 1
; SI-NEXT:    v_writelane_b32 v57, s36, 2
; SI-NEXT:    v_writelane_b32 v57, s37, 3
; SI-NEXT:    v_writelane_b32 v57, s38, 4
; SI-NEXT:    v_writelane_b32 v57, s39, 5
; SI-NEXT:    v_writelane_b32 v57, s48, 6
; SI-NEXT:    v_writelane_b32 v57, s49, 7
; SI-NEXT:    v_writelane_b32 v57, s30, 8
; SI-NEXT:    v_writelane_b32 v57, s31, 9
; SI-NEXT:    v_readfirstlane_b32 s4, v14
; SI-NEXT:    v_readfirstlane_b32 s41, v13
; SI-NEXT:    v_readfirstlane_b32 s40, v12
; SI-NEXT:    v_readfirstlane_b32 s15, v11
; SI-NEXT:    v_readfirstlane_b32 s14, v10
; SI-NEXT:    v_readfirstlane_b32 s13, v9
; SI-NEXT:    v_readfirstlane_b32 s12, v8
; SI-NEXT:    v_readfirstlane_b32 s11, v7
; SI-NEXT:    v_readfirstlane_b32 s10, v6
; SI-NEXT:    v_readfirstlane_b32 s9, v5
; SI-NEXT:    v_readfirstlane_b32 s8, v4
; SI-NEXT:    v_readfirstlane_b32 s7, v3
; SI-NEXT:    v_readfirstlane_b32 s6, v2
; SI-NEXT:    v_readfirstlane_b32 s5, v1
; SI-NEXT:    s_cmp_lg_u32 s4, 0
; SI-NEXT:    v_readfirstlane_b32 s4, v0
; SI-NEXT:    s_cbranch_scc0 .LBB49_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    s_lshr_b32 s94, s41, 16
; SI-NEXT:    s_lshr_b32 s95, s15, 16
; SI-NEXT:    s_lshr_b32 vcc_lo, s13, 16
; SI-NEXT:    s_lshr_b32 vcc_hi, s11, 16
; SI-NEXT:    s_lshr_b32 s30, s9, 16
; SI-NEXT:    s_lshr_b32 s31, s7, 16
; SI-NEXT:    s_lshr_b32 s34, s5, 16
; SI-NEXT:    s_lshr_b32 s35, s29, 16
; SI-NEXT:    s_lshr_b32 s36, s27, 16
; SI-NEXT:    s_lshr_b32 s37, s25, 16
; SI-NEXT:    s_lshr_b32 s38, s23, 16
; SI-NEXT:    s_lshr_b32 s39, s21, 16
; SI-NEXT:    s_lshr_b32 s48, s19, 16
; SI-NEXT:    s_lshr_b32 s49, s17, 16
; SI-NEXT:    s_lshr_b64 s[42:43], s[40:41], 16
; SI-NEXT:    s_lshr_b64 s[44:45], s[14:15], 16
; SI-NEXT:    s_lshr_b64 s[46:47], s[12:13], 16
; SI-NEXT:    s_lshr_b64 s[56:57], s[10:11], 16
; SI-NEXT:    s_lshr_b64 s[58:59], s[8:9], 16
; SI-NEXT:    s_lshr_b64 s[60:61], s[6:7], 16
; SI-NEXT:    s_lshr_b64 s[62:63], s[4:5], 16
; SI-NEXT:    s_lshr_b64 s[72:73], s[28:29], 16
; SI-NEXT:    s_lshr_b64 s[74:75], s[26:27], 16
; SI-NEXT:    s_lshr_b64 s[76:77], s[24:25], 16
; SI-NEXT:    s_lshr_b64 s[78:79], s[22:23], 16
; SI-NEXT:    s_lshr_b64 s[88:89], s[20:21], 16
; SI-NEXT:    s_lshr_b64 s[90:91], s[18:19], 16
; SI-NEXT:    s_lshr_b64 s[92:93], s[16:17], 16
; SI-NEXT:    v_mov_b32_e32 v27, s41
; SI-NEXT:    v_mov_b32_e32 v25, s15
; SI-NEXT:    v_mov_b32_e32 v23, s13
; SI-NEXT:    v_mov_b32_e32 v21, s11
; SI-NEXT:    v_mov_b32_e32 v19, s9
; SI-NEXT:    v_mov_b32_e32 v17, s7
; SI-NEXT:    v_mov_b32_e32 v15, s5
; SI-NEXT:    v_mov_b32_e32 v13, s29
; SI-NEXT:    v_mov_b32_e32 v11, s27
; SI-NEXT:    v_mov_b32_e32 v9, s25
; SI-NEXT:    v_mov_b32_e32 v7, s23
; SI-NEXT:    v_mov_b32_e32 v5, s21
; SI-NEXT:    v_mov_b32_e32 v3, s19
; SI-NEXT:    v_mov_b32_e32 v1, s17
; SI-NEXT:    v_mov_b32_e32 v0, s16
; SI-NEXT:    v_mov_b32_e32 v2, s18
; SI-NEXT:    v_mov_b32_e32 v4, s20
; SI-NEXT:    v_mov_b32_e32 v6, s22
; SI-NEXT:    v_mov_b32_e32 v8, s24
; SI-NEXT:    v_mov_b32_e32 v10, s26
; SI-NEXT:    v_mov_b32_e32 v12, s28
; SI-NEXT:    v_mov_b32_e32 v14, s4
; SI-NEXT:    v_mov_b32_e32 v16, s6
; SI-NEXT:    v_mov_b32_e32 v18, s8
; SI-NEXT:    v_mov_b32_e32 v20, s10
; SI-NEXT:    v_mov_b32_e32 v22, s12
; SI-NEXT:    v_mov_b32_e32 v24, s14
; SI-NEXT:    v_mov_b32_e32 v26, s40
; SI-NEXT:    v_mov_b32_e32 v52, s94
; SI-NEXT:    v_mov_b32_e32 v53, s95
; SI-NEXT:    v_mov_b32_e32 v54, vcc_lo
; SI-NEXT:    v_mov_b32_e32 v55, vcc_hi
; SI-NEXT:    v_mov_b32_e32 v39, s30
; SI-NEXT:    v_mov_b32_e32 v40, s31
; SI-NEXT:    v_mov_b32_e32 v41, s34
; SI-NEXT:    s_waitcnt expcnt(6)
; SI-NEXT:    v_mov_b32_e32 v42, s35
; SI-NEXT:    s_waitcnt expcnt(5)
; SI-NEXT:    v_mov_b32_e32 v43, s36
; SI-NEXT:    v_mov_b32_e32 v51, s37
; SI-NEXT:    s_waitcnt expcnt(4)
; SI-NEXT:    v_mov_b32_e32 v44, s38
; SI-NEXT:    s_waitcnt expcnt(3)
; SI-NEXT:    v_mov_b32_e32 v45, s39
; SI-NEXT:    s_waitcnt expcnt(2)
; SI-NEXT:    v_mov_b32_e32 v46, s48
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_mov_b32_e32 v47, s49
; SI-NEXT:    v_mov_b32_e32 v50, s92
; SI-NEXT:    v_mov_b32_e32 v49, s90
; SI-NEXT:    v_mov_b32_e32 v48, s88
; SI-NEXT:    v_mov_b32_e32 v38, s78
; SI-NEXT:    v_mov_b32_e32 v37, s76
; SI-NEXT:    v_mov_b32_e32 v36, s74
; SI-NEXT:    v_mov_b32_e32 v35, s72
; SI-NEXT:    v_mov_b32_e32 v34, s62
; SI-NEXT:    v_mov_b32_e32 v33, s60
; SI-NEXT:    v_mov_b32_e32 v32, s58
; SI-NEXT:    v_mov_b32_e32 v31, s56
; SI-NEXT:    v_mov_b32_e32 v30, s46
; SI-NEXT:    v_mov_b32_e32 v29, s44
; SI-NEXT:    v_mov_b32_e32 v28, s42
; SI-NEXT:    s_branch .LBB49_3
; SI-NEXT:  .LBB49_2: ; %cmp.true
; SI-NEXT:    v_add_f64 v[26:27], s[40:41], 1.0
; SI-NEXT:    v_add_f64 v[24:25], s[14:15], 1.0
; SI-NEXT:    v_add_f64 v[22:23], s[12:13], 1.0
; SI-NEXT:    v_lshr_b64 v[28:29], v[26:27], 16
; SI-NEXT:    v_add_f64 v[20:21], s[10:11], 1.0
; SI-NEXT:    v_lshr_b64 v[29:30], v[24:25], 16
; SI-NEXT:    v_add_f64 v[18:19], s[8:9], 1.0
; SI-NEXT:    v_lshr_b64 v[30:31], v[22:23], 16
; SI-NEXT:    v_add_f64 v[16:17], s[6:7], 1.0
; SI-NEXT:    v_lshr_b64 v[31:32], v[20:21], 16
; SI-NEXT:    v_add_f64 v[14:15], s[4:5], 1.0
; SI-NEXT:    v_lshr_b64 v[32:33], v[18:19], 16
; SI-NEXT:    v_add_f64 v[12:13], s[28:29], 1.0
; SI-NEXT:    v_lshr_b64 v[33:34], v[16:17], 16
; SI-NEXT:    v_add_f64 v[10:11], s[26:27], 1.0
; SI-NEXT:    v_lshr_b64 v[34:35], v[14:15], 16
; SI-NEXT:    v_add_f64 v[8:9], s[24:25], 1.0
; SI-NEXT:    v_lshr_b64 v[35:36], v[12:13], 16
; SI-NEXT:    v_add_f64 v[6:7], s[22:23], 1.0
; SI-NEXT:    v_lshr_b64 v[36:37], v[10:11], 16
; SI-NEXT:    v_add_f64 v[4:5], s[20:21], 1.0
; SI-NEXT:    v_lshr_b64 v[37:38], v[8:9], 16
; SI-NEXT:    v_lshrrev_b32_e32 v48, 16, v19
; SI-NEXT:    v_add_f64 v[2:3], s[18:19], 1.0
; SI-NEXT:    v_lshr_b64 v[38:39], v[6:7], 16
; SI-NEXT:    v_add_f64 v[0:1], s[16:17], 1.0
; SI-NEXT:    v_mov_b32_e32 v39, v48
; SI-NEXT:    v_lshr_b64 v[48:49], v[4:5], 16
; SI-NEXT:    v_lshr_b64 v[49:50], v[2:3], 16
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v56, 16, v9
; SI-NEXT:    v_lshr_b64 v[50:51], v[0:1], 16
; SI-NEXT:    v_lshrrev_b32_e32 v52, 16, v27
; SI-NEXT:    v_lshrrev_b32_e32 v53, 16, v25
; SI-NEXT:    v_lshrrev_b32_e32 v54, 16, v23
; SI-NEXT:    v_lshrrev_b32_e32 v55, 16, v21
; SI-NEXT:    v_lshrrev_b32_e32 v40, 16, v17
; SI-NEXT:    v_lshrrev_b32_e32 v41, 16, v15
; SI-NEXT:    v_lshrrev_b32_e32 v42, 16, v13
; SI-NEXT:    v_lshrrev_b32_e32 v43, 16, v11
; SI-NEXT:    v_lshrrev_b32_e32 v44, 16, v7
; SI-NEXT:    v_lshrrev_b32_e32 v45, 16, v5
; SI-NEXT:    v_lshrrev_b32_e32 v46, 16, v3
; SI-NEXT:    v_lshrrev_b32_e32 v47, 16, v1
; SI-NEXT:    v_mov_b32_e32 v51, v56
; SI-NEXT:  .LBB49_3: ; %end
; SI-NEXT:    v_lshlrev_b32_e32 v50, 16, v50
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT:    v_lshlrev_b32_e32 v49, 16, v49
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT:    v_lshlrev_b32_e32 v48, 16, v48
; SI-NEXT:    v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT:    v_lshlrev_b32_e32 v38, 16, v38
; SI-NEXT:    v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT:    v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT:    v_lshlrev_b32_e32 v36, 16, v36
; SI-NEXT:    v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; SI-NEXT:    v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT:    v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT:    v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; SI-NEXT:    v_or_b32_e32 v0, v0, v50
; SI-NEXT:    v_lshlrev_b32_e32 v50, 16, v47
; SI-NEXT:    v_or_b32_e32 v2, v2, v49
; SI-NEXT:    v_lshlrev_b32_e32 v49, 16, v46
; SI-NEXT:    v_or_b32_e32 v4, v4, v48
; SI-NEXT:    v_lshlrev_b32_e32 v48, 16, v45
; SI-NEXT:    v_or_b32_e32 v6, v6, v38
; SI-NEXT:    v_lshlrev_b32_e32 v38, 16, v44
; SI-NEXT:    v_or_b32_e32 v10, v10, v36
; SI-NEXT:    v_lshlrev_b32_e32 v36, 16, v43
; SI-NEXT:    v_or_b32_e32 v12, v12, v35
; SI-NEXT:    v_lshlrev_b32_e32 v35, 16, v42
; SI-NEXT:    v_or_b32_e32 v14, v14, v34
; SI-NEXT:    v_lshlrev_b32_e32 v34, 16, v41
; SI-NEXT:    v_or_b32_e32 v16, v16, v33
; SI-NEXT:    v_lshlrev_b32_e32 v33, 16, v40
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    buffer_load_dword v56, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; SI-NEXT:    v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT:    v_lshlrev_b32_e32 v37, 16, v37
; SI-NEXT:    v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT:    v_lshlrev_b32_e32 v32, 16, v32
; SI-NEXT:    v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT:    v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT:    v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; SI-NEXT:    v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; SI-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT:    v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT:    v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT:    v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT:    v_or_b32_e32 v8, v8, v37
; SI-NEXT:    v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT:    v_lshlrev_b32_e32 v37, 16, v51
; SI-NEXT:    v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT:    v_and_b32_e32 v13, 0xffff, v13
; SI-NEXT:    v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT:    v_and_b32_e32 v17, 0xffff, v17
; SI-NEXT:    v_or_b32_e32 v18, v18, v32
; SI-NEXT:    v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT:    v_lshlrev_b32_e32 v32, 16, v39
; SI-NEXT:    v_or_b32_e32 v20, v20, v31
; SI-NEXT:    v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT:    v_lshlrev_b32_e32 v31, 16, v55
; SI-NEXT:    v_or_b32_e32 v22, v22, v30
; SI-NEXT:    v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v54
; SI-NEXT:    v_or_b32_e32 v24, v24, v29
; SI-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v53
; SI-NEXT:    v_or_b32_e32 v26, v26, v28
; SI-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v52
; SI-NEXT:    v_readlane_b32 s30, v57, 8
; SI-NEXT:    v_or_b32_e32 v1, v1, v50
; SI-NEXT:    v_or_b32_e32 v3, v3, v49
; SI-NEXT:    v_or_b32_e32 v5, v5, v48
; SI-NEXT:    v_or_b32_e32 v7, v7, v38
; SI-NEXT:    v_or_b32_e32 v9, v9, v37
; SI-NEXT:    v_or_b32_e32 v11, v11, v36
; SI-NEXT:    v_or_b32_e32 v13, v13, v35
; SI-NEXT:    v_or_b32_e32 v15, v15, v34
; SI-NEXT:    v_or_b32_e32 v17, v17, v33
; SI-NEXT:    v_or_b32_e32 v19, v19, v32
; SI-NEXT:    v_or_b32_e32 v21, v21, v31
; SI-NEXT:    v_or_b32_e32 v23, v23, v30
; SI-NEXT:    v_or_b32_e32 v25, v25, v29
; SI-NEXT:    v_or_b32_e32 v27, v27, v28
; SI-NEXT:    v_readlane_b32 s31, v57, 9
; SI-NEXT:    v_readlane_b32 s49, v57, 7
; SI-NEXT:    v_readlane_b32 s48, v57, 6
; SI-NEXT:    v_readlane_b32 s39, v57, 5
; SI-NEXT:    v_readlane_b32 s38, v57, 4
; SI-NEXT:    v_readlane_b32 s37, v57, 3
; SI-NEXT:    v_readlane_b32 s36, v57, 2
; SI-NEXT:    v_readlane_b32 s35, v57, 1
; SI-NEXT:    v_readlane_b32 s34, v57, 0
; SI-NEXT:    s_or_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_load_dword v57, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v14f64_to_v56i16_scalar:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    v_readfirstlane_b32 s4, v14
; VI-NEXT:    v_readfirstlane_b32 s41, v13
; VI-NEXT:    v_readfirstlane_b32 s40, v12
; VI-NEXT:    v_readfirstlane_b32 s15, v11
; VI-NEXT:    v_readfirstlane_b32 s14, v10
; VI-NEXT:    v_readfirstlane_b32 s13, v9
; VI-NEXT:    v_readfirstlane_b32 s12, v8
; VI-NEXT:    v_readfirstlane_b32 s11, v7
; VI-NEXT:    v_readfirstlane_b32 s10, v6
; VI-NEXT:    v_readfirstlane_b32 s9, v5
; VI-NEXT:    v_readfirstlane_b32 s8, v4
; VI-NEXT:    v_readfirstlane_b32 s7, v3
; VI-NEXT:    v_readfirstlane_b32 s6, v2
; VI-NEXT:    v_readfirstlane_b32 s5, v1
; VI-NEXT:    s_cmp_lg_u32 s4, 0
; VI-NEXT:    v_readfirstlane_b32 s4, v0
; VI-NEXT:    s_cbranch_scc0 .LBB49_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    s_lshr_b32 s42, s41, 16
; VI-NEXT:    s_lshr_b32 s43, s40, 16
; VI-NEXT:    s_lshr_b32 s44, s15, 16
; VI-NEXT:    s_lshr_b32 s45, s14, 16
; VI-NEXT:    s_lshr_b32 s46, s13, 16
; VI-NEXT:    s_lshr_b32 s47, s12, 16
; VI-NEXT:    s_lshr_b32 s56, s11, 16
; VI-NEXT:    s_lshr_b32 s57, s10, 16
; VI-NEXT:    s_lshr_b32 s58, s9, 16
; VI-NEXT:    s_lshr_b32 s59, s8, 16
; VI-NEXT:    s_lshr_b32 s60, s7, 16
; VI-NEXT:    s_lshr_b32 s61, s6, 16
; VI-NEXT:    s_lshr_b32 s62, s5, 16
; VI-NEXT:    s_lshr_b32 s63, s4, 16
; VI-NEXT:    s_lshr_b32 s72, s29, 16
; VI-NEXT:    s_lshr_b32 s73, s28, 16
; VI-NEXT:    s_lshr_b32 s74, s27, 16
; VI-NEXT:    s_lshr_b32 s75, s26, 16
; VI-NEXT:    s_lshr_b32 s76, s25, 16
; VI-NEXT:    s_lshr_b32 s77, s24, 16
; VI-NEXT:    s_lshr_b32 s78, s23, 16
; VI-NEXT:    s_lshr_b32 s79, s22, 16
; VI-NEXT:    s_lshr_b32 s88, s21, 16
; VI-NEXT:    s_lshr_b32 s89, s20, 16
; VI-NEXT:    s_lshr_b32 s90, s19, 16
; VI-NEXT:    s_lshr_b32 s91, s18, 16
; VI-NEXT:    s_lshr_b32 vcc_lo, s17, 16
; VI-NEXT:    s_lshr_b32 vcc_hi, s16, 16
; VI-NEXT:    v_mov_b32_e32 v0, s16
; VI-NEXT:    v_mov_b32_e32 v2, s18
; VI-NEXT:    v_mov_b32_e32 v4, s20
; VI-NEXT:    v_mov_b32_e32 v6, s22
; VI-NEXT:    v_mov_b32_e32 v8, s24
; VI-NEXT:    v_mov_b32_e32 v10, s26
; VI-NEXT:    v_mov_b32_e32 v12, s28
; VI-NEXT:    v_mov_b32_e32 v14, s4
; VI-NEXT:    v_mov_b32_e32 v16, s6
; VI-NEXT:    v_mov_b32_e32 v18, s8
; VI-NEXT:    v_mov_b32_e32 v20, s10
; VI-NEXT:    v_mov_b32_e32 v22, s12
; VI-NEXT:    v_mov_b32_e32 v24, s14
; VI-NEXT:    v_mov_b32_e32 v26, s40
; VI-NEXT:    v_mov_b32_e32 v1, s17
; VI-NEXT:    v_mov_b32_e32 v3, s19
; VI-NEXT:    v_mov_b32_e32 v5, s21
; VI-NEXT:    v_mov_b32_e32 v7, s23
; VI-NEXT:    v_mov_b32_e32 v9, s25
; VI-NEXT:    v_mov_b32_e32 v11, s27
; VI-NEXT:    v_mov_b32_e32 v13, s29
; VI-NEXT:    v_mov_b32_e32 v15, s5
; VI-NEXT:    v_mov_b32_e32 v17, s7
; VI-NEXT:    v_mov_b32_e32 v19, s9
; VI-NEXT:    v_mov_b32_e32 v21, s11
; VI-NEXT:    v_mov_b32_e32 v23, s13
; VI-NEXT:    v_mov_b32_e32 v25, s15
; VI-NEXT:    v_mov_b32_e32 v27, s41
; VI-NEXT:    v_mov_b32_e32 v44, vcc_hi
; VI-NEXT:    v_mov_b32_e32 v42, s91
; VI-NEXT:    v_mov_b32_e32 v41, s89
; VI-NEXT:    v_mov_b32_e32 v55, s79
; VI-NEXT:    v_mov_b32_e32 v54, s77
; VI-NEXT:    v_mov_b32_e32 v52, s75
; VI-NEXT:    v_mov_b32_e32 v49, s73
; VI-NEXT:    v_mov_b32_e32 v39, s63
; VI-NEXT:    v_mov_b32_e32 v38, s61
; VI-NEXT:    v_mov_b32_e32 v35, s59
; VI-NEXT:    v_mov_b32_e32 v33, s57
; VI-NEXT:    v_mov_b32_e32 v30, s47
; VI-NEXT:    v_mov_b32_e32 v29, s45
; VI-NEXT:    v_mov_b32_e32 v28, s43
; VI-NEXT:    v_mov_b32_e32 v47, vcc_lo
; VI-NEXT:    v_mov_b32_e32 v46, s90
; VI-NEXT:    v_mov_b32_e32 v45, s88
; VI-NEXT:    v_mov_b32_e32 v43, s78
; VI-NEXT:    v_mov_b32_e32 v40, s76
; VI-NEXT:    v_mov_b32_e32 v53, s74
; VI-NEXT:    v_mov_b32_e32 v51, s72
; VI-NEXT:    v_mov_b32_e32 v50, s62
; VI-NEXT:    v_mov_b32_e32 v48, s60
; VI-NEXT:    v_mov_b32_e32 v37, s58
; VI-NEXT:    v_mov_b32_e32 v36, s56
; VI-NEXT:    v_mov_b32_e32 v34, s46
; VI-NEXT:    v_mov_b32_e32 v32, s44
; VI-NEXT:    v_mov_b32_e32 v31, s42
; VI-NEXT:    s_branch .LBB49_3
; VI-NEXT:  .LBB49_2: ; %cmp.true
; VI-NEXT:    v_add_f64 v[26:27], s[40:41], 1.0
; VI-NEXT:    v_add_f64 v[24:25], s[14:15], 1.0
; VI-NEXT:    v_add_f64 v[22:23], s[12:13], 1.0
; VI-NEXT:    v_add_f64 v[20:21], s[10:11], 1.0
; VI-NEXT:    v_add_f64 v[18:19], s[8:9], 1.0
; VI-NEXT:    v_add_f64 v[16:17], s[6:7], 1.0
; VI-NEXT:    v_add_f64 v[14:15], s[4:5], 1.0
; VI-NEXT:    v_add_f64 v[12:13], s[28:29], 1.0
; VI-NEXT:    v_add_f64 v[10:11], s[26:27], 1.0
; VI-NEXT:    v_add_f64 v[8:9], s[24:25], 1.0
; VI-NEXT:    v_add_f64 v[6:7], s[22:23], 1.0
; VI-NEXT:    v_add_f64 v[4:5], s[20:21], 1.0
; VI-NEXT:    v_add_f64 v[2:3], s[18:19], 1.0
; VI-NEXT:    v_add_f64 v[0:1], s[16:17], 1.0
; VI-NEXT:    v_lshrrev_b32_e32 v31, 16, v27
; VI-NEXT:    v_lshrrev_b32_e32 v28, 16, v26
; VI-NEXT:    v_lshrrev_b32_e32 v32, 16, v25
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v24
; VI-NEXT:    v_lshrrev_b32_e32 v34, 16, v23
; VI-NEXT:    v_lshrrev_b32_e32 v30, 16, v22
; VI-NEXT:    v_lshrrev_b32_e32 v36, 16, v21
; VI-NEXT:    v_lshrrev_b32_e32 v33, 16, v20
; VI-NEXT:    v_lshrrev_b32_e32 v37, 16, v19
; VI-NEXT:    v_lshrrev_b32_e32 v35, 16, v18
; VI-NEXT:    v_lshrrev_b32_e32 v48, 16, v17
; VI-NEXT:    v_lshrrev_b32_e32 v38, 16, v16
; VI-NEXT:    v_lshrrev_b32_e32 v50, 16, v15
; VI-NEXT:    v_lshrrev_b32_e32 v39, 16, v14
; VI-NEXT:    v_lshrrev_b32_e32 v51, 16, v13
; VI-NEXT:    v_lshrrev_b32_e32 v49, 16, v12
; VI-NEXT:    v_lshrrev_b32_e32 v53, 16, v11
; VI-NEXT:    v_lshrrev_b32_e32 v52, 16, v10
; VI-NEXT:    v_lshrrev_b32_e32 v40, 16, v9
; VI-NEXT:    v_lshrrev_b32_e32 v54, 16, v8
; VI-NEXT:    v_lshrrev_b32_e32 v43, 16, v7
; VI-NEXT:    v_lshrrev_b32_e32 v55, 16, v6
; VI-NEXT:    v_lshrrev_b32_e32 v45, 16, v5
; VI-NEXT:    v_lshrrev_b32_e32 v41, 16, v4
; VI-NEXT:    v_lshrrev_b32_e32 v46, 16, v3
; VI-NEXT:    v_lshrrev_b32_e32 v42, 16, v2
; VI-NEXT:    v_lshrrev_b32_e32 v47, 16, v1
; VI-NEXT:    v_lshrrev_b32_e32 v44, 16, v0
; VI-NEXT:  .LBB49_3: ; %end
; VI-NEXT:    v_lshlrev_b32_e32 v44, 16, v44
; VI-NEXT:    v_lshlrev_b32_e32 v42, 16, v42
; VI-NEXT:    v_lshlrev_b32_e32 v41, 16, v41
; VI-NEXT:    v_or_b32_sdwa v0, v0, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v44, 16, v47
; VI-NEXT:    v_or_b32_sdwa v2, v2, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v42, 16, v46
; VI-NEXT:    v_or_b32_sdwa v4, v4, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v41, 16, v45
; VI-NEXT:    v_lshlrev_b32_e32 v55, 16, v55
; VI-NEXT:    v_lshlrev_b32_e32 v54, 16, v54
; VI-NEXT:    v_or_b32_sdwa v1, v1, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v3, v3, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v5, v5, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v6, v6, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v55, 16, v43
; VI-NEXT:    v_or_b32_sdwa v8, v8, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v54, 16, v40
; VI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; VI-NEXT:    v_lshlrev_b32_e32 v52, 16, v52
; VI-NEXT:    v_lshlrev_b32_e32 v49, 16, v49
; VI-NEXT:    v_lshlrev_b32_e32 v39, 16, v39
; VI-NEXT:    v_lshlrev_b32_e32 v38, 16, v38
; VI-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; VI-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; VI-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; VI-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; VI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; VI-NEXT:    v_or_b32_sdwa v10, v10, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v52, 16, v53
; VI-NEXT:    v_or_b32_sdwa v12, v12, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v49, 16, v51
; VI-NEXT:    v_or_b32_sdwa v14, v14, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v39, 16, v50
; VI-NEXT:    v_or_b32_sdwa v16, v16, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v38, 16, v48
; VI-NEXT:    v_or_b32_sdwa v18, v18, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v35, 16, v37
; VI-NEXT:    v_or_b32_sdwa v20, v20, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v33, 16, v36
; VI-NEXT:    v_or_b32_sdwa v22, v22, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v30, 16, v34
; VI-NEXT:    v_or_b32_sdwa v24, v24, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v29, 16, v32
; VI-NEXT:    v_or_b32_sdwa v26, v26, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v28, 16, v31
; VI-NEXT:    v_or_b32_sdwa v7, v7, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v9, v9, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v11, v11, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v13, v13, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v15, v15, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v17, v17, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v19, v19, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v21, v21, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v23, v23, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v25, v25, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v14f64_to_v56i16_scalar:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    v_readfirstlane_b32 s4, v14
; GFX9-NEXT:    v_readfirstlane_b32 s41, v13
; GFX9-NEXT:    v_readfirstlane_b32 s40, v12
; GFX9-NEXT:    v_readfirstlane_b32 s15, v11
; GFX9-NEXT:    v_readfirstlane_b32 s14, v10
; GFX9-NEXT:    v_readfirstlane_b32 s13, v9
; GFX9-NEXT:    v_readfirstlane_b32 s12, v8
; GFX9-NEXT:    v_readfirstlane_b32 s11, v7
; GFX9-NEXT:    v_readfirstlane_b32 s10, v6
; GFX9-NEXT:    v_readfirstlane_b32 s9, v5
; GFX9-NEXT:    v_readfirstlane_b32 s8, v4
; GFX9-NEXT:    v_readfirstlane_b32 s7, v3
; GFX9-NEXT:    v_readfirstlane_b32 s6, v2
; GFX9-NEXT:    v_readfirstlane_b32 s5, v1
; GFX9-NEXT:    s_cmp_lg_u32 s4, 0
; GFX9-NEXT:    v_readfirstlane_b32 s4, v0
; GFX9-NEXT:    s_cbranch_scc0 .LBB49_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    s_lshr_b32 s42, s41, 16
; GFX9-NEXT:    s_lshr_b32 s43, s40, 16
; GFX9-NEXT:    s_lshr_b32 s44, s15, 16
; GFX9-NEXT:    s_lshr_b32 s45, s14, 16
; GFX9-NEXT:    s_lshr_b32 s46, s13, 16
; GFX9-NEXT:    s_lshr_b32 s47, s12, 16
; GFX9-NEXT:    s_lshr_b32 s56, s11, 16
; GFX9-NEXT:    s_lshr_b32 s57, s10, 16
; GFX9-NEXT:    s_lshr_b32 s58, s9, 16
; GFX9-NEXT:    s_lshr_b32 s59, s8, 16
; GFX9-NEXT:    s_lshr_b32 s60, s7, 16
; GFX9-NEXT:    s_lshr_b32 s61, s6, 16
; GFX9-NEXT:    s_lshr_b32 s62, s5, 16
; GFX9-NEXT:    s_lshr_b32 s63, s4, 16
; GFX9-NEXT:    s_lshr_b32 s72, s29, 16
; GFX9-NEXT:    s_lshr_b32 s73, s28, 16
; GFX9-NEXT:    s_lshr_b32 s74, s27, 16
; GFX9-NEXT:    s_lshr_b32 s75, s26, 16
; GFX9-NEXT:    s_lshr_b32 s76, s25, 16
; GFX9-NEXT:    s_lshr_b32 s77, s24, 16
; GFX9-NEXT:    s_lshr_b32 s78, s23, 16
; GFX9-NEXT:    s_lshr_b32 s79, s22, 16
; GFX9-NEXT:    s_lshr_b32 s88, s21, 16
; GFX9-NEXT:    s_lshr_b32 s89, s20, 16
; GFX9-NEXT:    s_lshr_b32 s90, s19, 16
; GFX9-NEXT:    s_lshr_b32 s91, s18, 16
; GFX9-NEXT:    s_lshr_b32 s92, s17, 16
; GFX9-NEXT:    s_lshr_b32 s93, s16, 16
; GFX9-NEXT:    v_mov_b32_e32 v0, s16
; GFX9-NEXT:    v_mov_b32_e32 v2, s18
; GFX9-NEXT:    v_mov_b32_e32 v4, s20
; GFX9-NEXT:    v_mov_b32_e32 v6, s22
; GFX9-NEXT:    v_mov_b32_e32 v8, s24
; GFX9-NEXT:    v_mov_b32_e32 v10, s26
; GFX9-NEXT:    v_mov_b32_e32 v12, s28
; GFX9-NEXT:    v_mov_b32_e32 v14, s4
; GFX9-NEXT:    v_mov_b32_e32 v16, s6
; GFX9-NEXT:    v_mov_b32_e32 v18, s8
; GFX9-NEXT:    v_mov_b32_e32 v20, s10
; GFX9-NEXT:    v_mov_b32_e32 v22, s12
; GFX9-NEXT:    v_mov_b32_e32 v24, s14
; GFX9-NEXT:    v_mov_b32_e32 v26, s40
; GFX9-NEXT:    v_mov_b32_e32 v1, s17
; GFX9-NEXT:    v_mov_b32_e32 v3, s19
; GFX9-NEXT:    v_mov_b32_e32 v5, s21
; GFX9-NEXT:    v_mov_b32_e32 v7, s23
; GFX9-NEXT:    v_mov_b32_e32 v9, s25
; GFX9-NEXT:    v_mov_b32_e32 v11, s27
; GFX9-NEXT:    v_mov_b32_e32 v13, s29
; GFX9-NEXT:    v_mov_b32_e32 v15, s5
; GFX9-NEXT:    v_mov_b32_e32 v17, s7
; GFX9-NEXT:    v_mov_b32_e32 v19, s9
; GFX9-NEXT:    v_mov_b32_e32 v21, s11
; GFX9-NEXT:    v_mov_b32_e32 v23, s13
; GFX9-NEXT:    v_mov_b32_e32 v25, s15
; GFX9-NEXT:    v_mov_b32_e32 v27, s41
; GFX9-NEXT:    v_mov_b32_e32 v44, s93
; GFX9-NEXT:    v_mov_b32_e32 v42, s91
; GFX9-NEXT:    v_mov_b32_e32 v41, s89
; GFX9-NEXT:    v_mov_b32_e32 v55, s79
; GFX9-NEXT:    v_mov_b32_e32 v54, s77
; GFX9-NEXT:    v_mov_b32_e32 v52, s75
; GFX9-NEXT:    v_mov_b32_e32 v49, s73
; GFX9-NEXT:    v_mov_b32_e32 v39, s63
; GFX9-NEXT:    v_mov_b32_e32 v38, s61
; GFX9-NEXT:    v_mov_b32_e32 v35, s59
; GFX9-NEXT:    v_mov_b32_e32 v33, s57
; GFX9-NEXT:    v_mov_b32_e32 v30, s47
; GFX9-NEXT:    v_mov_b32_e32 v29, s45
; GFX9-NEXT:    v_mov_b32_e32 v28, s43
; GFX9-NEXT:    v_mov_b32_e32 v47, s92
; GFX9-NEXT:    v_mov_b32_e32 v46, s90
; GFX9-NEXT:    v_mov_b32_e32 v45, s88
; GFX9-NEXT:    v_mov_b32_e32 v43, s78
; GFX9-NEXT:    v_mov_b32_e32 v40, s76
; GFX9-NEXT:    v_mov_b32_e32 v53, s74
; GFX9-NEXT:    v_mov_b32_e32 v51, s72
; GFX9-NEXT:    v_mov_b32_e32 v50, s62
; GFX9-NEXT:    v_mov_b32_e32 v48, s60
; GFX9-NEXT:    v_mov_b32_e32 v37, s58
; GFX9-NEXT:    v_mov_b32_e32 v36, s56
; GFX9-NEXT:    v_mov_b32_e32 v34, s46
; GFX9-NEXT:    v_mov_b32_e32 v32, s44
; GFX9-NEXT:    v_mov_b32_e32 v31, s42
; GFX9-NEXT:    s_branch .LBB49_3
; GFX9-NEXT:  .LBB49_2: ; %cmp.true
; GFX9-NEXT:    v_add_f64 v[26:27], s[40:41], 1.0
; GFX9-NEXT:    v_add_f64 v[24:25], s[14:15], 1.0
; GFX9-NEXT:    v_add_f64 v[22:23], s[12:13], 1.0
; GFX9-NEXT:    v_add_f64 v[20:21], s[10:11], 1.0
; GFX9-NEXT:    v_add_f64 v[18:19], s[8:9], 1.0
; GFX9-NEXT:    v_add_f64 v[16:17], s[6:7], 1.0
; GFX9-NEXT:    v_add_f64 v[14:15], s[4:5], 1.0
; GFX9-NEXT:    v_add_f64 v[12:13], s[28:29], 1.0
; GFX9-NEXT:    v_add_f64 v[10:11], s[26:27], 1.0
; GFX9-NEXT:    v_add_f64 v[8:9], s[24:25], 1.0
; GFX9-NEXT:    v_add_f64 v[6:7], s[22:23], 1.0
; GFX9-NEXT:    v_add_f64 v[4:5], s[20:21], 1.0
; GFX9-NEXT:    v_add_f64 v[2:3], s[18:19], 1.0
; GFX9-NEXT:    v_add_f64 v[0:1], s[16:17], 1.0
; GFX9-NEXT:    v_lshrrev_b32_e32 v31, 16, v27
; GFX9-NEXT:    v_lshrrev_b32_e32 v28, 16, v26
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v25
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v24
; GFX9-NEXT:    v_lshrrev_b32_e32 v34, 16, v23
; GFX9-NEXT:    v_lshrrev_b32_e32 v30, 16, v22
; GFX9-NEXT:    v_lshrrev_b32_e32 v36, 16, v21
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v20
; GFX9-NEXT:    v_lshrrev_b32_e32 v37, 16, v19
; GFX9-NEXT:    v_lshrrev_b32_e32 v35, 16, v18
; GFX9-NEXT:    v_lshrrev_b32_e32 v48, 16, v17
; GFX9-NEXT:    v_lshrrev_b32_e32 v38, 16, v16
; GFX9-NEXT:    v_lshrrev_b32_e32 v50, 16, v15
; GFX9-NEXT:    v_lshrrev_b32_e32 v39, 16, v14
; GFX9-NEXT:    v_lshrrev_b32_e32 v51, 16, v13
; GFX9-NEXT:    v_lshrrev_b32_e32 v49, 16, v12
; GFX9-NEXT:    v_lshrrev_b32_e32 v53, 16, v11
; GFX9-NEXT:    v_lshrrev_b32_e32 v52, 16, v10
; GFX9-NEXT:    v_lshrrev_b32_e32 v40, 16, v9
; GFX9-NEXT:    v_lshrrev_b32_e32 v54, 16, v8
; GFX9-NEXT:    v_lshrrev_b32_e32 v43, 16, v7
; GFX9-NEXT:    v_lshrrev_b32_e32 v55, 16, v6
; GFX9-NEXT:    v_lshrrev_b32_e32 v45, 16, v5
; GFX9-NEXT:    v_lshrrev_b32_e32 v41, 16, v4
; GFX9-NEXT:    v_lshrrev_b32_e32 v46, 16, v3
; GFX9-NEXT:    v_lshrrev_b32_e32 v42, 16, v2
; GFX9-NEXT:    v_lshrrev_b32_e32 v47, 16, v1
; GFX9-NEXT:    v_lshrrev_b32_e32 v44, 16, v0
; GFX9-NEXT:  .LBB49_3: ; %end
; GFX9-NEXT:    v_lshlrev_b32_e32 v44, 16, v44
; GFX9-NEXT:    v_lshlrev_b32_e32 v42, 16, v42
; GFX9-NEXT:    v_lshlrev_b32_e32 v41, 16, v41
; GFX9-NEXT:    v_or_b32_sdwa v0, v44, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_lshlrev_b32_e32 v44, 16, v47
; GFX9-NEXT:    v_or_b32_sdwa v2, v42, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_lshlrev_b32_e32 v42, 16, v46
; GFX9-NEXT:    v_or_b32_sdwa v4, v41, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_lshlrev_b32_e32 v41, 16, v45
; GFX9-NEXT:    v_lshlrev_b32_e32 v55, 16, v55
; GFX9-NEXT:    v_lshlrev_b32_e32 v54, 16, v54
; GFX9-NEXT:    v_or_b32_sdwa v1, v44, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v3, v42, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v5, v41, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v6, v55, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_lshlrev_b32_e32 v55, 16, v43
; GFX9-NEXT:    v_or_b32_sdwa v8, v54, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_lshlrev_b32_e32 v54, 16, v40
; GFX9-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; GFX9-NEXT:    v_lshlrev_b32_e32 v52, 16, v52
; GFX9-NEXT:    v_lshlrev_b32_e32 v49, 16, v49
; GFX9-NEXT:    v_lshlrev_b32_e32 v39, 16, v39
; GFX9-NEXT:    v_lshlrev_b32_e32 v38, 16, v38
; GFX9-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; GFX9-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; GFX9-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; GFX9-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; GFX9-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; GFX9-NEXT:    v_or_b32_sdwa v10, v52, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_lshlrev_b32_e32 v52, 16, v53
; GFX9-NEXT:    v_or_b32_sdwa v12, v49, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_lshlrev_b32_e32 v49, 16, v51
; GFX9-NEXT:    v_or_b32_sdwa v14, v39, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_lshlrev_b32_e32 v39, 16, v50
; GFX9-NEXT:    v_or_b32_sdwa v16, v38, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_lshlrev_b32_e32 v38, 16, v48
; GFX9-NEXT:    v_or_b32_sdwa v18, v35, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_lshlrev_b32_e32 v35, 16, v37
; GFX9-NEXT:    v_or_b32_sdwa v20, v33, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_lshlrev_b32_e32 v33, 16, v36
; GFX9-NEXT:    v_or_b32_sdwa v22, v30, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_lshlrev_b32_e32 v30, 16, v34
; GFX9-NEXT:    v_or_b32_sdwa v24, v29, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_lshlrev_b32_e32 v29, 16, v32
; GFX9-NEXT:    v_or_b32_sdwa v26, v28, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_lshlrev_b32_e32 v28, 16, v31
; GFX9-NEXT:    v_or_b32_sdwa v7, v55, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v9, v54, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v11, v52, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v13, v49, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v15, v39, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v17, v38, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v19, v35, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v21, v33, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v23, v30, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v25, v29, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v27, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-TRUE16-LABEL: bitcast_v14f64_to_v56i16_scalar:
; GFX11-TRUE16:       ; %bb.0:
; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s14, v10
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s13, v9
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s12, v8
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s11, v7
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s10, v6
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s9, v5
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s8, v4
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s5, v3
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s4, v2
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s7, v1
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s6, v0
; GFX11-TRUE16-NEXT:    s_cmp_lg_u32 s14, 0
; GFX11-TRUE16-NEXT:    s_cbranch_scc0 .LBB49_2
; GFX11-TRUE16-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-TRUE16-NEXT:    s_lshr_b32 s14, s13, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s15, s12, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s40, s11, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s41, s10, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s42, s9, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s43, s8, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s44, s5, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s45, s4, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s46, s7, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s47, s6, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s56, s29, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s57, s28, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s58, s27, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s59, s26, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s60, s25, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s61, s24, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s62, s23, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s63, s22, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s72, s21, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s73, s20, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s74, s19, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s75, s18, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s76, s17, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s77, s16, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s78, s3, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s79, s2, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s88, s1, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s89, s0, 16
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v18, s6 :: v_dual_mov_b32 v19, s7
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v21, s5
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v22, s8 :: v_dual_mov_b32 v23, s9
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v24, s10 :: v_dual_mov_b32 v25, s11
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v26, s12 :: v_dual_mov_b32 v27, s13
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v69, s89 :: v_dual_mov_b32 v30, s41
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v67, s79 :: v_dual_mov_b32 v70, s78
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v65, s77 :: v_dual_mov_b32 v68, s76
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v55, s75 :: v_dual_mov_b32 v66, s74
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v53, s73 :: v_dual_mov_b32 v64, s72
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v51, s63 :: v_dual_mov_b32 v54, s62
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v49, s61 :: v_dual_mov_b32 v52, s60
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v39, s59 :: v_dual_mov_b32 v50, s58
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v37, s57 :: v_dual_mov_b32 v48, s56
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v35, s47 :: v_dual_mov_b32 v38, s46
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v33, s45 :: v_dual_mov_b32 v36, s44
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v31, s43 :: v_dual_mov_b32 v34, s42
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v29, s15 :: v_dual_mov_b32 v32, s40
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v71, s88 :: v_dual_mov_b32 v28, s14
; GFX11-TRUE16-NEXT:    s_branch .LBB49_3
; GFX11-TRUE16-NEXT:  .LBB49_2: ; %cmp.true
; GFX11-TRUE16-NEXT:    v_add_f64 v[26:27], s[12:13], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[24:25], s[10:11], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[22:23], s[8:9], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[20:21], s[4:5], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[18:19], s[6:7], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[16:17], s[28:29], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[14:15], s[26:27], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[12:13], s[24:25], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[10:11], s[22:23], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[8:9], s[20:21], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[6:7], s[18:19], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[4:5], s[16:17], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[2:3], s[2:3], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[0:1], s[0:1], 1.0
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v25
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v24
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v23
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v22
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v21
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v20
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v19
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v18
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v17
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v16
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v15
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v14
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v13
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v12
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v11
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v10
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v9
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v8
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v7
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v6
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v5
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v4
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v3
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v2
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v1
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v0
; GFX11-TRUE16-NEXT:  .LBB49_3: ; %end
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v0.h, v69.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v1.h, v71.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v2.h, v67.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v3.h, v70.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v4.h, v65.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v5.h, v68.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v6.h, v55.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v7.h, v66.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v8.h, v53.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v9.h, v64.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v10.h, v51.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v11.h, v54.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v12.h, v49.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v13.h, v52.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v14.h, v39.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v15.h, v50.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v16.h, v37.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v17.h, v48.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v18.h, v35.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v19.h, v38.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v20.h, v33.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v21.h, v36.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v22.h, v31.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v23.h, v34.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v24.h, v30.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v25.h, v32.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v26.h, v29.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v27.h, v28.l
; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v14f64_to_v56i16_scalar:
; GFX11-FAKE16:       ; %bb.0:
; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s14, v10
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s13, v9
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s12, v8
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s11, v7
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s10, v6
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s9, v5
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s8, v4
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s5, v3
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s4, v2
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s7, v1
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s6, v0
; GFX11-FAKE16-NEXT:    s_cmp_lg_u32 s14, 0
; GFX11-FAKE16-NEXT:    s_cbranch_scc0 .LBB49_2
; GFX11-FAKE16-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-FAKE16-NEXT:    s_lshr_b32 s14, s13, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s15, s12, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s40, s11, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s41, s10, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s42, s9, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s43, s8, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s44, s5, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s45, s4, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s46, s7, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s47, s6, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s56, s29, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s57, s28, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s58, s27, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s59, s26, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s60, s25, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s61, s24, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s62, s23, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s63, s22, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s72, s21, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s73, s20, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s74, s19, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s75, s18, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s76, s17, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s77, s16, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s78, s3, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s79, s2, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s88, s1, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s89, s0, 16
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v31, s2
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v5, s16 :: v_dual_mov_b32 v10, s20
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v3, s18 :: v_dual_mov_b32 v8, s22
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v29, s24 :: v_dual_mov_b32 v20, s6
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v15, s26 :: v_dual_mov_b32 v18, s4
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v13, s28 :: v_dual_mov_b32 v32, s3
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v27, s8 :: v_dual_mov_b32 v6, s17
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v25, s10 :: v_dual_mov_b32 v4, s19
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v23, s12 :: v_dual_mov_b32 v30, s25
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v16, s27
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v11, s21 :: v_dual_mov_b32 v14, s29
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v9, s23 :: v_dual_mov_b32 v28, s9
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v21, s7 :: v_dual_mov_b32 v26, s11
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v24, s13
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v69, s89 :: v_dual_mov_b32 v2, s79
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v66, s77 :: v_dual_mov_b32 v7, s75
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v55, s73 :: v_dual_mov_b32 v12, s61
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v53, s63 :: v_dual_mov_b32 v50, s59
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v17, s57 :: v_dual_mov_b32 v22, s43
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v39, s47 :: v_dual_mov_b32 v34, s41
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v37, s45 :: v_dual_mov_b32 v70, s78
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v33, s15 :: v_dual_mov_b32 v68, s76
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v71, s88 :: v_dual_mov_b32 v64, s62
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v67, s74 :: v_dual_mov_b32 v54, s60
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v65, s72 :: v_dual_mov_b32 v52, s58
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v51, s56 :: v_dual_mov_b32 v48, s44
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v49, s46 :: v_dual_mov_b32 v38, s42
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v36, s40 :: v_dual_mov_b32 v35, s14
; GFX11-FAKE16-NEXT:    s_branch .LBB49_3
; GFX11-FAKE16-NEXT:  .LBB49_2: ; %cmp.true
; GFX11-FAKE16-NEXT:    v_add_f64 v[23:24], s[12:13], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[25:26], s[10:11], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[27:28], s[8:9], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[18:19], s[4:5], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[20:21], s[6:7], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[13:14], s[28:29], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[15:16], s[26:27], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[29:30], s[24:25], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[8:9], s[22:23], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[10:11], s[20:21], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[3:4], s[18:19], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[5:6], s[16:17], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[31:32], s[2:3], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[0:1], s[0:1], 1.0
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v28
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v22, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v17, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v30
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v12, 16, v29
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v7, 16, v3
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v32
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v2, 16, v31
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v0
; GFX11-FAKE16-NEXT:  .LBB49_3: ; %end
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v31, 0xffff, v31
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v29, 0xffff, v29
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v5, 0xffff, v5
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v6, 0xffff, v6
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v2, v2, 16, v31
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v31, 0xffff, v32
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v12, v12, 16, v29
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v29, 0xffff, v30
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v32, 0xffff, v3
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v10, 0xffff, v10
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v3, v70, 16, v31
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v31, 0xffff, v8
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v15, 0xffff, v15
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v16, 0xffff, v16
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v30, 0xffff, v13
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v13, v54, 16, v29
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v20, 0xffff, v20
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v29, 0xffff, v18
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v0, v69, 16, v0
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v69, 0xffff, v4
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v4, v66, 16, v5
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v5, v68, 16, v6
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v6, v7, 16, v32
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v11, 0xffff, v11
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v32, 0xffff, v9
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v8, v55, 16, v10
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v10, v53, 16, v31
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v31, 0xffff, v14
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v14, v50, 16, v15
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v15, v52, 16, v16
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v16, v17, 16, v30
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v21, 0xffff, v21
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v30, 0xffff, v19
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v18, v39, 16, v20
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v20, v37, 16, v29
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v22, v22, 16, v27
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v27, 0xffff, v28
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v28, 0xffff, v23
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v29, 0xffff, v24
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v1, v71, 16, v1
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v7, v67, 16, v69
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v9, v65, 16, v11
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v11, v64, 16, v32
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v17, v51, 16, v31
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v19, v49, 16, v21
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v21, v48, 16, v30
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v23, v38, 16, v27
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v24, v34, 16, v25
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v25, v36, 16, v26
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v26, v33, 16, v28
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v27, v35, 16, v29
; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = fadd <14 x double> %a, splat (double 1.000000e+00)
  %a2 = bitcast <14 x double> %a1 to <56 x i16>
  br label %end

cmp.false:
  %a3 = bitcast <14 x double> %a to <56 x i16>
  br label %end

end:
  %phi = phi <56 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <56 x i16> %phi
}

define <14 x double> @bitcast_v56i16_to_v14f64(<56 x i16> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v56i16_to_v14f64:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    v_mov_b32_e32 v37, v22
; SI-NEXT:    v_mov_b32_e32 v38, v21
; SI-NEXT:    v_mov_b32_e32 v39, v20
; SI-NEXT:    v_mov_b32_e32 v48, v19
; SI-NEXT:    v_mov_b32_e32 v49, v18
; SI-NEXT:    v_mov_b32_e32 v50, v17
; SI-NEXT:    v_mov_b32_e32 v51, v16
; SI-NEXT:    v_mov_b32_e32 v52, v15
; SI-NEXT:    v_mov_b32_e32 v53, v14
; SI-NEXT:    v_mov_b32_e32 v54, v13
; SI-NEXT:    v_mov_b32_e32 v55, v12
; SI-NEXT:    v_mov_b32_e32 v40, v11
; SI-NEXT:    v_mov_b32_e32 v41, v10
; SI-NEXT:    v_mov_b32_e32 v42, v9
; SI-NEXT:    v_mov_b32_e32 v43, v8
; SI-NEXT:    v_mov_b32_e32 v44, v7
; SI-NEXT:    v_mov_b32_e32 v45, v6
; SI-NEXT:    v_mov_b32_e32 v46, v5
; SI-NEXT:    v_mov_b32_e32 v47, v4
; SI-NEXT:    v_mov_b32_e32 v56, v3
; SI-NEXT:    s_waitcnt expcnt(6)
; SI-NEXT:    v_mov_b32_e32 v57, v2
; SI-NEXT:    s_waitcnt expcnt(5)
; SI-NEXT:    v_mov_b32_e32 v58, v1
; SI-NEXT:    s_waitcnt expcnt(4)
; SI-NEXT:    v_mov_b32_e32 v59, v0
; SI-NEXT:    buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v27
; SI-NEXT:    buffer_store_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT:    v_lshrrev_b32_e32 v1, 16, v26
; SI-NEXT:    buffer_store_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT:    v_lshrrev_b32_e32 v2, 16, v25
; SI-NEXT:    buffer_store_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT:    v_lshrrev_b32_e32 v3, 16, v24
; SI-NEXT:    buffer_store_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT:    v_lshrrev_b32_e32 v4, 16, v23
; SI-NEXT:    v_lshrrev_b32_e32 v5, 16, v37
; SI-NEXT:    v_lshrrev_b32_e32 v6, 16, v38
; SI-NEXT:    v_lshrrev_b32_e32 v7, 16, v39
; SI-NEXT:    v_lshrrev_b32_e32 v8, 16, v48
; SI-NEXT:    v_lshrrev_b32_e32 v9, 16, v49
; SI-NEXT:    v_lshrrev_b32_e32 v10, 16, v50
; SI-NEXT:    v_lshrrev_b32_e32 v11, 16, v51
; SI-NEXT:    v_lshrrev_b32_e32 v12, 16, v52
; SI-NEXT:    v_lshrrev_b32_e32 v13, 16, v53
; SI-NEXT:    v_lshrrev_b32_e32 v14, 16, v54
; SI-NEXT:    v_lshrrev_b32_e32 v15, 16, v55
; SI-NEXT:    v_lshrrev_b32_e32 v16, 16, v40
; SI-NEXT:    v_lshrrev_b32_e32 v17, 16, v41
; SI-NEXT:    v_lshrrev_b32_e32 v18, 16, v42
; SI-NEXT:    v_lshrrev_b32_e32 v19, 16, v43
; SI-NEXT:    v_lshrrev_b32_e32 v20, 16, v44
; SI-NEXT:    v_lshrrev_b32_e32 v21, 16, v45
; SI-NEXT:    v_lshrrev_b32_e32 v22, 16, v46
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v23, 16, v47
; SI-NEXT:    v_lshrrev_b32_e32 v24, 16, v56
; SI-NEXT:    v_lshrrev_b32_e32 v25, 16, v57
; SI-NEXT:    v_lshrrev_b32_e32 v26, 16, v58
; SI-NEXT:    v_lshrrev_b32_e32 v27, 16, v59
; SI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT:    v_lshlrev_b32_e32 v32, 16, v27
; SI-NEXT:    v_lshlrev_b32_e32 v36, 16, v26
; SI-NEXT:    v_lshlrev_b32_e32 v61, 16, v25
; SI-NEXT:    v_lshlrev_b32_e32 v35, 16, v24
; SI-NEXT:    v_lshlrev_b32_e32 v60, 16, v23
; SI-NEXT:    v_lshlrev_b32_e32 v34, 16, v22
; SI-NEXT:    v_lshlrev_b32_e32 v63, 16, v21
; SI-NEXT:    v_lshlrev_b32_e32 v33, 16, v20
; SI-NEXT:    v_lshlrev_b32_e32 v62, 16, v19
; SI-NEXT:    v_lshlrev_b32_e32 v18, 16, v18
; SI-NEXT:    v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT:    v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT:    v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT:    v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT:    v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT:    v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT:    v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT:    v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT:    v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT:    v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT:    v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT:    v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT:    v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT:    v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
; SI-NEXT:    buffer_store_dword v18, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v17, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v16, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v13, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v11, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v10, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v9, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v8, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v7, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v6, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v5, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v4, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v3, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v2, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v1, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT:    ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB50_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v19, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT:    v_and_b32_e32 v9, 0xffff, v42
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v59
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v58
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v57
; SI-NEXT:    v_and_b32_e32 v3, 0xffff, v56
; SI-NEXT:    v_and_b32_e32 v4, 0xffff, v47
; SI-NEXT:    v_and_b32_e32 v5, 0xffff, v46
; SI-NEXT:    v_and_b32_e32 v6, 0xffff, v45
; SI-NEXT:    v_and_b32_e32 v7, 0xffff, v44
; SI-NEXT:    v_and_b32_e32 v8, 0xffff, v43
; SI-NEXT:    v_or_b32_e32 v0, v0, v32
; SI-NEXT:    v_or_b32_e32 v1, v1, v36
; SI-NEXT:    v_or_b32_e32 v2, v2, v61
; SI-NEXT:    v_or_b32_e32 v3, v3, v35
; SI-NEXT:    v_or_b32_e32 v4, v4, v60
; SI-NEXT:    v_or_b32_e32 v5, v5, v34
; SI-NEXT:    v_or_b32_e32 v6, v6, v63
; SI-NEXT:    v_or_b32_e32 v7, v7, v33
; SI-NEXT:    v_or_b32_e32 v8, v8, v62
; SI-NEXT:    ; implicit-def: $vgpr59
; SI-NEXT:    ; implicit-def: $vgpr58
; SI-NEXT:    ; implicit-def: $vgpr57
; SI-NEXT:    ; implicit-def: $vgpr56
; SI-NEXT:    ; implicit-def: $vgpr47
; SI-NEXT:    ; implicit-def: $vgpr46
; SI-NEXT:    ; implicit-def: $vgpr45
; SI-NEXT:    ; implicit-def: $vgpr44
; SI-NEXT:    ; implicit-def: $vgpr43
; SI-NEXT:    ; implicit-def: $vgpr42
; SI-NEXT:    ; implicit-def: $vgpr32
; SI-NEXT:    ; implicit-def: $vgpr36
; SI-NEXT:    ; implicit-def: $vgpr61
; SI-NEXT:    ; implicit-def: $vgpr35
; SI-NEXT:    ; implicit-def: $vgpr60
; SI-NEXT:    ; implicit-def: $vgpr34
; SI-NEXT:    ; implicit-def: $vgpr63
; SI-NEXT:    ; implicit-def: $vgpr33
; SI-NEXT:    ; implicit-def: $vgpr62
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(14)
; SI-NEXT:    v_or_b32_e32 v9, v9, v10
; SI-NEXT:    v_and_b32_e32 v10, 0xffff, v41
; SI-NEXT:    v_or_b32_e32 v10, v10, v11
; SI-NEXT:    v_and_b32_e32 v11, 0xffff, v40
; SI-NEXT:    v_or_b32_e32 v11, v11, v12
; SI-NEXT:    v_and_b32_e32 v12, 0xffff, v55
; SI-NEXT:    v_or_b32_e32 v12, v12, v13
; SI-NEXT:    v_and_b32_e32 v13, 0xffff, v54
; SI-NEXT:    v_or_b32_e32 v13, v13, v14
; SI-NEXT:    v_and_b32_e32 v14, 0xffff, v53
; SI-NEXT:    s_waitcnt vmcnt(13)
; SI-NEXT:    v_or_b32_e32 v14, v14, v15
; SI-NEXT:    v_and_b32_e32 v15, 0xffff, v52
; SI-NEXT:    s_waitcnt vmcnt(12)
; SI-NEXT:    v_or_b32_e32 v15, v15, v16
; SI-NEXT:    v_and_b32_e32 v16, 0xffff, v51
; SI-NEXT:    s_waitcnt vmcnt(11)
; SI-NEXT:    v_or_b32_e32 v16, v16, v17
; SI-NEXT:    v_and_b32_e32 v17, 0xffff, v50
; SI-NEXT:    s_waitcnt vmcnt(10)
; SI-NEXT:    v_or_b32_e32 v17, v17, v18
; SI-NEXT:    v_and_b32_e32 v18, 0xffff, v49
; SI-NEXT:    s_waitcnt vmcnt(9)
; SI-NEXT:    v_or_b32_e32 v18, v18, v19
; SI-NEXT:    v_and_b32_e32 v19, 0xffff, v48
; SI-NEXT:    s_waitcnt vmcnt(8)
; SI-NEXT:    v_or_b32_e32 v19, v19, v20
; SI-NEXT:    v_and_b32_e32 v20, 0xffff, v39
; SI-NEXT:    s_waitcnt vmcnt(7)
; SI-NEXT:    v_or_b32_e32 v20, v20, v21
; SI-NEXT:    v_and_b32_e32 v21, 0xffff, v38
; SI-NEXT:    s_waitcnt vmcnt(6)
; SI-NEXT:    v_or_b32_e32 v21, v21, v22
; SI-NEXT:    v_and_b32_e32 v22, 0xffff, v37
; SI-NEXT:    s_waitcnt vmcnt(5)
; SI-NEXT:    v_or_b32_e32 v22, v22, v23
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT:    ; implicit-def: $vgpr41
; SI-NEXT:    ; implicit-def: $vgpr40
; SI-NEXT:    ; implicit-def: $vgpr55
; SI-NEXT:    ; implicit-def: $vgpr54
; SI-NEXT:    ; implicit-def: $vgpr53
; SI-NEXT:    ; implicit-def: $vgpr52
; SI-NEXT:    ; implicit-def: $vgpr51
; SI-NEXT:    ; implicit-def: $vgpr50
; SI-NEXT:    ; implicit-def: $vgpr49
; SI-NEXT:    ; implicit-def: $vgpr48
; SI-NEXT:    ; implicit-def: $vgpr39
; SI-NEXT:    ; implicit-def: $vgpr38
; SI-NEXT:    ; implicit-def: $vgpr37
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT:    v_or_b32_e32 v23, v23, v24
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT:    v_or_b32_e32 v24, v24, v25
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT:    v_or_b32_e32 v25, v25, v26
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT:    v_or_b32_e32 v26, v26, v27
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT:    v_or_b32_e32 v27, v27, v28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:  .LBB50_2: ; %Flow
; SI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB50_4
; SI-NEXT:  ; %bb.3: ; %cmp.true
; SI-NEXT:    buffer_load_dword v10, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v13, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v14, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v15, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v16, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v17, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v19, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v21, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT:    v_add_i32_e32 v9, vcc, 3, v42
; SI-NEXT:    v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_add_i32_e32 v0, vcc, 3, v59
; SI-NEXT:    v_add_i32_e32 v1, vcc, 3, v58
; SI-NEXT:    v_add_i32_e32 v2, vcc, 3, v57
; SI-NEXT:    v_add_i32_e32 v3, vcc, 3, v56
; SI-NEXT:    v_add_i32_e32 v4, vcc, 3, v47
; SI-NEXT:    v_add_i32_e32 v5, vcc, 3, v46
; SI-NEXT:    v_add_i32_e32 v6, vcc, 3, v45
; SI-NEXT:    v_add_i32_e32 v7, vcc, 3, v44
; SI-NEXT:    v_add_i32_e32 v8, vcc, 3, v43
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT:    v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT:    v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT:    v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT:    v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT:    v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT:    v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT:    v_or_b32_e32 v0, v32, v0
; SI-NEXT:    v_or_b32_e32 v1, v36, v1
; SI-NEXT:    v_or_b32_e32 v2, v61, v2
; SI-NEXT:    v_or_b32_e32 v3, v35, v3
; SI-NEXT:    v_or_b32_e32 v4, v60, v4
; SI-NEXT:    v_or_b32_e32 v5, v34, v5
; SI-NEXT:    v_or_b32_e32 v6, v63, v6
; SI-NEXT:    v_or_b32_e32 v7, v33, v7
; SI-NEXT:    v_or_b32_e32 v8, v62, v8
; SI-NEXT:    v_add_i32_e32 v0, vcc, 0x30000, v0
; SI-NEXT:    v_add_i32_e32 v1, vcc, 0x30000, v1
; SI-NEXT:    v_add_i32_e32 v2, vcc, 0x30000, v2
; SI-NEXT:    v_add_i32_e32 v3, vcc, 0x30000, v3
; SI-NEXT:    v_add_i32_e32 v4, vcc, 0x30000, v4
; SI-NEXT:    v_add_i32_e32 v5, vcc, 0x30000, v5
; SI-NEXT:    v_add_i32_e32 v6, vcc, 0x30000, v6
; SI-NEXT:    v_add_i32_e32 v7, vcc, 0x30000, v7
; SI-NEXT:    v_add_i32_e32 v8, vcc, 0x30000, v8
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(14)
; SI-NEXT:    v_or_b32_e32 v9, v10, v9
; SI-NEXT:    v_add_i32_e32 v10, vcc, 3, v41
; SI-NEXT:    v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT:    v_or_b32_e32 v10, v11, v10
; SI-NEXT:    v_add_i32_e32 v11, vcc, 3, v40
; SI-NEXT:    v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT:    v_or_b32_e32 v11, v12, v11
; SI-NEXT:    v_add_i32_e32 v12, vcc, 3, v55
; SI-NEXT:    v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT:    v_or_b32_e32 v12, v13, v12
; SI-NEXT:    v_add_i32_e32 v13, vcc, 3, v54
; SI-NEXT:    v_and_b32_e32 v13, 0xffff, v13
; SI-NEXT:    v_or_b32_e32 v13, v14, v13
; SI-NEXT:    v_add_i32_e32 v14, vcc, 3, v53
; SI-NEXT:    v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT:    s_waitcnt vmcnt(13)
; SI-NEXT:    v_or_b32_e32 v14, v15, v14
; SI-NEXT:    v_add_i32_e32 v15, vcc, 3, v52
; SI-NEXT:    v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT:    s_waitcnt vmcnt(12)
; SI-NEXT:    v_or_b32_e32 v15, v16, v15
; SI-NEXT:    v_add_i32_e32 v16, vcc, 3, v51
; SI-NEXT:    v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT:    s_waitcnt vmcnt(11)
; SI-NEXT:    v_or_b32_e32 v16, v17, v16
; SI-NEXT:    v_add_i32_e32 v17, vcc, 3, v50
; SI-NEXT:    v_and_b32_e32 v17, 0xffff, v17
; SI-NEXT:    s_waitcnt vmcnt(10)
; SI-NEXT:    v_or_b32_e32 v17, v18, v17
; SI-NEXT:    v_add_i32_e32 v18, vcc, 3, v49
; SI-NEXT:    v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT:    s_waitcnt vmcnt(9)
; SI-NEXT:    v_or_b32_e32 v18, v19, v18
; SI-NEXT:    v_add_i32_e32 v19, vcc, 3, v48
; SI-NEXT:    v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT:    s_waitcnt vmcnt(8)
; SI-NEXT:    v_or_b32_e32 v19, v20, v19
; SI-NEXT:    v_add_i32_e32 v20, vcc, 3, v39
; SI-NEXT:    v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT:    s_waitcnt vmcnt(7)
; SI-NEXT:    v_or_b32_e32 v20, v21, v20
; SI-NEXT:    v_add_i32_e32 v21, vcc, 3, v38
; SI-NEXT:    v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT:    s_waitcnt vmcnt(6)
; SI-NEXT:    v_or_b32_e32 v21, v22, v21
; SI-NEXT:    v_add_i32_e32 v22, vcc, 3, v37
; SI-NEXT:    v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT:    s_waitcnt vmcnt(5)
; SI-NEXT:    v_or_b32_e32 v22, v23, v22
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT:    v_add_i32_e32 v9, vcc, 0x30000, v9
; SI-NEXT:    v_add_i32_e32 v10, vcc, 0x30000, v10
; SI-NEXT:    v_add_i32_e32 v11, vcc, 0x30000, v11
; SI-NEXT:    v_add_i32_e32 v12, vcc, 0x30000, v12
; SI-NEXT:    v_add_i32_e32 v13, vcc, 0x30000, v13
; SI-NEXT:    v_add_i32_e32 v14, vcc, 0x30000, v14
; SI-NEXT:    v_add_i32_e32 v15, vcc, 0x30000, v15
; SI-NEXT:    v_add_i32_e32 v16, vcc, 0x30000, v16
; SI-NEXT:    v_add_i32_e32 v17, vcc, 0x30000, v17
; SI-NEXT:    v_add_i32_e32 v18, vcc, 0x30000, v18
; SI-NEXT:    v_add_i32_e32 v19, vcc, 0x30000, v19
; SI-NEXT:    v_add_i32_e32 v20, vcc, 0x30000, v20
; SI-NEXT:    v_add_i32_e32 v21, vcc, 0x30000, v21
; SI-NEXT:    v_add_i32_e32 v22, vcc, 0x30000, v22
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_add_i32_e32 v23, vcc, 3, v23
; SI-NEXT:    v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT:    v_or_b32_e32 v23, v24, v23
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT:    v_add_i32_e32 v23, vcc, 0x30000, v23
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_add_i32_e32 v24, vcc, 3, v24
; SI-NEXT:    v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT:    v_or_b32_e32 v24, v25, v24
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT:    v_add_i32_e32 v24, vcc, 0x30000, v24
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_add_i32_e32 v25, vcc, 3, v25
; SI-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT:    v_or_b32_e32 v25, v26, v25
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT:    v_add_i32_e32 v25, vcc, 0x30000, v25
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_add_i32_e32 v26, vcc, 3, v26
; SI-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT:    v_or_b32_e32 v26, v27, v26
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT:    v_add_i32_e32 v26, vcc, 0x30000, v26
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_add_i32_e32 v27, vcc, 3, v27
; SI-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT:    v_or_b32_e32 v27, v28, v27
; SI-NEXT:    v_add_i32_e32 v27, vcc, 0x30000, v27
; SI-NEXT:  .LBB50_4: ; %end
; SI-NEXT:    s_or_b64 exec, exec, s[4:5]
; SI-NEXT:    buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v56i16_to_v14f64:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v56, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v58, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v59, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    v_mov_b32_e32 v32, v27
; VI-NEXT:    v_mov_b32_e32 v33, v26
; VI-NEXT:    v_mov_b32_e32 v34, v25
; VI-NEXT:    v_mov_b32_e32 v35, v24
; VI-NEXT:    v_mov_b32_e32 v36, v23
; VI-NEXT:    v_mov_b32_e32 v37, v22
; VI-NEXT:    v_mov_b32_e32 v38, v21
; VI-NEXT:    v_mov_b32_e32 v39, v20
; VI-NEXT:    v_mov_b32_e32 v48, v19
; VI-NEXT:    v_mov_b32_e32 v49, v18
; VI-NEXT:    v_mov_b32_e32 v50, v17
; VI-NEXT:    v_mov_b32_e32 v51, v16
; VI-NEXT:    v_mov_b32_e32 v52, v15
; VI-NEXT:    v_mov_b32_e32 v53, v14
; VI-NEXT:    v_mov_b32_e32 v54, v13
; VI-NEXT:    v_mov_b32_e32 v55, v12
; VI-NEXT:    v_mov_b32_e32 v40, v11
; VI-NEXT:    v_mov_b32_e32 v41, v10
; VI-NEXT:    v_mov_b32_e32 v42, v9
; VI-NEXT:    v_mov_b32_e32 v43, v8
; VI-NEXT:    v_mov_b32_e32 v44, v7
; VI-NEXT:    v_mov_b32_e32 v45, v6
; VI-NEXT:    v_mov_b32_e32 v46, v5
; VI-NEXT:    v_mov_b32_e32 v47, v4
; VI-NEXT:    v_mov_b32_e32 v56, v3
; VI-NEXT:    v_mov_b32_e32 v57, v2
; VI-NEXT:    v_mov_b32_e32 v58, v1
; VI-NEXT:    v_mov_b32_e32 v59, v0
; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT:    ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; VI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB50_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    v_mov_b32_e32 v27, 16
; VI-NEXT:    v_lshlrev_b32_sdwa v0, v27, v59 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v1, v27, v58 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v2, v27, v57 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v3, v27, v56 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v4, v27, v47 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v5, v27, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v6, v27, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v7, v27, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v8, v27, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v9, v27, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v10, v27, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v11, v27, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v12, v27, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v13, v27, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v14, v27, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v15, v27, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v16, v27, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v17, v27, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v18, v27, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v19, v27, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v20, v27, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v21, v27, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v22, v27, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v23, v27, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v24, v27, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v25, v27, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v26, v27, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v27, v27, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_or_b32_sdwa v0, v59, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v1, v58, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v2, v57, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v3, v56, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v4, v47, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v5, v46, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v6, v45, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v7, v44, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v8, v43, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v9, v42, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v10, v41, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v11, v40, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v12, v55, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v13, v54, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v14, v53, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v15, v52, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v16, v51, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v17, v50, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v18, v49, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v19, v48, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v20, v39, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v21, v38, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v22, v37, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v23, v36, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v24, v35, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v25, v34, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v26, v33, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v27, v32, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    ; implicit-def: $vgpr59
; VI-NEXT:    ; implicit-def: $vgpr58
; VI-NEXT:    ; implicit-def: $vgpr57
; VI-NEXT:    ; implicit-def: $vgpr56
; VI-NEXT:    ; implicit-def: $vgpr47
; VI-NEXT:    ; implicit-def: $vgpr46
; VI-NEXT:    ; implicit-def: $vgpr45
; VI-NEXT:    ; implicit-def: $vgpr44
; VI-NEXT:    ; implicit-def: $vgpr43
; VI-NEXT:    ; implicit-def: $vgpr42
; VI-NEXT:    ; implicit-def: $vgpr41
; VI-NEXT:    ; implicit-def: $vgpr40
; VI-NEXT:    ; implicit-def: $vgpr55
; VI-NEXT:    ; implicit-def: $vgpr54
; VI-NEXT:    ; implicit-def: $vgpr53
; VI-NEXT:    ; implicit-def: $vgpr52
; VI-NEXT:    ; implicit-def: $vgpr51
; VI-NEXT:    ; implicit-def: $vgpr50
; VI-NEXT:    ; implicit-def: $vgpr49
; VI-NEXT:    ; implicit-def: $vgpr48
; VI-NEXT:    ; implicit-def: $vgpr39
; VI-NEXT:    ; implicit-def: $vgpr38
; VI-NEXT:    ; implicit-def: $vgpr37
; VI-NEXT:    ; implicit-def: $vgpr36
; VI-NEXT:    ; implicit-def: $vgpr35
; VI-NEXT:    ; implicit-def: $vgpr34
; VI-NEXT:    ; implicit-def: $vgpr33
; VI-NEXT:    ; implicit-def: $vgpr32
; VI-NEXT:  .LBB50_2: ; %Flow
; VI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB50_4
; VI-NEXT:  ; %bb.3: ; %cmp.true
; VI-NEXT:    v_mov_b32_e32 v27, 3
; VI-NEXT:    v_add_u16_e32 v0, 3, v59
; VI-NEXT:    v_add_u16_sdwa v1, v59, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_u16_e32 v2, 3, v58
; VI-NEXT:    v_add_u16_sdwa v3, v58, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v0, v0, v1
; VI-NEXT:    v_or_b32_e32 v1, v2, v3
; VI-NEXT:    v_add_u16_e32 v2, 3, v57
; VI-NEXT:    v_add_u16_sdwa v3, v57, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v2, v2, v3
; VI-NEXT:    v_add_u16_e32 v3, 3, v56
; VI-NEXT:    v_add_u16_sdwa v4, v56, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v3, v3, v4
; VI-NEXT:    v_add_u16_e32 v4, 3, v47
; VI-NEXT:    v_add_u16_sdwa v5, v47, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v4, v4, v5
; VI-NEXT:    v_add_u16_e32 v5, 3, v46
; VI-NEXT:    v_add_u16_sdwa v6, v46, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v5, v5, v6
; VI-NEXT:    v_add_u16_e32 v6, 3, v45
; VI-NEXT:    v_add_u16_sdwa v7, v45, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v6, v6, v7
; VI-NEXT:    v_add_u16_e32 v7, 3, v44
; VI-NEXT:    v_add_u16_sdwa v8, v44, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v7, v7, v8
; VI-NEXT:    v_add_u16_e32 v8, 3, v43
; VI-NEXT:    v_add_u16_sdwa v9, v43, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v8, v8, v9
; VI-NEXT:    v_add_u16_e32 v9, 3, v42
; VI-NEXT:    v_add_u16_sdwa v10, v42, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v9, v9, v10
; VI-NEXT:    v_add_u16_e32 v10, 3, v41
; VI-NEXT:    v_add_u16_sdwa v11, v41, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v10, v10, v11
; VI-NEXT:    v_add_u16_e32 v11, 3, v40
; VI-NEXT:    v_add_u16_sdwa v12, v40, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v11, v11, v12
; VI-NEXT:    v_add_u16_e32 v12, 3, v55
; VI-NEXT:    v_add_u16_sdwa v13, v55, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v12, v12, v13
; VI-NEXT:    v_add_u16_e32 v13, 3, v54
; VI-NEXT:    v_add_u16_sdwa v14, v54, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v13, v13, v14
; VI-NEXT:    v_add_u16_e32 v14, 3, v53
; VI-NEXT:    v_add_u16_sdwa v15, v53, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v14, v14, v15
; VI-NEXT:    v_add_u16_e32 v15, 3, v52
; VI-NEXT:    v_add_u16_sdwa v16, v52, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v15, v15, v16
; VI-NEXT:    v_add_u16_e32 v16, 3, v51
; VI-NEXT:    v_add_u16_sdwa v17, v51, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v16, v16, v17
; VI-NEXT:    v_add_u16_e32 v17, 3, v50
; VI-NEXT:    v_add_u16_sdwa v18, v50, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v17, v17, v18
; VI-NEXT:    v_add_u16_e32 v18, 3, v49
; VI-NEXT:    v_add_u16_sdwa v19, v49, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v18, v18, v19
; VI-NEXT:    v_add_u16_e32 v19, 3, v48
; VI-NEXT:    v_add_u16_sdwa v20, v48, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v19, v19, v20
; VI-NEXT:    v_add_u16_e32 v20, 3, v39
; VI-NEXT:    v_add_u16_sdwa v21, v39, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v20, v20, v21
; VI-NEXT:    v_add_u16_e32 v21, 3, v38
; VI-NEXT:    v_add_u16_sdwa v22, v38, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v21, v21, v22
; VI-NEXT:    v_add_u16_e32 v22, 3, v37
; VI-NEXT:    v_add_u16_sdwa v23, v37, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v22, v22, v23
; VI-NEXT:    v_add_u16_e32 v23, 3, v36
; VI-NEXT:    v_add_u16_sdwa v24, v36, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v23, v23, v24
; VI-NEXT:    v_add_u16_e32 v24, 3, v35
; VI-NEXT:    v_add_u16_sdwa v25, v35, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v24, v24, v25
; VI-NEXT:    v_add_u16_e32 v25, 3, v34
; VI-NEXT:    v_add_u16_sdwa v26, v34, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v25, v25, v26
; VI-NEXT:    v_add_u16_e32 v26, 3, v33
; VI-NEXT:    v_add_u16_sdwa v28, v33, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v26, v26, v28
; VI-NEXT:    v_add_u16_e32 v28, 3, v32
; VI-NEXT:    v_add_u16_sdwa v27, v32, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_or_b32_e32 v27, v28, v27
; VI-NEXT:  .LBB50_4: ; %end
; VI-NEXT:    s_or_b64 exec, exec, s[4:5]
; VI-NEXT:    buffer_load_dword v59, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v58, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v57, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v56, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v56i16_to_v14f64:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    v_mov_b32_e32 v59, v0
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v27
; GFX9-NEXT:    v_mov_b32_e32 v34, v25
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v26
; GFX9-NEXT:    v_mov_b32_e32 v35, v24
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v34
; GFX9-NEXT:    v_mov_b32_e32 v36, v23
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT:    v_mov_b32_e32 v37, v22
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT:    v_mov_b32_e32 v38, v21
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT:    v_mov_b32_e32 v39, v20
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT:    v_mov_b32_e32 v48, v19
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT:    v_mov_b32_e32 v49, v18
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT:    v_mov_b32_e32 v50, v17
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT:    v_mov_b32_e32 v51, v16
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT:    v_mov_b32_e32 v52, v15
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT:    v_mov_b32_e32 v53, v14
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT:    v_mov_b32_e32 v54, v13
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT:    v_mov_b32_e32 v55, v12
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT:    v_mov_b32_e32 v40, v11
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT:    v_mov_b32_e32 v41, v10
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT:    v_mov_b32_e32 v42, v9
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT:    v_mov_b32_e32 v43, v8
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT:    v_mov_b32_e32 v44, v7
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT:    v_mov_b32_e32 v45, v6
; GFX9-NEXT:    v_mov_b32_e32 v46, v5
; GFX9-NEXT:    v_mov_b32_e32 v47, v4
; GFX9-NEXT:    v_mov_b32_e32 v56, v3
; GFX9-NEXT:    v_mov_b32_e32 v57, v2
; GFX9-NEXT:    v_mov_b32_e32 v58, v1
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v44
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v45
; GFX9-NEXT:    v_lshrrev_b32_e32 v62, 16, v46
; GFX9-NEXT:    v_lshrrev_b32_e32 v63, 16, v47
; GFX9-NEXT:    v_lshrrev_b32_e32 v60, 16, v56
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v57
; GFX9-NEXT:    v_lshrrev_b32_e32 v61, 16, v58
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v59
; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT:    buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT:    ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB50_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT:    s_mov_b32 s6, 0x5040100
; GFX9-NEXT:    v_lshrrev_b32_e32 v6, 16, v45
; GFX9-NEXT:    v_lshrrev_b32_e32 v7, 16, v44
; GFX9-NEXT:    v_lshrrev_b32_e32 v8, 16, v43
; GFX9-NEXT:    v_lshrrev_b32_e32 v9, 16, v42
; GFX9-NEXT:    v_lshrrev_b32_e32 v10, 16, v41
; GFX9-NEXT:    v_lshrrev_b32_e32 v11, 16, v40
; GFX9-NEXT:    v_lshrrev_b32_e32 v12, 16, v55
; GFX9-NEXT:    v_lshrrev_b32_e32 v13, 16, v54
; GFX9-NEXT:    v_lshrrev_b32_e32 v14, 16, v53
; GFX9-NEXT:    v_lshrrev_b32_e32 v15, 16, v52
; GFX9-NEXT:    v_lshrrev_b32_e32 v16, 16, v51
; GFX9-NEXT:    v_lshrrev_b32_e32 v17, 16, v50
; GFX9-NEXT:    v_lshrrev_b32_e32 v18, 16, v49
; GFX9-NEXT:    v_lshrrev_b32_e32 v19, 16, v48
; GFX9-NEXT:    v_lshrrev_b32_e32 v20, 16, v39
; GFX9-NEXT:    v_lshrrev_b32_e32 v21, 16, v38
; GFX9-NEXT:    v_lshrrev_b32_e32 v22, 16, v37
; GFX9-NEXT:    v_lshrrev_b32_e32 v23, 16, v36
; GFX9-NEXT:    v_lshrrev_b32_e32 v24, 16, v35
; GFX9-NEXT:    v_lshrrev_b32_e32 v25, 16, v34
; GFX9-NEXT:    v_perm_b32 v0, v33, v59, s6
; GFX9-NEXT:    v_perm_b32 v1, v61, v58, s6
; GFX9-NEXT:    v_perm_b32 v2, v32, v57, s6
; GFX9-NEXT:    v_perm_b32 v3, v60, v56, s6
; GFX9-NEXT:    v_perm_b32 v4, v63, v47, s6
; GFX9-NEXT:    v_perm_b32 v5, v62, v46, s6
; GFX9-NEXT:    v_perm_b32 v6, v6, v45, s6
; GFX9-NEXT:    v_perm_b32 v7, v7, v44, s6
; GFX9-NEXT:    v_perm_b32 v8, v8, v43, s6
; GFX9-NEXT:    v_perm_b32 v9, v9, v42, s6
; GFX9-NEXT:    v_perm_b32 v10, v10, v41, s6
; GFX9-NEXT:    v_perm_b32 v11, v11, v40, s6
; GFX9-NEXT:    v_perm_b32 v12, v12, v55, s6
; GFX9-NEXT:    v_perm_b32 v13, v13, v54, s6
; GFX9-NEXT:    v_perm_b32 v14, v14, v53, s6
; GFX9-NEXT:    v_perm_b32 v15, v15, v52, s6
; GFX9-NEXT:    v_perm_b32 v16, v16, v51, s6
; GFX9-NEXT:    v_perm_b32 v17, v17, v50, s6
; GFX9-NEXT:    v_perm_b32 v18, v18, v49, s6
; GFX9-NEXT:    v_perm_b32 v19, v19, v48, s6
; GFX9-NEXT:    v_perm_b32 v20, v20, v39, s6
; GFX9-NEXT:    v_perm_b32 v21, v21, v38, s6
; GFX9-NEXT:    v_perm_b32 v22, v22, v37, s6
; GFX9-NEXT:    v_perm_b32 v23, v23, v36, s6
; GFX9-NEXT:    v_perm_b32 v24, v24, v35, s6
; GFX9-NEXT:    v_perm_b32 v25, v25, v34, s6
; GFX9-NEXT:    ; implicit-def: $vgpr59
; GFX9-NEXT:    ; implicit-def: $vgpr58
; GFX9-NEXT:    ; implicit-def: $vgpr57
; GFX9-NEXT:    ; implicit-def: $vgpr56
; GFX9-NEXT:    ; implicit-def: $vgpr47
; GFX9-NEXT:    ; implicit-def: $vgpr46
; GFX9-NEXT:    ; implicit-def: $vgpr45
; GFX9-NEXT:    ; implicit-def: $vgpr44
; GFX9-NEXT:    ; implicit-def: $vgpr43
; GFX9-NEXT:    ; implicit-def: $vgpr42
; GFX9-NEXT:    ; implicit-def: $vgpr41
; GFX9-NEXT:    ; implicit-def: $vgpr40
; GFX9-NEXT:    ; implicit-def: $vgpr55
; GFX9-NEXT:    ; implicit-def: $vgpr54
; GFX9-NEXT:    ; implicit-def: $vgpr53
; GFX9-NEXT:    ; implicit-def: $vgpr52
; GFX9-NEXT:    ; implicit-def: $vgpr51
; GFX9-NEXT:    ; implicit-def: $vgpr50
; GFX9-NEXT:    ; implicit-def: $vgpr49
; GFX9-NEXT:    ; implicit-def: $vgpr48
; GFX9-NEXT:    ; implicit-def: $vgpr39
; GFX9-NEXT:    ; implicit-def: $vgpr38
; GFX9-NEXT:    ; implicit-def: $vgpr37
; GFX9-NEXT:    ; implicit-def: $vgpr36
; GFX9-NEXT:    ; implicit-def: $vgpr35
; GFX9-NEXT:    ; implicit-def: $vgpr34
; GFX9-NEXT:    ; implicit-def: $vgpr62
; GFX9-NEXT:    ; implicit-def: $vgpr63
; GFX9-NEXT:    ; implicit-def: $vgpr60
; GFX9-NEXT:    ; implicit-def: $vgpr32
; GFX9-NEXT:    ; implicit-def: $vgpr61
; GFX9-NEXT:    ; implicit-def: $vgpr33
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:  .LBB50_2: ; %Flow
; GFX9-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB50_4
; GFX9-NEXT:  ; %bb.3: ; %cmp.true
; GFX9-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT:    s_mov_b32 s6, 0x5040100
; GFX9-NEXT:    buffer_load_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v7, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v8, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v14, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v19, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT:    v_perm_b32 v0, v33, v59, s6
; GFX9-NEXT:    v_perm_b32 v1, v61, v58, s6
; GFX9-NEXT:    v_perm_b32 v2, v32, v57, s6
; GFX9-NEXT:    v_perm_b32 v3, v60, v56, s6
; GFX9-NEXT:    v_perm_b32 v4, v63, v47, s6
; GFX9-NEXT:    v_perm_b32 v5, v62, v46, s6
; GFX9-NEXT:    v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_waitcnt vmcnt(20)
; GFX9-NEXT:    v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT:    s_waitcnt vmcnt(21)
; GFX9-NEXT:    v_perm_b32 v6, v6, v45, s6
; GFX9-NEXT:    s_waitcnt vmcnt(20)
; GFX9-NEXT:    v_perm_b32 v7, v7, v44, s6
; GFX9-NEXT:    s_waitcnt vmcnt(19)
; GFX9-NEXT:    v_perm_b32 v8, v8, v43, s6
; GFX9-NEXT:    s_waitcnt vmcnt(18)
; GFX9-NEXT:    v_perm_b32 v9, v9, v42, s6
; GFX9-NEXT:    s_waitcnt vmcnt(17)
; GFX9-NEXT:    v_perm_b32 v10, v10, v41, s6
; GFX9-NEXT:    s_waitcnt vmcnt(16)
; GFX9-NEXT:    v_perm_b32 v11, v11, v40, s6
; GFX9-NEXT:    s_waitcnt vmcnt(15)
; GFX9-NEXT:    v_perm_b32 v12, v12, v55, s6
; GFX9-NEXT:    s_waitcnt vmcnt(14)
; GFX9-NEXT:    v_perm_b32 v13, v13, v54, s6
; GFX9-NEXT:    s_waitcnt vmcnt(13)
; GFX9-NEXT:    v_perm_b32 v14, v14, v53, s6
; GFX9-NEXT:    s_waitcnt vmcnt(12)
; GFX9-NEXT:    v_perm_b32 v15, v15, v52, s6
; GFX9-NEXT:    s_waitcnt vmcnt(11)
; GFX9-NEXT:    v_perm_b32 v16, v16, v51, s6
; GFX9-NEXT:    s_waitcnt vmcnt(10)
; GFX9-NEXT:    v_perm_b32 v17, v17, v50, s6
; GFX9-NEXT:    s_waitcnt vmcnt(9)
; GFX9-NEXT:    v_perm_b32 v18, v18, v49, s6
; GFX9-NEXT:    s_waitcnt vmcnt(8)
; GFX9-NEXT:    v_perm_b32 v19, v19, v48, s6
; GFX9-NEXT:    s_waitcnt vmcnt(7)
; GFX9-NEXT:    v_perm_b32 v20, v20, v39, s6
; GFX9-NEXT:    s_waitcnt vmcnt(6)
; GFX9-NEXT:    v_perm_b32 v21, v21, v38, s6
; GFX9-NEXT:    s_waitcnt vmcnt(5)
; GFX9-NEXT:    v_perm_b32 v22, v22, v37, s6
; GFX9-NEXT:    s_waitcnt vmcnt(4)
; GFX9-NEXT:    v_perm_b32 v23, v23, v36, s6
; GFX9-NEXT:    s_waitcnt vmcnt(3)
; GFX9-NEXT:    v_perm_b32 v24, v24, v35, s6
; GFX9-NEXT:    s_waitcnt vmcnt(2)
; GFX9-NEXT:    v_perm_b32 v25, v25, v34, s6
; GFX9-NEXT:    v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT:    v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
; GFX9-NEXT:  .LBB50_4: ; %end
; GFX9-NEXT:    s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT:    buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-TRUE16-LABEL: bitcast_v56i16_to_v14f64:
; GFX11-TRUE16:       ; %bb.0:
; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-TRUE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT:    s_cbranch_execz .LBB50_2
; GFX11-TRUE16-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:  .LBB50_2: ; %end
; GFX11-TRUE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v56i16_to_v14f64:
; GFX11-FAKE16:       ; %bb.0:
; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v0
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v2
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v80, 16, v3
; GFX11-FAKE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v28
; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v69, v0, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v1, v70, v1, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v2, v71, v2, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v3, v80, v3, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v4, v68, v4, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v5, v67, v5, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v6, v66, v6, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v7, v65, v7, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v8, v64, v8, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v9, v55, v9, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v10, v54, v10, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v11, v53, v11, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v12, v52, v12, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v13, v51, v13, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v14, v50, v14, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v15, v49, v15, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v16, v48, v16, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v17, v39, v17, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v18, v38, v18, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v19, v37, v19, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v20, v36, v20, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v21, v35, v21, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v22, v34, v22, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v23, v33, v23, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v24, v32, v24, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v25, v31, v25, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v26, v30, v26, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v27, v29, v27, 0x5040100
; GFX11-FAKE16-NEXT:    s_and_saveexec_b32 s0, vcc_lo
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-FAKE16-NEXT:    s_cbranch_execz .LBB50_2
; GFX11-FAKE16-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:  .LBB50_2: ; %end
; GFX11-FAKE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = add <56 x i16> %a, splat (i16 3)
  %a2 = bitcast <56 x i16> %a1 to <14 x double>
  br label %end

cmp.false:
  %a3 = bitcast <56 x i16> %a to <14 x double>
  br label %end

end:
  %phi = phi <14 x double> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <14 x double> %phi
}

define inreg <14 x double> @bitcast_v56i16_to_v14f64_scalar(<56 x i16> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v56i16_to_v14f64_scalar:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    v_readfirstlane_b32 s41, v13
; SI-NEXT:    v_readfirstlane_b32 s43, v12
; SI-NEXT:    v_readfirstlane_b32 s45, v11
; SI-NEXT:    v_readfirstlane_b32 s47, v10
; SI-NEXT:    v_readfirstlane_b32 s57, v9
; SI-NEXT:    v_readfirstlane_b32 s59, v8
; SI-NEXT:    v_readfirstlane_b32 s61, v7
; SI-NEXT:    v_readfirstlane_b32 s63, v6
; SI-NEXT:    v_readfirstlane_b32 s73, v5
; SI-NEXT:    v_readfirstlane_b32 s75, v4
; SI-NEXT:    v_readfirstlane_b32 s78, v3
; SI-NEXT:    v_readfirstlane_b32 s89, v2
; SI-NEXT:    v_readfirstlane_b32 s91, v1
; SI-NEXT:    v_readfirstlane_b32 s93, v0
; SI-NEXT:    s_lshr_b32 s76, s29, 16
; SI-NEXT:    s_lshr_b32 s79, s28, 16
; SI-NEXT:    s_lshr_b32 s15, s27, 16
; SI-NEXT:    s_lshr_b32 s14, s26, 16
; SI-NEXT:    s_lshr_b32 s13, s25, 16
; SI-NEXT:    s_lshr_b32 s12, s24, 16
; SI-NEXT:    s_lshr_b32 s11, s23, 16
; SI-NEXT:    s_lshr_b32 s10, s22, 16
; SI-NEXT:    s_lshr_b32 s9, s21, 16
; SI-NEXT:    s_lshr_b32 s8, s20, 16
; SI-NEXT:    s_lshr_b32 s7, s19, 16
; SI-NEXT:    s_lshr_b32 s6, s18, 16
; SI-NEXT:    s_lshr_b32 s5, s17, 16
; SI-NEXT:    s_lshr_b32 s4, s16, 16
; SI-NEXT:    s_lshr_b32 s40, s41, 16
; SI-NEXT:    s_lshr_b32 s42, s43, 16
; SI-NEXT:    s_lshr_b32 s44, s45, 16
; SI-NEXT:    s_lshr_b32 s46, s47, 16
; SI-NEXT:    s_lshr_b32 s56, s57, 16
; SI-NEXT:    s_lshr_b32 s58, s59, 16
; SI-NEXT:    s_lshr_b32 s60, s61, 16
; SI-NEXT:    s_lshr_b32 s62, s63, 16
; SI-NEXT:    s_lshr_b32 s72, s73, 16
; SI-NEXT:    s_lshr_b32 s74, s75, 16
; SI-NEXT:    s_lshr_b32 s77, s78, 16
; SI-NEXT:    s_lshr_b32 s88, s89, 16
; SI-NEXT:    s_lshr_b32 s90, s91, 16
; SI-NEXT:    s_lshr_b32 s92, s93, 16
; SI-NEXT:    v_readfirstlane_b32 s94, v14
; SI-NEXT:    s_cmp_lg_u32 s94, 0
; SI-NEXT:    s_cbranch_scc0 .LBB51_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    s_and_b32 s16, s16, 0xffff
; SI-NEXT:    s_lshl_b32 s4, s4, 16
; SI-NEXT:    s_or_b32 s4, s16, s4
; SI-NEXT:    s_and_b32 s16, s17, 0xffff
; SI-NEXT:    s_lshl_b32 s5, s5, 16
; SI-NEXT:    s_or_b32 s5, s16, s5
; SI-NEXT:    s_and_b32 s16, s18, 0xffff
; SI-NEXT:    s_lshl_b32 s6, s6, 16
; SI-NEXT:    s_or_b32 s6, s16, s6
; SI-NEXT:    s_and_b32 s16, s19, 0xffff
; SI-NEXT:    s_lshl_b32 s7, s7, 16
; SI-NEXT:    s_or_b32 s7, s16, s7
; SI-NEXT:    s_and_b32 s16, s20, 0xffff
; SI-NEXT:    s_lshl_b32 s8, s8, 16
; SI-NEXT:    s_or_b32 s8, s16, s8
; SI-NEXT:    s_and_b32 s16, s21, 0xffff
; SI-NEXT:    s_lshl_b32 s9, s9, 16
; SI-NEXT:    s_or_b32 s9, s16, s9
; SI-NEXT:    s_and_b32 s16, s22, 0xffff
; SI-NEXT:    s_lshl_b32 s10, s10, 16
; SI-NEXT:    s_or_b32 s10, s16, s10
; SI-NEXT:    s_and_b32 s16, s23, 0xffff
; SI-NEXT:    s_lshl_b32 s11, s11, 16
; SI-NEXT:    s_or_b32 s11, s16, s11
; SI-NEXT:    s_and_b32 s16, s24, 0xffff
; SI-NEXT:    s_lshl_b32 s12, s12, 16
; SI-NEXT:    s_or_b32 s12, s16, s12
; SI-NEXT:    s_and_b32 s16, s25, 0xffff
; SI-NEXT:    s_lshl_b32 s13, s13, 16
; SI-NEXT:    s_or_b32 s13, s16, s13
; SI-NEXT:    s_and_b32 s16, s26, 0xffff
; SI-NEXT:    s_lshl_b32 s14, s14, 16
; SI-NEXT:    s_or_b32 s14, s16, s14
; SI-NEXT:    s_and_b32 s16, s27, 0xffff
; SI-NEXT:    s_lshl_b32 s15, s15, 16
; SI-NEXT:    s_or_b32 s15, s16, s15
; SI-NEXT:    s_and_b32 s16, s28, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s79, 16
; SI-NEXT:    s_or_b32 s16, s16, s17
; SI-NEXT:    s_and_b32 s17, s29, 0xffff
; SI-NEXT:    s_lshl_b32 s18, s76, 16
; SI-NEXT:    s_or_b32 s17, s17, s18
; SI-NEXT:    s_and_b32 s18, s93, 0xffff
; SI-NEXT:    s_lshl_b32 s19, s92, 16
; SI-NEXT:    s_or_b32 s18, s18, s19
; SI-NEXT:    s_and_b32 s19, s91, 0xffff
; SI-NEXT:    s_lshl_b32 s20, s90, 16
; SI-NEXT:    s_or_b32 s19, s19, s20
; SI-NEXT:    s_and_b32 s20, s89, 0xffff
; SI-NEXT:    s_lshl_b32 s21, s88, 16
; SI-NEXT:    s_or_b32 s20, s20, s21
; SI-NEXT:    s_and_b32 s21, s78, 0xffff
; SI-NEXT:    s_lshl_b32 s22, s77, 16
; SI-NEXT:    s_or_b32 s21, s21, s22
; SI-NEXT:    s_and_b32 s22, s75, 0xffff
; SI-NEXT:    s_lshl_b32 s23, s74, 16
; SI-NEXT:    s_or_b32 s22, s22, s23
; SI-NEXT:    s_and_b32 s23, s73, 0xffff
; SI-NEXT:    s_lshl_b32 s24, s72, 16
; SI-NEXT:    s_or_b32 s23, s23, s24
; SI-NEXT:    s_and_b32 s24, s63, 0xffff
; SI-NEXT:    s_lshl_b32 s25, s62, 16
; SI-NEXT:    s_or_b32 s24, s24, s25
; SI-NEXT:    s_and_b32 s25, s61, 0xffff
; SI-NEXT:    s_lshl_b32 s26, s60, 16
; SI-NEXT:    s_or_b32 s25, s25, s26
; SI-NEXT:    s_and_b32 s26, s59, 0xffff
; SI-NEXT:    s_lshl_b32 s27, s58, 16
; SI-NEXT:    s_or_b32 s26, s26, s27
; SI-NEXT:    s_and_b32 s27, s57, 0xffff
; SI-NEXT:    s_lshl_b32 s28, s56, 16
; SI-NEXT:    s_or_b32 s27, s27, s28
; SI-NEXT:    s_and_b32 s28, s47, 0xffff
; SI-NEXT:    s_lshl_b32 s29, s46, 16
; SI-NEXT:    s_or_b32 s28, s28, s29
; SI-NEXT:    s_and_b32 s29, s45, 0xffff
; SI-NEXT:    s_lshl_b32 s44, s44, 16
; SI-NEXT:    s_and_b32 s43, s43, 0xffff
; SI-NEXT:    s_lshl_b32 s42, s42, 16
; SI-NEXT:    s_and_b32 s41, s41, 0xffff
; SI-NEXT:    s_lshl_b32 s40, s40, 16
; SI-NEXT:    s_or_b32 s29, s29, s44
; SI-NEXT:    s_or_b32 s42, s43, s42
; SI-NEXT:    s_or_b32 s40, s41, s40
; SI-NEXT:    s_branch .LBB51_3
; SI-NEXT:  .LBB51_2: ; %cmp.true
; SI-NEXT:    s_add_i32 s16, s16, 3
; SI-NEXT:    s_and_b32 s16, s16, 0xffff
; SI-NEXT:    s_lshl_b32 s4, s4, 16
; SI-NEXT:    s_add_i32 s17, s17, 3
; SI-NEXT:    s_or_b32 s4, s4, s16
; SI-NEXT:    s_and_b32 s16, s17, 0xffff
; SI-NEXT:    s_lshl_b32 s5, s5, 16
; SI-NEXT:    s_add_i32 s18, s18, 3
; SI-NEXT:    s_or_b32 s5, s5, s16
; SI-NEXT:    s_and_b32 s16, s18, 0xffff
; SI-NEXT:    s_lshl_b32 s6, s6, 16
; SI-NEXT:    s_add_i32 s19, s19, 3
; SI-NEXT:    s_or_b32 s6, s6, s16
; SI-NEXT:    s_and_b32 s16, s19, 0xffff
; SI-NEXT:    s_lshl_b32 s7, s7, 16
; SI-NEXT:    s_add_i32 s20, s20, 3
; SI-NEXT:    s_or_b32 s7, s7, s16
; SI-NEXT:    s_and_b32 s16, s20, 0xffff
; SI-NEXT:    s_lshl_b32 s8, s8, 16
; SI-NEXT:    s_add_i32 s21, s21, 3
; SI-NEXT:    s_or_b32 s8, s8, s16
; SI-NEXT:    s_and_b32 s16, s21, 0xffff
; SI-NEXT:    s_lshl_b32 s9, s9, 16
; SI-NEXT:    s_add_i32 s22, s22, 3
; SI-NEXT:    s_or_b32 s9, s9, s16
; SI-NEXT:    s_and_b32 s16, s22, 0xffff
; SI-NEXT:    s_lshl_b32 s10, s10, 16
; SI-NEXT:    s_add_i32 s23, s23, 3
; SI-NEXT:    s_or_b32 s10, s10, s16
; SI-NEXT:    s_and_b32 s16, s23, 0xffff
; SI-NEXT:    s_lshl_b32 s11, s11, 16
; SI-NEXT:    s_add_i32 s24, s24, 3
; SI-NEXT:    s_or_b32 s11, s11, s16
; SI-NEXT:    s_and_b32 s16, s24, 0xffff
; SI-NEXT:    s_lshl_b32 s12, s12, 16
; SI-NEXT:    s_add_i32 s25, s25, 3
; SI-NEXT:    s_or_b32 s12, s12, s16
; SI-NEXT:    s_and_b32 s16, s25, 0xffff
; SI-NEXT:    s_lshl_b32 s13, s13, 16
; SI-NEXT:    s_add_i32 s26, s26, 3
; SI-NEXT:    s_or_b32 s13, s13, s16
; SI-NEXT:    s_and_b32 s16, s26, 0xffff
; SI-NEXT:    s_lshl_b32 s14, s14, 16
; SI-NEXT:    s_add_i32 s27, s27, 3
; SI-NEXT:    s_or_b32 s14, s14, s16
; SI-NEXT:    s_and_b32 s16, s27, 0xffff
; SI-NEXT:    s_lshl_b32 s15, s15, 16
; SI-NEXT:    s_add_i32 s28, s28, 3
; SI-NEXT:    s_or_b32 s15, s15, s16
; SI-NEXT:    s_and_b32 s16, s28, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s79, 16
; SI-NEXT:    s_add_i32 s29, s29, 3
; SI-NEXT:    s_or_b32 s16, s17, s16
; SI-NEXT:    s_and_b32 s17, s29, 0xffff
; SI-NEXT:    s_lshl_b32 s18, s76, 16
; SI-NEXT:    s_add_i32 s93, s93, 3
; SI-NEXT:    s_or_b32 s17, s18, s17
; SI-NEXT:    s_and_b32 s18, s93, 0xffff
; SI-NEXT:    s_lshl_b32 s19, s92, 16
; SI-NEXT:    s_add_i32 s91, s91, 3
; SI-NEXT:    s_or_b32 s18, s19, s18
; SI-NEXT:    s_and_b32 s19, s91, 0xffff
; SI-NEXT:    s_lshl_b32 s20, s90, 16
; SI-NEXT:    s_add_i32 s89, s89, 3
; SI-NEXT:    s_or_b32 s19, s20, s19
; SI-NEXT:    s_and_b32 s20, s89, 0xffff
; SI-NEXT:    s_lshl_b32 s21, s88, 16
; SI-NEXT:    s_add_i32 s78, s78, 3
; SI-NEXT:    s_or_b32 s20, s21, s20
; SI-NEXT:    s_and_b32 s21, s78, 0xffff
; SI-NEXT:    s_lshl_b32 s22, s77, 16
; SI-NEXT:    s_add_i32 s75, s75, 3
; SI-NEXT:    s_or_b32 s21, s22, s21
; SI-NEXT:    s_and_b32 s22, s75, 0xffff
; SI-NEXT:    s_lshl_b32 s23, s74, 16
; SI-NEXT:    s_add_i32 s73, s73, 3
; SI-NEXT:    s_or_b32 s22, s23, s22
; SI-NEXT:    s_and_b32 s23, s73, 0xffff
; SI-NEXT:    s_lshl_b32 s24, s72, 16
; SI-NEXT:    s_add_i32 s63, s63, 3
; SI-NEXT:    s_or_b32 s23, s24, s23
; SI-NEXT:    s_and_b32 s24, s63, 0xffff
; SI-NEXT:    s_lshl_b32 s25, s62, 16
; SI-NEXT:    s_add_i32 s61, s61, 3
; SI-NEXT:    s_or_b32 s24, s25, s24
; SI-NEXT:    s_and_b32 s25, s61, 0xffff
; SI-NEXT:    s_lshl_b32 s26, s60, 16
; SI-NEXT:    s_add_i32 s59, s59, 3
; SI-NEXT:    s_or_b32 s25, s26, s25
; SI-NEXT:    s_and_b32 s26, s59, 0xffff
; SI-NEXT:    s_lshl_b32 s27, s58, 16
; SI-NEXT:    s_add_i32 s57, s57, 3
; SI-NEXT:    s_or_b32 s26, s27, s26
; SI-NEXT:    s_and_b32 s27, s57, 0xffff
; SI-NEXT:    s_lshl_b32 s28, s56, 16
; SI-NEXT:    s_add_i32 s47, s47, 3
; SI-NEXT:    s_or_b32 s27, s28, s27
; SI-NEXT:    s_and_b32 s28, s47, 0xffff
; SI-NEXT:    s_lshl_b32 s29, s46, 16
; SI-NEXT:    s_add_i32 s45, s45, 3
; SI-NEXT:    s_add_i32 s43, s43, 3
; SI-NEXT:    s_add_i32 s41, s41, 3
; SI-NEXT:    s_or_b32 s28, s29, s28
; SI-NEXT:    s_and_b32 s29, s45, 0xffff
; SI-NEXT:    s_lshl_b32 s44, s44, 16
; SI-NEXT:    s_and_b32 s43, s43, 0xffff
; SI-NEXT:    s_lshl_b32 s42, s42, 16
; SI-NEXT:    s_and_b32 s41, s41, 0xffff
; SI-NEXT:    s_lshl_b32 s40, s40, 16
; SI-NEXT:    s_or_b32 s29, s44, s29
; SI-NEXT:    s_or_b32 s42, s42, s43
; SI-NEXT:    s_or_b32 s40, s40, s41
; SI-NEXT:    s_add_i32 s4, s4, 0x30000
; SI-NEXT:    s_add_i32 s5, s5, 0x30000
; SI-NEXT:    s_add_i32 s6, s6, 0x30000
; SI-NEXT:    s_add_i32 s7, s7, 0x30000
; SI-NEXT:    s_add_i32 s8, s8, 0x30000
; SI-NEXT:    s_add_i32 s9, s9, 0x30000
; SI-NEXT:    s_add_i32 s10, s10, 0x30000
; SI-NEXT:    s_add_i32 s11, s11, 0x30000
; SI-NEXT:    s_add_i32 s12, s12, 0x30000
; SI-NEXT:    s_add_i32 s13, s13, 0x30000
; SI-NEXT:    s_add_i32 s14, s14, 0x30000
; SI-NEXT:    s_add_i32 s15, s15, 0x30000
; SI-NEXT:    s_add_i32 s16, s16, 0x30000
; SI-NEXT:    s_add_i32 s17, s17, 0x30000
; SI-NEXT:    s_add_i32 s18, s18, 0x30000
; SI-NEXT:    s_add_i32 s19, s19, 0x30000
; SI-NEXT:    s_add_i32 s20, s20, 0x30000
; SI-NEXT:    s_add_i32 s21, s21, 0x30000
; SI-NEXT:    s_add_i32 s22, s22, 0x30000
; SI-NEXT:    s_add_i32 s23, s23, 0x30000
; SI-NEXT:    s_add_i32 s24, s24, 0x30000
; SI-NEXT:    s_add_i32 s25, s25, 0x30000
; SI-NEXT:    s_add_i32 s26, s26, 0x30000
; SI-NEXT:    s_add_i32 s27, s27, 0x30000
; SI-NEXT:    s_add_i32 s28, s28, 0x30000
; SI-NEXT:    s_add_i32 s29, s29, 0x30000
; SI-NEXT:    s_add_i32 s42, s42, 0x30000
; SI-NEXT:    s_add_i32 s40, s40, 0x30000
; SI-NEXT:  .LBB51_3: ; %end
; SI-NEXT:    v_mov_b32_e32 v0, s4
; SI-NEXT:    v_mov_b32_e32 v1, s5
; SI-NEXT:    v_mov_b32_e32 v2, s6
; SI-NEXT:    v_mov_b32_e32 v3, s7
; SI-NEXT:    v_mov_b32_e32 v4, s8
; SI-NEXT:    v_mov_b32_e32 v5, s9
; SI-NEXT:    v_mov_b32_e32 v6, s10
; SI-NEXT:    v_mov_b32_e32 v7, s11
; SI-NEXT:    v_mov_b32_e32 v8, s12
; SI-NEXT:    v_mov_b32_e32 v9, s13
; SI-NEXT:    v_mov_b32_e32 v10, s14
; SI-NEXT:    v_mov_b32_e32 v11, s15
; SI-NEXT:    v_mov_b32_e32 v12, s16
; SI-NEXT:    v_mov_b32_e32 v13, s17
; SI-NEXT:    v_mov_b32_e32 v14, s18
; SI-NEXT:    v_mov_b32_e32 v15, s19
; SI-NEXT:    v_mov_b32_e32 v16, s20
; SI-NEXT:    v_mov_b32_e32 v17, s21
; SI-NEXT:    v_mov_b32_e32 v18, s22
; SI-NEXT:    v_mov_b32_e32 v19, s23
; SI-NEXT:    v_mov_b32_e32 v20, s24
; SI-NEXT:    v_mov_b32_e32 v21, s25
; SI-NEXT:    v_mov_b32_e32 v22, s26
; SI-NEXT:    v_mov_b32_e32 v23, s27
; SI-NEXT:    v_mov_b32_e32 v24, s28
; SI-NEXT:    v_mov_b32_e32 v25, s29
; SI-NEXT:    v_mov_b32_e32 v26, s42
; SI-NEXT:    v_mov_b32_e32 v27, s40
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v56i16_to_v14f64_scalar:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_store_dword v28, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    v_writelane_b32 v28, s30, 0
; VI-NEXT:    v_writelane_b32 v28, s31, 1
; VI-NEXT:    v_readfirstlane_b32 s41, v13
; VI-NEXT:    v_readfirstlane_b32 s43, v12
; VI-NEXT:    v_readfirstlane_b32 s45, v11
; VI-NEXT:    v_readfirstlane_b32 s47, v10
; VI-NEXT:    v_readfirstlane_b32 s57, v9
; VI-NEXT:    v_readfirstlane_b32 s59, v8
; VI-NEXT:    v_readfirstlane_b32 s61, v7
; VI-NEXT:    v_readfirstlane_b32 s63, v6
; VI-NEXT:    v_readfirstlane_b32 s73, v5
; VI-NEXT:    v_readfirstlane_b32 s75, v4
; VI-NEXT:    v_readfirstlane_b32 s78, v3
; VI-NEXT:    v_readfirstlane_b32 s89, v2
; VI-NEXT:    v_readfirstlane_b32 s91, v1
; VI-NEXT:    v_readfirstlane_b32 vcc_hi, v0
; VI-NEXT:    s_lshr_b32 s76, s29, 16
; VI-NEXT:    s_lshr_b32 s79, s28, 16
; VI-NEXT:    s_lshr_b32 s15, s27, 16
; VI-NEXT:    s_lshr_b32 s14, s26, 16
; VI-NEXT:    s_lshr_b32 s13, s25, 16
; VI-NEXT:    s_lshr_b32 s12, s24, 16
; VI-NEXT:    s_lshr_b32 s11, s23, 16
; VI-NEXT:    s_lshr_b32 s10, s22, 16
; VI-NEXT:    s_lshr_b32 s9, s21, 16
; VI-NEXT:    s_lshr_b32 s8, s20, 16
; VI-NEXT:    s_lshr_b32 s7, s19, 16
; VI-NEXT:    s_lshr_b32 s6, s18, 16
; VI-NEXT:    s_lshr_b32 s5, s17, 16
; VI-NEXT:    s_lshr_b32 s4, s16, 16
; VI-NEXT:    s_lshr_b32 s40, s41, 16
; VI-NEXT:    s_lshr_b32 s42, s43, 16
; VI-NEXT:    s_lshr_b32 s44, s45, 16
; VI-NEXT:    s_lshr_b32 s46, s47, 16
; VI-NEXT:    s_lshr_b32 s56, s57, 16
; VI-NEXT:    s_lshr_b32 s58, s59, 16
; VI-NEXT:    s_lshr_b32 s60, s61, 16
; VI-NEXT:    s_lshr_b32 s62, s63, 16
; VI-NEXT:    s_lshr_b32 s72, s73, 16
; VI-NEXT:    s_lshr_b32 s74, s75, 16
; VI-NEXT:    s_lshr_b32 s77, s78, 16
; VI-NEXT:    s_lshr_b32 s88, s89, 16
; VI-NEXT:    s_lshr_b32 s90, s91, 16
; VI-NEXT:    s_lshr_b32 vcc_lo, vcc_hi, 16
; VI-NEXT:    v_readfirstlane_b32 s30, v14
; VI-NEXT:    s_cmp_lg_u32 s30, 0
; VI-NEXT:    s_cbranch_scc0 .LBB51_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    s_and_b32 s16, 0xffff, s16
; VI-NEXT:    s_lshl_b32 s4, s4, 16
; VI-NEXT:    s_or_b32 s4, s16, s4
; VI-NEXT:    s_and_b32 s16, 0xffff, s17
; VI-NEXT:    s_lshl_b32 s5, s5, 16
; VI-NEXT:    s_or_b32 s5, s16, s5
; VI-NEXT:    s_and_b32 s16, 0xffff, s18
; VI-NEXT:    s_lshl_b32 s6, s6, 16
; VI-NEXT:    s_or_b32 s6, s16, s6
; VI-NEXT:    s_and_b32 s16, 0xffff, s19
; VI-NEXT:    s_lshl_b32 s7, s7, 16
; VI-NEXT:    s_or_b32 s7, s16, s7
; VI-NEXT:    s_and_b32 s16, 0xffff, s20
; VI-NEXT:    s_lshl_b32 s8, s8, 16
; VI-NEXT:    s_or_b32 s8, s16, s8
; VI-NEXT:    s_and_b32 s16, 0xffff, s21
; VI-NEXT:    s_lshl_b32 s9, s9, 16
; VI-NEXT:    s_or_b32 s9, s16, s9
; VI-NEXT:    s_and_b32 s16, 0xffff, s22
; VI-NEXT:    s_lshl_b32 s10, s10, 16
; VI-NEXT:    s_or_b32 s10, s16, s10
; VI-NEXT:    s_and_b32 s16, 0xffff, s23
; VI-NEXT:    s_lshl_b32 s11, s11, 16
; VI-NEXT:    s_or_b32 s11, s16, s11
; VI-NEXT:    s_and_b32 s16, 0xffff, s24
; VI-NEXT:    s_lshl_b32 s12, s12, 16
; VI-NEXT:    s_or_b32 s12, s16, s12
; VI-NEXT:    s_and_b32 s16, 0xffff, s25
; VI-NEXT:    s_lshl_b32 s13, s13, 16
; VI-NEXT:    s_or_b32 s13, s16, s13
; VI-NEXT:    s_and_b32 s16, 0xffff, s26
; VI-NEXT:    s_lshl_b32 s14, s14, 16
; VI-NEXT:    s_or_b32 s14, s16, s14
; VI-NEXT:    s_and_b32 s16, 0xffff, s27
; VI-NEXT:    s_lshl_b32 s15, s15, 16
; VI-NEXT:    s_or_b32 s15, s16, s15
; VI-NEXT:    s_and_b32 s16, 0xffff, s28
; VI-NEXT:    s_lshl_b32 s17, s79, 16
; VI-NEXT:    s_or_b32 s16, s16, s17
; VI-NEXT:    s_and_b32 s17, 0xffff, s29
; VI-NEXT:    s_lshl_b32 s18, s76, 16
; VI-NEXT:    s_or_b32 s17, s17, s18
; VI-NEXT:    s_and_b32 s18, 0xffff, vcc_hi
; VI-NEXT:    s_lshl_b32 s19, vcc_lo, 16
; VI-NEXT:    s_or_b32 s18, s18, s19
; VI-NEXT:    s_and_b32 s19, 0xffff, s91
; VI-NEXT:    s_lshl_b32 s20, s90, 16
; VI-NEXT:    s_or_b32 s19, s19, s20
; VI-NEXT:    s_and_b32 s20, 0xffff, s89
; VI-NEXT:    s_lshl_b32 s21, s88, 16
; VI-NEXT:    s_or_b32 s20, s20, s21
; VI-NEXT:    s_and_b32 s21, 0xffff, s78
; VI-NEXT:    s_lshl_b32 s22, s77, 16
; VI-NEXT:    s_or_b32 s21, s21, s22
; VI-NEXT:    s_and_b32 s22, 0xffff, s75
; VI-NEXT:    s_lshl_b32 s23, s74, 16
; VI-NEXT:    s_or_b32 s22, s22, s23
; VI-NEXT:    s_and_b32 s23, 0xffff, s73
; VI-NEXT:    s_lshl_b32 s24, s72, 16
; VI-NEXT:    s_or_b32 s23, s23, s24
; VI-NEXT:    s_and_b32 s24, 0xffff, s63
; VI-NEXT:    s_lshl_b32 s25, s62, 16
; VI-NEXT:    s_or_b32 s24, s24, s25
; VI-NEXT:    s_and_b32 s25, 0xffff, s61
; VI-NEXT:    s_lshl_b32 s26, s60, 16
; VI-NEXT:    s_or_b32 s25, s25, s26
; VI-NEXT:    s_and_b32 s26, 0xffff, s59
; VI-NEXT:    s_lshl_b32 s27, s58, 16
; VI-NEXT:    s_or_b32 s26, s26, s27
; VI-NEXT:    s_and_b32 s27, 0xffff, s57
; VI-NEXT:    s_lshl_b32 s28, s56, 16
; VI-NEXT:    s_or_b32 s27, s27, s28
; VI-NEXT:    s_and_b32 s28, 0xffff, s47
; VI-NEXT:    s_lshl_b32 s29, s46, 16
; VI-NEXT:    s_or_b32 s28, s28, s29
; VI-NEXT:    s_and_b32 s29, 0xffff, s45
; VI-NEXT:    s_lshl_b32 s44, s44, 16
; VI-NEXT:    s_and_b32 s43, 0xffff, s43
; VI-NEXT:    s_lshl_b32 s42, s42, 16
; VI-NEXT:    s_and_b32 s41, 0xffff, s41
; VI-NEXT:    s_lshl_b32 s40, s40, 16
; VI-NEXT:    s_or_b32 s29, s29, s44
; VI-NEXT:    s_or_b32 s42, s43, s42
; VI-NEXT:    s_or_b32 s40, s41, s40
; VI-NEXT:    s_branch .LBB51_3
; VI-NEXT:  .LBB51_2: ; %cmp.true
; VI-NEXT:    s_add_i32 s16, s16, 3
; VI-NEXT:    s_and_b32 s16, s16, 0xffff
; VI-NEXT:    s_lshl_b32 s4, s4, 16
; VI-NEXT:    s_add_i32 s17, s17, 3
; VI-NEXT:    s_or_b32 s4, s4, s16
; VI-NEXT:    s_and_b32 s16, s17, 0xffff
; VI-NEXT:    s_lshl_b32 s5, s5, 16
; VI-NEXT:    s_add_i32 s18, s18, 3
; VI-NEXT:    s_or_b32 s5, s5, s16
; VI-NEXT:    s_and_b32 s16, s18, 0xffff
; VI-NEXT:    s_lshl_b32 s6, s6, 16
; VI-NEXT:    s_add_i32 s19, s19, 3
; VI-NEXT:    s_or_b32 s6, s6, s16
; VI-NEXT:    s_and_b32 s16, s19, 0xffff
; VI-NEXT:    s_lshl_b32 s7, s7, 16
; VI-NEXT:    s_add_i32 s20, s20, 3
; VI-NEXT:    s_or_b32 s7, s7, s16
; VI-NEXT:    s_and_b32 s16, s20, 0xffff
; VI-NEXT:    s_lshl_b32 s8, s8, 16
; VI-NEXT:    s_add_i32 s21, s21, 3
; VI-NEXT:    s_or_b32 s8, s8, s16
; VI-NEXT:    s_and_b32 s16, s21, 0xffff
; VI-NEXT:    s_lshl_b32 s9, s9, 16
; VI-NEXT:    s_add_i32 s22, s22, 3
; VI-NEXT:    s_or_b32 s9, s9, s16
; VI-NEXT:    s_and_b32 s16, s22, 0xffff
; VI-NEXT:    s_lshl_b32 s10, s10, 16
; VI-NEXT:    s_add_i32 s23, s23, 3
; VI-NEXT:    s_or_b32 s10, s10, s16
; VI-NEXT:    s_and_b32 s16, s23, 0xffff
; VI-NEXT:    s_lshl_b32 s11, s11, 16
; VI-NEXT:    s_add_i32 s24, s24, 3
; VI-NEXT:    s_or_b32 s11, s11, s16
; VI-NEXT:    s_and_b32 s16, s24, 0xffff
; VI-NEXT:    s_lshl_b32 s12, s12, 16
; VI-NEXT:    s_add_i32 s25, s25, 3
; VI-NEXT:    s_or_b32 s12, s12, s16
; VI-NEXT:    s_and_b32 s16, s25, 0xffff
; VI-NEXT:    s_lshl_b32 s13, s13, 16
; VI-NEXT:    s_add_i32 s26, s26, 3
; VI-NEXT:    s_or_b32 s13, s13, s16
; VI-NEXT:    s_and_b32 s16, s26, 0xffff
; VI-NEXT:    s_lshl_b32 s14, s14, 16
; VI-NEXT:    s_add_i32 s27, s27, 3
; VI-NEXT:    s_or_b32 s14, s14, s16
; VI-NEXT:    s_and_b32 s16, s27, 0xffff
; VI-NEXT:    s_lshl_b32 s15, s15, 16
; VI-NEXT:    s_add_i32 s28, s28, 3
; VI-NEXT:    s_or_b32 s15, s15, s16
; VI-NEXT:    s_and_b32 s16, s28, 0xffff
; VI-NEXT:    s_lshl_b32 s17, s79, 16
; VI-NEXT:    s_add_i32 s29, s29, 3
; VI-NEXT:    s_or_b32 s16, s17, s16
; VI-NEXT:    s_and_b32 s17, s29, 0xffff
; VI-NEXT:    s_lshl_b32 s18, s76, 16
; VI-NEXT:    s_add_i32 vcc_hi, vcc_hi, 3
; VI-NEXT:    s_or_b32 s17, s18, s17
; VI-NEXT:    s_and_b32 s18, vcc_hi, 0xffff
; VI-NEXT:    s_lshl_b32 s19, vcc_lo, 16
; VI-NEXT:    s_add_i32 s91, s91, 3
; VI-NEXT:    s_or_b32 s18, s19, s18
; VI-NEXT:    s_and_b32 s19, s91, 0xffff
; VI-NEXT:    s_lshl_b32 s20, s90, 16
; VI-NEXT:    s_add_i32 s89, s89, 3
; VI-NEXT:    s_or_b32 s19, s20, s19
; VI-NEXT:    s_and_b32 s20, s89, 0xffff
; VI-NEXT:    s_lshl_b32 s21, s88, 16
; VI-NEXT:    s_add_i32 s78, s78, 3
; VI-NEXT:    s_or_b32 s20, s21, s20
; VI-NEXT:    s_and_b32 s21, s78, 0xffff
; VI-NEXT:    s_lshl_b32 s22, s77, 16
; VI-NEXT:    s_add_i32 s75, s75, 3
; VI-NEXT:    s_or_b32 s21, s22, s21
; VI-NEXT:    s_and_b32 s22, s75, 0xffff
; VI-NEXT:    s_lshl_b32 s23, s74, 16
; VI-NEXT:    s_add_i32 s73, s73, 3
; VI-NEXT:    s_or_b32 s22, s23, s22
; VI-NEXT:    s_and_b32 s23, s73, 0xffff
; VI-NEXT:    s_lshl_b32 s24, s72, 16
; VI-NEXT:    s_add_i32 s63, s63, 3
; VI-NEXT:    s_or_b32 s23, s24, s23
; VI-NEXT:    s_and_b32 s24, s63, 0xffff
; VI-NEXT:    s_lshl_b32 s25, s62, 16
; VI-NEXT:    s_add_i32 s61, s61, 3
; VI-NEXT:    s_or_b32 s24, s25, s24
; VI-NEXT:    s_and_b32 s25, s61, 0xffff
; VI-NEXT:    s_lshl_b32 s26, s60, 16
; VI-NEXT:    s_add_i32 s59, s59, 3
; VI-NEXT:    s_or_b32 s25, s26, s25
; VI-NEXT:    s_and_b32 s26, s59, 0xffff
; VI-NEXT:    s_lshl_b32 s27, s58, 16
; VI-NEXT:    s_add_i32 s57, s57, 3
; VI-NEXT:    s_or_b32 s26, s27, s26
; VI-NEXT:    s_and_b32 s27, s57, 0xffff
; VI-NEXT:    s_lshl_b32 s28, s56, 16
; VI-NEXT:    s_add_i32 s47, s47, 3
; VI-NEXT:    s_or_b32 s27, s28, s27
; VI-NEXT:    s_and_b32 s28, s47, 0xffff
; VI-NEXT:    s_lshl_b32 s29, s46, 16
; VI-NEXT:    s_add_i32 s45, s45, 3
; VI-NEXT:    s_add_i32 s43, s43, 3
; VI-NEXT:    s_add_i32 s41, s41, 3
; VI-NEXT:    s_or_b32 s28, s29, s28
; VI-NEXT:    s_and_b32 s29, s45, 0xffff
; VI-NEXT:    s_lshl_b32 s44, s44, 16
; VI-NEXT:    s_and_b32 s43, s43, 0xffff
; VI-NEXT:    s_lshl_b32 s42, s42, 16
; VI-NEXT:    s_and_b32 s41, s41, 0xffff
; VI-NEXT:    s_lshl_b32 s40, s40, 16
; VI-NEXT:    s_or_b32 s29, s44, s29
; VI-NEXT:    s_or_b32 s42, s42, s43
; VI-NEXT:    s_or_b32 s40, s40, s41
; VI-NEXT:    s_add_i32 s4, s4, 0x30000
; VI-NEXT:    s_add_i32 s5, s5, 0x30000
; VI-NEXT:    s_add_i32 s6, s6, 0x30000
; VI-NEXT:    s_add_i32 s7, s7, 0x30000
; VI-NEXT:    s_add_i32 s8, s8, 0x30000
; VI-NEXT:    s_add_i32 s9, s9, 0x30000
; VI-NEXT:    s_add_i32 s10, s10, 0x30000
; VI-NEXT:    s_add_i32 s11, s11, 0x30000
; VI-NEXT:    s_add_i32 s12, s12, 0x30000
; VI-NEXT:    s_add_i32 s13, s13, 0x30000
; VI-NEXT:    s_add_i32 s14, s14, 0x30000
; VI-NEXT:    s_add_i32 s15, s15, 0x30000
; VI-NEXT:    s_add_i32 s16, s16, 0x30000
; VI-NEXT:    s_add_i32 s17, s17, 0x30000
; VI-NEXT:    s_add_i32 s18, s18, 0x30000
; VI-NEXT:    s_add_i32 s19, s19, 0x30000
; VI-NEXT:    s_add_i32 s20, s20, 0x30000
; VI-NEXT:    s_add_i32 s21, s21, 0x30000
; VI-NEXT:    s_add_i32 s22, s22, 0x30000
; VI-NEXT:    s_add_i32 s23, s23, 0x30000
; VI-NEXT:    s_add_i32 s24, s24, 0x30000
; VI-NEXT:    s_add_i32 s25, s25, 0x30000
; VI-NEXT:    s_add_i32 s26, s26, 0x30000
; VI-NEXT:    s_add_i32 s27, s27, 0x30000
; VI-NEXT:    s_add_i32 s28, s28, 0x30000
; VI-NEXT:    s_add_i32 s29, s29, 0x30000
; VI-NEXT:    s_add_i32 s42, s42, 0x30000
; VI-NEXT:    s_add_i32 s40, s40, 0x30000
; VI-NEXT:  .LBB51_3: ; %end
; VI-NEXT:    v_readlane_b32 s30, v28, 0
; VI-NEXT:    v_mov_b32_e32 v0, s4
; VI-NEXT:    v_mov_b32_e32 v1, s5
; VI-NEXT:    v_mov_b32_e32 v2, s6
; VI-NEXT:    v_mov_b32_e32 v3, s7
; VI-NEXT:    v_mov_b32_e32 v4, s8
; VI-NEXT:    v_mov_b32_e32 v5, s9
; VI-NEXT:    v_mov_b32_e32 v6, s10
; VI-NEXT:    v_mov_b32_e32 v7, s11
; VI-NEXT:    v_mov_b32_e32 v8, s12
; VI-NEXT:    v_mov_b32_e32 v9, s13
; VI-NEXT:    v_mov_b32_e32 v10, s14
; VI-NEXT:    v_mov_b32_e32 v11, s15
; VI-NEXT:    v_mov_b32_e32 v12, s16
; VI-NEXT:    v_mov_b32_e32 v13, s17
; VI-NEXT:    v_mov_b32_e32 v14, s18
; VI-NEXT:    v_mov_b32_e32 v15, s19
; VI-NEXT:    v_mov_b32_e32 v16, s20
; VI-NEXT:    v_mov_b32_e32 v17, s21
; VI-NEXT:    v_mov_b32_e32 v18, s22
; VI-NEXT:    v_mov_b32_e32 v19, s23
; VI-NEXT:    v_mov_b32_e32 v20, s24
; VI-NEXT:    v_mov_b32_e32 v21, s25
; VI-NEXT:    v_mov_b32_e32 v22, s26
; VI-NEXT:    v_mov_b32_e32 v23, s27
; VI-NEXT:    v_mov_b32_e32 v24, s28
; VI-NEXT:    v_mov_b32_e32 v25, s29
; VI-NEXT:    v_mov_b32_e32 v26, s42
; VI-NEXT:    v_mov_b32_e32 v27, s40
; VI-NEXT:    v_readlane_b32 s31, v28, 1
; VI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v56i16_to_v14f64_scalar:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    s_mov_b64 exec, s[4:5]
; GFX9-NEXT:    v_writelane_b32 v32, s36, 0
; GFX9-NEXT:    v_writelane_b32 v32, s37, 1
; GFX9-NEXT:    v_writelane_b32 v32, s38, 2
; GFX9-NEXT:    v_writelane_b32 v32, s39, 3
; GFX9-NEXT:    v_writelane_b32 v32, s48, 4
; GFX9-NEXT:    v_writelane_b32 v32, s49, 5
; GFX9-NEXT:    v_writelane_b32 v32, s50, 6
; GFX9-NEXT:    v_writelane_b32 v32, s51, 7
; GFX9-NEXT:    v_writelane_b32 v32, s52, 8
; GFX9-NEXT:    v_writelane_b32 v32, s53, 9
; GFX9-NEXT:    v_writelane_b32 v32, s54, 10
; GFX9-NEXT:    v_writelane_b32 v32, s55, 11
; GFX9-NEXT:    v_readfirstlane_b32 s4, v13
; GFX9-NEXT:    v_readfirstlane_b32 s6, v12
; GFX9-NEXT:    v_readfirstlane_b32 s8, v11
; GFX9-NEXT:    v_readfirstlane_b32 s10, v10
; GFX9-NEXT:    v_readfirstlane_b32 s12, v9
; GFX9-NEXT:    v_readfirstlane_b32 s14, v8
; GFX9-NEXT:    v_readfirstlane_b32 s57, v7
; GFX9-NEXT:    v_readfirstlane_b32 s60, v6
; GFX9-NEXT:    v_readfirstlane_b32 s62, v5
; GFX9-NEXT:    v_readfirstlane_b32 s72, v4
; GFX9-NEXT:    v_readfirstlane_b32 s74, v3
; GFX9-NEXT:    v_readfirstlane_b32 s76, v2
; GFX9-NEXT:    v_readfirstlane_b32 s78, v1
; GFX9-NEXT:    v_readfirstlane_b32 s88, v0
; GFX9-NEXT:    s_lshr_b32 s56, s29, 16
; GFX9-NEXT:    s_lshr_b32 s59, s28, 16
; GFX9-NEXT:    s_lshr_b32 s47, s27, 16
; GFX9-NEXT:    s_lshr_b32 s46, s26, 16
; GFX9-NEXT:    s_lshr_b32 s45, s25, 16
; GFX9-NEXT:    s_lshr_b32 s44, s24, 16
; GFX9-NEXT:    s_lshr_b32 s43, s23, 16
; GFX9-NEXT:    s_lshr_b32 s42, s22, 16
; GFX9-NEXT:    s_lshr_b32 s41, s21, 16
; GFX9-NEXT:    s_lshr_b32 s40, s20, 16
; GFX9-NEXT:    s_lshr_b32 s90, s19, 16
; GFX9-NEXT:    s_lshr_b32 s91, s18, 16
; GFX9-NEXT:    s_lshr_b32 s92, s17, 16
; GFX9-NEXT:    s_lshr_b32 s93, s16, 16
; GFX9-NEXT:    s_lshr_b32 s5, s4, 16
; GFX9-NEXT:    s_lshr_b32 s7, s6, 16
; GFX9-NEXT:    s_lshr_b32 s9, s8, 16
; GFX9-NEXT:    s_lshr_b32 s11, s10, 16
; GFX9-NEXT:    s_lshr_b32 s13, s12, 16
; GFX9-NEXT:    s_lshr_b32 s15, s14, 16
; GFX9-NEXT:    s_lshr_b32 s58, s57, 16
; GFX9-NEXT:    s_lshr_b32 s61, s60, 16
; GFX9-NEXT:    s_lshr_b32 s63, s62, 16
; GFX9-NEXT:    s_lshr_b32 s73, s72, 16
; GFX9-NEXT:    s_lshr_b32 s75, s74, 16
; GFX9-NEXT:    s_lshr_b32 s77, s76, 16
; GFX9-NEXT:    s_lshr_b32 s79, s78, 16
; GFX9-NEXT:    s_lshr_b32 s89, s88, 16
; GFX9-NEXT:    v_readfirstlane_b32 s94, v14
; GFX9-NEXT:    s_cmp_lg_u32 s94, 0
; GFX9-NEXT:    s_cbranch_scc0 .LBB51_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    s_pack_ll_b32_b16 s36, s16, s93
; GFX9-NEXT:    s_pack_ll_b32_b16 s37, s17, s92
; GFX9-NEXT:    s_pack_ll_b32_b16 s38, s18, s91
; GFX9-NEXT:    s_pack_ll_b32_b16 s39, s19, s90
; GFX9-NEXT:    s_pack_ll_b32_b16 s40, s20, s40
; GFX9-NEXT:    s_pack_ll_b32_b16 s41, s21, s41
; GFX9-NEXT:    s_pack_ll_b32_b16 s42, s22, s42
; GFX9-NEXT:    s_pack_ll_b32_b16 s43, s23, s43
; GFX9-NEXT:    s_pack_ll_b32_b16 s44, s24, s44
; GFX9-NEXT:    s_pack_ll_b32_b16 s45, s25, s45
; GFX9-NEXT:    s_pack_ll_b32_b16 s46, s26, s46
; GFX9-NEXT:    s_pack_ll_b32_b16 s47, s27, s47
; GFX9-NEXT:    s_pack_ll_b32_b16 s48, s28, s59
; GFX9-NEXT:    s_pack_ll_b32_b16 s49, s29, s56
; GFX9-NEXT:    s_pack_ll_b32_b16 s50, s88, s89
; GFX9-NEXT:    s_pack_ll_b32_b16 s51, s78, s79
; GFX9-NEXT:    s_pack_ll_b32_b16 s52, s76, s77
; GFX9-NEXT:    s_pack_ll_b32_b16 s53, s74, s75
; GFX9-NEXT:    s_pack_ll_b32_b16 s54, s72, s73
; GFX9-NEXT:    s_pack_ll_b32_b16 s55, s62, s63
; GFX9-NEXT:    s_pack_ll_b32_b16 s56, s60, s61
; GFX9-NEXT:    s_pack_ll_b32_b16 s57, s57, s58
; GFX9-NEXT:    s_pack_ll_b32_b16 s58, s14, s15
; GFX9-NEXT:    s_pack_ll_b32_b16 s59, s12, s13
; GFX9-NEXT:    s_pack_ll_b32_b16 s60, s10, s11
; GFX9-NEXT:    s_pack_ll_b32_b16 s61, s8, s9
; GFX9-NEXT:    s_pack_ll_b32_b16 s62, s6, s7
; GFX9-NEXT:    s_pack_ll_b32_b16 s63, s4, s5
; GFX9-NEXT:    v_mov_b32_e32 v0, s36
; GFX9-NEXT:    v_mov_b32_e32 v1, s37
; GFX9-NEXT:    v_mov_b32_e32 v2, s38
; GFX9-NEXT:    v_mov_b32_e32 v3, s39
; GFX9-NEXT:    v_mov_b32_e32 v4, s40
; GFX9-NEXT:    v_mov_b32_e32 v5, s41
; GFX9-NEXT:    v_mov_b32_e32 v6, s42
; GFX9-NEXT:    v_mov_b32_e32 v7, s43
; GFX9-NEXT:    v_mov_b32_e32 v8, s44
; GFX9-NEXT:    v_mov_b32_e32 v9, s45
; GFX9-NEXT:    v_mov_b32_e32 v10, s46
; GFX9-NEXT:    v_mov_b32_e32 v11, s47
; GFX9-NEXT:    v_mov_b32_e32 v12, s48
; GFX9-NEXT:    v_mov_b32_e32 v13, s49
; GFX9-NEXT:    v_mov_b32_e32 v14, s50
; GFX9-NEXT:    v_mov_b32_e32 v15, s51
; GFX9-NEXT:    v_mov_b32_e32 v16, s52
; GFX9-NEXT:    v_mov_b32_e32 v17, s53
; GFX9-NEXT:    v_mov_b32_e32 v18, s54
; GFX9-NEXT:    v_mov_b32_e32 v19, s55
; GFX9-NEXT:    v_mov_b32_e32 v20, s56
; GFX9-NEXT:    v_mov_b32_e32 v21, s57
; GFX9-NEXT:    v_mov_b32_e32 v22, s58
; GFX9-NEXT:    v_mov_b32_e32 v23, s59
; GFX9-NEXT:    v_mov_b32_e32 v24, s60
; GFX9-NEXT:    v_mov_b32_e32 v25, s61
; GFX9-NEXT:    v_mov_b32_e32 v26, s62
; GFX9-NEXT:    v_mov_b32_e32 v27, s63
; GFX9-NEXT:    v_mov_b32_e32 v28, s64
; GFX9-NEXT:    v_mov_b32_e32 v29, s65
; GFX9-NEXT:    v_mov_b32_e32 v30, s66
; GFX9-NEXT:    v_mov_b32_e32 v31, s67
; GFX9-NEXT:    s_branch .LBB51_3
; GFX9-NEXT:  .LBB51_2: ; %cmp.true
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s16, s93
; GFX9-NEXT:    v_pk_add_u16 v0, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s18, s91
; GFX9-NEXT:    v_pk_add_u16 v2, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s19, s90
; GFX9-NEXT:    v_pk_add_u16 v3, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s20, s40
; GFX9-NEXT:    v_pk_add_u16 v4, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s21, s41
; GFX9-NEXT:    v_pk_add_u16 v5, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s22, s42
; GFX9-NEXT:    v_pk_add_u16 v6, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s23, s43
; GFX9-NEXT:    v_pk_add_u16 v7, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s24, s44
; GFX9-NEXT:    v_pk_add_u16 v8, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s25, s45
; GFX9-NEXT:    v_pk_add_u16 v9, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s26, s46
; GFX9-NEXT:    v_pk_add_u16 v10, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s27, s47
; GFX9-NEXT:    v_pk_add_u16 v11, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s28, s59
; GFX9-NEXT:    v_pk_add_u16 v12, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s29, s56
; GFX9-NEXT:    v_pk_add_u16 v13, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s88, s89
; GFX9-NEXT:    v_pk_add_u16 v14, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s78, s79
; GFX9-NEXT:    v_pk_add_u16 v15, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s76, s77
; GFX9-NEXT:    v_pk_add_u16 v16, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s74, s75
; GFX9-NEXT:    v_pk_add_u16 v17, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s72, s73
; GFX9-NEXT:    v_pk_add_u16 v18, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s62, s63
; GFX9-NEXT:    v_pk_add_u16 v19, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s60, s61
; GFX9-NEXT:    s_pack_ll_b32_b16 s17, s17, s92
; GFX9-NEXT:    v_pk_add_u16 v20, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s57, s58
; GFX9-NEXT:    s_pack_ll_b32_b16 s14, s14, s15
; GFX9-NEXT:    s_pack_ll_b32_b16 s12, s12, s13
; GFX9-NEXT:    s_pack_ll_b32_b16 s10, s10, s11
; GFX9-NEXT:    s_pack_ll_b32_b16 s8, s8, s9
; GFX9-NEXT:    s_pack_ll_b32_b16 s6, s6, s7
; GFX9-NEXT:    s_pack_ll_b32_b16 s4, s4, s5
; GFX9-NEXT:    v_pk_add_u16 v1, s17, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v21, s16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v22, s14, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v23, s12, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v24, s10, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v25, s8, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v26, s6, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v27, s4, 3 op_sel_hi:[1,0]
; GFX9-NEXT:  .LBB51_3: ; %end
; GFX9-NEXT:    v_readlane_b32 s55, v32, 11
; GFX9-NEXT:    v_readlane_b32 s54, v32, 10
; GFX9-NEXT:    v_readlane_b32 s53, v32, 9
; GFX9-NEXT:    v_readlane_b32 s52, v32, 8
; GFX9-NEXT:    v_readlane_b32 s51, v32, 7
; GFX9-NEXT:    v_readlane_b32 s50, v32, 6
; GFX9-NEXT:    v_readlane_b32 s49, v32, 5
; GFX9-NEXT:    v_readlane_b32 s48, v32, 4
; GFX9-NEXT:    v_readlane_b32 s39, v32, 3
; GFX9-NEXT:    v_readlane_b32 s38, v32, 2
; GFX9-NEXT:    v_readlane_b32 s37, v32, 1
; GFX9-NEXT:    v_readlane_b32 s36, v32, 0
; GFX9-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    s_mov_b64 exec, s[4:5]
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v56i16_to_v14f64_scalar:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_readfirstlane_b32 s40, v9
; GFX11-NEXT:    v_readfirstlane_b32 s42, v8
; GFX11-NEXT:    v_readfirstlane_b32 s43, v7
; GFX11-NEXT:    v_readfirstlane_b32 s46, v6
; GFX11-NEXT:    v_readfirstlane_b32 s57, v5
; GFX11-NEXT:    v_readfirstlane_b32 s59, v4
; GFX11-NEXT:    v_readfirstlane_b32 s62, v3
; GFX11-NEXT:    v_readfirstlane_b32 s63, v2
; GFX11-NEXT:    v_readfirstlane_b32 s73, v1
; GFX11-NEXT:    v_readfirstlane_b32 s75, v0
; GFX11-NEXT:    v_readfirstlane_b32 s90, v10
; GFX11-NEXT:    s_lshr_b32 s88, s1, 16
; GFX11-NEXT:    s_lshr_b32 s89, s0, 16
; GFX11-NEXT:    s_lshr_b32 s44, s29, 16
; GFX11-NEXT:    s_lshr_b32 s47, s28, 16
; GFX11-NEXT:    s_lshr_b32 s15, s27, 16
; GFX11-NEXT:    s_lshr_b32 s14, s26, 16
; GFX11-NEXT:    s_lshr_b32 s13, s25, 16
; GFX11-NEXT:    s_lshr_b32 s12, s24, 16
; GFX11-NEXT:    s_lshr_b32 s11, s23, 16
; GFX11-NEXT:    s_lshr_b32 s10, s22, 16
; GFX11-NEXT:    s_lshr_b32 s9, s21, 16
; GFX11-NEXT:    s_lshr_b32 s8, s20, 16
; GFX11-NEXT:    s_lshr_b32 s7, s19, 16
; GFX11-NEXT:    s_lshr_b32 s6, s18, 16
; GFX11-NEXT:    s_lshr_b32 s5, s17, 16
; GFX11-NEXT:    s_lshr_b32 s4, s16, 16
; GFX11-NEXT:    s_lshr_b32 s78, s3, 16
; GFX11-NEXT:    s_lshr_b32 s79, s2, 16
; GFX11-NEXT:    s_lshr_b32 s41, s40, 16
; GFX11-NEXT:    s_lshr_b32 s45, s42, 16
; GFX11-NEXT:    s_lshr_b32 s56, s43, 16
; GFX11-NEXT:    s_lshr_b32 s58, s46, 16
; GFX11-NEXT:    s_lshr_b32 s60, s57, 16
; GFX11-NEXT:    s_lshr_b32 s61, s59, 16
; GFX11-NEXT:    s_lshr_b32 s72, s62, 16
; GFX11-NEXT:    s_lshr_b32 s74, s63, 16
; GFX11-NEXT:    s_lshr_b32 s76, s73, 16
; GFX11-NEXT:    s_lshr_b32 s77, s75, 16
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s0, s89
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s1, s88
; GFX11-NEXT:    s_cmp_lg_u32 s90, 0
; GFX11-NEXT:    s_cbranch_scc0 .LBB51_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-NEXT:    s_pack_ll_b32_b16 s2, s2, s79
; GFX11-NEXT:    s_pack_ll_b32_b16 s3, s3, s78
; GFX11-NEXT:    s_pack_ll_b32_b16 s4, s16, s4
; GFX11-NEXT:    s_pack_ll_b32_b16 s5, s17, s5
; GFX11-NEXT:    s_pack_ll_b32_b16 s6, s18, s6
; GFX11-NEXT:    s_pack_ll_b32_b16 s7, s19, s7
; GFX11-NEXT:    s_pack_ll_b32_b16 s8, s20, s8
; GFX11-NEXT:    s_pack_ll_b32_b16 s9, s21, s9
; GFX11-NEXT:    s_pack_ll_b32_b16 s10, s22, s10
; GFX11-NEXT:    s_pack_ll_b32_b16 s11, s23, s11
; GFX11-NEXT:    s_pack_ll_b32_b16 s12, s24, s12
; GFX11-NEXT:    s_pack_ll_b32_b16 s13, s25, s13
; GFX11-NEXT:    s_pack_ll_b32_b16 s14, s26, s14
; GFX11-NEXT:    s_pack_ll_b32_b16 s15, s27, s15
; GFX11-NEXT:    s_pack_ll_b32_b16 s16, s28, s47
; GFX11-NEXT:    s_pack_ll_b32_b16 s17, s29, s44
; GFX11-NEXT:    s_pack_ll_b32_b16 s18, s75, s77
; GFX11-NEXT:    s_pack_ll_b32_b16 s19, s73, s76
; GFX11-NEXT:    s_pack_ll_b32_b16 s20, s63, s74
; GFX11-NEXT:    s_pack_ll_b32_b16 s21, s62, s72
; GFX11-NEXT:    s_pack_ll_b32_b16 s22, s59, s61
; GFX11-NEXT:    s_pack_ll_b32_b16 s23, s57, s60
; GFX11-NEXT:    s_pack_ll_b32_b16 s24, s46, s58
; GFX11-NEXT:    s_pack_ll_b32_b16 s25, s43, s56
; GFX11-NEXT:    s_pack_ll_b32_b16 s26, s42, s45
; GFX11-NEXT:    s_pack_ll_b32_b16 s27, s40, s41
; GFX11-NEXT:    v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX11-NEXT:    v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; GFX11-NEXT:    v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
; GFX11-NEXT:    v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
; GFX11-NEXT:    v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
; GFX11-NEXT:    v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
; GFX11-NEXT:    v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
; GFX11-NEXT:    v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
; GFX11-NEXT:    v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
; GFX11-NEXT:    v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
; GFX11-NEXT:    v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
; GFX11-NEXT:    v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
; GFX11-NEXT:    v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
; GFX11-NEXT:    v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
; GFX11-NEXT:    v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
; GFX11-NEXT:    v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
; GFX11-NEXT:    s_setpc_b64 s[30:31]
; GFX11-NEXT:  .LBB51_2: ; %cmp.true
; GFX11-NEXT:    v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s2, s79
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s3, s78
; GFX11-NEXT:    v_pk_add_u16 v2, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v3, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s16, s4
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s17, s5
; GFX11-NEXT:    v_pk_add_u16 v4, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v5, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s18, s6
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s19, s7
; GFX11-NEXT:    v_pk_add_u16 v6, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v7, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s20, s8
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s21, s9
; GFX11-NEXT:    v_pk_add_u16 v8, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v9, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s22, s10
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s23, s11
; GFX11-NEXT:    v_pk_add_u16 v10, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v11, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s24, s12
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s25, s13
; GFX11-NEXT:    v_pk_add_u16 v12, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v13, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s26, s14
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s27, s15
; GFX11-NEXT:    v_pk_add_u16 v14, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v15, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s28, s47
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s29, s44
; GFX11-NEXT:    v_pk_add_u16 v16, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v17, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s75, s77
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s73, s76
; GFX11-NEXT:    v_pk_add_u16 v18, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v19, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s63, s74
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s62, s72
; GFX11-NEXT:    v_pk_add_u16 v20, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v21, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s59, s61
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s57, s60
; GFX11-NEXT:    v_pk_add_u16 v22, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v23, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s46, s58
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s43, s56
; GFX11-NEXT:    v_pk_add_u16 v24, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v25, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s42, s45
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s40, s41
; GFX11-NEXT:    v_pk_add_u16 v26, s0, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_u16 v27, s1, 3 op_sel_hi:[1,0]
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = add <56 x i16> %a, splat (i16 3)
  %a2 = bitcast <56 x i16> %a1 to <14 x double>
  br label %end

cmp.false:
  %a3 = bitcast <56 x i16> %a to <14 x double>
  br label %end

end:
  %phi = phi <14 x double> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <14 x double> %phi
}

define <56 x half> @bitcast_v14f64_to_v56f16(<14 x double> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v14f64_to_v56f16:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT:    ; implicit-def: $vgpr40
; SI-NEXT:    ; implicit-def: $vgpr47
; SI-NEXT:    ; implicit-def: $vgpr53
; SI-NEXT:    ; implicit-def: $vgpr46
; SI-NEXT:    ; implicit-def: $vgpr50
; SI-NEXT:    ; implicit-def: $vgpr45
; SI-NEXT:    ; implicit-def: $vgpr39
; SI-NEXT:    ; implicit-def: $vgpr44
; SI-NEXT:    ; implicit-def: $vgpr37
; SI-NEXT:    ; implicit-def: $vgpr43
; SI-NEXT:    ; implicit-def: $vgpr36
; SI-NEXT:    ; implicit-def: $vgpr42
; SI-NEXT:    ; implicit-def: $vgpr35
; SI-NEXT:    ; implicit-def: $vgpr41
; SI-NEXT:    ; implicit-def: $vgpr34
; SI-NEXT:    ; implicit-def: $vgpr55
; SI-NEXT:    ; implicit-def: $vgpr33
; SI-NEXT:    ; implicit-def: $vgpr54
; SI-NEXT:    ; implicit-def: $vgpr32
; SI-NEXT:    ; implicit-def: $vgpr52
; SI-NEXT:    ; implicit-def: $vgpr31
; SI-NEXT:    ; implicit-def: $vgpr51
; SI-NEXT:    ; implicit-def: $vgpr30
; SI-NEXT:    ; implicit-def: $vgpr49
; SI-NEXT:    ; implicit-def: $vgpr29
; SI-NEXT:    ; implicit-def: $vgpr48
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr38
; SI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB52_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    v_alignbit_b32 v28, v27, v26, 16
; SI-NEXT:    v_alignbit_b32 v29, v25, v24, 16
; SI-NEXT:    v_alignbit_b32 v30, v23, v22, 16
; SI-NEXT:    v_alignbit_b32 v31, v21, v20, 16
; SI-NEXT:    v_alignbit_b32 v32, v19, v18, 16
; SI-NEXT:    v_alignbit_b32 v33, v17, v16, 16
; SI-NEXT:    v_alignbit_b32 v34, v15, v14, 16
; SI-NEXT:    v_alignbit_b32 v35, v13, v12, 16
; SI-NEXT:    v_alignbit_b32 v36, v11, v10, 16
; SI-NEXT:    v_alignbit_b32 v37, v9, v8, 16
; SI-NEXT:    v_alignbit_b32 v39, v7, v6, 16
; SI-NEXT:    v_alignbit_b32 v50, v5, v4, 16
; SI-NEXT:    v_alignbit_b32 v53, v3, v2, 16
; SI-NEXT:    v_alignbit_b32 v40, v1, v0, 16
; SI-NEXT:    v_lshrrev_b32_e32 v38, 16, v27
; SI-NEXT:    v_lshrrev_b32_e32 v48, 16, v25
; SI-NEXT:    v_lshrrev_b32_e32 v49, 16, v23
; SI-NEXT:    v_lshrrev_b32_e32 v51, 16, v21
; SI-NEXT:    v_lshrrev_b32_e32 v52, 16, v19
; SI-NEXT:    v_lshrrev_b32_e32 v54, 16, v17
; SI-NEXT:    v_lshrrev_b32_e32 v55, 16, v15
; SI-NEXT:    s_waitcnt expcnt(6)
; SI-NEXT:    v_lshrrev_b32_e32 v41, 16, v13
; SI-NEXT:    s_waitcnt expcnt(5)
; SI-NEXT:    v_lshrrev_b32_e32 v42, 16, v11
; SI-NEXT:    s_waitcnt expcnt(4)
; SI-NEXT:    v_lshrrev_b32_e32 v43, 16, v9
; SI-NEXT:    s_waitcnt expcnt(3)
; SI-NEXT:    v_lshrrev_b32_e32 v44, 16, v7
; SI-NEXT:    s_waitcnt expcnt(2)
; SI-NEXT:    v_lshrrev_b32_e32 v45, 16, v5
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v46, 16, v3
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v47, 16, v1
; SI-NEXT:  .LBB52_2: ; %Flow
; SI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB52_4
; SI-NEXT:  ; %bb.3: ; %cmp.true
; SI-NEXT:    v_add_f64 v[0:1], v[0:1], 1.0
; SI-NEXT:    v_add_f64 v[2:3], v[2:3], 1.0
; SI-NEXT:    v_add_f64 v[4:5], v[4:5], 1.0
; SI-NEXT:    v_add_f64 v[6:7], v[6:7], 1.0
; SI-NEXT:    v_add_f64 v[8:9], v[8:9], 1.0
; SI-NEXT:    v_add_f64 v[10:11], v[10:11], 1.0
; SI-NEXT:    v_add_f64 v[12:13], v[12:13], 1.0
; SI-NEXT:    v_add_f64 v[14:15], v[14:15], 1.0
; SI-NEXT:    v_add_f64 v[16:17], v[16:17], 1.0
; SI-NEXT:    v_add_f64 v[18:19], v[18:19], 1.0
; SI-NEXT:    v_add_f64 v[20:21], v[20:21], 1.0
; SI-NEXT:    v_add_f64 v[22:23], v[22:23], 1.0
; SI-NEXT:    v_add_f64 v[26:27], v[26:27], 1.0
; SI-NEXT:    v_add_f64 v[24:25], v[24:25], 1.0
; SI-NEXT:    v_alignbit_b32 v28, v27, v26, 16
; SI-NEXT:    v_alignbit_b32 v29, v25, v24, 16
; SI-NEXT:    v_alignbit_b32 v30, v23, v22, 16
; SI-NEXT:    v_alignbit_b32 v31, v21, v20, 16
; SI-NEXT:    v_alignbit_b32 v32, v19, v18, 16
; SI-NEXT:    v_alignbit_b32 v33, v17, v16, 16
; SI-NEXT:    v_alignbit_b32 v34, v15, v14, 16
; SI-NEXT:    v_alignbit_b32 v35, v13, v12, 16
; SI-NEXT:    v_alignbit_b32 v36, v11, v10, 16
; SI-NEXT:    v_alignbit_b32 v37, v9, v8, 16
; SI-NEXT:    v_alignbit_b32 v39, v7, v6, 16
; SI-NEXT:    v_alignbit_b32 v50, v5, v4, 16
; SI-NEXT:    v_alignbit_b32 v53, v3, v2, 16
; SI-NEXT:    v_alignbit_b32 v40, v1, v0, 16
; SI-NEXT:    v_lshrrev_b32_e32 v38, 16, v27
; SI-NEXT:    v_lshrrev_b32_e32 v48, 16, v25
; SI-NEXT:    v_lshrrev_b32_e32 v49, 16, v23
; SI-NEXT:    v_lshrrev_b32_e32 v51, 16, v21
; SI-NEXT:    v_lshrrev_b32_e32 v52, 16, v19
; SI-NEXT:    v_lshrrev_b32_e32 v54, 16, v17
; SI-NEXT:    v_lshrrev_b32_e32 v55, 16, v15
; SI-NEXT:    s_waitcnt expcnt(6)
; SI-NEXT:    v_lshrrev_b32_e32 v41, 16, v13
; SI-NEXT:    s_waitcnt expcnt(5)
; SI-NEXT:    v_lshrrev_b32_e32 v42, 16, v11
; SI-NEXT:    s_waitcnt expcnt(4)
; SI-NEXT:    v_lshrrev_b32_e32 v43, 16, v9
; SI-NEXT:    s_waitcnt expcnt(3)
; SI-NEXT:    v_lshrrev_b32_e32 v44, 16, v7
; SI-NEXT:    s_waitcnt expcnt(2)
; SI-NEXT:    v_lshrrev_b32_e32 v45, 16, v5
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v46, 16, v3
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v47, 16, v1
; SI-NEXT:  .LBB52_4: ; %end
; SI-NEXT:    s_or_b64 exec, exec, s[4:5]
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT:    v_lshlrev_b32_e32 v40, 16, v40
; SI-NEXT:    v_or_b32_e32 v0, v0, v40
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT:    v_lshlrev_b32_e32 v40, 16, v47
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT:    v_lshlrev_b32_e32 v53, 16, v53
; SI-NEXT:    v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT:    v_lshlrev_b32_e32 v50, 16, v50
; SI-NEXT:    v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT:    v_lshlrev_b32_e32 v39, 16, v39
; SI-NEXT:    v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT:    v_lshlrev_b32_e32 v37, 16, v37
; SI-NEXT:    v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT:    v_lshlrev_b32_e32 v36, 16, v36
; SI-NEXT:    v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; SI-NEXT:    v_or_b32_e32 v1, v1, v40
; SI-NEXT:    v_or_b32_e32 v2, v2, v53
; SI-NEXT:    v_lshlrev_b32_e32 v53, 16, v46
; SI-NEXT:    v_or_b32_e32 v4, v4, v50
; SI-NEXT:    v_lshlrev_b32_e32 v50, 16, v45
; SI-NEXT:    v_or_b32_e32 v6, v6, v39
; SI-NEXT:    v_lshlrev_b32_e32 v39, 16, v44
; SI-NEXT:    v_or_b32_e32 v8, v8, v37
; SI-NEXT:    v_lshlrev_b32_e32 v37, 16, v43
; SI-NEXT:    v_or_b32_e32 v10, v10, v36
; SI-NEXT:    v_lshlrev_b32_e32 v36, 16, v42
; SI-NEXT:    v_or_b32_e32 v12, v12, v35
; SI-NEXT:    v_lshlrev_b32_e32 v35, 16, v41
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; SI-NEXT:    v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT:    v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT:    v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; SI-NEXT:    v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT:    v_lshlrev_b32_e32 v32, 16, v32
; SI-NEXT:    v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT:    v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT:    v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; SI-NEXT:    v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; SI-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; SI-NEXT:    v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT:    v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT:    v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT:    v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT:    v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT:    v_and_b32_e32 v13, 0xffff, v13
; SI-NEXT:    v_or_b32_e32 v14, v14, v34
; SI-NEXT:    v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT:    v_lshlrev_b32_e32 v34, 16, v55
; SI-NEXT:    v_or_b32_e32 v16, v16, v33
; SI-NEXT:    v_and_b32_e32 v17, 0xffff, v17
; SI-NEXT:    v_lshlrev_b32_e32 v33, 16, v54
; SI-NEXT:    v_or_b32_e32 v18, v18, v32
; SI-NEXT:    v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT:    v_lshlrev_b32_e32 v32, 16, v52
; SI-NEXT:    v_or_b32_e32 v20, v20, v31
; SI-NEXT:    v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT:    v_lshlrev_b32_e32 v31, 16, v51
; SI-NEXT:    v_or_b32_e32 v22, v22, v30
; SI-NEXT:    v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v49
; SI-NEXT:    v_or_b32_e32 v24, v24, v29
; SI-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v48
; SI-NEXT:    v_or_b32_e32 v26, v26, v28
; SI-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v38
; SI-NEXT:    v_or_b32_e32 v3, v3, v53
; SI-NEXT:    v_or_b32_e32 v5, v5, v50
; SI-NEXT:    v_or_b32_e32 v7, v7, v39
; SI-NEXT:    v_or_b32_e32 v9, v9, v37
; SI-NEXT:    v_or_b32_e32 v11, v11, v36
; SI-NEXT:    v_or_b32_e32 v13, v13, v35
; SI-NEXT:    v_or_b32_e32 v15, v15, v34
; SI-NEXT:    v_or_b32_e32 v17, v17, v33
; SI-NEXT:    v_or_b32_e32 v19, v19, v32
; SI-NEXT:    v_or_b32_e32 v21, v21, v31
; SI-NEXT:    v_or_b32_e32 v23, v23, v30
; SI-NEXT:    v_or_b32_e32 v25, v25, v29
; SI-NEXT:    v_or_b32_e32 v27, v27, v28
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v14f64_to_v56f16:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT:    ; implicit-def: $vgpr47
; VI-NEXT:    ; implicit-def: $vgpr46
; VI-NEXT:    ; implicit-def: $vgpr45
; VI-NEXT:    ; implicit-def: $vgpr44
; VI-NEXT:    ; implicit-def: $vgpr43
; VI-NEXT:    ; implicit-def: $vgpr42
; VI-NEXT:    ; implicit-def: $vgpr41
; VI-NEXT:    ; implicit-def: $vgpr40
; VI-NEXT:    ; implicit-def: $vgpr55
; VI-NEXT:    ; implicit-def: $vgpr54
; VI-NEXT:    ; implicit-def: $vgpr53
; VI-NEXT:    ; implicit-def: $vgpr52
; VI-NEXT:    ; implicit-def: $vgpr51
; VI-NEXT:    ; implicit-def: $vgpr50
; VI-NEXT:    ; implicit-def: $vgpr49
; VI-NEXT:    ; implicit-def: $vgpr48
; VI-NEXT:    ; implicit-def: $vgpr39
; VI-NEXT:    ; implicit-def: $vgpr38
; VI-NEXT:    ; implicit-def: $vgpr37
; VI-NEXT:    ; implicit-def: $vgpr36
; VI-NEXT:    ; implicit-def: $vgpr35
; VI-NEXT:    ; implicit-def: $vgpr34
; VI-NEXT:    ; implicit-def: $vgpr33
; VI-NEXT:    ; implicit-def: $vgpr32
; VI-NEXT:    ; implicit-def: $vgpr31
; VI-NEXT:    ; implicit-def: $vgpr30
; VI-NEXT:    ; implicit-def: $vgpr29
; VI-NEXT:    ; implicit-def: $vgpr28
; VI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB52_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; VI-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; VI-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; VI-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; VI-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; VI-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; VI-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; VI-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; VI-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; VI-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; VI-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; VI-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; VI-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; VI-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; VI-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; VI-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; VI-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; VI-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; VI-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; VI-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; VI-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; VI-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; VI-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; VI-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; VI-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; VI-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; VI-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; VI-NEXT:  .LBB52_2: ; %Flow
; VI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB52_4
; VI-NEXT:  ; %bb.3: ; %cmp.true
; VI-NEXT:    v_add_f64 v[26:27], v[26:27], 1.0
; VI-NEXT:    v_add_f64 v[24:25], v[24:25], 1.0
; VI-NEXT:    v_add_f64 v[22:23], v[22:23], 1.0
; VI-NEXT:    v_add_f64 v[20:21], v[20:21], 1.0
; VI-NEXT:    v_add_f64 v[18:19], v[18:19], 1.0
; VI-NEXT:    v_add_f64 v[16:17], v[16:17], 1.0
; VI-NEXT:    v_add_f64 v[14:15], v[14:15], 1.0
; VI-NEXT:    v_add_f64 v[12:13], v[12:13], 1.0
; VI-NEXT:    v_add_f64 v[10:11], v[10:11], 1.0
; VI-NEXT:    v_add_f64 v[8:9], v[8:9], 1.0
; VI-NEXT:    v_add_f64 v[6:7], v[6:7], 1.0
; VI-NEXT:    v_add_f64 v[4:5], v[4:5], 1.0
; VI-NEXT:    v_add_f64 v[2:3], v[2:3], 1.0
; VI-NEXT:    v_add_f64 v[0:1], v[0:1], 1.0
; VI-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; VI-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; VI-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; VI-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; VI-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; VI-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; VI-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; VI-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; VI-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; VI-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; VI-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; VI-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; VI-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; VI-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; VI-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; VI-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; VI-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; VI-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; VI-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; VI-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; VI-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; VI-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; VI-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; VI-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; VI-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; VI-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; VI-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; VI-NEXT:  .LBB52_4: ; %end
; VI-NEXT:    s_or_b64 exec, exec, s[4:5]
; VI-NEXT:    v_lshlrev_b32_e32 v47, 16, v47
; VI-NEXT:    v_lshlrev_b32_e32 v46, 16, v46
; VI-NEXT:    v_lshlrev_b32_e32 v45, 16, v45
; VI-NEXT:    v_lshlrev_b32_e32 v44, 16, v44
; VI-NEXT:    v_lshlrev_b32_e32 v43, 16, v43
; VI-NEXT:    v_lshlrev_b32_e32 v42, 16, v42
; VI-NEXT:    v_lshlrev_b32_e32 v41, 16, v41
; VI-NEXT:    v_lshlrev_b32_e32 v40, 16, v40
; VI-NEXT:    v_or_b32_sdwa v0, v0, v47 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v1, v1, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v2, v2, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v3, v3, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v4, v4, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v5, v5, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v6, v6, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v7, v7, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; VI-NEXT:    v_lshlrev_b32_e32 v55, 16, v55
; VI-NEXT:    v_lshlrev_b32_e32 v54, 16, v54
; VI-NEXT:    v_lshlrev_b32_e32 v53, 16, v53
; VI-NEXT:    v_lshlrev_b32_e32 v52, 16, v52
; VI-NEXT:    v_lshlrev_b32_e32 v51, 16, v51
; VI-NEXT:    v_lshlrev_b32_e32 v50, 16, v50
; VI-NEXT:    v_lshlrev_b32_e32 v49, 16, v49
; VI-NEXT:    v_lshlrev_b32_e32 v48, 16, v48
; VI-NEXT:    v_lshlrev_b32_e32 v39, 16, v39
; VI-NEXT:    v_lshlrev_b32_e32 v38, 16, v38
; VI-NEXT:    v_lshlrev_b32_e32 v37, 16, v37
; VI-NEXT:    v_lshlrev_b32_e32 v36, 16, v36
; VI-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v34
; VI-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; VI-NEXT:    v_lshlrev_b32_e32 v32, 16, v32
; VI-NEXT:    v_lshlrev_b32_e32 v31, 16, v31
; VI-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; VI-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; VI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; VI-NEXT:    v_or_b32_sdwa v8, v8, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v9, v9, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v10, v10, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v11, v11, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v12, v12, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v13, v13, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v14, v14, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v15, v15, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v16, v16, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v17, v17, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v18, v18, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v19, v19, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v20, v20, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v21, v21, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v22, v22, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v23, v23, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v24, v24, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v25, v25, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v26, v26, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v14f64_to_v56f16:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT:    ; implicit-def: $vgpr47
; GFX9-NEXT:    ; implicit-def: $vgpr46
; GFX9-NEXT:    ; implicit-def: $vgpr45
; GFX9-NEXT:    ; implicit-def: $vgpr44
; GFX9-NEXT:    ; implicit-def: $vgpr43
; GFX9-NEXT:    ; implicit-def: $vgpr42
; GFX9-NEXT:    ; implicit-def: $vgpr41
; GFX9-NEXT:    ; implicit-def: $vgpr40
; GFX9-NEXT:    ; implicit-def: $vgpr55
; GFX9-NEXT:    ; implicit-def: $vgpr54
; GFX9-NEXT:    ; implicit-def: $vgpr53
; GFX9-NEXT:    ; implicit-def: $vgpr52
; GFX9-NEXT:    ; implicit-def: $vgpr51
; GFX9-NEXT:    ; implicit-def: $vgpr50
; GFX9-NEXT:    ; implicit-def: $vgpr49
; GFX9-NEXT:    ; implicit-def: $vgpr48
; GFX9-NEXT:    ; implicit-def: $vgpr39
; GFX9-NEXT:    ; implicit-def: $vgpr38
; GFX9-NEXT:    ; implicit-def: $vgpr37
; GFX9-NEXT:    ; implicit-def: $vgpr36
; GFX9-NEXT:    ; implicit-def: $vgpr35
; GFX9-NEXT:    ; implicit-def: $vgpr34
; GFX9-NEXT:    ; implicit-def: $vgpr33
; GFX9-NEXT:    ; implicit-def: $vgpr32
; GFX9-NEXT:    ; implicit-def: $vgpr31
; GFX9-NEXT:    ; implicit-def: $vgpr30
; GFX9-NEXT:    ; implicit-def: $vgpr29
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB52_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX9-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX9-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX9-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX9-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX9-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX9-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX9-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX9-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX9-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX9-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX9-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX9-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX9-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX9-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX9-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX9-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; GFX9-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; GFX9-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; GFX9-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; GFX9-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; GFX9-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; GFX9-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; GFX9-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; GFX9-NEXT:  .LBB52_2: ; %Flow
; GFX9-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB52_4
; GFX9-NEXT:  ; %bb.3: ; %cmp.true
; GFX9-NEXT:    v_add_f64 v[26:27], v[26:27], 1.0
; GFX9-NEXT:    v_add_f64 v[24:25], v[24:25], 1.0
; GFX9-NEXT:    v_add_f64 v[22:23], v[22:23], 1.0
; GFX9-NEXT:    v_add_f64 v[20:21], v[20:21], 1.0
; GFX9-NEXT:    v_add_f64 v[18:19], v[18:19], 1.0
; GFX9-NEXT:    v_add_f64 v[16:17], v[16:17], 1.0
; GFX9-NEXT:    v_add_f64 v[14:15], v[14:15], 1.0
; GFX9-NEXT:    v_add_f64 v[12:13], v[12:13], 1.0
; GFX9-NEXT:    v_add_f64 v[10:11], v[10:11], 1.0
; GFX9-NEXT:    v_add_f64 v[8:9], v[8:9], 1.0
; GFX9-NEXT:    v_add_f64 v[6:7], v[6:7], 1.0
; GFX9-NEXT:    v_add_f64 v[4:5], v[4:5], 1.0
; GFX9-NEXT:    v_add_f64 v[2:3], v[2:3], 1.0
; GFX9-NEXT:    v_add_f64 v[0:1], v[0:1], 1.0
; GFX9-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX9-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX9-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX9-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX9-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX9-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX9-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX9-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX9-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX9-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX9-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX9-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX9-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX9-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX9-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX9-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX9-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; GFX9-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; GFX9-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; GFX9-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; GFX9-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; GFX9-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; GFX9-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; GFX9-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; GFX9-NEXT:  .LBB52_4: ; %end
; GFX9-NEXT:    s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT:    s_mov_b32 s4, 0x5040100
; GFX9-NEXT:    v_perm_b32 v0, v47, v0, s4
; GFX9-NEXT:    v_perm_b32 v1, v46, v1, s4
; GFX9-NEXT:    v_perm_b32 v2, v45, v2, s4
; GFX9-NEXT:    v_perm_b32 v3, v44, v3, s4
; GFX9-NEXT:    v_perm_b32 v4, v43, v4, s4
; GFX9-NEXT:    v_perm_b32 v5, v42, v5, s4
; GFX9-NEXT:    v_perm_b32 v6, v41, v6, s4
; GFX9-NEXT:    v_perm_b32 v7, v40, v7, s4
; GFX9-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; GFX9-NEXT:    v_perm_b32 v8, v55, v8, s4
; GFX9-NEXT:    v_perm_b32 v9, v54, v9, s4
; GFX9-NEXT:    v_perm_b32 v10, v53, v10, s4
; GFX9-NEXT:    v_perm_b32 v11, v52, v11, s4
; GFX9-NEXT:    v_perm_b32 v12, v51, v12, s4
; GFX9-NEXT:    v_perm_b32 v13, v50, v13, s4
; GFX9-NEXT:    v_perm_b32 v14, v49, v14, s4
; GFX9-NEXT:    v_perm_b32 v15, v48, v15, s4
; GFX9-NEXT:    v_perm_b32 v16, v39, v16, s4
; GFX9-NEXT:    v_perm_b32 v17, v38, v17, s4
; GFX9-NEXT:    v_perm_b32 v18, v37, v18, s4
; GFX9-NEXT:    v_perm_b32 v19, v36, v19, s4
; GFX9-NEXT:    v_perm_b32 v20, v35, v20, s4
; GFX9-NEXT:    v_perm_b32 v21, v34, v21, s4
; GFX9-NEXT:    v_perm_b32 v22, v33, v22, s4
; GFX9-NEXT:    v_perm_b32 v23, v32, v23, s4
; GFX9-NEXT:    v_perm_b32 v24, v31, v24, s4
; GFX9-NEXT:    v_perm_b32 v25, v30, v25, s4
; GFX9-NEXT:    v_perm_b32 v26, v29, v26, s4
; GFX9-NEXT:    v_perm_b32 v27, v28, v27, s4
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-TRUE16-LABEL: bitcast_v14f64_to_v56f16:
; GFX11-TRUE16:       ; %bb.0:
; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-TRUE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT:    s_cbranch_execz .LBB52_2
; GFX11-TRUE16-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-TRUE16-NEXT:    v_add_f64 v[26:27], v[26:27], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[24:25], v[24:25], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[22:23], v[22:23], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[20:21], v[20:21], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[18:19], v[18:19], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[16:17], v[16:17], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[14:15], v[14:15], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[12:13], v[12:13], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[10:11], v[10:11], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[8:9], v[8:9], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[6:7], v[6:7], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[4:5], v[4:5], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[2:3], v[2:3], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[0:1], v[0:1], 1.0
; GFX11-TRUE16-NEXT:  .LBB52_2: ; %end
; GFX11-TRUE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v14f64_to_v56f16:
; GFX11-FAKE16:       ; %bb.0:
; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v28
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr71
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr70
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr69
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr68
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr67
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr66
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr65
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr64
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr55
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr54
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr53
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr52
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr51
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr50
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr49
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr48
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr39
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr38
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr37
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr36
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr35
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr34
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr33
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr32
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr31
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr30
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr29
; GFX11-FAKE16-NEXT:    ; implicit-def: $vgpr28
; GFX11-FAKE16-NEXT:    s_and_saveexec_b32 s0, vcc_lo
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_cbranch_execz .LBB52_2
; GFX11-FAKE16-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v3
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v2
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v0
; GFX11-FAKE16-NEXT:  .LBB52_2: ; %Flow
; GFX11-FAKE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-FAKE16-NEXT:    s_cbranch_execz .LBB52_4
; GFX11-FAKE16-NEXT:  ; %bb.3: ; %cmp.true
; GFX11-FAKE16-NEXT:    v_add_f64 v[26:27], v[26:27], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[24:25], v[24:25], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[22:23], v[22:23], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[20:21], v[20:21], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[18:19], v[18:19], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[16:17], v[16:17], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[14:15], v[14:15], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[12:13], v[12:13], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[10:11], v[10:11], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[8:9], v[8:9], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[6:7], v[6:7], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[4:5], v[4:5], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[2:3], v[2:3], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[0:1], v[0:1], 1.0
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v3
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v2
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v0
; GFX11-FAKE16-NEXT:  .LBB52_4: ; %end
; GFX11-FAKE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v71, v0, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v1, v70, v1, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v2, v69, v2, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v3, v68, v3, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v4, v67, v4, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v5, v66, v5, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v6, v65, v6, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v7, v64, v7, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v8, v55, v8, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v9, v54, v9, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v10, v53, v10, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v11, v52, v11, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v12, v51, v12, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v13, v50, v13, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v14, v49, v14, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v15, v48, v15, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v16, v39, v16, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v17, v38, v17, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v18, v37, v18, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v19, v36, v19, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v20, v35, v20, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v21, v34, v21, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v22, v33, v22, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v23, v32, v23, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v24, v31, v24, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v25, v30, v25, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v26, v29, v26, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v27, v28, v27, 0x5040100
; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = fadd <14 x double> %a, splat (double 1.000000e+00)
  %a2 = bitcast <14 x double> %a1 to <56 x half>
  br label %end

cmp.false:
  %a3 = bitcast <14 x double> %a to <56 x half>
  br label %end

end:
  %phi = phi <56 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <56 x half> %phi
}

define inreg <56 x half> @bitcast_v14f64_to_v56f16_scalar(<14 x double> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v14f64_to_v56f16_scalar:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    s_or_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v56, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    v_writelane_b32 v57, s34, 0
; SI-NEXT:    v_writelane_b32 v57, s35, 1
; SI-NEXT:    v_writelane_b32 v57, s36, 2
; SI-NEXT:    v_writelane_b32 v57, s37, 3
; SI-NEXT:    v_writelane_b32 v57, s38, 4
; SI-NEXT:    v_writelane_b32 v57, s39, 5
; SI-NEXT:    v_writelane_b32 v57, s48, 6
; SI-NEXT:    v_writelane_b32 v57, s49, 7
; SI-NEXT:    v_writelane_b32 v57, s30, 8
; SI-NEXT:    v_writelane_b32 v57, s31, 9
; SI-NEXT:    v_readfirstlane_b32 s4, v14
; SI-NEXT:    v_readfirstlane_b32 s41, v13
; SI-NEXT:    v_readfirstlane_b32 s40, v12
; SI-NEXT:    v_readfirstlane_b32 s15, v11
; SI-NEXT:    v_readfirstlane_b32 s14, v10
; SI-NEXT:    v_readfirstlane_b32 s13, v9
; SI-NEXT:    v_readfirstlane_b32 s12, v8
; SI-NEXT:    v_readfirstlane_b32 s11, v7
; SI-NEXT:    v_readfirstlane_b32 s10, v6
; SI-NEXT:    v_readfirstlane_b32 s9, v5
; SI-NEXT:    v_readfirstlane_b32 s8, v4
; SI-NEXT:    v_readfirstlane_b32 s7, v3
; SI-NEXT:    v_readfirstlane_b32 s6, v2
; SI-NEXT:    v_readfirstlane_b32 s5, v1
; SI-NEXT:    s_cmp_lg_u32 s4, 0
; SI-NEXT:    v_readfirstlane_b32 s4, v0
; SI-NEXT:    s_cbranch_scc0 .LBB53_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    s_lshr_b32 s94, s41, 16
; SI-NEXT:    s_lshr_b32 s95, s15, 16
; SI-NEXT:    s_lshr_b32 vcc_lo, s13, 16
; SI-NEXT:    s_lshr_b32 vcc_hi, s11, 16
; SI-NEXT:    s_lshr_b32 s30, s9, 16
; SI-NEXT:    s_lshr_b32 s31, s7, 16
; SI-NEXT:    s_lshr_b32 s34, s5, 16
; SI-NEXT:    s_lshr_b32 s35, s29, 16
; SI-NEXT:    s_lshr_b32 s36, s27, 16
; SI-NEXT:    s_lshr_b32 s37, s25, 16
; SI-NEXT:    s_lshr_b32 s38, s23, 16
; SI-NEXT:    s_lshr_b32 s39, s21, 16
; SI-NEXT:    s_lshr_b32 s48, s19, 16
; SI-NEXT:    s_lshr_b32 s49, s17, 16
; SI-NEXT:    s_lshr_b64 s[42:43], s[40:41], 16
; SI-NEXT:    s_lshr_b64 s[44:45], s[14:15], 16
; SI-NEXT:    s_lshr_b64 s[46:47], s[12:13], 16
; SI-NEXT:    s_lshr_b64 s[56:57], s[10:11], 16
; SI-NEXT:    s_lshr_b64 s[58:59], s[8:9], 16
; SI-NEXT:    s_lshr_b64 s[60:61], s[6:7], 16
; SI-NEXT:    s_lshr_b64 s[62:63], s[4:5], 16
; SI-NEXT:    s_lshr_b64 s[72:73], s[28:29], 16
; SI-NEXT:    s_lshr_b64 s[74:75], s[26:27], 16
; SI-NEXT:    s_lshr_b64 s[76:77], s[24:25], 16
; SI-NEXT:    s_lshr_b64 s[78:79], s[22:23], 16
; SI-NEXT:    s_lshr_b64 s[88:89], s[20:21], 16
; SI-NEXT:    s_lshr_b64 s[90:91], s[18:19], 16
; SI-NEXT:    s_lshr_b64 s[92:93], s[16:17], 16
; SI-NEXT:    v_mov_b32_e32 v27, s41
; SI-NEXT:    v_mov_b32_e32 v25, s15
; SI-NEXT:    v_mov_b32_e32 v23, s13
; SI-NEXT:    v_mov_b32_e32 v21, s11
; SI-NEXT:    v_mov_b32_e32 v19, s9
; SI-NEXT:    v_mov_b32_e32 v17, s7
; SI-NEXT:    v_mov_b32_e32 v15, s5
; SI-NEXT:    v_mov_b32_e32 v13, s29
; SI-NEXT:    v_mov_b32_e32 v11, s27
; SI-NEXT:    v_mov_b32_e32 v9, s25
; SI-NEXT:    v_mov_b32_e32 v7, s23
; SI-NEXT:    v_mov_b32_e32 v5, s21
; SI-NEXT:    v_mov_b32_e32 v3, s19
; SI-NEXT:    v_mov_b32_e32 v1, s17
; SI-NEXT:    v_mov_b32_e32 v0, s16
; SI-NEXT:    v_mov_b32_e32 v2, s18
; SI-NEXT:    v_mov_b32_e32 v4, s20
; SI-NEXT:    v_mov_b32_e32 v6, s22
; SI-NEXT:    v_mov_b32_e32 v8, s24
; SI-NEXT:    v_mov_b32_e32 v10, s26
; SI-NEXT:    v_mov_b32_e32 v12, s28
; SI-NEXT:    v_mov_b32_e32 v14, s4
; SI-NEXT:    v_mov_b32_e32 v16, s6
; SI-NEXT:    v_mov_b32_e32 v18, s8
; SI-NEXT:    v_mov_b32_e32 v20, s10
; SI-NEXT:    v_mov_b32_e32 v22, s12
; SI-NEXT:    v_mov_b32_e32 v24, s14
; SI-NEXT:    v_mov_b32_e32 v26, s40
; SI-NEXT:    v_mov_b32_e32 v52, s94
; SI-NEXT:    v_mov_b32_e32 v53, s95
; SI-NEXT:    v_mov_b32_e32 v54, vcc_lo
; SI-NEXT:    v_mov_b32_e32 v55, vcc_hi
; SI-NEXT:    v_mov_b32_e32 v39, s30
; SI-NEXT:    v_mov_b32_e32 v40, s31
; SI-NEXT:    v_mov_b32_e32 v41, s34
; SI-NEXT:    s_waitcnt expcnt(6)
; SI-NEXT:    v_mov_b32_e32 v42, s35
; SI-NEXT:    s_waitcnt expcnt(5)
; SI-NEXT:    v_mov_b32_e32 v43, s36
; SI-NEXT:    v_mov_b32_e32 v51, s37
; SI-NEXT:    s_waitcnt expcnt(4)
; SI-NEXT:    v_mov_b32_e32 v44, s38
; SI-NEXT:    s_waitcnt expcnt(3)
; SI-NEXT:    v_mov_b32_e32 v45, s39
; SI-NEXT:    s_waitcnt expcnt(2)
; SI-NEXT:    v_mov_b32_e32 v46, s48
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_mov_b32_e32 v47, s49
; SI-NEXT:    v_mov_b32_e32 v50, s92
; SI-NEXT:    v_mov_b32_e32 v49, s90
; SI-NEXT:    v_mov_b32_e32 v48, s88
; SI-NEXT:    v_mov_b32_e32 v38, s78
; SI-NEXT:    v_mov_b32_e32 v37, s76
; SI-NEXT:    v_mov_b32_e32 v36, s74
; SI-NEXT:    v_mov_b32_e32 v35, s72
; SI-NEXT:    v_mov_b32_e32 v34, s62
; SI-NEXT:    v_mov_b32_e32 v33, s60
; SI-NEXT:    v_mov_b32_e32 v32, s58
; SI-NEXT:    v_mov_b32_e32 v31, s56
; SI-NEXT:    v_mov_b32_e32 v30, s46
; SI-NEXT:    v_mov_b32_e32 v29, s44
; SI-NEXT:    v_mov_b32_e32 v28, s42
; SI-NEXT:    s_branch .LBB53_3
; SI-NEXT:  .LBB53_2: ; %cmp.true
; SI-NEXT:    v_add_f64 v[26:27], s[40:41], 1.0
; SI-NEXT:    v_add_f64 v[24:25], s[14:15], 1.0
; SI-NEXT:    v_add_f64 v[22:23], s[12:13], 1.0
; SI-NEXT:    v_lshr_b64 v[28:29], v[26:27], 16
; SI-NEXT:    v_add_f64 v[20:21], s[10:11], 1.0
; SI-NEXT:    v_lshr_b64 v[29:30], v[24:25], 16
; SI-NEXT:    v_add_f64 v[18:19], s[8:9], 1.0
; SI-NEXT:    v_lshr_b64 v[30:31], v[22:23], 16
; SI-NEXT:    v_add_f64 v[16:17], s[6:7], 1.0
; SI-NEXT:    v_lshr_b64 v[31:32], v[20:21], 16
; SI-NEXT:    v_add_f64 v[14:15], s[4:5], 1.0
; SI-NEXT:    v_lshr_b64 v[32:33], v[18:19], 16
; SI-NEXT:    v_add_f64 v[12:13], s[28:29], 1.0
; SI-NEXT:    v_lshr_b64 v[33:34], v[16:17], 16
; SI-NEXT:    v_add_f64 v[10:11], s[26:27], 1.0
; SI-NEXT:    v_lshr_b64 v[34:35], v[14:15], 16
; SI-NEXT:    v_add_f64 v[8:9], s[24:25], 1.0
; SI-NEXT:    v_lshr_b64 v[35:36], v[12:13], 16
; SI-NEXT:    v_add_f64 v[6:7], s[22:23], 1.0
; SI-NEXT:    v_lshr_b64 v[36:37], v[10:11], 16
; SI-NEXT:    v_add_f64 v[4:5], s[20:21], 1.0
; SI-NEXT:    v_lshr_b64 v[37:38], v[8:9], 16
; SI-NEXT:    v_lshrrev_b32_e32 v48, 16, v19
; SI-NEXT:    v_add_f64 v[2:3], s[18:19], 1.0
; SI-NEXT:    v_lshr_b64 v[38:39], v[6:7], 16
; SI-NEXT:    v_add_f64 v[0:1], s[16:17], 1.0
; SI-NEXT:    v_mov_b32_e32 v39, v48
; SI-NEXT:    v_lshr_b64 v[48:49], v[4:5], 16
; SI-NEXT:    v_lshr_b64 v[49:50], v[2:3], 16
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v56, 16, v9
; SI-NEXT:    v_lshr_b64 v[50:51], v[0:1], 16
; SI-NEXT:    v_lshrrev_b32_e32 v52, 16, v27
; SI-NEXT:    v_lshrrev_b32_e32 v53, 16, v25
; SI-NEXT:    v_lshrrev_b32_e32 v54, 16, v23
; SI-NEXT:    v_lshrrev_b32_e32 v55, 16, v21
; SI-NEXT:    v_lshrrev_b32_e32 v40, 16, v17
; SI-NEXT:    v_lshrrev_b32_e32 v41, 16, v15
; SI-NEXT:    v_lshrrev_b32_e32 v42, 16, v13
; SI-NEXT:    v_lshrrev_b32_e32 v43, 16, v11
; SI-NEXT:    v_lshrrev_b32_e32 v44, 16, v7
; SI-NEXT:    v_lshrrev_b32_e32 v45, 16, v5
; SI-NEXT:    v_lshrrev_b32_e32 v46, 16, v3
; SI-NEXT:    v_lshrrev_b32_e32 v47, 16, v1
; SI-NEXT:    v_mov_b32_e32 v51, v56
; SI-NEXT:  .LBB53_3: ; %end
; SI-NEXT:    v_lshlrev_b32_e32 v50, 16, v50
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT:    v_lshlrev_b32_e32 v49, 16, v49
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT:    v_lshlrev_b32_e32 v48, 16, v48
; SI-NEXT:    v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT:    v_lshlrev_b32_e32 v38, 16, v38
; SI-NEXT:    v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT:    v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT:    v_lshlrev_b32_e32 v36, 16, v36
; SI-NEXT:    v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; SI-NEXT:    v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT:    v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT:    v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; SI-NEXT:    v_or_b32_e32 v0, v0, v50
; SI-NEXT:    v_lshlrev_b32_e32 v50, 16, v47
; SI-NEXT:    v_or_b32_e32 v2, v2, v49
; SI-NEXT:    v_lshlrev_b32_e32 v49, 16, v46
; SI-NEXT:    v_or_b32_e32 v4, v4, v48
; SI-NEXT:    v_lshlrev_b32_e32 v48, 16, v45
; SI-NEXT:    v_or_b32_e32 v6, v6, v38
; SI-NEXT:    v_lshlrev_b32_e32 v38, 16, v44
; SI-NEXT:    v_or_b32_e32 v10, v10, v36
; SI-NEXT:    v_lshlrev_b32_e32 v36, 16, v43
; SI-NEXT:    v_or_b32_e32 v12, v12, v35
; SI-NEXT:    v_lshlrev_b32_e32 v35, 16, v42
; SI-NEXT:    v_or_b32_e32 v14, v14, v34
; SI-NEXT:    v_lshlrev_b32_e32 v34, 16, v41
; SI-NEXT:    v_or_b32_e32 v16, v16, v33
; SI-NEXT:    v_lshlrev_b32_e32 v33, 16, v40
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    buffer_load_dword v56, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; SI-NEXT:    v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT:    v_lshlrev_b32_e32 v37, 16, v37
; SI-NEXT:    v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT:    v_lshlrev_b32_e32 v32, 16, v32
; SI-NEXT:    v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT:    v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT:    v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; SI-NEXT:    v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; SI-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT:    v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT:    v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT:    v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT:    v_or_b32_e32 v8, v8, v37
; SI-NEXT:    v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT:    v_lshlrev_b32_e32 v37, 16, v51
; SI-NEXT:    v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT:    v_and_b32_e32 v13, 0xffff, v13
; SI-NEXT:    v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT:    v_and_b32_e32 v17, 0xffff, v17
; SI-NEXT:    v_or_b32_e32 v18, v18, v32
; SI-NEXT:    v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT:    v_lshlrev_b32_e32 v32, 16, v39
; SI-NEXT:    v_or_b32_e32 v20, v20, v31
; SI-NEXT:    v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT:    v_lshlrev_b32_e32 v31, 16, v55
; SI-NEXT:    v_or_b32_e32 v22, v22, v30
; SI-NEXT:    v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v54
; SI-NEXT:    v_or_b32_e32 v24, v24, v29
; SI-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v53
; SI-NEXT:    v_or_b32_e32 v26, v26, v28
; SI-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v52
; SI-NEXT:    v_readlane_b32 s30, v57, 8
; SI-NEXT:    v_or_b32_e32 v1, v1, v50
; SI-NEXT:    v_or_b32_e32 v3, v3, v49
; SI-NEXT:    v_or_b32_e32 v5, v5, v48
; SI-NEXT:    v_or_b32_e32 v7, v7, v38
; SI-NEXT:    v_or_b32_e32 v9, v9, v37
; SI-NEXT:    v_or_b32_e32 v11, v11, v36
; SI-NEXT:    v_or_b32_e32 v13, v13, v35
; SI-NEXT:    v_or_b32_e32 v15, v15, v34
; SI-NEXT:    v_or_b32_e32 v17, v17, v33
; SI-NEXT:    v_or_b32_e32 v19, v19, v32
; SI-NEXT:    v_or_b32_e32 v21, v21, v31
; SI-NEXT:    v_or_b32_e32 v23, v23, v30
; SI-NEXT:    v_or_b32_e32 v25, v25, v29
; SI-NEXT:    v_or_b32_e32 v27, v27, v28
; SI-NEXT:    v_readlane_b32 s31, v57, 9
; SI-NEXT:    v_readlane_b32 s49, v57, 7
; SI-NEXT:    v_readlane_b32 s48, v57, 6
; SI-NEXT:    v_readlane_b32 s39, v57, 5
; SI-NEXT:    v_readlane_b32 s38, v57, 4
; SI-NEXT:    v_readlane_b32 s37, v57, 3
; SI-NEXT:    v_readlane_b32 s36, v57, 2
; SI-NEXT:    v_readlane_b32 s35, v57, 1
; SI-NEXT:    v_readlane_b32 s34, v57, 0
; SI-NEXT:    s_or_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_load_dword v57, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v14f64_to_v56f16_scalar:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    v_readfirstlane_b32 s4, v14
; VI-NEXT:    v_readfirstlane_b32 s41, v13
; VI-NEXT:    v_readfirstlane_b32 s40, v12
; VI-NEXT:    v_readfirstlane_b32 s15, v11
; VI-NEXT:    v_readfirstlane_b32 s14, v10
; VI-NEXT:    v_readfirstlane_b32 s13, v9
; VI-NEXT:    v_readfirstlane_b32 s12, v8
; VI-NEXT:    v_readfirstlane_b32 s11, v7
; VI-NEXT:    v_readfirstlane_b32 s10, v6
; VI-NEXT:    v_readfirstlane_b32 s9, v5
; VI-NEXT:    v_readfirstlane_b32 s8, v4
; VI-NEXT:    v_readfirstlane_b32 s7, v3
; VI-NEXT:    v_readfirstlane_b32 s6, v2
; VI-NEXT:    v_readfirstlane_b32 s5, v1
; VI-NEXT:    s_cmp_lg_u32 s4, 0
; VI-NEXT:    v_readfirstlane_b32 s4, v0
; VI-NEXT:    s_cbranch_scc0 .LBB53_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    s_lshr_b32 s42, s41, 16
; VI-NEXT:    s_lshr_b32 s43, s40, 16
; VI-NEXT:    s_lshr_b32 s44, s15, 16
; VI-NEXT:    s_lshr_b32 s45, s14, 16
; VI-NEXT:    s_lshr_b32 s46, s13, 16
; VI-NEXT:    s_lshr_b32 s47, s12, 16
; VI-NEXT:    s_lshr_b32 s56, s11, 16
; VI-NEXT:    s_lshr_b32 s57, s10, 16
; VI-NEXT:    s_lshr_b32 s58, s9, 16
; VI-NEXT:    s_lshr_b32 s59, s8, 16
; VI-NEXT:    s_lshr_b32 s60, s7, 16
; VI-NEXT:    s_lshr_b32 s61, s6, 16
; VI-NEXT:    s_lshr_b32 s62, s5, 16
; VI-NEXT:    s_lshr_b32 s63, s4, 16
; VI-NEXT:    s_lshr_b32 s72, s29, 16
; VI-NEXT:    s_lshr_b32 s73, s28, 16
; VI-NEXT:    s_lshr_b32 s74, s27, 16
; VI-NEXT:    s_lshr_b32 s75, s26, 16
; VI-NEXT:    s_lshr_b32 s76, s25, 16
; VI-NEXT:    s_lshr_b32 s77, s24, 16
; VI-NEXT:    s_lshr_b32 s78, s23, 16
; VI-NEXT:    s_lshr_b32 s79, s22, 16
; VI-NEXT:    s_lshr_b32 s88, s21, 16
; VI-NEXT:    s_lshr_b32 s89, s20, 16
; VI-NEXT:    s_lshr_b32 s90, s19, 16
; VI-NEXT:    s_lshr_b32 s91, s18, 16
; VI-NEXT:    s_lshr_b32 vcc_lo, s17, 16
; VI-NEXT:    s_lshr_b32 vcc_hi, s16, 16
; VI-NEXT:    v_mov_b32_e32 v0, s16
; VI-NEXT:    v_mov_b32_e32 v2, s18
; VI-NEXT:    v_mov_b32_e32 v4, s20
; VI-NEXT:    v_mov_b32_e32 v6, s22
; VI-NEXT:    v_mov_b32_e32 v8, s24
; VI-NEXT:    v_mov_b32_e32 v10, s26
; VI-NEXT:    v_mov_b32_e32 v12, s28
; VI-NEXT:    v_mov_b32_e32 v14, s4
; VI-NEXT:    v_mov_b32_e32 v16, s6
; VI-NEXT:    v_mov_b32_e32 v18, s8
; VI-NEXT:    v_mov_b32_e32 v20, s10
; VI-NEXT:    v_mov_b32_e32 v22, s12
; VI-NEXT:    v_mov_b32_e32 v24, s14
; VI-NEXT:    v_mov_b32_e32 v26, s40
; VI-NEXT:    v_mov_b32_e32 v1, s17
; VI-NEXT:    v_mov_b32_e32 v3, s19
; VI-NEXT:    v_mov_b32_e32 v5, s21
; VI-NEXT:    v_mov_b32_e32 v7, s23
; VI-NEXT:    v_mov_b32_e32 v9, s25
; VI-NEXT:    v_mov_b32_e32 v11, s27
; VI-NEXT:    v_mov_b32_e32 v13, s29
; VI-NEXT:    v_mov_b32_e32 v15, s5
; VI-NEXT:    v_mov_b32_e32 v17, s7
; VI-NEXT:    v_mov_b32_e32 v19, s9
; VI-NEXT:    v_mov_b32_e32 v21, s11
; VI-NEXT:    v_mov_b32_e32 v23, s13
; VI-NEXT:    v_mov_b32_e32 v25, s15
; VI-NEXT:    v_mov_b32_e32 v27, s41
; VI-NEXT:    v_mov_b32_e32 v44, vcc_hi
; VI-NEXT:    v_mov_b32_e32 v42, s91
; VI-NEXT:    v_mov_b32_e32 v41, s89
; VI-NEXT:    v_mov_b32_e32 v55, s79
; VI-NEXT:    v_mov_b32_e32 v54, s77
; VI-NEXT:    v_mov_b32_e32 v52, s75
; VI-NEXT:    v_mov_b32_e32 v49, s73
; VI-NEXT:    v_mov_b32_e32 v39, s63
; VI-NEXT:    v_mov_b32_e32 v38, s61
; VI-NEXT:    v_mov_b32_e32 v35, s59
; VI-NEXT:    v_mov_b32_e32 v33, s57
; VI-NEXT:    v_mov_b32_e32 v30, s47
; VI-NEXT:    v_mov_b32_e32 v29, s45
; VI-NEXT:    v_mov_b32_e32 v28, s43
; VI-NEXT:    v_mov_b32_e32 v47, vcc_lo
; VI-NEXT:    v_mov_b32_e32 v46, s90
; VI-NEXT:    v_mov_b32_e32 v45, s88
; VI-NEXT:    v_mov_b32_e32 v43, s78
; VI-NEXT:    v_mov_b32_e32 v40, s76
; VI-NEXT:    v_mov_b32_e32 v53, s74
; VI-NEXT:    v_mov_b32_e32 v51, s72
; VI-NEXT:    v_mov_b32_e32 v50, s62
; VI-NEXT:    v_mov_b32_e32 v48, s60
; VI-NEXT:    v_mov_b32_e32 v37, s58
; VI-NEXT:    v_mov_b32_e32 v36, s56
; VI-NEXT:    v_mov_b32_e32 v34, s46
; VI-NEXT:    v_mov_b32_e32 v32, s44
; VI-NEXT:    v_mov_b32_e32 v31, s42
; VI-NEXT:    s_branch .LBB53_3
; VI-NEXT:  .LBB53_2: ; %cmp.true
; VI-NEXT:    v_add_f64 v[26:27], s[40:41], 1.0
; VI-NEXT:    v_add_f64 v[24:25], s[14:15], 1.0
; VI-NEXT:    v_add_f64 v[22:23], s[12:13], 1.0
; VI-NEXT:    v_add_f64 v[20:21], s[10:11], 1.0
; VI-NEXT:    v_add_f64 v[18:19], s[8:9], 1.0
; VI-NEXT:    v_add_f64 v[16:17], s[6:7], 1.0
; VI-NEXT:    v_add_f64 v[14:15], s[4:5], 1.0
; VI-NEXT:    v_add_f64 v[12:13], s[28:29], 1.0
; VI-NEXT:    v_add_f64 v[10:11], s[26:27], 1.0
; VI-NEXT:    v_add_f64 v[8:9], s[24:25], 1.0
; VI-NEXT:    v_add_f64 v[6:7], s[22:23], 1.0
; VI-NEXT:    v_add_f64 v[4:5], s[20:21], 1.0
; VI-NEXT:    v_add_f64 v[2:3], s[18:19], 1.0
; VI-NEXT:    v_add_f64 v[0:1], s[16:17], 1.0
; VI-NEXT:    v_lshrrev_b32_e32 v31, 16, v27
; VI-NEXT:    v_lshrrev_b32_e32 v28, 16, v26
; VI-NEXT:    v_lshrrev_b32_e32 v32, 16, v25
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v24
; VI-NEXT:    v_lshrrev_b32_e32 v34, 16, v23
; VI-NEXT:    v_lshrrev_b32_e32 v30, 16, v22
; VI-NEXT:    v_lshrrev_b32_e32 v36, 16, v21
; VI-NEXT:    v_lshrrev_b32_e32 v33, 16, v20
; VI-NEXT:    v_lshrrev_b32_e32 v37, 16, v19
; VI-NEXT:    v_lshrrev_b32_e32 v35, 16, v18
; VI-NEXT:    v_lshrrev_b32_e32 v48, 16, v17
; VI-NEXT:    v_lshrrev_b32_e32 v38, 16, v16
; VI-NEXT:    v_lshrrev_b32_e32 v50, 16, v15
; VI-NEXT:    v_lshrrev_b32_e32 v39, 16, v14
; VI-NEXT:    v_lshrrev_b32_e32 v51, 16, v13
; VI-NEXT:    v_lshrrev_b32_e32 v49, 16, v12
; VI-NEXT:    v_lshrrev_b32_e32 v53, 16, v11
; VI-NEXT:    v_lshrrev_b32_e32 v52, 16, v10
; VI-NEXT:    v_lshrrev_b32_e32 v40, 16, v9
; VI-NEXT:    v_lshrrev_b32_e32 v54, 16, v8
; VI-NEXT:    v_lshrrev_b32_e32 v43, 16, v7
; VI-NEXT:    v_lshrrev_b32_e32 v55, 16, v6
; VI-NEXT:    v_lshrrev_b32_e32 v45, 16, v5
; VI-NEXT:    v_lshrrev_b32_e32 v41, 16, v4
; VI-NEXT:    v_lshrrev_b32_e32 v46, 16, v3
; VI-NEXT:    v_lshrrev_b32_e32 v42, 16, v2
; VI-NEXT:    v_lshrrev_b32_e32 v47, 16, v1
; VI-NEXT:    v_lshrrev_b32_e32 v44, 16, v0
; VI-NEXT:  .LBB53_3: ; %end
; VI-NEXT:    v_lshlrev_b32_e32 v44, 16, v44
; VI-NEXT:    v_lshlrev_b32_e32 v42, 16, v42
; VI-NEXT:    v_lshlrev_b32_e32 v41, 16, v41
; VI-NEXT:    v_or_b32_sdwa v0, v0, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v44, 16, v47
; VI-NEXT:    v_or_b32_sdwa v2, v2, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v42, 16, v46
; VI-NEXT:    v_or_b32_sdwa v4, v4, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v41, 16, v45
; VI-NEXT:    v_lshlrev_b32_e32 v55, 16, v55
; VI-NEXT:    v_lshlrev_b32_e32 v54, 16, v54
; VI-NEXT:    v_or_b32_sdwa v1, v1, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v3, v3, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v5, v5, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v6, v6, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v55, 16, v43
; VI-NEXT:    v_or_b32_sdwa v8, v8, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v54, 16, v40
; VI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; VI-NEXT:    v_lshlrev_b32_e32 v52, 16, v52
; VI-NEXT:    v_lshlrev_b32_e32 v49, 16, v49
; VI-NEXT:    v_lshlrev_b32_e32 v39, 16, v39
; VI-NEXT:    v_lshlrev_b32_e32 v38, 16, v38
; VI-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; VI-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; VI-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; VI-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; VI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; VI-NEXT:    v_or_b32_sdwa v10, v10, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v52, 16, v53
; VI-NEXT:    v_or_b32_sdwa v12, v12, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v49, 16, v51
; VI-NEXT:    v_or_b32_sdwa v14, v14, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v39, 16, v50
; VI-NEXT:    v_or_b32_sdwa v16, v16, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v38, 16, v48
; VI-NEXT:    v_or_b32_sdwa v18, v18, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v35, 16, v37
; VI-NEXT:    v_or_b32_sdwa v20, v20, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v33, 16, v36
; VI-NEXT:    v_or_b32_sdwa v22, v22, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v30, 16, v34
; VI-NEXT:    v_or_b32_sdwa v24, v24, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v29, 16, v32
; VI-NEXT:    v_or_b32_sdwa v26, v26, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v28, 16, v31
; VI-NEXT:    v_or_b32_sdwa v7, v7, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v9, v9, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v11, v11, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v13, v13, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v15, v15, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v17, v17, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v19, v19, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v21, v21, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v23, v23, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v25, v25, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v14f64_to_v56f16_scalar:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    v_readfirstlane_b32 s4, v14
; GFX9-NEXT:    v_readfirstlane_b32 s41, v13
; GFX9-NEXT:    v_readfirstlane_b32 s40, v12
; GFX9-NEXT:    v_readfirstlane_b32 s15, v11
; GFX9-NEXT:    v_readfirstlane_b32 s14, v10
; GFX9-NEXT:    v_readfirstlane_b32 s13, v9
; GFX9-NEXT:    v_readfirstlane_b32 s12, v8
; GFX9-NEXT:    v_readfirstlane_b32 s11, v7
; GFX9-NEXT:    v_readfirstlane_b32 s10, v6
; GFX9-NEXT:    v_readfirstlane_b32 s9, v5
; GFX9-NEXT:    v_readfirstlane_b32 s8, v4
; GFX9-NEXT:    v_readfirstlane_b32 s7, v3
; GFX9-NEXT:    v_readfirstlane_b32 s6, v2
; GFX9-NEXT:    v_readfirstlane_b32 s5, v1
; GFX9-NEXT:    s_cmp_lg_u32 s4, 0
; GFX9-NEXT:    v_readfirstlane_b32 s4, v0
; GFX9-NEXT:    s_cbranch_scc0 .LBB53_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    s_lshr_b32 s42, s41, 16
; GFX9-NEXT:    s_lshr_b32 s43, s40, 16
; GFX9-NEXT:    s_lshr_b32 s44, s15, 16
; GFX9-NEXT:    s_lshr_b32 s45, s14, 16
; GFX9-NEXT:    s_lshr_b32 s46, s13, 16
; GFX9-NEXT:    s_lshr_b32 s47, s12, 16
; GFX9-NEXT:    s_lshr_b32 s56, s11, 16
; GFX9-NEXT:    s_lshr_b32 s57, s10, 16
; GFX9-NEXT:    s_lshr_b32 s58, s9, 16
; GFX9-NEXT:    s_lshr_b32 s59, s8, 16
; GFX9-NEXT:    s_lshr_b32 s60, s7, 16
; GFX9-NEXT:    s_lshr_b32 s61, s6, 16
; GFX9-NEXT:    s_lshr_b32 s62, s5, 16
; GFX9-NEXT:    s_lshr_b32 s63, s4, 16
; GFX9-NEXT:    s_lshr_b32 s72, s29, 16
; GFX9-NEXT:    s_lshr_b32 s73, s28, 16
; GFX9-NEXT:    s_lshr_b32 s74, s27, 16
; GFX9-NEXT:    s_lshr_b32 s75, s26, 16
; GFX9-NEXT:    s_lshr_b32 s76, s25, 16
; GFX9-NEXT:    s_lshr_b32 s77, s24, 16
; GFX9-NEXT:    s_lshr_b32 s78, s23, 16
; GFX9-NEXT:    s_lshr_b32 s79, s22, 16
; GFX9-NEXT:    s_lshr_b32 s88, s21, 16
; GFX9-NEXT:    s_lshr_b32 s89, s20, 16
; GFX9-NEXT:    s_lshr_b32 s90, s19, 16
; GFX9-NEXT:    s_lshr_b32 s91, s18, 16
; GFX9-NEXT:    s_lshr_b32 s92, s17, 16
; GFX9-NEXT:    s_lshr_b32 s93, s16, 16
; GFX9-NEXT:    v_mov_b32_e32 v0, s16
; GFX9-NEXT:    v_mov_b32_e32 v2, s18
; GFX9-NEXT:    v_mov_b32_e32 v4, s20
; GFX9-NEXT:    v_mov_b32_e32 v6, s22
; GFX9-NEXT:    v_mov_b32_e32 v8, s24
; GFX9-NEXT:    v_mov_b32_e32 v10, s26
; GFX9-NEXT:    v_mov_b32_e32 v12, s28
; GFX9-NEXT:    v_mov_b32_e32 v14, s4
; GFX9-NEXT:    v_mov_b32_e32 v16, s6
; GFX9-NEXT:    v_mov_b32_e32 v18, s8
; GFX9-NEXT:    v_mov_b32_e32 v20, s10
; GFX9-NEXT:    v_mov_b32_e32 v22, s12
; GFX9-NEXT:    v_mov_b32_e32 v24, s14
; GFX9-NEXT:    v_mov_b32_e32 v26, s40
; GFX9-NEXT:    v_mov_b32_e32 v1, s17
; GFX9-NEXT:    v_mov_b32_e32 v3, s19
; GFX9-NEXT:    v_mov_b32_e32 v5, s21
; GFX9-NEXT:    v_mov_b32_e32 v7, s23
; GFX9-NEXT:    v_mov_b32_e32 v9, s25
; GFX9-NEXT:    v_mov_b32_e32 v11, s27
; GFX9-NEXT:    v_mov_b32_e32 v13, s29
; GFX9-NEXT:    v_mov_b32_e32 v15, s5
; GFX9-NEXT:    v_mov_b32_e32 v17, s7
; GFX9-NEXT:    v_mov_b32_e32 v19, s9
; GFX9-NEXT:    v_mov_b32_e32 v21, s11
; GFX9-NEXT:    v_mov_b32_e32 v23, s13
; GFX9-NEXT:    v_mov_b32_e32 v25, s15
; GFX9-NEXT:    v_mov_b32_e32 v27, s41
; GFX9-NEXT:    v_mov_b32_e32 v44, s93
; GFX9-NEXT:    v_mov_b32_e32 v42, s91
; GFX9-NEXT:    v_mov_b32_e32 v41, s89
; GFX9-NEXT:    v_mov_b32_e32 v55, s79
; GFX9-NEXT:    v_mov_b32_e32 v54, s77
; GFX9-NEXT:    v_mov_b32_e32 v52, s75
; GFX9-NEXT:    v_mov_b32_e32 v49, s73
; GFX9-NEXT:    v_mov_b32_e32 v39, s63
; GFX9-NEXT:    v_mov_b32_e32 v38, s61
; GFX9-NEXT:    v_mov_b32_e32 v35, s59
; GFX9-NEXT:    v_mov_b32_e32 v33, s57
; GFX9-NEXT:    v_mov_b32_e32 v30, s47
; GFX9-NEXT:    v_mov_b32_e32 v29, s45
; GFX9-NEXT:    v_mov_b32_e32 v28, s43
; GFX9-NEXT:    v_mov_b32_e32 v47, s92
; GFX9-NEXT:    v_mov_b32_e32 v46, s90
; GFX9-NEXT:    v_mov_b32_e32 v45, s88
; GFX9-NEXT:    v_mov_b32_e32 v43, s78
; GFX9-NEXT:    v_mov_b32_e32 v40, s76
; GFX9-NEXT:    v_mov_b32_e32 v53, s74
; GFX9-NEXT:    v_mov_b32_e32 v51, s72
; GFX9-NEXT:    v_mov_b32_e32 v50, s62
; GFX9-NEXT:    v_mov_b32_e32 v48, s60
; GFX9-NEXT:    v_mov_b32_e32 v37, s58
; GFX9-NEXT:    v_mov_b32_e32 v36, s56
; GFX9-NEXT:    v_mov_b32_e32 v34, s46
; GFX9-NEXT:    v_mov_b32_e32 v32, s44
; GFX9-NEXT:    v_mov_b32_e32 v31, s42
; GFX9-NEXT:    s_branch .LBB53_3
; GFX9-NEXT:  .LBB53_2: ; %cmp.true
; GFX9-NEXT:    v_add_f64 v[26:27], s[40:41], 1.0
; GFX9-NEXT:    v_add_f64 v[24:25], s[14:15], 1.0
; GFX9-NEXT:    v_add_f64 v[22:23], s[12:13], 1.0
; GFX9-NEXT:    v_add_f64 v[20:21], s[10:11], 1.0
; GFX9-NEXT:    v_add_f64 v[18:19], s[8:9], 1.0
; GFX9-NEXT:    v_add_f64 v[16:17], s[6:7], 1.0
; GFX9-NEXT:    v_add_f64 v[14:15], s[4:5], 1.0
; GFX9-NEXT:    v_add_f64 v[12:13], s[28:29], 1.0
; GFX9-NEXT:    v_add_f64 v[10:11], s[26:27], 1.0
; GFX9-NEXT:    v_add_f64 v[8:9], s[24:25], 1.0
; GFX9-NEXT:    v_add_f64 v[6:7], s[22:23], 1.0
; GFX9-NEXT:    v_add_f64 v[4:5], s[20:21], 1.0
; GFX9-NEXT:    v_add_f64 v[2:3], s[18:19], 1.0
; GFX9-NEXT:    v_add_f64 v[0:1], s[16:17], 1.0
; GFX9-NEXT:    v_lshrrev_b32_e32 v31, 16, v27
; GFX9-NEXT:    v_lshrrev_b32_e32 v28, 16, v26
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v25
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v24
; GFX9-NEXT:    v_lshrrev_b32_e32 v34, 16, v23
; GFX9-NEXT:    v_lshrrev_b32_e32 v30, 16, v22
; GFX9-NEXT:    v_lshrrev_b32_e32 v36, 16, v21
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v20
; GFX9-NEXT:    v_lshrrev_b32_e32 v37, 16, v19
; GFX9-NEXT:    v_lshrrev_b32_e32 v35, 16, v18
; GFX9-NEXT:    v_lshrrev_b32_e32 v48, 16, v17
; GFX9-NEXT:    v_lshrrev_b32_e32 v38, 16, v16
; GFX9-NEXT:    v_lshrrev_b32_e32 v50, 16, v15
; GFX9-NEXT:    v_lshrrev_b32_e32 v39, 16, v14
; GFX9-NEXT:    v_lshrrev_b32_e32 v51, 16, v13
; GFX9-NEXT:    v_lshrrev_b32_e32 v49, 16, v12
; GFX9-NEXT:    v_lshrrev_b32_e32 v53, 16, v11
; GFX9-NEXT:    v_lshrrev_b32_e32 v52, 16, v10
; GFX9-NEXT:    v_lshrrev_b32_e32 v40, 16, v9
; GFX9-NEXT:    v_lshrrev_b32_e32 v54, 16, v8
; GFX9-NEXT:    v_lshrrev_b32_e32 v43, 16, v7
; GFX9-NEXT:    v_lshrrev_b32_e32 v55, 16, v6
; GFX9-NEXT:    v_lshrrev_b32_e32 v45, 16, v5
; GFX9-NEXT:    v_lshrrev_b32_e32 v41, 16, v4
; GFX9-NEXT:    v_lshrrev_b32_e32 v46, 16, v3
; GFX9-NEXT:    v_lshrrev_b32_e32 v42, 16, v2
; GFX9-NEXT:    v_lshrrev_b32_e32 v47, 16, v1
; GFX9-NEXT:    v_lshrrev_b32_e32 v44, 16, v0
; GFX9-NEXT:  .LBB53_3: ; %end
; GFX9-NEXT:    v_lshlrev_b32_e32 v44, 16, v44
; GFX9-NEXT:    v_lshlrev_b32_e32 v42, 16, v42
; GFX9-NEXT:    v_lshlrev_b32_e32 v41, 16, v41
; GFX9-NEXT:    v_or_b32_sdwa v0, v44, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_lshlrev_b32_e32 v44, 16, v47
; GFX9-NEXT:    v_or_b32_sdwa v2, v42, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_lshlrev_b32_e32 v42, 16, v46
; GFX9-NEXT:    v_or_b32_sdwa v4, v41, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_lshlrev_b32_e32 v41, 16, v45
; GFX9-NEXT:    v_lshlrev_b32_e32 v55, 16, v55
; GFX9-NEXT:    v_lshlrev_b32_e32 v54, 16, v54
; GFX9-NEXT:    v_or_b32_sdwa v1, v44, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v3, v42, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v5, v41, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v6, v55, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_lshlrev_b32_e32 v55, 16, v43
; GFX9-NEXT:    v_or_b32_sdwa v8, v54, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_lshlrev_b32_e32 v54, 16, v40
; GFX9-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; GFX9-NEXT:    v_lshlrev_b32_e32 v52, 16, v52
; GFX9-NEXT:    v_lshlrev_b32_e32 v49, 16, v49
; GFX9-NEXT:    v_lshlrev_b32_e32 v39, 16, v39
; GFX9-NEXT:    v_lshlrev_b32_e32 v38, 16, v38
; GFX9-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; GFX9-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; GFX9-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; GFX9-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; GFX9-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; GFX9-NEXT:    v_or_b32_sdwa v10, v52, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_lshlrev_b32_e32 v52, 16, v53
; GFX9-NEXT:    v_or_b32_sdwa v12, v49, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_lshlrev_b32_e32 v49, 16, v51
; GFX9-NEXT:    v_or_b32_sdwa v14, v39, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_lshlrev_b32_e32 v39, 16, v50
; GFX9-NEXT:    v_or_b32_sdwa v16, v38, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_lshlrev_b32_e32 v38, 16, v48
; GFX9-NEXT:    v_or_b32_sdwa v18, v35, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_lshlrev_b32_e32 v35, 16, v37
; GFX9-NEXT:    v_or_b32_sdwa v20, v33, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_lshlrev_b32_e32 v33, 16, v36
; GFX9-NEXT:    v_or_b32_sdwa v22, v30, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_lshlrev_b32_e32 v30, 16, v34
; GFX9-NEXT:    v_or_b32_sdwa v24, v29, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_lshlrev_b32_e32 v29, 16, v32
; GFX9-NEXT:    v_or_b32_sdwa v26, v28, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_lshlrev_b32_e32 v28, 16, v31
; GFX9-NEXT:    v_or_b32_sdwa v7, v55, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v9, v54, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v11, v52, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v13, v49, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v15, v39, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v17, v38, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v19, v35, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v21, v33, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v23, v30, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v25, v29, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v27, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-TRUE16-LABEL: bitcast_v14f64_to_v56f16_scalar:
; GFX11-TRUE16:       ; %bb.0:
; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s14, v10
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s13, v9
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s12, v8
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s11, v7
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s10, v6
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s9, v5
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s8, v4
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s5, v3
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s4, v2
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s7, v1
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s6, v0
; GFX11-TRUE16-NEXT:    s_cmp_lg_u32 s14, 0
; GFX11-TRUE16-NEXT:    s_cbranch_scc0 .LBB53_2
; GFX11-TRUE16-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-TRUE16-NEXT:    s_lshr_b32 s14, s13, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s15, s12, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s40, s11, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s41, s10, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s42, s9, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s43, s8, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s44, s5, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s45, s4, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s46, s7, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s47, s6, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s56, s29, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s57, s28, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s58, s27, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s59, s26, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s60, s25, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s61, s24, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s62, s23, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s63, s22, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s72, s21, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s73, s20, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s74, s19, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s75, s18, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s76, s17, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s77, s16, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s78, s3, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s79, s2, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s88, s1, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s89, s0, 16
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v4, s16 :: v_dual_mov_b32 v5, s17
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v6, s18 :: v_dual_mov_b32 v7, s19
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v8, s20 :: v_dual_mov_b32 v9, s21
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v10, s22 :: v_dual_mov_b32 v11, s23
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v12, s24 :: v_dual_mov_b32 v13, s25
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v14, s26 :: v_dual_mov_b32 v15, s27
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v16, s28 :: v_dual_mov_b32 v17, s29
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v18, s6 :: v_dual_mov_b32 v19, s7
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v20, s4 :: v_dual_mov_b32 v21, s5
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v22, s8 :: v_dual_mov_b32 v23, s9
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v24, s10 :: v_dual_mov_b32 v25, s11
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v26, s12 :: v_dual_mov_b32 v27, s13
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v69, s89 :: v_dual_mov_b32 v30, s41
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v67, s79 :: v_dual_mov_b32 v70, s78
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v65, s77 :: v_dual_mov_b32 v68, s76
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v55, s75 :: v_dual_mov_b32 v66, s74
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v53, s73 :: v_dual_mov_b32 v64, s72
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v51, s63 :: v_dual_mov_b32 v54, s62
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v49, s61 :: v_dual_mov_b32 v52, s60
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v39, s59 :: v_dual_mov_b32 v50, s58
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v37, s57 :: v_dual_mov_b32 v48, s56
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v35, s47 :: v_dual_mov_b32 v38, s46
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v33, s45 :: v_dual_mov_b32 v36, s44
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v31, s43 :: v_dual_mov_b32 v34, s42
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v29, s15 :: v_dual_mov_b32 v32, s40
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v71, s88 :: v_dual_mov_b32 v28, s14
; GFX11-TRUE16-NEXT:    s_branch .LBB53_3
; GFX11-TRUE16-NEXT:  .LBB53_2: ; %cmp.true
; GFX11-TRUE16-NEXT:    v_add_f64 v[26:27], s[12:13], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[24:25], s[10:11], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[22:23], s[8:9], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[20:21], s[4:5], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[18:19], s[6:7], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[16:17], s[28:29], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[14:15], s[26:27], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[12:13], s[24:25], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[10:11], s[22:23], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[8:9], s[20:21], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[6:7], s[18:19], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[4:5], s[16:17], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[2:3], s[2:3], 1.0
; GFX11-TRUE16-NEXT:    v_add_f64 v[0:1], s[0:1], 1.0
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v25
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v24
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v23
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v22
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v21
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v20
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v19
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v18
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v17
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v16
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v15
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v14
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v13
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v12
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v11
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v10
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v9
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v8
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v7
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v6
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v5
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v4
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v3
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v2
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v1
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v0
; GFX11-TRUE16-NEXT:  .LBB53_3: ; %end
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v0.h, v69.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v1.h, v71.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v2.h, v67.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v3.h, v70.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v4.h, v65.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v5.h, v68.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v6.h, v55.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v7.h, v66.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v8.h, v53.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v9.h, v64.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v10.h, v51.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v11.h, v54.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v12.h, v49.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v13.h, v52.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v14.h, v39.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v15.h, v50.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v16.h, v37.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v17.h, v48.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v18.h, v35.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v19.h, v38.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v20.h, v33.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v21.h, v36.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v22.h, v31.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v23.h, v34.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v24.h, v30.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v25.h, v32.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v26.h, v29.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v27.h, v28.l
; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v14f64_to_v56f16_scalar:
; GFX11-FAKE16:       ; %bb.0:
; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s14, v10
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s13, v9
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s12, v8
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s11, v7
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s10, v6
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s9, v5
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s8, v4
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s5, v3
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s4, v2
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s7, v1
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s6, v0
; GFX11-FAKE16-NEXT:    s_cmp_lg_u32 s14, 0
; GFX11-FAKE16-NEXT:    s_cbranch_scc0 .LBB53_2
; GFX11-FAKE16-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-FAKE16-NEXT:    s_lshr_b32 s14, s13, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s15, s12, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s40, s11, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s41, s10, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s42, s9, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s43, s8, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s44, s5, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s45, s4, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s46, s7, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s47, s6, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s56, s29, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s57, s28, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s58, s27, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s59, s26, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s60, s25, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s61, s24, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s62, s23, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s63, s22, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s72, s21, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s73, s20, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s74, s19, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s75, s18, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s76, s17, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s77, s16, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s78, s3, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s79, s2, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s88, s1, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s89, s0, 16
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v31, s2
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v5, s16 :: v_dual_mov_b32 v10, s20
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v3, s18 :: v_dual_mov_b32 v8, s22
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v29, s24 :: v_dual_mov_b32 v20, s6
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v15, s26 :: v_dual_mov_b32 v18, s4
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v13, s28 :: v_dual_mov_b32 v32, s3
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v27, s8 :: v_dual_mov_b32 v6, s17
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v25, s10 :: v_dual_mov_b32 v4, s19
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v23, s12 :: v_dual_mov_b32 v30, s25
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v16, s27
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v11, s21 :: v_dual_mov_b32 v14, s29
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v9, s23 :: v_dual_mov_b32 v28, s9
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v21, s7 :: v_dual_mov_b32 v26, s11
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v19, s5 :: v_dual_mov_b32 v24, s13
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v69, s89 :: v_dual_mov_b32 v2, s79
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v66, s77 :: v_dual_mov_b32 v7, s75
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v55, s73 :: v_dual_mov_b32 v12, s61
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v53, s63 :: v_dual_mov_b32 v50, s59
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v17, s57 :: v_dual_mov_b32 v22, s43
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v39, s47 :: v_dual_mov_b32 v34, s41
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v37, s45 :: v_dual_mov_b32 v70, s78
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v33, s15 :: v_dual_mov_b32 v68, s76
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v71, s88 :: v_dual_mov_b32 v64, s62
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v67, s74 :: v_dual_mov_b32 v54, s60
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v65, s72 :: v_dual_mov_b32 v52, s58
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v51, s56 :: v_dual_mov_b32 v48, s44
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v49, s46 :: v_dual_mov_b32 v38, s42
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v36, s40 :: v_dual_mov_b32 v35, s14
; GFX11-FAKE16-NEXT:    s_branch .LBB53_3
; GFX11-FAKE16-NEXT:  .LBB53_2: ; %cmp.true
; GFX11-FAKE16-NEXT:    v_add_f64 v[23:24], s[12:13], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[25:26], s[10:11], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[27:28], s[8:9], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[18:19], s[4:5], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[20:21], s[6:7], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[13:14], s[28:29], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[15:16], s[26:27], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[29:30], s[24:25], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[8:9], s[22:23], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[10:11], s[20:21], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[3:4], s[18:19], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[5:6], s[16:17], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[31:32], s[2:3], 1.0
; GFX11-FAKE16-NEXT:    v_add_f64 v[0:1], s[0:1], 1.0
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v28
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v22, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v17, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v30
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v12, 16, v29
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v7, 16, v3
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v32
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v2, 16, v31
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v0
; GFX11-FAKE16-NEXT:  .LBB53_3: ; %end
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v31, 0xffff, v31
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v29, 0xffff, v29
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v5, 0xffff, v5
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v6, 0xffff, v6
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v2, v2, 16, v31
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v31, 0xffff, v32
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v12, v12, 16, v29
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v29, 0xffff, v30
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v32, 0xffff, v3
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v10, 0xffff, v10
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v3, v70, 16, v31
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v31, 0xffff, v8
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v15, 0xffff, v15
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v16, 0xffff, v16
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v30, 0xffff, v13
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v13, v54, 16, v29
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v20, 0xffff, v20
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v29, 0xffff, v18
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v0, v69, 16, v0
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v69, 0xffff, v4
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v4, v66, 16, v5
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v5, v68, 16, v6
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v6, v7, 16, v32
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v11, 0xffff, v11
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v32, 0xffff, v9
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v8, v55, 16, v10
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v10, v53, 16, v31
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v31, 0xffff, v14
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v14, v50, 16, v15
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v15, v52, 16, v16
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v16, v17, 16, v30
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v21, 0xffff, v21
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v30, 0xffff, v19
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v18, v39, 16, v20
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v20, v37, 16, v29
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v22, v22, 16, v27
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v27, 0xffff, v28
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v28, 0xffff, v23
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v29, 0xffff, v24
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v1, v71, 16, v1
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v7, v67, 16, v69
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v9, v65, 16, v11
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v11, v64, 16, v32
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v17, v51, 16, v31
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v19, v49, 16, v21
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v21, v48, 16, v30
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v23, v38, 16, v27
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v24, v34, 16, v25
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v25, v36, 16, v26
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v26, v33, 16, v28
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v27, v35, 16, v29
; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = fadd <14 x double> %a, splat (double 1.000000e+00)
  %a2 = bitcast <14 x double> %a1 to <56 x half>
  br label %end

cmp.false:
  %a3 = bitcast <14 x double> %a to <56 x half>
  br label %end

end:
  %phi = phi <56 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <56 x half> %phi
}

define <14 x double> @bitcast_v56f16_to_v14f64(<56 x half> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v56f16_to_v14f64:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(4)
; SI-NEXT:    v_mov_b32_e32 v59, v0
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v27
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v26
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v25
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v24
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v23, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v23
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v22
; SI-NEXT:    v_mov_b32_e32 v39, v20
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v21
; SI-NEXT:    v_mov_b32_e32 v48, v19
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v39
; SI-NEXT:    v_mov_b32_e32 v49, v18
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v48
; SI-NEXT:    v_mov_b32_e32 v50, v17
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v49
; SI-NEXT:    v_mov_b32_e32 v51, v16
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v50
; SI-NEXT:    v_mov_b32_e32 v52, v15
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v51
; SI-NEXT:    v_mov_b32_e32 v53, v14
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v52
; SI-NEXT:    v_mov_b32_e32 v54, v13
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v53
; SI-NEXT:    v_mov_b32_e32 v55, v12
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v54
; SI-NEXT:    v_mov_b32_e32 v40, v11
; SI-NEXT:    v_mov_b32_e32 v41, v10
; SI-NEXT:    v_mov_b32_e32 v42, v9
; SI-NEXT:    v_mov_b32_e32 v43, v8
; SI-NEXT:    v_mov_b32_e32 v44, v7
; SI-NEXT:    v_mov_b32_e32 v45, v6
; SI-NEXT:    v_mov_b32_e32 v46, v5
; SI-NEXT:    v_mov_b32_e32 v47, v4
; SI-NEXT:    v_mov_b32_e32 v56, v3
; SI-NEXT:    v_mov_b32_e32 v57, v2
; SI-NEXT:    v_mov_b32_e32 v58, v1
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v55
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v40
; SI-NEXT:    v_lshrrev_b32_e32 v60, 16, v41
; SI-NEXT:    v_lshrrev_b32_e32 v33, 16, v42
; SI-NEXT:    v_lshrrev_b32_e32 v61, 16, v43
; SI-NEXT:    v_lshrrev_b32_e32 v34, 16, v44
; SI-NEXT:    v_lshrrev_b32_e32 v35, 16, v45
; SI-NEXT:    v_lshrrev_b32_e32 v62, 16, v46
; SI-NEXT:    v_lshrrev_b32_e32 v36, 16, v47
; SI-NEXT:    v_lshrrev_b32_e32 v63, 16, v56
; SI-NEXT:    v_lshrrev_b32_e32 v37, 16, v57
; SI-NEXT:    v_lshrrev_b32_e32 v32, 16, v58
; SI-NEXT:    v_lshrrev_b32_e32 v38, 16, v59
; SI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT:    buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT:    ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; SI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB54_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    buffer_load_dword v12, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v13, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v15, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v17, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v18, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v19, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v20, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v21, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v59
; SI-NEXT:    v_lshlrev_b32_e32 v1, 16, v38
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v58
; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v32
; SI-NEXT:    v_or_b32_e32 v0, v0, v1
; SI-NEXT:    v_or_b32_e32 v1, v2, v3
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v57
; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v37
; SI-NEXT:    v_or_b32_e32 v2, v2, v3
; SI-NEXT:    v_and_b32_e32 v3, 0xffff, v56
; SI-NEXT:    v_lshlrev_b32_e32 v4, 16, v63
; SI-NEXT:    v_or_b32_e32 v3, v3, v4
; SI-NEXT:    v_and_b32_e32 v4, 0xffff, v47
; SI-NEXT:    v_lshlrev_b32_e32 v5, 16, v36
; SI-NEXT:    v_or_b32_e32 v4, v4, v5
; SI-NEXT:    v_and_b32_e32 v5, 0xffff, v46
; SI-NEXT:    v_lshlrev_b32_e32 v6, 16, v62
; SI-NEXT:    v_or_b32_e32 v5, v5, v6
; SI-NEXT:    v_and_b32_e32 v6, 0xffff, v45
; SI-NEXT:    v_lshlrev_b32_e32 v7, 16, v35
; SI-NEXT:    v_or_b32_e32 v6, v6, v7
; SI-NEXT:    v_and_b32_e32 v7, 0xffff, v44
; SI-NEXT:    v_lshlrev_b32_e32 v8, 16, v34
; SI-NEXT:    v_or_b32_e32 v7, v7, v8
; SI-NEXT:    v_and_b32_e32 v8, 0xffff, v43
; SI-NEXT:    v_lshlrev_b32_e32 v9, 16, v61
; SI-NEXT:    v_or_b32_e32 v8, v8, v9
; SI-NEXT:    v_and_b32_e32 v9, 0xffff, v42
; SI-NEXT:    v_lshlrev_b32_e32 v10, 16, v33
; SI-NEXT:    v_or_b32_e32 v9, v9, v10
; SI-NEXT:    v_and_b32_e32 v10, 0xffff, v41
; SI-NEXT:    v_lshlrev_b32_e32 v11, 16, v60
; SI-NEXT:    v_or_b32_e32 v10, v10, v11
; SI-NEXT:    v_and_b32_e32 v11, 0xffff, v40
; SI-NEXT:    ; implicit-def: $vgpr59
; SI-NEXT:    ; implicit-def: $vgpr58
; SI-NEXT:    ; implicit-def: $vgpr57
; SI-NEXT:    ; implicit-def: $vgpr56
; SI-NEXT:    ; implicit-def: $vgpr47
; SI-NEXT:    ; implicit-def: $vgpr46
; SI-NEXT:    ; implicit-def: $vgpr45
; SI-NEXT:    ; implicit-def: $vgpr44
; SI-NEXT:    ; implicit-def: $vgpr43
; SI-NEXT:    ; implicit-def: $vgpr42
; SI-NEXT:    ; implicit-def: $vgpr41
; SI-NEXT:    ; implicit-def: $vgpr40
; SI-NEXT:    ; implicit-def: $vgpr38
; SI-NEXT:    ; implicit-def: $vgpr32
; SI-NEXT:    ; implicit-def: $vgpr37
; SI-NEXT:    ; implicit-def: $vgpr63
; SI-NEXT:    ; implicit-def: $vgpr36
; SI-NEXT:    ; implicit-def: $vgpr62
; SI-NEXT:    ; implicit-def: $vgpr35
; SI-NEXT:    ; implicit-def: $vgpr34
; SI-NEXT:    ; implicit-def: $vgpr61
; SI-NEXT:    ; implicit-def: $vgpr33
; SI-NEXT:    ; implicit-def: $vgpr60
; SI-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(14)
; SI-NEXT:    v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT:    v_or_b32_e32 v11, v11, v12
; SI-NEXT:    v_and_b32_e32 v12, 0xffff, v55
; SI-NEXT:    v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT:    v_or_b32_e32 v12, v12, v13
; SI-NEXT:    v_and_b32_e32 v13, 0xffff, v54
; SI-NEXT:    v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT:    v_or_b32_e32 v13, v13, v14
; SI-NEXT:    v_and_b32_e32 v14, 0xffff, v53
; SI-NEXT:    s_waitcnt vmcnt(13)
; SI-NEXT:    v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT:    v_or_b32_e32 v14, v14, v15
; SI-NEXT:    v_and_b32_e32 v15, 0xffff, v52
; SI-NEXT:    s_waitcnt vmcnt(12)
; SI-NEXT:    v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT:    v_or_b32_e32 v15, v15, v16
; SI-NEXT:    v_and_b32_e32 v16, 0xffff, v51
; SI-NEXT:    s_waitcnt vmcnt(11)
; SI-NEXT:    v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT:    v_or_b32_e32 v16, v16, v17
; SI-NEXT:    v_and_b32_e32 v17, 0xffff, v50
; SI-NEXT:    s_waitcnt vmcnt(10)
; SI-NEXT:    v_lshlrev_b32_e32 v18, 16, v18
; SI-NEXT:    v_or_b32_e32 v17, v17, v18
; SI-NEXT:    v_and_b32_e32 v18, 0xffff, v49
; SI-NEXT:    s_waitcnt vmcnt(9)
; SI-NEXT:    v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT:    v_or_b32_e32 v18, v18, v19
; SI-NEXT:    v_and_b32_e32 v19, 0xffff, v48
; SI-NEXT:    s_waitcnt vmcnt(8)
; SI-NEXT:    v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT:    v_or_b32_e32 v19, v19, v20
; SI-NEXT:    v_and_b32_e32 v20, 0xffff, v39
; SI-NEXT:    s_waitcnt vmcnt(7)
; SI-NEXT:    v_lshlrev_b32_e32 v21, 16, v21
; SI-NEXT:    v_or_b32_e32 v20, v20, v21
; SI-NEXT:    buffer_load_dword v21, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT:    ; implicit-def: $vgpr55
; SI-NEXT:    ; implicit-def: $vgpr54
; SI-NEXT:    ; implicit-def: $vgpr53
; SI-NEXT:    ; implicit-def: $vgpr52
; SI-NEXT:    ; implicit-def: $vgpr51
; SI-NEXT:    ; implicit-def: $vgpr50
; SI-NEXT:    ; implicit-def: $vgpr49
; SI-NEXT:    ; implicit-def: $vgpr48
; SI-NEXT:    ; implicit-def: $vgpr39
; SI-NEXT:    s_waitcnt vmcnt(7)
; SI-NEXT:    v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT:    s_waitcnt vmcnt(6)
; SI-NEXT:    v_lshlrev_b32_e32 v23, 16, v23
; SI-NEXT:    s_waitcnt vmcnt(5)
; SI-NEXT:    v_lshlrev_b32_e32 v24, 16, v24
; SI-NEXT:    s_waitcnt vmcnt(4)
; SI-NEXT:    v_lshlrev_b32_e32 v25, 16, v25
; SI-NEXT:    s_waitcnt vmcnt(3)
; SI-NEXT:    v_lshlrev_b32_e32 v26, 16, v26
; SI-NEXT:    s_waitcnt vmcnt(2)
; SI-NEXT:    v_lshlrev_b32_e32 v27, 16, v27
; SI-NEXT:    s_waitcnt vmcnt(1)
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT:    v_or_b32_e32 v21, v21, v22
; SI-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT:    v_or_b32_e32 v22, v22, v23
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT:    v_or_b32_e32 v23, v23, v24
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT:    v_or_b32_e32 v24, v24, v25
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT:    v_or_b32_e32 v25, v25, v26
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT:    v_or_b32_e32 v26, v26, v27
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT:    v_or_b32_e32 v27, v27, v28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:  .LBB54_2: ; %Flow
; SI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB54_4
; SI-NEXT:  ; %bb.3: ; %cmp.true
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v0, v38
; SI-NEXT:    v_cvt_f32_f16_e32 v2, v32
; SI-NEXT:    v_cvt_f32_f16_e32 v1, v59
; SI-NEXT:    v_cvt_f32_f16_e32 v3, v58
; SI-NEXT:    v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT:    v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT:    v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT:    v_cvt_f16_f32_e32 v0, v0
; SI-NEXT:    v_cvt_f16_f32_e32 v2, v2
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v1, v1
; SI-NEXT:    v_cvt_f16_f32_e32 v3, v3
; SI-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
; SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT:    v_or_b32_e32 v0, v1, v0
; SI-NEXT:    v_or_b32_e32 v1, v3, v2
; SI-NEXT:    v_cvt_f32_f16_e32 v2, v37
; SI-NEXT:    v_cvt_f32_f16_e32 v3, v57
; SI-NEXT:    v_cvt_f32_f16_e32 v4, v56
; SI-NEXT:    v_cvt_f32_f16_e32 v5, v47
; SI-NEXT:    v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT:    v_cvt_f16_f32_e32 v2, v2
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v3, v3
; SI-NEXT:    v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT:    v_cvt_f16_f32_e32 v4, v4
; SI-NEXT:    v_or_b32_e32 v2, v3, v2
; SI-NEXT:    v_cvt_f32_f16_e32 v3, v63
; SI-NEXT:    v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT:    v_cvt_f16_f32_e32 v5, v5
; SI-NEXT:    v_cvt_f32_f16_e32 v6, v46
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v3, v3
; SI-NEXT:    v_cvt_f32_f16_e32 v7, v45
; SI-NEXT:    v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT:    v_cvt_f16_f32_e32 v6, v6
; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT:    v_or_b32_e32 v3, v4, v3
; SI-NEXT:    v_cvt_f32_f16_e32 v4, v36
; SI-NEXT:    v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT:    v_cvt_f16_f32_e32 v7, v7
; SI-NEXT:    v_cvt_f32_f16_e32 v8, v44
; SI-NEXT:    v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT:    v_cvt_f16_f32_e32 v4, v4
; SI-NEXT:    v_cvt_f32_f16_e32 v9, v43
; SI-NEXT:    v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT:    v_cvt_f16_f32_e32 v8, v8
; SI-NEXT:    v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT:    v_or_b32_e32 v4, v5, v4
; SI-NEXT:    v_cvt_f32_f16_e32 v5, v62
; SI-NEXT:    v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT:    v_cvt_f16_f32_e32 v9, v9
; SI-NEXT:    v_cvt_f32_f16_e32 v10, v42
; SI-NEXT:    v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT:    v_cvt_f16_f32_e32 v5, v5
; SI-NEXT:    v_cvt_f32_f16_e32 v11, v41
; SI-NEXT:    v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT:    v_cvt_f16_f32_e32 v10, v10
; SI-NEXT:    v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT:    v_or_b32_e32 v5, v6, v5
; SI-NEXT:    v_cvt_f32_f16_e32 v6, v35
; SI-NEXT:    v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT:    v_cvt_f16_f32_e32 v11, v11
; SI-NEXT:    v_cvt_f32_f16_e32 v12, v40
; SI-NEXT:    v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT:    v_cvt_f16_f32_e32 v6, v6
; SI-NEXT:    v_cvt_f32_f16_e32 v13, v55
; SI-NEXT:    v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT:    v_cvt_f16_f32_e32 v12, v12
; SI-NEXT:    v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT:    v_or_b32_e32 v6, v7, v6
; SI-NEXT:    v_cvt_f32_f16_e32 v7, v34
; SI-NEXT:    v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT:    v_cvt_f16_f32_e32 v13, v13
; SI-NEXT:    v_cvt_f32_f16_e32 v14, v54
; SI-NEXT:    v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT:    v_cvt_f16_f32_e32 v7, v7
; SI-NEXT:    v_cvt_f32_f16_e32 v15, v53
; SI-NEXT:    v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT:    v_cvt_f16_f32_e32 v14, v14
; SI-NEXT:    v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT:    v_or_b32_e32 v7, v8, v7
; SI-NEXT:    v_cvt_f32_f16_e32 v8, v61
; SI-NEXT:    v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT:    v_cvt_f16_f32_e32 v15, v15
; SI-NEXT:    v_cvt_f32_f16_e32 v17, v52
; SI-NEXT:    v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT:    v_cvt_f16_f32_e32 v8, v8
; SI-NEXT:    v_cvt_f32_f16_e32 v18, v51
; SI-NEXT:    v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT:    v_cvt_f16_f32_e32 v17, v17
; SI-NEXT:    v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT:    v_or_b32_e32 v8, v9, v8
; SI-NEXT:    v_cvt_f32_f16_e32 v9, v33
; SI-NEXT:    v_add_f32_e32 v18, 0x38000000, v18
; SI-NEXT:    v_cvt_f16_f32_e32 v18, v18
; SI-NEXT:    v_cvt_f32_f16_e32 v20, v49
; SI-NEXT:    v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT:    v_cvt_f16_f32_e32 v9, v9
; SI-NEXT:    v_cvt_f32_f16_e32 v21, v48
; SI-NEXT:    v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT:    v_cvt_f16_f32_e32 v20, v20
; SI-NEXT:    v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT:    v_or_b32_e32 v9, v10, v9
; SI-NEXT:    v_cvt_f32_f16_e32 v10, v60
; SI-NEXT:    v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT:    v_cvt_f16_f32_e32 v21, v21
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT:    v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT:    v_cvt_f16_f32_e32 v10, v10
; SI-NEXT:    buffer_load_dword v16, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v19, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT:    v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT:    v_or_b32_e32 v10, v11, v10
; SI-NEXT:    buffer_load_dword v11, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(10)
; SI-NEXT:    v_cvt_f32_f16_e32 v24, v24
; SI-NEXT:    s_waitcnt vmcnt(9)
; SI-NEXT:    v_cvt_f32_f16_e32 v27, v27
; SI-NEXT:    s_waitcnt vmcnt(8)
; SI-NEXT:    v_cvt_f32_f16_e32 v22, v22
; SI-NEXT:    s_waitcnt vmcnt(7)
; SI-NEXT:    v_cvt_f32_f16_e32 v25, v25
; SI-NEXT:    v_add_f32_e32 v24, 0x38000000, v24
; SI-NEXT:    v_cvt_f16_f32_e32 v24, v24
; SI-NEXT:    v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT:    s_waitcnt vmcnt(5)
; SI-NEXT:    v_cvt_f32_f16_e32 v16, v16
; SI-NEXT:    s_waitcnt vmcnt(4)
; SI-NEXT:    v_cvt_f32_f16_e32 v19, v19
; SI-NEXT:    v_cvt_f16_f32_e32 v22, v22
; SI-NEXT:    v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT:    v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT:    v_cvt_f16_f32_e32 v16, v16
; SI-NEXT:    v_add_f32_e32 v19, 0x38000000, v19
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v11, v11
; SI-NEXT:    v_cvt_f16_f32_e32 v19, v19
; SI-NEXT:    v_cvt_f16_f32_e32 v25, v25
; SI-NEXT:    v_add_f32_e32 v27, 0x38000000, v27
; SI-NEXT:    v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT:    v_cvt_f16_f32_e32 v11, v11
; SI-NEXT:    v_cvt_f16_f32_e32 v27, v27
; SI-NEXT:    v_cvt_f32_f16_e32 v28, v28
; SI-NEXT:    v_cvt_f32_f16_e32 v29, v29
; SI-NEXT:    v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT:    v_or_b32_e32 v11, v12, v11
; SI-NEXT:    buffer_load_dword v12, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT:    v_add_f32_e32 v28, 0x38000000, v28
; SI-NEXT:    v_cvt_f16_f32_e32 v28, v28
; SI-NEXT:    v_add_f32_e32 v29, 0x38000000, v29
; SI-NEXT:    v_cvt_f16_f32_e32 v29, v29
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v12, v12
; SI-NEXT:    v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT:    v_cvt_f16_f32_e32 v12, v12
; SI-NEXT:    v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT:    v_or_b32_e32 v12, v13, v12
; SI-NEXT:    buffer_load_dword v13, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v13, v13
; SI-NEXT:    v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT:    v_cvt_f16_f32_e32 v13, v13
; SI-NEXT:    v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT:    v_or_b32_e32 v13, v14, v13
; SI-NEXT:    buffer_load_dword v14, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v14, v14
; SI-NEXT:    v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT:    v_cvt_f16_f32_e32 v14, v14
; SI-NEXT:    v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT:    v_or_b32_e32 v14, v15, v14
; SI-NEXT:    v_lshlrev_b32_e32 v15, 16, v16
; SI-NEXT:    buffer_load_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT:    v_or_b32_e32 v15, v17, v15
; SI-NEXT:    buffer_load_dword v17, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(1)
; SI-NEXT:    v_cvt_f32_f16_e32 v16, v16
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v17, v17
; SI-NEXT:    v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT:    v_cvt_f16_f32_e32 v16, v16
; SI-NEXT:    v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT:    v_cvt_f16_f32_e32 v17, v17
; SI-NEXT:    v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT:    v_or_b32_e32 v16, v18, v16
; SI-NEXT:    v_cvt_f32_f16_e32 v18, v50
; SI-NEXT:    v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT:    v_add_f32_e32 v18, 0x38000000, v18
; SI-NEXT:    v_cvt_f16_f32_e32 v18, v18
; SI-NEXT:    v_or_b32_e32 v17, v18, v17
; SI-NEXT:    v_lshlrev_b32_e32 v18, 16, v19
; SI-NEXT:    buffer_load_dword v19, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT:    v_or_b32_e32 v18, v20, v18
; SI-NEXT:    buffer_load_dword v20, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(1)
; SI-NEXT:    v_cvt_f32_f16_e32 v19, v19
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v20, v20
; SI-NEXT:    v_add_f32_e32 v19, 0x38000000, v19
; SI-NEXT:    v_cvt_f16_f32_e32 v19, v19
; SI-NEXT:    v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT:    v_cvt_f16_f32_e32 v20, v20
; SI-NEXT:    v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT:    v_or_b32_e32 v19, v21, v19
; SI-NEXT:    v_cvt_f32_f16_e32 v21, v39
; SI-NEXT:    v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT:    v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT:    v_cvt_f16_f32_e32 v21, v21
; SI-NEXT:    v_or_b32_e32 v20, v21, v20
; SI-NEXT:    v_lshlrev_b32_e32 v21, 16, v22
; SI-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v22, v22
; SI-NEXT:    v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT:    v_cvt_f16_f32_e32 v22, v22
; SI-NEXT:    v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT:    v_or_b32_e32 v22, v24, v22
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT:    v_cvt_f32_f16_e32 v23, v23
; SI-NEXT:    v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT:    v_cvt_f16_f32_e32 v23, v23
; SI-NEXT:    v_or_b32_e32 v21, v23, v21
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(1)
; SI-NEXT:    v_cvt_f32_f16_e32 v24, v24
; SI-NEXT:    v_add_f32_e32 v24, 0x38000000, v24
; SI-NEXT:    v_cvt_f16_f32_e32 v24, v24
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v23, v23
; SI-NEXT:    v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT:    v_cvt_f16_f32_e32 v23, v23
; SI-NEXT:    v_lshlrev_b32_e32 v23, 16, v23
; SI-NEXT:    v_or_b32_e32 v23, v24, v23
; SI-NEXT:    v_lshlrev_b32_e32 v24, 16, v25
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v25, v25
; SI-NEXT:    v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT:    v_cvt_f16_f32_e32 v25, v25
; SI-NEXT:    v_lshlrev_b32_e32 v25, 16, v25
; SI-NEXT:    v_or_b32_e32 v25, v27, v25
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT:    v_cvt_f32_f16_e32 v26, v26
; SI-NEXT:    v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT:    v_cvt_f16_f32_e32 v26, v26
; SI-NEXT:    v_or_b32_e32 v24, v26, v24
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(1)
; SI-NEXT:    v_cvt_f32_f16_e32 v27, v27
; SI-NEXT:    v_add_f32_e32 v27, 0x38000000, v27
; SI-NEXT:    v_cvt_f16_f32_e32 v27, v27
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v26, v26
; SI-NEXT:    v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT:    v_cvt_f16_f32_e32 v26, v26
; SI-NEXT:    v_lshlrev_b32_e32 v26, 16, v26
; SI-NEXT:    v_or_b32_e32 v26, v27, v26
; SI-NEXT:    v_lshlrev_b32_e32 v27, 16, v28
; SI-NEXT:    v_or_b32_e32 v27, v29, v27
; SI-NEXT:  .LBB54_4: ; %end
; SI-NEXT:    s_or_b64 exec, exec, s[4:5]
; SI-NEXT:    buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v56f16_to_v14f64:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v56, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v58, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v59, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    v_mov_b32_e32 v32, v27
; VI-NEXT:    v_mov_b32_e32 v33, v26
; VI-NEXT:    v_mov_b32_e32 v34, v25
; VI-NEXT:    v_mov_b32_e32 v35, v24
; VI-NEXT:    v_mov_b32_e32 v36, v23
; VI-NEXT:    v_mov_b32_e32 v37, v22
; VI-NEXT:    v_mov_b32_e32 v38, v21
; VI-NEXT:    v_mov_b32_e32 v39, v20
; VI-NEXT:    v_mov_b32_e32 v48, v19
; VI-NEXT:    v_mov_b32_e32 v49, v18
; VI-NEXT:    v_mov_b32_e32 v50, v17
; VI-NEXT:    v_mov_b32_e32 v51, v16
; VI-NEXT:    v_mov_b32_e32 v52, v15
; VI-NEXT:    v_mov_b32_e32 v53, v14
; VI-NEXT:    v_mov_b32_e32 v54, v13
; VI-NEXT:    v_mov_b32_e32 v55, v12
; VI-NEXT:    v_mov_b32_e32 v40, v11
; VI-NEXT:    v_mov_b32_e32 v41, v10
; VI-NEXT:    v_mov_b32_e32 v42, v9
; VI-NEXT:    v_mov_b32_e32 v43, v8
; VI-NEXT:    v_mov_b32_e32 v44, v7
; VI-NEXT:    v_mov_b32_e32 v45, v6
; VI-NEXT:    v_mov_b32_e32 v46, v5
; VI-NEXT:    v_mov_b32_e32 v47, v4
; VI-NEXT:    v_mov_b32_e32 v56, v3
; VI-NEXT:    v_mov_b32_e32 v57, v2
; VI-NEXT:    v_mov_b32_e32 v58, v1
; VI-NEXT:    v_mov_b32_e32 v59, v0
; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT:    ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; VI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB54_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    v_mov_b32_e32 v27, 16
; VI-NEXT:    v_lshlrev_b32_sdwa v0, v27, v59 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v1, v27, v58 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v2, v27, v57 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v3, v27, v56 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v4, v27, v47 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v5, v27, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v6, v27, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v7, v27, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v8, v27, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v9, v27, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v10, v27, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v11, v27, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v12, v27, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v13, v27, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v14, v27, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v15, v27, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v16, v27, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v17, v27, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v18, v27, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v19, v27, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v20, v27, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v21, v27, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v22, v27, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v23, v27, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v24, v27, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v25, v27, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v26, v27, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_lshlrev_b32_sdwa v27, v27, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; VI-NEXT:    v_or_b32_sdwa v0, v59, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v1, v58, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v2, v57, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v3, v56, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v4, v47, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v5, v46, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v6, v45, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v7, v44, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v8, v43, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v9, v42, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v10, v41, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v11, v40, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v12, v55, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v13, v54, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v14, v53, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v15, v52, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v16, v51, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v17, v50, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v18, v49, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v19, v48, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v20, v39, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v21, v38, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v22, v37, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v23, v36, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v24, v35, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v25, v34, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v26, v33, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v27, v32, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    ; implicit-def: $vgpr59
; VI-NEXT:    ; implicit-def: $vgpr58
; VI-NEXT:    ; implicit-def: $vgpr57
; VI-NEXT:    ; implicit-def: $vgpr56
; VI-NEXT:    ; implicit-def: $vgpr47
; VI-NEXT:    ; implicit-def: $vgpr46
; VI-NEXT:    ; implicit-def: $vgpr45
; VI-NEXT:    ; implicit-def: $vgpr44
; VI-NEXT:    ; implicit-def: $vgpr43
; VI-NEXT:    ; implicit-def: $vgpr42
; VI-NEXT:    ; implicit-def: $vgpr41
; VI-NEXT:    ; implicit-def: $vgpr40
; VI-NEXT:    ; implicit-def: $vgpr55
; VI-NEXT:    ; implicit-def: $vgpr54
; VI-NEXT:    ; implicit-def: $vgpr53
; VI-NEXT:    ; implicit-def: $vgpr52
; VI-NEXT:    ; implicit-def: $vgpr51
; VI-NEXT:    ; implicit-def: $vgpr50
; VI-NEXT:    ; implicit-def: $vgpr49
; VI-NEXT:    ; implicit-def: $vgpr48
; VI-NEXT:    ; implicit-def: $vgpr39
; VI-NEXT:    ; implicit-def: $vgpr38
; VI-NEXT:    ; implicit-def: $vgpr37
; VI-NEXT:    ; implicit-def: $vgpr36
; VI-NEXT:    ; implicit-def: $vgpr35
; VI-NEXT:    ; implicit-def: $vgpr34
; VI-NEXT:    ; implicit-def: $vgpr33
; VI-NEXT:    ; implicit-def: $vgpr32
; VI-NEXT:  .LBB54_2: ; %Flow
; VI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB54_4
; VI-NEXT:  ; %bb.3: ; %cmp.true
; VI-NEXT:    v_mov_b32_e32 v27, 0x200
; VI-NEXT:    v_add_f16_sdwa v0, v59, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v1, 0x200, v59
; VI-NEXT:    v_add_f16_sdwa v2, v58, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v3, 0x200, v58
; VI-NEXT:    v_or_b32_e32 v0, v1, v0
; VI-NEXT:    v_or_b32_e32 v1, v3, v2
; VI-NEXT:    v_add_f16_sdwa v2, v57, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v3, 0x200, v57
; VI-NEXT:    v_or_b32_e32 v2, v3, v2
; VI-NEXT:    v_add_f16_sdwa v3, v56, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v4, 0x200, v56
; VI-NEXT:    v_or_b32_e32 v3, v4, v3
; VI-NEXT:    v_add_f16_sdwa v4, v47, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v5, 0x200, v47
; VI-NEXT:    v_or_b32_e32 v4, v5, v4
; VI-NEXT:    v_add_f16_sdwa v5, v46, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v6, 0x200, v46
; VI-NEXT:    v_or_b32_e32 v5, v6, v5
; VI-NEXT:    v_add_f16_sdwa v6, v45, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v7, 0x200, v45
; VI-NEXT:    v_or_b32_e32 v6, v7, v6
; VI-NEXT:    v_add_f16_sdwa v7, v44, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v8, 0x200, v44
; VI-NEXT:    v_or_b32_e32 v7, v8, v7
; VI-NEXT:    v_add_f16_sdwa v8, v43, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v9, 0x200, v43
; VI-NEXT:    v_or_b32_e32 v8, v9, v8
; VI-NEXT:    v_add_f16_sdwa v9, v42, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v10, 0x200, v42
; VI-NEXT:    v_or_b32_e32 v9, v10, v9
; VI-NEXT:    v_add_f16_sdwa v10, v41, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v11, 0x200, v41
; VI-NEXT:    v_or_b32_e32 v10, v11, v10
; VI-NEXT:    v_add_f16_sdwa v11, v40, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v12, 0x200, v40
; VI-NEXT:    v_or_b32_e32 v11, v12, v11
; VI-NEXT:    v_add_f16_sdwa v12, v55, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v13, 0x200, v55
; VI-NEXT:    v_or_b32_e32 v12, v13, v12
; VI-NEXT:    v_add_f16_sdwa v13, v54, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v14, 0x200, v54
; VI-NEXT:    v_or_b32_e32 v13, v14, v13
; VI-NEXT:    v_add_f16_sdwa v14, v53, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v15, 0x200, v53
; VI-NEXT:    v_or_b32_e32 v14, v15, v14
; VI-NEXT:    v_add_f16_sdwa v15, v52, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v16, 0x200, v52
; VI-NEXT:    v_or_b32_e32 v15, v16, v15
; VI-NEXT:    v_add_f16_sdwa v16, v51, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v17, 0x200, v51
; VI-NEXT:    v_or_b32_e32 v16, v17, v16
; VI-NEXT:    v_add_f16_sdwa v17, v50, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v18, 0x200, v50
; VI-NEXT:    v_or_b32_e32 v17, v18, v17
; VI-NEXT:    v_add_f16_sdwa v18, v49, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v19, 0x200, v49
; VI-NEXT:    v_or_b32_e32 v18, v19, v18
; VI-NEXT:    v_add_f16_sdwa v19, v48, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v20, 0x200, v48
; VI-NEXT:    v_or_b32_e32 v19, v20, v19
; VI-NEXT:    v_add_f16_sdwa v20, v39, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v21, 0x200, v39
; VI-NEXT:    v_or_b32_e32 v20, v21, v20
; VI-NEXT:    v_add_f16_sdwa v21, v38, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v22, 0x200, v38
; VI-NEXT:    v_or_b32_e32 v21, v22, v21
; VI-NEXT:    v_add_f16_sdwa v22, v37, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v23, 0x200, v37
; VI-NEXT:    v_or_b32_e32 v22, v23, v22
; VI-NEXT:    v_add_f16_sdwa v23, v36, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v24, 0x200, v36
; VI-NEXT:    v_or_b32_e32 v23, v24, v23
; VI-NEXT:    v_add_f16_sdwa v24, v35, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v25, 0x200, v35
; VI-NEXT:    v_or_b32_e32 v24, v25, v24
; VI-NEXT:    v_add_f16_sdwa v25, v34, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v26, 0x200, v34
; VI-NEXT:    v_or_b32_e32 v25, v26, v25
; VI-NEXT:    v_add_f16_sdwa v26, v33, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v28, 0x200, v33
; VI-NEXT:    v_or_b32_e32 v26, v28, v26
; VI-NEXT:    v_add_f16_sdwa v27, v32, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v28, 0x200, v32
; VI-NEXT:    v_or_b32_e32 v27, v28, v27
; VI-NEXT:  .LBB54_4: ; %end
; VI-NEXT:    s_or_b64 exec, exec, s[4:5]
; VI-NEXT:    buffer_load_dword v59, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v58, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v57, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v56, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v56f16_to_v14f64:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    v_mov_b32_e32 v59, v0
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v27
; GFX9-NEXT:    v_mov_b32_e32 v34, v25
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v26
; GFX9-NEXT:    v_mov_b32_e32 v35, v24
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v34
; GFX9-NEXT:    v_mov_b32_e32 v36, v23
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v35
; GFX9-NEXT:    v_mov_b32_e32 v37, v22
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v36
; GFX9-NEXT:    v_mov_b32_e32 v38, v21
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v37
; GFX9-NEXT:    v_mov_b32_e32 v39, v20
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v38
; GFX9-NEXT:    v_mov_b32_e32 v48, v19
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v39
; GFX9-NEXT:    v_mov_b32_e32 v49, v18
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v48
; GFX9-NEXT:    v_mov_b32_e32 v50, v17
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v49
; GFX9-NEXT:    v_mov_b32_e32 v51, v16
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v50
; GFX9-NEXT:    v_mov_b32_e32 v52, v15
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v51
; GFX9-NEXT:    v_mov_b32_e32 v53, v14
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v52
; GFX9-NEXT:    v_mov_b32_e32 v54, v13
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v53
; GFX9-NEXT:    v_mov_b32_e32 v55, v12
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v54
; GFX9-NEXT:    v_mov_b32_e32 v40, v11
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v55
; GFX9-NEXT:    v_mov_b32_e32 v41, v10
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v40
; GFX9-NEXT:    v_mov_b32_e32 v42, v9
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v41
; GFX9-NEXT:    v_mov_b32_e32 v43, v8
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v42
; GFX9-NEXT:    v_mov_b32_e32 v44, v7
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v43
; GFX9-NEXT:    v_mov_b32_e32 v45, v6
; GFX9-NEXT:    v_mov_b32_e32 v46, v5
; GFX9-NEXT:    v_mov_b32_e32 v47, v4
; GFX9-NEXT:    v_mov_b32_e32 v56, v3
; GFX9-NEXT:    v_mov_b32_e32 v57, v2
; GFX9-NEXT:    v_mov_b32_e32 v58, v1
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v44
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v45
; GFX9-NEXT:    v_lshrrev_b32_e32 v62, 16, v46
; GFX9-NEXT:    v_lshrrev_b32_e32 v63, 16, v47
; GFX9-NEXT:    v_lshrrev_b32_e32 v60, 16, v56
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v57
; GFX9-NEXT:    v_lshrrev_b32_e32 v61, 16, v58
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v59
; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT:    buffer_store_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; GFX9-NEXT:    ; implicit-def: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; GFX9-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB54_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT:    s_mov_b32 s6, 0x5040100
; GFX9-NEXT:    v_lshrrev_b32_e32 v6, 16, v45
; GFX9-NEXT:    v_lshrrev_b32_e32 v7, 16, v44
; GFX9-NEXT:    v_lshrrev_b32_e32 v8, 16, v43
; GFX9-NEXT:    v_lshrrev_b32_e32 v9, 16, v42
; GFX9-NEXT:    v_lshrrev_b32_e32 v10, 16, v41
; GFX9-NEXT:    v_lshrrev_b32_e32 v11, 16, v40
; GFX9-NEXT:    v_lshrrev_b32_e32 v12, 16, v55
; GFX9-NEXT:    v_lshrrev_b32_e32 v13, 16, v54
; GFX9-NEXT:    v_lshrrev_b32_e32 v14, 16, v53
; GFX9-NEXT:    v_lshrrev_b32_e32 v15, 16, v52
; GFX9-NEXT:    v_lshrrev_b32_e32 v16, 16, v51
; GFX9-NEXT:    v_lshrrev_b32_e32 v17, 16, v50
; GFX9-NEXT:    v_lshrrev_b32_e32 v18, 16, v49
; GFX9-NEXT:    v_lshrrev_b32_e32 v19, 16, v48
; GFX9-NEXT:    v_lshrrev_b32_e32 v20, 16, v39
; GFX9-NEXT:    v_lshrrev_b32_e32 v21, 16, v38
; GFX9-NEXT:    v_lshrrev_b32_e32 v22, 16, v37
; GFX9-NEXT:    v_lshrrev_b32_e32 v23, 16, v36
; GFX9-NEXT:    v_lshrrev_b32_e32 v24, 16, v35
; GFX9-NEXT:    v_lshrrev_b32_e32 v25, 16, v34
; GFX9-NEXT:    v_perm_b32 v0, v33, v59, s6
; GFX9-NEXT:    v_perm_b32 v1, v61, v58, s6
; GFX9-NEXT:    v_perm_b32 v2, v32, v57, s6
; GFX9-NEXT:    v_perm_b32 v3, v60, v56, s6
; GFX9-NEXT:    v_perm_b32 v4, v63, v47, s6
; GFX9-NEXT:    v_perm_b32 v5, v62, v46, s6
; GFX9-NEXT:    v_perm_b32 v6, v6, v45, s6
; GFX9-NEXT:    v_perm_b32 v7, v7, v44, s6
; GFX9-NEXT:    v_perm_b32 v8, v8, v43, s6
; GFX9-NEXT:    v_perm_b32 v9, v9, v42, s6
; GFX9-NEXT:    v_perm_b32 v10, v10, v41, s6
; GFX9-NEXT:    v_perm_b32 v11, v11, v40, s6
; GFX9-NEXT:    v_perm_b32 v12, v12, v55, s6
; GFX9-NEXT:    v_perm_b32 v13, v13, v54, s6
; GFX9-NEXT:    v_perm_b32 v14, v14, v53, s6
; GFX9-NEXT:    v_perm_b32 v15, v15, v52, s6
; GFX9-NEXT:    v_perm_b32 v16, v16, v51, s6
; GFX9-NEXT:    v_perm_b32 v17, v17, v50, s6
; GFX9-NEXT:    v_perm_b32 v18, v18, v49, s6
; GFX9-NEXT:    v_perm_b32 v19, v19, v48, s6
; GFX9-NEXT:    v_perm_b32 v20, v20, v39, s6
; GFX9-NEXT:    v_perm_b32 v21, v21, v38, s6
; GFX9-NEXT:    v_perm_b32 v22, v22, v37, s6
; GFX9-NEXT:    v_perm_b32 v23, v23, v36, s6
; GFX9-NEXT:    v_perm_b32 v24, v24, v35, s6
; GFX9-NEXT:    v_perm_b32 v25, v25, v34, s6
; GFX9-NEXT:    ; implicit-def: $vgpr59
; GFX9-NEXT:    ; implicit-def: $vgpr58
; GFX9-NEXT:    ; implicit-def: $vgpr57
; GFX9-NEXT:    ; implicit-def: $vgpr56
; GFX9-NEXT:    ; implicit-def: $vgpr47
; GFX9-NEXT:    ; implicit-def: $vgpr46
; GFX9-NEXT:    ; implicit-def: $vgpr45
; GFX9-NEXT:    ; implicit-def: $vgpr44
; GFX9-NEXT:    ; implicit-def: $vgpr43
; GFX9-NEXT:    ; implicit-def: $vgpr42
; GFX9-NEXT:    ; implicit-def: $vgpr41
; GFX9-NEXT:    ; implicit-def: $vgpr40
; GFX9-NEXT:    ; implicit-def: $vgpr55
; GFX9-NEXT:    ; implicit-def: $vgpr54
; GFX9-NEXT:    ; implicit-def: $vgpr53
; GFX9-NEXT:    ; implicit-def: $vgpr52
; GFX9-NEXT:    ; implicit-def: $vgpr51
; GFX9-NEXT:    ; implicit-def: $vgpr50
; GFX9-NEXT:    ; implicit-def: $vgpr49
; GFX9-NEXT:    ; implicit-def: $vgpr48
; GFX9-NEXT:    ; implicit-def: $vgpr39
; GFX9-NEXT:    ; implicit-def: $vgpr38
; GFX9-NEXT:    ; implicit-def: $vgpr37
; GFX9-NEXT:    ; implicit-def: $vgpr36
; GFX9-NEXT:    ; implicit-def: $vgpr35
; GFX9-NEXT:    ; implicit-def: $vgpr34
; GFX9-NEXT:    ; implicit-def: $vgpr62
; GFX9-NEXT:    ; implicit-def: $vgpr63
; GFX9-NEXT:    ; implicit-def: $vgpr60
; GFX9-NEXT:    ; implicit-def: $vgpr32
; GFX9-NEXT:    ; implicit-def: $vgpr61
; GFX9-NEXT:    ; implicit-def: $vgpr33
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:    ; implicit-def: $vgpr28
; GFX9-NEXT:    ; kill: killed $vgpr28
; GFX9-NEXT:  .LBB54_2: ; %Flow
; GFX9-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB54_4
; GFX9-NEXT:  ; %bb.3: ; %cmp.true
; GFX9-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; GFX9-NEXT:    s_mov_b32 s6, 0x5040100
; GFX9-NEXT:    buffer_load_dword v6, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v7, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v8, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v10, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v11, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v12, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v13, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v14, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v15, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v16, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v17, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v18, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v19, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v20, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v21, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; GFX9-NEXT:    v_perm_b32 v0, v33, v59, s6
; GFX9-NEXT:    s_movk_i32 s7, 0x200
; GFX9-NEXT:    v_perm_b32 v1, v61, v58, s6
; GFX9-NEXT:    v_perm_b32 v2, v32, v57, s6
; GFX9-NEXT:    v_perm_b32 v3, v60, v56, s6
; GFX9-NEXT:    v_perm_b32 v4, v63, v47, s6
; GFX9-NEXT:    v_perm_b32 v5, v62, v46, s6
; GFX9-NEXT:    v_pk_add_f16 v0, v0, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v1, v1, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v2, v2, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v3, v3, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v4, v4, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v5, v5, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    s_waitcnt vmcnt(20)
; GFX9-NEXT:    v_perm_b32 v26, v27, v26, s6
; GFX9-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; GFX9-NEXT:    s_waitcnt vmcnt(21)
; GFX9-NEXT:    v_perm_b32 v6, v6, v45, s6
; GFX9-NEXT:    s_waitcnt vmcnt(20)
; GFX9-NEXT:    v_perm_b32 v7, v7, v44, s6
; GFX9-NEXT:    s_waitcnt vmcnt(19)
; GFX9-NEXT:    v_perm_b32 v8, v8, v43, s6
; GFX9-NEXT:    s_waitcnt vmcnt(18)
; GFX9-NEXT:    v_perm_b32 v9, v9, v42, s6
; GFX9-NEXT:    s_waitcnt vmcnt(17)
; GFX9-NEXT:    v_perm_b32 v10, v10, v41, s6
; GFX9-NEXT:    s_waitcnt vmcnt(16)
; GFX9-NEXT:    v_perm_b32 v11, v11, v40, s6
; GFX9-NEXT:    s_waitcnt vmcnt(15)
; GFX9-NEXT:    v_perm_b32 v12, v12, v55, s6
; GFX9-NEXT:    s_waitcnt vmcnt(14)
; GFX9-NEXT:    v_perm_b32 v13, v13, v54, s6
; GFX9-NEXT:    s_waitcnt vmcnt(13)
; GFX9-NEXT:    v_perm_b32 v14, v14, v53, s6
; GFX9-NEXT:    s_waitcnt vmcnt(12)
; GFX9-NEXT:    v_perm_b32 v15, v15, v52, s6
; GFX9-NEXT:    s_waitcnt vmcnt(11)
; GFX9-NEXT:    v_perm_b32 v16, v16, v51, s6
; GFX9-NEXT:    s_waitcnt vmcnt(10)
; GFX9-NEXT:    v_perm_b32 v17, v17, v50, s6
; GFX9-NEXT:    s_waitcnt vmcnt(9)
; GFX9-NEXT:    v_perm_b32 v18, v18, v49, s6
; GFX9-NEXT:    s_waitcnt vmcnt(8)
; GFX9-NEXT:    v_perm_b32 v19, v19, v48, s6
; GFX9-NEXT:    s_waitcnt vmcnt(7)
; GFX9-NEXT:    v_perm_b32 v20, v20, v39, s6
; GFX9-NEXT:    s_waitcnt vmcnt(6)
; GFX9-NEXT:    v_perm_b32 v21, v21, v38, s6
; GFX9-NEXT:    s_waitcnt vmcnt(5)
; GFX9-NEXT:    v_perm_b32 v22, v22, v37, s6
; GFX9-NEXT:    s_waitcnt vmcnt(4)
; GFX9-NEXT:    v_perm_b32 v23, v23, v36, s6
; GFX9-NEXT:    s_waitcnt vmcnt(3)
; GFX9-NEXT:    v_perm_b32 v24, v24, v35, s6
; GFX9-NEXT:    s_waitcnt vmcnt(2)
; GFX9-NEXT:    v_perm_b32 v25, v25, v34, s6
; GFX9-NEXT:    v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v9, v9, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v10, v10, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v11, v11, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v12, v12, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v13, v13, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v14, v14, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v15, v15, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v16, v16, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v17, v17, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v18, v18, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v19, v19, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v20, v20, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v21, v21, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v22, v22, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v23, v23, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v24, v24, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v25, v25, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v26, v26, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    v_perm_b32 v27, v28, v27, s6
; GFX9-NEXT:    v_pk_add_f16 v27, v27, s7 op_sel_hi:[1,0]
; GFX9-NEXT:  .LBB54_4: ; %end
; GFX9-NEXT:    s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT:    buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-TRUE16-LABEL: bitcast_v56f16_to_v14f64:
; GFX11-TRUE16:       ; %bb.0:
; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-TRUE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT:    s_cbranch_execz .LBB54_2
; GFX11-TRUE16-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v0, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v1, v1, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v2, v2, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v3, v3, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v4, v4, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v5, v5, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v6, v6, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v7, v7, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v8, v8, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v9, v9, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v10, v10, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v11, v11, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v12, v12, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v13, v13, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v14, v14, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v15, v15, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v16, v16, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v17, v17, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v18, v18, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v19, v19, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v20, v20, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v21, v21, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v22, v22, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v23, v23, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v24, v24, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v25, v25, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v26, v26, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v27, v27, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:  .LBB54_2: ; %end
; GFX11-TRUE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v56f16_to_v14f64:
; GFX11-FAKE16:       ; %bb.0:
; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v0
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v2
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v80, 16, v3
; GFX11-FAKE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v28
; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v69, v0, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v1, v70, v1, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v2, v71, v2, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v3, v80, v3, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v4, v68, v4, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v5, v67, v5, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v6, v66, v6, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v7, v65, v7, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v8, v64, v8, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v9, v55, v9, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v10, v54, v10, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v11, v53, v11, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v12, v52, v12, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v13, v51, v13, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v14, v50, v14, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v15, v49, v15, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v16, v48, v16, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v17, v39, v17, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v18, v38, v18, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v19, v37, v19, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v20, v36, v20, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v21, v35, v21, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v22, v34, v22, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v23, v33, v23, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v24, v32, v24, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v25, v31, v25, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v26, v30, v26, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v27, v29, v27, 0x5040100
; GFX11-FAKE16-NEXT:    s_and_saveexec_b32 s0, vcc_lo
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-FAKE16-NEXT:    s_cbranch_execz .LBB54_2
; GFX11-FAKE16-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v0, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v1, v1, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v2, v2, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v3, v3, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v4, v4, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v5, v5, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v6, v6, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v7, v7, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v8, v8, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v9, v9, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v10, v10, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v11, v11, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v12, v12, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v13, v13, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v14, v14, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v15, v15, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v16, v16, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v17, v17, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v18, v18, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v19, v19, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v20, v20, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v21, v21, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v22, v22, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v23, v23, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v24, v24, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v25, v25, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v26, v26, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v27, v27, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:  .LBB54_2: ; %end
; GFX11-FAKE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = fadd <56 x half> %a, splat (half 0xH0200)
  %a2 = bitcast <56 x half> %a1 to <14 x double>
  br label %end

cmp.false:
  %a3 = bitcast <56 x half> %a to <14 x double>
  br label %end

end:
  %phi = phi <14 x double> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <14 x double> %phi
}

define inreg <14 x double> @bitcast_v56f16_to_v14f64_scalar(<56 x half> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v56f16_to_v14f64_scalar:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_writelane_b32 v32, s36, 0
; SI-NEXT:    v_writelane_b32 v32, s37, 1
; SI-NEXT:    v_writelane_b32 v32, s38, 2
; SI-NEXT:    v_writelane_b32 v32, s39, 3
; SI-NEXT:    v_writelane_b32 v32, s48, 4
; SI-NEXT:    v_writelane_b32 v32, s49, 5
; SI-NEXT:    v_writelane_b32 v32, s50, 6
; SI-NEXT:    v_writelane_b32 v32, s51, 7
; SI-NEXT:    v_writelane_b32 v32, s52, 8
; SI-NEXT:    v_writelane_b32 v32, s53, 9
; SI-NEXT:    v_writelane_b32 v32, s54, 10
; SI-NEXT:    v_writelane_b32 v32, s55, 11
; SI-NEXT:    v_readfirstlane_b32 s4, v13
; SI-NEXT:    v_readfirstlane_b32 s6, v12
; SI-NEXT:    v_readfirstlane_b32 s8, v11
; SI-NEXT:    v_readfirstlane_b32 s10, v10
; SI-NEXT:    v_readfirstlane_b32 s12, v9
; SI-NEXT:    v_readfirstlane_b32 s14, v8
; SI-NEXT:    v_readfirstlane_b32 s57, v7
; SI-NEXT:    v_readfirstlane_b32 s56, v6
; SI-NEXT:    v_readfirstlane_b32 s60, v5
; SI-NEXT:    v_readfirstlane_b32 s62, v4
; SI-NEXT:    v_readfirstlane_b32 s72, v3
; SI-NEXT:    v_readfirstlane_b32 s74, v2
; SI-NEXT:    v_readfirstlane_b32 s77, v1
; SI-NEXT:    v_readfirstlane_b32 s88, v0
; SI-NEXT:    s_lshr_b32 s75, s29, 16
; SI-NEXT:    s_lshr_b32 s78, s28, 16
; SI-NEXT:    s_lshr_b32 s47, s27, 16
; SI-NEXT:    s_lshr_b32 s46, s26, 16
; SI-NEXT:    s_lshr_b32 s45, s25, 16
; SI-NEXT:    s_lshr_b32 s44, s24, 16
; SI-NEXT:    s_lshr_b32 s43, s23, 16
; SI-NEXT:    s_lshr_b32 s42, s22, 16
; SI-NEXT:    s_lshr_b32 s41, s21, 16
; SI-NEXT:    s_lshr_b32 s40, s20, 16
; SI-NEXT:    s_lshr_b32 s90, s19, 16
; SI-NEXT:    s_lshr_b32 s91, s18, 16
; SI-NEXT:    s_lshr_b32 s92, s17, 16
; SI-NEXT:    s_lshr_b32 s93, s16, 16
; SI-NEXT:    s_lshr_b32 s5, s4, 16
; SI-NEXT:    s_lshr_b32 s7, s6, 16
; SI-NEXT:    s_lshr_b32 s9, s8, 16
; SI-NEXT:    s_lshr_b32 s11, s10, 16
; SI-NEXT:    s_lshr_b32 s13, s12, 16
; SI-NEXT:    s_lshr_b32 s15, s14, 16
; SI-NEXT:    s_lshr_b32 s58, s57, 16
; SI-NEXT:    s_lshr_b32 s59, s56, 16
; SI-NEXT:    s_lshr_b32 s61, s60, 16
; SI-NEXT:    s_lshr_b32 s63, s62, 16
; SI-NEXT:    s_lshr_b32 s73, s72, 16
; SI-NEXT:    s_lshr_b32 s76, s74, 16
; SI-NEXT:    s_lshr_b32 s79, s77, 16
; SI-NEXT:    s_lshr_b32 s89, s88, 16
; SI-NEXT:    v_readfirstlane_b32 s94, v14
; SI-NEXT:    s_cmp_lg_u32 s94, 0
; SI-NEXT:    s_cbranch_scc0 .LBB55_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    s_and_b32 s16, s16, 0xffff
; SI-NEXT:    s_lshl_b32 s93, s93, 16
; SI-NEXT:    s_and_b32 s17, s17, 0xffff
; SI-NEXT:    s_lshl_b32 s92, s92, 16
; SI-NEXT:    s_or_b32 s36, s16, s93
; SI-NEXT:    s_or_b32 s37, s17, s92
; SI-NEXT:    s_and_b32 s16, s18, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s91, 16
; SI-NEXT:    s_or_b32 s38, s16, s17
; SI-NEXT:    s_and_b32 s16, s19, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s90, 16
; SI-NEXT:    s_or_b32 s39, s16, s17
; SI-NEXT:    s_and_b32 s16, s20, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s40, 16
; SI-NEXT:    s_or_b32 s40, s16, s17
; SI-NEXT:    s_and_b32 s16, s21, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s41, 16
; SI-NEXT:    s_or_b32 s41, s16, s17
; SI-NEXT:    s_and_b32 s16, s22, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s42, 16
; SI-NEXT:    s_or_b32 s42, s16, s17
; SI-NEXT:    s_and_b32 s16, s23, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s43, 16
; SI-NEXT:    s_or_b32 s43, s16, s17
; SI-NEXT:    s_and_b32 s16, s24, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s44, 16
; SI-NEXT:    s_or_b32 s44, s16, s17
; SI-NEXT:    s_and_b32 s16, s25, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s45, 16
; SI-NEXT:    s_or_b32 s45, s16, s17
; SI-NEXT:    s_and_b32 s16, s26, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s46, 16
; SI-NEXT:    s_or_b32 s46, s16, s17
; SI-NEXT:    s_and_b32 s16, s27, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s47, 16
; SI-NEXT:    s_or_b32 s47, s16, s17
; SI-NEXT:    s_and_b32 s16, s28, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s78, 16
; SI-NEXT:    s_or_b32 s48, s16, s17
; SI-NEXT:    s_and_b32 s16, s29, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s75, 16
; SI-NEXT:    s_or_b32 s49, s16, s17
; SI-NEXT:    s_and_b32 s16, s88, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s89, 16
; SI-NEXT:    s_or_b32 s50, s16, s17
; SI-NEXT:    s_and_b32 s16, s77, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s79, 16
; SI-NEXT:    s_or_b32 s51, s16, s17
; SI-NEXT:    s_and_b32 s16, s74, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s76, 16
; SI-NEXT:    s_or_b32 s52, s16, s17
; SI-NEXT:    s_and_b32 s16, s72, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s73, 16
; SI-NEXT:    s_or_b32 s53, s16, s17
; SI-NEXT:    s_and_b32 s16, s62, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s63, 16
; SI-NEXT:    s_or_b32 s54, s16, s17
; SI-NEXT:    s_and_b32 s16, s60, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s61, 16
; SI-NEXT:    s_or_b32 s55, s16, s17
; SI-NEXT:    s_and_b32 s16, s56, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s59, 16
; SI-NEXT:    s_or_b32 s56, s16, s17
; SI-NEXT:    s_and_b32 s16, s57, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s58, 16
; SI-NEXT:    s_and_b32 s14, s14, 0xffff
; SI-NEXT:    s_lshl_b32 s15, s15, 16
; SI-NEXT:    s_and_b32 s12, s12, 0xffff
; SI-NEXT:    s_lshl_b32 s13, s13, 16
; SI-NEXT:    s_and_b32 s10, s10, 0xffff
; SI-NEXT:    s_lshl_b32 s11, s11, 16
; SI-NEXT:    s_and_b32 s8, s8, 0xffff
; SI-NEXT:    s_lshl_b32 s9, s9, 16
; SI-NEXT:    s_and_b32 s6, s6, 0xffff
; SI-NEXT:    s_lshl_b32 s7, s7, 16
; SI-NEXT:    s_and_b32 s4, s4, 0xffff
; SI-NEXT:    s_lshl_b32 s5, s5, 16
; SI-NEXT:    s_or_b32 s57, s16, s17
; SI-NEXT:    s_or_b32 s58, s14, s15
; SI-NEXT:    s_or_b32 s59, s12, s13
; SI-NEXT:    s_or_b32 s60, s10, s11
; SI-NEXT:    s_or_b32 s61, s8, s9
; SI-NEXT:    s_or_b32 s62, s6, s7
; SI-NEXT:    s_or_b32 s63, s4, s5
; SI-NEXT:    v_mov_b32_e32 v0, s36
; SI-NEXT:    v_mov_b32_e32 v1, s37
; SI-NEXT:    v_mov_b32_e32 v2, s38
; SI-NEXT:    v_mov_b32_e32 v3, s39
; SI-NEXT:    v_mov_b32_e32 v4, s40
; SI-NEXT:    v_mov_b32_e32 v5, s41
; SI-NEXT:    v_mov_b32_e32 v6, s42
; SI-NEXT:    v_mov_b32_e32 v7, s43
; SI-NEXT:    v_mov_b32_e32 v8, s44
; SI-NEXT:    v_mov_b32_e32 v9, s45
; SI-NEXT:    v_mov_b32_e32 v10, s46
; SI-NEXT:    v_mov_b32_e32 v11, s47
; SI-NEXT:    v_mov_b32_e32 v12, s48
; SI-NEXT:    v_mov_b32_e32 v13, s49
; SI-NEXT:    v_mov_b32_e32 v14, s50
; SI-NEXT:    v_mov_b32_e32 v15, s51
; SI-NEXT:    v_mov_b32_e32 v16, s52
; SI-NEXT:    v_mov_b32_e32 v17, s53
; SI-NEXT:    v_mov_b32_e32 v18, s54
; SI-NEXT:    v_mov_b32_e32 v19, s55
; SI-NEXT:    v_mov_b32_e32 v20, s56
; SI-NEXT:    v_mov_b32_e32 v21, s57
; SI-NEXT:    v_mov_b32_e32 v22, s58
; SI-NEXT:    v_mov_b32_e32 v23, s59
; SI-NEXT:    v_mov_b32_e32 v24, s60
; SI-NEXT:    v_mov_b32_e32 v25, s61
; SI-NEXT:    v_mov_b32_e32 v26, s62
; SI-NEXT:    v_mov_b32_e32 v27, s63
; SI-NEXT:    v_mov_b32_e32 v28, s64
; SI-NEXT:    v_mov_b32_e32 v29, s65
; SI-NEXT:    v_mov_b32_e32 v30, s66
; SI-NEXT:    v_mov_b32_e32 v31, s67
; SI-NEXT:    s_branch .LBB55_3
; SI-NEXT:  .LBB55_2: ; %cmp.true
; SI-NEXT:    v_cvt_f32_f16_e32 v0, s93
; SI-NEXT:    v_cvt_f32_f16_e32 v2, s92
; SI-NEXT:    v_cvt_f32_f16_e32 v1, s16
; SI-NEXT:    v_cvt_f32_f16_e32 v3, s17
; SI-NEXT:    v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT:    v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT:    v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT:    v_cvt_f16_f32_e32 v0, v0
; SI-NEXT:    v_cvt_f16_f32_e32 v2, v2
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v1, v1
; SI-NEXT:    v_cvt_f16_f32_e32 v3, v3
; SI-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
; SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT:    v_or_b32_e32 v0, v1, v0
; SI-NEXT:    v_or_b32_e32 v1, v3, v2
; SI-NEXT:    v_cvt_f32_f16_e32 v2, s91
; SI-NEXT:    v_cvt_f32_f16_e32 v3, s18
; SI-NEXT:    v_cvt_f32_f16_e32 v4, s19
; SI-NEXT:    v_cvt_f32_f16_e32 v5, s20
; SI-NEXT:    v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT:    v_cvt_f16_f32_e32 v2, v2
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v3, v3
; SI-NEXT:    v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT:    v_cvt_f16_f32_e32 v4, v4
; SI-NEXT:    v_or_b32_e32 v2, v3, v2
; SI-NEXT:    v_cvt_f32_f16_e32 v3, s90
; SI-NEXT:    v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT:    v_cvt_f16_f32_e32 v5, v5
; SI-NEXT:    v_cvt_f32_f16_e32 v6, s21
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v3, v3
; SI-NEXT:    v_cvt_f32_f16_e32 v7, s22
; SI-NEXT:    v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT:    v_cvt_f16_f32_e32 v6, v6
; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT:    v_or_b32_e32 v3, v4, v3
; SI-NEXT:    v_cvt_f32_f16_e32 v4, s40
; SI-NEXT:    v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT:    v_cvt_f16_f32_e32 v7, v7
; SI-NEXT:    v_cvt_f32_f16_e32 v8, s23
; SI-NEXT:    v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT:    v_cvt_f16_f32_e32 v4, v4
; SI-NEXT:    v_cvt_f32_f16_e32 v9, s24
; SI-NEXT:    v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT:    v_cvt_f16_f32_e32 v8, v8
; SI-NEXT:    v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT:    v_or_b32_e32 v4, v5, v4
; SI-NEXT:    v_cvt_f32_f16_e32 v5, s41
; SI-NEXT:    v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT:    v_cvt_f16_f32_e32 v9, v9
; SI-NEXT:    v_cvt_f32_f16_e32 v10, s25
; SI-NEXT:    v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT:    v_cvt_f16_f32_e32 v5, v5
; SI-NEXT:    v_cvt_f32_f16_e32 v11, s26
; SI-NEXT:    v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT:    v_cvt_f16_f32_e32 v10, v10
; SI-NEXT:    v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT:    v_or_b32_e32 v5, v6, v5
; SI-NEXT:    v_cvt_f32_f16_e32 v6, s42
; SI-NEXT:    v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT:    v_cvt_f16_f32_e32 v11, v11
; SI-NEXT:    v_cvt_f32_f16_e32 v12, s27
; SI-NEXT:    v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT:    v_cvt_f16_f32_e32 v6, v6
; SI-NEXT:    v_cvt_f32_f16_e32 v13, s28
; SI-NEXT:    v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT:    v_cvt_f16_f32_e32 v12, v12
; SI-NEXT:    v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT:    v_or_b32_e32 v6, v7, v6
; SI-NEXT:    v_cvt_f32_f16_e32 v7, s43
; SI-NEXT:    v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT:    v_cvt_f16_f32_e32 v13, v13
; SI-NEXT:    v_cvt_f32_f16_e32 v14, s29
; SI-NEXT:    v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT:    v_cvt_f16_f32_e32 v7, v7
; SI-NEXT:    v_cvt_f32_f16_e32 v15, s88
; SI-NEXT:    v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT:    v_cvt_f16_f32_e32 v14, v14
; SI-NEXT:    v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT:    v_or_b32_e32 v7, v8, v7
; SI-NEXT:    v_cvt_f32_f16_e32 v8, s44
; SI-NEXT:    v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT:    v_cvt_f16_f32_e32 v15, v15
; SI-NEXT:    v_cvt_f32_f16_e32 v16, s77
; SI-NEXT:    v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT:    v_cvt_f16_f32_e32 v8, v8
; SI-NEXT:    v_cvt_f32_f16_e32 v17, s74
; SI-NEXT:    v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT:    v_cvt_f16_f32_e32 v16, v16
; SI-NEXT:    v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT:    v_or_b32_e32 v8, v9, v8
; SI-NEXT:    v_cvt_f32_f16_e32 v9, s45
; SI-NEXT:    v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT:    v_cvt_f16_f32_e32 v17, v17
; SI-NEXT:    v_cvt_f32_f16_e32 v18, s72
; SI-NEXT:    v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT:    v_cvt_f16_f32_e32 v9, v9
; SI-NEXT:    v_cvt_f32_f16_e32 v19, s62
; SI-NEXT:    v_add_f32_e32 v18, 0x38000000, v18
; SI-NEXT:    v_cvt_f16_f32_e32 v18, v18
; SI-NEXT:    v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT:    v_or_b32_e32 v9, v10, v9
; SI-NEXT:    v_cvt_f32_f16_e32 v10, s46
; SI-NEXT:    v_add_f32_e32 v19, 0x38000000, v19
; SI-NEXT:    v_cvt_f16_f32_e32 v19, v19
; SI-NEXT:    v_cvt_f32_f16_e32 v20, s60
; SI-NEXT:    v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT:    v_cvt_f16_f32_e32 v10, v10
; SI-NEXT:    v_cvt_f32_f16_e32 v21, s56
; SI-NEXT:    v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT:    v_cvt_f16_f32_e32 v20, v20
; SI-NEXT:    v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT:    v_or_b32_e32 v10, v11, v10
; SI-NEXT:    v_cvt_f32_f16_e32 v11, s47
; SI-NEXT:    v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT:    v_cvt_f16_f32_e32 v21, v21
; SI-NEXT:    v_cvt_f32_f16_e32 v22, s57
; SI-NEXT:    v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT:    v_cvt_f16_f32_e32 v11, v11
; SI-NEXT:    v_cvt_f32_f16_e32 v23, s14
; SI-NEXT:    v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT:    v_cvt_f16_f32_e32 v22, v22
; SI-NEXT:    v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT:    v_or_b32_e32 v11, v12, v11
; SI-NEXT:    v_cvt_f32_f16_e32 v12, s78
; SI-NEXT:    v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT:    v_cvt_f16_f32_e32 v23, v23
; SI-NEXT:    v_cvt_f32_f16_e32 v24, s12
; SI-NEXT:    v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT:    v_cvt_f16_f32_e32 v12, v12
; SI-NEXT:    v_cvt_f32_f16_e32 v25, s10
; SI-NEXT:    v_add_f32_e32 v24, 0x38000000, v24
; SI-NEXT:    v_cvt_f16_f32_e32 v24, v24
; SI-NEXT:    v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT:    v_or_b32_e32 v12, v13, v12
; SI-NEXT:    v_cvt_f32_f16_e32 v13, s75
; SI-NEXT:    v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT:    v_cvt_f16_f32_e32 v25, v25
; SI-NEXT:    v_cvt_f32_f16_e32 v26, s8
; SI-NEXT:    v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT:    v_cvt_f16_f32_e32 v13, v13
; SI-NEXT:    v_cvt_f32_f16_e32 v27, s6
; SI-NEXT:    v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT:    v_cvt_f16_f32_e32 v26, v26
; SI-NEXT:    v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT:    v_or_b32_e32 v13, v14, v13
; SI-NEXT:    v_cvt_f32_f16_e32 v14, s89
; SI-NEXT:    v_add_f32_e32 v27, 0x38000000, v27
; SI-NEXT:    v_cvt_f16_f32_e32 v27, v27
; SI-NEXT:    v_cvt_f32_f16_e32 v28, s4
; SI-NEXT:    v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT:    v_cvt_f16_f32_e32 v14, v14
; SI-NEXT:    v_add_f32_e32 v28, 0x38000000, v28
; SI-NEXT:    v_cvt_f16_f32_e32 v28, v28
; SI-NEXT:    v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT:    v_or_b32_e32 v14, v15, v14
; SI-NEXT:    v_cvt_f32_f16_e32 v15, s79
; SI-NEXT:    v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT:    v_cvt_f16_f32_e32 v15, v15
; SI-NEXT:    v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT:    v_or_b32_e32 v15, v16, v15
; SI-NEXT:    v_cvt_f32_f16_e32 v16, s76
; SI-NEXT:    v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT:    v_cvt_f16_f32_e32 v16, v16
; SI-NEXT:    v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT:    v_or_b32_e32 v16, v17, v16
; SI-NEXT:    v_cvt_f32_f16_e32 v17, s73
; SI-NEXT:    v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT:    v_cvt_f16_f32_e32 v17, v17
; SI-NEXT:    v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT:    v_or_b32_e32 v17, v18, v17
; SI-NEXT:    v_cvt_f32_f16_e32 v18, s63
; SI-NEXT:    v_add_f32_e32 v18, 0x38000000, v18
; SI-NEXT:    v_cvt_f16_f32_e32 v18, v18
; SI-NEXT:    v_lshlrev_b32_e32 v18, 16, v18
; SI-NEXT:    v_or_b32_e32 v18, v19, v18
; SI-NEXT:    v_cvt_f32_f16_e32 v19, s61
; SI-NEXT:    v_add_f32_e32 v19, 0x38000000, v19
; SI-NEXT:    v_cvt_f16_f32_e32 v19, v19
; SI-NEXT:    v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT:    v_or_b32_e32 v19, v20, v19
; SI-NEXT:    v_cvt_f32_f16_e32 v20, s59
; SI-NEXT:    v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT:    v_cvt_f16_f32_e32 v20, v20
; SI-NEXT:    v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT:    v_or_b32_e32 v20, v21, v20
; SI-NEXT:    v_cvt_f32_f16_e32 v21, s58
; SI-NEXT:    v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT:    v_cvt_f16_f32_e32 v21, v21
; SI-NEXT:    v_lshlrev_b32_e32 v21, 16, v21
; SI-NEXT:    v_or_b32_e32 v21, v22, v21
; SI-NEXT:    v_cvt_f32_f16_e32 v22, s15
; SI-NEXT:    v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT:    v_cvt_f16_f32_e32 v22, v22
; SI-NEXT:    v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT:    v_or_b32_e32 v22, v23, v22
; SI-NEXT:    v_cvt_f32_f16_e32 v23, s13
; SI-NEXT:    v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT:    v_cvt_f16_f32_e32 v23, v23
; SI-NEXT:    v_lshlrev_b32_e32 v23, 16, v23
; SI-NEXT:    v_or_b32_e32 v23, v24, v23
; SI-NEXT:    v_cvt_f32_f16_e32 v24, s11
; SI-NEXT:    v_add_f32_e32 v24, 0x38000000, v24
; SI-NEXT:    v_cvt_f16_f32_e32 v24, v24
; SI-NEXT:    v_lshlrev_b32_e32 v24, 16, v24
; SI-NEXT:    v_or_b32_e32 v24, v25, v24
; SI-NEXT:    v_cvt_f32_f16_e32 v25, s9
; SI-NEXT:    v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT:    v_cvt_f16_f32_e32 v25, v25
; SI-NEXT:    v_lshlrev_b32_e32 v25, 16, v25
; SI-NEXT:    v_or_b32_e32 v25, v26, v25
; SI-NEXT:    v_cvt_f32_f16_e32 v26, s7
; SI-NEXT:    v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT:    v_cvt_f16_f32_e32 v26, v26
; SI-NEXT:    v_lshlrev_b32_e32 v26, 16, v26
; SI-NEXT:    v_or_b32_e32 v26, v27, v26
; SI-NEXT:    v_cvt_f32_f16_e32 v27, s5
; SI-NEXT:    v_add_f32_e32 v27, 0x38000000, v27
; SI-NEXT:    v_cvt_f16_f32_e32 v27, v27
; SI-NEXT:    v_lshlrev_b32_e32 v27, 16, v27
; SI-NEXT:    v_or_b32_e32 v27, v28, v27
; SI-NEXT:  .LBB55_3: ; %end
; SI-NEXT:    v_readlane_b32 s55, v32, 11
; SI-NEXT:    v_readlane_b32 s54, v32, 10
; SI-NEXT:    v_readlane_b32 s53, v32, 9
; SI-NEXT:    v_readlane_b32 s52, v32, 8
; SI-NEXT:    v_readlane_b32 s51, v32, 7
; SI-NEXT:    v_readlane_b32 s50, v32, 6
; SI-NEXT:    v_readlane_b32 s49, v32, 5
; SI-NEXT:    v_readlane_b32 s48, v32, 4
; SI-NEXT:    v_readlane_b32 s39, v32, 3
; SI-NEXT:    v_readlane_b32 s38, v32, 2
; SI-NEXT:    v_readlane_b32 s37, v32, 1
; SI-NEXT:    v_readlane_b32 s36, v32, 0
; SI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v56f16_to_v14f64_scalar:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    v_writelane_b32 v32, s36, 0
; VI-NEXT:    v_writelane_b32 v32, s37, 1
; VI-NEXT:    v_writelane_b32 v32, s38, 2
; VI-NEXT:    v_writelane_b32 v32, s39, 3
; VI-NEXT:    v_writelane_b32 v32, s48, 4
; VI-NEXT:    v_writelane_b32 v32, s49, 5
; VI-NEXT:    v_writelane_b32 v32, s50, 6
; VI-NEXT:    v_writelane_b32 v32, s51, 7
; VI-NEXT:    v_writelane_b32 v32, s52, 8
; VI-NEXT:    v_writelane_b32 v32, s53, 9
; VI-NEXT:    v_writelane_b32 v32, s54, 10
; VI-NEXT:    v_writelane_b32 v32, s55, 11
; VI-NEXT:    v_writelane_b32 v32, s30, 12
; VI-NEXT:    v_writelane_b32 v32, s31, 13
; VI-NEXT:    v_readfirstlane_b32 s4, v13
; VI-NEXT:    v_readfirstlane_b32 s6, v12
; VI-NEXT:    v_readfirstlane_b32 s8, v11
; VI-NEXT:    v_readfirstlane_b32 s10, v10
; VI-NEXT:    v_readfirstlane_b32 s12, v9
; VI-NEXT:    v_readfirstlane_b32 s14, v8
; VI-NEXT:    v_readfirstlane_b32 s57, v7
; VI-NEXT:    v_readfirstlane_b32 s56, v6
; VI-NEXT:    v_readfirstlane_b32 s60, v5
; VI-NEXT:    v_readfirstlane_b32 s62, v4
; VI-NEXT:    v_readfirstlane_b32 s73, v3
; VI-NEXT:    v_readfirstlane_b32 s76, v2
; VI-NEXT:    v_readfirstlane_b32 s78, v1
; VI-NEXT:    v_readfirstlane_b32 s88, v0
; VI-NEXT:    s_lshr_b32 s72, s29, 16
; VI-NEXT:    s_lshr_b32 s75, s28, 16
; VI-NEXT:    s_lshr_b32 s47, s27, 16
; VI-NEXT:    s_lshr_b32 s46, s26, 16
; VI-NEXT:    s_lshr_b32 s45, s25, 16
; VI-NEXT:    s_lshr_b32 s44, s24, 16
; VI-NEXT:    s_lshr_b32 s43, s23, 16
; VI-NEXT:    s_lshr_b32 s42, s22, 16
; VI-NEXT:    s_lshr_b32 s41, s21, 16
; VI-NEXT:    s_lshr_b32 s40, s20, 16
; VI-NEXT:    s_lshr_b32 s90, s19, 16
; VI-NEXT:    s_lshr_b32 s91, s18, 16
; VI-NEXT:    s_lshr_b32 vcc_lo, s17, 16
; VI-NEXT:    s_lshr_b32 vcc_hi, s16, 16
; VI-NEXT:    s_lshr_b32 s5, s4, 16
; VI-NEXT:    s_lshr_b32 s7, s6, 16
; VI-NEXT:    s_lshr_b32 s9, s8, 16
; VI-NEXT:    s_lshr_b32 s11, s10, 16
; VI-NEXT:    s_lshr_b32 s13, s12, 16
; VI-NEXT:    s_lshr_b32 s15, s14, 16
; VI-NEXT:    s_lshr_b32 s58, s57, 16
; VI-NEXT:    s_lshr_b32 s59, s56, 16
; VI-NEXT:    s_lshr_b32 s61, s60, 16
; VI-NEXT:    s_lshr_b32 s63, s62, 16
; VI-NEXT:    s_lshr_b32 s74, s73, 16
; VI-NEXT:    s_lshr_b32 s77, s76, 16
; VI-NEXT:    s_lshr_b32 s79, s78, 16
; VI-NEXT:    s_lshr_b32 s89, s88, 16
; VI-NEXT:    v_readfirstlane_b32 s30, v14
; VI-NEXT:    s_cmp_lg_u32 s30, 0
; VI-NEXT:    s_cbranch_scc0 .LBB55_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    s_and_b32 s16, 0xffff, s16
; VI-NEXT:    s_lshl_b32 vcc_hi, vcc_hi, 16
; VI-NEXT:    s_and_b32 s17, 0xffff, s17
; VI-NEXT:    s_lshl_b32 vcc_lo, vcc_lo, 16
; VI-NEXT:    s_or_b32 s36, s16, vcc_hi
; VI-NEXT:    s_or_b32 s37, s17, vcc_lo
; VI-NEXT:    s_and_b32 s16, 0xffff, s18
; VI-NEXT:    s_lshl_b32 s17, s91, 16
; VI-NEXT:    s_or_b32 s38, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s19
; VI-NEXT:    s_lshl_b32 s17, s90, 16
; VI-NEXT:    s_or_b32 s39, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s20
; VI-NEXT:    s_lshl_b32 s17, s40, 16
; VI-NEXT:    s_or_b32 s40, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s21
; VI-NEXT:    s_lshl_b32 s17, s41, 16
; VI-NEXT:    s_or_b32 s41, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s22
; VI-NEXT:    s_lshl_b32 s17, s42, 16
; VI-NEXT:    s_or_b32 s42, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s23
; VI-NEXT:    s_lshl_b32 s17, s43, 16
; VI-NEXT:    s_or_b32 s43, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s24
; VI-NEXT:    s_lshl_b32 s17, s44, 16
; VI-NEXT:    s_or_b32 s44, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s25
; VI-NEXT:    s_lshl_b32 s17, s45, 16
; VI-NEXT:    s_or_b32 s45, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s26
; VI-NEXT:    s_lshl_b32 s17, s46, 16
; VI-NEXT:    s_or_b32 s46, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s27
; VI-NEXT:    s_lshl_b32 s17, s47, 16
; VI-NEXT:    s_or_b32 s47, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s28
; VI-NEXT:    s_lshl_b32 s17, s75, 16
; VI-NEXT:    s_or_b32 s48, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s29
; VI-NEXT:    s_lshl_b32 s17, s72, 16
; VI-NEXT:    s_or_b32 s49, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s88
; VI-NEXT:    s_lshl_b32 s17, s89, 16
; VI-NEXT:    s_or_b32 s50, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s78
; VI-NEXT:    s_lshl_b32 s17, s79, 16
; VI-NEXT:    s_or_b32 s51, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s76
; VI-NEXT:    s_lshl_b32 s17, s77, 16
; VI-NEXT:    s_or_b32 s52, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s73
; VI-NEXT:    s_lshl_b32 s17, s74, 16
; VI-NEXT:    s_or_b32 s53, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s62
; VI-NEXT:    s_lshl_b32 s17, s63, 16
; VI-NEXT:    s_or_b32 s54, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s60
; VI-NEXT:    s_lshl_b32 s17, s61, 16
; VI-NEXT:    s_or_b32 s55, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s56
; VI-NEXT:    s_lshl_b32 s17, s59, 16
; VI-NEXT:    s_or_b32 s56, s16, s17
; VI-NEXT:    s_and_b32 s16, 0xffff, s57
; VI-NEXT:    s_lshl_b32 s17, s58, 16
; VI-NEXT:    s_and_b32 s14, 0xffff, s14
; VI-NEXT:    s_lshl_b32 s15, s15, 16
; VI-NEXT:    s_and_b32 s12, 0xffff, s12
; VI-NEXT:    s_lshl_b32 s13, s13, 16
; VI-NEXT:    s_and_b32 s10, 0xffff, s10
; VI-NEXT:    s_lshl_b32 s11, s11, 16
; VI-NEXT:    s_and_b32 s8, 0xffff, s8
; VI-NEXT:    s_lshl_b32 s9, s9, 16
; VI-NEXT:    s_and_b32 s6, 0xffff, s6
; VI-NEXT:    s_lshl_b32 s7, s7, 16
; VI-NEXT:    s_and_b32 s4, 0xffff, s4
; VI-NEXT:    s_lshl_b32 s5, s5, 16
; VI-NEXT:    s_or_b32 s57, s16, s17
; VI-NEXT:    s_or_b32 s58, s14, s15
; VI-NEXT:    s_or_b32 s59, s12, s13
; VI-NEXT:    s_or_b32 s60, s10, s11
; VI-NEXT:    s_or_b32 s61, s8, s9
; VI-NEXT:    s_or_b32 s62, s6, s7
; VI-NEXT:    s_or_b32 s63, s4, s5
; VI-NEXT:    v_mov_b32_e32 v0, s36
; VI-NEXT:    v_mov_b32_e32 v1, s37
; VI-NEXT:    v_mov_b32_e32 v2, s38
; VI-NEXT:    v_mov_b32_e32 v3, s39
; VI-NEXT:    v_mov_b32_e32 v4, s40
; VI-NEXT:    v_mov_b32_e32 v5, s41
; VI-NEXT:    v_mov_b32_e32 v6, s42
; VI-NEXT:    v_mov_b32_e32 v7, s43
; VI-NEXT:    v_mov_b32_e32 v8, s44
; VI-NEXT:    v_mov_b32_e32 v9, s45
; VI-NEXT:    v_mov_b32_e32 v10, s46
; VI-NEXT:    v_mov_b32_e32 v11, s47
; VI-NEXT:    v_mov_b32_e32 v12, s48
; VI-NEXT:    v_mov_b32_e32 v13, s49
; VI-NEXT:    v_mov_b32_e32 v14, s50
; VI-NEXT:    v_mov_b32_e32 v15, s51
; VI-NEXT:    v_mov_b32_e32 v16, s52
; VI-NEXT:    v_mov_b32_e32 v17, s53
; VI-NEXT:    v_mov_b32_e32 v18, s54
; VI-NEXT:    v_mov_b32_e32 v19, s55
; VI-NEXT:    v_mov_b32_e32 v20, s56
; VI-NEXT:    v_mov_b32_e32 v21, s57
; VI-NEXT:    v_mov_b32_e32 v22, s58
; VI-NEXT:    v_mov_b32_e32 v23, s59
; VI-NEXT:    v_mov_b32_e32 v24, s60
; VI-NEXT:    v_mov_b32_e32 v25, s61
; VI-NEXT:    v_mov_b32_e32 v26, s62
; VI-NEXT:    v_mov_b32_e32 v27, s63
; VI-NEXT:    v_mov_b32_e32 v28, s64
; VI-NEXT:    v_mov_b32_e32 v29, s65
; VI-NEXT:    v_mov_b32_e32 v30, s66
; VI-NEXT:    v_mov_b32_e32 v31, s67
; VI-NEXT:    s_branch .LBB55_3
; VI-NEXT:  .LBB55_2: ; %cmp.true
; VI-NEXT:    v_mov_b32_e32 v27, 0x200
; VI-NEXT:    v_mov_b32_e32 v0, vcc_hi
; VI-NEXT:    v_mov_b32_e32 v2, vcc_lo
; VI-NEXT:    v_add_f16_sdwa v0, v0, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v1, s16, v27
; VI-NEXT:    v_add_f16_sdwa v2, v2, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v3, s17, v27
; VI-NEXT:    v_or_b32_e32 v0, v1, v0
; VI-NEXT:    v_or_b32_e32 v1, v3, v2
; VI-NEXT:    v_mov_b32_e32 v2, s91
; VI-NEXT:    v_add_f16_sdwa v2, v2, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v3, s18, v27
; VI-NEXT:    v_or_b32_e32 v2, v3, v2
; VI-NEXT:    v_mov_b32_e32 v3, s90
; VI-NEXT:    v_add_f16_sdwa v3, v3, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v4, s19, v27
; VI-NEXT:    v_or_b32_e32 v3, v4, v3
; VI-NEXT:    v_mov_b32_e32 v4, s40
; VI-NEXT:    v_add_f16_sdwa v4, v4, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v5, s20, v27
; VI-NEXT:    v_or_b32_e32 v4, v5, v4
; VI-NEXT:    v_mov_b32_e32 v5, s41
; VI-NEXT:    v_add_f16_sdwa v5, v5, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v6, s21, v27
; VI-NEXT:    v_or_b32_e32 v5, v6, v5
; VI-NEXT:    v_mov_b32_e32 v6, s42
; VI-NEXT:    v_add_f16_sdwa v6, v6, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v7, s22, v27
; VI-NEXT:    v_or_b32_e32 v6, v7, v6
; VI-NEXT:    v_mov_b32_e32 v7, s43
; VI-NEXT:    v_add_f16_sdwa v7, v7, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v8, s23, v27
; VI-NEXT:    v_or_b32_e32 v7, v8, v7
; VI-NEXT:    v_mov_b32_e32 v8, s44
; VI-NEXT:    v_add_f16_sdwa v8, v8, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v9, s24, v27
; VI-NEXT:    v_or_b32_e32 v8, v9, v8
; VI-NEXT:    v_mov_b32_e32 v9, s45
; VI-NEXT:    v_add_f16_sdwa v9, v9, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v10, s25, v27
; VI-NEXT:    v_or_b32_e32 v9, v10, v9
; VI-NEXT:    v_mov_b32_e32 v10, s46
; VI-NEXT:    v_add_f16_sdwa v10, v10, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v11, s26, v27
; VI-NEXT:    v_or_b32_e32 v10, v11, v10
; VI-NEXT:    v_mov_b32_e32 v11, s47
; VI-NEXT:    v_add_f16_sdwa v11, v11, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v12, s27, v27
; VI-NEXT:    v_or_b32_e32 v11, v12, v11
; VI-NEXT:    v_mov_b32_e32 v12, s75
; VI-NEXT:    v_add_f16_sdwa v12, v12, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v13, s28, v27
; VI-NEXT:    v_or_b32_e32 v12, v13, v12
; VI-NEXT:    v_mov_b32_e32 v13, s72
; VI-NEXT:    v_add_f16_sdwa v13, v13, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v14, s29, v27
; VI-NEXT:    v_or_b32_e32 v13, v14, v13
; VI-NEXT:    v_mov_b32_e32 v14, s89
; VI-NEXT:    v_add_f16_sdwa v14, v14, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v15, s88, v27
; VI-NEXT:    v_or_b32_e32 v14, v15, v14
; VI-NEXT:    v_mov_b32_e32 v15, s79
; VI-NEXT:    v_add_f16_sdwa v15, v15, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v16, s78, v27
; VI-NEXT:    v_or_b32_e32 v15, v16, v15
; VI-NEXT:    v_mov_b32_e32 v16, s77
; VI-NEXT:    v_add_f16_sdwa v16, v16, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v17, s76, v27
; VI-NEXT:    v_or_b32_e32 v16, v17, v16
; VI-NEXT:    v_mov_b32_e32 v17, s74
; VI-NEXT:    v_add_f16_sdwa v17, v17, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v18, s73, v27
; VI-NEXT:    v_or_b32_e32 v17, v18, v17
; VI-NEXT:    v_mov_b32_e32 v18, s63
; VI-NEXT:    v_add_f16_sdwa v18, v18, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v19, s62, v27
; VI-NEXT:    v_or_b32_e32 v18, v19, v18
; VI-NEXT:    v_mov_b32_e32 v19, s61
; VI-NEXT:    v_add_f16_sdwa v19, v19, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v20, s60, v27
; VI-NEXT:    v_or_b32_e32 v19, v20, v19
; VI-NEXT:    v_mov_b32_e32 v20, s59
; VI-NEXT:    v_add_f16_sdwa v20, v20, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v21, s56, v27
; VI-NEXT:    v_or_b32_e32 v20, v21, v20
; VI-NEXT:    v_mov_b32_e32 v21, s58
; VI-NEXT:    v_add_f16_sdwa v21, v21, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v22, s57, v27
; VI-NEXT:    v_or_b32_e32 v21, v22, v21
; VI-NEXT:    v_mov_b32_e32 v22, s15
; VI-NEXT:    v_add_f16_sdwa v22, v22, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v23, s14, v27
; VI-NEXT:    v_or_b32_e32 v22, v23, v22
; VI-NEXT:    v_mov_b32_e32 v23, s13
; VI-NEXT:    v_add_f16_sdwa v23, v23, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v24, s12, v27
; VI-NEXT:    v_or_b32_e32 v23, v24, v23
; VI-NEXT:    v_mov_b32_e32 v24, s11
; VI-NEXT:    v_add_f16_sdwa v24, v24, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v25, s10, v27
; VI-NEXT:    v_or_b32_e32 v24, v25, v24
; VI-NEXT:    v_mov_b32_e32 v25, s9
; VI-NEXT:    v_add_f16_sdwa v25, v25, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v26, s8, v27
; VI-NEXT:    v_or_b32_e32 v25, v26, v25
; VI-NEXT:    v_mov_b32_e32 v26, s7
; VI-NEXT:    v_add_f16_sdwa v26, v26, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v28, s6, v27
; VI-NEXT:    v_or_b32_e32 v26, v28, v26
; VI-NEXT:    v_mov_b32_e32 v28, s5
; VI-NEXT:    v_add_f16_sdwa v28, v28, v27 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT:    v_add_f16_e32 v27, s4, v27
; VI-NEXT:    v_or_b32_e32 v27, v27, v28
; VI-NEXT:  .LBB55_3: ; %end
; VI-NEXT:    v_readlane_b32 s30, v32, 12
; VI-NEXT:    v_readlane_b32 s31, v32, 13
; VI-NEXT:    v_readlane_b32 s55, v32, 11
; VI-NEXT:    v_readlane_b32 s54, v32, 10
; VI-NEXT:    v_readlane_b32 s53, v32, 9
; VI-NEXT:    v_readlane_b32 s52, v32, 8
; VI-NEXT:    v_readlane_b32 s51, v32, 7
; VI-NEXT:    v_readlane_b32 s50, v32, 6
; VI-NEXT:    v_readlane_b32 s49, v32, 5
; VI-NEXT:    v_readlane_b32 s48, v32, 4
; VI-NEXT:    v_readlane_b32 s39, v32, 3
; VI-NEXT:    v_readlane_b32 s38, v32, 2
; VI-NEXT:    v_readlane_b32 s37, v32, 1
; VI-NEXT:    v_readlane_b32 s36, v32, 0
; VI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v56f16_to_v14f64_scalar:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT:    buffer_store_dword v32, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    s_mov_b64 exec, s[4:5]
; GFX9-NEXT:    v_writelane_b32 v32, s36, 0
; GFX9-NEXT:    v_writelane_b32 v32, s37, 1
; GFX9-NEXT:    v_writelane_b32 v32, s38, 2
; GFX9-NEXT:    v_writelane_b32 v32, s39, 3
; GFX9-NEXT:    v_writelane_b32 v32, s48, 4
; GFX9-NEXT:    v_writelane_b32 v32, s49, 5
; GFX9-NEXT:    v_writelane_b32 v32, s50, 6
; GFX9-NEXT:    v_writelane_b32 v32, s51, 7
; GFX9-NEXT:    v_writelane_b32 v32, s52, 8
; GFX9-NEXT:    v_writelane_b32 v32, s53, 9
; GFX9-NEXT:    v_writelane_b32 v32, s54, 10
; GFX9-NEXT:    v_writelane_b32 v32, s55, 11
; GFX9-NEXT:    v_readfirstlane_b32 s4, v13
; GFX9-NEXT:    v_readfirstlane_b32 s6, v12
; GFX9-NEXT:    v_readfirstlane_b32 s8, v11
; GFX9-NEXT:    v_readfirstlane_b32 s10, v10
; GFX9-NEXT:    v_readfirstlane_b32 s12, v9
; GFX9-NEXT:    v_readfirstlane_b32 s14, v8
; GFX9-NEXT:    v_readfirstlane_b32 s57, v7
; GFX9-NEXT:    v_readfirstlane_b32 s60, v6
; GFX9-NEXT:    v_readfirstlane_b32 s62, v5
; GFX9-NEXT:    v_readfirstlane_b32 s72, v4
; GFX9-NEXT:    v_readfirstlane_b32 s74, v3
; GFX9-NEXT:    v_readfirstlane_b32 s76, v2
; GFX9-NEXT:    v_readfirstlane_b32 s78, v1
; GFX9-NEXT:    v_readfirstlane_b32 s88, v0
; GFX9-NEXT:    s_lshr_b32 s56, s29, 16
; GFX9-NEXT:    s_lshr_b32 s59, s28, 16
; GFX9-NEXT:    s_lshr_b32 s47, s27, 16
; GFX9-NEXT:    s_lshr_b32 s46, s26, 16
; GFX9-NEXT:    s_lshr_b32 s45, s25, 16
; GFX9-NEXT:    s_lshr_b32 s44, s24, 16
; GFX9-NEXT:    s_lshr_b32 s43, s23, 16
; GFX9-NEXT:    s_lshr_b32 s42, s22, 16
; GFX9-NEXT:    s_lshr_b32 s41, s21, 16
; GFX9-NEXT:    s_lshr_b32 s40, s20, 16
; GFX9-NEXT:    s_lshr_b32 s90, s19, 16
; GFX9-NEXT:    s_lshr_b32 s91, s18, 16
; GFX9-NEXT:    s_lshr_b32 s92, s17, 16
; GFX9-NEXT:    s_lshr_b32 s93, s16, 16
; GFX9-NEXT:    s_lshr_b32 s5, s4, 16
; GFX9-NEXT:    s_lshr_b32 s7, s6, 16
; GFX9-NEXT:    s_lshr_b32 s9, s8, 16
; GFX9-NEXT:    s_lshr_b32 s11, s10, 16
; GFX9-NEXT:    s_lshr_b32 s13, s12, 16
; GFX9-NEXT:    s_lshr_b32 s15, s14, 16
; GFX9-NEXT:    s_lshr_b32 s58, s57, 16
; GFX9-NEXT:    s_lshr_b32 s61, s60, 16
; GFX9-NEXT:    s_lshr_b32 s63, s62, 16
; GFX9-NEXT:    s_lshr_b32 s73, s72, 16
; GFX9-NEXT:    s_lshr_b32 s75, s74, 16
; GFX9-NEXT:    s_lshr_b32 s77, s76, 16
; GFX9-NEXT:    s_lshr_b32 s79, s78, 16
; GFX9-NEXT:    s_lshr_b32 s89, s88, 16
; GFX9-NEXT:    v_readfirstlane_b32 s94, v14
; GFX9-NEXT:    s_cmp_lg_u32 s94, 0
; GFX9-NEXT:    s_cbranch_scc0 .LBB55_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    s_pack_ll_b32_b16 s36, s16, s93
; GFX9-NEXT:    s_pack_ll_b32_b16 s37, s17, s92
; GFX9-NEXT:    s_pack_ll_b32_b16 s38, s18, s91
; GFX9-NEXT:    s_pack_ll_b32_b16 s39, s19, s90
; GFX9-NEXT:    s_pack_ll_b32_b16 s40, s20, s40
; GFX9-NEXT:    s_pack_ll_b32_b16 s41, s21, s41
; GFX9-NEXT:    s_pack_ll_b32_b16 s42, s22, s42
; GFX9-NEXT:    s_pack_ll_b32_b16 s43, s23, s43
; GFX9-NEXT:    s_pack_ll_b32_b16 s44, s24, s44
; GFX9-NEXT:    s_pack_ll_b32_b16 s45, s25, s45
; GFX9-NEXT:    s_pack_ll_b32_b16 s46, s26, s46
; GFX9-NEXT:    s_pack_ll_b32_b16 s47, s27, s47
; GFX9-NEXT:    s_pack_ll_b32_b16 s48, s28, s59
; GFX9-NEXT:    s_pack_ll_b32_b16 s49, s29, s56
; GFX9-NEXT:    s_pack_ll_b32_b16 s50, s88, s89
; GFX9-NEXT:    s_pack_ll_b32_b16 s51, s78, s79
; GFX9-NEXT:    s_pack_ll_b32_b16 s52, s76, s77
; GFX9-NEXT:    s_pack_ll_b32_b16 s53, s74, s75
; GFX9-NEXT:    s_pack_ll_b32_b16 s54, s72, s73
; GFX9-NEXT:    s_pack_ll_b32_b16 s55, s62, s63
; GFX9-NEXT:    s_pack_ll_b32_b16 s56, s60, s61
; GFX9-NEXT:    s_pack_ll_b32_b16 s57, s57, s58
; GFX9-NEXT:    s_pack_ll_b32_b16 s58, s14, s15
; GFX9-NEXT:    s_pack_ll_b32_b16 s59, s12, s13
; GFX9-NEXT:    s_pack_ll_b32_b16 s60, s10, s11
; GFX9-NEXT:    s_pack_ll_b32_b16 s61, s8, s9
; GFX9-NEXT:    s_pack_ll_b32_b16 s62, s6, s7
; GFX9-NEXT:    s_pack_ll_b32_b16 s63, s4, s5
; GFX9-NEXT:    v_mov_b32_e32 v0, s36
; GFX9-NEXT:    v_mov_b32_e32 v1, s37
; GFX9-NEXT:    v_mov_b32_e32 v2, s38
; GFX9-NEXT:    v_mov_b32_e32 v3, s39
; GFX9-NEXT:    v_mov_b32_e32 v4, s40
; GFX9-NEXT:    v_mov_b32_e32 v5, s41
; GFX9-NEXT:    v_mov_b32_e32 v6, s42
; GFX9-NEXT:    v_mov_b32_e32 v7, s43
; GFX9-NEXT:    v_mov_b32_e32 v8, s44
; GFX9-NEXT:    v_mov_b32_e32 v9, s45
; GFX9-NEXT:    v_mov_b32_e32 v10, s46
; GFX9-NEXT:    v_mov_b32_e32 v11, s47
; GFX9-NEXT:    v_mov_b32_e32 v12, s48
; GFX9-NEXT:    v_mov_b32_e32 v13, s49
; GFX9-NEXT:    v_mov_b32_e32 v14, s50
; GFX9-NEXT:    v_mov_b32_e32 v15, s51
; GFX9-NEXT:    v_mov_b32_e32 v16, s52
; GFX9-NEXT:    v_mov_b32_e32 v17, s53
; GFX9-NEXT:    v_mov_b32_e32 v18, s54
; GFX9-NEXT:    v_mov_b32_e32 v19, s55
; GFX9-NEXT:    v_mov_b32_e32 v20, s56
; GFX9-NEXT:    v_mov_b32_e32 v21, s57
; GFX9-NEXT:    v_mov_b32_e32 v22, s58
; GFX9-NEXT:    v_mov_b32_e32 v23, s59
; GFX9-NEXT:    v_mov_b32_e32 v24, s60
; GFX9-NEXT:    v_mov_b32_e32 v25, s61
; GFX9-NEXT:    v_mov_b32_e32 v26, s62
; GFX9-NEXT:    v_mov_b32_e32 v27, s63
; GFX9-NEXT:    v_mov_b32_e32 v28, s64
; GFX9-NEXT:    v_mov_b32_e32 v29, s65
; GFX9-NEXT:    v_mov_b32_e32 v30, s66
; GFX9-NEXT:    v_mov_b32_e32 v31, s67
; GFX9-NEXT:    s_branch .LBB55_3
; GFX9-NEXT:  .LBB55_2: ; %cmp.true
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s16, s93
; GFX9-NEXT:    v_mov_b32_e32 v27, 0x200
; GFX9-NEXT:    v_pk_add_f16 v0, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s18, s91
; GFX9-NEXT:    v_pk_add_f16 v2, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s19, s90
; GFX9-NEXT:    v_pk_add_f16 v3, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s20, s40
; GFX9-NEXT:    v_pk_add_f16 v4, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s21, s41
; GFX9-NEXT:    v_pk_add_f16 v5, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s22, s42
; GFX9-NEXT:    v_pk_add_f16 v6, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s23, s43
; GFX9-NEXT:    v_pk_add_f16 v7, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s24, s44
; GFX9-NEXT:    v_pk_add_f16 v8, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s25, s45
; GFX9-NEXT:    v_pk_add_f16 v9, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s26, s46
; GFX9-NEXT:    v_pk_add_f16 v10, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s27, s47
; GFX9-NEXT:    v_pk_add_f16 v11, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s28, s59
; GFX9-NEXT:    v_pk_add_f16 v12, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s29, s56
; GFX9-NEXT:    v_pk_add_f16 v13, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s88, s89
; GFX9-NEXT:    v_pk_add_f16 v14, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s78, s79
; GFX9-NEXT:    v_pk_add_f16 v15, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s76, s77
; GFX9-NEXT:    v_pk_add_f16 v16, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s74, s75
; GFX9-NEXT:    v_pk_add_f16 v17, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s72, s73
; GFX9-NEXT:    v_pk_add_f16 v18, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s62, s63
; GFX9-NEXT:    v_pk_add_f16 v19, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s60, s61
; GFX9-NEXT:    s_pack_ll_b32_b16 s17, s17, s92
; GFX9-NEXT:    v_pk_add_f16 v20, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    s_pack_ll_b32_b16 s16, s57, s58
; GFX9-NEXT:    s_pack_ll_b32_b16 s14, s14, s15
; GFX9-NEXT:    s_pack_ll_b32_b16 s12, s12, s13
; GFX9-NEXT:    s_pack_ll_b32_b16 s10, s10, s11
; GFX9-NEXT:    s_pack_ll_b32_b16 s8, s8, s9
; GFX9-NEXT:    s_pack_ll_b32_b16 s6, s6, s7
; GFX9-NEXT:    s_pack_ll_b32_b16 s4, s4, s5
; GFX9-NEXT:    v_pk_add_f16 v1, s17, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v21, s16, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v22, s14, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v23, s12, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v24, s10, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v25, s8, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v26, s6, v27 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v27, s4, v27 op_sel_hi:[1,0]
; GFX9-NEXT:  .LBB55_3: ; %end
; GFX9-NEXT:    v_readlane_b32 s55, v32, 11
; GFX9-NEXT:    v_readlane_b32 s54, v32, 10
; GFX9-NEXT:    v_readlane_b32 s53, v32, 9
; GFX9-NEXT:    v_readlane_b32 s52, v32, 8
; GFX9-NEXT:    v_readlane_b32 s51, v32, 7
; GFX9-NEXT:    v_readlane_b32 s50, v32, 6
; GFX9-NEXT:    v_readlane_b32 s49, v32, 5
; GFX9-NEXT:    v_readlane_b32 s48, v32, 4
; GFX9-NEXT:    v_readlane_b32 s39, v32, 3
; GFX9-NEXT:    v_readlane_b32 s38, v32, 2
; GFX9-NEXT:    v_readlane_b32 s37, v32, 1
; GFX9-NEXT:    v_readlane_b32 s36, v32, 0
; GFX9-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; GFX9-NEXT:    buffer_load_dword v32, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    s_mov_b64 exec, s[4:5]
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-LABEL: bitcast_v56f16_to_v14f64_scalar:
; GFX11:       ; %bb.0:
; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT:    v_readfirstlane_b32 s40, v9
; GFX11-NEXT:    v_readfirstlane_b32 s42, v8
; GFX11-NEXT:    v_readfirstlane_b32 s43, v7
; GFX11-NEXT:    v_readfirstlane_b32 s46, v6
; GFX11-NEXT:    v_readfirstlane_b32 s57, v5
; GFX11-NEXT:    v_readfirstlane_b32 s59, v4
; GFX11-NEXT:    v_readfirstlane_b32 s62, v3
; GFX11-NEXT:    v_readfirstlane_b32 s63, v2
; GFX11-NEXT:    v_readfirstlane_b32 s73, v1
; GFX11-NEXT:    v_readfirstlane_b32 s75, v0
; GFX11-NEXT:    v_readfirstlane_b32 s90, v10
; GFX11-NEXT:    s_lshr_b32 s88, s1, 16
; GFX11-NEXT:    s_lshr_b32 s89, s0, 16
; GFX11-NEXT:    s_lshr_b32 s44, s29, 16
; GFX11-NEXT:    s_lshr_b32 s47, s28, 16
; GFX11-NEXT:    s_lshr_b32 s15, s27, 16
; GFX11-NEXT:    s_lshr_b32 s14, s26, 16
; GFX11-NEXT:    s_lshr_b32 s13, s25, 16
; GFX11-NEXT:    s_lshr_b32 s12, s24, 16
; GFX11-NEXT:    s_lshr_b32 s11, s23, 16
; GFX11-NEXT:    s_lshr_b32 s10, s22, 16
; GFX11-NEXT:    s_lshr_b32 s9, s21, 16
; GFX11-NEXT:    s_lshr_b32 s8, s20, 16
; GFX11-NEXT:    s_lshr_b32 s7, s19, 16
; GFX11-NEXT:    s_lshr_b32 s6, s18, 16
; GFX11-NEXT:    s_lshr_b32 s5, s17, 16
; GFX11-NEXT:    s_lshr_b32 s4, s16, 16
; GFX11-NEXT:    s_lshr_b32 s78, s3, 16
; GFX11-NEXT:    s_lshr_b32 s79, s2, 16
; GFX11-NEXT:    s_lshr_b32 s41, s40, 16
; GFX11-NEXT:    s_lshr_b32 s45, s42, 16
; GFX11-NEXT:    s_lshr_b32 s56, s43, 16
; GFX11-NEXT:    s_lshr_b32 s58, s46, 16
; GFX11-NEXT:    s_lshr_b32 s60, s57, 16
; GFX11-NEXT:    s_lshr_b32 s61, s59, 16
; GFX11-NEXT:    s_lshr_b32 s72, s62, 16
; GFX11-NEXT:    s_lshr_b32 s74, s63, 16
; GFX11-NEXT:    s_lshr_b32 s76, s73, 16
; GFX11-NEXT:    s_lshr_b32 s77, s75, 16
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s0, s89
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s1, s88
; GFX11-NEXT:    s_cmp_lg_u32 s90, 0
; GFX11-NEXT:    s_cbranch_scc0 .LBB55_2
; GFX11-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-NEXT:    s_pack_ll_b32_b16 s2, s2, s79
; GFX11-NEXT:    s_pack_ll_b32_b16 s3, s3, s78
; GFX11-NEXT:    s_pack_ll_b32_b16 s4, s16, s4
; GFX11-NEXT:    s_pack_ll_b32_b16 s5, s17, s5
; GFX11-NEXT:    s_pack_ll_b32_b16 s6, s18, s6
; GFX11-NEXT:    s_pack_ll_b32_b16 s7, s19, s7
; GFX11-NEXT:    s_pack_ll_b32_b16 s8, s20, s8
; GFX11-NEXT:    s_pack_ll_b32_b16 s9, s21, s9
; GFX11-NEXT:    s_pack_ll_b32_b16 s10, s22, s10
; GFX11-NEXT:    s_pack_ll_b32_b16 s11, s23, s11
; GFX11-NEXT:    s_pack_ll_b32_b16 s12, s24, s12
; GFX11-NEXT:    s_pack_ll_b32_b16 s13, s25, s13
; GFX11-NEXT:    s_pack_ll_b32_b16 s14, s26, s14
; GFX11-NEXT:    s_pack_ll_b32_b16 s15, s27, s15
; GFX11-NEXT:    s_pack_ll_b32_b16 s16, s28, s47
; GFX11-NEXT:    s_pack_ll_b32_b16 s17, s29, s44
; GFX11-NEXT:    s_pack_ll_b32_b16 s18, s75, s77
; GFX11-NEXT:    s_pack_ll_b32_b16 s19, s73, s76
; GFX11-NEXT:    s_pack_ll_b32_b16 s20, s63, s74
; GFX11-NEXT:    s_pack_ll_b32_b16 s21, s62, s72
; GFX11-NEXT:    s_pack_ll_b32_b16 s22, s59, s61
; GFX11-NEXT:    s_pack_ll_b32_b16 s23, s57, s60
; GFX11-NEXT:    s_pack_ll_b32_b16 s24, s46, s58
; GFX11-NEXT:    s_pack_ll_b32_b16 s25, s43, s56
; GFX11-NEXT:    s_pack_ll_b32_b16 s26, s42, s45
; GFX11-NEXT:    s_pack_ll_b32_b16 s27, s40, s41
; GFX11-NEXT:    v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX11-NEXT:    v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; GFX11-NEXT:    v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
; GFX11-NEXT:    v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
; GFX11-NEXT:    v_dual_mov_b32 v8, s8 :: v_dual_mov_b32 v9, s9
; GFX11-NEXT:    v_dual_mov_b32 v10, s10 :: v_dual_mov_b32 v11, s11
; GFX11-NEXT:    v_dual_mov_b32 v12, s12 :: v_dual_mov_b32 v13, s13
; GFX11-NEXT:    v_dual_mov_b32 v14, s14 :: v_dual_mov_b32 v15, s15
; GFX11-NEXT:    v_dual_mov_b32 v16, s16 :: v_dual_mov_b32 v17, s17
; GFX11-NEXT:    v_dual_mov_b32 v18, s18 :: v_dual_mov_b32 v19, s19
; GFX11-NEXT:    v_dual_mov_b32 v20, s20 :: v_dual_mov_b32 v21, s21
; GFX11-NEXT:    v_dual_mov_b32 v22, s22 :: v_dual_mov_b32 v23, s23
; GFX11-NEXT:    v_dual_mov_b32 v24, s24 :: v_dual_mov_b32 v25, s25
; GFX11-NEXT:    v_dual_mov_b32 v26, s26 :: v_dual_mov_b32 v27, s27
; GFX11-NEXT:    v_dual_mov_b32 v28, s28 :: v_dual_mov_b32 v29, s29
; GFX11-NEXT:    v_dual_mov_b32 v30, s30 :: v_dual_mov_b32 v31, s31
; GFX11-NEXT:    s_setpc_b64 s[30:31]
; GFX11-NEXT:  .LBB55_2: ; %cmp.true
; GFX11-NEXT:    v_pk_add_f16 v0, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v1, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s2, s79
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s3, s78
; GFX11-NEXT:    v_pk_add_f16 v2, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v3, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s16, s4
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s17, s5
; GFX11-NEXT:    v_pk_add_f16 v4, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v5, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s18, s6
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s19, s7
; GFX11-NEXT:    v_pk_add_f16 v6, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v7, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s20, s8
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s21, s9
; GFX11-NEXT:    v_pk_add_f16 v8, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v9, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s22, s10
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s23, s11
; GFX11-NEXT:    v_pk_add_f16 v10, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v11, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s24, s12
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s25, s13
; GFX11-NEXT:    v_pk_add_f16 v12, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v13, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s26, s14
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s27, s15
; GFX11-NEXT:    v_pk_add_f16 v14, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v15, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s28, s47
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s29, s44
; GFX11-NEXT:    v_pk_add_f16 v16, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v17, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s75, s77
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s73, s76
; GFX11-NEXT:    v_pk_add_f16 v18, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v19, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s63, s74
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s62, s72
; GFX11-NEXT:    v_pk_add_f16 v20, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v21, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s59, s61
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s57, s60
; GFX11-NEXT:    v_pk_add_f16 v22, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v23, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s46, s58
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s43, s56
; GFX11-NEXT:    v_pk_add_f16 v24, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v25, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_pack_ll_b32_b16 s0, s42, s45
; GFX11-NEXT:    s_pack_ll_b32_b16 s1, s40, s41
; GFX11-NEXT:    v_pk_add_f16 v26, s0, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    v_pk_add_f16 v27, s1, 0x200 op_sel_hi:[1,0]
; GFX11-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = fadd <56 x half> %a, splat (half 0xH0200)
  %a2 = bitcast <56 x half> %a1 to <14 x double>
  br label %end

cmp.false:
  %a3 = bitcast <56 x half> %a to <14 x double>
  br label %end

end:
  %phi = phi <14 x double> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <14 x double> %phi
}

define <56 x half> @bitcast_v56i16_to_v56f16(<56 x i16> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v56i16_to_v56f16:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    v_lshrrev_b32_e32 v54, 16, v1
; SI-NEXT:    v_lshrrev_b32_e32 v55, 16, v0
; SI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v54
; SI-NEXT:    v_lshrrev_b32_e32 v51, 16, v3
; SI-NEXT:    buffer_store_dword v28, off, s[0:3], s32 offset:244 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v55
; SI-NEXT:    v_lshrrev_b32_e32 v49, 16, v5
; SI-NEXT:    buffer_store_dword v28, off, s[0:3], s32 offset:212 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v51
; SI-NEXT:    v_lshrrev_b32_e32 v39, 16, v7
; SI-NEXT:    buffer_store_dword v28, off, s[0:3], s32 offset:248 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v49
; SI-NEXT:    v_lshrrev_b32_e32 v38, 16, v9
; SI-NEXT:    buffer_store_dword v28, off, s[0:3], s32 offset:252 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v39
; SI-NEXT:    v_lshrrev_b32_e32 v61, 16, v11
; SI-NEXT:    buffer_store_dword v28, off, s[0:3], s32 offset:216 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v38
; SI-NEXT:    v_lshrrev_b32_e32 v60, 16, v13
; SI-NEXT:    buffer_store_dword v28, off, s[0:3], s32 offset:220 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v61, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v61
; SI-NEXT:    v_lshrrev_b32_e32 v58, 16, v15
; SI-NEXT:    buffer_store_dword v28, off, s[0:3], s32 offset:224 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v60, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v60
; SI-NEXT:    v_lshrrev_b32_e32 v57, 16, v17
; SI-NEXT:    buffer_store_dword v28, off, s[0:3], s32 offset:228 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v58, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v58
; SI-NEXT:    v_lshrrev_b32_e32 v47, 16, v19
; SI-NEXT:    buffer_store_dword v28, off, s[0:3], s32 offset:232 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v57
; SI-NEXT:    buffer_store_dword v28, off, s[0:3], s32 offset:236 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v47
; SI-NEXT:    v_lshrrev_b32_e32 v45, 16, v21
; SI-NEXT:    buffer_store_dword v28, off, s[0:3], s32 offset:240 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    v_lshrrev_b32_e32 v40, 16, v27
; SI-NEXT:    v_lshrrev_b32_e32 v34, 16, v26
; SI-NEXT:    v_lshrrev_b32_e32 v42, 16, v25
; SI-NEXT:    v_lshrrev_b32_e32 v33, 16, v24
; SI-NEXT:    v_lshrrev_b32_e32 v44, 16, v23
; SI-NEXT:    v_lshrrev_b32_e32 v32, 16, v22
; SI-NEXT:    v_lshrrev_b32_e32 v31, 16, v20
; SI-NEXT:    v_lshrrev_b32_e32 v30, 16, v18
; SI-NEXT:    v_lshrrev_b32_e32 v29, 16, v16
; SI-NEXT:    v_lshrrev_b32_e32 v35, 16, v14
; SI-NEXT:    v_lshrrev_b32_e32 v36, 16, v12
; SI-NEXT:    v_lshrrev_b32_e32 v37, 16, v10
; SI-NEXT:    v_lshrrev_b32_e32 v48, 16, v8
; SI-NEXT:    v_lshrrev_b32_e32 v50, 16, v6
; SI-NEXT:    v_lshrrev_b32_e32 v52, 16, v4
; SI-NEXT:    v_lshrrev_b32_e32 v53, 16, v2
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    v_lshlrev_b32_e32 v63, 16, v53
; SI-NEXT:    v_lshlrev_b32_e32 v41, 16, v52
; SI-NEXT:    v_lshlrev_b32_e32 v43, 16, v50
; SI-NEXT:    v_lshlrev_b32_e32 v46, 16, v48
; SI-NEXT:    v_lshlrev_b32_e32 v56, 16, v37
; SI-NEXT:    v_lshlrev_b32_e32 v62, 16, v36
; SI-NEXT:    v_lshlrev_b32_e32 v59, 16, v35
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; SI-NEXT:    v_lshlrev_b32_e32 v31, 16, v31
; SI-NEXT:    v_lshlrev_b32_e32 v32, 16, v32
; SI-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; SI-NEXT:    v_lshlrev_b32_e32 v34, 16, v34
; SI-NEXT:    v_lshlrev_b32_e32 v36, 16, v45
; SI-NEXT:    v_lshlrev_b32_e32 v61, 16, v44
; SI-NEXT:    v_lshlrev_b32_e32 v37, 16, v42
; SI-NEXT:    v_lshlrev_b32_e32 v35, 16, v40
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT:    ; implicit-def: $vgpr60
; SI-NEXT:    ; implicit-def: $vgpr58
; SI-NEXT:    ; implicit-def: $vgpr57
; SI-NEXT:    ; implicit-def: $vgpr47
; SI-NEXT:    ; implicit-def: $vgpr45
; SI-NEXT:    ; implicit-def: $vgpr44
; SI-NEXT:    ; implicit-def: $vgpr42
; SI-NEXT:    ; implicit-def: $vgpr40
; SI-NEXT:    ; implicit-def: $vgpr55
; SI-NEXT:    ; implicit-def: $vgpr53
; SI-NEXT:    ; implicit-def: $vgpr52
; SI-NEXT:    ; implicit-def: $vgpr50
; SI-NEXT:    ; implicit-def: $vgpr48
; SI-NEXT:    ; kill: killed $vgpr28
; SI-NEXT:    ; implicit-def: $vgpr28
; SI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB56_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT:    s_waitcnt expcnt(4)
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v54
; SI-NEXT:    v_or_b32_e32 v60, v1, v28
; SI-NEXT:    v_mov_b32_e32 v28, v38
; SI-NEXT:    buffer_load_dword v38, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_alignbit_b32 v1, v60, v38, 16
; SI-NEXT:    buffer_store_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v3
; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v51
; SI-NEXT:    v_or_b32_e32 v58, v1, v3
; SI-NEXT:    v_alignbit_b32 v1, v58, v63, 16
; SI-NEXT:    buffer_store_dword v1, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v5
; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v49
; SI-NEXT:    v_or_b32_e32 v57, v1, v3
; SI-NEXT:    buffer_load_dword v3, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; SI-NEXT:    v_alignbit_b32 v1, v57, v41, 16
; SI-NEXT:    buffer_store_dword v1, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v7
; SI-NEXT:    v_or_b32_e32 v0, v0, v38
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v2
; SI-NEXT:    v_or_b32_e32 v0, v0, v63
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v4
; SI-NEXT:    v_or_b32_e32 v0, v0, v41
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v6
; SI-NEXT:    v_or_b32_e32 v0, v0, v43
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v8
; SI-NEXT:    v_or_b32_e32 v0, v0, v46
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v10
; SI-NEXT:    v_or_b32_e32 v0, v0, v56
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v12
; SI-NEXT:    v_or_b32_e32 v0, v0, v62
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v14
; SI-NEXT:    v_or_b32_e32 v0, v0, v59
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v16
; SI-NEXT:    v_or_b32_e32 v0, v0, v29
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v18
; SI-NEXT:    v_or_b32_e32 v0, v0, v30
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v20
; SI-NEXT:    v_or_b32_e32 v0, v0, v31
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v22
; SI-NEXT:    v_or_b32_e32 v0, v0, v32
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v24
; SI-NEXT:    v_or_b32_e32 v0, v0, v33
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v26
; SI-NEXT:    v_or_b32_e32 v0, v0, v34
; SI-NEXT:    v_mov_b32_e32 v38, v28
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT:    ; implicit-def: $vgpr0
; SI-NEXT:    ; implicit-def: $vgpr2
; SI-NEXT:    ; implicit-def: $vgpr4
; SI-NEXT:    ; implicit-def: $vgpr5
; SI-NEXT:    ; implicit-def: $vgpr6
; SI-NEXT:    ; implicit-def: $vgpr7
; SI-NEXT:    ; implicit-def: $vgpr8
; SI-NEXT:    ; implicit-def: $vgpr10
; SI-NEXT:    ; implicit-def: $vgpr12
; SI-NEXT:    ; implicit-def: $vgpr14
; SI-NEXT:    ; implicit-def: $vgpr16
; SI-NEXT:    ; implicit-def: $vgpr18
; SI-NEXT:    ; implicit-def: $vgpr20
; SI-NEXT:    ; implicit-def: $vgpr22
; SI-NEXT:    ; implicit-def: $vgpr24
; SI-NEXT:    ; implicit-def: $vgpr26
; SI-NEXT:    ; implicit-def: $vgpr63
; SI-NEXT:    ; implicit-def: $vgpr41
; SI-NEXT:    s_waitcnt vmcnt(14)
; SI-NEXT:    v_or_b32_e32 v47, v1, v3
; SI-NEXT:    buffer_load_dword v3, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; SI-NEXT:    v_alignbit_b32 v1, v47, v43, 16
; SI-NEXT:    buffer_store_dword v1, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v9
; SI-NEXT:    ; implicit-def: $vgpr9
; SI-NEXT:    ; implicit-def: $vgpr43
; SI-NEXT:    s_waitcnt vmcnt(1)
; SI-NEXT:    v_or_b32_e32 v45, v1, v3
; SI-NEXT:    buffer_load_dword v3, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; SI-NEXT:    v_alignbit_b32 v1, v45, v46, 16
; SI-NEXT:    buffer_store_dword v1, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v11
; SI-NEXT:    ; implicit-def: $vgpr11
; SI-NEXT:    ; implicit-def: $vgpr46
; SI-NEXT:    s_waitcnt vmcnt(1)
; SI-NEXT:    v_or_b32_e32 v44, v1, v3
; SI-NEXT:    buffer_load_dword v3, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; SI-NEXT:    v_alignbit_b32 v1, v44, v56, 16
; SI-NEXT:    buffer_store_dword v1, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v13
; SI-NEXT:    ; implicit-def: $vgpr13
; SI-NEXT:    ; implicit-def: $vgpr56
; SI-NEXT:    s_waitcnt vmcnt(1)
; SI-NEXT:    v_or_b32_e32 v42, v1, v3
; SI-NEXT:    buffer_load_dword v3, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; SI-NEXT:    v_alignbit_b32 v1, v42, v62, 16
; SI-NEXT:    buffer_store_dword v1, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v15
; SI-NEXT:    ; implicit-def: $vgpr15
; SI-NEXT:    ; implicit-def: $vgpr62
; SI-NEXT:    s_waitcnt vmcnt(1)
; SI-NEXT:    v_or_b32_e32 v40, v1, v3
; SI-NEXT:    buffer_load_dword v3, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; SI-NEXT:    v_alignbit_b32 v1, v40, v59, 16
; SI-NEXT:    buffer_store_dword v1, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v17
; SI-NEXT:    ; implicit-def: $vgpr17
; SI-NEXT:    ; implicit-def: $vgpr59
; SI-NEXT:    s_waitcnt vmcnt(1)
; SI-NEXT:    v_or_b32_e32 v55, v1, v3
; SI-NEXT:    buffer_load_dword v3, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; SI-NEXT:    v_alignbit_b32 v1, v55, v29, 16
; SI-NEXT:    buffer_store_dword v1, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v19
; SI-NEXT:    ; implicit-def: $vgpr29
; SI-NEXT:    ; kill: killed $vgpr29
; SI-NEXT:    ; implicit-def: $vgpr29
; SI-NEXT:    ; kill: killed $vgpr29
; SI-NEXT:    ; implicit-def: $vgpr29
; SI-NEXT:    ; kill: killed $vgpr29
; SI-NEXT:    ; implicit-def: $vgpr29
; SI-NEXT:    ; kill: killed $vgpr29
; SI-NEXT:    ; implicit-def: $vgpr29
; SI-NEXT:    ; kill: killed $vgpr29
; SI-NEXT:    ; implicit-def: $vgpr29
; SI-NEXT:    ; kill: killed $vgpr29
; SI-NEXT:    ; implicit-def: $vgpr29
; SI-NEXT:    ; kill: killed $vgpr29
; SI-NEXT:    ; implicit-def: $vgpr29
; SI-NEXT:    ; kill: killed $vgpr29
; SI-NEXT:    ; implicit-def: $vgpr29
; SI-NEXT:    ; kill: killed $vgpr29
; SI-NEXT:    ; implicit-def: $vgpr29
; SI-NEXT:    ; implicit-def: $vgpr19
; SI-NEXT:    ; kill: killed $vgpr29
; SI-NEXT:    ; implicit-def: $vgpr29
; SI-NEXT:    s_waitcnt vmcnt(1)
; SI-NEXT:    v_or_b32_e32 v53, v1, v3
; SI-NEXT:    v_alignbit_b32 v1, v53, v30, 16
; SI-NEXT:    buffer_store_dword v1, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v21
; SI-NEXT:    v_or_b32_e32 v52, v1, v36
; SI-NEXT:    v_alignbit_b32 v1, v52, v31, 16
; SI-NEXT:    buffer_store_dword v1, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v23
; SI-NEXT:    v_or_b32_e32 v50, v1, v61
; SI-NEXT:    v_alignbit_b32 v1, v50, v32, 16
; SI-NEXT:    buffer_store_dword v1, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v25
; SI-NEXT:    v_or_b32_e32 v48, v1, v37
; SI-NEXT:    v_alignbit_b32 v1, v48, v33, 16
; SI-NEXT:    buffer_store_dword v1, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v27
; SI-NEXT:    v_or_b32_e32 v3, v1, v35
; SI-NEXT:    v_alignbit_b32 v1, v3, v34, 16
; SI-NEXT:    ; implicit-def: $vgpr30
; SI-NEXT:    buffer_store_dword v1, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT:    v_mov_b32_e32 v28, v3
; SI-NEXT:    ; implicit-def: $vgpr1
; SI-NEXT:    ; implicit-def: $vgpr3
; SI-NEXT:    ; implicit-def: $vgpr21
; SI-NEXT:    ; implicit-def: $vgpr23
; SI-NEXT:    ; implicit-def: $vgpr25
; SI-NEXT:    ; implicit-def: $vgpr27
; SI-NEXT:    ; kill: killed $vgpr30
; SI-NEXT:    ; implicit-def: $vgpr30
; SI-NEXT:    ; implicit-def: $vgpr36
; SI-NEXT:    ; implicit-def: $vgpr31
; SI-NEXT:    ; implicit-def: $vgpr61
; SI-NEXT:    ; implicit-def: $vgpr32
; SI-NEXT:    ; implicit-def: $vgpr37
; SI-NEXT:    ; implicit-def: $vgpr33
; SI-NEXT:    ; implicit-def: $vgpr35
; SI-NEXT:    ; implicit-def: $vgpr34
; SI-NEXT:  .LBB56_2: ; %Flow
; SI-NEXT:    s_andn2_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB56_4
; SI-NEXT:  ; %bb.3: ; %cmp.true
; SI-NEXT:    v_add_i32_e32 v26, vcc, 3, v26
; SI-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT:    v_or_b32_e32 v26, v34, v26
; SI-NEXT:    v_add_i32_e32 v34, vcc, 0x30000, v26
; SI-NEXT:    v_add_i32_e32 v26, vcc, 3, v27
; SI-NEXT:    v_add_i32_e32 v24, vcc, 3, v24
; SI-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT:    v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT:    v_or_b32_e32 v26, v35, v26
; SI-NEXT:    v_or_b32_e32 v24, v33, v24
; SI-NEXT:    s_waitcnt expcnt(4)
; SI-NEXT:    v_add_i32_e32 v28, vcc, 0x30000, v26
; SI-NEXT:    v_add_i32_e32 v26, vcc, 0x30000, v24
; SI-NEXT:    v_add_i32_e32 v24, vcc, 3, v25
; SI-NEXT:    v_add_i32_e32 v22, vcc, 3, v22
; SI-NEXT:    v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT:    v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT:    v_or_b32_e32 v24, v37, v24
; SI-NEXT:    v_or_b32_e32 v22, v32, v22
; SI-NEXT:    v_add_i32_e32 v48, vcc, 0x30000, v24
; SI-NEXT:    v_add_i32_e32 v24, vcc, 0x30000, v22
; SI-NEXT:    v_add_i32_e32 v22, vcc, 3, v23
; SI-NEXT:    v_add_i32_e32 v20, vcc, 3, v20
; SI-NEXT:    v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT:    v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT:    v_or_b32_e32 v22, v61, v22
; SI-NEXT:    v_or_b32_e32 v20, v31, v20
; SI-NEXT:    v_add_i32_e32 v50, vcc, 0x30000, v22
; SI-NEXT:    v_add_i32_e32 v22, vcc, 0x30000, v20
; SI-NEXT:    v_add_i32_e32 v20, vcc, 3, v21
; SI-NEXT:    v_add_i32_e32 v18, vcc, 3, v18
; SI-NEXT:    v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT:    v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT:    v_or_b32_e32 v20, v36, v20
; SI-NEXT:    v_or_b32_e32 v18, v30, v18
; SI-NEXT:    v_add_i32_e32 v52, vcc, 0x30000, v20
; SI-NEXT:    v_add_i32_e32 v20, vcc, 0x30000, v18
; SI-NEXT:    v_add_i32_e32 v18, vcc, 3, v19
; SI-NEXT:    buffer_load_dword v19, off, s[0:3], s32 offset:240 ; 4-byte Folded Reload
; SI-NEXT:    v_add_i32_e32 v16, vcc, 3, v16
; SI-NEXT:    v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT:    v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT:    v_or_b32_e32 v16, v29, v16
; SI-NEXT:    v_add_i32_e32 v14, vcc, 3, v14
; SI-NEXT:    v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT:    v_or_b32_e32 v14, v59, v14
; SI-NEXT:    v_add_i32_e32 v12, vcc, 3, v12
; SI-NEXT:    v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT:    v_or_b32_e32 v12, v62, v12
; SI-NEXT:    v_add_i32_e32 v10, vcc, 3, v10
; SI-NEXT:    v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT:    v_or_b32_e32 v10, v56, v10
; SI-NEXT:    v_add_i32_e32 v8, vcc, 3, v8
; SI-NEXT:    v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT:    v_or_b32_e32 v8, v46, v8
; SI-NEXT:    v_add_i32_e32 v6, vcc, 3, v6
; SI-NEXT:    v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT:    v_or_b32_e32 v6, v43, v6
; SI-NEXT:    v_add_i32_e32 v4, vcc, 3, v4
; SI-NEXT:    v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT:    v_or_b32_e32 v4, v41, v4
; SI-NEXT:    v_add_i32_e32 v2, vcc, 3, v2
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT:    v_or_b32_e32 v2, v63, v2
; SI-NEXT:    v_add_i32_e32 v0, vcc, 3, v0
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_or_b32_e32 v18, v19, v18
; SI-NEXT:    v_add_i32_e32 v53, vcc, 0x30000, v18
; SI-NEXT:    v_add_i32_e32 v18, vcc, 0x30000, v16
; SI-NEXT:    v_add_i32_e32 v16, vcc, 3, v17
; SI-NEXT:    buffer_load_dword v17, off, s[0:3], s32 offset:236 ; 4-byte Folded Reload
; SI-NEXT:    v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_or_b32_e32 v16, v17, v16
; SI-NEXT:    v_add_i32_e32 v55, vcc, 0x30000, v16
; SI-NEXT:    v_add_i32_e32 v16, vcc, 0x30000, v14
; SI-NEXT:    v_add_i32_e32 v14, vcc, 3, v15
; SI-NEXT:    buffer_load_dword v15, off, s[0:3], s32 offset:232 ; 4-byte Folded Reload
; SI-NEXT:    v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_or_b32_e32 v14, v15, v14
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_add_i32_e32 v40, vcc, 0x30000, v14
; SI-NEXT:    v_add_i32_e32 v14, vcc, 0x30000, v12
; SI-NEXT:    v_add_i32_e32 v12, vcc, 3, v13
; SI-NEXT:    buffer_load_dword v13, off, s[0:3], s32 offset:228 ; 4-byte Folded Reload
; SI-NEXT:    v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_or_b32_e32 v12, v13, v12
; SI-NEXT:    v_add_i32_e32 v42, vcc, 0x30000, v12
; SI-NEXT:    v_add_i32_e32 v12, vcc, 0x30000, v10
; SI-NEXT:    v_add_i32_e32 v10, vcc, 3, v11
; SI-NEXT:    buffer_load_dword v11, off, s[0:3], s32 offset:224 ; 4-byte Folded Reload
; SI-NEXT:    v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_or_b32_e32 v10, v11, v10
; SI-NEXT:    v_add_i32_e32 v44, vcc, 0x30000, v10
; SI-NEXT:    v_add_i32_e32 v10, vcc, 0x30000, v8
; SI-NEXT:    v_add_i32_e32 v8, vcc, 3, v9
; SI-NEXT:    buffer_load_dword v9, off, s[0:3], s32 offset:220 ; 4-byte Folded Reload
; SI-NEXT:    v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_or_b32_e32 v8, v9, v8
; SI-NEXT:    v_add_i32_e32 v45, vcc, 0x30000, v8
; SI-NEXT:    v_add_i32_e32 v8, vcc, 0x30000, v6
; SI-NEXT:    v_add_i32_e32 v6, vcc, 3, v7
; SI-NEXT:    buffer_load_dword v7, off, s[0:3], s32 offset:216 ; 4-byte Folded Reload
; SI-NEXT:    v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT:    v_lshrrev_b32_e32 v38, 16, v45
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_or_b32_e32 v6, v7, v6
; SI-NEXT:    v_add_i32_e32 v47, vcc, 0x30000, v6
; SI-NEXT:    v_add_i32_e32 v6, vcc, 0x30000, v4
; SI-NEXT:    v_add_i32_e32 v4, vcc, 3, v5
; SI-NEXT:    buffer_load_dword v5, off, s[0:3], s32 offset:252 ; 4-byte Folded Reload
; SI-NEXT:    v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT:    v_lshrrev_b32_e32 v39, 16, v47
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_or_b32_e32 v4, v5, v4
; SI-NEXT:    v_add_i32_e32 v57, vcc, 0x30000, v4
; SI-NEXT:    v_add_i32_e32 v4, vcc, 0x30000, v2
; SI-NEXT:    v_add_i32_e32 v2, vcc, 3, v3
; SI-NEXT:    buffer_load_dword v3, off, s[0:3], s32 offset:248 ; 4-byte Folded Reload
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT:    v_lshrrev_b32_e32 v49, 16, v57
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_or_b32_e32 v2, v3, v2
; SI-NEXT:    v_add_i32_e32 v58, vcc, 0x30000, v2
; SI-NEXT:    buffer_load_dword v2, off, s[0:3], s32 offset:212 ; 4-byte Folded Reload
; SI-NEXT:    v_lshrrev_b32_e32 v51, 16, v58
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_or_b32_e32 v0, v2, v0
; SI-NEXT:    v_add_i32_e32 v2, vcc, 0x30000, v0
; SI-NEXT:    v_add_i32_e32 v0, vcc, 3, v1
; SI-NEXT:    buffer_load_dword v1, off, s[0:3], s32 offset:244 ; 4-byte Folded Reload
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT:    buffer_store_dword v2, off, s[0:3], s32 offset:208 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt vmcnt(1)
; SI-NEXT:    v_or_b32_e32 v0, v1, v0
; SI-NEXT:    v_add_i32_e32 v60, vcc, 0x30000, v0
; SI-NEXT:    v_alignbit_b32 v0, v60, v2, 16
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:120 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v4, off, s[0:3], s32 offset:204 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_alignbit_b32 v0, v58, v4, 16
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:128 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v6, off, s[0:3], s32 offset:196 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_alignbit_b32 v0, v57, v6, 16
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v8, off, s[0:3], s32 offset:184 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_alignbit_b32 v0, v47, v8, 16
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v10, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_alignbit_b32 v0, v45, v10, 16
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v12, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_alignbit_b32 v0, v44, v12, 16
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v14, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_alignbit_b32 v0, v42, v14, 16
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v16, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_alignbit_b32 v0, v40, v16, 16
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v18, off, s[0:3], s32 offset:124 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_alignbit_b32 v0, v55, v18, 16
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v20, off, s[0:3], s32 offset:116 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_alignbit_b32 v0, v53, v20, 16
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v22, off, s[0:3], s32 offset:112 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_alignbit_b32 v0, v52, v22, 16
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v24, off, s[0:3], s32 offset:108 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_alignbit_b32 v0, v50, v24, 16
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:188 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v26, off, s[0:3], s32 offset:104 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_alignbit_b32 v0, v48, v26, 16
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:192 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v34, off, s[0:3], s32 offset:100 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_alignbit_b32 v0, v28, v34, 16
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:200 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v44
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:96 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v42
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v40
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v55
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v53
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v52
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v50
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v48
; SI-NEXT:    v_lshrrev_b32_e32 v54, 16, v60
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_lshrrev_b32_e32 v0, 16, v28
; SI-NEXT:    buffer_store_dword v0, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT:  .LBB56_4: ; %end
; SI-NEXT:    s_or_b64 exec, exec, s[4:5]
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    buffer_load_dword v0, off, s[0:3], s32 offset:208 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v1, off, s[0:3], s32 offset:120 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v3, off, s[0:3], s32 offset:128 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v5, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v7, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v9, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v11, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload
; SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v54
; SI-NEXT:    v_lshlrev_b32_e32 v4, 16, v51
; SI-NEXT:    v_lshlrev_b32_e32 v6, 16, v49
; SI-NEXT:    v_lshlrev_b32_e32 v8, 16, v39
; SI-NEXT:    v_lshlrev_b32_e32 v10, 16, v38
; SI-NEXT:    buffer_load_dword v12, off, s[0:3], s32 offset:96 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v14, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v16, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v18, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v20, off, s[0:3], s32 offset:80 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v13, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v15, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v17, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v19, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v21, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v23, off, s[0:3], s32 offset:188 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v25, off, s[0:3], s32 offset:192 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v27, off, s[0:3], s32 offset:200 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(14)
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT:    v_or_b32_e32 v0, v0, v1
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v60
; SI-NEXT:    v_or_b32_e32 v1, v1, v2
; SI-NEXT:    buffer_load_dword v2, off, s[0:3], s32 offset:204 ; 4-byte Folded Reload
; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT:    v_lshlrev_b32_e32 v5, 16, v5
; SI-NEXT:    v_lshlrev_b32_e32 v7, 16, v7
; SI-NEXT:    v_lshlrev_b32_e32 v9, 16, v9
; SI-NEXT:    v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT:    v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT:    v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT:    s_waitcnt vmcnt(14)
; SI-NEXT:    v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT:    s_waitcnt vmcnt(13)
; SI-NEXT:    v_lshlrev_b32_e32 v18, 16, v18
; SI-NEXT:    s_waitcnt vmcnt(12)
; SI-NEXT:    v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT:    s_waitcnt vmcnt(11)
; SI-NEXT:    v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT:    s_waitcnt vmcnt(10)
; SI-NEXT:    v_lshlrev_b32_e32 v24, 16, v24
; SI-NEXT:    s_waitcnt vmcnt(9)
; SI-NEXT:    v_lshlrev_b32_e32 v26, 16, v26
; SI-NEXT:    s_waitcnt vmcnt(8)
; SI-NEXT:    v_lshlrev_b32_e32 v13, 16, v13
; SI-NEXT:    s_waitcnt vmcnt(7)
; SI-NEXT:    v_lshlrev_b32_e32 v15, 16, v15
; SI-NEXT:    s_waitcnt vmcnt(6)
; SI-NEXT:    v_lshlrev_b32_e32 v17, 16, v17
; SI-NEXT:    s_waitcnt vmcnt(5)
; SI-NEXT:    v_lshlrev_b32_e32 v19, 16, v19
; SI-NEXT:    s_waitcnt vmcnt(4)
; SI-NEXT:    v_lshlrev_b32_e32 v21, 16, v21
; SI-NEXT:    s_waitcnt vmcnt(3)
; SI-NEXT:    v_lshlrev_b32_e32 v23, 16, v23
; SI-NEXT:    s_waitcnt vmcnt(2)
; SI-NEXT:    v_lshlrev_b32_e32 v25, 16, v25
; SI-NEXT:    s_waitcnt vmcnt(1)
; SI-NEXT:    v_lshlrev_b32_e32 v27, 16, v27
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT:    v_or_b32_e32 v2, v2, v3
; SI-NEXT:    v_and_b32_e32 v3, 0xffff, v58
; SI-NEXT:    v_or_b32_e32 v3, v3, v4
; SI-NEXT:    buffer_load_dword v4, off, s[0:3], s32 offset:196 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT:    v_or_b32_e32 v4, v4, v5
; SI-NEXT:    v_and_b32_e32 v5, 0xffff, v57
; SI-NEXT:    v_or_b32_e32 v5, v5, v6
; SI-NEXT:    buffer_load_dword v6, off, s[0:3], s32 offset:184 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT:    v_or_b32_e32 v6, v6, v7
; SI-NEXT:    v_and_b32_e32 v7, 0xffff, v47
; SI-NEXT:    v_or_b32_e32 v7, v7, v8
; SI-NEXT:    buffer_load_dword v8, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT:    v_or_b32_e32 v8, v8, v9
; SI-NEXT:    v_and_b32_e32 v9, 0xffff, v45
; SI-NEXT:    v_or_b32_e32 v9, v9, v10
; SI-NEXT:    buffer_load_dword v10, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT:    v_or_b32_e32 v10, v10, v11
; SI-NEXT:    v_and_b32_e32 v11, 0xffff, v44
; SI-NEXT:    v_or_b32_e32 v11, v11, v12
; SI-NEXT:    buffer_load_dword v12, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT:    v_or_b32_e32 v12, v12, v13
; SI-NEXT:    v_and_b32_e32 v13, 0xffff, v42
; SI-NEXT:    v_or_b32_e32 v13, v13, v14
; SI-NEXT:    buffer_load_dword v14, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT:    v_or_b32_e32 v14, v14, v15
; SI-NEXT:    v_and_b32_e32 v15, 0xffff, v40
; SI-NEXT:    v_or_b32_e32 v15, v15, v16
; SI-NEXT:    buffer_load_dword v16, off, s[0:3], s32 offset:124 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(14)
; SI-NEXT:    v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT:    v_or_b32_e32 v16, v16, v17
; SI-NEXT:    v_and_b32_e32 v17, 0xffff, v55
; SI-NEXT:    v_or_b32_e32 v17, v17, v18
; SI-NEXT:    buffer_load_dword v18, off, s[0:3], s32 offset:116 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT:    v_or_b32_e32 v18, v18, v19
; SI-NEXT:    v_and_b32_e32 v19, 0xffff, v53
; SI-NEXT:    v_or_b32_e32 v19, v19, v20
; SI-NEXT:    buffer_load_dword v20, off, s[0:3], s32 offset:112 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT:    v_or_b32_e32 v20, v20, v21
; SI-NEXT:    v_and_b32_e32 v21, 0xffff, v52
; SI-NEXT:    v_or_b32_e32 v21, v21, v22
; SI-NEXT:    buffer_load_dword v22, off, s[0:3], s32 offset:108 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT:    v_or_b32_e32 v22, v22, v23
; SI-NEXT:    v_and_b32_e32 v23, 0xffff, v50
; SI-NEXT:    v_or_b32_e32 v23, v23, v24
; SI-NEXT:    buffer_load_dword v24, off, s[0:3], s32 offset:104 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT:    v_or_b32_e32 v24, v24, v25
; SI-NEXT:    v_and_b32_e32 v25, 0xffff, v48
; SI-NEXT:    v_or_b32_e32 v25, v25, v26
; SI-NEXT:    buffer_load_dword v26, off, s[0:3], s32 offset:100 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT:    v_or_b32_e32 v26, v26, v27
; SI-NEXT:    v_and_b32_e32 v27, 0xffff, v28
; SI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; SI-NEXT:    v_or_b32_e32 v27, v27, v28
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v56i16_to_v56f16:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v27
; VI-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; VI-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v25
; VI-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v24
; VI-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v23
; VI-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v22
; VI-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v8
; VI-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v7
; VI-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v6
; VI-NEXT:    v_lshrrev_b32_e32 v35, 16, v21
; VI-NEXT:    v_lshrrev_b32_e32 v36, 16, v20
; VI-NEXT:    v_lshrrev_b32_e32 v37, 16, v19
; VI-NEXT:    v_lshrrev_b32_e32 v38, 16, v18
; VI-NEXT:    v_lshrrev_b32_e32 v39, 16, v17
; VI-NEXT:    v_lshrrev_b32_e32 v48, 16, v16
; VI-NEXT:    v_lshrrev_b32_e32 v49, 16, v15
; VI-NEXT:    v_lshrrev_b32_e32 v50, 16, v14
; VI-NEXT:    v_lshrrev_b32_e32 v51, 16, v13
; VI-NEXT:    v_lshrrev_b32_e32 v52, 16, v12
; VI-NEXT:    v_lshrrev_b32_e32 v53, 16, v11
; VI-NEXT:    v_lshrrev_b32_e32 v54, 16, v10
; VI-NEXT:    v_lshrrev_b32_e32 v55, 16, v9
; VI-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; VI-NEXT:    v_lshrrev_b32_e32 v32, 16, v5
; VI-NEXT:    v_lshrrev_b32_e32 v33, 16, v4
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v3
; VI-NEXT:    v_lshrrev_b32_e32 v30, 16, v2
; VI-NEXT:    v_lshrrev_b32_e32 v31, 16, v1
; VI-NEXT:    v_lshrrev_b32_e32 v34, 16, v0
; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT:    s_or_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; VI-NEXT:    v_mov_b32_e32 v42, v32
; VI-NEXT:    v_mov_b32_e32 v43, v33
; VI-NEXT:    v_mov_b32_e32 v44, v29
; VI-NEXT:    v_mov_b32_e32 v45, v30
; VI-NEXT:    v_mov_b32_e32 v46, v31
; VI-NEXT:    v_mov_b32_e32 v47, v34
; VI-NEXT:    s_waitcnt vmcnt(2)
; VI-NEXT:    v_mov_b32_e32 v34, v28
; VI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v29, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v30, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v31, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v32, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v33, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; VI-NEXT:    s_xor_b64 exec, exec, s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB56_2
; VI-NEXT:  ; %bb.1: ; %cmp.true
; VI-NEXT:    v_add_u16_e32 v0, 3, v0
; VI-NEXT:    v_add_u16_e32 v47, 3, v47
; VI-NEXT:    v_add_u16_e32 v1, 3, v1
; VI-NEXT:    v_add_u16_e32 v46, 3, v46
; VI-NEXT:    v_add_u16_e32 v2, 3, v2
; VI-NEXT:    v_add_u16_e32 v45, 3, v45
; VI-NEXT:    v_add_u16_e32 v3, 3, v3
; VI-NEXT:    v_add_u16_e32 v44, 3, v44
; VI-NEXT:    v_add_u16_e32 v4, 3, v4
; VI-NEXT:    v_add_u16_e32 v43, 3, v43
; VI-NEXT:    v_add_u16_e32 v5, 3, v5
; VI-NEXT:    v_add_u16_e32 v42, 3, v42
; VI-NEXT:    v_add_u16_e32 v6, 3, v6
; VI-NEXT:    s_waitcnt vmcnt(6)
; VI-NEXT:    v_add_u16_e32 v40, 3, v40
; VI-NEXT:    v_add_u16_e32 v7, 3, v7
; VI-NEXT:    v_add_u16_e32 v41, 3, v41
; VI-NEXT:    v_add_u16_e32 v8, 3, v8
; VI-NEXT:    v_add_u16_e32 v34, 3, v34
; VI-NEXT:    v_add_u16_e32 v9, 3, v9
; VI-NEXT:    v_add_u16_e32 v55, 3, v55
; VI-NEXT:    v_add_u16_e32 v10, 3, v10
; VI-NEXT:    v_add_u16_e32 v54, 3, v54
; VI-NEXT:    v_add_u16_e32 v11, 3, v11
; VI-NEXT:    v_add_u16_e32 v53, 3, v53
; VI-NEXT:    v_add_u16_e32 v12, 3, v12
; VI-NEXT:    v_add_u16_e32 v52, 3, v52
; VI-NEXT:    v_add_u16_e32 v13, 3, v13
; VI-NEXT:    v_add_u16_e32 v51, 3, v51
; VI-NEXT:    v_add_u16_e32 v14, 3, v14
; VI-NEXT:    v_add_u16_e32 v50, 3, v50
; VI-NEXT:    v_add_u16_e32 v15, 3, v15
; VI-NEXT:    v_add_u16_e32 v49, 3, v49
; VI-NEXT:    v_add_u16_e32 v16, 3, v16
; VI-NEXT:    v_add_u16_e32 v48, 3, v48
; VI-NEXT:    v_add_u16_e32 v17, 3, v17
; VI-NEXT:    v_add_u16_e32 v39, 3, v39
; VI-NEXT:    v_add_u16_e32 v18, 3, v18
; VI-NEXT:    v_add_u16_e32 v38, 3, v38
; VI-NEXT:    v_add_u16_e32 v19, 3, v19
; VI-NEXT:    v_add_u16_e32 v37, 3, v37
; VI-NEXT:    v_add_u16_e32 v20, 3, v20
; VI-NEXT:    v_add_u16_e32 v36, 3, v36
; VI-NEXT:    v_add_u16_e32 v21, 3, v21
; VI-NEXT:    v_add_u16_e32 v35, 3, v35
; VI-NEXT:    v_add_u16_e32 v22, 3, v22
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    v_add_u16_e32 v33, 3, v33
; VI-NEXT:    v_add_u16_e32 v23, 3, v23
; VI-NEXT:    v_add_u16_e32 v32, 3, v32
; VI-NEXT:    v_add_u16_e32 v24, 3, v24
; VI-NEXT:    v_add_u16_e32 v31, 3, v31
; VI-NEXT:    v_add_u16_e32 v25, 3, v25
; VI-NEXT:    v_add_u16_e32 v30, 3, v30
; VI-NEXT:    v_add_u16_e32 v26, 3, v26
; VI-NEXT:    v_add_u16_e32 v29, 3, v29
; VI-NEXT:    v_add_u16_e32 v27, 3, v27
; VI-NEXT:    v_add_u16_e32 v28, 3, v28
; VI-NEXT:  .LBB56_2: ; %end
; VI-NEXT:    s_or_b64 exec, exec, s[4:5]
; VI-NEXT:    s_waitcnt vmcnt(6)
; VI-NEXT:    v_lshlrev_b32_e32 v40, 16, v40
; VI-NEXT:    v_lshlrev_b32_e32 v47, 16, v47
; VI-NEXT:    v_lshlrev_b32_e32 v46, 16, v46
; VI-NEXT:    v_lshlrev_b32_e32 v45, 16, v45
; VI-NEXT:    v_lshlrev_b32_e32 v44, 16, v44
; VI-NEXT:    v_lshlrev_b32_e32 v43, 16, v43
; VI-NEXT:    v_lshlrev_b32_e32 v42, 16, v42
; VI-NEXT:    v_or_b32_sdwa v6, v6, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v40, 16, v41
; VI-NEXT:    v_or_b32_sdwa v0, v0, v47 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v1, v1, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v2, v2, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v3, v3, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v4, v4, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v5, v5, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v7, v7, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v34
; VI-NEXT:    v_or_b32_sdwa v8, v8, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v55
; VI-NEXT:    v_or_b32_sdwa v9, v9, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v54
; VI-NEXT:    v_or_b32_sdwa v10, v10, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v53
; VI-NEXT:    v_or_b32_sdwa v11, v11, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v52
; VI-NEXT:    v_or_b32_sdwa v12, v12, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v51
; VI-NEXT:    v_or_b32_sdwa v13, v13, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v50
; VI-NEXT:    v_or_b32_sdwa v14, v14, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v49
; VI-NEXT:    v_or_b32_sdwa v15, v15, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v48
; VI-NEXT:    v_or_b32_sdwa v16, v16, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v39
; VI-NEXT:    v_or_b32_sdwa v17, v17, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v38
; VI-NEXT:    v_or_b32_sdwa v18, v18, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v37
; VI-NEXT:    v_or_b32_sdwa v19, v19, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v36
; VI-NEXT:    v_or_b32_sdwa v20, v20, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v35
; VI-NEXT:    s_waitcnt vmcnt(8)
; VI-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; VI-NEXT:    v_lshlrev_b32_e32 v32, 16, v32
; VI-NEXT:    v_lshlrev_b32_e32 v31, 16, v31
; VI-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; VI-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; VI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; VI-NEXT:    v_or_b32_sdwa v21, v21, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v22, v22, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v23, v23, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v24, v24, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v25, v25, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v26, v26, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v56i16_to_v56f16:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v27
; GFX9-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX9-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v25
; GFX9-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v24
; GFX9-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v23
; GFX9-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v22
; GFX9-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v21
; GFX9-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v20
; GFX9-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v19
; GFX9-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v55, 16, v18
; GFX9-NEXT:    v_lshrrev_b32_e32 v54, 16, v17
; GFX9-NEXT:    v_lshrrev_b32_e32 v53, 16, v16
; GFX9-NEXT:    v_lshrrev_b32_e32 v52, 16, v15
; GFX9-NEXT:    v_lshrrev_b32_e32 v51, 16, v14
; GFX9-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX9-NEXT:    v_lshrrev_b32_e32 v49, 16, v12
; GFX9-NEXT:    v_lshrrev_b32_e32 v48, 16, v11
; GFX9-NEXT:    v_lshrrev_b32_e32 v39, 16, v10
; GFX9-NEXT:    v_lshrrev_b32_e32 v38, 16, v9
; GFX9-NEXT:    v_lshrrev_b32_e32 v37, 16, v8
; GFX9-NEXT:    v_lshrrev_b32_e32 v36, 16, v7
; GFX9-NEXT:    v_lshrrev_b32_e32 v35, 16, v6
; GFX9-NEXT:    v_lshrrev_b32_e32 v34, 16, v5
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v4
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v3
; GFX9-NEXT:    v_lshrrev_b32_e32 v31, 16, v2
; GFX9-NEXT:    v_lshrrev_b32_e32 v30, 16, v1
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v0
; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT:    s_or_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; GFX9-NEXT:    s_xor_b64 exec, exec, s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB56_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.true
; GFX9-NEXT:    s_mov_b32 s6, 0x5040100
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    v_perm_b32 v27, v47, v27, s6
; GFX9-NEXT:    v_perm_b32 v26, v46, v26, s6
; GFX9-NEXT:    v_perm_b32 v25, v45, v25, s6
; GFX9-NEXT:    v_perm_b32 v24, v44, v24, s6
; GFX9-NEXT:    v_perm_b32 v23, v43, v23, s6
; GFX9-NEXT:    v_perm_b32 v22, v42, v22, s6
; GFX9-NEXT:    v_perm_b32 v21, v41, v21, s6
; GFX9-NEXT:    v_perm_b32 v20, v40, v20, s6
; GFX9-NEXT:    v_perm_b32 v19, v28, v19, s6
; GFX9-NEXT:    v_perm_b32 v18, v55, v18, s6
; GFX9-NEXT:    v_perm_b32 v17, v54, v17, s6
; GFX9-NEXT:    v_perm_b32 v16, v53, v16, s6
; GFX9-NEXT:    v_perm_b32 v15, v52, v15, s6
; GFX9-NEXT:    v_perm_b32 v14, v51, v14, s6
; GFX9-NEXT:    v_perm_b32 v13, v50, v13, s6
; GFX9-NEXT:    v_perm_b32 v12, v49, v12, s6
; GFX9-NEXT:    v_perm_b32 v11, v48, v11, s6
; GFX9-NEXT:    v_perm_b32 v10, v39, v10, s6
; GFX9-NEXT:    v_perm_b32 v9, v38, v9, s6
; GFX9-NEXT:    v_perm_b32 v8, v37, v8, s6
; GFX9-NEXT:    v_perm_b32 v7, v36, v7, s6
; GFX9-NEXT:    v_perm_b32 v6, v35, v6, s6
; GFX9-NEXT:    v_perm_b32 v5, v34, v5, s6
; GFX9-NEXT:    v_perm_b32 v4, v33, v4, s6
; GFX9-NEXT:    v_perm_b32 v3, v32, v3, s6
; GFX9-NEXT:    v_perm_b32 v2, v31, v2, s6
; GFX9-NEXT:    v_perm_b32 v1, v30, v1, s6
; GFX9-NEXT:    v_perm_b32 v0, v29, v0, s6
; GFX9-NEXT:    v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v0
; GFX9-NEXT:    v_lshrrev_b32_e32 v30, 16, v1
; GFX9-NEXT:    v_lshrrev_b32_e32 v31, 16, v2
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v3
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v4
; GFX9-NEXT:    v_lshrrev_b32_e32 v34, 16, v5
; GFX9-NEXT:    v_lshrrev_b32_e32 v35, 16, v6
; GFX9-NEXT:    v_lshrrev_b32_e32 v36, 16, v7
; GFX9-NEXT:    v_lshrrev_b32_e32 v37, 16, v8
; GFX9-NEXT:    v_lshrrev_b32_e32 v38, 16, v9
; GFX9-NEXT:    v_lshrrev_b32_e32 v39, 16, v10
; GFX9-NEXT:    v_lshrrev_b32_e32 v48, 16, v11
; GFX9-NEXT:    v_lshrrev_b32_e32 v49, 16, v12
; GFX9-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX9-NEXT:    v_lshrrev_b32_e32 v51, 16, v14
; GFX9-NEXT:    v_lshrrev_b32_e32 v52, 16, v15
; GFX9-NEXT:    v_lshrrev_b32_e32 v53, 16, v16
; GFX9-NEXT:    v_lshrrev_b32_e32 v54, 16, v17
; GFX9-NEXT:    v_lshrrev_b32_e32 v55, 16, v18
; GFX9-NEXT:    v_lshrrev_b32_e32 v28, 16, v19
; GFX9-NEXT:    v_lshrrev_b32_e32 v40, 16, v20
; GFX9-NEXT:    v_lshrrev_b32_e32 v41, 16, v21
; GFX9-NEXT:    v_lshrrev_b32_e32 v42, 16, v22
; GFX9-NEXT:    v_lshrrev_b32_e32 v43, 16, v23
; GFX9-NEXT:    v_lshrrev_b32_e32 v44, 16, v24
; GFX9-NEXT:    v_lshrrev_b32_e32 v45, 16, v25
; GFX9-NEXT:    v_lshrrev_b32_e32 v46, 16, v26
; GFX9-NEXT:    v_lshrrev_b32_e32 v47, 16, v27
; GFX9-NEXT:  .LBB56_2: ; %end
; GFX9-NEXT:    s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT:    s_mov_b32 s4, 0x5040100
; GFX9-NEXT:    s_waitcnt vmcnt(7)
; GFX9-NEXT:    v_perm_b32 v20, v40, v20, s4
; GFX9-NEXT:    s_waitcnt vmcnt(6)
; GFX9-NEXT:    v_perm_b32 v21, v41, v21, s4
; GFX9-NEXT:    s_waitcnt vmcnt(5)
; GFX9-NEXT:    v_perm_b32 v22, v42, v22, s4
; GFX9-NEXT:    s_waitcnt vmcnt(4)
; GFX9-NEXT:    v_perm_b32 v23, v43, v23, s4
; GFX9-NEXT:    s_waitcnt vmcnt(3)
; GFX9-NEXT:    v_perm_b32 v24, v44, v24, s4
; GFX9-NEXT:    s_waitcnt vmcnt(2)
; GFX9-NEXT:    v_perm_b32 v25, v45, v25, s4
; GFX9-NEXT:    s_waitcnt vmcnt(1)
; GFX9-NEXT:    v_perm_b32 v26, v46, v26, s4
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    v_perm_b32 v27, v47, v27, s4
; GFX9-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; GFX9-NEXT:    v_perm_b32 v0, v29, v0, s4
; GFX9-NEXT:    v_perm_b32 v1, v30, v1, s4
; GFX9-NEXT:    v_perm_b32 v2, v31, v2, s4
; GFX9-NEXT:    v_perm_b32 v3, v32, v3, s4
; GFX9-NEXT:    v_perm_b32 v4, v33, v4, s4
; GFX9-NEXT:    v_perm_b32 v5, v34, v5, s4
; GFX9-NEXT:    v_perm_b32 v6, v35, v6, s4
; GFX9-NEXT:    v_perm_b32 v7, v36, v7, s4
; GFX9-NEXT:    v_perm_b32 v8, v37, v8, s4
; GFX9-NEXT:    v_perm_b32 v9, v38, v9, s4
; GFX9-NEXT:    v_perm_b32 v10, v39, v10, s4
; GFX9-NEXT:    v_perm_b32 v11, v48, v11, s4
; GFX9-NEXT:    v_perm_b32 v12, v49, v12, s4
; GFX9-NEXT:    v_perm_b32 v13, v50, v13, s4
; GFX9-NEXT:    v_perm_b32 v14, v51, v14, s4
; GFX9-NEXT:    v_perm_b32 v15, v52, v15, s4
; GFX9-NEXT:    v_perm_b32 v16, v53, v16, s4
; GFX9-NEXT:    v_perm_b32 v17, v54, v17, s4
; GFX9-NEXT:    v_perm_b32 v18, v55, v18, s4
; GFX9-NEXT:    v_perm_b32 v19, v28, v19, s4
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-TRUE16-LABEL: bitcast_v56i16_to_v56f16:
; GFX11-TRUE16:       ; %bb.0:
; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-TRUE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT:    s_cbranch_execz .LBB56_2
; GFX11-TRUE16-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:  .LBB56_2: ; %end
; GFX11-TRUE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v56i16_to_v56f16:
; GFX11-FAKE16:       ; %bb.0:
; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v80, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v3
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v2
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v0
; GFX11-FAKE16-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-FAKE16-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-FAKE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-FAKE16-NEXT:    s_cbranch_execz .LBB56_2
; GFX11-FAKE16-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-FAKE16-NEXT:    v_perm_b32 v27, v80, v27, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v26, v71, v26, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v25, v70, v25, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v24, v69, v24, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v23, v68, v23, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v22, v67, v22, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v21, v66, v21, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v20, v65, v20, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v19, v64, v19, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v18, v55, v18, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v17, v54, v17, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v16, v53, v16, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v15, v52, v15, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v14, v51, v14, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v13, v50, v13, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v12, v49, v12, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v11, v48, v11, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v10, v39, v10, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v9, v38, v9, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v8, v37, v8, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v7, v36, v7, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v6, v35, v6, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v5, v34, v5, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v29, v0, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v1, v30, v1, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v2, v31, v2, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v3, v32, v3, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v4, v33, v4, 0x5040100
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v27, v27, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v26, v26, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v25, v25, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v24, v24, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v23, v23, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v22, v22, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v21, v21, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v20, v20, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v19, v19, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v18, v18, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v17, v17, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v16, v16, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v15, v15, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v14, v14, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v13, v13, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v12, v12, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v11, v11, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v10, v10, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v9, v9, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v8, v8, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v7, v7, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v6, v6, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v5, v5, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v0, v0, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v1, v1, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v2, v2, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v3, v3, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v4, v4, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v0
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v2
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v3
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v80, 16, v27
; GFX11-FAKE16-NEXT:  .LBB56_2: ; %end
; GFX11-FAKE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v29, v0, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v1, v30, v1, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v2, v31, v2, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v3, v32, v3, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v4, v33, v4, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v5, v34, v5, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v6, v35, v6, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v7, v36, v7, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v8, v37, v8, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v9, v38, v9, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v10, v39, v10, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v11, v48, v11, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v12, v49, v12, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v13, v50, v13, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v14, v51, v14, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v15, v52, v15, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v16, v53, v16, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v17, v54, v17, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v18, v55, v18, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v19, v64, v19, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v20, v65, v20, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v21, v66, v21, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v22, v67, v22, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v23, v68, v23, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v24, v69, v24, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v25, v70, v25, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v26, v71, v26, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v27, v80, v27, 0x5040100
; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = add <56 x i16> %a, splat (i16 3)
  %a2 = bitcast <56 x i16> %a1 to <56 x half>
  br label %end

cmp.false:
  %a3 = bitcast <56 x i16> %a to <56 x half>
  br label %end

end:
  %phi = phi <56 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <56 x half> %phi
}

define inreg <56 x half> @bitcast_v56i16_to_v56f16_scalar(<56 x i16> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v56i16_to_v56f16_scalar:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_store_dword v28, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_writelane_b32 v28, s34, 0
; SI-NEXT:    v_writelane_b32 v28, s35, 1
; SI-NEXT:    v_writelane_b32 v28, s36, 2
; SI-NEXT:    v_writelane_b32 v28, s37, 3
; SI-NEXT:    v_writelane_b32 v28, s38, 4
; SI-NEXT:    v_writelane_b32 v28, s39, 5
; SI-NEXT:    v_writelane_b32 v28, s48, 6
; SI-NEXT:    v_writelane_b32 v28, s49, 7
; SI-NEXT:    v_writelane_b32 v28, s30, 8
; SI-NEXT:    v_writelane_b32 v28, s31, 9
; SI-NEXT:    v_readfirstlane_b32 s92, v13
; SI-NEXT:    v_readfirstlane_b32 s7, v12
; SI-NEXT:    v_readfirstlane_b32 s90, v11
; SI-NEXT:    v_readfirstlane_b32 s13, v10
; SI-NEXT:    v_readfirstlane_b32 s88, v9
; SI-NEXT:    v_readfirstlane_b32 s34, v8
; SI-NEXT:    v_readfirstlane_b32 s78, v7
; SI-NEXT:    v_readfirstlane_b32 s31, v6
; SI-NEXT:    v_readfirstlane_b32 s76, v5
; SI-NEXT:    v_readfirstlane_b32 s35, v4
; SI-NEXT:    v_readfirstlane_b32 s77, v3
; SI-NEXT:    v_readfirstlane_b32 s9, v2
; SI-NEXT:    v_readfirstlane_b32 s79, v1
; SI-NEXT:    v_readfirstlane_b32 s5, v0
; SI-NEXT:    s_lshr_b32 s58, s29, 16
; SI-NEXT:    s_lshr_b32 s75, s28, 16
; SI-NEXT:    s_lshr_b32 s57, s27, 16
; SI-NEXT:    s_lshr_b32 s74, s26, 16
; SI-NEXT:    s_lshr_b32 s56, s25, 16
; SI-NEXT:    s_lshr_b32 s73, s24, 16
; SI-NEXT:    s_lshr_b32 vcc_hi, s23, 16
; SI-NEXT:    s_lshr_b32 s72, s22, 16
; SI-NEXT:    s_lshr_b32 vcc_lo, s21, 16
; SI-NEXT:    s_lshr_b32 s10, s20, 16
; SI-NEXT:    s_lshr_b32 s95, s19, 16
; SI-NEXT:    s_lshr_b32 s8, s18, 16
; SI-NEXT:    s_lshr_b32 s94, s17, 16
; SI-NEXT:    s_lshr_b32 s4, s16, 16
; SI-NEXT:    s_lshr_b32 s30, s92, 16
; SI-NEXT:    s_lshr_b32 s6, s7, 16
; SI-NEXT:    s_lshr_b32 s11, s90, 16
; SI-NEXT:    s_lshr_b32 s12, s13, 16
; SI-NEXT:    s_lshr_b32 s63, s88, 16
; SI-NEXT:    s_lshr_b32 s14, s34, 16
; SI-NEXT:    s_lshr_b32 s62, s78, 16
; SI-NEXT:    s_lshr_b32 s40, s31, 16
; SI-NEXT:    s_lshr_b32 s61, s76, 16
; SI-NEXT:    s_lshr_b32 s93, s35, 16
; SI-NEXT:    s_lshr_b32 s60, s77, 16
; SI-NEXT:    s_lshr_b32 s91, s9, 16
; SI-NEXT:    s_lshr_b32 s59, s79, 16
; SI-NEXT:    s_lshr_b32 s89, s5, 16
; SI-NEXT:    v_readfirstlane_b32 s15, v14
; SI-NEXT:    s_cmp_lg_u32 s15, 0
; SI-NEXT:    s_cbranch_scc0 .LBB57_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    s_and_b32 s15, s16, 0xffff
; SI-NEXT:    s_mov_b32 s36, s12
; SI-NEXT:    s_lshl_b32 s12, s4, 16
; SI-NEXT:    s_or_b32 s4, s15, s12
; SI-NEXT:    s_and_b32 s15, s18, 0xffff
; SI-NEXT:    s_mov_b32 s18, s7
; SI-NEXT:    s_mov_b32 s37, s6
; SI-NEXT:    s_lshl_b32 s6, s8, 16
; SI-NEXT:    s_and_b32 s7, s17, 0xffff
; SI-NEXT:    s_lshl_b32 s8, s94, 16
; SI-NEXT:    s_mov_b32 s16, s13
; SI-NEXT:    s_or_b32 s13, s7, s8
; SI-NEXT:    s_or_b32 s8, s15, s6
; SI-NEXT:    s_and_b32 s7, s19, 0xffff
; SI-NEXT:    s_lshl_b32 s15, s95, 16
; SI-NEXT:    s_and_b32 s17, s20, 0xffff
; SI-NEXT:    s_or_b32 s7, s7, s15
; SI-NEXT:    s_mov_b32 s19, s14
; SI-NEXT:    s_lshl_b32 s14, s10, 16
; SI-NEXT:    s_and_b32 s10, s21, 0xffff
; SI-NEXT:    s_lshl_b32 s15, vcc_lo, 16
; SI-NEXT:    s_and_b32 s20, s23, 0xffff
; SI-NEXT:    s_lshl_b32 s21, vcc_hi, 16
; SI-NEXT:    s_or_b32 s15, s10, s15
; SI-NEXT:    s_or_b32 s10, s17, s14
; SI-NEXT:    s_and_b32 s17, s22, 0xffff
; SI-NEXT:    s_or_b32 s41, s20, s21
; SI-NEXT:    s_and_b32 s21, s25, 0xffff
; SI-NEXT:    s_lshl_b32 s22, s56, 16
; SI-NEXT:    s_or_b32 s43, s21, s22
; SI-NEXT:    s_and_b32 s21, s27, 0xffff
; SI-NEXT:    s_lshl_b32 s22, s57, 16
; SI-NEXT:    s_or_b32 s45, s21, s22
; SI-NEXT:    s_and_b32 s21, s29, 0xffff
; SI-NEXT:    s_lshl_b32 s22, s58, 16
; SI-NEXT:    s_or_b32 s47, s21, s22
; SI-NEXT:    s_and_b32 s21, s79, 0xffff
; SI-NEXT:    s_lshl_b32 s22, s59, 16
; SI-NEXT:    s_lshl_b32 s42, s73, 16
; SI-NEXT:    s_or_b32 s73, s21, s22
; SI-NEXT:    s_and_b32 s21, s77, 0xffff
; SI-NEXT:    s_lshl_b32 s22, s60, 16
; SI-NEXT:    s_lshl_b32 s46, s75, 16
; SI-NEXT:    s_or_b32 s75, s21, s22
; SI-NEXT:    s_and_b32 s21, s76, 0xffff
; SI-NEXT:    s_lshl_b32 s22, s61, 16
; SI-NEXT:    s_mov_b32 s20, s40
; SI-NEXT:    s_or_b32 s77, s21, s22
; SI-NEXT:    s_and_b32 s21, s78, 0xffff
; SI-NEXT:    s_lshl_b32 s22, s62, 16
; SI-NEXT:    s_or_b32 s79, s21, s22
; SI-NEXT:    s_lshl_b32 s78, s20, 16
; SI-NEXT:    s_and_b32 s20, s88, 0xffff
; SI-NEXT:    s_lshl_b32 s21, s63, 16
; SI-NEXT:    s_lshl_b32 s40, s72, 16
; SI-NEXT:    s_lshl_b32 s72, s89, 16
; SI-NEXT:    s_or_b32 s89, s20, s21
; SI-NEXT:    s_lshl_b32 s88, s19, 16
; SI-NEXT:    s_and_b32 s19, s90, 0xffff
; SI-NEXT:    s_lshl_b32 s20, s11, 16
; SI-NEXT:    s_lshl_b32 s44, s74, 16
; SI-NEXT:    s_lshl_b32 s74, s91, 16
; SI-NEXT:    s_or_b32 s91, s19, s20
; SI-NEXT:    s_and_b32 s19, s92, 0xffff
; SI-NEXT:    s_lshl_b32 s20, s30, 16
; SI-NEXT:    s_lshl_b32 s76, s93, 16
; SI-NEXT:    s_or_b32 s93, s19, s20
; SI-NEXT:    s_lshl_b32 s92, s37, 16
; SI-NEXT:    s_or_b32 s22, s17, s40
; SI-NEXT:    s_and_b32 s37, s9, 0xffff
; SI-NEXT:    s_and_b32 s38, s31, 0xffff
; SI-NEXT:    s_and_b32 s48, s16, 0xffff
; SI-NEXT:    s_and_b32 s49, s18, 0xffff
; SI-NEXT:    s_lshr_b64 s[16:17], s[12:13], 16
; SI-NEXT:    s_mov_b32 s9, s7
; SI-NEXT:    s_lshr_b64 s[18:19], s[6:7], 16
; SI-NEXT:    s_lshr_b64 s[20:21], s[14:15], 16
; SI-NEXT:    s_mov_b32 s6, s56
; SI-NEXT:    s_mov_b32 s7, s57
; SI-NEXT:    s_lshr_b64 s[56:57], s[40:41], 16
; SI-NEXT:    s_mov_b32 s12, s59
; SI-NEXT:    s_mov_b32 s31, s58
; SI-NEXT:    s_lshr_b64 s[58:59], s[42:43], 16
; SI-NEXT:    s_lshl_b32 s90, s36, 16
; SI-NEXT:    s_and_b32 s24, s24, 0xffff
; SI-NEXT:    s_and_b32 s26, s26, 0xffff
; SI-NEXT:    s_and_b32 s28, s28, 0xffff
; SI-NEXT:    s_and_b32 s36, s5, 0xffff
; SI-NEXT:    s_and_b32 s35, s35, 0xffff
; SI-NEXT:    s_and_b32 s39, s34, 0xffff
; SI-NEXT:    s_mov_b32 s25, s11
; SI-NEXT:    s_mov_b32 s17, s30
; SI-NEXT:    s_mov_b32 s21, s63
; SI-NEXT:    s_mov_b32 s57, s62
; SI-NEXT:    s_mov_b32 s30, s60
; SI-NEXT:    s_mov_b32 s59, s61
; SI-NEXT:    s_lshr_b64 s[60:61], s[44:45], 16
; SI-NEXT:    s_lshr_b64 s[62:63], s[46:47], 16
; SI-NEXT:    s_mov_b32 s5, s13
; SI-NEXT:    s_mov_b32 s11, s15
; SI-NEXT:    s_mov_b32 s23, s41
; SI-NEXT:    s_mov_b32 s19, s25
; SI-NEXT:    s_or_b32 s24, s24, s42
; SI-NEXT:    s_mov_b32 s25, s43
; SI-NEXT:    s_or_b32 s26, s26, s44
; SI-NEXT:    s_mov_b32 s27, s45
; SI-NEXT:    s_mov_b32 s34, s7
; SI-NEXT:    s_mov_b32 s61, s12
; SI-NEXT:    s_or_b32 s28, s28, s46
; SI-NEXT:    s_mov_b32 s29, s47
; SI-NEXT:    s_mov_b32 s63, s6
; SI-NEXT:    s_or_b32 s46, s36, s72
; SI-NEXT:    s_mov_b32 s47, s73
; SI-NEXT:    s_lshr_b64 s[72:73], s[72:73], 16
; SI-NEXT:    s_or_b32 s44, s37, s74
; SI-NEXT:    s_mov_b32 s45, s75
; SI-NEXT:    s_lshr_b64 s[74:75], s[74:75], 16
; SI-NEXT:    s_or_b32 s42, s35, s76
; SI-NEXT:    s_mov_b32 s43, s77
; SI-NEXT:    s_lshr_b64 s[76:77], s[76:77], 16
; SI-NEXT:    s_or_b32 s40, s38, s78
; SI-NEXT:    s_mov_b32 s41, s79
; SI-NEXT:    s_lshr_b64 s[78:79], s[78:79], 16
; SI-NEXT:    s_or_b32 s14, s39, s88
; SI-NEXT:    s_mov_b32 s15, s89
; SI-NEXT:    s_lshr_b64 s[88:89], s[88:89], 16
; SI-NEXT:    s_or_b32 s12, s48, s90
; SI-NEXT:    s_mov_b32 s13, s91
; SI-NEXT:    s_lshr_b64 s[90:91], s[90:91], 16
; SI-NEXT:    s_or_b32 s6, s49, s92
; SI-NEXT:    s_mov_b32 s7, s93
; SI-NEXT:    s_lshr_b64 s[92:93], s[92:93], 16
; SI-NEXT:    s_branch .LBB57_3
; SI-NEXT:  .LBB57_2: ; %cmp.true
; SI-NEXT:    s_add_i32 s13, s13, 3
; SI-NEXT:    s_and_b32 s13, s13, 0xffff
; SI-NEXT:    s_lshl_b32 s12, s12, 16
; SI-NEXT:    s_add_i32 s90, s90, 3
; SI-NEXT:    s_or_b32 s12, s12, s13
; SI-NEXT:    s_and_b32 s13, s90, 0xffff
; SI-NEXT:    s_lshl_b32 s11, s11, 16
; SI-NEXT:    s_add_i32 s7, s7, 3
; SI-NEXT:    s_or_b32 s11, s11, s13
; SI-NEXT:    s_add_i32 s34, s34, 3
; SI-NEXT:    s_and_b32 s7, s7, 0xffff
; SI-NEXT:    s_lshl_b32 s6, s6, 16
; SI-NEXT:    s_add_i32 s92, s92, 3
; SI-NEXT:    s_add_i32 s13, s11, 0x30000
; SI-NEXT:    s_and_b32 s11, s34, 0xffff
; SI-NEXT:    s_lshl_b32 s14, s14, 16
; SI-NEXT:    s_or_b32 s6, s6, s7
; SI-NEXT:    s_and_b32 s7, s92, 0xffff
; SI-NEXT:    s_lshl_b32 s15, s30, 16
; SI-NEXT:    s_or_b32 s11, s14, s11
; SI-NEXT:    s_add_i32 s88, s88, 3
; SI-NEXT:    s_or_b32 s7, s15, s7
; SI-NEXT:    s_add_i32 s14, s11, 0x30000
; SI-NEXT:    s_and_b32 s11, s88, 0xffff
; SI-NEXT:    s_lshl_b32 s15, s63, 16
; SI-NEXT:    s_or_b32 s11, s15, s11
; SI-NEXT:    s_add_i32 s31, s31, 3
; SI-NEXT:    s_add_i32 s15, s11, 0x30000
; SI-NEXT:    s_and_b32 s11, s31, 0xffff
; SI-NEXT:    s_lshl_b32 s40, s40, 16
; SI-NEXT:    s_or_b32 s11, s40, s11
; SI-NEXT:    s_add_i32 s78, s78, 3
; SI-NEXT:    s_add_i32 s40, s11, 0x30000
; SI-NEXT:    s_and_b32 s11, s78, 0xffff
; SI-NEXT:    s_lshl_b32 s41, s62, 16
; SI-NEXT:    s_or_b32 s11, s41, s11
; SI-NEXT:    s_add_i32 s41, s11, 0x30000
; SI-NEXT:    s_add_i32 s11, s35, 3
; SI-NEXT:    s_and_b32 s11, s11, 0xffff
; SI-NEXT:    s_lshl_b32 s42, s93, 16
; SI-NEXT:    s_or_b32 s11, s42, s11
; SI-NEXT:    s_add_i32 s76, s76, 3
; SI-NEXT:    s_add_i32 s42, s11, 0x30000
; SI-NEXT:    s_and_b32 s11, s76, 0xffff
; SI-NEXT:    s_lshl_b32 s43, s61, 16
; SI-NEXT:    s_or_b32 s11, s43, s11
; SI-NEXT:    s_add_i32 s9, s9, 3
; SI-NEXT:    s_add_i32 s43, s11, 0x30000
; SI-NEXT:    s_and_b32 s9, s9, 0xffff
; SI-NEXT:    s_lshl_b32 s11, s91, 16
; SI-NEXT:    s_or_b32 s9, s11, s9
; SI-NEXT:    s_add_i32 s77, s77, 3
; SI-NEXT:    s_add_i32 s44, s9, 0x30000
; SI-NEXT:    s_and_b32 s9, s77, 0xffff
; SI-NEXT:    s_lshl_b32 s11, s60, 16
; SI-NEXT:    s_or_b32 s9, s11, s9
; SI-NEXT:    s_add_i32 s5, s5, 3
; SI-NEXT:    s_add_i32 s45, s9, 0x30000
; SI-NEXT:    s_and_b32 s5, s5, 0xffff
; SI-NEXT:    s_lshl_b32 s9, s89, 16
; SI-NEXT:    s_or_b32 s5, s9, s5
; SI-NEXT:    s_add_i32 s79, s79, 3
; SI-NEXT:    s_add_i32 s46, s5, 0x30000
; SI-NEXT:    s_and_b32 s5, s79, 0xffff
; SI-NEXT:    s_lshl_b32 s9, s59, 16
; SI-NEXT:    s_or_b32 s5, s9, s5
; SI-NEXT:    s_add_i32 s28, s28, 3
; SI-NEXT:    s_add_i32 s47, s5, 0x30000
; SI-NEXT:    s_and_b32 s5, s28, 0xffff
; SI-NEXT:    s_lshl_b32 s9, s75, 16
; SI-NEXT:    s_or_b32 s5, s9, s5
; SI-NEXT:    s_add_i32 s29, s29, 3
; SI-NEXT:    s_add_i32 s28, s5, 0x30000
; SI-NEXT:    s_and_b32 s5, s29, 0xffff
; SI-NEXT:    s_lshl_b32 s9, s58, 16
; SI-NEXT:    s_or_b32 s5, s9, s5
; SI-NEXT:    s_add_i32 s26, s26, 3
; SI-NEXT:    s_add_i32 s29, s5, 0x30000
; SI-NEXT:    s_and_b32 s5, s26, 0xffff
; SI-NEXT:    s_lshl_b32 s9, s74, 16
; SI-NEXT:    s_or_b32 s5, s9, s5
; SI-NEXT:    s_add_i32 s27, s27, 3
; SI-NEXT:    s_add_i32 s26, s5, 0x30000
; SI-NEXT:    s_and_b32 s5, s27, 0xffff
; SI-NEXT:    s_lshl_b32 s9, s57, 16
; SI-NEXT:    s_or_b32 s5, s9, s5
; SI-NEXT:    s_add_i32 s24, s24, 3
; SI-NEXT:    s_add_i32 s27, s5, 0x30000
; SI-NEXT:    s_and_b32 s5, s24, 0xffff
; SI-NEXT:    s_lshl_b32 s9, s73, 16
; SI-NEXT:    s_or_b32 s5, s9, s5
; SI-NEXT:    s_add_i32 s25, s25, 3
; SI-NEXT:    s_add_i32 s24, s5, 0x30000
; SI-NEXT:    s_and_b32 s5, s25, 0xffff
; SI-NEXT:    s_lshl_b32 s9, s56, 16
; SI-NEXT:    s_or_b32 s5, s9, s5
; SI-NEXT:    s_add_i32 s22, s22, 3
; SI-NEXT:    s_add_i32 s25, s5, 0x30000
; SI-NEXT:    s_and_b32 s5, s22, 0xffff
; SI-NEXT:    s_lshl_b32 s9, s72, 16
; SI-NEXT:    s_or_b32 s5, s9, s5
; SI-NEXT:    s_add_i32 s23, s23, 3
; SI-NEXT:    s_add_i32 s22, s5, 0x30000
; SI-NEXT:    s_and_b32 s5, s23, 0xffff
; SI-NEXT:    s_lshl_b32 s9, vcc_hi, 16
; SI-NEXT:    s_or_b32 s5, s9, s5
; SI-NEXT:    s_add_i32 s20, s20, 3
; SI-NEXT:    s_add_i32 s23, s5, 0x30000
; SI-NEXT:    s_and_b32 s5, s20, 0xffff
; SI-NEXT:    s_lshl_b32 s9, s10, 16
; SI-NEXT:    s_or_b32 s5, s9, s5
; SI-NEXT:    s_add_i32 s21, s21, 3
; SI-NEXT:    s_add_i32 s10, s5, 0x30000
; SI-NEXT:    s_and_b32 s5, s21, 0xffff
; SI-NEXT:    s_lshl_b32 s9, vcc_lo, 16
; SI-NEXT:    s_or_b32 s5, s9, s5
; SI-NEXT:    s_add_i32 s18, s18, 3
; SI-NEXT:    s_add_i32 s11, s5, 0x30000
; SI-NEXT:    s_and_b32 s5, s18, 0xffff
; SI-NEXT:    s_lshl_b32 s8, s8, 16
; SI-NEXT:    s_or_b32 s5, s8, s5
; SI-NEXT:    s_add_i32 s19, s19, 3
; SI-NEXT:    s_add_i32 s8, s5, 0x30000
; SI-NEXT:    s_and_b32 s5, s19, 0xffff
; SI-NEXT:    s_lshl_b32 s9, s95, 16
; SI-NEXT:    s_or_b32 s5, s9, s5
; SI-NEXT:    s_add_i32 s16, s16, 3
; SI-NEXT:    s_add_i32 s9, s5, 0x30000
; SI-NEXT:    s_and_b32 s5, s16, 0xffff
; SI-NEXT:    s_lshl_b32 s4, s4, 16
; SI-NEXT:    s_add_i32 s17, s17, 3
; SI-NEXT:    s_or_b32 s4, s4, s5
; SI-NEXT:    s_and_b32 s5, s17, 0xffff
; SI-NEXT:    s_lshl_b32 s16, s94, 16
; SI-NEXT:    s_or_b32 s5, s16, s5
; SI-NEXT:    s_add_i32 s4, s4, 0x30000
; SI-NEXT:    s_add_i32 s5, s5, 0x30000
; SI-NEXT:    s_add_i32 s6, s6, 0x30000
; SI-NEXT:    s_add_i32 s7, s7, 0x30000
; SI-NEXT:    s_add_i32 s12, s12, 0x30000
; SI-NEXT:    s_lshr_b64 s[16:17], s[4:5], 16
; SI-NEXT:    s_lshr_b64 s[18:19], s[8:9], 16
; SI-NEXT:    s_lshr_b64 s[20:21], s[10:11], 16
; SI-NEXT:    s_lshr_b64 s[56:57], s[22:23], 16
; SI-NEXT:    s_lshr_b64 s[58:59], s[24:25], 16
; SI-NEXT:    s_lshr_b64 s[60:61], s[26:27], 16
; SI-NEXT:    s_lshr_b64 s[62:63], s[28:29], 16
; SI-NEXT:    s_lshr_b64 s[72:73], s[46:47], 16
; SI-NEXT:    s_lshr_b64 s[74:75], s[44:45], 16
; SI-NEXT:    s_lshr_b32 s94, s5, 16
; SI-NEXT:    s_lshr_b32 s95, s9, 16
; SI-NEXT:    s_lshr_b32 vcc_lo, s11, 16
; SI-NEXT:    s_lshr_b32 vcc_hi, s23, 16
; SI-NEXT:    s_lshr_b32 s63, s25, 16
; SI-NEXT:    s_lshr_b32 s34, s27, 16
; SI-NEXT:    s_lshr_b32 s31, s29, 16
; SI-NEXT:    s_lshr_b32 s61, s47, 16
; SI-NEXT:    s_lshr_b32 s30, s45, 16
; SI-NEXT:    s_lshr_b32 s59, s43, 16
; SI-NEXT:    s_lshr_b32 s57, s41, 16
; SI-NEXT:    s_lshr_b32 s21, s15, 16
; SI-NEXT:    s_lshr_b32 s19, s13, 16
; SI-NEXT:    s_lshr_b32 s17, s7, 16
; SI-NEXT:    s_lshr_b64 s[76:77], s[42:43], 16
; SI-NEXT:    s_lshr_b64 s[78:79], s[40:41], 16
; SI-NEXT:    s_lshr_b64 s[88:89], s[14:15], 16
; SI-NEXT:    s_lshr_b64 s[90:91], s[12:13], 16
; SI-NEXT:    s_lshr_b64 s[92:93], s[6:7], 16
; SI-NEXT:  .LBB57_3: ; %end
; SI-NEXT:    s_lshl_b32 s16, s16, 16
; SI-NEXT:    s_and_b32 s4, s4, 0xffff
; SI-NEXT:    s_or_b32 s4, s4, s16
; SI-NEXT:    s_and_b32 s5, s5, 0xffff
; SI-NEXT:    s_lshl_b32 s16, s94, 16
; SI-NEXT:    s_or_b32 s5, s5, s16
; SI-NEXT:    s_lshl_b32 s16, s18, 16
; SI-NEXT:    s_and_b32 s8, s8, 0xffff
; SI-NEXT:    s_or_b32 s8, s8, s16
; SI-NEXT:    s_and_b32 s9, s9, 0xffff
; SI-NEXT:    s_lshl_b32 s16, s95, 16
; SI-NEXT:    s_or_b32 s9, s9, s16
; SI-NEXT:    s_lshl_b32 s16, s20, 16
; SI-NEXT:    s_and_b32 s10, s10, 0xffff
; SI-NEXT:    s_or_b32 s10, s10, s16
; SI-NEXT:    s_and_b32 s11, s11, 0xffff
; SI-NEXT:    s_lshl_b32 s16, vcc_lo, 16
; SI-NEXT:    s_or_b32 s11, s11, s16
; SI-NEXT:    s_lshl_b32 s16, s56, 16
; SI-NEXT:    s_and_b32 s18, s22, 0xffff
; SI-NEXT:    s_or_b32 s16, s18, s16
; SI-NEXT:    s_and_b32 s18, s23, 0xffff
; SI-NEXT:    s_lshl_b32 s20, vcc_hi, 16
; SI-NEXT:    s_or_b32 s18, s18, s20
; SI-NEXT:    s_and_b32 s20, s24, 0xffff
; SI-NEXT:    s_lshl_b32 s22, s58, 16
; SI-NEXT:    s_or_b32 s20, s20, s22
; SI-NEXT:    s_and_b32 s22, s25, 0xffff
; SI-NEXT:    s_lshl_b32 s23, s63, 16
; SI-NEXT:    s_or_b32 s22, s22, s23
; SI-NEXT:    s_and_b32 s23, s26, 0xffff
; SI-NEXT:    s_lshl_b32 s24, s60, 16
; SI-NEXT:    s_or_b32 s23, s23, s24
; SI-NEXT:    s_and_b32 s24, s27, 0xffff
; SI-NEXT:    s_lshl_b32 s25, s34, 16
; SI-NEXT:    s_or_b32 s24, s24, s25
; SI-NEXT:    s_and_b32 s25, s28, 0xffff
; SI-NEXT:    s_lshl_b32 s26, s62, 16
; SI-NEXT:    s_or_b32 s25, s25, s26
; SI-NEXT:    s_and_b32 s26, s29, 0xffff
; SI-NEXT:    s_lshl_b32 s27, s31, 16
; SI-NEXT:    s_or_b32 s26, s26, s27
; SI-NEXT:    s_and_b32 s27, s46, 0xffff
; SI-NEXT:    s_lshl_b32 s28, s72, 16
; SI-NEXT:    s_or_b32 s27, s27, s28
; SI-NEXT:    s_and_b32 s28, s47, 0xffff
; SI-NEXT:    s_lshl_b32 s29, s61, 16
; SI-NEXT:    s_or_b32 s28, s28, s29
; SI-NEXT:    s_and_b32 s29, s44, 0xffff
; SI-NEXT:    s_lshl_b32 s44, s74, 16
; SI-NEXT:    s_or_b32 s29, s29, s44
; SI-NEXT:    s_and_b32 s44, s45, 0xffff
; SI-NEXT:    s_lshl_b32 s45, s30, 16
; SI-NEXT:    s_or_b32 s44, s44, s45
; SI-NEXT:    s_and_b32 s42, s42, 0xffff
; SI-NEXT:    s_lshl_b32 s45, s76, 16
; SI-NEXT:    s_or_b32 s42, s42, s45
; SI-NEXT:    s_and_b32 s43, s43, 0xffff
; SI-NEXT:    s_lshl_b32 s45, s59, 16
; SI-NEXT:    s_or_b32 s43, s43, s45
; SI-NEXT:    s_and_b32 s40, s40, 0xffff
; SI-NEXT:    s_lshl_b32 s45, s78, 16
; SI-NEXT:    s_or_b32 s40, s40, s45
; SI-NEXT:    s_and_b32 s41, s41, 0xffff
; SI-NEXT:    s_lshl_b32 s45, s57, 16
; SI-NEXT:    s_and_b32 s15, s15, 0xffff
; SI-NEXT:    s_lshl_b32 s21, s21, 16
; SI-NEXT:    s_and_b32 s13, s13, 0xffff
; SI-NEXT:    s_lshl_b32 s19, s19, 16
; SI-NEXT:    s_or_b32 s41, s41, s45
; SI-NEXT:    s_and_b32 s14, s14, 0xffff
; SI-NEXT:    s_lshl_b32 s45, s88, 16
; SI-NEXT:    s_or_b32 s15, s15, s21
; SI-NEXT:    s_and_b32 s12, s12, 0xffff
; SI-NEXT:    s_lshl_b32 s21, s90, 16
; SI-NEXT:    s_or_b32 s13, s13, s19
; SI-NEXT:    s_and_b32 s6, s6, 0xffff
; SI-NEXT:    s_lshl_b32 s19, s92, 16
; SI-NEXT:    s_and_b32 s7, s7, 0xffff
; SI-NEXT:    s_lshl_b32 s17, s17, 16
; SI-NEXT:    s_or_b32 s14, s14, s45
; SI-NEXT:    s_or_b32 s12, s12, s21
; SI-NEXT:    s_or_b32 s6, s6, s19
; SI-NEXT:    s_or_b32 s7, s7, s17
; SI-NEXT:    v_readlane_b32 s30, v28, 8
; SI-NEXT:    v_mov_b32_e32 v0, s4
; SI-NEXT:    v_mov_b32_e32 v1, s5
; SI-NEXT:    v_mov_b32_e32 v2, s8
; SI-NEXT:    v_mov_b32_e32 v3, s9
; SI-NEXT:    v_mov_b32_e32 v4, s10
; SI-NEXT:    v_mov_b32_e32 v5, s11
; SI-NEXT:    v_mov_b32_e32 v6, s16
; SI-NEXT:    v_mov_b32_e32 v7, s18
; SI-NEXT:    v_mov_b32_e32 v8, s20
; SI-NEXT:    v_mov_b32_e32 v9, s22
; SI-NEXT:    v_mov_b32_e32 v10, s23
; SI-NEXT:    v_mov_b32_e32 v11, s24
; SI-NEXT:    v_mov_b32_e32 v12, s25
; SI-NEXT:    v_mov_b32_e32 v13, s26
; SI-NEXT:    v_mov_b32_e32 v14, s27
; SI-NEXT:    v_mov_b32_e32 v15, s28
; SI-NEXT:    v_mov_b32_e32 v16, s29
; SI-NEXT:    v_mov_b32_e32 v17, s44
; SI-NEXT:    v_mov_b32_e32 v18, s42
; SI-NEXT:    v_mov_b32_e32 v19, s43
; SI-NEXT:    v_mov_b32_e32 v20, s40
; SI-NEXT:    v_mov_b32_e32 v21, s41
; SI-NEXT:    v_mov_b32_e32 v22, s14
; SI-NEXT:    v_mov_b32_e32 v23, s15
; SI-NEXT:    v_mov_b32_e32 v24, s12
; SI-NEXT:    v_mov_b32_e32 v25, s13
; SI-NEXT:    v_mov_b32_e32 v26, s6
; SI-NEXT:    v_mov_b32_e32 v27, s7
; SI-NEXT:    v_readlane_b32 s31, v28, 9
; SI-NEXT:    v_readlane_b32 s49, v28, 7
; SI-NEXT:    v_readlane_b32 s48, v28, 6
; SI-NEXT:    v_readlane_b32 s39, v28, 5
; SI-NEXT:    v_readlane_b32 s38, v28, 4
; SI-NEXT:    v_readlane_b32 s37, v28, 3
; SI-NEXT:    v_readlane_b32 s36, v28, 2
; SI-NEXT:    v_readlane_b32 s35, v28, 1
; SI-NEXT:    v_readlane_b32 s34, v28, 0
; SI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; SI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    s_mov_b64 exec, s[4:5]
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v56i16_to_v56f16_scalar:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_store_dword v28, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    v_writelane_b32 v28, s30, 0
; VI-NEXT:    v_writelane_b32 v28, s31, 1
; VI-NEXT:    v_readfirstlane_b32 s5, v13
; VI-NEXT:    v_readfirstlane_b32 s6, v12
; VI-NEXT:    v_readfirstlane_b32 s8, v11
; VI-NEXT:    v_readfirstlane_b32 s10, v10
; VI-NEXT:    v_readfirstlane_b32 s12, v9
; VI-NEXT:    v_readfirstlane_b32 s14, v8
; VI-NEXT:    v_readfirstlane_b32 s41, v7
; VI-NEXT:    v_readfirstlane_b32 s45, v6
; VI-NEXT:    v_readfirstlane_b32 s56, v5
; VI-NEXT:    v_readfirstlane_b32 s59, v4
; VI-NEXT:    v_readfirstlane_b32 s62, v3
; VI-NEXT:    v_readfirstlane_b32 s74, v2
; VI-NEXT:    v_readfirstlane_b32 s77, v1
; VI-NEXT:    v_readfirstlane_b32 s88, v0
; VI-NEXT:    s_lshr_b32 s40, s29, 16
; VI-NEXT:    s_lshr_b32 s43, s28, 16
; VI-NEXT:    s_lshr_b32 s44, s27, 16
; VI-NEXT:    s_lshr_b32 s47, s26, 16
; VI-NEXT:    s_lshr_b32 s58, s25, 16
; VI-NEXT:    s_lshr_b32 s61, s24, 16
; VI-NEXT:    s_lshr_b32 s72, s23, 16
; VI-NEXT:    s_lshr_b32 s73, s22, 16
; VI-NEXT:    s_lshr_b32 s76, s21, 16
; VI-NEXT:    s_lshr_b32 s79, s20, 16
; VI-NEXT:    s_lshr_b32 s90, s19, 16
; VI-NEXT:    s_lshr_b32 s91, s18, 16
; VI-NEXT:    s_lshr_b32 vcc_lo, s17, 16
; VI-NEXT:    s_lshr_b32 vcc_hi, s16, 16
; VI-NEXT:    s_lshr_b32 s4, s5, 16
; VI-NEXT:    s_lshr_b32 s7, s6, 16
; VI-NEXT:    s_lshr_b32 s9, s8, 16
; VI-NEXT:    s_lshr_b32 s11, s10, 16
; VI-NEXT:    s_lshr_b32 s13, s12, 16
; VI-NEXT:    s_lshr_b32 s15, s14, 16
; VI-NEXT:    s_lshr_b32 s42, s41, 16
; VI-NEXT:    s_lshr_b32 s46, s45, 16
; VI-NEXT:    s_lshr_b32 s57, s56, 16
; VI-NEXT:    s_lshr_b32 s60, s59, 16
; VI-NEXT:    s_lshr_b32 s63, s62, 16
; VI-NEXT:    s_lshr_b32 s75, s74, 16
; VI-NEXT:    s_lshr_b32 s78, s77, 16
; VI-NEXT:    s_lshr_b32 s89, s88, 16
; VI-NEXT:    v_readfirstlane_b32 s30, v14
; VI-NEXT:    s_cmp_lg_u32 s30, 0
; VI-NEXT:    s_cbranch_scc1 .LBB57_2
; VI-NEXT:  ; %bb.1: ; %cmp.true
; VI-NEXT:    s_add_i32 s16, s16, 3
; VI-NEXT:    s_add_i32 vcc_hi, vcc_hi, 3
; VI-NEXT:    s_add_i32 s17, s17, 3
; VI-NEXT:    s_add_i32 vcc_lo, vcc_lo, 3
; VI-NEXT:    s_add_i32 s18, s18, 3
; VI-NEXT:    s_add_i32 s91, s91, 3
; VI-NEXT:    s_add_i32 s19, s19, 3
; VI-NEXT:    s_add_i32 s90, s90, 3
; VI-NEXT:    s_add_i32 s20, s20, 3
; VI-NEXT:    s_add_i32 s79, s79, 3
; VI-NEXT:    s_add_i32 s21, s21, 3
; VI-NEXT:    s_add_i32 s76, s76, 3
; VI-NEXT:    s_add_i32 s22, s22, 3
; VI-NEXT:    s_add_i32 s73, s73, 3
; VI-NEXT:    s_add_i32 s23, s23, 3
; VI-NEXT:    s_add_i32 s72, s72, 3
; VI-NEXT:    s_add_i32 s24, s24, 3
; VI-NEXT:    s_add_i32 s61, s61, 3
; VI-NEXT:    s_add_i32 s25, s25, 3
; VI-NEXT:    s_add_i32 s58, s58, 3
; VI-NEXT:    s_add_i32 s26, s26, 3
; VI-NEXT:    s_add_i32 s47, s47, 3
; VI-NEXT:    s_add_i32 s27, s27, 3
; VI-NEXT:    s_add_i32 s44, s44, 3
; VI-NEXT:    s_add_i32 s28, s28, 3
; VI-NEXT:    s_add_i32 s43, s43, 3
; VI-NEXT:    s_add_i32 s29, s29, 3
; VI-NEXT:    s_add_i32 s40, s40, 3
; VI-NEXT:    s_add_i32 s88, s88, 3
; VI-NEXT:    s_add_i32 s89, s89, 3
; VI-NEXT:    s_add_i32 s77, s77, 3
; VI-NEXT:    s_add_i32 s78, s78, 3
; VI-NEXT:    s_add_i32 s74, s74, 3
; VI-NEXT:    s_add_i32 s75, s75, 3
; VI-NEXT:    s_add_i32 s62, s62, 3
; VI-NEXT:    s_add_i32 s63, s63, 3
; VI-NEXT:    s_add_i32 s59, s59, 3
; VI-NEXT:    s_add_i32 s60, s60, 3
; VI-NEXT:    s_add_i32 s56, s56, 3
; VI-NEXT:    s_add_i32 s57, s57, 3
; VI-NEXT:    s_add_i32 s45, s45, 3
; VI-NEXT:    s_add_i32 s46, s46, 3
; VI-NEXT:    s_add_i32 s41, s41, 3
; VI-NEXT:    s_add_i32 s42, s42, 3
; VI-NEXT:    s_add_i32 s14, s14, 3
; VI-NEXT:    s_add_i32 s15, s15, 3
; VI-NEXT:    s_add_i32 s12, s12, 3
; VI-NEXT:    s_add_i32 s13, s13, 3
; VI-NEXT:    s_add_i32 s10, s10, 3
; VI-NEXT:    s_add_i32 s11, s11, 3
; VI-NEXT:    s_add_i32 s8, s8, 3
; VI-NEXT:    s_add_i32 s9, s9, 3
; VI-NEXT:    s_add_i32 s6, s6, 3
; VI-NEXT:    s_add_i32 s7, s7, 3
; VI-NEXT:    s_add_i32 s5, s5, 3
; VI-NEXT:    s_add_i32 s4, s4, 3
; VI-NEXT:  .LBB57_2: ; %end
; VI-NEXT:    s_and_b32 s28, 0xffff, s28
; VI-NEXT:    s_lshl_b32 s43, s43, 16
; VI-NEXT:    s_and_b32 s29, 0xffff, s29
; VI-NEXT:    s_lshl_b32 s40, s40, 16
; VI-NEXT:    s_and_b32 s27, 0xffff, s27
; VI-NEXT:    s_lshl_b32 s44, s44, 16
; VI-NEXT:    s_or_b32 s28, s28, s43
; VI-NEXT:    s_or_b32 s29, s29, s40
; VI-NEXT:    s_and_b32 s40, 0xffff, s88
; VI-NEXT:    s_lshl_b32 s43, s89, 16
; VI-NEXT:    s_and_b32 s26, 0xffff, s26
; VI-NEXT:    s_lshl_b32 s47, s47, 16
; VI-NEXT:    s_or_b32 s27, s27, s44
; VI-NEXT:    s_or_b32 s40, s40, s43
; VI-NEXT:    s_and_b32 s43, 0xffff, s77
; VI-NEXT:    s_lshl_b32 s44, s78, 16
; VI-NEXT:    s_and_b32 s25, 0xffff, s25
; VI-NEXT:    s_lshl_b32 s58, s58, 16
; VI-NEXT:    s_or_b32 s26, s26, s47
; VI-NEXT:    s_or_b32 s43, s43, s44
; VI-NEXT:    s_and_b32 s44, 0xffff, s74
; VI-NEXT:    s_lshl_b32 s47, s75, 16
; VI-NEXT:    s_or_b32 s25, s25, s58
; VI-NEXT:    s_or_b32 s44, s44, s47
; VI-NEXT:    s_and_b32 s47, 0xffff, s62
; VI-NEXT:    s_lshl_b32 s58, s63, 16
; VI-NEXT:    s_and_b32 s16, 0xffff, s16
; VI-NEXT:    s_lshl_b32 vcc_hi, vcc_hi, 16
; VI-NEXT:    s_and_b32 s17, 0xffff, s17
; VI-NEXT:    s_lshl_b32 vcc_lo, vcc_lo, 16
; VI-NEXT:    s_and_b32 s18, 0xffff, s18
; VI-NEXT:    s_lshl_b32 s91, s91, 16
; VI-NEXT:    s_and_b32 s19, 0xffff, s19
; VI-NEXT:    s_lshl_b32 s90, s90, 16
; VI-NEXT:    s_and_b32 s20, 0xffff, s20
; VI-NEXT:    s_lshl_b32 s79, s79, 16
; VI-NEXT:    s_and_b32 s21, 0xffff, s21
; VI-NEXT:    s_lshl_b32 s76, s76, 16
; VI-NEXT:    s_and_b32 s22, 0xffff, s22
; VI-NEXT:    s_lshl_b32 s73, s73, 16
; VI-NEXT:    s_and_b32 s23, 0xffff, s23
; VI-NEXT:    s_lshl_b32 s72, s72, 16
; VI-NEXT:    s_and_b32 s24, 0xffff, s24
; VI-NEXT:    s_lshl_b32 s61, s61, 16
; VI-NEXT:    s_or_b32 s47, s47, s58
; VI-NEXT:    s_and_b32 s58, 0xffff, s59
; VI-NEXT:    s_lshl_b32 s59, s60, 16
; VI-NEXT:    s_and_b32 s56, 0xffff, s56
; VI-NEXT:    s_lshl_b32 s57, s57, 16
; VI-NEXT:    s_and_b32 s45, 0xffff, s45
; VI-NEXT:    s_lshl_b32 s46, s46, 16
; VI-NEXT:    s_and_b32 s41, 0xffff, s41
; VI-NEXT:    s_lshl_b32 s42, s42, 16
; VI-NEXT:    s_and_b32 s14, 0xffff, s14
; VI-NEXT:    s_lshl_b32 s15, s15, 16
; VI-NEXT:    s_and_b32 s12, 0xffff, s12
; VI-NEXT:    s_lshl_b32 s13, s13, 16
; VI-NEXT:    s_and_b32 s10, 0xffff, s10
; VI-NEXT:    s_lshl_b32 s11, s11, 16
; VI-NEXT:    s_and_b32 s8, 0xffff, s8
; VI-NEXT:    s_lshl_b32 s9, s9, 16
; VI-NEXT:    s_and_b32 s6, 0xffff, s6
; VI-NEXT:    s_lshl_b32 s7, s7, 16
; VI-NEXT:    s_and_b32 s5, 0xffff, s5
; VI-NEXT:    s_lshl_b32 s4, s4, 16
; VI-NEXT:    s_or_b32 s16, s16, vcc_hi
; VI-NEXT:    s_or_b32 s17, s17, vcc_lo
; VI-NEXT:    s_or_b32 s18, s18, s91
; VI-NEXT:    s_or_b32 s19, s19, s90
; VI-NEXT:    s_or_b32 s20, s20, s79
; VI-NEXT:    s_or_b32 s21, s21, s76
; VI-NEXT:    s_or_b32 s22, s22, s73
; VI-NEXT:    s_or_b32 s23, s23, s72
; VI-NEXT:    s_or_b32 s24, s24, s61
; VI-NEXT:    s_or_b32 s58, s58, s59
; VI-NEXT:    s_or_b32 s56, s56, s57
; VI-NEXT:    s_or_b32 s45, s45, s46
; VI-NEXT:    s_or_b32 s41, s41, s42
; VI-NEXT:    s_or_b32 s14, s14, s15
; VI-NEXT:    s_or_b32 s12, s12, s13
; VI-NEXT:    s_or_b32 s10, s10, s11
; VI-NEXT:    s_or_b32 s8, s8, s9
; VI-NEXT:    s_or_b32 s6, s6, s7
; VI-NEXT:    s_or_b32 s4, s5, s4
; VI-NEXT:    v_readlane_b32 s30, v28, 0
; VI-NEXT:    v_mov_b32_e32 v0, s16
; VI-NEXT:    v_mov_b32_e32 v1, s17
; VI-NEXT:    v_mov_b32_e32 v2, s18
; VI-NEXT:    v_mov_b32_e32 v3, s19
; VI-NEXT:    v_mov_b32_e32 v4, s20
; VI-NEXT:    v_mov_b32_e32 v5, s21
; VI-NEXT:    v_mov_b32_e32 v6, s22
; VI-NEXT:    v_mov_b32_e32 v7, s23
; VI-NEXT:    v_mov_b32_e32 v8, s24
; VI-NEXT:    v_mov_b32_e32 v9, s25
; VI-NEXT:    v_mov_b32_e32 v10, s26
; VI-NEXT:    v_mov_b32_e32 v11, s27
; VI-NEXT:    v_mov_b32_e32 v12, s28
; VI-NEXT:    v_mov_b32_e32 v13, s29
; VI-NEXT:    v_mov_b32_e32 v14, s40
; VI-NEXT:    v_mov_b32_e32 v15, s43
; VI-NEXT:    v_mov_b32_e32 v16, s44
; VI-NEXT:    v_mov_b32_e32 v17, s47
; VI-NEXT:    v_mov_b32_e32 v18, s58
; VI-NEXT:    v_mov_b32_e32 v19, s56
; VI-NEXT:    v_mov_b32_e32 v20, s45
; VI-NEXT:    v_mov_b32_e32 v21, s41
; VI-NEXT:    v_mov_b32_e32 v22, s14
; VI-NEXT:    v_mov_b32_e32 v23, s12
; VI-NEXT:    v_mov_b32_e32 v24, s10
; VI-NEXT:    v_mov_b32_e32 v25, s8
; VI-NEXT:    v_mov_b32_e32 v26, s6
; VI-NEXT:    v_mov_b32_e32 v27, s4
; VI-NEXT:    v_readlane_b32 s31, v28, 1
; VI-NEXT:    s_xor_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v56i16_to_v56f16_scalar:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    v_readfirstlane_b32 s93, v13
; GFX9-NEXT:    v_readfirstlane_b32 s92, v12
; GFX9-NEXT:    v_readfirstlane_b32 s91, v11
; GFX9-NEXT:    v_readfirstlane_b32 s90, v10
; GFX9-NEXT:    v_readfirstlane_b32 s89, v9
; GFX9-NEXT:    v_readfirstlane_b32 s88, v8
; GFX9-NEXT:    v_readfirstlane_b32 s79, v7
; GFX9-NEXT:    v_readfirstlane_b32 s78, v6
; GFX9-NEXT:    v_readfirstlane_b32 s77, v5
; GFX9-NEXT:    v_readfirstlane_b32 s76, v4
; GFX9-NEXT:    v_readfirstlane_b32 s75, v3
; GFX9-NEXT:    v_readfirstlane_b32 s74, v2
; GFX9-NEXT:    v_readfirstlane_b32 s73, v1
; GFX9-NEXT:    v_readfirstlane_b32 s72, v0
; GFX9-NEXT:    s_lshr_b32 s41, s29, 16
; GFX9-NEXT:    s_lshr_b32 s40, s28, 16
; GFX9-NEXT:    s_lshr_b32 s15, s27, 16
; GFX9-NEXT:    s_lshr_b32 s14, s26, 16
; GFX9-NEXT:    s_lshr_b32 s13, s25, 16
; GFX9-NEXT:    s_lshr_b32 s12, s24, 16
; GFX9-NEXT:    s_lshr_b32 s11, s23, 16
; GFX9-NEXT:    s_lshr_b32 s10, s22, 16
; GFX9-NEXT:    s_lshr_b32 s9, s21, 16
; GFX9-NEXT:    s_lshr_b32 s8, s20, 16
; GFX9-NEXT:    s_lshr_b32 s7, s19, 16
; GFX9-NEXT:    s_lshr_b32 s6, s18, 16
; GFX9-NEXT:    s_lshr_b32 s5, s17, 16
; GFX9-NEXT:    s_lshr_b32 s4, s16, 16
; GFX9-NEXT:    s_lshr_b32 s63, s93, 16
; GFX9-NEXT:    s_lshr_b32 s62, s92, 16
; GFX9-NEXT:    s_lshr_b32 s61, s91, 16
; GFX9-NEXT:    s_lshr_b32 s60, s90, 16
; GFX9-NEXT:    s_lshr_b32 s59, s89, 16
; GFX9-NEXT:    s_lshr_b32 s58, s88, 16
; GFX9-NEXT:    s_lshr_b32 s57, s79, 16
; GFX9-NEXT:    s_lshr_b32 s56, s78, 16
; GFX9-NEXT:    s_lshr_b32 s47, s77, 16
; GFX9-NEXT:    s_lshr_b32 s46, s76, 16
; GFX9-NEXT:    s_lshr_b32 s45, s75, 16
; GFX9-NEXT:    s_lshr_b32 s44, s74, 16
; GFX9-NEXT:    s_lshr_b32 s43, s73, 16
; GFX9-NEXT:    s_lshr_b32 s42, s72, 16
; GFX9-NEXT:    v_readfirstlane_b32 s94, v14
; GFX9-NEXT:    s_cmp_lg_u32 s94, 0
; GFX9-NEXT:    s_cbranch_scc0 .LBB57_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    v_mov_b32_e32 v27, s93
; GFX9-NEXT:    v_mov_b32_e32 v26, s92
; GFX9-NEXT:    v_mov_b32_e32 v25, s91
; GFX9-NEXT:    v_mov_b32_e32 v24, s90
; GFX9-NEXT:    v_mov_b32_e32 v23, s89
; GFX9-NEXT:    v_mov_b32_e32 v22, s88
; GFX9-NEXT:    v_mov_b32_e32 v21, s79
; GFX9-NEXT:    v_mov_b32_e32 v20, s78
; GFX9-NEXT:    v_mov_b32_e32 v19, s77
; GFX9-NEXT:    v_mov_b32_e32 v18, s76
; GFX9-NEXT:    v_mov_b32_e32 v17, s75
; GFX9-NEXT:    v_mov_b32_e32 v16, s74
; GFX9-NEXT:    v_mov_b32_e32 v15, s73
; GFX9-NEXT:    v_mov_b32_e32 v14, s72
; GFX9-NEXT:    v_mov_b32_e32 v13, s29
; GFX9-NEXT:    v_mov_b32_e32 v12, s28
; GFX9-NEXT:    v_mov_b32_e32 v11, s27
; GFX9-NEXT:    v_mov_b32_e32 v10, s26
; GFX9-NEXT:    v_mov_b32_e32 v9, s25
; GFX9-NEXT:    v_mov_b32_e32 v8, s24
; GFX9-NEXT:    v_mov_b32_e32 v7, s23
; GFX9-NEXT:    v_mov_b32_e32 v6, s22
; GFX9-NEXT:    v_mov_b32_e32 v5, s21
; GFX9-NEXT:    v_mov_b32_e32 v4, s20
; GFX9-NEXT:    v_mov_b32_e32 v3, s19
; GFX9-NEXT:    v_mov_b32_e32 v2, s18
; GFX9-NEXT:    v_mov_b32_e32 v1, s17
; GFX9-NEXT:    v_mov_b32_e32 v0, s16
; GFX9-NEXT:    v_mov_b32_e32 v28, s63
; GFX9-NEXT:    v_mov_b32_e32 v29, s62
; GFX9-NEXT:    v_mov_b32_e32 v30, s61
; GFX9-NEXT:    v_mov_b32_e32 v31, s60
; GFX9-NEXT:    v_mov_b32_e32 v32, s59
; GFX9-NEXT:    v_mov_b32_e32 v33, s58
; GFX9-NEXT:    v_mov_b32_e32 v34, s57
; GFX9-NEXT:    v_mov_b32_e32 v35, s56
; GFX9-NEXT:    v_mov_b32_e32 v36, s47
; GFX9-NEXT:    v_mov_b32_e32 v37, s46
; GFX9-NEXT:    v_mov_b32_e32 v38, s45
; GFX9-NEXT:    v_mov_b32_e32 v39, s44
; GFX9-NEXT:    v_mov_b32_e32 v48, s43
; GFX9-NEXT:    v_mov_b32_e32 v49, s42
; GFX9-NEXT:    v_mov_b32_e32 v50, s41
; GFX9-NEXT:    v_mov_b32_e32 v51, s40
; GFX9-NEXT:    v_mov_b32_e32 v52, s15
; GFX9-NEXT:    v_mov_b32_e32 v53, s14
; GFX9-NEXT:    v_mov_b32_e32 v54, s13
; GFX9-NEXT:    v_mov_b32_e32 v55, s12
; GFX9-NEXT:    v_mov_b32_e32 v40, s11
; GFX9-NEXT:    v_mov_b32_e32 v41, s10
; GFX9-NEXT:    v_mov_b32_e32 v42, s9
; GFX9-NEXT:    v_mov_b32_e32 v43, s8
; GFX9-NEXT:    v_mov_b32_e32 v44, s7
; GFX9-NEXT:    v_mov_b32_e32 v45, s6
; GFX9-NEXT:    v_mov_b32_e32 v46, s5
; GFX9-NEXT:    v_mov_b32_e32 v47, s4
; GFX9-NEXT:    s_branch .LBB57_3
; GFX9-NEXT:  .LBB57_2: ; %cmp.true
; GFX9-NEXT:    s_pack_ll_b32_b16 s63, s93, s63
; GFX9-NEXT:    s_pack_ll_b32_b16 s62, s92, s62
; GFX9-NEXT:    s_pack_ll_b32_b16 s61, s91, s61
; GFX9-NEXT:    s_pack_ll_b32_b16 s60, s90, s60
; GFX9-NEXT:    s_pack_ll_b32_b16 s59, s89, s59
; GFX9-NEXT:    s_pack_ll_b32_b16 s58, s88, s58
; GFX9-NEXT:    s_pack_ll_b32_b16 s57, s79, s57
; GFX9-NEXT:    s_pack_ll_b32_b16 s56, s78, s56
; GFX9-NEXT:    s_pack_ll_b32_b16 s47, s77, s47
; GFX9-NEXT:    s_pack_ll_b32_b16 s46, s76, s46
; GFX9-NEXT:    s_pack_ll_b32_b16 s45, s75, s45
; GFX9-NEXT:    s_pack_ll_b32_b16 s44, s74, s44
; GFX9-NEXT:    s_pack_ll_b32_b16 s43, s73, s43
; GFX9-NEXT:    s_pack_ll_b32_b16 s42, s72, s42
; GFX9-NEXT:    s_pack_ll_b32_b16 s29, s29, s41
; GFX9-NEXT:    s_pack_ll_b32_b16 s28, s28, s40
; GFX9-NEXT:    s_pack_ll_b32_b16 s15, s27, s15
; GFX9-NEXT:    s_pack_ll_b32_b16 s14, s26, s14
; GFX9-NEXT:    s_pack_ll_b32_b16 s13, s25, s13
; GFX9-NEXT:    s_pack_ll_b32_b16 s12, s24, s12
; GFX9-NEXT:    s_pack_ll_b32_b16 s11, s23, s11
; GFX9-NEXT:    s_pack_ll_b32_b16 s10, s22, s10
; GFX9-NEXT:    s_pack_ll_b32_b16 s9, s21, s9
; GFX9-NEXT:    s_pack_ll_b32_b16 s8, s20, s8
; GFX9-NEXT:    s_pack_ll_b32_b16 s7, s19, s7
; GFX9-NEXT:    s_pack_ll_b32_b16 s6, s18, s6
; GFX9-NEXT:    s_pack_ll_b32_b16 s5, s17, s5
; GFX9-NEXT:    s_pack_ll_b32_b16 s4, s16, s4
; GFX9-NEXT:    v_pk_add_u16 v27, s63, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v26, s62, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v25, s61, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v24, s60, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v23, s59, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v22, s58, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v21, s57, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v20, s56, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v19, s47, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v18, s46, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v17, s45, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v16, s44, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v15, s43, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v14, s42, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v13, s29, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v12, s28, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v11, s15, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v10, s14, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v9, s13, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v8, s12, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v7, s11, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v6, s10, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v5, s9, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v4, s8, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v3, s7, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v2, s6, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v1, s5, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_u16 v0, s4, 3 op_sel_hi:[1,0]
; GFX9-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; GFX9-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; GFX9-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; GFX9-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; GFX9-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; GFX9-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; GFX9-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; GFX9-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; GFX9-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX9-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX9-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX9-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX9-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX9-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX9-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX9-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX9-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX9-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX9-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX9-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX9-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX9-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX9-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX9-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX9-NEXT:  .LBB57_3: ; %end
; GFX9-NEXT:    v_lshlrev_b32_e32 v47, 16, v47
; GFX9-NEXT:    v_lshlrev_b32_e32 v46, 16, v46
; GFX9-NEXT:    v_lshlrev_b32_e32 v45, 16, v45
; GFX9-NEXT:    v_lshlrev_b32_e32 v44, 16, v44
; GFX9-NEXT:    v_lshlrev_b32_e32 v43, 16, v43
; GFX9-NEXT:    v_lshlrev_b32_e32 v42, 16, v42
; GFX9-NEXT:    v_lshlrev_b32_e32 v41, 16, v41
; GFX9-NEXT:    v_lshlrev_b32_e32 v40, 16, v40
; GFX9-NEXT:    v_or_b32_sdwa v0, v47, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v1, v46, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v2, v45, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v3, v44, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v4, v43, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v5, v42, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v6, v41, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v7, v40, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; GFX9-NEXT:    v_lshlrev_b32_e32 v55, 16, v55
; GFX9-NEXT:    v_lshlrev_b32_e32 v54, 16, v54
; GFX9-NEXT:    v_lshlrev_b32_e32 v53, 16, v53
; GFX9-NEXT:    v_lshlrev_b32_e32 v52, 16, v52
; GFX9-NEXT:    v_lshlrev_b32_e32 v51, 16, v51
; GFX9-NEXT:    v_lshlrev_b32_e32 v50, 16, v50
; GFX9-NEXT:    v_lshlrev_b32_e32 v49, 16, v49
; GFX9-NEXT:    v_lshlrev_b32_e32 v48, 16, v48
; GFX9-NEXT:    v_lshlrev_b32_e32 v39, 16, v39
; GFX9-NEXT:    v_lshlrev_b32_e32 v38, 16, v38
; GFX9-NEXT:    v_lshlrev_b32_e32 v37, 16, v37
; GFX9-NEXT:    v_lshlrev_b32_e32 v36, 16, v36
; GFX9-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; GFX9-NEXT:    v_lshlrev_b32_e32 v34, 16, v34
; GFX9-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; GFX9-NEXT:    v_lshlrev_b32_e32 v32, 16, v32
; GFX9-NEXT:    v_lshlrev_b32_e32 v31, 16, v31
; GFX9-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; GFX9-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; GFX9-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; GFX9-NEXT:    v_or_b32_sdwa v8, v55, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v9, v54, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v10, v53, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v11, v52, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v12, v51, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v13, v50, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v14, v49, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v15, v48, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v16, v39, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v17, v38, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v18, v37, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v19, v36, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v20, v35, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v21, v34, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v22, v33, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v23, v32, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v24, v31, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v25, v30, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v26, v29, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v27, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-TRUE16-LABEL: bitcast_v56i16_to_v56f16_scalar:
; GFX11-TRUE16:       ; %bb.0:
; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s79, v9
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s89, v8
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s88, v7
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s77, v6
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s76, v5
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s73, v4
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s78, v3
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s75, v2
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s74, v1
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s72, v0
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s90, v10
; GFX11-TRUE16-NEXT:    s_lshr_b32 s45, s29, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s44, s28, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s43, s27, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s42, s26, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s41, s25, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s40, s24, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s15, s23, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s14, s22, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s13, s21, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s12, s20, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s11, s19, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s10, s18, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s8, s17, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s6, s16, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s9, s3, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s7, s2, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s4, s1, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s5, s0, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s58, s79, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s63, s89, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s62, s88, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s60, s77, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s57, s76, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s47, s73, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s61, s78, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s59, s75, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s56, s74, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s46, s72, 16
; GFX11-TRUE16-NEXT:    s_cmp_lg_u32 s90, 0
; GFX11-TRUE16-NEXT:    s_cbranch_scc0 .LBB57_2
; GFX11-TRUE16-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v27, s79 :: v_dual_mov_b32 v26, s89
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v25, s88 :: v_dual_mov_b32 v24, s77
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v23, s76 :: v_dual_mov_b32 v22, s73
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v21, s78 :: v_dual_mov_b32 v20, s75
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v19, s74 :: v_dual_mov_b32 v18, s72
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v28, s58 :: v_dual_mov_b32 v29, s63
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v30, s62 :: v_dual_mov_b32 v31, s60
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v32, s57 :: v_dual_mov_b32 v33, s47
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v34, s61 :: v_dual_mov_b32 v35, s59
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v36, s56 :: v_dual_mov_b32 v37, s46
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v38, s45 :: v_dual_mov_b32 v39, s44
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v48, s43 :: v_dual_mov_b32 v49, s42
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v50, s41 :: v_dual_mov_b32 v51, s40
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v52, s15 :: v_dual_mov_b32 v53, s14
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v54, s13 :: v_dual_mov_b32 v55, s12
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v64, s11 :: v_dual_mov_b32 v65, s10
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v66, s8 :: v_dual_mov_b32 v67, s6
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v68, s9 :: v_dual_mov_b32 v69, s7
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v70, s4 :: v_dual_mov_b32 v71, s5
; GFX11-TRUE16-NEXT:    s_branch .LBB57_3
; GFX11-TRUE16-NEXT:  .LBB57_2: ; %cmp.true
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s58, s79, s58
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s57, s76, s57
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v27, s58, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s58, s88, s62
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s47, s73, s47
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s63, s89, s63
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v25, s58, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s58, s77, s60
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v23, s57, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s57, s78, s61
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v22, s47, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s47, s75, s59
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s56, s74, s56
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s46, s72, s46
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s29, s29, s45
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s28, s28, s44
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s27, s27, s43
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s26, s26, s42
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s25, s25, s41
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s24, s24, s40
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s15, s23, s15
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s14, s22, s14
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s13, s21, s13
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s12, s20, s12
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s11, s19, s11
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s10, s18, s10
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s8, s17, s8
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s6, s16, s6
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s3, s3, s9
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s2, s2, s7
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s0, s0, s5
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s1, s1, s4
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v26, s63, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v24, s58, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v21, s57, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v20, s47, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v19, s56, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v18, s46, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v17, s29, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v16, s28, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v15, s27, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v14, s26, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v13, s25, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v12, s24, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v11, s15, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v10, s14, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v9, s13, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v8, s12, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v7, s11, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v6, s10, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v5, s8, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v0, s0, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v2, s2, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v3, s3, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_u16 v4, s6, 3 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v0
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v2
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v3
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v4
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v5
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v6
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v7
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX11-TRUE16-NEXT:  .LBB57_3: ; %end
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v0.h, v71.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v1.h, v70.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v2.h, v69.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v3.h, v68.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v4.h, v67.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v5.h, v66.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v6.h, v65.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v7.h, v64.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v8.h, v55.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v9.h, v54.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v10.h, v53.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v11.h, v52.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v12.h, v51.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v13.h, v50.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v14.h, v49.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v15.h, v48.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v16.h, v39.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v17.h, v38.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v18.h, v37.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v19.h, v36.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v20.h, v35.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v21.h, v34.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v22.h, v33.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v23.h, v32.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v24.h, v31.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v25.h, v30.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v26.h, v29.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v27.h, v28.l
; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v56i16_to_v56f16_scalar:
; GFX11-FAKE16:       ; %bb.0:
; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s79, v9
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s89, v8
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s88, v7
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s77, v6
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s76, v5
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s73, v4
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s78, v3
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s75, v2
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s74, v1
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s72, v0
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s90, v10
; GFX11-FAKE16-NEXT:    s_lshr_b32 s45, s29, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s44, s28, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s43, s27, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s42, s26, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s41, s25, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s40, s24, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s15, s23, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s14, s22, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s13, s21, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s12, s20, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s11, s19, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s10, s18, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s8, s17, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s6, s16, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s9, s3, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s7, s2, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s4, s1, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s5, s0, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s58, s79, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s63, s89, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s62, s88, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s60, s77, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s57, s76, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s47, s73, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s61, s78, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s59, s75, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s56, s74, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s46, s72, 16
; GFX11-FAKE16-NEXT:    s_cmp_lg_u32 s90, 0
; GFX11-FAKE16-NEXT:    s_cbranch_scc0 .LBB57_2
; GFX11-FAKE16-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v23, s79 :: v_dual_mov_b32 v24, s89
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v25, s88 :: v_dual_mov_b32 v26, s77
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v27, s76 :: v_dual_mov_b32 v18, s73
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v19, s78 :: v_dual_mov_b32 v20, s75
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v21, s74 :: v_dual_mov_b32 v22, s72
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v13, s29 :: v_dual_mov_b32 v14, s28
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v16, s26
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v17, s25 :: v_dual_mov_b32 v8, s24
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v9, s23 :: v_dual_mov_b32 v10, s22
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v11, s21 :: v_dual_mov_b32 v12, s20
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v3, s19 :: v_dual_mov_b32 v4, s18
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v6, s16
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v7, s3 :: v_dual_mov_b32 v0, s2
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v2, s0
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v28, s58 :: v_dual_mov_b32 v29, s63
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v30, s62 :: v_dual_mov_b32 v31, s60
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v32, s57 :: v_dual_mov_b32 v33, s47
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v34, s61 :: v_dual_mov_b32 v35, s59
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v36, s56 :: v_dual_mov_b32 v37, s46
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v38, s45 :: v_dual_mov_b32 v39, s44
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v48, s43 :: v_dual_mov_b32 v49, s42
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v50, s41 :: v_dual_mov_b32 v51, s40
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v52, s15 :: v_dual_mov_b32 v53, s14
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v54, s13 :: v_dual_mov_b32 v55, s12
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v64, s11 :: v_dual_mov_b32 v65, s10
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v66, s8 :: v_dual_mov_b32 v67, s6
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v68, s9 :: v_dual_mov_b32 v69, s7
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v70, s4 :: v_dual_mov_b32 v71, s5
; GFX11-FAKE16-NEXT:    s_branch .LBB57_3
; GFX11-FAKE16-NEXT:  .LBB57_2: ; %cmp.true
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s58, s79, s58
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s57, s76, s57
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v23, s58, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s58, s88, s62
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s47, s73, s47
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s63, s89, s63
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v25, s58, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s58, s77, s60
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v27, s57, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s57, s78, s61
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v18, s47, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s47, s75, s59
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s56, s74, s56
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s46, s72, s46
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s29, s29, s45
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s28, s28, s44
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s27, s27, s43
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s26, s26, s42
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s25, s25, s41
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s24, s24, s40
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s15, s23, s15
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s14, s22, s14
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s13, s21, s13
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s12, s20, s12
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s11, s19, s11
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s10, s18, s10
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s8, s17, s8
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s6, s16, s6
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s3, s3, s9
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s2, s2, s7
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s0, s0, s5
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s1, s1, s4
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v24, s63, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v26, s58, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v19, s57, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v20, s47, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v21, s56, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v22, s46, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v13, s29, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v14, s28, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v15, s27, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v16, s26, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v17, s25, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v8, s24, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v9, s15, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v10, s14, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v11, s13, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v12, s12, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v3, s11, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v4, s10, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v5, s8, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v2, s0, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v1, s1, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v0, s2, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v7, s3, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_u16 v6, s6, 3 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v2
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v0
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v3
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v28, 16, v23
; GFX11-FAKE16-NEXT:  .LBB57_3: ; %end
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v2, 0xffff, v2
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v80, 0xffff, v0
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v7, 0xffff, v7
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v6, 0xffff, v6
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v0, v71, 16, v2
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v1, v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v2, v69, 16, v80
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v69, 0xffff, v4
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v70, 0xffff, v3
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v3, v68, 16, v7
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v4, v67, 16, v6
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v12, 0xffff, v12
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v6, v65, 16, v69
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v7, v64, 16, v70
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v11, 0xffff, v11
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v64, 0xffff, v9
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v65, 0xffff, v8
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v8, v55, 16, v12
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v17, 0xffff, v17
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v9, v54, 16, v11
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v11, v52, 16, v64
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v12, v51, 16, v65
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v16, 0xffff, v16
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v51, 0xffff, v14
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v52, 0xffff, v13
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v13, v50, 16, v17
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v22, 0xffff, v22
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v14, v49, 16, v16
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v16, v39, 16, v51
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v17, v38, 16, v52
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v21, 0xffff, v21
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v38, 0xffff, v19
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v39, 0xffff, v18
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v5, 0xffff, v5
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v10, 0xffff, v10
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v15, 0xffff, v15
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v20, 0xffff, v20
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v18, v37, 16, v22
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v19, v36, 16, v21
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v21, v34, 16, v38
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v22, v33, 16, v39
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v33, 0xffff, v24
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v34, 0xffff, v23
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v5, v66, 16, v5
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v10, v53, 16, v10
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v15, v48, 16, v15
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v20, v35, 16, v20
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v23, v32, 16, v27
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v24, v31, 16, v26
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v25, v30, 16, v25
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v26, v29, 16, v33
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v27, v28, 16, v34
; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = add <56 x i16> %a, splat (i16 3)
  %a2 = bitcast <56 x i16> %a1 to <56 x half>
  br label %end

cmp.false:
  %a3 = bitcast <56 x i16> %a to <56 x half>
  br label %end

end:
  %phi = phi <56 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <56 x half> %phi
}

define <56 x i16> @bitcast_v56f16_to_v56i16(<56 x half> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v56f16_to_v56i16:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v56, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v57, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    v_lshrrev_b32_e32 v51, 16, v26
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_lshrrev_b32_e32 v56, 16, v25
; SI-NEXT:    v_lshrrev_b32_e32 v52, 16, v24
; SI-NEXT:    v_lshrrev_b32_e32 v31, 16, v23
; SI-NEXT:    v_lshrrev_b32_e32 v53, 16, v22
; SI-NEXT:    v_lshrrev_b32_e32 v32, 16, v21
; SI-NEXT:    v_lshrrev_b32_e32 v54, 16, v20
; SI-NEXT:    v_lshrrev_b32_e32 v33, 16, v19
; SI-NEXT:    v_lshrrev_b32_e32 v55, 16, v18
; SI-NEXT:    v_lshrrev_b32_e32 v34, 16, v17
; SI-NEXT:    v_lshrrev_b32_e32 v29, 16, v16
; SI-NEXT:    v_lshrrev_b32_e32 v35, 16, v15
; SI-NEXT:    v_lshrrev_b32_e32 v40, 16, v14
; SI-NEXT:    v_lshrrev_b32_e32 v36, 16, v13
; SI-NEXT:    v_lshrrev_b32_e32 v41, 16, v12
; SI-NEXT:    v_lshrrev_b32_e32 v37, 16, v11
; SI-NEXT:    v_lshrrev_b32_e32 v42, 16, v10
; SI-NEXT:    v_lshrrev_b32_e32 v38, 16, v9
; SI-NEXT:    v_lshrrev_b32_e32 v43, 16, v8
; SI-NEXT:    v_lshrrev_b32_e32 v39, 16, v7
; SI-NEXT:    v_lshrrev_b32_e32 v44, 16, v6
; SI-NEXT:    v_lshrrev_b32_e32 v48, 16, v5
; SI-NEXT:    v_lshrrev_b32_e32 v45, 16, v4
; SI-NEXT:    v_lshrrev_b32_e32 v49, 16, v3
; SI-NEXT:    v_lshrrev_b32_e32 v46, 16, v2
; SI-NEXT:    v_lshrrev_b32_e32 v50, 16, v1
; SI-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; SI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; SI-NEXT:    v_lshrrev_b32_e32 v30, 16, v27
; SI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; SI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; SI-NEXT:    s_or_saveexec_b64 s[4:5], s[4:5]
; SI-NEXT:    v_mov_b32_e32 v28, v30
; SI-NEXT:    s_xor_b64 exec, exec, s[4:5]
; SI-NEXT:    s_cbranch_execz .LBB58_2
; SI-NEXT:  ; %bb.1: ; %cmp.true
; SI-NEXT:    v_cvt_f32_f16_e32 v30, v47
; SI-NEXT:    v_cvt_f32_f16_e32 v45, v45
; SI-NEXT:    v_cvt_f32_f16_e32 v44, v44
; SI-NEXT:    v_cvt_f32_f16_e32 v46, v46
; SI-NEXT:    v_add_f32_e32 v30, 0x38000000, v30
; SI-NEXT:    v_add_f32_e32 v45, 0x38000000, v45
; SI-NEXT:    v_add_f32_e32 v44, 0x38000000, v44
; SI-NEXT:    v_cvt_f32_f16_e32 v43, v43
; SI-NEXT:    v_cvt_f16_f32_e32 v30, v30
; SI-NEXT:    v_cvt_f16_f32_e32 v45, v45
; SI-NEXT:    v_cvt_f16_f32_e32 v44, v44
; SI-NEXT:    v_add_f32_e32 v46, 0x38000000, v46
; SI-NEXT:    v_add_f32_e32 v43, 0x38000000, v43
; SI-NEXT:    v_mov_b32_e32 v47, v29
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v30
; SI-NEXT:    v_cvt_f16_f32_e32 v30, v46
; SI-NEXT:    v_mov_b32_e32 v46, v40
; SI-NEXT:    v_lshlrev_b32_e32 v40, 16, v45
; SI-NEXT:    v_mov_b32_e32 v45, v41
; SI-NEXT:    v_lshlrev_b32_e32 v41, 16, v44
; SI-NEXT:    v_cvt_f16_f32_e32 v43, v43
; SI-NEXT:    v_cvt_f32_f16_e32 v44, v42
; SI-NEXT:    v_cvt_f32_f16_e32 v55, v55
; SI-NEXT:    v_cvt_f32_f16_e32 v54, v54
; SI-NEXT:    v_lshlrev_b32_e32 v42, 16, v43
; SI-NEXT:    v_add_f32_e32 v43, 0x38000000, v44
; SI-NEXT:    v_cvt_f32_f16_e32 v44, v45
; SI-NEXT:    v_cvt_f32_f16_e32 v45, v46
; SI-NEXT:    v_cvt_f32_f16_e32 v46, v47
; SI-NEXT:    v_add_f32_e32 v55, 0x38000000, v55
; SI-NEXT:    v_cvt_f16_f32_e32 v47, v55
; SI-NEXT:    v_add_f32_e32 v54, 0x38000000, v54
; SI-NEXT:    v_add_f32_e32 v46, 0x38000000, v46
; SI-NEXT:    v_cvt_f16_f32_e32 v46, v46
; SI-NEXT:    v_cvt_f16_f32_e32 v54, v54
; SI-NEXT:    v_cvt_f32_f16_e32 v52, v52
; SI-NEXT:    v_cvt_f32_f16_e32 v28, v28
; SI-NEXT:    v_lshlrev_b32_e32 v55, 16, v46
; SI-NEXT:    v_lshlrev_b32_e32 v46, 16, v47
; SI-NEXT:    v_cvt_f32_f16_e32 v47, v53
; SI-NEXT:    v_lshlrev_b32_e32 v53, 16, v54
; SI-NEXT:    v_add_f32_e32 v52, 0x38000000, v52
; SI-NEXT:    v_cvt_f32_f16_e32 v27, v27
; SI-NEXT:    v_add_f32_e32 v54, 0x38000000, v47
; SI-NEXT:    v_cvt_f16_f32_e32 v54, v54
; SI-NEXT:    v_cvt_f16_f32_e32 v47, v52
; SI-NEXT:    v_cvt_f32_f16_e32 v25, v25
; SI-NEXT:    v_cvt_f32_f16_e32 v31, v31
; SI-NEXT:    v_lshlrev_b32_e32 v52, 16, v54
; SI-NEXT:    v_cvt_f32_f16_e32 v54, v56
; SI-NEXT:    v_cvt_f32_f16_e32 v23, v23
; SI-NEXT:    v_cvt_f32_f16_e32 v32, v32
; SI-NEXT:    v_add_f32_e32 v28, 0x38000000, v28
; SI-NEXT:    v_cvt_f32_f16_e32 v21, v21
; SI-NEXT:    v_cvt_f32_f16_e32 v33, v33
; SI-NEXT:    v_cvt_f16_f32_e32 v28, v28
; SI-NEXT:    v_add_f32_e32 v27, 0x38000000, v27
; SI-NEXT:    v_add_f32_e32 v54, 0x38000000, v54
; SI-NEXT:    v_cvt_f32_f16_e32 v19, v19
; SI-NEXT:    v_cvt_f32_f16_e32 v34, v34
; SI-NEXT:    v_cvt_f16_f32_e32 v27, v27
; SI-NEXT:    v_cvt_f16_f32_e32 v56, v54
; SI-NEXT:    v_add_f32_e32 v25, 0x38000000, v25
; SI-NEXT:    v_add_f32_e32 v31, 0x38000000, v31
; SI-NEXT:    v_cvt_f32_f16_e32 v17, v17
; SI-NEXT:    v_cvt_f32_f16_e32 v35, v35
; SI-NEXT:    v_cvt_f16_f32_e32 v25, v25
; SI-NEXT:    v_cvt_f16_f32_e32 v31, v31
; SI-NEXT:    v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT:    v_add_f32_e32 v32, 0x38000000, v32
; SI-NEXT:    v_cvt_f32_f16_e32 v15, v15
; SI-NEXT:    v_cvt_f32_f16_e32 v36, v36
; SI-NEXT:    v_cvt_f16_f32_e32 v23, v23
; SI-NEXT:    v_cvt_f16_f32_e32 v32, v32
; SI-NEXT:    v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT:    v_add_f32_e32 v33, 0x38000000, v33
; SI-NEXT:    v_cvt_f32_f16_e32 v13, v13
; SI-NEXT:    v_cvt_f32_f16_e32 v37, v37
; SI-NEXT:    v_lshlrev_b32_e32 v54, 16, v28
; SI-NEXT:    v_cvt_f16_f32_e32 v21, v21
; SI-NEXT:    v_cvt_f16_f32_e32 v33, v33
; SI-NEXT:    v_add_f32_e32 v19, 0x38000000, v19
; SI-NEXT:    v_add_f32_e32 v34, 0x38000000, v34
; SI-NEXT:    v_cvt_f32_f16_e32 v11, v11
; SI-NEXT:    v_cvt_f32_f16_e32 v38, v38
; SI-NEXT:    v_or_b32_e32 v27, v27, v54
; SI-NEXT:    v_lshlrev_b32_e32 v54, 16, v56
; SI-NEXT:    v_cvt_f16_f32_e32 v19, v19
; SI-NEXT:    v_cvt_f16_f32_e32 v34, v34
; SI-NEXT:    v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT:    v_add_f32_e32 v35, 0x38000000, v35
; SI-NEXT:    v_cvt_f32_f16_e32 v9, v9
; SI-NEXT:    v_cvt_f32_f16_e32 v39, v39
; SI-NEXT:    v_or_b32_e32 v25, v25, v54
; SI-NEXT:    v_lshlrev_b32_e32 v54, 16, v31
; SI-NEXT:    v_cvt_f16_f32_e32 v17, v17
; SI-NEXT:    v_cvt_f16_f32_e32 v35, v35
; SI-NEXT:    v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT:    v_add_f32_e32 v36, 0x38000000, v36
; SI-NEXT:    v_cvt_f32_f16_e32 v7, v7
; SI-NEXT:    v_cvt_f32_f16_e32 v48, v48
; SI-NEXT:    v_or_b32_e32 v23, v23, v54
; SI-NEXT:    v_lshlrev_b32_e32 v54, 16, v32
; SI-NEXT:    v_cvt_f16_f32_e32 v15, v15
; SI-NEXT:    v_cvt_f16_f32_e32 v36, v36
; SI-NEXT:    v_add_f32_e32 v13, 0x38000000, v13
; SI-NEXT:    v_add_f32_e32 v37, 0x38000000, v37
; SI-NEXT:    v_cvt_f32_f16_e32 v5, v5
; SI-NEXT:    v_cvt_f32_f16_e32 v49, v49
; SI-NEXT:    v_or_b32_e32 v21, v21, v54
; SI-NEXT:    v_lshlrev_b32_e32 v54, 16, v33
; SI-NEXT:    v_cvt_f16_f32_e32 v13, v13
; SI-NEXT:    v_cvt_f16_f32_e32 v37, v37
; SI-NEXT:    v_add_f32_e32 v11, 0x38000000, v11
; SI-NEXT:    v_add_f32_e32 v38, 0x38000000, v38
; SI-NEXT:    v_cvt_f32_f16_e32 v3, v3
; SI-NEXT:    v_cvt_f32_f16_e32 v50, v50
; SI-NEXT:    v_or_b32_e32 v19, v19, v54
; SI-NEXT:    v_lshlrev_b32_e32 v54, 16, v34
; SI-NEXT:    v_cvt_f16_f32_e32 v11, v11
; SI-NEXT:    v_cvt_f16_f32_e32 v38, v38
; SI-NEXT:    v_add_f32_e32 v9, 0x38000000, v9
; SI-NEXT:    v_add_f32_e32 v39, 0x38000000, v39
; SI-NEXT:    v_cvt_f32_f16_e32 v1, v1
; SI-NEXT:    v_cvt_f32_f16_e32 v0, v0
; SI-NEXT:    v_cvt_f32_f16_e32 v2, v2
; SI-NEXT:    v_cvt_f32_f16_e32 v4, v4
; SI-NEXT:    v_cvt_f32_f16_e32 v51, v51
; SI-NEXT:    v_or_b32_e32 v17, v17, v54
; SI-NEXT:    v_lshlrev_b32_e32 v54, 16, v35
; SI-NEXT:    v_cvt_f16_f32_e32 v9, v9
; SI-NEXT:    v_cvt_f16_f32_e32 v39, v39
; SI-NEXT:    v_add_f32_e32 v7, 0x38000000, v7
; SI-NEXT:    v_add_f32_e32 v48, 0x38000000, v48
; SI-NEXT:    v_cvt_f32_f16_e32 v6, v6
; SI-NEXT:    v_cvt_f32_f16_e32 v8, v8
; SI-NEXT:    v_cvt_f32_f16_e32 v10, v10
; SI-NEXT:    v_cvt_f32_f16_e32 v12, v12
; SI-NEXT:    v_cvt_f32_f16_e32 v14, v14
; SI-NEXT:    v_cvt_f32_f16_e32 v16, v16
; SI-NEXT:    v_cvt_f32_f16_e32 v18, v18
; SI-NEXT:    v_cvt_f32_f16_e32 v20, v20
; SI-NEXT:    v_cvt_f32_f16_e32 v22, v22
; SI-NEXT:    v_cvt_f32_f16_e32 v24, v24
; SI-NEXT:    v_cvt_f32_f16_e32 v26, v26
; SI-NEXT:    v_or_b32_e32 v15, v15, v54
; SI-NEXT:    v_lshlrev_b32_e32 v54, 16, v36
; SI-NEXT:    v_cvt_f16_f32_e32 v7, v7
; SI-NEXT:    v_cvt_f16_f32_e32 v48, v48
; SI-NEXT:    v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT:    v_add_f32_e32 v49, 0x38000000, v49
; SI-NEXT:    v_or_b32_e32 v13, v13, v54
; SI-NEXT:    v_lshlrev_b32_e32 v54, 16, v37
; SI-NEXT:    v_cvt_f16_f32_e32 v5, v5
; SI-NEXT:    v_cvt_f16_f32_e32 v49, v49
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT:    v_add_f32_e32 v50, 0x38000000, v50
; SI-NEXT:    v_or_b32_e32 v11, v11, v54
; SI-NEXT:    v_lshlrev_b32_e32 v54, 16, v38
; SI-NEXT:    v_cvt_f16_f32_e32 v3, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v50, v50
; SI-NEXT:    v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT:    v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT:    v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT:    v_add_f32_e32 v4, 0x38000000, v4
; SI-NEXT:    v_add_f32_e32 v44, 0x38000000, v44
; SI-NEXT:    v_add_f32_e32 v45, 0x38000000, v45
; SI-NEXT:    v_add_f32_e32 v51, 0x38000000, v51
; SI-NEXT:    v_or_b32_e32 v9, v9, v54
; SI-NEXT:    v_lshlrev_b32_e32 v54, 16, v39
; SI-NEXT:    v_cvt_f16_f32_e32 v1, v1
; SI-NEXT:    v_cvt_f16_f32_e32 v0, v0
; SI-NEXT:    v_cvt_f16_f32_e32 v2, v2
; SI-NEXT:    v_cvt_f16_f32_e32 v4, v4
; SI-NEXT:    v_add_f32_e32 v6, 0x38000000, v6
; SI-NEXT:    v_add_f32_e32 v8, 0x38000000, v8
; SI-NEXT:    v_cvt_f16_f32_e32 v43, v43
; SI-NEXT:    v_add_f32_e32 v10, 0x38000000, v10
; SI-NEXT:    v_cvt_f16_f32_e32 v44, v44
; SI-NEXT:    v_add_f32_e32 v12, 0x38000000, v12
; SI-NEXT:    v_cvt_f16_f32_e32 v45, v45
; SI-NEXT:    v_add_f32_e32 v14, 0x38000000, v14
; SI-NEXT:    v_add_f32_e32 v16, 0x38000000, v16
; SI-NEXT:    v_add_f32_e32 v18, 0x38000000, v18
; SI-NEXT:    v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT:    v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT:    v_add_f32_e32 v24, 0x38000000, v24
; SI-NEXT:    v_cvt_f16_f32_e32 v51, v51
; SI-NEXT:    v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT:    v_or_b32_e32 v7, v7, v54
; SI-NEXT:    v_lshlrev_b32_e32 v54, 16, v48
; SI-NEXT:    v_cvt_f16_f32_e32 v6, v6
; SI-NEXT:    v_cvt_f16_f32_e32 v8, v8
; SI-NEXT:    v_cvt_f16_f32_e32 v10, v10
; SI-NEXT:    v_cvt_f16_f32_e32 v12, v12
; SI-NEXT:    v_cvt_f16_f32_e32 v14, v14
; SI-NEXT:    v_cvt_f16_f32_e32 v16, v16
; SI-NEXT:    v_cvt_f16_f32_e32 v18, v18
; SI-NEXT:    v_cvt_f16_f32_e32 v20, v20
; SI-NEXT:    v_cvt_f16_f32_e32 v22, v22
; SI-NEXT:    v_cvt_f16_f32_e32 v24, v24
; SI-NEXT:    v_cvt_f16_f32_e32 v26, v26
; SI-NEXT:    v_or_b32_e32 v5, v5, v54
; SI-NEXT:    v_lshlrev_b32_e32 v54, 16, v49
; SI-NEXT:    v_or_b32_e32 v3, v3, v54
; SI-NEXT:    v_lshlrev_b32_e32 v54, 16, v50
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; SI-NEXT:    v_or_b32_e32 v1, v1, v54
; SI-NEXT:    v_or_b32_e32 v0, v0, v29
; SI-NEXT:    v_or_b32_e32 v2, v2, v30
; SI-NEXT:    v_or_b32_e32 v4, v4, v40
; SI-NEXT:    v_lshlrev_b32_e32 v43, 16, v43
; SI-NEXT:    v_lshlrev_b32_e32 v44, 16, v44
; SI-NEXT:    v_lshlrev_b32_e32 v45, 16, v45
; SI-NEXT:    v_lshlrev_b32_e32 v47, 16, v47
; SI-NEXT:    v_lshlrev_b32_e32 v51, 16, v51
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_alignbit_b32 v57, v1, v29, 16
; SI-NEXT:    v_alignbit_b32 v30, v3, v30, 16
; SI-NEXT:    v_alignbit_b32 v29, v5, v40, 16
; SI-NEXT:    v_alignbit_b32 v54, v7, v41, 16
; SI-NEXT:    v_alignbit_b32 v40, v9, v42, 16
; SI-NEXT:    v_or_b32_e32 v6, v6, v41
; SI-NEXT:    v_or_b32_e32 v8, v8, v42
; SI-NEXT:    v_or_b32_e32 v10, v10, v43
; SI-NEXT:    v_or_b32_e32 v12, v12, v44
; SI-NEXT:    v_or_b32_e32 v14, v14, v45
; SI-NEXT:    v_or_b32_e32 v16, v16, v55
; SI-NEXT:    v_or_b32_e32 v18, v18, v46
; SI-NEXT:    v_or_b32_e32 v20, v20, v53
; SI-NEXT:    v_or_b32_e32 v22, v22, v52
; SI-NEXT:    v_or_b32_e32 v24, v24, v47
; SI-NEXT:    v_or_b32_e32 v26, v26, v51
; SI-NEXT:    v_alignbit_b32 v42, v11, v43, 16
; SI-NEXT:    v_mov_b32_e32 v43, v40
; SI-NEXT:    v_alignbit_b32 v41, v13, v44, 16
; SI-NEXT:    v_mov_b32_e32 v44, v54
; SI-NEXT:    v_alignbit_b32 v40, v15, v45, 16
; SI-NEXT:    v_mov_b32_e32 v45, v29
; SI-NEXT:    v_alignbit_b32 v29, v17, v55, 16
; SI-NEXT:    v_alignbit_b32 v55, v19, v46, 16
; SI-NEXT:    v_mov_b32_e32 v46, v30
; SI-NEXT:    v_alignbit_b32 v54, v21, v53, 16
; SI-NEXT:    v_alignbit_b32 v53, v23, v52, 16
; SI-NEXT:    v_alignbit_b32 v52, v25, v47, 16
; SI-NEXT:    v_mov_b32_e32 v47, v57
; SI-NEXT:    v_alignbit_b32 v51, v27, v51, 16
; SI-NEXT:  .LBB58_2: ; %end
; SI-NEXT:    s_or_b64 exec, exec, s[4:5]
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v47
; SI-NEXT:    v_or_b32_e32 v0, v0, v30
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v50
; SI-NEXT:    v_or_b32_e32 v1, v1, v30
; SI-NEXT:    v_and_b32_e32 v2, 0xffff, v2
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v46
; SI-NEXT:    v_or_b32_e32 v2, v2, v30
; SI-NEXT:    v_and_b32_e32 v3, 0xffff, v3
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v49
; SI-NEXT:    v_or_b32_e32 v3, v3, v30
; SI-NEXT:    v_and_b32_e32 v4, 0xffff, v4
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v45
; SI-NEXT:    v_or_b32_e32 v4, v4, v30
; SI-NEXT:    v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v48
; SI-NEXT:    v_and_b32_e32 v16, 0xffff, v16
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; SI-NEXT:    v_or_b32_e32 v5, v5, v30
; SI-NEXT:    v_and_b32_e32 v6, 0xffff, v6
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v44
; SI-NEXT:    v_or_b32_e32 v16, v16, v29
; SI-NEXT:    v_and_b32_e32 v17, 0xffff, v17
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v34
; SI-NEXT:    v_or_b32_e32 v6, v6, v30
; SI-NEXT:    v_and_b32_e32 v7, 0xffff, v7
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v39
; SI-NEXT:    v_or_b32_e32 v17, v17, v29
; SI-NEXT:    v_and_b32_e32 v18, 0xffff, v18
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v55
; SI-NEXT:    v_or_b32_e32 v7, v7, v30
; SI-NEXT:    v_and_b32_e32 v8, 0xffff, v8
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v43
; SI-NEXT:    v_or_b32_e32 v18, v18, v29
; SI-NEXT:    v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v33
; SI-NEXT:    v_or_b32_e32 v8, v8, v30
; SI-NEXT:    v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v38
; SI-NEXT:    v_or_b32_e32 v19, v19, v29
; SI-NEXT:    v_and_b32_e32 v20, 0xffff, v20
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v54
; SI-NEXT:    v_or_b32_e32 v9, v9, v30
; SI-NEXT:    v_and_b32_e32 v10, 0xffff, v10
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v42
; SI-NEXT:    v_or_b32_e32 v20, v20, v29
; SI-NEXT:    v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v32
; SI-NEXT:    v_or_b32_e32 v10, v10, v30
; SI-NEXT:    v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v37
; SI-NEXT:    v_or_b32_e32 v21, v21, v29
; SI-NEXT:    v_and_b32_e32 v22, 0xffff, v22
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v53
; SI-NEXT:    v_or_b32_e32 v11, v11, v30
; SI-NEXT:    v_and_b32_e32 v12, 0xffff, v12
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v41
; SI-NEXT:    v_or_b32_e32 v22, v22, v29
; SI-NEXT:    v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v31
; SI-NEXT:    v_or_b32_e32 v12, v12, v30
; SI-NEXT:    v_and_b32_e32 v13, 0xffff, v13
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v36
; SI-NEXT:    v_or_b32_e32 v23, v23, v29
; SI-NEXT:    v_and_b32_e32 v24, 0xffff, v24
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v52
; SI-NEXT:    v_or_b32_e32 v13, v13, v30
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v40
; SI-NEXT:    v_or_b32_e32 v24, v24, v29
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v56
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    buffer_load_dword v57, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v56, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; SI-NEXT:    v_and_b32_e32 v14, 0xffff, v14
; SI-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT:    v_or_b32_e32 v14, v14, v30
; SI-NEXT:    v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v35
; SI-NEXT:    v_or_b32_e32 v25, v25, v29
; SI-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; SI-NEXT:    v_lshlrev_b32_e32 v29, 16, v51
; SI-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; SI-NEXT:    v_or_b32_e32 v15, v15, v30
; SI-NEXT:    v_or_b32_e32 v26, v26, v29
; SI-NEXT:    v_or_b32_e32 v27, v27, v28
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v56f16_to_v56i16:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v27
; VI-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; VI-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v25
; VI-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v24
; VI-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v23
; VI-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v22
; VI-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v8
; VI-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v7
; VI-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v6
; VI-NEXT:    v_lshrrev_b32_e32 v35, 16, v21
; VI-NEXT:    v_lshrrev_b32_e32 v36, 16, v20
; VI-NEXT:    v_lshrrev_b32_e32 v37, 16, v19
; VI-NEXT:    v_lshrrev_b32_e32 v38, 16, v18
; VI-NEXT:    v_lshrrev_b32_e32 v39, 16, v17
; VI-NEXT:    v_lshrrev_b32_e32 v48, 16, v16
; VI-NEXT:    v_lshrrev_b32_e32 v49, 16, v15
; VI-NEXT:    v_lshrrev_b32_e32 v50, 16, v14
; VI-NEXT:    v_lshrrev_b32_e32 v51, 16, v13
; VI-NEXT:    v_lshrrev_b32_e32 v52, 16, v12
; VI-NEXT:    v_lshrrev_b32_e32 v53, 16, v11
; VI-NEXT:    v_lshrrev_b32_e32 v54, 16, v10
; VI-NEXT:    v_lshrrev_b32_e32 v55, 16, v9
; VI-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; VI-NEXT:    v_lshrrev_b32_e32 v32, 16, v5
; VI-NEXT:    v_lshrrev_b32_e32 v33, 16, v4
; VI-NEXT:    v_lshrrev_b32_e32 v29, 16, v3
; VI-NEXT:    v_lshrrev_b32_e32 v30, 16, v2
; VI-NEXT:    v_lshrrev_b32_e32 v31, 16, v1
; VI-NEXT:    v_lshrrev_b32_e32 v34, 16, v0
; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; VI-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; VI-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; VI-NEXT:    s_or_saveexec_b64 s[4:5], s[4:5]
; VI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; VI-NEXT:    v_mov_b32_e32 v42, v32
; VI-NEXT:    v_mov_b32_e32 v43, v33
; VI-NEXT:    v_mov_b32_e32 v44, v29
; VI-NEXT:    v_mov_b32_e32 v45, v30
; VI-NEXT:    v_mov_b32_e32 v46, v31
; VI-NEXT:    v_mov_b32_e32 v47, v34
; VI-NEXT:    s_waitcnt vmcnt(2)
; VI-NEXT:    v_mov_b32_e32 v34, v28
; VI-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v29, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v30, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v31, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v32, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v33, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; VI-NEXT:    s_xor_b64 exec, exec, s[4:5]
; VI-NEXT:    s_cbranch_execz .LBB58_2
; VI-NEXT:  ; %bb.1: ; %cmp.true
; VI-NEXT:    v_add_f16_e32 v0, 0x200, v0
; VI-NEXT:    v_add_f16_e32 v47, 0x200, v47
; VI-NEXT:    v_add_f16_e32 v1, 0x200, v1
; VI-NEXT:    v_add_f16_e32 v46, 0x200, v46
; VI-NEXT:    v_add_f16_e32 v2, 0x200, v2
; VI-NEXT:    v_add_f16_e32 v45, 0x200, v45
; VI-NEXT:    v_add_f16_e32 v3, 0x200, v3
; VI-NEXT:    v_add_f16_e32 v44, 0x200, v44
; VI-NEXT:    v_add_f16_e32 v4, 0x200, v4
; VI-NEXT:    v_add_f16_e32 v43, 0x200, v43
; VI-NEXT:    v_add_f16_e32 v5, 0x200, v5
; VI-NEXT:    v_add_f16_e32 v42, 0x200, v42
; VI-NEXT:    v_add_f16_e32 v6, 0x200, v6
; VI-NEXT:    s_waitcnt vmcnt(6)
; VI-NEXT:    v_add_f16_e32 v40, 0x200, v40
; VI-NEXT:    v_add_f16_e32 v7, 0x200, v7
; VI-NEXT:    v_add_f16_e32 v41, 0x200, v41
; VI-NEXT:    v_add_f16_e32 v8, 0x200, v8
; VI-NEXT:    v_add_f16_e32 v34, 0x200, v34
; VI-NEXT:    v_add_f16_e32 v9, 0x200, v9
; VI-NEXT:    v_add_f16_e32 v55, 0x200, v55
; VI-NEXT:    v_add_f16_e32 v10, 0x200, v10
; VI-NEXT:    v_add_f16_e32 v54, 0x200, v54
; VI-NEXT:    v_add_f16_e32 v11, 0x200, v11
; VI-NEXT:    v_add_f16_e32 v53, 0x200, v53
; VI-NEXT:    v_add_f16_e32 v12, 0x200, v12
; VI-NEXT:    v_add_f16_e32 v52, 0x200, v52
; VI-NEXT:    v_add_f16_e32 v13, 0x200, v13
; VI-NEXT:    v_add_f16_e32 v51, 0x200, v51
; VI-NEXT:    v_add_f16_e32 v14, 0x200, v14
; VI-NEXT:    v_add_f16_e32 v50, 0x200, v50
; VI-NEXT:    v_add_f16_e32 v15, 0x200, v15
; VI-NEXT:    v_add_f16_e32 v49, 0x200, v49
; VI-NEXT:    v_add_f16_e32 v16, 0x200, v16
; VI-NEXT:    v_add_f16_e32 v48, 0x200, v48
; VI-NEXT:    v_add_f16_e32 v17, 0x200, v17
; VI-NEXT:    v_add_f16_e32 v39, 0x200, v39
; VI-NEXT:    v_add_f16_e32 v18, 0x200, v18
; VI-NEXT:    v_add_f16_e32 v38, 0x200, v38
; VI-NEXT:    v_add_f16_e32 v19, 0x200, v19
; VI-NEXT:    v_add_f16_e32 v37, 0x200, v37
; VI-NEXT:    v_add_f16_e32 v20, 0x200, v20
; VI-NEXT:    v_add_f16_e32 v36, 0x200, v36
; VI-NEXT:    v_add_f16_e32 v21, 0x200, v21
; VI-NEXT:    v_add_f16_e32 v35, 0x200, v35
; VI-NEXT:    v_add_f16_e32 v22, 0x200, v22
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    v_add_f16_e32 v33, 0x200, v33
; VI-NEXT:    v_add_f16_e32 v23, 0x200, v23
; VI-NEXT:    v_add_f16_e32 v32, 0x200, v32
; VI-NEXT:    v_add_f16_e32 v24, 0x200, v24
; VI-NEXT:    v_add_f16_e32 v31, 0x200, v31
; VI-NEXT:    v_add_f16_e32 v25, 0x200, v25
; VI-NEXT:    v_add_f16_e32 v30, 0x200, v30
; VI-NEXT:    v_add_f16_e32 v26, 0x200, v26
; VI-NEXT:    v_add_f16_e32 v29, 0x200, v29
; VI-NEXT:    v_add_f16_e32 v27, 0x200, v27
; VI-NEXT:    v_add_f16_e32 v28, 0x200, v28
; VI-NEXT:  .LBB58_2: ; %end
; VI-NEXT:    s_or_b64 exec, exec, s[4:5]
; VI-NEXT:    s_waitcnt vmcnt(6)
; VI-NEXT:    v_lshlrev_b32_e32 v40, 16, v40
; VI-NEXT:    v_lshlrev_b32_e32 v47, 16, v47
; VI-NEXT:    v_lshlrev_b32_e32 v46, 16, v46
; VI-NEXT:    v_lshlrev_b32_e32 v45, 16, v45
; VI-NEXT:    v_lshlrev_b32_e32 v44, 16, v44
; VI-NEXT:    v_lshlrev_b32_e32 v43, 16, v43
; VI-NEXT:    v_lshlrev_b32_e32 v42, 16, v42
; VI-NEXT:    v_or_b32_sdwa v6, v6, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v40, 16, v41
; VI-NEXT:    v_or_b32_sdwa v0, v0, v47 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v1, v1, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v2, v2, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v3, v3, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v4, v4, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v5, v5, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v7, v7, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v34
; VI-NEXT:    v_or_b32_sdwa v8, v8, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v55
; VI-NEXT:    v_or_b32_sdwa v9, v9, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v54
; VI-NEXT:    v_or_b32_sdwa v10, v10, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v53
; VI-NEXT:    v_or_b32_sdwa v11, v11, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v52
; VI-NEXT:    v_or_b32_sdwa v12, v12, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v51
; VI-NEXT:    v_or_b32_sdwa v13, v13, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v50
; VI-NEXT:    v_or_b32_sdwa v14, v14, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v49
; VI-NEXT:    v_or_b32_sdwa v15, v15, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v48
; VI-NEXT:    v_or_b32_sdwa v16, v16, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v39
; VI-NEXT:    v_or_b32_sdwa v17, v17, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v38
; VI-NEXT:    v_or_b32_sdwa v18, v18, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v37
; VI-NEXT:    v_or_b32_sdwa v19, v19, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v36
; VI-NEXT:    v_or_b32_sdwa v20, v20, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v35
; VI-NEXT:    s_waitcnt vmcnt(8)
; VI-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; VI-NEXT:    v_lshlrev_b32_e32 v32, 16, v32
; VI-NEXT:    v_lshlrev_b32_e32 v31, 16, v31
; VI-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; VI-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; VI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; VI-NEXT:    v_or_b32_sdwa v21, v21, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v22, v22, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v23, v23, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v24, v24, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v25, v25, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v26, v26, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v56f16_to_v56i16:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v27
; GFX9-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX9-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v25
; GFX9-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v24
; GFX9-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v23
; GFX9-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v22
; GFX9-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v21
; GFX9-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v20
; GFX9-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v19
; GFX9-NEXT:    buffer_store_dword v29, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; GFX9-NEXT:    v_lshrrev_b32_e32 v55, 16, v18
; GFX9-NEXT:    v_lshrrev_b32_e32 v54, 16, v17
; GFX9-NEXT:    v_lshrrev_b32_e32 v53, 16, v16
; GFX9-NEXT:    v_lshrrev_b32_e32 v52, 16, v15
; GFX9-NEXT:    v_lshrrev_b32_e32 v51, 16, v14
; GFX9-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX9-NEXT:    v_lshrrev_b32_e32 v49, 16, v12
; GFX9-NEXT:    v_lshrrev_b32_e32 v48, 16, v11
; GFX9-NEXT:    v_lshrrev_b32_e32 v39, 16, v10
; GFX9-NEXT:    v_lshrrev_b32_e32 v38, 16, v9
; GFX9-NEXT:    v_lshrrev_b32_e32 v37, 16, v8
; GFX9-NEXT:    v_lshrrev_b32_e32 v36, 16, v7
; GFX9-NEXT:    v_lshrrev_b32_e32 v35, 16, v6
; GFX9-NEXT:    v_lshrrev_b32_e32 v34, 16, v5
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v4
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v3
; GFX9-NEXT:    v_lshrrev_b32_e32 v31, 16, v2
; GFX9-NEXT:    v_lshrrev_b32_e32 v30, 16, v1
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v0
; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v28
; GFX9-NEXT:    s_and_saveexec_b64 s[4:5], vcc
; GFX9-NEXT:    s_xor_b64 s[4:5], exec, s[4:5]
; GFX9-NEXT:    s_or_saveexec_b64 s[4:5], s[4:5]
; GFX9-NEXT:    buffer_load_dword v28, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; GFX9-NEXT:    s_xor_b64 exec, exec, s[4:5]
; GFX9-NEXT:    s_cbranch_execz .LBB58_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.true
; GFX9-NEXT:    s_mov_b32 s6, 0x5040100
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    v_perm_b32 v27, v47, v27, s6
; GFX9-NEXT:    s_movk_i32 s7, 0x200
; GFX9-NEXT:    v_perm_b32 v26, v46, v26, s6
; GFX9-NEXT:    v_perm_b32 v25, v45, v25, s6
; GFX9-NEXT:    v_perm_b32 v24, v44, v24, s6
; GFX9-NEXT:    v_perm_b32 v23, v43, v23, s6
; GFX9-NEXT:    v_perm_b32 v22, v42, v22, s6
; GFX9-NEXT:    v_perm_b32 v21, v41, v21, s6
; GFX9-NEXT:    v_perm_b32 v20, v40, v20, s6
; GFX9-NEXT:    v_perm_b32 v19, v28, v19, s6
; GFX9-NEXT:    v_perm_b32 v18, v55, v18, s6
; GFX9-NEXT:    v_perm_b32 v17, v54, v17, s6
; GFX9-NEXT:    v_perm_b32 v16, v53, v16, s6
; GFX9-NEXT:    v_perm_b32 v15, v52, v15, s6
; GFX9-NEXT:    v_perm_b32 v14, v51, v14, s6
; GFX9-NEXT:    v_perm_b32 v13, v50, v13, s6
; GFX9-NEXT:    v_perm_b32 v12, v49, v12, s6
; GFX9-NEXT:    v_perm_b32 v11, v48, v11, s6
; GFX9-NEXT:    v_perm_b32 v10, v39, v10, s6
; GFX9-NEXT:    v_perm_b32 v9, v38, v9, s6
; GFX9-NEXT:    v_perm_b32 v8, v37, v8, s6
; GFX9-NEXT:    v_perm_b32 v7, v36, v7, s6
; GFX9-NEXT:    v_perm_b32 v6, v35, v6, s6
; GFX9-NEXT:    v_perm_b32 v5, v34, v5, s6
; GFX9-NEXT:    v_perm_b32 v4, v33, v4, s6
; GFX9-NEXT:    v_perm_b32 v3, v32, v3, s6
; GFX9-NEXT:    v_perm_b32 v2, v31, v2, s6
; GFX9-NEXT:    v_perm_b32 v1, v30, v1, s6
; GFX9-NEXT:    v_perm_b32 v0, v29, v0, s6
; GFX9-NEXT:    v_pk_add_f16 v27, v27, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v26, v26, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v25, v25, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v24, v24, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v23, v23, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v22, v22, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v21, v21, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v20, v20, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v19, v19, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v18, v18, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v17, v17, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v16, v16, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v15, v15, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v14, v14, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v13, v13, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v12, v12, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v11, v11, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v10, v10, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v9, v9, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v8, v8, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v7, v7, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v6, v6, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v5, v5, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v4, v4, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v3, v3, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v2, v2, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v1, v1, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v0, v0, s7 op_sel_hi:[1,0]
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v0
; GFX9-NEXT:    v_lshrrev_b32_e32 v30, 16, v1
; GFX9-NEXT:    v_lshrrev_b32_e32 v31, 16, v2
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v3
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v4
; GFX9-NEXT:    v_lshrrev_b32_e32 v34, 16, v5
; GFX9-NEXT:    v_lshrrev_b32_e32 v35, 16, v6
; GFX9-NEXT:    v_lshrrev_b32_e32 v36, 16, v7
; GFX9-NEXT:    v_lshrrev_b32_e32 v37, 16, v8
; GFX9-NEXT:    v_lshrrev_b32_e32 v38, 16, v9
; GFX9-NEXT:    v_lshrrev_b32_e32 v39, 16, v10
; GFX9-NEXT:    v_lshrrev_b32_e32 v48, 16, v11
; GFX9-NEXT:    v_lshrrev_b32_e32 v49, 16, v12
; GFX9-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX9-NEXT:    v_lshrrev_b32_e32 v51, 16, v14
; GFX9-NEXT:    v_lshrrev_b32_e32 v52, 16, v15
; GFX9-NEXT:    v_lshrrev_b32_e32 v53, 16, v16
; GFX9-NEXT:    v_lshrrev_b32_e32 v54, 16, v17
; GFX9-NEXT:    v_lshrrev_b32_e32 v55, 16, v18
; GFX9-NEXT:    v_lshrrev_b32_e32 v28, 16, v19
; GFX9-NEXT:    v_lshrrev_b32_e32 v40, 16, v20
; GFX9-NEXT:    v_lshrrev_b32_e32 v41, 16, v21
; GFX9-NEXT:    v_lshrrev_b32_e32 v42, 16, v22
; GFX9-NEXT:    v_lshrrev_b32_e32 v43, 16, v23
; GFX9-NEXT:    v_lshrrev_b32_e32 v44, 16, v24
; GFX9-NEXT:    v_lshrrev_b32_e32 v45, 16, v25
; GFX9-NEXT:    v_lshrrev_b32_e32 v46, 16, v26
; GFX9-NEXT:    v_lshrrev_b32_e32 v47, 16, v27
; GFX9-NEXT:  .LBB58_2: ; %end
; GFX9-NEXT:    s_or_b64 exec, exec, s[4:5]
; GFX9-NEXT:    s_mov_b32 s4, 0x5040100
; GFX9-NEXT:    s_waitcnt vmcnt(7)
; GFX9-NEXT:    v_perm_b32 v20, v40, v20, s4
; GFX9-NEXT:    s_waitcnt vmcnt(6)
; GFX9-NEXT:    v_perm_b32 v21, v41, v21, s4
; GFX9-NEXT:    s_waitcnt vmcnt(5)
; GFX9-NEXT:    v_perm_b32 v22, v42, v22, s4
; GFX9-NEXT:    s_waitcnt vmcnt(4)
; GFX9-NEXT:    v_perm_b32 v23, v43, v23, s4
; GFX9-NEXT:    s_waitcnt vmcnt(3)
; GFX9-NEXT:    v_perm_b32 v24, v44, v24, s4
; GFX9-NEXT:    s_waitcnt vmcnt(2)
; GFX9-NEXT:    v_perm_b32 v25, v45, v25, s4
; GFX9-NEXT:    s_waitcnt vmcnt(1)
; GFX9-NEXT:    v_perm_b32 v26, v46, v26, s4
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    v_perm_b32 v27, v47, v27, s4
; GFX9-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; GFX9-NEXT:    v_perm_b32 v0, v29, v0, s4
; GFX9-NEXT:    v_perm_b32 v1, v30, v1, s4
; GFX9-NEXT:    v_perm_b32 v2, v31, v2, s4
; GFX9-NEXT:    v_perm_b32 v3, v32, v3, s4
; GFX9-NEXT:    v_perm_b32 v4, v33, v4, s4
; GFX9-NEXT:    v_perm_b32 v5, v34, v5, s4
; GFX9-NEXT:    v_perm_b32 v6, v35, v6, s4
; GFX9-NEXT:    v_perm_b32 v7, v36, v7, s4
; GFX9-NEXT:    v_perm_b32 v8, v37, v8, s4
; GFX9-NEXT:    v_perm_b32 v9, v38, v9, s4
; GFX9-NEXT:    v_perm_b32 v10, v39, v10, s4
; GFX9-NEXT:    v_perm_b32 v11, v48, v11, s4
; GFX9-NEXT:    v_perm_b32 v12, v49, v12, s4
; GFX9-NEXT:    v_perm_b32 v13, v50, v13, s4
; GFX9-NEXT:    v_perm_b32 v14, v51, v14, s4
; GFX9-NEXT:    v_perm_b32 v15, v52, v15, s4
; GFX9-NEXT:    v_perm_b32 v16, v53, v16, s4
; GFX9-NEXT:    v_perm_b32 v17, v54, v17, s4
; GFX9-NEXT:    v_perm_b32 v18, v55, v18, s4
; GFX9-NEXT:    v_perm_b32 v19, v28, v19, s4
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-TRUE16-LABEL: bitcast_v56f16_to_v56i16:
; GFX11-TRUE16:       ; %bb.0:
; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-TRUE16-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-TRUE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-TRUE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-TRUE16-NEXT:    s_cbranch_execz .LBB58_2
; GFX11-TRUE16-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v27, v27, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v26, v26, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v25, v25, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v24, v24, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v23, v23, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v22, v22, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v21, v21, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v20, v20, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v19, v19, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v18, v18, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v17, v17, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v16, v16, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v15, v15, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v14, v14, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v13, v13, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v12, v12, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v11, v11, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v10, v10, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v9, v9, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v8, v8, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v7, v7, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v6, v6, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v5, v5, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v4, v4, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v3, v3, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v2, v2, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v1, v1, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v0, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:  .LBB58_2: ; %end
; GFX11-TRUE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v56f16_to_v56i16:
; GFX11-FAKE16:       ; %bb.0:
; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v80, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v3
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v2
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v0
; GFX11-FAKE16-NEXT:    s_mov_b32 s0, exec_lo
; GFX11-FAKE16-NEXT:    v_cmpx_ne_u32_e32 0, v28
; GFX11-FAKE16-NEXT:    s_xor_b32 s0, exec_lo, s0
; GFX11-FAKE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-FAKE16-NEXT:    s_and_not1_saveexec_b32 s0, s0
; GFX11-FAKE16-NEXT:    s_cbranch_execz .LBB58_2
; GFX11-FAKE16-NEXT:  ; %bb.1: ; %cmp.true
; GFX11-FAKE16-NEXT:    v_perm_b32 v27, v80, v27, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v26, v71, v26, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v25, v70, v25, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v24, v69, v24, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v23, v68, v23, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v22, v67, v22, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v21, v66, v21, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v20, v65, v20, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v19, v64, v19, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v18, v55, v18, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v17, v54, v17, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v16, v53, v16, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v15, v52, v15, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v14, v51, v14, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v13, v50, v13, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v12, v49, v12, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v11, v48, v11, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v10, v39, v10, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v9, v38, v9, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v8, v37, v8, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v7, v36, v7, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v6, v35, v6, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v5, v34, v5, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v29, v0, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v1, v30, v1, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v2, v31, v2, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v3, v32, v3, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v4, v33, v4, 0x5040100
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v27, v27, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v26, v26, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v25, v25, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v24, v24, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v23, v23, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v22, v22, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v21, v21, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v20, v20, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v19, v19, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v18, v18, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v17, v17, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v16, v16, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v15, v15, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v14, v14, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v13, v13, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v12, v12, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v11, v11, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v10, v10, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v9, v9, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v8, v8, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v7, v7, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v6, v6, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v5, v5, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v0, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v1, v1, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v2, v2, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v3, v3, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v4, v4, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v0
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v2
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v3
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v23
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v80, 16, v27
; GFX11-FAKE16-NEXT:  .LBB58_2: ; %end
; GFX11-FAKE16-NEXT:    s_or_b32 exec_lo, exec_lo, s0
; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v29, v0, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v1, v30, v1, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v2, v31, v2, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v3, v32, v3, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v4, v33, v4, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v5, v34, v5, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v6, v35, v6, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v7, v36, v7, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v8, v37, v8, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v9, v38, v9, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v10, v39, v10, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v11, v48, v11, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v12, v49, v12, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v13, v50, v13, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v14, v51, v14, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v15, v52, v15, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v16, v53, v16, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v17, v54, v17, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v18, v55, v18, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v19, v64, v19, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v20, v65, v20, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v21, v66, v21, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v22, v67, v22, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v23, v68, v23, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v24, v69, v24, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v25, v70, v25, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v26, v71, v26, 0x5040100
; GFX11-FAKE16-NEXT:    v_perm_b32 v27, v80, v27, 0x5040100
; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = fadd <56 x half> %a, splat (half 0xH0200)
  %a2 = bitcast <56 x half> %a1 to <56 x i16>
  br label %end

cmp.false:
  %a3 = bitcast <56 x half> %a to <56 x i16>
  br label %end

end:
  %phi = phi <56 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <56 x i16> %phi
}

define inreg <56 x i16> @bitcast_v56f16_to_v56i16_scalar(<56 x half> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v56f16_to_v56i16_scalar:
; SI:       ; %bb.0:
; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; SI-NEXT:    buffer_store_dword v63, off, s[0:3], s32 ; 4-byte Folded Spill
; SI-NEXT:    v_readfirstlane_b32 s13, v13
; SI-NEXT:    v_readfirstlane_b32 s4, v12
; SI-NEXT:    v_readfirstlane_b32 s14, v11
; SI-NEXT:    v_readfirstlane_b32 s5, v10
; SI-NEXT:    v_readfirstlane_b32 s41, v9
; SI-NEXT:    v_readfirstlane_b32 s6, v8
; SI-NEXT:    v_readfirstlane_b32 s45, v7
; SI-NEXT:    v_readfirstlane_b32 s7, v6
; SI-NEXT:    v_readfirstlane_b32 s47, v5
; SI-NEXT:    v_readfirstlane_b32 s8, v4
; SI-NEXT:    v_readfirstlane_b32 s58, v3
; SI-NEXT:    v_readfirstlane_b32 s9, v2
; SI-NEXT:    v_readfirstlane_b32 s60, v1
; SI-NEXT:    v_readfirstlane_b32 s10, v0
; SI-NEXT:    s_lshr_b32 s74, s29, 16
; SI-NEXT:    s_lshr_b32 s77, s28, 16
; SI-NEXT:    s_lshr_b32 s73, s27, 16
; SI-NEXT:    s_lshr_b32 s78, s26, 16
; SI-NEXT:    s_lshr_b32 s72, s25, 16
; SI-NEXT:    s_lshr_b32 s88, s24, 16
; SI-NEXT:    s_lshr_b32 s63, s23, 16
; SI-NEXT:    s_lshr_b32 s90, s22, 16
; SI-NEXT:    s_lshr_b32 s62, s21, 16
; SI-NEXT:    s_lshr_b32 s91, s20, 16
; SI-NEXT:    s_lshr_b32 s61, s19, 16
; SI-NEXT:    s_lshr_b32 s92, s18, 16
; SI-NEXT:    s_lshr_b32 s59, s17, 16
; SI-NEXT:    s_lshr_b32 s93, s16, 16
; SI-NEXT:    s_lshr_b32 s40, s13, 16
; SI-NEXT:    s_lshr_b32 s11, s4, 16
; SI-NEXT:    s_lshr_b32 s43, s14, 16
; SI-NEXT:    s_lshr_b32 s12, s5, 16
; SI-NEXT:    s_lshr_b32 s46, s41, 16
; SI-NEXT:    s_lshr_b32 s15, s6, 16
; SI-NEXT:    s_lshr_b32 s56, s45, 16
; SI-NEXT:    s_lshr_b32 s42, s7, 16
; SI-NEXT:    s_lshr_b32 s57, s47, 16
; SI-NEXT:    s_lshr_b32 s44, s8, 16
; SI-NEXT:    s_lshr_b32 s76, s58, 16
; SI-NEXT:    s_lshr_b32 s79, s9, 16
; SI-NEXT:    s_lshr_b32 s75, s60, 16
; SI-NEXT:    s_lshr_b32 s89, s10, 16
; SI-NEXT:    v_readfirstlane_b32 s94, v14
; SI-NEXT:    s_cmp_lg_u32 s94, 0
; SI-NEXT:    s_cbranch_scc0 .LBB59_2
; SI-NEXT:  ; %bb.1: ; %cmp.false
; SI-NEXT:    v_mov_b32_e32 v29, s40
; SI-NEXT:    v_mov_b32_e32 v32, s43
; SI-NEXT:    v_mov_b32_e32 v24, s46
; SI-NEXT:    v_mov_b32_e32 v22, s56
; SI-NEXT:    v_mov_b32_e32 v20, s57
; SI-NEXT:    v_mov_b32_e32 v18, s76
; SI-NEXT:    v_mov_b32_e32 v16, s75
; SI-NEXT:    v_mov_b32_e32 v14, s74
; SI-NEXT:    v_mov_b32_e32 v12, s73
; SI-NEXT:    v_mov_b32_e32 v10, s72
; SI-NEXT:    v_mov_b32_e32 v8, s63
; SI-NEXT:    v_mov_b32_e32 v6, s62
; SI-NEXT:    v_mov_b32_e32 v4, s61
; SI-NEXT:    v_mov_b32_e32 v2, s59
; SI-NEXT:    v_mov_b32_e32 v1, s17
; SI-NEXT:    v_mov_b32_e32 v7, s19
; SI-NEXT:    v_mov_b32_e32 v5, s21
; SI-NEXT:    v_mov_b32_e32 v34, s23
; SI-NEXT:    v_mov_b32_e32 v9, s25
; SI-NEXT:    v_mov_b32_e32 v11, s27
; SI-NEXT:    v_mov_b32_e32 v13, s29
; SI-NEXT:    v_mov_b32_e32 v15, s60
; SI-NEXT:    v_mov_b32_e32 v17, s58
; SI-NEXT:    v_mov_b32_e32 v19, s47
; SI-NEXT:    v_mov_b32_e32 v21, s45
; SI-NEXT:    v_mov_b32_e32 v23, s41
; SI-NEXT:    v_mov_b32_e32 v25, s14
; SI-NEXT:    v_mov_b32_e32 v27, s13
; SI-NEXT:    v_mov_b32_e32 v43, s4
; SI-NEXT:    v_mov_b32_e32 v31, s5
; SI-NEXT:    v_mov_b32_e32 v33, s6
; SI-NEXT:    v_mov_b32_e32 v35, s7
; SI-NEXT:    v_mov_b32_e32 v37, s8
; SI-NEXT:    v_mov_b32_e32 v39, s9
; SI-NEXT:    v_mov_b32_e32 v49, s10
; SI-NEXT:    v_mov_b32_e32 v51, s28
; SI-NEXT:    v_mov_b32_e32 v53, s26
; SI-NEXT:    v_mov_b32_e32 v55, s24
; SI-NEXT:    v_mov_b32_e32 v41, s22
; SI-NEXT:    v_mov_b32_e32 v45, s20
; SI-NEXT:    v_mov_b32_e32 v47, s18
; SI-NEXT:    v_mov_b32_e32 v0, s16
; SI-NEXT:    v_mov_b32_e32 v46, s93
; SI-NEXT:    v_mov_b32_e32 v44, s92
; SI-NEXT:    v_mov_b32_e32 v42, s91
; SI-NEXT:    v_mov_b32_e32 v40, s90
; SI-NEXT:    v_mov_b32_e32 v54, s88
; SI-NEXT:    v_mov_b32_e32 v52, s78
; SI-NEXT:    v_mov_b32_e32 v50, s77
; SI-NEXT:    v_mov_b32_e32 v48, s89
; SI-NEXT:    v_mov_b32_e32 v38, s79
; SI-NEXT:    s_waitcnt expcnt(2)
; SI-NEXT:    v_mov_b32_e32 v61, s44
; SI-NEXT:    s_waitcnt expcnt(1)
; SI-NEXT:    v_mov_b32_e32 v62, s42
; SI-NEXT:    v_mov_b32_e32 v56, s15
; SI-NEXT:    v_mov_b32_e32 v57, s12
; SI-NEXT:    v_mov_b32_e32 v28, s11
; SI-NEXT:    s_branch .LBB59_3
; SI-NEXT:  .LBB59_2: ; %cmp.true
; SI-NEXT:    v_cvt_f32_f16_e32 v1, s92
; SI-NEXT:    v_cvt_f32_f16_e32 v2, s91
; SI-NEXT:    v_cvt_f32_f16_e32 v3, s90
; SI-NEXT:    v_cvt_f32_f16_e32 v5, s77
; SI-NEXT:    v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT:    v_add_f32_e32 v2, 0x38000000, v2
; SI-NEXT:    v_cvt_f16_f32_e32 v1, v1
; SI-NEXT:    v_cvt_f16_f32_e32 v4, v2
; SI-NEXT:    v_add_f32_e32 v2, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v3, v2
; SI-NEXT:    v_lshlrev_b32_e32 v6, 16, v1
; SI-NEXT:    v_cvt_f32_f16_e32 v1, s88
; SI-NEXT:    v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT:    v_lshlrev_b32_e32 v40, 16, v3
; SI-NEXT:    v_cvt_f32_f16_e32 v3, s78
; SI-NEXT:    v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT:    v_cvt_f16_f32_e32 v1, v1
; SI-NEXT:    v_cvt_f16_f32_e32 v5, v5
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v3, v3
; SI-NEXT:    v_lshlrev_b32_e32 v8, 16, v1
; SI-NEXT:    v_cvt_f32_f16_e32 v1, s89
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v5
; SI-NEXT:    v_lshlrev_b32_e32 v10, 16, v3
; SI-NEXT:    v_cvt_f32_f16_e32 v3, s79
; SI-NEXT:    v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT:    v_cvt_f16_f32_e32 v14, v1
; SI-NEXT:    v_cvt_f32_f16_e32 v1, s76
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v16, v3
; SI-NEXT:    v_cvt_f32_f16_e32 v3, s74
; SI-NEXT:    v_cvt_f32_f16_e32 v5, s29
; SI-NEXT:    v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT:    v_cvt_f16_f32_e32 v2, v1
; SI-NEXT:    v_add_f32_e32 v1, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v7, v1
; SI-NEXT:    v_add_f32_e32 v1, 0x38000000, v5
; SI-NEXT:    v_cvt_f16_f32_e32 v1, v1
; SI-NEXT:    v_cvt_f32_f16_e32 v3, s73
; SI-NEXT:    v_lshlrev_b32_e32 v5, 16, v7
; SI-NEXT:    buffer_store_dword v7, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
; SI-NEXT:    v_or_b32_e32 v29, v1, v5
; SI-NEXT:    v_cvt_f32_f16_e32 v1, s27
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT:    v_cvt_f32_f16_e32 v5, s72
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_cvt_f16_f32_e32 v7, v3
; SI-NEXT:    v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT:    v_cvt_f16_f32_e32 v1, v1
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v5
; SI-NEXT:    v_cvt_f16_f32_e32 v9, v3
; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v7
; SI-NEXT:    v_cvt_f32_f16_e32 v5, s25
; SI-NEXT:    v_or_b32_e32 v11, v1, v3
; SI-NEXT:    v_cvt_f32_f16_e32 v3, s63
; SI-NEXT:    buffer_store_dword v7, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_cvt_f32_f16_e32 v7, s23
; SI-NEXT:    v_add_f32_e32 v5, 0x38000000, v5
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v5, v5
; SI-NEXT:    v_cvt_f16_f32_e32 v58, v3
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v7
; SI-NEXT:    v_cvt_f16_f32_e32 v3, v3
; SI-NEXT:    v_lshlrev_b32_e32 v1, 16, v9
; SI-NEXT:    buffer_store_dword v9, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_or_b32_e32 v9, v5, v1
; SI-NEXT:    v_cvt_f32_f16_e32 v1, s62
; SI-NEXT:    v_lshlrev_b32_e32 v5, 16, v58
; SI-NEXT:    v_or_b32_e32 v41, v3, v5
; SI-NEXT:    v_cvt_f32_f16_e32 v3, s21
; SI-NEXT:    v_add_f32_e32 v1, 0x38000000, v1
; SI-NEXT:    v_cvt_f32_f16_e32 v5, s61
; SI-NEXT:    v_cvt_f16_f32_e32 v12, v1
; SI-NEXT:    v_add_f32_e32 v1, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v1, v1
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v5
; SI-NEXT:    v_cvt_f16_f32_e32 v34, v3
; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v12
; SI-NEXT:    v_cvt_f32_f16_e32 v17, s19
; SI-NEXT:    v_or_b32_e32 v5, v1, v3
; SI-NEXT:    v_cvt_f32_f16_e32 v3, s59
; SI-NEXT:    v_cvt_f32_f16_e32 v18, s17
; SI-NEXT:    v_add_f32_e32 v17, 0x38000000, v17
; SI-NEXT:    v_cvt_f16_f32_e32 v17, v17
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v3
; SI-NEXT:    v_cvt_f16_f32_e32 v36, v3
; SI-NEXT:    v_add_f32_e32 v3, 0x38000000, v18
; SI-NEXT:    v_cvt_f16_f32_e32 v18, v3
; SI-NEXT:    v_cvt_f32_f16_e32 v15, s75
; SI-NEXT:    v_lshlrev_b32_e32 v1, 16, v34
; SI-NEXT:    v_or_b32_e32 v7, v17, v1
; SI-NEXT:    v_cvt_f32_f16_e32 v17, s60
; SI-NEXT:    v_lshlrev_b32_e32 v1, 16, v36
; SI-NEXT:    v_or_b32_e32 v1, v18, v1
; SI-NEXT:    v_cvt_f32_f16_e32 v18, s58
; SI-NEXT:    v_add_f32_e32 v15, 0x38000000, v15
; SI-NEXT:    v_cvt_f16_f32_e32 v56, v15
; SI-NEXT:    v_add_f32_e32 v15, 0x38000000, v17
; SI-NEXT:    v_cvt_f16_f32_e32 v15, v15
; SI-NEXT:    v_add_f32_e32 v17, 0x38000000, v18
; SI-NEXT:    v_cvt_f16_f32_e32 v17, v17
; SI-NEXT:    v_lshlrev_b32_e32 v18, 16, v56
; SI-NEXT:    v_or_b32_e32 v15, v15, v18
; SI-NEXT:    v_lshlrev_b32_e32 v18, 16, v2
; SI-NEXT:    v_or_b32_e32 v17, v17, v18
; SI-NEXT:    v_cvt_f32_f16_e32 v18, s57
; SI-NEXT:    v_cvt_f32_f16_e32 v19, s47
; SI-NEXT:    v_cvt_f32_f16_e32 v20, s44
; SI-NEXT:    v_cvt_f32_f16_e32 v22, s56
; SI-NEXT:    v_add_f32_e32 v18, 0x38000000, v18
; SI-NEXT:    v_cvt_f16_f32_e32 v57, v18
; SI-NEXT:    v_add_f32_e32 v18, 0x38000000, v19
; SI-NEXT:    v_add_f32_e32 v19, 0x38000000, v20
; SI-NEXT:    v_cvt_f16_f32_e32 v18, v18
; SI-NEXT:    v_cvt_f16_f32_e32 v20, v19
; SI-NEXT:    v_lshlrev_b32_e32 v19, 16, v57
; SI-NEXT:    v_cvt_f32_f16_e32 v21, s42
; SI-NEXT:    v_or_b32_e32 v19, v18, v19
; SI-NEXT:    v_lshlrev_b32_e32 v18, 16, v20
; SI-NEXT:    v_cvt_f32_f16_e32 v20, s45
; SI-NEXT:    v_add_f32_e32 v22, 0x38000000, v22
; SI-NEXT:    v_cvt_f16_f32_e32 v59, v22
; SI-NEXT:    v_add_f32_e32 v21, 0x38000000, v21
; SI-NEXT:    v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT:    v_cvt_f16_f32_e32 v20, v20
; SI-NEXT:    v_cvt_f16_f32_e32 v22, v21
; SI-NEXT:    v_lshlrev_b32_e32 v21, 16, v59
; SI-NEXT:    v_cvt_f32_f16_e32 v24, s46
; SI-NEXT:    v_or_b32_e32 v21, v20, v21
; SI-NEXT:    v_cvt_f32_f16_e32 v20, s41
; SI-NEXT:    v_cvt_f32_f16_e32 v23, s15
; SI-NEXT:    v_add_f32_e32 v24, 0x38000000, v24
; SI-NEXT:    v_cvt_f16_f32_e32 v60, v24
; SI-NEXT:    v_add_f32_e32 v20, 0x38000000, v20
; SI-NEXT:    v_add_f32_e32 v23, 0x38000000, v23
; SI-NEXT:    v_cvt_f16_f32_e32 v24, v20
; SI-NEXT:    v_cvt_f16_f32_e32 v25, v23
; SI-NEXT:    v_lshlrev_b32_e32 v20, 16, v22
; SI-NEXT:    v_lshlrev_b32_e32 v22, 16, v60
; SI-NEXT:    v_or_b32_e32 v23, v24, v22
; SI-NEXT:    v_cvt_f32_f16_e32 v24, s43
; SI-NEXT:    v_lshlrev_b32_e32 v22, 16, v25
; SI-NEXT:    v_cvt_f32_f16_e32 v25, s14
; SI-NEXT:    v_cvt_f32_f16_e32 v26, s12
; SI-NEXT:    v_add_f32_e32 v24, 0x38000000, v24
; SI-NEXT:    v_cvt_f16_f32_e32 v32, v24
; SI-NEXT:    v_add_f32_e32 v24, 0x38000000, v25
; SI-NEXT:    v_add_f32_e32 v25, 0x38000000, v26
; SI-NEXT:    v_cvt_f16_f32_e32 v24, v24
; SI-NEXT:    v_cvt_f16_f32_e32 v26, v25
; SI-NEXT:    v_lshlrev_b32_e32 v25, 16, v32
; SI-NEXT:    v_cvt_f32_f16_e32 v37, s40
; SI-NEXT:    v_or_b32_e32 v25, v24, v25
; SI-NEXT:    v_lshlrev_b32_e32 v24, 16, v26
; SI-NEXT:    v_cvt_f32_f16_e32 v26, s13
; SI-NEXT:    v_cvt_f32_f16_e32 v27, s11
; SI-NEXT:    v_add_f32_e32 v37, 0x38000000, v37
; SI-NEXT:    v_cvt_f16_f32_e32 v30, v37
; SI-NEXT:    v_add_f32_e32 v26, 0x38000000, v26
; SI-NEXT:    v_cvt_f16_f32_e32 v26, v26
; SI-NEXT:    v_cvt_f32_f16_e32 v38, s16
; SI-NEXT:    v_add_f32_e32 v27, 0x38000000, v27
; SI-NEXT:    v_cvt_f32_f16_e32 v39, s18
; SI-NEXT:    v_cvt_f16_f32_e32 v37, v27
; SI-NEXT:    v_lshlrev_b32_e32 v27, 16, v30
; SI-NEXT:    v_or_b32_e32 v27, v26, v27
; SI-NEXT:    v_add_f32_e32 v26, 0x38000000, v38
; SI-NEXT:    v_cvt_f16_f32_e32 v38, v26
; SI-NEXT:    v_add_f32_e32 v26, 0x38000000, v39
; SI-NEXT:    v_cvt_f16_f32_e32 v39, v26
; SI-NEXT:    v_lshlrev_b32_e32 v26, 16, v37
; SI-NEXT:    v_cvt_f32_f16_e32 v37, s20
; SI-NEXT:    v_cvt_f32_f16_e32 v52, s10
; SI-NEXT:    v_cvt_f32_f16_e32 v53, s9
; SI-NEXT:    v_cvt_f32_f16_e32 v54, s8
; SI-NEXT:    v_cvt_f32_f16_e32 v51, s28
; SI-NEXT:    v_add_f32_e32 v37, 0x38000000, v37
; SI-NEXT:    v_add_f32_e32 v52, 0x38000000, v52
; SI-NEXT:    v_add_f32_e32 v53, 0x38000000, v53
; SI-NEXT:    v_add_f32_e32 v54, 0x38000000, v54
; SI-NEXT:    v_cvt_f16_f32_e32 v37, v37
; SI-NEXT:    v_add_f32_e32 v51, 0x38000000, v51
; SI-NEXT:    v_cvt_f16_f32_e32 v52, v52
; SI-NEXT:    v_cvt_f16_f32_e32 v53, v53
; SI-NEXT:    v_cvt_f16_f32_e32 v54, v54
; SI-NEXT:    v_cvt_f16_f32_e32 v51, v51
; SI-NEXT:    v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT:    v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT:    v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT:    v_cvt_f32_f16_e32 v48, s22
; SI-NEXT:    v_cvt_f32_f16_e32 v49, s24
; SI-NEXT:    v_cvt_f32_f16_e32 v50, s26
; SI-NEXT:    v_or_b32_e32 v55, v37, v4
; SI-NEXT:    v_or_b32_e32 v62, v52, v14
; SI-NEXT:    v_or_b32_e32 v63, v53, v16
; SI-NEXT:    v_or_b32_e32 v37, v54, v18
; SI-NEXT:    v_cvt_f32_f16_e32 v52, s6
; SI-NEXT:    v_cvt_f32_f16_e32 v53, s5
; SI-NEXT:    v_cvt_f32_f16_e32 v54, s4
; SI-NEXT:    v_or_b32_e32 v61, v51, v28
; SI-NEXT:    v_cvt_f32_f16_e32 v51, s7
; SI-NEXT:    v_add_f32_e32 v48, 0x38000000, v48
; SI-NEXT:    v_add_f32_e32 v49, 0x38000000, v49
; SI-NEXT:    v_add_f32_e32 v50, 0x38000000, v50
; SI-NEXT:    v_add_f32_e32 v52, 0x38000000, v52
; SI-NEXT:    v_add_f32_e32 v53, 0x38000000, v53
; SI-NEXT:    v_add_f32_e32 v54, 0x38000000, v54
; SI-NEXT:    v_cvt_f16_f32_e32 v48, v48
; SI-NEXT:    v_cvt_f16_f32_e32 v49, v49
; SI-NEXT:    v_cvt_f16_f32_e32 v50, v50
; SI-NEXT:    v_add_f32_e32 v51, 0x38000000, v51
; SI-NEXT:    v_cvt_f16_f32_e32 v52, v52
; SI-NEXT:    v_cvt_f16_f32_e32 v53, v53
; SI-NEXT:    v_cvt_f16_f32_e32 v54, v54
; SI-NEXT:    v_cvt_f16_f32_e32 v51, v51
; SI-NEXT:    v_lshr_b64 v[44:45], v[6:7], 16
; SI-NEXT:    v_lshr_b64 v[42:43], v[4:5], 16
; SI-NEXT:    v_mov_b32_e32 v4, v34
; SI-NEXT:    v_mov_b32_e32 v33, v40
; SI-NEXT:    v_mov_b32_e32 v34, v41
; SI-NEXT:    v_or_b32_e32 v48, v48, v40
; SI-NEXT:    v_or_b32_e32 v49, v49, v8
; SI-NEXT:    v_or_b32_e32 v50, v50, v10
; SI-NEXT:    v_or_b32_e32 v13, v52, v22
; SI-NEXT:    v_or_b32_e32 v31, v53, v24
; SI-NEXT:    v_or_b32_e32 v3, v54, v26
; SI-NEXT:    v_mov_b32_e32 v45, v55
; SI-NEXT:    v_lshr_b64 v[40:41], v[33:34], 16
; SI-NEXT:    v_lshr_b64 v[54:55], v[8:9], 16
; SI-NEXT:    v_lshr_b64 v[52:53], v[10:11], 16
; SI-NEXT:    buffer_store_dword v2, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
; SI-NEXT:    v_or_b32_e32 v35, v51, v20
; SI-NEXT:    v_mov_b32_e32 v41, v48
; SI-NEXT:    v_mov_b32_e32 v55, v49
; SI-NEXT:    v_mov_b32_e32 v53, v50
; SI-NEXT:    v_lshr_b64 v[50:51], v[28:29], 16
; SI-NEXT:    v_lshr_b64 v[48:49], v[14:15], 16
; SI-NEXT:    v_or_b32_e32 v39, v39, v6
; SI-NEXT:    v_mov_b32_e32 v6, v12
; SI-NEXT:    buffer_load_dword v10, off, s[0:3], s32 offset:72 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v14, off, s[0:3], s32 offset:64 ; 4-byte Folded Reload
; SI-NEXT:    v_mov_b32_e32 v51, v61
; SI-NEXT:    v_mov_b32_e32 v49, v62
; SI-NEXT:    v_lshr_b64 v[61:62], v[18:19], 16
; SI-NEXT:    buffer_load_dword v18, off, s[0:3], s32 offset:76 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v12, off, s[0:3], s32 offset:68 ; 4-byte Folded Reload
; SI-NEXT:    v_cvt_f32_f16_e32 v0, s93
; SI-NEXT:    v_mov_b32_e32 v33, v13
; SI-NEXT:    v_mov_b32_e32 v13, v29
; SI-NEXT:    v_lshr_b64 v[28:29], v[26:27], 16
; SI-NEXT:    v_add_f32_e32 v0, 0x38000000, v0
; SI-NEXT:    v_cvt_f16_f32_e32 v0, v0
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    v_mov_b32_e32 v2, v36
; SI-NEXT:    v_mov_b32_e32 v8, v58
; SI-NEXT:    v_mov_b32_e32 v43, v3
; SI-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
; SI-NEXT:    v_or_b32_e32 v38, v38, v0
; SI-NEXT:    v_lshr_b64 v[46:47], v[0:1], 16
; SI-NEXT:    v_mov_b32_e32 v0, v38
; SI-NEXT:    v_mov_b32_e32 v47, v39
; SI-NEXT:    v_lshr_b64 v[38:39], v[16:17], 16
; SI-NEXT:    v_mov_b32_e32 v39, v63
; SI-NEXT:    v_mov_b32_e32 v16, v56
; SI-NEXT:    v_lshr_b64 v[62:63], v[20:21], 16
; SI-NEXT:    v_mov_b32_e32 v20, v57
; SI-NEXT:    v_lshr_b64 v[56:57], v[22:23], 16
; SI-NEXT:    v_mov_b32_e32 v22, v59
; SI-NEXT:    v_lshr_b64 v[57:58], v[24:25], 16
; SI-NEXT:    v_mov_b32_e32 v24, v60
; SI-NEXT:    v_mov_b32_e32 v29, v30
; SI-NEXT:  .LBB59_3: ; %end
; SI-NEXT:    v_lshlrev_b32_e32 v3, 16, v46
; SI-NEXT:    v_and_b32_e32 v0, 0xffff, v0
; SI-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT:    v_or_b32_e32 v0, v0, v3
; SI-NEXT:    v_or_b32_e32 v1, v1, v2
; SI-NEXT:    v_lshlrev_b32_e32 v2, 16, v44
; SI-NEXT:    v_and_b32_e32 v3, 0xffff, v47
; SI-NEXT:    v_or_b32_e32 v2, v3, v2
; SI-NEXT:    v_and_b32_e32 v3, 0xffff, v7
; SI-NEXT:    v_lshlrev_b32_e32 v4, 16, v4
; SI-NEXT:    v_or_b32_e32 v3, v3, v4
; SI-NEXT:    v_lshlrev_b32_e32 v4, 16, v42
; SI-NEXT:    v_and_b32_e32 v7, 0xffff, v45
; SI-NEXT:    v_and_b32_e32 v5, 0xffff, v5
; SI-NEXT:    v_lshlrev_b32_e32 v6, 16, v6
; SI-NEXT:    v_or_b32_e32 v4, v7, v4
; SI-NEXT:    v_or_b32_e32 v5, v5, v6
; SI-NEXT:    v_lshlrev_b32_e32 v6, 16, v40
; SI-NEXT:    v_and_b32_e32 v7, 0xffff, v41
; SI-NEXT:    v_or_b32_e32 v6, v7, v6
; SI-NEXT:    v_and_b32_e32 v7, 0xffff, v34
; SI-NEXT:    v_lshlrev_b32_e32 v8, 16, v8
; SI-NEXT:    v_or_b32_e32 v7, v7, v8
; SI-NEXT:    v_lshlrev_b32_e32 v8, 16, v54
; SI-NEXT:    v_and_b32_e32 v30, 0xffff, v55
; SI-NEXT:    v_and_b32_e32 v9, 0xffff, v9
; SI-NEXT:    s_waitcnt vmcnt(3)
; SI-NEXT:    v_lshlrev_b32_e32 v10, 16, v10
; SI-NEXT:    v_or_b32_e32 v8, v30, v8
; SI-NEXT:    v_or_b32_e32 v9, v9, v10
; SI-NEXT:    v_lshlrev_b32_e32 v10, 16, v52
; SI-NEXT:    v_and_b32_e32 v30, 0xffff, v53
; SI-NEXT:    v_and_b32_e32 v11, 0xffff, v11
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    v_lshlrev_b32_e32 v12, 16, v12
; SI-NEXT:    v_or_b32_e32 v10, v30, v10
; SI-NEXT:    v_or_b32_e32 v11, v11, v12
; SI-NEXT:    v_and_b32_e32 v12, 0xffff, v51
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v50
; SI-NEXT:    v_and_b32_e32 v13, 0xffff, v13
; SI-NEXT:    v_lshlrev_b32_e32 v14, 16, v14
; SI-NEXT:    v_or_b32_e32 v12, v12, v30
; SI-NEXT:    v_or_b32_e32 v13, v13, v14
; SI-NEXT:    v_and_b32_e32 v14, 0xffff, v49
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v48
; SI-NEXT:    v_and_b32_e32 v15, 0xffff, v15
; SI-NEXT:    v_lshlrev_b32_e32 v16, 16, v16
; SI-NEXT:    v_or_b32_e32 v14, v14, v30
; SI-NEXT:    v_or_b32_e32 v15, v15, v16
; SI-NEXT:    v_and_b32_e32 v16, 0xffff, v39
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v38
; SI-NEXT:    v_and_b32_e32 v17, 0xffff, v17
; SI-NEXT:    v_lshlrev_b32_e32 v18, 16, v18
; SI-NEXT:    v_or_b32_e32 v16, v16, v30
; SI-NEXT:    v_or_b32_e32 v17, v17, v18
; SI-NEXT:    v_and_b32_e32 v18, 0xffff, v37
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v61
; SI-NEXT:    v_and_b32_e32 v19, 0xffff, v19
; SI-NEXT:    v_lshlrev_b32_e32 v20, 16, v20
; SI-NEXT:    v_or_b32_e32 v18, v18, v30
; SI-NEXT:    v_or_b32_e32 v19, v19, v20
; SI-NEXT:    v_and_b32_e32 v20, 0xffff, v35
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v62
; SI-NEXT:    v_and_b32_e32 v21, 0xffff, v21
; SI-NEXT:    v_lshlrev_b32_e32 v22, 16, v22
; SI-NEXT:    v_or_b32_e32 v20, v20, v30
; SI-NEXT:    v_or_b32_e32 v21, v21, v22
; SI-NEXT:    v_and_b32_e32 v22, 0xffff, v33
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v56
; SI-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; SI-NEXT:    v_lshlrev_b32_e32 v26, 16, v32
; SI-NEXT:    v_or_b32_e32 v22, v22, v30
; SI-NEXT:    v_lshlrev_b32_e32 v30, 16, v57
; SI-NEXT:    v_or_b32_e32 v25, v25, v26
; SI-NEXT:    v_and_b32_e32 v26, 0xffff, v43
; SI-NEXT:    s_waitcnt expcnt(0)
; SI-NEXT:    buffer_load_dword v63, off, s[0:3], s32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v62, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v61, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v60, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v59, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v58, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v57, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v56, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:36 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:40 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:44 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:48 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:52 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:56 ; 4-byte Folded Reload
; SI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:60 ; 4-byte Folded Reload
; SI-NEXT:    v_and_b32_e32 v23, 0xffff, v23
; SI-NEXT:    v_lshlrev_b32_e32 v24, 16, v24
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; SI-NEXT:    v_or_b32_e32 v23, v23, v24
; SI-NEXT:    v_and_b32_e32 v24, 0xffff, v31
; SI-NEXT:    v_or_b32_e32 v26, v26, v28
; SI-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; SI-NEXT:    v_lshlrev_b32_e32 v28, 16, v29
; SI-NEXT:    v_or_b32_e32 v24, v24, v30
; SI-NEXT:    v_or_b32_e32 v27, v27, v28
; SI-NEXT:    s_waitcnt vmcnt(0)
; SI-NEXT:    s_setpc_b64 s[30:31]
;
; VI-LABEL: bitcast_v56f16_to_v56i16_scalar:
; VI:       ; %bb.0:
; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT:    s_or_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_store_dword v56, off, s[0:3], s32 offset:32 ; 4-byte Folded Spill
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; VI-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; VI-NEXT:    v_writelane_b32 v56, s30, 0
; VI-NEXT:    v_writelane_b32 v56, s31, 1
; VI-NEXT:    v_readfirstlane_b32 s42, v13
; VI-NEXT:    v_readfirstlane_b32 s44, v12
; VI-NEXT:    v_readfirstlane_b32 s46, v11
; VI-NEXT:    v_readfirstlane_b32 s56, v10
; VI-NEXT:    v_readfirstlane_b32 s58, v9
; VI-NEXT:    v_readfirstlane_b32 s60, v8
; VI-NEXT:    v_readfirstlane_b32 s62, v7
; VI-NEXT:    v_readfirstlane_b32 s72, v6
; VI-NEXT:    v_readfirstlane_b32 s74, v5
; VI-NEXT:    v_readfirstlane_b32 s76, v4
; VI-NEXT:    v_readfirstlane_b32 s78, v3
; VI-NEXT:    v_readfirstlane_b32 s88, v2
; VI-NEXT:    v_readfirstlane_b32 s90, v1
; VI-NEXT:    v_readfirstlane_b32 vcc_lo, v0
; VI-NEXT:    s_lshr_b32 s4, s29, 16
; VI-NEXT:    s_lshr_b32 s5, s28, 16
; VI-NEXT:    s_lshr_b32 s6, s27, 16
; VI-NEXT:    s_lshr_b32 s7, s26, 16
; VI-NEXT:    s_lshr_b32 s8, s25, 16
; VI-NEXT:    s_lshr_b32 s9, s24, 16
; VI-NEXT:    s_lshr_b32 s10, s23, 16
; VI-NEXT:    s_lshr_b32 s11, s22, 16
; VI-NEXT:    s_lshr_b32 s12, s21, 16
; VI-NEXT:    s_lshr_b32 s13, s20, 16
; VI-NEXT:    s_lshr_b32 s14, s19, 16
; VI-NEXT:    s_lshr_b32 s15, s18, 16
; VI-NEXT:    s_lshr_b32 s40, s17, 16
; VI-NEXT:    s_lshr_b32 s41, s16, 16
; VI-NEXT:    s_lshr_b32 s43, s42, 16
; VI-NEXT:    s_lshr_b32 s45, s44, 16
; VI-NEXT:    s_lshr_b32 s47, s46, 16
; VI-NEXT:    s_lshr_b32 s57, s56, 16
; VI-NEXT:    s_lshr_b32 s59, s58, 16
; VI-NEXT:    s_lshr_b32 s61, s60, 16
; VI-NEXT:    s_lshr_b32 s63, s62, 16
; VI-NEXT:    s_lshr_b32 s73, s72, 16
; VI-NEXT:    s_lshr_b32 s75, s74, 16
; VI-NEXT:    s_lshr_b32 s77, s76, 16
; VI-NEXT:    s_lshr_b32 s79, s78, 16
; VI-NEXT:    s_lshr_b32 s89, s88, 16
; VI-NEXT:    s_lshr_b32 s91, s90, 16
; VI-NEXT:    s_lshr_b32 vcc_hi, vcc_lo, 16
; VI-NEXT:    v_readfirstlane_b32 s30, v14
; VI-NEXT:    s_cmp_lg_u32 s30, 0
; VI-NEXT:    s_cbranch_scc0 .LBB59_2
; VI-NEXT:  ; %bb.1: ; %cmp.false
; VI-NEXT:    v_mov_b32_e32 v28, s43
; VI-NEXT:    v_mov_b32_e32 v27, s42
; VI-NEXT:    v_mov_b32_e32 v29, s45
; VI-NEXT:    v_mov_b32_e32 v26, s44
; VI-NEXT:    v_mov_b32_e32 v30, s47
; VI-NEXT:    v_mov_b32_e32 v25, s46
; VI-NEXT:    v_mov_b32_e32 v31, s57
; VI-NEXT:    v_mov_b32_e32 v24, s56
; VI-NEXT:    v_mov_b32_e32 v32, s59
; VI-NEXT:    v_mov_b32_e32 v23, s58
; VI-NEXT:    v_mov_b32_e32 v33, s61
; VI-NEXT:    v_mov_b32_e32 v22, s60
; VI-NEXT:    v_mov_b32_e32 v34, s63
; VI-NEXT:    v_mov_b32_e32 v21, s62
; VI-NEXT:    v_mov_b32_e32 v35, s73
; VI-NEXT:    v_mov_b32_e32 v20, s72
; VI-NEXT:    v_mov_b32_e32 v36, s75
; VI-NEXT:    v_mov_b32_e32 v19, s74
; VI-NEXT:    v_mov_b32_e32 v37, s77
; VI-NEXT:    v_mov_b32_e32 v18, s76
; VI-NEXT:    v_mov_b32_e32 v38, s79
; VI-NEXT:    v_mov_b32_e32 v17, s78
; VI-NEXT:    v_mov_b32_e32 v39, s89
; VI-NEXT:    v_mov_b32_e32 v16, s88
; VI-NEXT:    v_mov_b32_e32 v48, s91
; VI-NEXT:    v_mov_b32_e32 v15, s90
; VI-NEXT:    v_mov_b32_e32 v49, vcc_hi
; VI-NEXT:    v_mov_b32_e32 v14, vcc_lo
; VI-NEXT:    v_mov_b32_e32 v50, s4
; VI-NEXT:    v_mov_b32_e32 v13, s29
; VI-NEXT:    v_mov_b32_e32 v51, s5
; VI-NEXT:    v_mov_b32_e32 v12, s28
; VI-NEXT:    v_mov_b32_e32 v52, s6
; VI-NEXT:    v_mov_b32_e32 v11, s27
; VI-NEXT:    v_mov_b32_e32 v53, s7
; VI-NEXT:    v_mov_b32_e32 v10, s26
; VI-NEXT:    v_mov_b32_e32 v54, s8
; VI-NEXT:    v_mov_b32_e32 v9, s25
; VI-NEXT:    v_mov_b32_e32 v55, s9
; VI-NEXT:    v_mov_b32_e32 v8, s24
; VI-NEXT:    v_mov_b32_e32 v40, s10
; VI-NEXT:    v_mov_b32_e32 v7, s23
; VI-NEXT:    v_mov_b32_e32 v41, s11
; VI-NEXT:    v_mov_b32_e32 v6, s22
; VI-NEXT:    v_mov_b32_e32 v42, s12
; VI-NEXT:    v_mov_b32_e32 v5, s21
; VI-NEXT:    v_mov_b32_e32 v43, s13
; VI-NEXT:    v_mov_b32_e32 v4, s20
; VI-NEXT:    v_mov_b32_e32 v44, s14
; VI-NEXT:    v_mov_b32_e32 v3, s19
; VI-NEXT:    v_mov_b32_e32 v45, s15
; VI-NEXT:    v_mov_b32_e32 v2, s18
; VI-NEXT:    v_mov_b32_e32 v46, s40
; VI-NEXT:    v_mov_b32_e32 v1, s17
; VI-NEXT:    v_mov_b32_e32 v47, s41
; VI-NEXT:    v_mov_b32_e32 v0, s16
; VI-NEXT:    s_branch .LBB59_3
; VI-NEXT:  .LBB59_2: ; %cmp.true
; VI-NEXT:    v_mov_b32_e32 v28, 0x200
; VI-NEXT:    v_add_f16_e32 v0, s16, v28
; VI-NEXT:    v_add_f16_e32 v47, s41, v28
; VI-NEXT:    v_add_f16_e32 v1, s17, v28
; VI-NEXT:    v_add_f16_e32 v46, s40, v28
; VI-NEXT:    v_add_f16_e32 v2, s18, v28
; VI-NEXT:    v_add_f16_e32 v45, s15, v28
; VI-NEXT:    v_add_f16_e32 v3, s19, v28
; VI-NEXT:    v_add_f16_e32 v44, s14, v28
; VI-NEXT:    v_add_f16_e32 v4, s20, v28
; VI-NEXT:    v_add_f16_e32 v43, s13, v28
; VI-NEXT:    v_add_f16_e32 v5, s21, v28
; VI-NEXT:    v_add_f16_e32 v42, s12, v28
; VI-NEXT:    v_add_f16_e32 v6, s22, v28
; VI-NEXT:    v_add_f16_e32 v41, s11, v28
; VI-NEXT:    v_add_f16_e32 v7, s23, v28
; VI-NEXT:    v_add_f16_e32 v40, s10, v28
; VI-NEXT:    v_add_f16_e32 v8, s24, v28
; VI-NEXT:    v_add_f16_e32 v55, s9, v28
; VI-NEXT:    v_add_f16_e32 v9, s25, v28
; VI-NEXT:    v_add_f16_e32 v54, s8, v28
; VI-NEXT:    v_add_f16_e32 v10, s26, v28
; VI-NEXT:    v_add_f16_e32 v53, s7, v28
; VI-NEXT:    v_add_f16_e32 v11, s27, v28
; VI-NEXT:    v_add_f16_e32 v52, s6, v28
; VI-NEXT:    v_add_f16_e32 v12, s28, v28
; VI-NEXT:    v_add_f16_e32 v51, s5, v28
; VI-NEXT:    v_add_f16_e32 v13, s29, v28
; VI-NEXT:    v_add_f16_e32 v50, s4, v28
; VI-NEXT:    v_add_f16_e32 v14, vcc_lo, v28
; VI-NEXT:    v_add_f16_e32 v49, vcc_hi, v28
; VI-NEXT:    v_add_f16_e32 v15, s90, v28
; VI-NEXT:    v_add_f16_e32 v48, s91, v28
; VI-NEXT:    v_add_f16_e32 v16, s88, v28
; VI-NEXT:    v_add_f16_e32 v39, s89, v28
; VI-NEXT:    v_add_f16_e32 v17, s78, v28
; VI-NEXT:    v_add_f16_e32 v38, s79, v28
; VI-NEXT:    v_add_f16_e32 v18, s76, v28
; VI-NEXT:    v_add_f16_e32 v37, s77, v28
; VI-NEXT:    v_add_f16_e32 v19, s74, v28
; VI-NEXT:    v_add_f16_e32 v36, s75, v28
; VI-NEXT:    v_add_f16_e32 v20, s72, v28
; VI-NEXT:    v_add_f16_e32 v35, s73, v28
; VI-NEXT:    v_add_f16_e32 v21, s62, v28
; VI-NEXT:    v_add_f16_e32 v34, s63, v28
; VI-NEXT:    v_add_f16_e32 v22, s60, v28
; VI-NEXT:    v_add_f16_e32 v33, s61, v28
; VI-NEXT:    v_add_f16_e32 v23, s58, v28
; VI-NEXT:    v_add_f16_e32 v32, s59, v28
; VI-NEXT:    v_add_f16_e32 v24, s56, v28
; VI-NEXT:    v_add_f16_e32 v31, s57, v28
; VI-NEXT:    v_add_f16_e32 v25, s46, v28
; VI-NEXT:    v_add_f16_e32 v30, s47, v28
; VI-NEXT:    v_add_f16_e32 v26, s44, v28
; VI-NEXT:    v_add_f16_e32 v29, s45, v28
; VI-NEXT:    v_add_f16_e32 v27, s42, v28
; VI-NEXT:    v_add_f16_e32 v28, s43, v28
; VI-NEXT:  .LBB59_3: ; %end
; VI-NEXT:    v_lshlrev_b32_e32 v47, 16, v47
; VI-NEXT:    v_lshlrev_b32_e32 v46, 16, v46
; VI-NEXT:    v_lshlrev_b32_e32 v45, 16, v45
; VI-NEXT:    v_lshlrev_b32_e32 v44, 16, v44
; VI-NEXT:    v_lshlrev_b32_e32 v43, 16, v43
; VI-NEXT:    v_lshlrev_b32_e32 v42, 16, v42
; VI-NEXT:    v_lshlrev_b32_e32 v41, 16, v41
; VI-NEXT:    v_lshlrev_b32_e32 v40, 16, v40
; VI-NEXT:    v_or_b32_sdwa v0, v0, v47 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v1, v1, v46 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v2, v2, v45 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v3, v3, v44 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v4, v4, v43 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v5, v5, v42 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v6, v6, v41 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v7, v7, v40 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; VI-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; VI-NEXT:    v_lshlrev_b32_e32 v55, 16, v55
; VI-NEXT:    v_lshlrev_b32_e32 v54, 16, v54
; VI-NEXT:    v_lshlrev_b32_e32 v53, 16, v53
; VI-NEXT:    v_lshlrev_b32_e32 v52, 16, v52
; VI-NEXT:    v_lshlrev_b32_e32 v51, 16, v51
; VI-NEXT:    v_lshlrev_b32_e32 v50, 16, v50
; VI-NEXT:    v_lshlrev_b32_e32 v49, 16, v49
; VI-NEXT:    v_lshlrev_b32_e32 v48, 16, v48
; VI-NEXT:    v_lshlrev_b32_e32 v39, 16, v39
; VI-NEXT:    v_lshlrev_b32_e32 v38, 16, v38
; VI-NEXT:    v_lshlrev_b32_e32 v37, 16, v37
; VI-NEXT:    v_lshlrev_b32_e32 v36, 16, v36
; VI-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; VI-NEXT:    v_lshlrev_b32_e32 v34, 16, v34
; VI-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; VI-NEXT:    v_lshlrev_b32_e32 v32, 16, v32
; VI-NEXT:    v_lshlrev_b32_e32 v31, 16, v31
; VI-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; VI-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; VI-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; VI-NEXT:    v_readlane_b32 s30, v56, 0
; VI-NEXT:    v_or_b32_sdwa v8, v8, v55 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v9, v9, v54 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v10, v10, v53 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v11, v11, v52 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v12, v12, v51 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v13, v13, v50 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v14, v14, v49 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v15, v15, v48 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v16, v16, v39 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v17, v17, v38 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v18, v18, v37 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v19, v19, v36 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v20, v20, v35 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v21, v21, v34 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v22, v22, v33 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v23, v23, v32 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v24, v24, v31 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v25, v25, v30 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v26, v26, v29 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_or_b32_sdwa v27, v27, v28 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
; VI-NEXT:    v_readlane_b32 s31, v56, 1
; VI-NEXT:    s_or_saveexec_b64 s[4:5], -1
; VI-NEXT:    buffer_load_dword v56, off, s[0:3], s32 offset:32 ; 4-byte Folded Reload
; VI-NEXT:    s_mov_b64 exec, s[4:5]
; VI-NEXT:    s_waitcnt vmcnt(0)
; VI-NEXT:    s_setpc_b64 s[30:31]
;
; GFX9-LABEL: bitcast_v56f16_to_v56i16_scalar:
; GFX9:       ; %bb.0:
; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT:    buffer_store_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT:    buffer_store_dword v47, off, s[0:3], s32 ; 4-byte Folded Spill
; GFX9-NEXT:    v_readfirstlane_b32 s93, v13
; GFX9-NEXT:    v_readfirstlane_b32 s92, v12
; GFX9-NEXT:    v_readfirstlane_b32 s91, v11
; GFX9-NEXT:    v_readfirstlane_b32 s90, v10
; GFX9-NEXT:    v_readfirstlane_b32 s89, v9
; GFX9-NEXT:    v_readfirstlane_b32 s88, v8
; GFX9-NEXT:    v_readfirstlane_b32 s79, v7
; GFX9-NEXT:    v_readfirstlane_b32 s78, v6
; GFX9-NEXT:    v_readfirstlane_b32 s77, v5
; GFX9-NEXT:    v_readfirstlane_b32 s76, v4
; GFX9-NEXT:    v_readfirstlane_b32 s75, v3
; GFX9-NEXT:    v_readfirstlane_b32 s74, v2
; GFX9-NEXT:    v_readfirstlane_b32 s73, v1
; GFX9-NEXT:    v_readfirstlane_b32 s72, v0
; GFX9-NEXT:    s_lshr_b32 s41, s29, 16
; GFX9-NEXT:    s_lshr_b32 s40, s28, 16
; GFX9-NEXT:    s_lshr_b32 s15, s27, 16
; GFX9-NEXT:    s_lshr_b32 s14, s26, 16
; GFX9-NEXT:    s_lshr_b32 s13, s25, 16
; GFX9-NEXT:    s_lshr_b32 s12, s24, 16
; GFX9-NEXT:    s_lshr_b32 s11, s23, 16
; GFX9-NEXT:    s_lshr_b32 s10, s22, 16
; GFX9-NEXT:    s_lshr_b32 s9, s21, 16
; GFX9-NEXT:    s_lshr_b32 s8, s20, 16
; GFX9-NEXT:    s_lshr_b32 s7, s19, 16
; GFX9-NEXT:    s_lshr_b32 s6, s18, 16
; GFX9-NEXT:    s_lshr_b32 s5, s17, 16
; GFX9-NEXT:    s_lshr_b32 s4, s16, 16
; GFX9-NEXT:    s_lshr_b32 s63, s93, 16
; GFX9-NEXT:    s_lshr_b32 s62, s92, 16
; GFX9-NEXT:    s_lshr_b32 s61, s91, 16
; GFX9-NEXT:    s_lshr_b32 s60, s90, 16
; GFX9-NEXT:    s_lshr_b32 s59, s89, 16
; GFX9-NEXT:    s_lshr_b32 s58, s88, 16
; GFX9-NEXT:    s_lshr_b32 s57, s79, 16
; GFX9-NEXT:    s_lshr_b32 s56, s78, 16
; GFX9-NEXT:    s_lshr_b32 s47, s77, 16
; GFX9-NEXT:    s_lshr_b32 s46, s76, 16
; GFX9-NEXT:    s_lshr_b32 s45, s75, 16
; GFX9-NEXT:    s_lshr_b32 s44, s74, 16
; GFX9-NEXT:    s_lshr_b32 s43, s73, 16
; GFX9-NEXT:    s_lshr_b32 s42, s72, 16
; GFX9-NEXT:    v_readfirstlane_b32 s94, v14
; GFX9-NEXT:    s_cmp_lg_u32 s94, 0
; GFX9-NEXT:    s_cbranch_scc0 .LBB59_2
; GFX9-NEXT:  ; %bb.1: ; %cmp.false
; GFX9-NEXT:    v_mov_b32_e32 v27, s93
; GFX9-NEXT:    v_mov_b32_e32 v26, s92
; GFX9-NEXT:    v_mov_b32_e32 v25, s91
; GFX9-NEXT:    v_mov_b32_e32 v24, s90
; GFX9-NEXT:    v_mov_b32_e32 v23, s89
; GFX9-NEXT:    v_mov_b32_e32 v22, s88
; GFX9-NEXT:    v_mov_b32_e32 v21, s79
; GFX9-NEXT:    v_mov_b32_e32 v20, s78
; GFX9-NEXT:    v_mov_b32_e32 v19, s77
; GFX9-NEXT:    v_mov_b32_e32 v18, s76
; GFX9-NEXT:    v_mov_b32_e32 v17, s75
; GFX9-NEXT:    v_mov_b32_e32 v16, s74
; GFX9-NEXT:    v_mov_b32_e32 v15, s73
; GFX9-NEXT:    v_mov_b32_e32 v14, s72
; GFX9-NEXT:    v_mov_b32_e32 v13, s29
; GFX9-NEXT:    v_mov_b32_e32 v12, s28
; GFX9-NEXT:    v_mov_b32_e32 v11, s27
; GFX9-NEXT:    v_mov_b32_e32 v10, s26
; GFX9-NEXT:    v_mov_b32_e32 v9, s25
; GFX9-NEXT:    v_mov_b32_e32 v8, s24
; GFX9-NEXT:    v_mov_b32_e32 v7, s23
; GFX9-NEXT:    v_mov_b32_e32 v6, s22
; GFX9-NEXT:    v_mov_b32_e32 v5, s21
; GFX9-NEXT:    v_mov_b32_e32 v4, s20
; GFX9-NEXT:    v_mov_b32_e32 v3, s19
; GFX9-NEXT:    v_mov_b32_e32 v2, s18
; GFX9-NEXT:    v_mov_b32_e32 v1, s17
; GFX9-NEXT:    v_mov_b32_e32 v0, s16
; GFX9-NEXT:    v_mov_b32_e32 v28, s63
; GFX9-NEXT:    v_mov_b32_e32 v29, s62
; GFX9-NEXT:    v_mov_b32_e32 v30, s61
; GFX9-NEXT:    v_mov_b32_e32 v31, s60
; GFX9-NEXT:    v_mov_b32_e32 v32, s59
; GFX9-NEXT:    v_mov_b32_e32 v33, s58
; GFX9-NEXT:    v_mov_b32_e32 v34, s57
; GFX9-NEXT:    v_mov_b32_e32 v35, s56
; GFX9-NEXT:    v_mov_b32_e32 v36, s47
; GFX9-NEXT:    v_mov_b32_e32 v37, s46
; GFX9-NEXT:    v_mov_b32_e32 v38, s45
; GFX9-NEXT:    v_mov_b32_e32 v39, s44
; GFX9-NEXT:    v_mov_b32_e32 v48, s43
; GFX9-NEXT:    v_mov_b32_e32 v49, s42
; GFX9-NEXT:    v_mov_b32_e32 v50, s41
; GFX9-NEXT:    v_mov_b32_e32 v51, s40
; GFX9-NEXT:    v_mov_b32_e32 v52, s15
; GFX9-NEXT:    v_mov_b32_e32 v53, s14
; GFX9-NEXT:    v_mov_b32_e32 v54, s13
; GFX9-NEXT:    v_mov_b32_e32 v55, s12
; GFX9-NEXT:    v_mov_b32_e32 v40, s11
; GFX9-NEXT:    v_mov_b32_e32 v41, s10
; GFX9-NEXT:    v_mov_b32_e32 v42, s9
; GFX9-NEXT:    v_mov_b32_e32 v43, s8
; GFX9-NEXT:    v_mov_b32_e32 v44, s7
; GFX9-NEXT:    v_mov_b32_e32 v45, s6
; GFX9-NEXT:    v_mov_b32_e32 v46, s5
; GFX9-NEXT:    v_mov_b32_e32 v47, s4
; GFX9-NEXT:    s_branch .LBB59_3
; GFX9-NEXT:  .LBB59_2: ; %cmp.true
; GFX9-NEXT:    s_pack_ll_b32_b16 s63, s93, s63
; GFX9-NEXT:    v_mov_b32_e32 v0, 0x200
; GFX9-NEXT:    s_pack_ll_b32_b16 s62, s92, s62
; GFX9-NEXT:    s_pack_ll_b32_b16 s61, s91, s61
; GFX9-NEXT:    s_pack_ll_b32_b16 s60, s90, s60
; GFX9-NEXT:    s_pack_ll_b32_b16 s59, s89, s59
; GFX9-NEXT:    s_pack_ll_b32_b16 s58, s88, s58
; GFX9-NEXT:    s_pack_ll_b32_b16 s57, s79, s57
; GFX9-NEXT:    s_pack_ll_b32_b16 s56, s78, s56
; GFX9-NEXT:    s_pack_ll_b32_b16 s47, s77, s47
; GFX9-NEXT:    s_pack_ll_b32_b16 s46, s76, s46
; GFX9-NEXT:    s_pack_ll_b32_b16 s45, s75, s45
; GFX9-NEXT:    s_pack_ll_b32_b16 s44, s74, s44
; GFX9-NEXT:    s_pack_ll_b32_b16 s43, s73, s43
; GFX9-NEXT:    s_pack_ll_b32_b16 s42, s72, s42
; GFX9-NEXT:    s_pack_ll_b32_b16 s29, s29, s41
; GFX9-NEXT:    s_pack_ll_b32_b16 s28, s28, s40
; GFX9-NEXT:    s_pack_ll_b32_b16 s15, s27, s15
; GFX9-NEXT:    s_pack_ll_b32_b16 s14, s26, s14
; GFX9-NEXT:    s_pack_ll_b32_b16 s13, s25, s13
; GFX9-NEXT:    s_pack_ll_b32_b16 s12, s24, s12
; GFX9-NEXT:    s_pack_ll_b32_b16 s11, s23, s11
; GFX9-NEXT:    s_pack_ll_b32_b16 s10, s22, s10
; GFX9-NEXT:    s_pack_ll_b32_b16 s9, s21, s9
; GFX9-NEXT:    s_pack_ll_b32_b16 s8, s20, s8
; GFX9-NEXT:    s_pack_ll_b32_b16 s7, s19, s7
; GFX9-NEXT:    s_pack_ll_b32_b16 s6, s18, s6
; GFX9-NEXT:    s_pack_ll_b32_b16 s5, s17, s5
; GFX9-NEXT:    s_pack_ll_b32_b16 s4, s16, s4
; GFX9-NEXT:    v_pk_add_f16 v27, s63, v0 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v26, s62, v0 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v25, s61, v0 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v24, s60, v0 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v23, s59, v0 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v22, s58, v0 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v21, s57, v0 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v20, s56, v0 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v19, s47, v0 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v18, s46, v0 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v17, s45, v0 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v16, s44, v0 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v15, s43, v0 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v14, s42, v0 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v13, s29, v0 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v12, s28, v0 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v11, s15, v0 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v10, s14, v0 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v9, s13, v0 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v8, s12, v0 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v7, s11, v0 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v6, s10, v0 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v5, s9, v0 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v4, s8, v0 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v3, s7, v0 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v2, s6, v0 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v1, s5, v0 op_sel_hi:[1,0]
; GFX9-NEXT:    v_pk_add_f16 v0, s4, v0 op_sel_hi:[1,0]
; GFX9-NEXT:    v_lshrrev_b32_e32 v47, 16, v0
; GFX9-NEXT:    v_lshrrev_b32_e32 v46, 16, v1
; GFX9-NEXT:    v_lshrrev_b32_e32 v45, 16, v2
; GFX9-NEXT:    v_lshrrev_b32_e32 v44, 16, v3
; GFX9-NEXT:    v_lshrrev_b32_e32 v43, 16, v4
; GFX9-NEXT:    v_lshrrev_b32_e32 v42, 16, v5
; GFX9-NEXT:    v_lshrrev_b32_e32 v41, 16, v6
; GFX9-NEXT:    v_lshrrev_b32_e32 v40, 16, v7
; GFX9-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX9-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX9-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX9-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX9-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX9-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX9-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX9-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX9-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX9-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX9-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX9-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX9-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX9-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX9-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX9-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX9-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX9-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX9-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX9-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX9-NEXT:  .LBB59_3: ; %end
; GFX9-NEXT:    v_lshlrev_b32_e32 v47, 16, v47
; GFX9-NEXT:    v_lshlrev_b32_e32 v46, 16, v46
; GFX9-NEXT:    v_lshlrev_b32_e32 v45, 16, v45
; GFX9-NEXT:    v_lshlrev_b32_e32 v44, 16, v44
; GFX9-NEXT:    v_lshlrev_b32_e32 v43, 16, v43
; GFX9-NEXT:    v_lshlrev_b32_e32 v42, 16, v42
; GFX9-NEXT:    v_lshlrev_b32_e32 v41, 16, v41
; GFX9-NEXT:    v_lshlrev_b32_e32 v40, 16, v40
; GFX9-NEXT:    v_or_b32_sdwa v0, v47, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v1, v46, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v2, v45, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v3, v44, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v4, v43, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v5, v42, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v6, v41, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v7, v40, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    buffer_load_dword v47, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v46, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v45, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v44, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v43, off, s[0:3], s32 offset:16 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v42, off, s[0:3], s32 offset:20 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v41, off, s[0:3], s32 offset:24 ; 4-byte Folded Reload
; GFX9-NEXT:    buffer_load_dword v40, off, s[0:3], s32 offset:28 ; 4-byte Folded Reload
; GFX9-NEXT:    v_lshlrev_b32_e32 v55, 16, v55
; GFX9-NEXT:    v_lshlrev_b32_e32 v54, 16, v54
; GFX9-NEXT:    v_lshlrev_b32_e32 v53, 16, v53
; GFX9-NEXT:    v_lshlrev_b32_e32 v52, 16, v52
; GFX9-NEXT:    v_lshlrev_b32_e32 v51, 16, v51
; GFX9-NEXT:    v_lshlrev_b32_e32 v50, 16, v50
; GFX9-NEXT:    v_lshlrev_b32_e32 v49, 16, v49
; GFX9-NEXT:    v_lshlrev_b32_e32 v48, 16, v48
; GFX9-NEXT:    v_lshlrev_b32_e32 v39, 16, v39
; GFX9-NEXT:    v_lshlrev_b32_e32 v38, 16, v38
; GFX9-NEXT:    v_lshlrev_b32_e32 v37, 16, v37
; GFX9-NEXT:    v_lshlrev_b32_e32 v36, 16, v36
; GFX9-NEXT:    v_lshlrev_b32_e32 v35, 16, v35
; GFX9-NEXT:    v_lshlrev_b32_e32 v34, 16, v34
; GFX9-NEXT:    v_lshlrev_b32_e32 v33, 16, v33
; GFX9-NEXT:    v_lshlrev_b32_e32 v32, 16, v32
; GFX9-NEXT:    v_lshlrev_b32_e32 v31, 16, v31
; GFX9-NEXT:    v_lshlrev_b32_e32 v30, 16, v30
; GFX9-NEXT:    v_lshlrev_b32_e32 v29, 16, v29
; GFX9-NEXT:    v_lshlrev_b32_e32 v28, 16, v28
; GFX9-NEXT:    v_or_b32_sdwa v8, v55, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v9, v54, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v10, v53, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v11, v52, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v12, v51, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v13, v50, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v14, v49, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v15, v48, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v16, v39, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v17, v38, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v18, v37, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v19, v36, v19 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v20, v35, v20 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v21, v34, v21 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v22, v33, v22 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v23, v32, v23 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v24, v31, v24 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v25, v30, v25 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v26, v29, v26 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    v_or_b32_sdwa v27, v28, v27 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT:    s_waitcnt vmcnt(0)
; GFX9-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-TRUE16-LABEL: bitcast_v56f16_to_v56i16_scalar:
; GFX11-TRUE16:       ; %bb.0:
; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s79, v9
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s89, v8
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s88, v7
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s77, v6
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s76, v5
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s73, v4
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s78, v3
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s75, v2
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s74, v1
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s72, v0
; GFX11-TRUE16-NEXT:    v_readfirstlane_b32 s90, v10
; GFX11-TRUE16-NEXT:    s_lshr_b32 s45, s29, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s44, s28, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s43, s27, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s42, s26, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s41, s25, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s40, s24, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s15, s23, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s14, s22, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s13, s21, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s12, s20, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s11, s19, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s10, s18, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s8, s17, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s6, s16, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s9, s3, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s7, s2, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s4, s1, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s5, s0, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s58, s79, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s63, s89, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s62, s88, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s60, s77, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s57, s76, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s47, s73, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s61, s78, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s59, s75, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s56, s74, 16
; GFX11-TRUE16-NEXT:    s_lshr_b32 s46, s72, 16
; GFX11-TRUE16-NEXT:    s_cmp_lg_u32 s90, 0
; GFX11-TRUE16-NEXT:    s_cbranch_scc0 .LBB59_2
; GFX11-TRUE16-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v27, s79 :: v_dual_mov_b32 v26, s89
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v25, s88 :: v_dual_mov_b32 v24, s77
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v23, s76 :: v_dual_mov_b32 v22, s73
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v21, s78 :: v_dual_mov_b32 v20, s75
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v19, s74 :: v_dual_mov_b32 v18, s72
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v17, s29 :: v_dual_mov_b32 v16, s28
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v14, s26
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v13, s25 :: v_dual_mov_b32 v12, s24
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v11, s23 :: v_dual_mov_b32 v10, s22
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v8, s20
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v7, s19 :: v_dual_mov_b32 v6, s18
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v4, s16
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v3, s3 :: v_dual_mov_b32 v2, s2
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v0, s0
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v28, s58 :: v_dual_mov_b32 v29, s63
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v30, s62 :: v_dual_mov_b32 v31, s60
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v32, s57 :: v_dual_mov_b32 v33, s47
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v34, s61 :: v_dual_mov_b32 v35, s59
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v36, s56 :: v_dual_mov_b32 v37, s46
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v38, s45 :: v_dual_mov_b32 v39, s44
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v48, s43 :: v_dual_mov_b32 v49, s42
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v50, s41 :: v_dual_mov_b32 v51, s40
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v52, s15 :: v_dual_mov_b32 v53, s14
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v54, s13 :: v_dual_mov_b32 v55, s12
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v64, s11 :: v_dual_mov_b32 v65, s10
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v66, s8 :: v_dual_mov_b32 v67, s6
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v68, s9 :: v_dual_mov_b32 v69, s7
; GFX11-TRUE16-NEXT:    v_dual_mov_b32 v70, s4 :: v_dual_mov_b32 v71, s5
; GFX11-TRUE16-NEXT:    s_branch .LBB59_3
; GFX11-TRUE16-NEXT:  .LBB59_2: ; %cmp.true
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s58, s79, s58
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s57, s76, s57
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v27, s58, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s58, s88, s62
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s47, s73, s47
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s63, s89, s63
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v25, s58, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s58, s77, s60
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v23, s57, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s57, s78, s61
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v22, s47, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s47, s75, s59
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s56, s74, s56
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s46, s72, s46
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s29, s29, s45
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s28, s28, s44
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s27, s27, s43
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s26, s26, s42
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s25, s25, s41
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s24, s24, s40
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s15, s23, s15
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s14, s22, s14
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s13, s21, s13
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s12, s20, s12
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s11, s19, s11
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s10, s18, s10
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s8, s17, s8
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s6, s16, s6
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s3, s3, s9
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s2, s2, s7
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s0, s0, s5
; GFX11-TRUE16-NEXT:    s_pack_ll_b32_b16 s1, s1, s4
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v26, s63, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v24, s58, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v21, s57, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v20, s47, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v19, s56, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v18, s46, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v17, s29, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v16, s28, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v15, s27, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v14, s26, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v13, s25, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v12, s24, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v11, s15, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v10, s14, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v9, s13, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v8, s12, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v7, s11, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v6, s10, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v5, s8, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, s0, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v1, s1, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v2, s2, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v3, s3, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_pk_add_f16 v4, s6, 0x200 op_sel_hi:[1,0]
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v0
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v2
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v3
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v4
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v5
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v6
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v7
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v8
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v9
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v11
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v12
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v13
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v14
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v16
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v17
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v18
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v19
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v21
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v22
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v23
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v24
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v26
; GFX11-TRUE16-NEXT:    v_lshrrev_b32_e32 v28, 16, v27
; GFX11-TRUE16-NEXT:  .LBB59_3: ; %end
; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v0.h, v71.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v1.h, v70.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v2.h, v69.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v3.h, v68.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v4.h, v67.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v5.h, v66.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v6.h, v65.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v7.h, v64.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v8.h, v55.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v9.h, v54.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v10.h, v53.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v11.h, v52.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v12.h, v51.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v13.h, v50.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v14.h, v49.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v15.h, v48.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v16.h, v39.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v17.h, v38.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v18.h, v37.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v19.h, v36.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v20.h, v35.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v21.h, v34.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v22.h, v33.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v23.h, v32.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v24.h, v31.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v25.h, v30.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v26.h, v29.l
; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v27.h, v28.l
; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]
;
; GFX11-FAKE16-LABEL: bitcast_v56f16_to_v56i16_scalar:
; GFX11-FAKE16:       ; %bb.0:
; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s79, v9
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s89, v8
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s88, v7
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s77, v6
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s76, v5
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s73, v4
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s78, v3
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s75, v2
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s74, v1
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s72, v0
; GFX11-FAKE16-NEXT:    v_readfirstlane_b32 s90, v10
; GFX11-FAKE16-NEXT:    s_lshr_b32 s45, s29, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s44, s28, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s43, s27, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s42, s26, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s41, s25, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s40, s24, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s15, s23, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s14, s22, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s13, s21, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s12, s20, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s11, s19, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s10, s18, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s8, s17, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s6, s16, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s9, s3, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s7, s2, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s4, s1, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s5, s0, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s58, s79, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s63, s89, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s62, s88, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s60, s77, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s57, s76, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s47, s73, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s61, s78, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s59, s75, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s56, s74, 16
; GFX11-FAKE16-NEXT:    s_lshr_b32 s46, s72, 16
; GFX11-FAKE16-NEXT:    s_cmp_lg_u32 s90, 0
; GFX11-FAKE16-NEXT:    s_cbranch_scc0 .LBB59_2
; GFX11-FAKE16-NEXT:  ; %bb.1: ; %cmp.false
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v23, s79 :: v_dual_mov_b32 v24, s89
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v25, s88 :: v_dual_mov_b32 v26, s77
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v27, s76 :: v_dual_mov_b32 v18, s73
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v19, s78 :: v_dual_mov_b32 v20, s75
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v21, s74 :: v_dual_mov_b32 v22, s72
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v13, s29 :: v_dual_mov_b32 v14, s28
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v15, s27 :: v_dual_mov_b32 v16, s26
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v17, s25 :: v_dual_mov_b32 v8, s24
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v9, s23 :: v_dual_mov_b32 v10, s22
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v11, s21 :: v_dual_mov_b32 v12, s20
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v3, s19 :: v_dual_mov_b32 v4, s18
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v6, s16
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v7, s3 :: v_dual_mov_b32 v0, s2
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v1, s1 :: v_dual_mov_b32 v2, s0
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v28, s58 :: v_dual_mov_b32 v29, s63
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v30, s62 :: v_dual_mov_b32 v31, s60
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v32, s57 :: v_dual_mov_b32 v33, s47
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v34, s61 :: v_dual_mov_b32 v35, s59
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v36, s56 :: v_dual_mov_b32 v37, s46
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v38, s45 :: v_dual_mov_b32 v39, s44
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v48, s43 :: v_dual_mov_b32 v49, s42
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v50, s41 :: v_dual_mov_b32 v51, s40
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v52, s15 :: v_dual_mov_b32 v53, s14
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v54, s13 :: v_dual_mov_b32 v55, s12
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v64, s11 :: v_dual_mov_b32 v65, s10
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v66, s8 :: v_dual_mov_b32 v67, s6
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v68, s9 :: v_dual_mov_b32 v69, s7
; GFX11-FAKE16-NEXT:    v_dual_mov_b32 v70, s4 :: v_dual_mov_b32 v71, s5
; GFX11-FAKE16-NEXT:    s_branch .LBB59_3
; GFX11-FAKE16-NEXT:  .LBB59_2: ; %cmp.true
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s58, s79, s58
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s57, s76, s57
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v23, s58, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s58, s88, s62
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s47, s73, s47
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s63, s89, s63
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v25, s58, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s58, s77, s60
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v27, s57, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s57, s78, s61
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v18, s47, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s47, s75, s59
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s56, s74, s56
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s46, s72, s46
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s29, s29, s45
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s28, s28, s44
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s27, s27, s43
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s26, s26, s42
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s25, s25, s41
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s24, s24, s40
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s15, s23, s15
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s14, s22, s14
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s13, s21, s13
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s12, s20, s12
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s11, s19, s11
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s10, s18, s10
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s8, s17, s8
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s6, s16, s6
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s3, s3, s9
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s2, s2, s7
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s0, s0, s5
; GFX11-FAKE16-NEXT:    s_pack_ll_b32_b16 s1, s1, s4
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v24, s63, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v26, s58, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v19, s57, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v20, s47, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v21, s56, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v22, s46, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v13, s29, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v14, s28, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v15, s27, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v16, s26, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v17, s25, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v8, s24, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v9, s15, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v10, s14, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v11, s13, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v12, s12, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v3, s11, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v4, s10, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v5, s8, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v2, s0, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v1, s1, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, s2, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v7, s3, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_pk_add_f16 v6, s6, 0x200 op_sel_hi:[1,0]
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v71, 16, v2
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v69, 16, v0
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v68, 16, v7
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v67, 16, v6
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v66, 16, v5
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v65, 16, v4
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v64, 16, v3
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v55, 16, v12
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v54, 16, v11
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v53, 16, v10
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v52, 16, v9
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v51, 16, v8
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v50, 16, v17
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v49, 16, v16
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v48, 16, v15
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v39, 16, v14
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v38, 16, v13
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v37, 16, v22
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v36, 16, v21
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v35, 16, v20
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v34, 16, v19
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v33, 16, v18
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v32, 16, v27
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v31, 16, v26
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v30, 16, v25
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v29, 16, v24
; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v28, 16, v23
; GFX11-FAKE16-NEXT:  .LBB59_3: ; %end
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v2, 0xffff, v2
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v1, 0xffff, v1
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v80, 0xffff, v0
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v7, 0xffff, v7
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v6, 0xffff, v6
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v0, v71, 16, v2
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v1, v70, 16, v1
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v2, v69, 16, v80
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v69, 0xffff, v4
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v70, 0xffff, v3
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v3, v68, 16, v7
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v4, v67, 16, v6
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v12, 0xffff, v12
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v6, v65, 16, v69
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v7, v64, 16, v70
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v11, 0xffff, v11
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v64, 0xffff, v9
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v65, 0xffff, v8
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v8, v55, 16, v12
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v17, 0xffff, v17
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v9, v54, 16, v11
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v11, v52, 16, v64
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v12, v51, 16, v65
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v16, 0xffff, v16
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v51, 0xffff, v14
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v52, 0xffff, v13
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v13, v50, 16, v17
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v22, 0xffff, v22
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v14, v49, 16, v16
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v16, v39, 16, v51
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v17, v38, 16, v52
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v21, 0xffff, v21
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v38, 0xffff, v19
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v39, 0xffff, v18
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v5, 0xffff, v5
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v10, 0xffff, v10
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v15, 0xffff, v15
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v20, 0xffff, v20
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v18, v37, 16, v22
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v19, v36, 16, v21
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v21, v34, 16, v38
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v22, v33, 16, v39
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v27, 0xffff, v27
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v26, 0xffff, v26
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v25, 0xffff, v25
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v33, 0xffff, v24
; GFX11-FAKE16-NEXT:    v_and_b32_e32 v34, 0xffff, v23
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v5, v66, 16, v5
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v10, v53, 16, v10
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v15, v48, 16, v15
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v20, v35, 16, v20
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v23, v32, 16, v27
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v24, v31, 16, v26
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v25, v30, 16, v25
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v26, v29, 16, v33
; GFX11-FAKE16-NEXT:    v_lshl_or_b32 v27, v28, 16, v34
; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]
  %cmp = icmp eq i32 %b, 0
  br i1 %cmp, label %cmp.true, label %cmp.false

cmp.true:
  %a1 = fadd <56 x half> %a, splat (half 0xH0200)
  %a2 = bitcast <56 x half> %a1 to <56 x i16>
  br label %end

cmp.false:
  %a3 = bitcast <56 x half> %a to <56 x i16>
  br label %end

end:
  %phi = phi <56 x i16> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
  ret <56 x i16> %phi
}

attributes #0 = { nounwind }