| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py | |
| ; RUN: llc < %s -mtriple=aarch64-unknown-linux | FileCheck %s | |
| ; Test optimization of 32-bit unsigned division by constants with 33-bit magic | |
| ; constants (IsAdd=true) on AArch64. The optimization uses the umulh instruction. | |
| define i32 @udiv_by_7(i32 %x) nounwind { | |
| ; CHECK-LABEL: udiv_by_7: | |
| ; CHECK: // %bb.0: | |
| ; CHECK-NEXT: mov x8, #2684354560 // =0xa0000000 | |
| ; CHECK-NEXT: mov w9, w0 | |
| ; CHECK-NEXT: movk x8, #18724, lsl #32 | |
| ; CHECK-NEXT: movk x8, #9362, lsl #48 | |
| ; CHECK-NEXT: umulh x0, x9, x8 | |
| ; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x0 | |
| ; CHECK-NEXT: ret | |
| %div = udiv i32 %x, 7 | |
| ret i32 %div | |
| } | |
| define i32 @udiv_by_19(i32 %x) nounwind { | |
| ; CHECK-LABEL: udiv_by_19: | |
| ; CHECK: // %bb.0: | |
| ; CHECK-NEXT: mov x8, #1476395008 // =0x58000000 | |
| ; CHECK-NEXT: mov w9, w0 | |
| ; CHECK-NEXT: movk x8, #17246, lsl #32 | |
| ; CHECK-NEXT: movk x8, #3449, lsl #48 | |
| ; CHECK-NEXT: umulh x0, x9, x8 | |
| ; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x0 | |
| ; CHECK-NEXT: ret | |
| %div = udiv i32 %x, 19 | |
| ret i32 %div | |
| } | |
| define i32 @udiv_by_21(i32 %x) nounwind { | |
| ; CHECK-LABEL: udiv_by_21: | |
| ; CHECK: // %bb.0: | |
| ; CHECK-NEXT: mov x8, #939524096 // =0x38000000 | |
| ; CHECK-NEXT: mov w9, w0 | |
| ; CHECK-NEXT: movk x8, #49932, lsl #32 | |
| ; CHECK-NEXT: movk x8, #3120, lsl #48 | |
| ; CHECK-NEXT: umulh x0, x9, x8 | |
| ; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x0 | |
| ; CHECK-NEXT: ret | |
| %div = udiv i32 %x, 21 | |
| ret i32 %div | |
| } | |
| ; Test non-optimized case | |
| define i32 @udiv_by_3(i32 %x) nounwind { | |
| ; CHECK-LABEL: udiv_by_3: | |
| ; CHECK: // %bb.0: | |
| ; CHECK-NEXT: mov w8, #43691 // =0xaaab | |
| ; CHECK-NEXT: movk w8, #43690, lsl #16 | |
| ; CHECK-NEXT: umull x8, w0, w8 | |
| ; CHECK-NEXT: lsr x0, x8, #33 | |
| ; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x0 | |
| ; CHECK-NEXT: ret | |
| %div = udiv i32 %x, 3 | |
| ret i32 %div | |
| } | |
| ; Even divisors with 33-bit magic. On AArch64 these use umulh (i32->i64 | |
| ; zero-extension is free). | |
| define i32 @udiv_by_14(i32 %x) nounwind { | |
| ; CHECK-LABEL: udiv_by_14: | |
| ; CHECK: // %bb.0: | |
| ; CHECK-NEXT: mov x8, #1342177280 // =0x50000000 | |
| ; CHECK-NEXT: mov w9, w0 | |
| ; CHECK-NEXT: movk x8, #9362, lsl #32 | |
| ; CHECK-NEXT: movk x8, #4681, lsl #48 | |
| ; CHECK-NEXT: umulh x0, x9, x8 | |
| ; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x0 | |
| ; CHECK-NEXT: ret | |
| %div = udiv i32 %x, 14 | |
| ret i32 %div | |
| } | |
| ; Vector udiv is unaffected by the free-zext scalar rewrite: <4 x i32> keeps | |
| ; the even-divisor rewrite (this function is unchanged by the follow-up commit). | |
| define <4 x i32> @udiv_by_14_vec(<4 x i32> %x) nounwind { | |
| ; CHECK-LABEL: udiv_by_14_vec: | |
| ; CHECK: // %bb.0: | |
| ; CHECK-NEXT: mov w8, #9363 // =0x2493 | |
| ; CHECK-NEXT: ushr v0.4s, v0.4s, #1 | |
| ; CHECK-NEXT: movk w8, #37449, lsl #16 | |
| ; CHECK-NEXT: dup v1.4s, w8 | |
| ; CHECK-NEXT: umull2 v2.2d, v0.4s, v1.4s | |
| ; CHECK-NEXT: umull v0.2d, v0.2s, v1.2s | |
| ; CHECK-NEXT: uzp2 v0.4s, v0.4s, v2.4s | |
| ; CHECK-NEXT: ushr v0.4s, v0.4s, #2 | |
| ; CHECK-NEXT: ret | |
| %div = udiv <4 x i32> %x, <i32 14, i32 14, i32 14, i32 14> | |
| ret <4 x i32> %div | |
| } |