| // X86InsertX87Wait.cpp - Strict-Fp:Insert wait instruction X87 instructions // | |
| // | |
| // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | |
| // See https://llvm.org/LICENSE.txt for license information. | |
| // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | |
| // | |
| //===----------------------------------------------------------------------===// | |
| // | |
| // This file defines the pass which insert x86 wait instructions after each | |
| // X87 instructions when strict float is enabled. | |
| // | |
| // The logic to insert a wait instruction after an X87 instruction is as below: | |
| // 1. If the X87 instruction don't raise float exception nor is a load/store | |
| // instruction, or is a x87 control instruction, don't insert wait. | |
| // 2. If the X87 instruction is an instruction which the following instruction | |
| // is an X87 exception synchronizing X87 instruction, don't insert wait. | |
| // 3. For other situations, insert wait instruction. | |
| // | |
| //===----------------------------------------------------------------------===// | |
| #include "X86.h" | |
| #include "X86InstrInfo.h" | |
| #include "X86Subtarget.h" | |
| #include "llvm/CodeGen/MachineBasicBlock.h" | |
| #include "llvm/CodeGen/MachineFunction.h" | |
| #include "llvm/CodeGen/MachineFunctionPass.h" | |
| #include "llvm/CodeGen/MachineInstr.h" | |
| #include "llvm/CodeGen/MachineInstrBuilder.h" | |
| #include "llvm/CodeGen/MachineOperand.h" | |
| #include "llvm/IR/DebugLoc.h" | |
| #include "llvm/Support/Debug.h" | |
| using namespace llvm; | |
| #define DEBUG_TYPE "x86-insert-x87-wait" | |
| namespace { | |
| class X86InsertX87WaitLegacy : public MachineFunctionPass { | |
| public: | |
| static char ID; | |
| X86InsertX87WaitLegacy() : MachineFunctionPass(ID) {} | |
| bool runOnMachineFunction(MachineFunction &MF) override; | |
| StringRef getPassName() const override { | |
| return "X86 insert wait instruction"; | |
| } | |
| }; | |
| } // end anonymous namespace | |
| char X86InsertX87WaitLegacy::ID = 0; | |
| FunctionPass *llvm::createX86InsertX87WaitLegacyPass() { | |
| return new X86InsertX87WaitLegacy(); | |
| } | |
| // Classifies an x87 control instruction by whether it performs the implicit | |
| // wait (FP exception sync); non-waiting FN-prefixed forms do not. | |
| enum class X87ControlKind { NotControl, Waiting, NonWaiting }; | |
| static X87ControlKind classifyX87ControlInstruction(unsigned Opcode) { | |
| switch (Opcode) { | |
| default: | |
| return X87ControlKind::NotControl; | |
| case X86::FNINIT: | |
| case X86::FNSTCW16m: | |
| case X86::FNSTSW16r: | |
| case X86::FNSTSWm: | |
| case X86::FNCLEX: | |
| case X86::FSTENVm: | |
| case X86::FSAVEm: | |
| return X87ControlKind::NonWaiting; | |
| case X86::FLDCW16m: | |
| case X86::FLDENVm: | |
| case X86::FRSTORm: | |
| case X86::FINCSTP: | |
| case X86::FDECSTP: | |
| case X86::FFREE: | |
| case X86::FFREEP: | |
| case X86::FNOP: | |
| case X86::WAIT: | |
| return X87ControlKind::Waiting; | |
| } | |
| } | |
| static bool insertWaitInstruction(MachineFunction &MF) { | |
| if (!MF.getFunction().hasFnAttribute(Attribute::StrictFP)) | |
| return false; | |
| const X86Subtarget &ST = MF.getSubtarget<X86Subtarget>(); | |
| const X86InstrInfo *TII = ST.getInstrInfo(); | |
| bool Changed = false; | |
| for (MachineBasicBlock &MBB : MF) { | |
| for (MachineBasicBlock::iterator MI = MBB.begin(); MI != MBB.end(); ++MI) { | |
| // Jump non X87 instruction. | |
| if (!X86::isX87Instruction(*MI)) | |
| continue; | |
| // If the instruction instruction neither has float exception nor is | |
| // a load/store instruction, or the instruction is x87 control | |
| // instruction, do not insert wait. | |
| if (!(MI->mayRaiseFPException() || MI->mayLoadOrStore()) || | |
| classifyX87ControlInstruction(MI->getOpcode()) != | |
| X87ControlKind::NotControl) | |
| continue; | |
| // If the following instruction is an X87 instruction that performs the | |
| // wait operation itself, we can omit inserting wait. Skip | |
| // meta-instructions so the decision is independent of debug info, and | |
| // keep the wait for non-waiting (FN-prefixed) successors. A return may | |
| // carry implicit ST uses but performs no exception sync, so it never | |
| // makes the wait redundant. | |
| MachineBasicBlock::iterator AfterMI = std::next(MI); | |
| MachineBasicBlock::iterator NextMI = AfterMI; | |
| while (NextMI != MBB.end() && NextMI->isMetaInstruction()) | |
| ++NextMI; | |
| if (NextMI != MBB.end() && !NextMI->isReturn() && | |
| X86::isX87Instruction(*NextMI) && | |
| classifyX87ControlInstruction(NextMI->getOpcode()) != | |
| X87ControlKind::NonWaiting) | |
| continue; | |
| BuildMI(MBB, AfterMI, MI->getDebugLoc(), TII->get(X86::WAIT)); | |
| LLVM_DEBUG(dbgs() << "\nInsert wait after:\t" << *MI); | |
| // Jump the newly inserting wait | |
| ++MI; | |
| Changed = true; | |
| } | |
| } | |
| return Changed; | |
| } | |
| bool X86InsertX87WaitLegacy::runOnMachineFunction(MachineFunction &MF) { | |
| return insertWaitInstruction(MF); | |
| } | |
| PreservedAnalyses X86InsertX87WaitPass::run(MachineFunction &MF, | |
| MachineFunctionAnalysisManager &) { | |
| return insertWaitInstruction(MF) ? getMachineFunctionPassPreservedAnalyses() | |
| .preserveSet<CFGAnalyses>() | |
| : PreservedAnalyses::all(); | |
| } |