llvm/test/CodeGen/Thumb/pr35836.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc < %s | FileCheck %s

target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
target triple = "thumbv5e-none-linux-gnueabi"

; Function Attrs: norecurse nounwind optsize
define void @f(i32,i32,i32,i32,ptr %x4p, ptr %x5p, ptr %x6p) {
; CHECK-LABEL: f:
; CHECK:       @ %bb.0: @ %if.end
; CHECK-NEXT:    .save {r4, r5, r6, r7, lr}
; CHECK-NEXT:    push {r4, r5, r6, r7, lr}
; CHECK-NEXT:    .pad #4
; CHECK-NEXT:    sub sp, #4
; CHECK-NEXT:    str r3, [sp] @ 4-byte Spill
; CHECK-NEXT:    movs r5, #0
; CHECK-NEXT:    ldr r3, [sp, #32]
; CHECK-NEXT:  .LBB0_1: @ %while.body
; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
; CHECK-NEXT:    ldr r4, [sp] @ 4-byte Reload
; CHECK-NEXT:    adds r6, r4, r2
; CHECK-NEXT:    adds r7, r1, r0
; CHECK-NEXT:    mov r12, r5
; CHECK-NEXT:    mov r4, r12
; CHECK-NEXT:    adcs r4, r5
; CHECK-NEXT:    adds r7, r7, r5
; CHECK-NEXT:    adcs r4, r6
; CHECK-NEXT:    str r4, [r3]
; CHECK-NEXT:    b .LBB0_1
if.end:
  br label %while.body

while.body:
  %ll.0100 = phi i64 [ 0, %if.end ], [ %shr32, %while.body ]
  %add = add nuw nsw i64 %ll.0100, 0
  %add3 = add nuw nsw i64 %add, 0
  %shr = lshr i64 %add3, 32
  %conv7 = zext i32 %0 to i64
  %conv9 = zext i32 %1 to i64
  %add10 = add nuw nsw i64 %conv9, %conv7
  %add11 = add nuw nsw i64 %add10, %shr
  %shr14 = lshr i64 %add11, 32
  %conv16 = zext i32 %2 to i64
  %conv18 = zext i32 %3 to i64
  %add19 = add nuw nsw i64 %conv18, %conv16
  %add20 = add nuw nsw i64 %add19, %shr14
  %conv21 = trunc i64 %add20 to i32
  store i32 %conv21, ptr %x6p, align 4
  %shr23 = lshr i64 %add20, 32
  %x4 = load i32, ptr %x4p, align 4
  %conv25 = zext i32 %x4 to i64
  %x5 = load i32, ptr %x5p, align 4
  %conv27 = zext i32 %x5 to i64
  %add28 = add nuw nsw i64 %conv27, %conv25
  %add29 = add nuw nsw i64 %add28, %shr23
  %shr32 = lshr i64 %add29, 32
  br label %while.body
}