blob: 85b076f63618727e8429b912ddd38451dcffbbd2 [file] [edit]
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=amdgcn -mcpu=gfx908 < %s | FileCheck -enable-var-scope --check-prefixes=GREEDY908 %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx90a < %s | FileCheck -enable-var-scope --check-prefixes=GREEDY90A %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx90a -early-live-intervals < %s | FileCheck -enable-var-scope --check-prefixes=GREEDY90A %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx942 < %s | FileCheck -enable-var-scope --check-prefixes=GREEDY942 %s
; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx90a < %s | FileCheck -enable-var-scope --check-prefixes=GREEDY90A-GISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx90a -sgpr-regalloc=fast -vgpr-regalloc=fast -wwm-regalloc=fast < %s | FileCheck -enable-var-scope --check-prefixes=FAST90A %s
; This is better with 90a
; Check that Dst and SrcC of MFMA instructions reading more than 4 registers as SrcC
; is either completely disjoint or exactly the same, but does not alias.
declare <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float, float, <32 x float>, i32, i32, i32)
declare <16 x float> @llvm.amdgcn.mfma.f32.16x16x1f32(float, float, <16 x float>, i32, i32, i32)
declare <4 x float> @llvm.amdgcn.mfma.f32.4x4x1f32(float, float, <4 x float>, i32, i32, i32)
define amdgpu_kernel void @test_mfma_f32_32x32x1f32(ptr addrspace(1) %arg) #0 {
; GREEDY908-LABEL: test_mfma_f32_32x32x1f32:
; GREEDY908: ; %bb.0: ; %bb
; GREEDY908-NEXT: s_load_dwordx2 s[34:35], s[4:5], 0x24
; GREEDY908-NEXT: s_waitcnt lgkmcnt(0)
; GREEDY908-NEXT: s_load_dwordx16 s[16:31], s[34:35], 0x0
; GREEDY908-NEXT: s_load_dwordx16 s[0:15], s[34:35], 0x40
; GREEDY908-NEXT: s_waitcnt lgkmcnt(0)
; GREEDY908-NEXT: v_mov_b32_e32 v0, s16
; GREEDY908-NEXT: v_mov_b32_e32 v1, s17
; GREEDY908-NEXT: v_mov_b32_e32 v2, s18
; GREEDY908-NEXT: v_accvgpr_write_b32 a0, v0
; GREEDY908-NEXT: v_accvgpr_write_b32 a1, v1
; GREEDY908-NEXT: v_mov_b32_e32 v0, s22
; GREEDY908-NEXT: v_mov_b32_e32 v1, s23
; GREEDY908-NEXT: v_accvgpr_write_b32 a2, v2
; GREEDY908-NEXT: v_accvgpr_write_b32 a6, v0
; GREEDY908-NEXT: v_accvgpr_write_b32 a7, v1
; GREEDY908-NEXT: v_mov_b32_e32 v0, s24
; GREEDY908-NEXT: v_mov_b32_e32 v1, s25
; GREEDY908-NEXT: v_mov_b32_e32 v2, s26
; GREEDY908-NEXT: v_accvgpr_write_b32 a8, v0
; GREEDY908-NEXT: v_accvgpr_write_b32 a9, v1
; GREEDY908-NEXT: v_accvgpr_write_b32 a10, v2
; GREEDY908-NEXT: v_mov_b32_e32 v0, s27
; GREEDY908-NEXT: v_mov_b32_e32 v1, s28
; GREEDY908-NEXT: v_mov_b32_e32 v2, s29
; GREEDY908-NEXT: v_accvgpr_write_b32 a11, v0
; GREEDY908-NEXT: v_accvgpr_write_b32 a12, v1
; GREEDY908-NEXT: v_accvgpr_write_b32 a13, v2
; GREEDY908-NEXT: v_mov_b32_e32 v0, s30
; GREEDY908-NEXT: v_mov_b32_e32 v1, s31
; GREEDY908-NEXT: v_mov_b32_e32 v2, s0
; GREEDY908-NEXT: v_accvgpr_write_b32 a14, v0
; GREEDY908-NEXT: v_accvgpr_write_b32 a15, v1
; GREEDY908-NEXT: v_accvgpr_write_b32 a16, v2
; GREEDY908-NEXT: v_mov_b32_e32 v0, s1
; GREEDY908-NEXT: v_mov_b32_e32 v1, s2
; GREEDY908-NEXT: v_mov_b32_e32 v2, s3
; GREEDY908-NEXT: v_accvgpr_write_b32 a17, v0
; GREEDY908-NEXT: v_accvgpr_write_b32 a18, v1
; GREEDY908-NEXT: v_accvgpr_write_b32 a19, v2
; GREEDY908-NEXT: v_mov_b32_e32 v0, s4
; GREEDY908-NEXT: v_mov_b32_e32 v1, s5
; GREEDY908-NEXT: v_mov_b32_e32 v2, s6
; GREEDY908-NEXT: v_accvgpr_write_b32 a20, v0
; GREEDY908-NEXT: v_accvgpr_write_b32 a21, v1
; GREEDY908-NEXT: v_accvgpr_write_b32 a22, v2
; GREEDY908-NEXT: v_mov_b32_e32 v0, s7
; GREEDY908-NEXT: v_mov_b32_e32 v1, s8
; GREEDY908-NEXT: v_mov_b32_e32 v2, s9
; GREEDY908-NEXT: v_mov_b32_e32 v3, s19
; GREEDY908-NEXT: v_accvgpr_write_b32 a23, v0
; GREEDY908-NEXT: v_accvgpr_write_b32 a24, v1
; GREEDY908-NEXT: v_accvgpr_write_b32 a25, v2
; GREEDY908-NEXT: v_mov_b32_e32 v0, s10
; GREEDY908-NEXT: v_mov_b32_e32 v1, s11
; GREEDY908-NEXT: v_mov_b32_e32 v2, s12
; GREEDY908-NEXT: v_mov_b32_e32 v4, s20
; GREEDY908-NEXT: v_mov_b32_e32 v5, s21
; GREEDY908-NEXT: v_accvgpr_write_b32 a3, v3
; GREEDY908-NEXT: v_accvgpr_write_b32 a26, v0
; GREEDY908-NEXT: v_accvgpr_write_b32 a27, v1
; GREEDY908-NEXT: v_accvgpr_write_b32 a28, v2
; GREEDY908-NEXT: v_mov_b32_e32 v0, s13
; GREEDY908-NEXT: v_mov_b32_e32 v1, s14
; GREEDY908-NEXT: v_mov_b32_e32 v2, s15
; GREEDY908-NEXT: v_mov_b32_e32 v3, 1.0
; GREEDY908-NEXT: v_accvgpr_write_b32 a4, v4
; GREEDY908-NEXT: v_accvgpr_write_b32 a5, v5
; GREEDY908-NEXT: v_accvgpr_write_b32 a29, v0
; GREEDY908-NEXT: v_accvgpr_write_b32 a30, v1
; GREEDY908-NEXT: v_accvgpr_write_b32 a31, v2
; GREEDY908-NEXT: v_mov_b32_e32 v0, 2.0
; GREEDY908-NEXT: v_mov_b32_e32 v4, 0
; GREEDY908-NEXT: s_nop 0
; GREEDY908-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v3, v0, a[0:31]
; GREEDY908-NEXT: v_mfma_f32_32x32x1f32 a[32:63], v3, v0, a[0:31]
; GREEDY908-NEXT: s_nop 15
; GREEDY908-NEXT: s_nop 1
; GREEDY908-NEXT: v_accvgpr_read_b32 v2, a32
; GREEDY908-NEXT: v_accvgpr_read_b32 v6, a33
; GREEDY908-NEXT: v_accvgpr_read_b32 v1, a34
; GREEDY908-NEXT: v_accvgpr_write_b32 a2, v2
; GREEDY908-NEXT: v_accvgpr_write_b32 a3, v6
; GREEDY908-NEXT: v_accvgpr_write_b32 a4, v1
; GREEDY908-NEXT: v_accvgpr_read_b32 v2, a35
; GREEDY908-NEXT: v_accvgpr_read_b32 v6, a36
; GREEDY908-NEXT: v_accvgpr_read_b32 v1, a37
; GREEDY908-NEXT: v_accvgpr_write_b32 a5, v2
; GREEDY908-NEXT: v_accvgpr_write_b32 a6, v6
; GREEDY908-NEXT: v_accvgpr_write_b32 a7, v1
; GREEDY908-NEXT: v_accvgpr_read_b32 v2, a38
; GREEDY908-NEXT: v_accvgpr_read_b32 v6, a39
; GREEDY908-NEXT: v_accvgpr_read_b32 v1, a40
; GREEDY908-NEXT: v_accvgpr_write_b32 a8, v2
; GREEDY908-NEXT: v_accvgpr_write_b32 a9, v6
; GREEDY908-NEXT: v_accvgpr_write_b32 a10, v1
; GREEDY908-NEXT: v_accvgpr_read_b32 v2, a41
; GREEDY908-NEXT: v_accvgpr_read_b32 v6, a42
; GREEDY908-NEXT: v_accvgpr_read_b32 v1, a43
; GREEDY908-NEXT: v_accvgpr_write_b32 a11, v2
; GREEDY908-NEXT: v_accvgpr_write_b32 a12, v6
; GREEDY908-NEXT: v_accvgpr_write_b32 a13, v1
; GREEDY908-NEXT: v_accvgpr_read_b32 v2, a44
; GREEDY908-NEXT: v_accvgpr_read_b32 v6, a45
; GREEDY908-NEXT: v_accvgpr_read_b32 v1, a46
; GREEDY908-NEXT: v_accvgpr_write_b32 a14, v2
; GREEDY908-NEXT: v_accvgpr_write_b32 a15, v6
; GREEDY908-NEXT: v_accvgpr_write_b32 a16, v1
; GREEDY908-NEXT: v_accvgpr_read_b32 v2, a47
; GREEDY908-NEXT: v_accvgpr_read_b32 v6, a48
; GREEDY908-NEXT: v_accvgpr_read_b32 v1, a49
; GREEDY908-NEXT: v_accvgpr_write_b32 a17, v2
; GREEDY908-NEXT: v_accvgpr_write_b32 a18, v6
; GREEDY908-NEXT: v_accvgpr_write_b32 a19, v1
; GREEDY908-NEXT: v_accvgpr_read_b32 v2, a50
; GREEDY908-NEXT: v_accvgpr_read_b32 v6, a51
; GREEDY908-NEXT: v_accvgpr_read_b32 v1, a52
; GREEDY908-NEXT: v_accvgpr_write_b32 a20, v2
; GREEDY908-NEXT: v_accvgpr_write_b32 a21, v6
; GREEDY908-NEXT: v_accvgpr_write_b32 a22, v1
; GREEDY908-NEXT: v_accvgpr_read_b32 v2, a53
; GREEDY908-NEXT: v_accvgpr_read_b32 v6, a54
; GREEDY908-NEXT: v_accvgpr_read_b32 v1, a55
; GREEDY908-NEXT: v_accvgpr_write_b32 a23, v2
; GREEDY908-NEXT: v_accvgpr_write_b32 a24, v6
; GREEDY908-NEXT: v_accvgpr_write_b32 a25, v1
; GREEDY908-NEXT: v_accvgpr_read_b32 v2, a56
; GREEDY908-NEXT: v_accvgpr_read_b32 v6, a57
; GREEDY908-NEXT: v_accvgpr_read_b32 v1, a58
; GREEDY908-NEXT: v_accvgpr_write_b32 a26, v2
; GREEDY908-NEXT: v_accvgpr_write_b32 a27, v6
; GREEDY908-NEXT: v_accvgpr_write_b32 a28, v1
; GREEDY908-NEXT: v_accvgpr_read_b32 v2, a59
; GREEDY908-NEXT: v_accvgpr_read_b32 v6, a60
; GREEDY908-NEXT: v_accvgpr_read_b32 v1, a61
; GREEDY908-NEXT: v_accvgpr_write_b32 a29, v2
; GREEDY908-NEXT: v_accvgpr_write_b32 a30, v6
; GREEDY908-NEXT: v_accvgpr_write_b32 a31, v1
; GREEDY908-NEXT: s_nop 0
; GREEDY908-NEXT: v_mfma_f32_32x32x1f32 a[0:31], v3, v0, a[0:31]
; GREEDY908-NEXT: s_nop 15
; GREEDY908-NEXT: s_nop 1
; GREEDY908-NEXT: v_accvgpr_read_b32 v3, a27
; GREEDY908-NEXT: v_accvgpr_read_b32 v2, a26
; GREEDY908-NEXT: v_accvgpr_read_b32 v1, a25
; GREEDY908-NEXT: v_accvgpr_read_b32 v0, a24
; GREEDY908-NEXT: s_nop 1
; GREEDY908-NEXT: global_store_dwordx4 v4, v[0:3], s[34:35] offset:96
; GREEDY908-NEXT: s_nop 0
; GREEDY908-NEXT: v_accvgpr_read_b32 v3, a31
; GREEDY908-NEXT: v_accvgpr_read_b32 v2, a30
; GREEDY908-NEXT: v_accvgpr_read_b32 v1, a29
; GREEDY908-NEXT: v_accvgpr_read_b32 v0, a28
; GREEDY908-NEXT: s_nop 1
; GREEDY908-NEXT: global_store_dwordx4 v4, v[0:3], s[34:35] offset:112
; GREEDY908-NEXT: s_nop 0
; GREEDY908-NEXT: v_accvgpr_read_b32 v3, a19
; GREEDY908-NEXT: v_accvgpr_read_b32 v2, a18
; GREEDY908-NEXT: v_accvgpr_read_b32 v1, a17
; GREEDY908-NEXT: v_accvgpr_read_b32 v0, a16
; GREEDY908-NEXT: s_nop 1
; GREEDY908-NEXT: global_store_dwordx4 v4, v[0:3], s[34:35] offset:64
; GREEDY908-NEXT: s_nop 0
; GREEDY908-NEXT: v_accvgpr_read_b32 v3, a23
; GREEDY908-NEXT: v_accvgpr_read_b32 v2, a22
; GREEDY908-NEXT: v_accvgpr_read_b32 v1, a21
; GREEDY908-NEXT: v_accvgpr_read_b32 v0, a20
; GREEDY908-NEXT: s_nop 1
; GREEDY908-NEXT: global_store_dwordx4 v4, v[0:3], s[34:35] offset:80
; GREEDY908-NEXT: s_nop 0
; GREEDY908-NEXT: v_accvgpr_read_b32 v3, a11
; GREEDY908-NEXT: v_accvgpr_read_b32 v2, a10
; GREEDY908-NEXT: v_accvgpr_read_b32 v1, a9
; GREEDY908-NEXT: v_accvgpr_read_b32 v0, a8
; GREEDY908-NEXT: s_nop 1
; GREEDY908-NEXT: global_store_dwordx4 v4, v[0:3], s[34:35] offset:32
; GREEDY908-NEXT: s_nop 0
; GREEDY908-NEXT: v_accvgpr_read_b32 v3, a15
; GREEDY908-NEXT: v_accvgpr_read_b32 v2, a14
; GREEDY908-NEXT: v_accvgpr_read_b32 v1, a13
; GREEDY908-NEXT: v_accvgpr_read_b32 v0, a12
; GREEDY908-NEXT: s_nop 1
; GREEDY908-NEXT: global_store_dwordx4 v4, v[0:3], s[34:35] offset:48
; GREEDY908-NEXT: s_nop 0
; GREEDY908-NEXT: v_accvgpr_read_b32 v3, a3
; GREEDY908-NEXT: v_accvgpr_read_b32 v2, a2
; GREEDY908-NEXT: v_accvgpr_read_b32 v1, a1
; GREEDY908-NEXT: v_accvgpr_read_b32 v0, a0
; GREEDY908-NEXT: s_nop 1
; GREEDY908-NEXT: global_store_dwordx4 v4, v[0:3], s[34:35]
; GREEDY908-NEXT: s_nop 0
; GREEDY908-NEXT: v_accvgpr_read_b32 v3, a7
; GREEDY908-NEXT: v_accvgpr_read_b32 v2, a6
; GREEDY908-NEXT: v_accvgpr_read_b32 v1, a5
; GREEDY908-NEXT: v_accvgpr_read_b32 v0, a4
; GREEDY908-NEXT: s_nop 1
; GREEDY908-NEXT: global_store_dwordx4 v4, v[0:3], s[34:35] offset:16
; GREEDY908-NEXT: s_endpgm
;
; GREEDY90A-LABEL: test_mfma_f32_32x32x1f32:
; GREEDY90A: ; %bb.0: ; %bb
; GREEDY90A-NEXT: s_load_dwordx2 s[34:35], s[4:5], 0x24
; GREEDY90A-NEXT: v_mov_b32_e32 v64, 1.0
; GREEDY90A-NEXT: v_mov_b32_e32 v65, 2.0
; GREEDY90A-NEXT: s_waitcnt lgkmcnt(0)
; GREEDY90A-NEXT: s_load_dwordx16 s[16:31], s[34:35], 0x0
; GREEDY90A-NEXT: s_load_dwordx16 s[0:15], s[34:35], 0x40
; GREEDY90A-NEXT: s_waitcnt lgkmcnt(0)
; GREEDY90A-NEXT: v_mov_b32_e32 v0, s16
; GREEDY90A-NEXT: v_mov_b32_e32 v1, s17
; GREEDY90A-NEXT: v_mov_b32_e32 v2, s18
; GREEDY90A-NEXT: v_mov_b32_e32 v3, s19
; GREEDY90A-NEXT: v_mov_b32_e32 v4, s20
; GREEDY90A-NEXT: v_mov_b32_e32 v5, s21
; GREEDY90A-NEXT: v_mov_b32_e32 v6, s22
; GREEDY90A-NEXT: v_mov_b32_e32 v7, s23
; GREEDY90A-NEXT: v_mov_b32_e32 v8, s24
; GREEDY90A-NEXT: v_mov_b32_e32 v9, s25
; GREEDY90A-NEXT: v_mov_b32_e32 v10, s26
; GREEDY90A-NEXT: v_mov_b32_e32 v11, s27
; GREEDY90A-NEXT: v_mov_b32_e32 v12, s28
; GREEDY90A-NEXT: v_mov_b32_e32 v13, s29
; GREEDY90A-NEXT: v_mov_b32_e32 v14, s30
; GREEDY90A-NEXT: v_mov_b32_e32 v15, s31
; GREEDY90A-NEXT: v_mov_b32_e32 v16, s0
; GREEDY90A-NEXT: v_mov_b32_e32 v17, s1
; GREEDY90A-NEXT: v_mov_b32_e32 v18, s2
; GREEDY90A-NEXT: v_mov_b32_e32 v19, s3
; GREEDY90A-NEXT: v_mov_b32_e32 v20, s4
; GREEDY90A-NEXT: v_mov_b32_e32 v21, s5
; GREEDY90A-NEXT: v_mov_b32_e32 v22, s6
; GREEDY90A-NEXT: v_mov_b32_e32 v23, s7
; GREEDY90A-NEXT: v_mov_b32_e32 v24, s8
; GREEDY90A-NEXT: v_mov_b32_e32 v25, s9
; GREEDY90A-NEXT: v_mov_b32_e32 v26, s10
; GREEDY90A-NEXT: v_mov_b32_e32 v27, s11
; GREEDY90A-NEXT: v_mov_b32_e32 v28, s12
; GREEDY90A-NEXT: v_mov_b32_e32 v29, s13
; GREEDY90A-NEXT: v_mov_b32_e32 v30, s14
; GREEDY90A-NEXT: v_mov_b32_e32 v31, s15
; GREEDY90A-NEXT: s_nop 1
; GREEDY90A-NEXT: v_mfma_f32_32x32x1f32 v[0:31], v64, v65, v[0:31]
; GREEDY90A-NEXT: v_mfma_f32_32x32x1f32 v[32:63], v64, v65, v[0:31]
; GREEDY90A-NEXT: s_nop 15
; GREEDY90A-NEXT: s_nop 2
; GREEDY90A-NEXT: v_mov_b32_e32 v2, v32
; GREEDY90A-NEXT: v_mov_b32_e32 v3, v33
; GREEDY90A-NEXT: v_mov_b32_e32 v4, v34
; GREEDY90A-NEXT: v_mov_b32_e32 v5, v35
; GREEDY90A-NEXT: v_mov_b32_e32 v6, v36
; GREEDY90A-NEXT: v_mov_b32_e32 v7, v37
; GREEDY90A-NEXT: v_mov_b32_e32 v8, v38
; GREEDY90A-NEXT: v_mov_b32_e32 v9, v39
; GREEDY90A-NEXT: v_mov_b32_e32 v10, v40
; GREEDY90A-NEXT: v_mov_b32_e32 v11, v41
; GREEDY90A-NEXT: v_mov_b32_e32 v12, v42
; GREEDY90A-NEXT: v_mov_b32_e32 v13, v43
; GREEDY90A-NEXT: v_mov_b32_e32 v14, v44
; GREEDY90A-NEXT: v_mov_b32_e32 v15, v45
; GREEDY90A-NEXT: v_mov_b32_e32 v16, v46
; GREEDY90A-NEXT: v_mov_b32_e32 v17, v47
; GREEDY90A-NEXT: v_mov_b32_e32 v18, v48
; GREEDY90A-NEXT: v_mov_b32_e32 v19, v49
; GREEDY90A-NEXT: v_mov_b32_e32 v20, v50
; GREEDY90A-NEXT: v_mov_b32_e32 v21, v51
; GREEDY90A-NEXT: v_mov_b32_e32 v22, v52
; GREEDY90A-NEXT: v_mov_b32_e32 v23, v53
; GREEDY90A-NEXT: v_mov_b32_e32 v24, v54
; GREEDY90A-NEXT: v_mov_b32_e32 v25, v55
; GREEDY90A-NEXT: v_mov_b32_e32 v26, v56
; GREEDY90A-NEXT: v_mov_b32_e32 v27, v57
; GREEDY90A-NEXT: v_mov_b32_e32 v28, v58
; GREEDY90A-NEXT: v_mov_b32_e32 v29, v59
; GREEDY90A-NEXT: v_mov_b32_e32 v30, v60
; GREEDY90A-NEXT: v_mov_b32_e32 v31, v61
; GREEDY90A-NEXT: v_mov_b32_e32 v32, 0
; GREEDY90A-NEXT: s_nop 0
; GREEDY90A-NEXT: v_mfma_f32_32x32x1f32 v[0:31], v64, v65, v[0:31]
; GREEDY90A-NEXT: s_nop 15
; GREEDY90A-NEXT: s_nop 2
; GREEDY90A-NEXT: global_store_dwordx4 v32, v[24:27], s[34:35] offset:96
; GREEDY90A-NEXT: global_store_dwordx4 v32, v[28:31], s[34:35] offset:112
; GREEDY90A-NEXT: global_store_dwordx4 v32, v[16:19], s[34:35] offset:64
; GREEDY90A-NEXT: global_store_dwordx4 v32, v[20:23], s[34:35] offset:80
; GREEDY90A-NEXT: global_store_dwordx4 v32, v[8:11], s[34:35] offset:32
; GREEDY90A-NEXT: global_store_dwordx4 v32, v[12:15], s[34:35] offset:48
; GREEDY90A-NEXT: global_store_dwordx4 v32, v[0:3], s[34:35]
; GREEDY90A-NEXT: global_store_dwordx4 v32, v[4:7], s[34:35] offset:16
; GREEDY90A-NEXT: s_endpgm
;
; GREEDY942-LABEL: test_mfma_f32_32x32x1f32:
; GREEDY942: ; %bb.0: ; %bb
; GREEDY942-NEXT: s_load_dwordx2 s[34:35], s[4:5], 0x24
; GREEDY942-NEXT: v_mov_b32_e32 v64, 1.0
; GREEDY942-NEXT: v_mov_b32_e32 v65, 2.0
; GREEDY942-NEXT: s_waitcnt lgkmcnt(0)
; GREEDY942-NEXT: s_load_dwordx16 s[16:31], s[34:35], 0x0
; GREEDY942-NEXT: s_load_dwordx16 s[0:15], s[34:35], 0x40
; GREEDY942-NEXT: s_waitcnt lgkmcnt(0)
; GREEDY942-NEXT: v_mov_b32_e32 v0, s16
; GREEDY942-NEXT: v_mov_b32_e32 v1, s17
; GREEDY942-NEXT: v_mov_b32_e32 v2, s18
; GREEDY942-NEXT: v_mov_b32_e32 v3, s19
; GREEDY942-NEXT: v_mov_b32_e32 v4, s20
; GREEDY942-NEXT: v_mov_b32_e32 v5, s21
; GREEDY942-NEXT: v_mov_b32_e32 v6, s22
; GREEDY942-NEXT: v_mov_b32_e32 v7, s23
; GREEDY942-NEXT: v_mov_b32_e32 v8, s24
; GREEDY942-NEXT: v_mov_b32_e32 v9, s25
; GREEDY942-NEXT: v_mov_b32_e32 v10, s26
; GREEDY942-NEXT: v_mov_b32_e32 v11, s27
; GREEDY942-NEXT: v_mov_b32_e32 v12, s28
; GREEDY942-NEXT: v_mov_b32_e32 v13, s29
; GREEDY942-NEXT: v_mov_b32_e32 v14, s30
; GREEDY942-NEXT: v_mov_b32_e32 v15, s31
; GREEDY942-NEXT: v_mov_b32_e32 v16, s0
; GREEDY942-NEXT: v_mov_b32_e32 v17, s1
; GREEDY942-NEXT: v_mov_b32_e32 v18, s2
; GREEDY942-NEXT: v_mov_b32_e32 v19, s3
; GREEDY942-NEXT: v_mov_b32_e32 v20, s4
; GREEDY942-NEXT: v_mov_b32_e32 v21, s5
; GREEDY942-NEXT: v_mov_b32_e32 v22, s6
; GREEDY942-NEXT: v_mov_b32_e32 v23, s7
; GREEDY942-NEXT: v_mov_b32_e32 v24, s8
; GREEDY942-NEXT: v_mov_b32_e32 v25, s9
; GREEDY942-NEXT: v_mov_b32_e32 v26, s10
; GREEDY942-NEXT: v_mov_b32_e32 v27, s11
; GREEDY942-NEXT: v_mov_b32_e32 v28, s12
; GREEDY942-NEXT: v_mov_b32_e32 v29, s13
; GREEDY942-NEXT: v_mov_b32_e32 v30, s14
; GREEDY942-NEXT: v_mov_b32_e32 v31, s15
; GREEDY942-NEXT: s_nop 1
; GREEDY942-NEXT: v_mfma_f32_32x32x1_2b_f32 v[0:31], v64, v65, v[0:31]
; GREEDY942-NEXT: v_mfma_f32_32x32x1_2b_f32 v[32:63], v64, v65, v[0:31]
; GREEDY942-NEXT: s_nop 15
; GREEDY942-NEXT: s_nop 1
; GREEDY942-NEXT: v_mov_b32_e32 v2, v32
; GREEDY942-NEXT: v_mov_b32_e32 v3, v33
; GREEDY942-NEXT: v_mov_b32_e32 v4, v34
; GREEDY942-NEXT: v_mov_b32_e32 v5, v35
; GREEDY942-NEXT: v_mov_b32_e32 v6, v36
; GREEDY942-NEXT: v_mov_b32_e32 v7, v37
; GREEDY942-NEXT: v_mov_b32_e32 v8, v38
; GREEDY942-NEXT: v_mov_b32_e32 v9, v39
; GREEDY942-NEXT: v_mov_b32_e32 v10, v40
; GREEDY942-NEXT: v_mov_b32_e32 v11, v41
; GREEDY942-NEXT: v_mov_b32_e32 v12, v42
; GREEDY942-NEXT: v_mov_b32_e32 v13, v43
; GREEDY942-NEXT: v_mov_b32_e32 v14, v44
; GREEDY942-NEXT: v_mov_b32_e32 v15, v45
; GREEDY942-NEXT: v_mov_b32_e32 v16, v46
; GREEDY942-NEXT: v_mov_b32_e32 v17, v47
; GREEDY942-NEXT: v_mov_b32_e32 v18, v48
; GREEDY942-NEXT: v_mov_b32_e32 v19, v49
; GREEDY942-NEXT: v_mov_b32_e32 v20, v50
; GREEDY942-NEXT: v_mov_b32_e32 v21, v51
; GREEDY942-NEXT: v_mov_b32_e32 v22, v52
; GREEDY942-NEXT: v_mov_b32_e32 v23, v53
; GREEDY942-NEXT: v_mov_b32_e32 v24, v54
; GREEDY942-NEXT: v_mov_b32_e32 v25, v55
; GREEDY942-NEXT: v_mov_b32_e32 v26, v56
; GREEDY942-NEXT: v_mov_b32_e32 v27, v57
; GREEDY942-NEXT: v_mov_b32_e32 v28, v58
; GREEDY942-NEXT: v_mov_b32_e32 v29, v59
; GREEDY942-NEXT: v_mov_b32_e32 v30, v60
; GREEDY942-NEXT: v_mov_b32_e32 v31, v61
; GREEDY942-NEXT: v_mov_b32_e32 v32, 0
; GREEDY942-NEXT: s_nop 0
; GREEDY942-NEXT: v_mfma_f32_32x32x1_2b_f32 v[0:31], v64, v65, v[0:31]
; GREEDY942-NEXT: s_nop 15
; GREEDY942-NEXT: s_nop 1
; GREEDY942-NEXT: global_store_dwordx4 v32, v[24:27], s[34:35] offset:96
; GREEDY942-NEXT: global_store_dwordx4 v32, v[28:31], s[34:35] offset:112
; GREEDY942-NEXT: global_store_dwordx4 v32, v[16:19], s[34:35] offset:64
; GREEDY942-NEXT: global_store_dwordx4 v32, v[20:23], s[34:35] offset:80
; GREEDY942-NEXT: global_store_dwordx4 v32, v[8:11], s[34:35] offset:32
; GREEDY942-NEXT: global_store_dwordx4 v32, v[12:15], s[34:35] offset:48
; GREEDY942-NEXT: global_store_dwordx4 v32, v[0:3], s[34:35]
; GREEDY942-NEXT: global_store_dwordx4 v32, v[4:7], s[34:35] offset:16
; GREEDY942-NEXT: s_endpgm
;
; GREEDY90A-GISEL-LABEL: test_mfma_f32_32x32x1f32:
; GREEDY90A-GISEL: ; %bb.0: ; %bb
; GREEDY90A-GISEL-NEXT: s_load_dwordx2 s[34:35], s[4:5], 0x24
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v64, 1.0
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v65, 2.0
; GREEDY90A-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GREEDY90A-GISEL-NEXT: s_load_dwordx16 s[0:15], s[34:35], 0x0
; GREEDY90A-GISEL-NEXT: s_load_dwordx16 s[16:31], s[34:35], 0x40
; GREEDY90A-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[0:1], s[0:1], s[0:1] op_sel:[0,1]
; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[2:3], s[2:3], s[2:3] op_sel:[0,1]
; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[4:5], s[4:5], s[4:5] op_sel:[0,1]
; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[6:7], s[6:7], s[6:7] op_sel:[0,1]
; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[8:9], s[8:9], s[8:9] op_sel:[0,1]
; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[10:11], s[10:11], s[10:11] op_sel:[0,1]
; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[12:13], s[12:13], s[12:13] op_sel:[0,1]
; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[14:15], s[14:15], s[14:15] op_sel:[0,1]
; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[16:17], s[16:17], s[16:17] op_sel:[0,1]
; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[18:19], s[18:19], s[18:19] op_sel:[0,1]
; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[20:21], s[20:21], s[20:21] op_sel:[0,1]
; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[22:23], s[22:23], s[22:23] op_sel:[0,1]
; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[24:25], s[24:25], s[24:25] op_sel:[0,1]
; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[26:27], s[26:27], s[26:27] op_sel:[0,1]
; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[28:29], s[28:29], s[28:29] op_sel:[0,1]
; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[30:31], s[30:31], s[30:31] op_sel:[0,1]
; GREEDY90A-GISEL-NEXT: s_nop 1
; GREEDY90A-GISEL-NEXT: v_mfma_f32_32x32x1f32 v[0:31], v64, v65, v[0:31]
; GREEDY90A-GISEL-NEXT: v_mfma_f32_32x32x1f32 v[32:63], v64, v65, v[0:31]
; GREEDY90A-GISEL-NEXT: s_nop 15
; GREEDY90A-GISEL-NEXT: s_nop 2
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v2, v32
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v3, v33
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v4, v34
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v5, v35
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v6, v36
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v7, v37
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v8, v38
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v9, v39
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v10, v40
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v11, v41
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v12, v42
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v13, v43
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v14, v44
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v15, v45
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v16, v46
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v17, v47
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v18, v48
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v19, v49
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v20, v50
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v21, v51
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v22, v52
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v23, v53
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v24, v54
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v25, v55
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v26, v56
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v27, v57
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v28, v58
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v29, v59
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v30, v60
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v31, v61
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v32, 0
; GREEDY90A-GISEL-NEXT: s_nop 0
; GREEDY90A-GISEL-NEXT: v_mfma_f32_32x32x1f32 v[0:31], v64, v65, v[0:31]
; GREEDY90A-GISEL-NEXT: s_nop 15
; GREEDY90A-GISEL-NEXT: s_nop 2
; GREEDY90A-GISEL-NEXT: global_store_dwordx4 v32, v[0:3], s[34:35]
; GREEDY90A-GISEL-NEXT: global_store_dwordx4 v32, v[4:7], s[34:35] offset:16
; GREEDY90A-GISEL-NEXT: global_store_dwordx4 v32, v[8:11], s[34:35] offset:32
; GREEDY90A-GISEL-NEXT: global_store_dwordx4 v32, v[12:15], s[34:35] offset:48
; GREEDY90A-GISEL-NEXT: global_store_dwordx4 v32, v[16:19], s[34:35] offset:64
; GREEDY90A-GISEL-NEXT: global_store_dwordx4 v32, v[20:23], s[34:35] offset:80
; GREEDY90A-GISEL-NEXT: global_store_dwordx4 v32, v[24:27], s[34:35] offset:96
; GREEDY90A-GISEL-NEXT: global_store_dwordx4 v32, v[28:31], s[34:35] offset:112
; GREEDY90A-GISEL-NEXT: s_endpgm
;
; FAST90A-LABEL: test_mfma_f32_32x32x1f32:
; FAST90A: ; %bb.0: ; %bb
; FAST90A-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; FAST90A-NEXT: v_mov_b32_e32 v1, 1.0
; FAST90A-NEXT: v_mov_b32_e32 v34, 2.0
; FAST90A-NEXT: v_mov_b32_e32 v0, 0
; FAST90A-NEXT: s_waitcnt lgkmcnt(0)
; FAST90A-NEXT: s_load_dwordx16 s[36:51], s[0:1], 0x0
; FAST90A-NEXT: s_load_dwordx16 s[4:19], s[0:1], 0x40
; FAST90A-NEXT: s_waitcnt lgkmcnt(0)
; FAST90A-NEXT: v_mov_b32_e32 v2, s36
; FAST90A-NEXT: v_mov_b32_e32 v3, s37
; FAST90A-NEXT: v_mov_b32_e32 v4, s38
; FAST90A-NEXT: v_mov_b32_e32 v5, s39
; FAST90A-NEXT: v_mov_b32_e32 v6, s40
; FAST90A-NEXT: v_mov_b32_e32 v7, s41
; FAST90A-NEXT: v_mov_b32_e32 v8, s42
; FAST90A-NEXT: v_mov_b32_e32 v9, s43
; FAST90A-NEXT: v_mov_b32_e32 v10, s44
; FAST90A-NEXT: v_mov_b32_e32 v11, s45
; FAST90A-NEXT: v_mov_b32_e32 v12, s46
; FAST90A-NEXT: v_mov_b32_e32 v13, s47
; FAST90A-NEXT: v_mov_b32_e32 v14, s48
; FAST90A-NEXT: v_mov_b32_e32 v15, s49
; FAST90A-NEXT: v_mov_b32_e32 v16, s50
; FAST90A-NEXT: v_mov_b32_e32 v17, s51
; FAST90A-NEXT: v_mov_b32_e32 v18, s4
; FAST90A-NEXT: v_mov_b32_e32 v19, s5
; FAST90A-NEXT: v_mov_b32_e32 v20, s6
; FAST90A-NEXT: v_mov_b32_e32 v21, s7
; FAST90A-NEXT: v_mov_b32_e32 v22, s8
; FAST90A-NEXT: v_mov_b32_e32 v23, s9
; FAST90A-NEXT: v_mov_b32_e32 v24, s10
; FAST90A-NEXT: v_mov_b32_e32 v25, s11
; FAST90A-NEXT: v_mov_b32_e32 v26, s12
; FAST90A-NEXT: v_mov_b32_e32 v27, s13
; FAST90A-NEXT: v_mov_b32_e32 v28, s14
; FAST90A-NEXT: v_mov_b32_e32 v29, s15
; FAST90A-NEXT: v_mov_b32_e32 v30, s16
; FAST90A-NEXT: v_mov_b32_e32 v31, s17
; FAST90A-NEXT: v_mov_b32_e32 v32, s18
; FAST90A-NEXT: v_mov_b32_e32 v33, s19
; FAST90A-NEXT: s_nop 1
; FAST90A-NEXT: v_mfma_f32_32x32x1f32 v[2:33], v1, v34, v[2:33]
; FAST90A-NEXT: v_mfma_f32_32x32x1f32 v[36:67], v1, v34, v[2:33]
; FAST90A-NEXT: s_nop 15
; FAST90A-NEXT: s_nop 2
; FAST90A-NEXT: v_mov_b32_e32 v4, v36
; FAST90A-NEXT: v_mov_b32_e32 v5, v37
; FAST90A-NEXT: v_mov_b32_e32 v6, v38
; FAST90A-NEXT: v_mov_b32_e32 v7, v39
; FAST90A-NEXT: v_mov_b32_e32 v8, v40
; FAST90A-NEXT: v_mov_b32_e32 v9, v41
; FAST90A-NEXT: v_mov_b32_e32 v10, v42
; FAST90A-NEXT: v_mov_b32_e32 v11, v43
; FAST90A-NEXT: v_mov_b32_e32 v12, v44
; FAST90A-NEXT: v_mov_b32_e32 v13, v45
; FAST90A-NEXT: v_mov_b32_e32 v14, v46
; FAST90A-NEXT: v_mov_b32_e32 v15, v47
; FAST90A-NEXT: v_mov_b32_e32 v16, v48
; FAST90A-NEXT: v_mov_b32_e32 v17, v49
; FAST90A-NEXT: v_mov_b32_e32 v18, v50
; FAST90A-NEXT: v_mov_b32_e32 v19, v51
; FAST90A-NEXT: v_mov_b32_e32 v20, v52
; FAST90A-NEXT: v_mov_b32_e32 v21, v53
; FAST90A-NEXT: v_mov_b32_e32 v22, v54
; FAST90A-NEXT: v_mov_b32_e32 v23, v55
; FAST90A-NEXT: v_mov_b32_e32 v24, v56
; FAST90A-NEXT: v_mov_b32_e32 v25, v57
; FAST90A-NEXT: v_mov_b32_e32 v26, v58
; FAST90A-NEXT: v_mov_b32_e32 v27, v59
; FAST90A-NEXT: v_mov_b32_e32 v28, v60
; FAST90A-NEXT: v_mov_b32_e32 v29, v61
; FAST90A-NEXT: v_mov_b32_e32 v30, v62
; FAST90A-NEXT: v_mov_b32_e32 v31, v63
; FAST90A-NEXT: v_mov_b32_e32 v32, v64
; FAST90A-NEXT: v_mov_b32_e32 v33, v65
; FAST90A-NEXT: s_nop 1
; FAST90A-NEXT: v_mfma_f32_32x32x1f32 v[2:33], v1, v34, v[2:33]
; FAST90A-NEXT: s_nop 15
; FAST90A-NEXT: s_nop 2
; FAST90A-NEXT: global_store_dwordx4 v0, v[26:29], s[0:1] offset:96
; FAST90A-NEXT: global_store_dwordx4 v0, v[30:33], s[0:1] offset:112
; FAST90A-NEXT: global_store_dwordx4 v0, v[18:21], s[0:1] offset:64
; FAST90A-NEXT: global_store_dwordx4 v0, v[22:25], s[0:1] offset:80
; FAST90A-NEXT: global_store_dwordx4 v0, v[10:13], s[0:1] offset:32
; FAST90A-NEXT: global_store_dwordx4 v0, v[14:17], s[0:1] offset:48
; FAST90A-NEXT: global_store_dwordx4 v0, v[2:5], s[0:1]
; FAST90A-NEXT: global_store_dwordx4 v0, v[6:9], s[0:1] offset:16
; FAST90A-NEXT: s_endpgm
bb:
%in.1 = load <32 x float>, ptr addrspace(1) %arg
%mai.1 = tail call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float 1.0, float 2.0, <32 x float> %in.1, i32 0, i32 0, i32 0)
%mai.2 = tail call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float 1.0, float 2.0, <32 x float> %mai.1, i32 0, i32 0, i32 0)
%tmp.1 = shufflevector <32 x float> %mai.2, <32 x float> %mai.1, <32 x i32> <i32 32, i32 33, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29>
%mai.3 = tail call <32 x float> @llvm.amdgcn.mfma.f32.32x32x1f32(float 1.0, float 2.0, <32 x float> %tmp.1, i32 0, i32 0, i32 0)
store <32 x float> %mai.3, ptr addrspace(1) %arg
ret void
}
define amdgpu_kernel void @test_mfma_f32_16x16x1f32(ptr addrspace(1) %arg) #0 {
; GREEDY908-LABEL: test_mfma_f32_16x16x1f32:
; GREEDY908: ; %bb.0: ; %bb
; GREEDY908-NEXT: s_load_dwordx2 s[16:17], s[4:5], 0x24
; GREEDY908-NEXT: v_mov_b32_e32 v0, 1.0
; GREEDY908-NEXT: v_mov_b32_e32 v4, 0
; GREEDY908-NEXT: s_waitcnt lgkmcnt(0)
; GREEDY908-NEXT: s_load_dwordx16 s[0:15], s[16:17], 0x0
; GREEDY908-NEXT: s_waitcnt lgkmcnt(0)
; GREEDY908-NEXT: v_mov_b32_e32 v5, s15
; GREEDY908-NEXT: v_mov_b32_e32 v2, s14
; GREEDY908-NEXT: v_mov_b32_e32 v1, s13
; GREEDY908-NEXT: v_accvgpr_write_b32 a33, v5
; GREEDY908-NEXT: v_mov_b32_e32 v5, s12
; GREEDY908-NEXT: v_accvgpr_write_b32 a32, v2
; GREEDY908-NEXT: v_accvgpr_write_b32 a31, v1
; GREEDY908-NEXT: v_accvgpr_write_b32 a30, v5
; GREEDY908-NEXT: v_mov_b32_e32 v2, s11
; GREEDY908-NEXT: v_mov_b32_e32 v1, s10
; GREEDY908-NEXT: v_mov_b32_e32 v5, s9
; GREEDY908-NEXT: v_accvgpr_write_b32 a29, v2
; GREEDY908-NEXT: v_accvgpr_write_b32 a28, v1
; GREEDY908-NEXT: v_accvgpr_write_b32 a27, v5
; GREEDY908-NEXT: v_mov_b32_e32 v2, s8
; GREEDY908-NEXT: v_mov_b32_e32 v1, s7
; GREEDY908-NEXT: v_mov_b32_e32 v5, s6
; GREEDY908-NEXT: v_accvgpr_write_b32 a26, v2
; GREEDY908-NEXT: v_accvgpr_write_b32 a25, v1
; GREEDY908-NEXT: v_accvgpr_write_b32 a24, v5
; GREEDY908-NEXT: v_mov_b32_e32 v2, s5
; GREEDY908-NEXT: v_mov_b32_e32 v1, s4
; GREEDY908-NEXT: v_mov_b32_e32 v5, s3
; GREEDY908-NEXT: v_accvgpr_write_b32 a23, v2
; GREEDY908-NEXT: v_accvgpr_write_b32 a22, v1
; GREEDY908-NEXT: v_accvgpr_write_b32 a21, v5
; GREEDY908-NEXT: v_mov_b32_e32 v2, s2
; GREEDY908-NEXT: v_mov_b32_e32 v1, s1
; GREEDY908-NEXT: v_mov_b32_e32 v5, s0
; GREEDY908-NEXT: v_accvgpr_write_b32 a20, v2
; GREEDY908-NEXT: v_accvgpr_write_b32 a19, v1
; GREEDY908-NEXT: v_accvgpr_write_b32 a18, v5
; GREEDY908-NEXT: v_mov_b32_e32 v1, 2.0
; GREEDY908-NEXT: s_nop 1
; GREEDY908-NEXT: v_mfma_f32_16x16x1f32 a[18:33], v0, v1, a[18:33]
; GREEDY908-NEXT: v_mfma_f32_16x16x1f32 a[2:17], v0, v1, a[18:33]
; GREEDY908-NEXT: s_nop 8
; GREEDY908-NEXT: v_accvgpr_read_b32 v5, a18
; GREEDY908-NEXT: v_accvgpr_read_b32 v2, a19
; GREEDY908-NEXT: s_nop 0
; GREEDY908-NEXT: v_accvgpr_write_b32 a0, v5
; GREEDY908-NEXT: v_accvgpr_write_b32 a1, v2
; GREEDY908-NEXT: s_nop 0
; GREEDY908-NEXT: v_mfma_f32_16x16x1f32 a[0:15], v0, v1, a[0:15]
; GREEDY908-NEXT: s_nop 9
; GREEDY908-NEXT: v_accvgpr_read_b32 v3, a15
; GREEDY908-NEXT: v_accvgpr_read_b32 v2, a14
; GREEDY908-NEXT: v_accvgpr_read_b32 v1, a13
; GREEDY908-NEXT: v_accvgpr_read_b32 v0, a12
; GREEDY908-NEXT: s_nop 1
; GREEDY908-NEXT: global_store_dwordx4 v4, v[0:3], s[16:17] offset:48
; GREEDY908-NEXT: s_nop 0
; GREEDY908-NEXT: v_accvgpr_read_b32 v3, a11
; GREEDY908-NEXT: v_accvgpr_read_b32 v2, a10
; GREEDY908-NEXT: v_accvgpr_read_b32 v1, a9
; GREEDY908-NEXT: v_accvgpr_read_b32 v0, a8
; GREEDY908-NEXT: s_nop 1
; GREEDY908-NEXT: global_store_dwordx4 v4, v[0:3], s[16:17] offset:32
; GREEDY908-NEXT: s_nop 0
; GREEDY908-NEXT: v_accvgpr_read_b32 v3, a7
; GREEDY908-NEXT: v_accvgpr_read_b32 v2, a6
; GREEDY908-NEXT: v_accvgpr_read_b32 v1, a5
; GREEDY908-NEXT: v_accvgpr_read_b32 v0, a4
; GREEDY908-NEXT: s_nop 1
; GREEDY908-NEXT: global_store_dwordx4 v4, v[0:3], s[16:17] offset:16
; GREEDY908-NEXT: s_nop 0
; GREEDY908-NEXT: v_accvgpr_read_b32 v3, a3
; GREEDY908-NEXT: v_accvgpr_read_b32 v2, a2
; GREEDY908-NEXT: v_accvgpr_read_b32 v1, a1
; GREEDY908-NEXT: v_accvgpr_read_b32 v0, a0
; GREEDY908-NEXT: s_nop 1
; GREEDY908-NEXT: global_store_dwordx4 v4, v[0:3], s[16:17]
; GREEDY908-NEXT: s_endpgm
;
; GREEDY90A-LABEL: test_mfma_f32_16x16x1f32:
; GREEDY90A: ; %bb.0: ; %bb
; GREEDY90A-NEXT: s_load_dwordx2 s[16:17], s[4:5], 0x24
; GREEDY90A-NEXT: v_mov_b32_e32 v32, 1.0
; GREEDY90A-NEXT: v_mov_b32_e32 v33, 2.0
; GREEDY90A-NEXT: s_waitcnt lgkmcnt(0)
; GREEDY90A-NEXT: s_load_dwordx16 s[0:15], s[16:17], 0x0
; GREEDY90A-NEXT: s_waitcnt lgkmcnt(0)
; GREEDY90A-NEXT: v_pk_mov_b32 v[0:1], s[0:1], s[0:1] op_sel:[0,1]
; GREEDY90A-NEXT: v_pk_mov_b32 v[2:3], s[2:3], s[2:3] op_sel:[0,1]
; GREEDY90A-NEXT: v_pk_mov_b32 v[4:5], s[4:5], s[4:5] op_sel:[0,1]
; GREEDY90A-NEXT: v_pk_mov_b32 v[6:7], s[6:7], s[6:7] op_sel:[0,1]
; GREEDY90A-NEXT: v_pk_mov_b32 v[8:9], s[8:9], s[8:9] op_sel:[0,1]
; GREEDY90A-NEXT: v_pk_mov_b32 v[10:11], s[10:11], s[10:11] op_sel:[0,1]
; GREEDY90A-NEXT: v_pk_mov_b32 v[12:13], s[12:13], s[12:13] op_sel:[0,1]
; GREEDY90A-NEXT: v_pk_mov_b32 v[14:15], s[14:15], s[14:15] op_sel:[0,1]
; GREEDY90A-NEXT: s_nop 1
; GREEDY90A-NEXT: v_mfma_f32_16x16x1f32 v[0:15], v32, v33, v[0:15]
; GREEDY90A-NEXT: v_mfma_f32_16x16x1f32 v[16:31], v32, v33, v[0:15]
; GREEDY90A-NEXT: s_nop 10
; GREEDY90A-NEXT: v_mov_b32_e32 v2, v16
; GREEDY90A-NEXT: v_mov_b32_e32 v3, v17
; GREEDY90A-NEXT: v_mov_b32_e32 v4, v18
; GREEDY90A-NEXT: v_mov_b32_e32 v5, v19
; GREEDY90A-NEXT: v_mov_b32_e32 v6, v20
; GREEDY90A-NEXT: v_mov_b32_e32 v7, v21
; GREEDY90A-NEXT: v_mov_b32_e32 v8, v22
; GREEDY90A-NEXT: v_mov_b32_e32 v9, v23
; GREEDY90A-NEXT: v_mov_b32_e32 v10, v24
; GREEDY90A-NEXT: v_mov_b32_e32 v11, v25
; GREEDY90A-NEXT: v_mov_b32_e32 v12, v26
; GREEDY90A-NEXT: v_mov_b32_e32 v13, v27
; GREEDY90A-NEXT: v_mov_b32_e32 v14, v28
; GREEDY90A-NEXT: v_mov_b32_e32 v15, v29
; GREEDY90A-NEXT: v_mov_b32_e32 v16, 0
; GREEDY90A-NEXT: s_nop 0
; GREEDY90A-NEXT: v_mfma_f32_16x16x1f32 v[0:15], v32, v33, v[0:15]
; GREEDY90A-NEXT: s_nop 10
; GREEDY90A-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17] offset:48
; GREEDY90A-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:32
; GREEDY90A-NEXT: global_store_dwordx4 v16, v[4:7], s[16:17] offset:16
; GREEDY90A-NEXT: global_store_dwordx4 v16, v[0:3], s[16:17]
; GREEDY90A-NEXT: s_endpgm
;
; GREEDY942-LABEL: test_mfma_f32_16x16x1f32:
; GREEDY942: ; %bb.0: ; %bb
; GREEDY942-NEXT: s_load_dwordx2 s[16:17], s[4:5], 0x24
; GREEDY942-NEXT: v_mov_b32_e32 v32, 1.0
; GREEDY942-NEXT: v_mov_b32_e32 v33, 2.0
; GREEDY942-NEXT: s_waitcnt lgkmcnt(0)
; GREEDY942-NEXT: s_load_dwordx16 s[0:15], s[16:17], 0x0
; GREEDY942-NEXT: s_waitcnt lgkmcnt(0)
; GREEDY942-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GREEDY942-NEXT: v_mov_b64_e32 v[2:3], s[2:3]
; GREEDY942-NEXT: v_mov_b64_e32 v[4:5], s[4:5]
; GREEDY942-NEXT: v_mov_b64_e32 v[6:7], s[6:7]
; GREEDY942-NEXT: v_mov_b64_e32 v[8:9], s[8:9]
; GREEDY942-NEXT: v_mov_b64_e32 v[10:11], s[10:11]
; GREEDY942-NEXT: v_mov_b64_e32 v[12:13], s[12:13]
; GREEDY942-NEXT: v_mov_b64_e32 v[14:15], s[14:15]
; GREEDY942-NEXT: s_nop 1
; GREEDY942-NEXT: v_mfma_f32_16x16x1_4b_f32 v[0:15], v32, v33, v[0:15]
; GREEDY942-NEXT: v_mfma_f32_16x16x1_4b_f32 v[16:31], v32, v33, v[0:15]
; GREEDY942-NEXT: s_nop 9
; GREEDY942-NEXT: v_mov_b32_e32 v2, v16
; GREEDY942-NEXT: v_mov_b32_e32 v3, v17
; GREEDY942-NEXT: v_mov_b32_e32 v4, v18
; GREEDY942-NEXT: v_mov_b32_e32 v5, v19
; GREEDY942-NEXT: v_mov_b32_e32 v6, v20
; GREEDY942-NEXT: v_mov_b32_e32 v7, v21
; GREEDY942-NEXT: v_mov_b32_e32 v8, v22
; GREEDY942-NEXT: v_mov_b32_e32 v9, v23
; GREEDY942-NEXT: v_mov_b32_e32 v10, v24
; GREEDY942-NEXT: v_mov_b32_e32 v11, v25
; GREEDY942-NEXT: v_mov_b32_e32 v12, v26
; GREEDY942-NEXT: v_mov_b32_e32 v13, v27
; GREEDY942-NEXT: v_mov_b32_e32 v14, v28
; GREEDY942-NEXT: v_mov_b32_e32 v15, v29
; GREEDY942-NEXT: v_mov_b32_e32 v16, 0
; GREEDY942-NEXT: s_nop 0
; GREEDY942-NEXT: v_mfma_f32_16x16x1_4b_f32 v[0:15], v32, v33, v[0:15]
; GREEDY942-NEXT: s_nop 9
; GREEDY942-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17] offset:48
; GREEDY942-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:32
; GREEDY942-NEXT: global_store_dwordx4 v16, v[4:7], s[16:17] offset:16
; GREEDY942-NEXT: global_store_dwordx4 v16, v[0:3], s[16:17]
; GREEDY942-NEXT: s_endpgm
;
; GREEDY90A-GISEL-LABEL: test_mfma_f32_16x16x1f32:
; GREEDY90A-GISEL: ; %bb.0: ; %bb
; GREEDY90A-GISEL-NEXT: s_load_dwordx2 s[16:17], s[4:5], 0x24
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v32, 1.0
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v33, 2.0
; GREEDY90A-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GREEDY90A-GISEL-NEXT: s_load_dwordx16 s[0:15], s[16:17], 0x0
; GREEDY90A-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[0:1], s[0:1], s[0:1] op_sel:[0,1]
; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[2:3], s[2:3], s[2:3] op_sel:[0,1]
; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[4:5], s[4:5], s[4:5] op_sel:[0,1]
; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[6:7], s[6:7], s[6:7] op_sel:[0,1]
; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[8:9], s[8:9], s[8:9] op_sel:[0,1]
; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[10:11], s[10:11], s[10:11] op_sel:[0,1]
; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[12:13], s[12:13], s[12:13] op_sel:[0,1]
; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[14:15], s[14:15], s[14:15] op_sel:[0,1]
; GREEDY90A-GISEL-NEXT: s_nop 1
; GREEDY90A-GISEL-NEXT: v_mfma_f32_16x16x1f32 v[0:15], v32, v33, v[0:15]
; GREEDY90A-GISEL-NEXT: v_mfma_f32_16x16x1f32 v[16:31], v32, v33, v[0:15]
; GREEDY90A-GISEL-NEXT: s_nop 10
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v2, v16
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v3, v17
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v4, v18
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v5, v19
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v6, v20
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v7, v21
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v8, v22
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v9, v23
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v10, v24
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v11, v25
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v12, v26
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v13, v27
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v14, v28
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v15, v29
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v16, 0
; GREEDY90A-GISEL-NEXT: s_nop 0
; GREEDY90A-GISEL-NEXT: v_mfma_f32_16x16x1f32 v[0:15], v32, v33, v[0:15]
; GREEDY90A-GISEL-NEXT: s_nop 10
; GREEDY90A-GISEL-NEXT: global_store_dwordx4 v16, v[0:3], s[16:17]
; GREEDY90A-GISEL-NEXT: global_store_dwordx4 v16, v[4:7], s[16:17] offset:16
; GREEDY90A-GISEL-NEXT: global_store_dwordx4 v16, v[8:11], s[16:17] offset:32
; GREEDY90A-GISEL-NEXT: global_store_dwordx4 v16, v[12:15], s[16:17] offset:48
; GREEDY90A-GISEL-NEXT: s_endpgm
;
; FAST90A-LABEL: test_mfma_f32_16x16x1f32:
; FAST90A: ; %bb.0: ; %bb
; FAST90A-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; FAST90A-NEXT: v_mov_b32_e32 v0, 1.0
; FAST90A-NEXT: v_mov_b32_e32 v1, 2.0
; FAST90A-NEXT: s_waitcnt lgkmcnt(0)
; FAST90A-NEXT: s_load_dwordx16 s[4:19], s[0:1], 0x0
; FAST90A-NEXT: s_waitcnt lgkmcnt(0)
; FAST90A-NEXT: v_pk_mov_b32 v[2:3], s[4:5], s[4:5] op_sel:[0,1]
; FAST90A-NEXT: v_pk_mov_b32 v[4:5], s[6:7], s[6:7] op_sel:[0,1]
; FAST90A-NEXT: v_pk_mov_b32 v[6:7], s[8:9], s[8:9] op_sel:[0,1]
; FAST90A-NEXT: v_pk_mov_b32 v[8:9], s[10:11], s[10:11] op_sel:[0,1]
; FAST90A-NEXT: v_pk_mov_b32 v[10:11], s[12:13], s[12:13] op_sel:[0,1]
; FAST90A-NEXT: v_pk_mov_b32 v[12:13], s[14:15], s[14:15] op_sel:[0,1]
; FAST90A-NEXT: v_pk_mov_b32 v[14:15], s[16:17], s[16:17] op_sel:[0,1]
; FAST90A-NEXT: v_pk_mov_b32 v[16:17], s[18:19], s[18:19] op_sel:[0,1]
; FAST90A-NEXT: s_nop 1
; FAST90A-NEXT: v_mfma_f32_16x16x1f32 v[2:17], v0, v1, v[2:17]
; FAST90A-NEXT: v_mfma_f32_16x16x1f32 v[18:33], v0, v1, v[2:17]
; FAST90A-NEXT: s_nop 10
; FAST90A-NEXT: v_mov_b32_e32 v4, v18
; FAST90A-NEXT: v_mov_b32_e32 v5, v19
; FAST90A-NEXT: v_mov_b32_e32 v6, v20
; FAST90A-NEXT: v_mov_b32_e32 v7, v21
; FAST90A-NEXT: v_mov_b32_e32 v8, v22
; FAST90A-NEXT: v_mov_b32_e32 v9, v23
; FAST90A-NEXT: v_mov_b32_e32 v10, v24
; FAST90A-NEXT: v_mov_b32_e32 v11, v25
; FAST90A-NEXT: v_mov_b32_e32 v12, v26
; FAST90A-NEXT: v_mov_b32_e32 v13, v27
; FAST90A-NEXT: v_mov_b32_e32 v14, v28
; FAST90A-NEXT: v_mov_b32_e32 v15, v29
; FAST90A-NEXT: v_mov_b32_e32 v16, v30
; FAST90A-NEXT: v_mov_b32_e32 v17, v31
; FAST90A-NEXT: s_nop 1
; FAST90A-NEXT: v_mfma_f32_16x16x1f32 v[2:17], v0, v1, v[2:17]
; FAST90A-NEXT: v_mov_b32_e32 v0, 0
; FAST90A-NEXT: s_nop 9
; FAST90A-NEXT: global_store_dwordx4 v0, v[14:17], s[0:1] offset:48
; FAST90A-NEXT: global_store_dwordx4 v0, v[10:13], s[0:1] offset:32
; FAST90A-NEXT: global_store_dwordx4 v0, v[6:9], s[0:1] offset:16
; FAST90A-NEXT: global_store_dwordx4 v0, v[2:5], s[0:1]
; FAST90A-NEXT: s_endpgm
bb:
%in.1 = load <16 x float>, ptr addrspace(1) %arg
%mai.1 = tail call <16 x float> @llvm.amdgcn.mfma.f32.16x16x1f32(float 1.0, float 2.0, <16 x float> %in.1, i32 0, i32 0, i32 0)
%mai.2 = tail call <16 x float> @llvm.amdgcn.mfma.f32.16x16x1f32(float 1.0, float 2.0, <16 x float> %mai.1, i32 0, i32 0, i32 0)
%tmp.1 = shufflevector <16 x float> %mai.2, <16 x float> %mai.1, <16 x i32> <i32 16, i32 17, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13>
%mai.3 = tail call <16 x float> @llvm.amdgcn.mfma.f32.16x16x1f32(float 1.0, float 2.0, <16 x float> %tmp.1, i32 0, i32 0, i32 0)
store <16 x float> %mai.3, ptr addrspace(1) %arg
ret void
}
; This instruction allows the overlap since it only read 4 registers.
define amdgpu_kernel void @test_mfma_f32_4x4x1f32(ptr addrspace(1) %arg) #0 {
; GREEDY908-LABEL: test_mfma_f32_4x4x1f32:
; GREEDY908: ; %bb.0: ; %bb
; GREEDY908-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x24
; GREEDY908-NEXT: v_mov_b32_e32 v0, 1.0
; GREEDY908-NEXT: v_mov_b32_e32 v1, 2.0
; GREEDY908-NEXT: v_mov_b32_e32 v4, 0
; GREEDY908-NEXT: s_waitcnt lgkmcnt(0)
; GREEDY908-NEXT: s_load_dwordx4 s[0:3], s[6:7], 0x0
; GREEDY908-NEXT: s_waitcnt lgkmcnt(0)
; GREEDY908-NEXT: v_mov_b32_e32 v5, s0
; GREEDY908-NEXT: v_mov_b32_e32 v2, s1
; GREEDY908-NEXT: v_mov_b32_e32 v3, s2
; GREEDY908-NEXT: v_accvgpr_write_b32 a0, v5
; GREEDY908-NEXT: v_mov_b32_e32 v5, s3
; GREEDY908-NEXT: v_accvgpr_write_b32 a1, v2
; GREEDY908-NEXT: v_accvgpr_write_b32 a2, v3
; GREEDY908-NEXT: v_accvgpr_write_b32 a3, v5
; GREEDY908-NEXT: s_nop 0
; GREEDY908-NEXT: v_mfma_f32_4x4x1f32 a[0:3], v0, v1, a[0:3]
; GREEDY908-NEXT: v_mfma_f32_4x4x1f32 a[2:5], v0, v1, a[0:3]
; GREEDY908-NEXT: s_nop 1
; GREEDY908-NEXT: v_mfma_f32_4x4x1f32 a[0:3], v0, v1, a[0:3]
; GREEDY908-NEXT: s_nop 3
; GREEDY908-NEXT: v_accvgpr_read_b32 v0, a0
; GREEDY908-NEXT: v_accvgpr_read_b32 v1, a1
; GREEDY908-NEXT: v_accvgpr_read_b32 v2, a2
; GREEDY908-NEXT: v_accvgpr_read_b32 v3, a3
; GREEDY908-NEXT: s_nop 1
; GREEDY908-NEXT: global_store_dwordx4 v4, v[0:3], s[6:7]
; GREEDY908-NEXT: s_endpgm
;
; GREEDY90A-LABEL: test_mfma_f32_4x4x1f32:
; GREEDY90A: ; %bb.0: ; %bb
; GREEDY90A-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x24
; GREEDY90A-NEXT: v_mov_b32_e32 v6, 1.0
; GREEDY90A-NEXT: v_mov_b32_e32 v7, 2.0
; GREEDY90A-NEXT: s_waitcnt lgkmcnt(0)
; GREEDY90A-NEXT: s_load_dwordx4 s[0:3], s[6:7], 0x0
; GREEDY90A-NEXT: s_waitcnt lgkmcnt(0)
; GREEDY90A-NEXT: v_pk_mov_b32 v[0:1], s[0:1], s[0:1] op_sel:[0,1]
; GREEDY90A-NEXT: v_pk_mov_b32 v[2:3], s[2:3], s[2:3] op_sel:[0,1]
; GREEDY90A-NEXT: s_nop 1
; GREEDY90A-NEXT: v_mfma_f32_4x4x1f32 v[0:3], v6, v7, v[0:3]
; GREEDY90A-NEXT: v_mfma_f32_4x4x1f32 v[2:5], v6, v7, v[0:3]
; GREEDY90A-NEXT: s_nop 1
; GREEDY90A-NEXT: v_mfma_f32_4x4x1f32 v[0:3], v6, v7, v[0:3]
; GREEDY90A-NEXT: s_nop 1
; GREEDY90A-NEXT: v_mov_b32_e32 v4, 0
; GREEDY90A-NEXT: s_nop 1
; GREEDY90A-NEXT: global_store_dwordx4 v4, v[0:3], s[6:7]
; GREEDY90A-NEXT: s_endpgm
;
; GREEDY942-LABEL: test_mfma_f32_4x4x1f32:
; GREEDY942: ; %bb.0: ; %bb
; GREEDY942-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x24
; GREEDY942-NEXT: v_mov_b32_e32 v6, 1.0
; GREEDY942-NEXT: v_mov_b32_e32 v7, 2.0
; GREEDY942-NEXT: s_waitcnt lgkmcnt(0)
; GREEDY942-NEXT: s_load_dwordx4 s[0:3], s[6:7], 0x0
; GREEDY942-NEXT: s_waitcnt lgkmcnt(0)
; GREEDY942-NEXT: v_mov_b64_e32 v[0:1], s[0:1]
; GREEDY942-NEXT: v_mov_b64_e32 v[2:3], s[2:3]
; GREEDY942-NEXT: s_nop 1
; GREEDY942-NEXT: v_mfma_f32_4x4x1_16b_f32 v[0:3], v6, v7, v[0:3]
; GREEDY942-NEXT: s_nop 1
; GREEDY942-NEXT: v_mfma_f32_4x4x1_16b_f32 v[2:5], v6, v7, v[0:3]
; GREEDY942-NEXT: s_nop 1
; GREEDY942-NEXT: v_mfma_f32_4x4x1_16b_f32 v[0:3], v6, v7, v[0:3]
; GREEDY942-NEXT: s_nop 0
; GREEDY942-NEXT: v_mov_b32_e32 v4, 0
; GREEDY942-NEXT: s_nop 1
; GREEDY942-NEXT: global_store_dwordx4 v4, v[0:3], s[6:7]
; GREEDY942-NEXT: s_endpgm
;
; GREEDY90A-GISEL-LABEL: test_mfma_f32_4x4x1f32:
; GREEDY90A-GISEL: ; %bb.0: ; %bb
; GREEDY90A-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x24
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v6, 1.0
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v7, 2.0
; GREEDY90A-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GREEDY90A-GISEL-NEXT: s_load_dwordx4 s[0:3], s[6:7], 0x0
; GREEDY90A-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[0:1], s[0:1], s[0:1] op_sel:[0,1]
; GREEDY90A-GISEL-NEXT: v_pk_mov_b32 v[2:3], s[2:3], s[2:3] op_sel:[0,1]
; GREEDY90A-GISEL-NEXT: s_nop 1
; GREEDY90A-GISEL-NEXT: v_mfma_f32_4x4x1f32 v[0:3], v6, v7, v[0:3]
; GREEDY90A-GISEL-NEXT: v_mfma_f32_4x4x1f32 v[2:5], v6, v7, v[0:3]
; GREEDY90A-GISEL-NEXT: s_nop 1
; GREEDY90A-GISEL-NEXT: v_mfma_f32_4x4x1f32 v[0:3], v6, v7, v[0:3]
; GREEDY90A-GISEL-NEXT: s_nop 1
; GREEDY90A-GISEL-NEXT: v_mov_b32_e32 v4, 0
; GREEDY90A-GISEL-NEXT: s_nop 1
; GREEDY90A-GISEL-NEXT: global_store_dwordx4 v4, v[0:3], s[6:7]
; GREEDY90A-GISEL-NEXT: s_endpgm
;
; FAST90A-LABEL: test_mfma_f32_4x4x1f32:
; FAST90A: ; %bb.0: ; %bb
; FAST90A-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; FAST90A-NEXT: v_mov_b32_e32 v1, 1.0
; FAST90A-NEXT: v_mov_b32_e32 v2, 2.0
; FAST90A-NEXT: v_mov_b32_e32 v0, 0
; FAST90A-NEXT: s_waitcnt lgkmcnt(0)
; FAST90A-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x0
; FAST90A-NEXT: s_waitcnt lgkmcnt(0)
; FAST90A-NEXT: v_pk_mov_b32 v[4:5], s[4:5], s[4:5] op_sel:[0,1]
; FAST90A-NEXT: v_pk_mov_b32 v[6:7], s[6:7], s[6:7] op_sel:[0,1]
; FAST90A-NEXT: s_nop 1
; FAST90A-NEXT: v_mfma_f32_4x4x1f32 v[4:7], v1, v2, v[4:7]
; FAST90A-NEXT: v_mfma_f32_4x4x1f32 v[6:9], v1, v2, v[4:7]
; FAST90A-NEXT: s_nop 1
; FAST90A-NEXT: v_mfma_f32_4x4x1f32 v[2:5], v1, v2, v[4:7]
; FAST90A-NEXT: s_nop 4
; FAST90A-NEXT: global_store_dwordx4 v0, v[2:5], s[0:1]
; FAST90A-NEXT: s_endpgm
bb:
%in.1 = load <4 x float>, ptr addrspace(1) %arg
%mai.1 = tail call <4 x float> @llvm.amdgcn.mfma.f32.4x4x1f32(float 1.0, float 2.0, <4 x float> %in.1, i32 0, i32 0, i32 0)
%mai.2 = tail call <4 x float> @llvm.amdgcn.mfma.f32.4x4x1f32(float 1.0, float 2.0, <4 x float> %mai.1, i32 0, i32 0, i32 0)
%tmp.1 = shufflevector <4 x float> %mai.1, <4 x float> %mai.2, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
%mai.3 = tail call <4 x float> @llvm.amdgcn.mfma.f32.4x4x1f32(float 1.0, float 2.0, <4 x float> %tmp.1, i32 0, i32 0, i32 0)
store <4 x float> %mai.3, ptr addrspace(1) %arg
ret void
}
attributes #0 = { "amdgpu-flat-work-group-size"="1,256" }