| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 |
| ; RUN: llc -mtriple=amdgcn -mcpu=gfx1200 < %s | FileCheck %s |
| |
| define amdgpu_gs i32 @main() { |
| ; CHECK-LABEL: main: |
| ; CHECK: ; %bb.0: ; %bb |
| ; CHECK-NEXT: s_mov_b32 s0, 1 |
| ; CHECK-NEXT: ; return to shader part epilog |
| bb: |
| %i = call i1 @llvm.amdgcn.readfirstlane.i1(i1 false) |
| br label %bb1 |
| |
| bb1: |
| %i2 = zext i1 %i to i32 |
| %i3 = call i32 @llvm.amdgcn.wwm.i32(i32 0) |
| %i4 = call i32 @llvm.amdgcn.wwm.i32(i32 %i2) |
| %i5 = trunc i32 %i4 to i1 |
| %i6 = trunc i32 %i3 to i1 |
| %i7 = or i1 %i6, %i5 |
| %i8 = select i1 %i7, i32 0, i32 1 |
| ret i32 %i8 |
| } |
