llvm/test/CodeGen/AArch64/isinf.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+fullfp16 < %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD
; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+fullfp16 -global-isel < %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI

; Check if INFINITY for _Float16 is materialized
define i32 @replace_isinf_call_f16(half %x) {
; CHECK-SD-LABEL: replace_isinf_call_f16:
; CHECK-SD:       // %bb.0:
; CHECK-SD-NEXT:    mov w8, #31744 // =0x7c00
; CHECK-SD-NEXT:    fabs h0, h0
; CHECK-SD-NEXT:    fmov h1, w8
; CHECK-SD-NEXT:    fcmp h0, h1
; CHECK-SD-NEXT:    cset w0, eq
; CHECK-SD-NEXT:    ret
;
; CHECK-GI-LABEL: replace_isinf_call_f16:
; CHECK-GI:       // %bb.0:
; CHECK-GI-NEXT:    // kill: def $h0 killed $h0 def $s0
; CHECK-GI-NEXT:    fmov w9, s0
; CHECK-GI-NEXT:    mov w8, #31744 // =0x7c00
; CHECK-GI-NEXT:    and w9, w9, #0x7fff
; CHECK-GI-NEXT:    cmp w9, w8
; CHECK-GI-NEXT:    cset w0, eq
; CHECK-GI-NEXT:    ret
  %abs = tail call half @llvm.fabs.f16(half %x)
  %cmpinf = fcmp oeq half %abs, 0xH7C00
  %ret = zext i1 %cmpinf to i32
  ret i32 %ret
}

; Check if INFINITY for float is materialized
define i32 @replace_isinf_call_f32(float %x) {
; CHECK-SD-LABEL: replace_isinf_call_f32:
; CHECK-SD:       // %bb.0:
; CHECK-SD-NEXT:    fmov w9, s0
; CHECK-SD-NEXT:    mov w8, #-16777216 // =0xff000000
; CHECK-SD-NEXT:    cmp w8, w9, lsl #1
; CHECK-SD-NEXT:    cset w0, eq
; CHECK-SD-NEXT:    ret
;
; CHECK-GI-LABEL: replace_isinf_call_f32:
; CHECK-GI:       // %bb.0:
; CHECK-GI-NEXT:    fmov w9, s0
; CHECK-GI-NEXT:    mov w8, #2139095040 // =0x7f800000
; CHECK-GI-NEXT:    and w9, w9, #0x7fffffff
; CHECK-GI-NEXT:    cmp w9, w8
; CHECK-GI-NEXT:    cset w0, eq
; CHECK-GI-NEXT:    ret
  %abs = tail call float @llvm.fabs.f32(float %x)
  %cmpinf = fcmp oeq float %abs, 0x7FF0000000000000
  %ret = zext i1 %cmpinf to i32
  ret i32 %ret
}

; Check if INFINITY for double is materialized
define i32 @replace_isinf_call_f64(double %x) {
; CHECK-SD-LABEL: replace_isinf_call_f64:
; CHECK-SD:       // %bb.0:
; CHECK-SD-NEXT:    fmov x9, d0
; CHECK-SD-NEXT:    mov x8, #-9007199254740992 // =0xffe0000000000000
; CHECK-SD-NEXT:    cmp x8, x9, lsl #1
; CHECK-SD-NEXT:    cset w0, eq
; CHECK-SD-NEXT:    ret
;
; CHECK-GI-LABEL: replace_isinf_call_f64:
; CHECK-GI:       // %bb.0:
; CHECK-GI-NEXT:    fmov x9, d0
; CHECK-GI-NEXT:    mov x8, #9218868437227405312 // =0x7ff0000000000000
; CHECK-GI-NEXT:    and x9, x9, #0x7fffffffffffffff
; CHECK-GI-NEXT:    cmp x9, x8
; CHECK-GI-NEXT:    cset w0, eq
; CHECK-GI-NEXT:    ret
  %abs = tail call double @llvm.fabs.f64(double %x)
  %cmpinf = fcmp oeq double %abs, 0x7FF0000000000000
  %ret = zext i1 %cmpinf to i32
  ret i32 %ret
}

; For long double it still requires loading the constant.
define i32 @replace_isinf_call_f128(fp128 %x) {
; CHECK-SD-LABEL: replace_isinf_call_f128:
; CHECK-SD:       // %bb.0:
; CHECK-SD-NEXT:    str q0, [sp, #-16]!
; CHECK-SD-NEXT:    .cfi_def_cfa_offset 16
; CHECK-SD-NEXT:    ldp x9, x8, [sp], #16
; CHECK-SD-NEXT:    and x8, x8, #0x7fffffffffffffff
; CHECK-SD-NEXT:    eor x8, x8, #0x7fff000000000000
; CHECK-SD-NEXT:    orr x8, x9, x8
; CHECK-SD-NEXT:    cmp x8, #0
; CHECK-SD-NEXT:    cset w0, eq
; CHECK-SD-NEXT:    ret
;
; CHECK-GI-LABEL: replace_isinf_call_f128:
; CHECK-GI:       // %bb.0:
; CHECK-GI-NEXT:    mov x8, v0.d[1]
; CHECK-GI-NEXT:    fmov x9, d0
; CHECK-GI-NEXT:    and x8, x8, #0x7fffffffffffffff
; CHECK-GI-NEXT:    eor x8, x8, #0x7fff000000000000
; CHECK-GI-NEXT:    orr x8, x9, x8
; CHECK-GI-NEXT:    cmp x8, #0
; CHECK-GI-NEXT:    cset w0, eq
; CHECK-GI-NEXT:    ret
  %abs = tail call fp128 @llvm.fabs.f128(fp128 %x)
  %cmpinf = fcmp oeq fp128 %abs, 0xL00000000000000007FFF000000000000
  %ret = zext i1 %cmpinf to i32
  ret i32 %ret
}
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; CHECK: {{.*}}