| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py | |
| ; RUN: llc --mtriple=loongarch32 --mattr=+d -loongarch-materialize-float-imm=0 < %s | FileCheck %s --check-prefixes=LA32,LA32-0 | |
| ; RUN: llc --mtriple=loongarch32 --mattr=+d -loongarch-materialize-float-imm=2 < %s | FileCheck %s --check-prefixes=LA32,LA32-2 | |
| ; RUN: llc --mtriple=loongarch32 --mattr=+d -loongarch-materialize-float-imm=3 < %s | FileCheck %s --check-prefixes=LA32,LA32-3 | |
| ; RUN: llc --mtriple=loongarch32 --mattr=+d -loongarch-materialize-float-imm=4 < %s | FileCheck %s --check-prefixes=LA32,LA32-4 | |
| ; RUN: llc --mtriple=loongarch32 --mattr=+d -loongarch-materialize-float-imm=5 < %s | FileCheck %s --check-prefixes=LA32,LA32-5 | |
| ; RUN: llc --mtriple=loongarch32 --mattr=+d -loongarch-materialize-float-imm=6 < %s | FileCheck %s --check-prefixes=LA32,LA32-6 | |
| ; RUN: llc --mtriple=loongarch64 --mattr=+d -loongarch-materialize-float-imm=0 < %s | FileCheck %s --check-prefixes=LA64,LA64-0 | |
| ; RUN: llc --mtriple=loongarch64 --mattr=+d -loongarch-materialize-float-imm=2 < %s | FileCheck %s --check-prefixes=LA64,LA64-2 | |
| ; RUN: llc --mtriple=loongarch64 --mattr=+d -loongarch-materialize-float-imm=3 < %s | FileCheck %s --check-prefixes=LA64,LA64-3 | |
| ; RUN: llc --mtriple=loongarch64 --mattr=+d -loongarch-materialize-float-imm=4 < %s | FileCheck %s --check-prefixes=LA64,LA64-4 | |
| ; RUN: llc --mtriple=loongarch64 --mattr=+d -loongarch-materialize-float-imm=5 < %s | FileCheck %s --check-prefixes=LA64,LA64-5 | |
| ; RUN: llc --mtriple=loongarch64 --mattr=+d -loongarch-materialize-float-imm=6 < %s | FileCheck %s --check-prefixes=LA64,LA64-5 | |
| define double @f64_positive_zero() nounwind { | |
| ; LA32-LABEL: f64_positive_zero: | |
| ; LA32: # %bb.0: | |
| ; LA32-NEXT: movgr2fr.w $fa0, $zero | |
| ; LA32-NEXT: movgr2frh.w $fa0, $zero | |
| ; LA32-NEXT: ret | |
| ; | |
| ; LA64-LABEL: f64_positive_zero: | |
| ; LA64: # %bb.0: | |
| ; LA64-NEXT: movgr2fr.d $fa0, $zero | |
| ; LA64-NEXT: ret | |
| ret double 0.0 | |
| } | |
| define double @f64_negative_zero() nounwind { | |
| ; LA32-LABEL: f64_negative_zero: | |
| ; LA32: # %bb.0: | |
| ; LA32-NEXT: movgr2fr.w $fa0, $zero | |
| ; LA32-NEXT: movgr2frh.w $fa0, $zero | |
| ; LA32-NEXT: fneg.d $fa0, $fa0 | |
| ; LA32-NEXT: ret | |
| ; | |
| ; LA64-LABEL: f64_negative_zero: | |
| ; LA64: # %bb.0: | |
| ; LA64-NEXT: movgr2fr.d $fa0, $zero | |
| ; LA64-NEXT: fneg.d $fa0, $fa0 | |
| ; LA64-NEXT: ret | |
| ret double -0.0 | |
| } | |
| define double @f64_constant_ins1() nounwind { | |
| ; LA32-0-LABEL: f64_constant_ins1: | |
| ; LA32-0: # %bb.0: | |
| ; LA32-0-NEXT: .Lpcadd_hi0: | |
| ; LA32-0-NEXT: pcaddu12i $a0, %pcadd_hi20(.LCPI2_0) | |
| ; LA32-0-NEXT: fld.d $fa0, $a0, %pcadd_lo12(.Lpcadd_hi0) | |
| ; LA32-0-NEXT: ret | |
| ; | |
| ; LA32-2-LABEL: f64_constant_ins1: | |
| ; LA32-2: # %bb.0: | |
| ; LA32-2-NEXT: .Lpcadd_hi0: | |
| ; LA32-2-NEXT: pcaddu12i $a0, %pcadd_hi20(.LCPI2_0) | |
| ; LA32-2-NEXT: fld.d $fa0, $a0, %pcadd_lo12(.Lpcadd_hi0) | |
| ; LA32-2-NEXT: ret | |
| ; | |
| ; LA32-3-LABEL: f64_constant_ins1: | |
| ; LA32-3: # %bb.0: | |
| ; LA32-3-NEXT: movgr2fr.w $fa0, $zero | |
| ; LA32-3-NEXT: lu12i.w $a0, 263424 | |
| ; LA32-3-NEXT: movgr2frh.w $fa0, $a0 | |
| ; LA32-3-NEXT: ret | |
| ; | |
| ; LA32-4-LABEL: f64_constant_ins1: | |
| ; LA32-4: # %bb.0: | |
| ; LA32-4-NEXT: movgr2fr.w $fa0, $zero | |
| ; LA32-4-NEXT: lu12i.w $a0, 263424 | |
| ; LA32-4-NEXT: movgr2frh.w $fa0, $a0 | |
| ; LA32-4-NEXT: ret | |
| ; | |
| ; LA32-5-LABEL: f64_constant_ins1: | |
| ; LA32-5: # %bb.0: | |
| ; LA32-5-NEXT: movgr2fr.w $fa0, $zero | |
| ; LA32-5-NEXT: lu12i.w $a0, 263424 | |
| ; LA32-5-NEXT: movgr2frh.w $fa0, $a0 | |
| ; LA32-5-NEXT: ret | |
| ; | |
| ; LA32-6-LABEL: f64_constant_ins1: | |
| ; LA32-6: # %bb.0: | |
| ; LA32-6-NEXT: movgr2fr.w $fa0, $zero | |
| ; LA32-6-NEXT: lu12i.w $a0, 263424 | |
| ; LA32-6-NEXT: movgr2frh.w $fa0, $a0 | |
| ; LA32-6-NEXT: ret | |
| ; | |
| ; LA64-0-LABEL: f64_constant_ins1: | |
| ; LA64-0: # %bb.0: | |
| ; LA64-0-NEXT: pcalau12i $a0, %pc_hi20(.LCPI2_0) | |
| ; LA64-0-NEXT: fld.d $fa0, $a0, %pc_lo12(.LCPI2_0) | |
| ; LA64-0-NEXT: ret | |
| ; | |
| ; LA64-2-LABEL: f64_constant_ins1: | |
| ; LA64-2: # %bb.0: | |
| ; LA64-2-NEXT: lu52i.d $a0, $zero, 1029 | |
| ; LA64-2-NEXT: movgr2fr.d $fa0, $a0 | |
| ; LA64-2-NEXT: ret | |
| ; | |
| ; LA64-3-LABEL: f64_constant_ins1: | |
| ; LA64-3: # %bb.0: | |
| ; LA64-3-NEXT: lu52i.d $a0, $zero, 1029 | |
| ; LA64-3-NEXT: movgr2fr.d $fa0, $a0 | |
| ; LA64-3-NEXT: ret | |
| ; | |
| ; LA64-4-LABEL: f64_constant_ins1: | |
| ; LA64-4: # %bb.0: | |
| ; LA64-4-NEXT: lu52i.d $a0, $zero, 1029 | |
| ; LA64-4-NEXT: movgr2fr.d $fa0, $a0 | |
| ; LA64-4-NEXT: ret | |
| ; | |
| ; LA64-5-LABEL: f64_constant_ins1: | |
| ; LA64-5: # %bb.0: | |
| ; LA64-5-NEXT: lu52i.d $a0, $zero, 1029 | |
| ; LA64-5-NEXT: movgr2fr.d $fa0, $a0 | |
| ; LA64-5-NEXT: ret | |
| ret double 64.0 | |
| } | |
| define double @f64_constant_ins2() nounwind { | |
| ; LA32-0-LABEL: f64_constant_ins2: | |
| ; LA32-0: # %bb.0: | |
| ; LA32-0-NEXT: .Lpcadd_hi1: | |
| ; LA32-0-NEXT: pcaddu12i $a0, %pcadd_hi20(.LCPI3_0) | |
| ; LA32-0-NEXT: fld.d $fa0, $a0, %pcadd_lo12(.Lpcadd_hi1) | |
| ; LA32-0-NEXT: ret | |
| ; | |
| ; LA32-2-LABEL: f64_constant_ins2: | |
| ; LA32-2: # %bb.0: | |
| ; LA32-2-NEXT: .Lpcadd_hi1: | |
| ; LA32-2-NEXT: pcaddu12i $a0, %pcadd_hi20(.LCPI3_0) | |
| ; LA32-2-NEXT: fld.d $fa0, $a0, %pcadd_lo12(.Lpcadd_hi1) | |
| ; LA32-2-NEXT: ret | |
| ; | |
| ; LA32-3-LABEL: f64_constant_ins2: | |
| ; LA32-3: # %bb.0: | |
| ; LA32-3-NEXT: .Lpcadd_hi0: | |
| ; LA32-3-NEXT: pcaddu12i $a0, %pcadd_hi20(.LCPI3_0) | |
| ; LA32-3-NEXT: fld.d $fa0, $a0, %pcadd_lo12(.Lpcadd_hi0) | |
| ; LA32-3-NEXT: ret | |
| ; | |
| ; LA32-4-LABEL: f64_constant_ins2: | |
| ; LA32-4: # %bb.0: | |
| ; LA32-4-NEXT: ori $a0, $zero, 3 | |
| ; LA32-4-NEXT: movgr2fr.w $fa0, $a0 | |
| ; LA32-4-NEXT: lu12i.w $a0, 262144 | |
| ; LA32-4-NEXT: movgr2frh.w $fa0, $a0 | |
| ; LA32-4-NEXT: ret | |
| ; | |
| ; LA32-5-LABEL: f64_constant_ins2: | |
| ; LA32-5: # %bb.0: | |
| ; LA32-5-NEXT: ori $a0, $zero, 3 | |
| ; LA32-5-NEXT: movgr2fr.w $fa0, $a0 | |
| ; LA32-5-NEXT: lu12i.w $a0, 262144 | |
| ; LA32-5-NEXT: movgr2frh.w $fa0, $a0 | |
| ; LA32-5-NEXT: ret | |
| ; | |
| ; LA32-6-LABEL: f64_constant_ins2: | |
| ; LA32-6: # %bb.0: | |
| ; LA32-6-NEXT: ori $a0, $zero, 3 | |
| ; LA32-6-NEXT: movgr2fr.w $fa0, $a0 | |
| ; LA32-6-NEXT: lu12i.w $a0, 262144 | |
| ; LA32-6-NEXT: movgr2frh.w $fa0, $a0 | |
| ; LA32-6-NEXT: ret | |
| ; | |
| ; LA64-0-LABEL: f64_constant_ins2: | |
| ; LA64-0: # %bb.0: | |
| ; LA64-0-NEXT: pcalau12i $a0, %pc_hi20(.LCPI3_0) | |
| ; LA64-0-NEXT: fld.d $fa0, $a0, %pc_lo12(.LCPI3_0) | |
| ; LA64-0-NEXT: ret | |
| ; | |
| ; LA64-2-LABEL: f64_constant_ins2: | |
| ; LA64-2: # %bb.0: | |
| ; LA64-2-NEXT: pcalau12i $a0, %pc_hi20(.LCPI3_0) | |
| ; LA64-2-NEXT: fld.d $fa0, $a0, %pc_lo12(.LCPI3_0) | |
| ; LA64-2-NEXT: ret | |
| ; | |
| ; LA64-3-LABEL: f64_constant_ins2: | |
| ; LA64-3: # %bb.0: | |
| ; LA64-3-NEXT: ori $a0, $zero, 3 | |
| ; LA64-3-NEXT: lu52i.d $a0, $a0, 1024 | |
| ; LA64-3-NEXT: movgr2fr.d $fa0, $a0 | |
| ; LA64-3-NEXT: ret | |
| ; | |
| ; LA64-4-LABEL: f64_constant_ins2: | |
| ; LA64-4: # %bb.0: | |
| ; LA64-4-NEXT: ori $a0, $zero, 3 | |
| ; LA64-4-NEXT: lu52i.d $a0, $a0, 1024 | |
| ; LA64-4-NEXT: movgr2fr.d $fa0, $a0 | |
| ; LA64-4-NEXT: ret | |
| ; | |
| ; LA64-5-LABEL: f64_constant_ins2: | |
| ; LA64-5: # %bb.0: | |
| ; LA64-5-NEXT: ori $a0, $zero, 3 | |
| ; LA64-5-NEXT: lu52i.d $a0, $a0, 1024 | |
| ; LA64-5-NEXT: movgr2fr.d $fa0, $a0 | |
| ; LA64-5-NEXT: ret | |
| ret double 2.00000000000000137 | |
| } | |
| define double @f64_constant_ins3() nounwind { | |
| ; LA32-0-LABEL: f64_constant_ins3: | |
| ; LA32-0: # %bb.0: | |
| ; LA32-0-NEXT: .Lpcadd_hi2: | |
| ; LA32-0-NEXT: pcaddu12i $a0, %pcadd_hi20(.LCPI4_0) | |
| ; LA32-0-NEXT: fld.d $fa0, $a0, %pcadd_lo12(.Lpcadd_hi2) | |
| ; LA32-0-NEXT: ret | |
| ; | |
| ; LA32-2-LABEL: f64_constant_ins3: | |
| ; LA32-2: # %bb.0: | |
| ; LA32-2-NEXT: .Lpcadd_hi2: | |
| ; LA32-2-NEXT: pcaddu12i $a0, %pcadd_hi20(.LCPI4_0) | |
| ; LA32-2-NEXT: fld.d $fa0, $a0, %pcadd_lo12(.Lpcadd_hi2) | |
| ; LA32-2-NEXT: ret | |
| ; | |
| ; LA32-3-LABEL: f64_constant_ins3: | |
| ; LA32-3: # %bb.0: | |
| ; LA32-3-NEXT: .Lpcadd_hi1: | |
| ; LA32-3-NEXT: pcaddu12i $a0, %pcadd_hi20(.LCPI4_0) | |
| ; LA32-3-NEXT: fld.d $fa0, $a0, %pcadd_lo12(.Lpcadd_hi1) | |
| ; LA32-3-NEXT: ret | |
| ; | |
| ; LA32-4-LABEL: f64_constant_ins3: | |
| ; LA32-4: # %bb.0: | |
| ; LA32-4-NEXT: .Lpcadd_hi0: | |
| ; LA32-4-NEXT: pcaddu12i $a0, %pcadd_hi20(.LCPI4_0) | |
| ; LA32-4-NEXT: fld.d $fa0, $a0, %pcadd_lo12(.Lpcadd_hi0) | |
| ; LA32-4-NEXT: ret | |
| ; | |
| ; LA32-5-LABEL: f64_constant_ins3: | |
| ; LA32-5: # %bb.0: | |
| ; LA32-5-NEXT: lu12i.w $a0, 268115 | |
| ; LA32-5-NEXT: ori $a0, $a0, 344 | |
| ; LA32-5-NEXT: lu12i.w $a1, -131072 | |
| ; LA32-5-NEXT: movgr2fr.w $fa0, $a1 | |
| ; LA32-5-NEXT: movgr2frh.w $fa0, $a0 | |
| ; LA32-5-NEXT: ret | |
| ; | |
| ; LA32-6-LABEL: f64_constant_ins3: | |
| ; LA32-6: # %bb.0: | |
| ; LA32-6-NEXT: lu12i.w $a0, 268115 | |
| ; LA32-6-NEXT: ori $a0, $a0, 344 | |
| ; LA32-6-NEXT: lu12i.w $a1, -131072 | |
| ; LA32-6-NEXT: movgr2fr.w $fa0, $a1 | |
| ; LA32-6-NEXT: movgr2frh.w $fa0, $a0 | |
| ; LA32-6-NEXT: ret | |
| ; | |
| ; LA64-0-LABEL: f64_constant_ins3: | |
| ; LA64-0: # %bb.0: | |
| ; LA64-0-NEXT: pcalau12i $a0, %pc_hi20(.LCPI4_0) | |
| ; LA64-0-NEXT: fld.d $fa0, $a0, %pc_lo12(.LCPI4_0) | |
| ; LA64-0-NEXT: ret | |
| ; | |
| ; LA64-2-LABEL: f64_constant_ins3: | |
| ; LA64-2: # %bb.0: | |
| ; LA64-2-NEXT: pcalau12i $a0, %pc_hi20(.LCPI4_0) | |
| ; LA64-2-NEXT: fld.d $fa0, $a0, %pc_lo12(.LCPI4_0) | |
| ; LA64-2-NEXT: ret | |
| ; | |
| ; LA64-3-LABEL: f64_constant_ins3: | |
| ; LA64-3: # %bb.0: | |
| ; LA64-3-NEXT: pcalau12i $a0, %pc_hi20(.LCPI4_0) | |
| ; LA64-3-NEXT: fld.d $fa0, $a0, %pc_lo12(.LCPI4_0) | |
| ; LA64-3-NEXT: ret | |
| ; | |
| ; LA64-4-LABEL: f64_constant_ins3: | |
| ; LA64-4: # %bb.0: | |
| ; LA64-4-NEXT: lu12i.w $a0, -131072 | |
| ; LA64-4-NEXT: lu32i.d $a0, 340312 | |
| ; LA64-4-NEXT: lu52i.d $a0, $a0, 1047 | |
| ; LA64-4-NEXT: movgr2fr.d $fa0, $a0 | |
| ; LA64-4-NEXT: ret | |
| ; | |
| ; LA64-5-LABEL: f64_constant_ins3: | |
| ; LA64-5: # %bb.0: | |
| ; LA64-5-NEXT: lu12i.w $a0, -131072 | |
| ; LA64-5-NEXT: lu32i.d $a0, 340312 | |
| ; LA64-5-NEXT: lu52i.d $a0, $a0, 1047 | |
| ; LA64-5-NEXT: movgr2fr.d $fa0, $a0 | |
| ; LA64-5-NEXT: ret | |
| ret double 22222222.0 | |
| } | |
| define double @f64_constant_pi() nounwind { | |
| ; LA32-0-LABEL: f64_constant_pi: | |
| ; LA32-0: # %bb.0: | |
| ; LA32-0-NEXT: .Lpcadd_hi3: | |
| ; LA32-0-NEXT: pcaddu12i $a0, %pcadd_hi20(.LCPI5_0) | |
| ; LA32-0-NEXT: fld.d $fa0, $a0, %pcadd_lo12(.Lpcadd_hi3) | |
| ; LA32-0-NEXT: ret | |
| ; | |
| ; LA32-2-LABEL: f64_constant_pi: | |
| ; LA32-2: # %bb.0: | |
| ; LA32-2-NEXT: .Lpcadd_hi3: | |
| ; LA32-2-NEXT: pcaddu12i $a0, %pcadd_hi20(.LCPI5_0) | |
| ; LA32-2-NEXT: fld.d $fa0, $a0, %pcadd_lo12(.Lpcadd_hi3) | |
| ; LA32-2-NEXT: ret | |
| ; | |
| ; LA32-3-LABEL: f64_constant_pi: | |
| ; LA32-3: # %bb.0: | |
| ; LA32-3-NEXT: .Lpcadd_hi2: | |
| ; LA32-3-NEXT: pcaddu12i $a0, %pcadd_hi20(.LCPI5_0) | |
| ; LA32-3-NEXT: fld.d $fa0, $a0, %pcadd_lo12(.Lpcadd_hi2) | |
| ; LA32-3-NEXT: ret | |
| ; | |
| ; LA32-4-LABEL: f64_constant_pi: | |
| ; LA32-4: # %bb.0: | |
| ; LA32-4-NEXT: .Lpcadd_hi1: | |
| ; LA32-4-NEXT: pcaddu12i $a0, %pcadd_hi20(.LCPI5_0) | |
| ; LA32-4-NEXT: fld.d $fa0, $a0, %pcadd_lo12(.Lpcadd_hi1) | |
| ; LA32-4-NEXT: ret | |
| ; | |
| ; LA32-5-LABEL: f64_constant_pi: | |
| ; LA32-5: # %bb.0: | |
| ; LA32-5-NEXT: .Lpcadd_hi0: | |
| ; LA32-5-NEXT: pcaddu12i $a0, %pcadd_hi20(.LCPI5_0) | |
| ; LA32-5-NEXT: fld.d $fa0, $a0, %pcadd_lo12(.Lpcadd_hi0) | |
| ; LA32-5-NEXT: ret | |
| ; | |
| ; LA32-6-LABEL: f64_constant_pi: | |
| ; LA32-6: # %bb.0: | |
| ; LA32-6-NEXT: lu12i.w $a0, 262290 | |
| ; LA32-6-NEXT: ori $a0, $a0, 507 | |
| ; LA32-6-NEXT: lu12i.w $a1, 345154 | |
| ; LA32-6-NEXT: ori $a1, $a1, 3352 | |
| ; LA32-6-NEXT: movgr2fr.w $fa0, $a1 | |
| ; LA32-6-NEXT: movgr2frh.w $fa0, $a0 | |
| ; LA32-6-NEXT: ret | |
| ; | |
| ; LA64-0-LABEL: f64_constant_pi: | |
| ; LA64-0: # %bb.0: | |
| ; LA64-0-NEXT: pcalau12i $a0, %pc_hi20(.LCPI5_0) | |
| ; LA64-0-NEXT: fld.d $fa0, $a0, %pc_lo12(.LCPI5_0) | |
| ; LA64-0-NEXT: ret | |
| ; | |
| ; LA64-2-LABEL: f64_constant_pi: | |
| ; LA64-2: # %bb.0: | |
| ; LA64-2-NEXT: pcalau12i $a0, %pc_hi20(.LCPI5_0) | |
| ; LA64-2-NEXT: fld.d $fa0, $a0, %pc_lo12(.LCPI5_0) | |
| ; LA64-2-NEXT: ret | |
| ; | |
| ; LA64-3-LABEL: f64_constant_pi: | |
| ; LA64-3: # %bb.0: | |
| ; LA64-3-NEXT: pcalau12i $a0, %pc_hi20(.LCPI5_0) | |
| ; LA64-3-NEXT: fld.d $fa0, $a0, %pc_lo12(.LCPI5_0) | |
| ; LA64-3-NEXT: ret | |
| ; | |
| ; LA64-4-LABEL: f64_constant_pi: | |
| ; LA64-4: # %bb.0: | |
| ; LA64-4-NEXT: pcalau12i $a0, %pc_hi20(.LCPI5_0) | |
| ; LA64-4-NEXT: fld.d $fa0, $a0, %pc_lo12(.LCPI5_0) | |
| ; LA64-4-NEXT: ret | |
| ; | |
| ; LA64-5-LABEL: f64_constant_pi: | |
| ; LA64-5: # %bb.0: | |
| ; LA64-5-NEXT: lu12i.w $a0, 345154 | |
| ; LA64-5-NEXT: ori $a0, $a0, 3352 | |
| ; LA64-5-NEXT: lu32i.d $a0, -450053 | |
| ; LA64-5-NEXT: lu52i.d $a0, $a0, 1024 | |
| ; LA64-5-NEXT: movgr2fr.d $fa0, $a0 | |
| ; LA64-5-NEXT: ret | |
| ret double 3.1415926535897931159979634685441851615905761718750 | |
| } | |
| define double @f64_add_fimm1(double %a) nounwind { | |
| ; LA32-LABEL: f64_add_fimm1: | |
| ; LA32: # %bb.0: | |
| ; LA32-NEXT: movgr2fr.w $fa1, $zero | |
| ; LA32-NEXT: lu12i.w $a0, 261888 | |
| ; LA32-NEXT: movgr2frh.w $fa1, $a0 | |
| ; LA32-NEXT: fadd.d $fa0, $fa0, $fa1 | |
| ; LA32-NEXT: ret | |
| ; | |
| ; LA64-LABEL: f64_add_fimm1: | |
| ; LA64: # %bb.0: | |
| ; LA64-NEXT: vldi $vr1, -912 | |
| ; LA64-NEXT: fadd.d $fa0, $fa0, $fa1 | |
| ; LA64-NEXT: ret | |
| %1 = fadd double %a, 1.0 | |
| ret double %1 | |
| } | |
| define double @f64_positive_fimm1() nounwind { | |
| ; LA32-LABEL: f64_positive_fimm1: | |
| ; LA32: # %bb.0: | |
| ; LA32-NEXT: movgr2fr.w $fa0, $zero | |
| ; LA32-NEXT: lu12i.w $a0, 261888 | |
| ; LA32-NEXT: movgr2frh.w $fa0, $a0 | |
| ; LA32-NEXT: ret | |
| ; | |
| ; LA64-LABEL: f64_positive_fimm1: | |
| ; LA64: # %bb.0: | |
| ; LA64-NEXT: vldi $vr0, -912 | |
| ; LA64-NEXT: ret | |
| ret double 1.0 | |
| } |