llvm/test/CodeGen/Mips/Fast-ISel/div-imm.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -march=mipsel -mcpu=mips32 -O0 -relocation-model=pic | FileCheck %s

define i32 @div_imm_non_zero(i32 signext %a) nounwind {
; CHECK-LABEL: div_imm_non_zero:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    addiu $1, $zero, 1234
; CHECK-NEXT:    div $zero, $4, $1
; CHECK-NEXT:    mflo $2
; CHECK-NEXT:    jr $ra
; CHECK-NEXT:    nop
entry:
  %div = sdiv i32 %a, 1234
  ret i32 %div
}

define i32 @div_imm_zero(i32 signext %a) nounwind {
; CHECK-LABEL: div_imm_zero:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    addiu $1, $zero, 0
; CHECK-NEXT:    div $zero, $4, $zero
; CHECK-NEXT:    teq $zero, $zero, 7
; CHECK-NEXT:    mflo $2
; CHECK-NEXT:    jr $ra
; CHECK-NEXT:    nop
entry:
  %div = sdiv i32 %a, 0
  ret i32 %div
}