| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6 |
| # RUN: llc -mtriple=aarch64 -mattr=+sve -mattr=+sme -run-pass=aarch64-machine-sme-abi -verify-machineinstrs %s -o - | FileCheck %s |
| |
| --- | |
| ; Test moving a state change to be before a $nzcv def |
| define void @move_before_nzcv_def() "aarch64_inout_za" { ret void } |
| |
| ; Test moving a state change to a point where $x0 is live |
| define void @move_to_x0_live() "aarch64_inout_za" { ret void } |
| |
| ; Test we don't move before a previous state change. |
| define void @do_not_move_before_prior_state_change() "aarch64_za_state_agnostic" { ret void } |
| |
| ; Test we don't move into a call sequence. |
| define void @do_not_move_into_call() "aarch64_inout_za" { ret void } |
| |
| declare void @clobber() |
| declare void @inout_call() "aarch64_inout_za" |
| ... |
| --- |
| name: move_before_nzcv_def |
| tracksRegLiveness: true |
| isSSA: true |
| noVRegs: false |
| body: | |
| bb.0: |
| |
| ; CHECK-LABEL: name: move_before_nzcv_def |
| ; CHECK: [[RDSVLI_XI:%[0-9]+]]:gpr64 = RDSVLI_XI 1, implicit $vg |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $sp |
| ; CHECK-NEXT: [[MSUBXrrr:%[0-9]+]]:gpr64 = MSUBXrrr [[RDSVLI_XI]], [[RDSVLI_XI]], [[COPY]] |
| ; CHECK-NEXT: $sp = COPY [[MSUBXrrr]] |
| ; CHECK-NEXT: STPXi [[MSUBXrrr]], [[RDSVLI_XI]], %stack.0, 0 |
| ; CHECK-NEXT: [[ADDXri:%[0-9]+]]:gpr64sp = ADDXri %stack.0, 0, 0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY [[ADDXri]] |
| ; CHECK-NEXT: MSR 56965, [[COPY1]] |
| ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp |
| ; CHECK-NEXT: RequiresZASavePseudo |
| ; CHECK-NEXT: BL @clobber, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp |
| ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp |
| ; CHECK-NEXT: MSRpstatesvcrImm1 2, 1, implicit-def $nzcv |
| ; CHECK-NEXT: [[MRS:%[0-9]+]]:gpr64 = MRS 56965, implicit-def $nzcv |
| ; CHECK-NEXT: $x0 = ADDXri %stack.0, 0, 0 |
| ; CHECK-NEXT: RestoreZAPseudo [[MRS]], $x0, &__arm_tpidr2_restore, csr_aarch64_sme_abi_support_routines_preservemost_from_x0 |
| ; CHECK-NEXT: MSR 56965, $xzr |
| ; CHECK-NEXT: $nzcv = IMPLICIT_DEF |
| ; CHECK-NEXT: $zab0 = IMPLICIT_DEF |
| ; CHECK-NEXT: FAKE_USE $nzcv |
| ; CHECK-NEXT: RET_ReallyLR |
| ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp |
| RequiresZASavePseudo |
| BL @clobber, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp |
| ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp |
| |
| $nzcv = IMPLICIT_DEF |
| $zab0 = IMPLICIT_DEF |
| FAKE_USE $nzcv |
| |
| RET_ReallyLR |
| ... |
| --- |
| name: move_to_x0_live |
| tracksRegLiveness: true |
| isSSA: true |
| noVRegs: false |
| body: | |
| bb.0: |
| |
| ; CHECK-LABEL: name: move_to_x0_live |
| ; CHECK: [[RDSVLI_XI:%[0-9]+]]:gpr64 = RDSVLI_XI 1, implicit $vg |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $sp |
| ; CHECK-NEXT: [[MSUBXrrr:%[0-9]+]]:gpr64 = MSUBXrrr [[RDSVLI_XI]], [[RDSVLI_XI]], [[COPY]] |
| ; CHECK-NEXT: $sp = COPY [[MSUBXrrr]] |
| ; CHECK-NEXT: STPXi [[MSUBXrrr]], [[RDSVLI_XI]], %stack.0, 0 |
| ; CHECK-NEXT: [[ADDXri:%[0-9]+]]:gpr64sp = ADDXri %stack.0, 0, 0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY [[ADDXri]] |
| ; CHECK-NEXT: MSR 56965, [[COPY1]] |
| ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp |
| ; CHECK-NEXT: RequiresZASavePseudo |
| ; CHECK-NEXT: BL @clobber, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp |
| ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp |
| ; CHECK-NEXT: MSRpstatesvcrImm1 2, 1, implicit-def $nzcv |
| ; CHECK-NEXT: [[MRS:%[0-9]+]]:gpr64 = MRS 56965, implicit-def $nzcv |
| ; CHECK-NEXT: $x0 = ADDXri %stack.0, 0, 0 |
| ; CHECK-NEXT: RestoreZAPseudo [[MRS]], $x0, &__arm_tpidr2_restore, csr_aarch64_sme_abi_support_routines_preservemost_from_x0 |
| ; CHECK-NEXT: MSR 56965, $xzr |
| ; CHECK-NEXT: $x0 = IMPLICIT_DEF |
| ; CHECK-NEXT: $nzcv = IMPLICIT_DEF |
| ; CHECK-NEXT: FAKE_USE $x0 |
| ; CHECK-NEXT: $zab0 = IMPLICIT_DEF |
| ; CHECK-NEXT: FAKE_USE $nzcv |
| ; CHECK-NEXT: RET_ReallyLR |
| ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp |
| RequiresZASavePseudo |
| BL @clobber, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp |
| ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp |
| |
| $x0 = IMPLICIT_DEF |
| |
| $nzcv = IMPLICIT_DEF |
| FAKE_USE $x0 |
| |
| $zab0 = IMPLICIT_DEF |
| FAKE_USE $nzcv |
| |
| RET_ReallyLR |
| ... |
| --- |
| name: do_not_move_before_prior_state_change |
| tracksRegLiveness: true |
| isSSA: true |
| noVRegs: false |
| body: | |
| ; CHECK-LABEL: name: do_not_move_before_prior_state_change |
| ; CHECK: bb.0: |
| ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: BL &__arm_sme_state_size, csr_aarch64_sme_abi_support_routines_preservemost_from_x1, implicit-def $lr, implicit $sp, implicit-def $x0 |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0 |
| ; CHECK-NEXT: $sp = SUBXrx64 $sp, [[COPY]], 24 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $sp |
| ; CHECK-NEXT: $nzcv = IMPLICIT_DEF |
| ; CHECK-NEXT: $zab0 = IMPLICIT_DEF |
| ; CHECK-NEXT: [[MRS:%[0-9]+]]:gpr64 = MRS 55824, implicit-def $nzcv, implicit $nzcv |
| ; CHECK-NEXT: $x0 = COPY [[COPY1]] |
| ; CHECK-NEXT: BL &__arm_sme_save, csr_aarch64_sme_abi_support_routines_preservemost_from_x1, implicit-def $lr, implicit $sp, implicit $x0 |
| ; CHECK-NEXT: MSR 55824, [[MRS]], implicit-def $nzcv |
| ; CHECK-NEXT: Bcc 2, %bb.1, implicit $nzcv |
| ; CHECK-NEXT: B %bb.2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: bb.1: |
| ; CHECK-NEXT: liveins: $nzcv |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: FAKE_USE $nzcv |
| ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp |
| ; CHECK-NEXT: RequiresZASavePseudo |
| ; CHECK-NEXT: BL @clobber, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp |
| ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp |
| ; CHECK-NEXT: $x0 = COPY [[COPY1]] |
| ; CHECK-NEXT: BL &__arm_sme_restore, csr_aarch64_sme_abi_support_routines_preservemost_from_x1, implicit-def $lr, implicit $sp, implicit $x0 |
| ; CHECK-NEXT: RET_ReallyLR |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: bb.2: |
| ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp |
| ; CHECK-NEXT: RequiresZASavePseudo |
| ; CHECK-NEXT: BL @clobber, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp |
| ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp |
| ; CHECK-NEXT: $x0 = COPY [[COPY1]] |
| ; CHECK-NEXT: BL &__arm_sme_restore, csr_aarch64_sme_abi_support_routines_preservemost_from_x1, implicit-def $lr, implicit $sp, implicit $x0 |
| ; CHECK-NEXT: RET_ReallyLR |
| bb.0: |
| successors: %bb.1, %bb.2 |
| |
| ; The insertion point can move before the $nzcv def (as that would require |
| ; moving before a $zab0 def -- that requires the ACTIVE state). |
| $nzcv = IMPLICIT_DEF |
| $zab0 = IMPLICIT_DEF |
| Bcc 2, %bb.1, implicit $nzcv |
| B %bb.2 |
| ; bb.1 and bb.2 both require ZA saved on entry (to force bb.0's exit bundle to |
| ; pick the LOCAL_SAVED state). |
| bb.1: |
| liveins: $nzcv |
| FAKE_USE $nzcv |
| |
| ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp |
| RequiresZASavePseudo |
| BL @clobber, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp |
| ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp |
| |
| RET_ReallyLR |
| bb.2: |
| ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp |
| RequiresZASavePseudo |
| BL @clobber, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp |
| ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp |
| |
| RET_ReallyLR |
| ... |
| --- |
| name: do_not_move_into_call |
| tracksRegLiveness: true |
| isSSA: true |
| noVRegs: false |
| body: | |
| bb.0: |
| |
| ; CHECK-LABEL: name: do_not_move_into_call |
| ; CHECK: [[RDSVLI_XI:%[0-9]+]]:gpr64 = RDSVLI_XI 1, implicit $vg |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $sp |
| ; CHECK-NEXT: [[MSUBXrrr:%[0-9]+]]:gpr64 = MSUBXrrr [[RDSVLI_XI]], [[RDSVLI_XI]], [[COPY]] |
| ; CHECK-NEXT: $sp = COPY [[MSUBXrrr]] |
| ; CHECK-NEXT: STPXi [[MSUBXrrr]], [[RDSVLI_XI]], %stack.0, 0 |
| ; CHECK-NEXT: [[ADDXri:%[0-9]+]]:gpr64sp = ADDXri %stack.0, 0, 0 |
| ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY [[ADDXri]] |
| ; CHECK-NEXT: MSR 56965, [[COPY1]] |
| ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp |
| ; CHECK-NEXT: RequiresZASavePseudo |
| ; CHECK-NEXT: BL @clobber, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp |
| ; CHECK-NEXT: $nzcv = IMPLICIT_DEF |
| ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp |
| ; CHECK-NEXT: [[MRS:%[0-9]+]]:gpr64 = MRS 55824, implicit-def $nzcv, implicit $nzcv |
| ; CHECK-NEXT: MSRpstatesvcrImm1 2, 1, implicit-def $nzcv |
| ; CHECK-NEXT: [[MRS1:%[0-9]+]]:gpr64 = MRS 56965, implicit-def $nzcv |
| ; CHECK-NEXT: $x0 = ADDXri %stack.0, 0, 0 |
| ; CHECK-NEXT: RestoreZAPseudo [[MRS1]], $x0, &__arm_tpidr2_restore, csr_aarch64_sme_abi_support_routines_preservemost_from_x0 |
| ; CHECK-NEXT: MSR 56965, $xzr |
| ; CHECK-NEXT: MSR 55824, [[MRS]], implicit-def $nzcv |
| ; CHECK-NEXT: $zab0 = IMPLICIT_DEF |
| ; CHECK-NEXT: FAKE_USE $nzcv |
| ; CHECK-NEXT: RET_ReallyLR |
| ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp |
| RequiresZASavePseudo |
| BL @clobber, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp |
| |
| ; This is artificial test where NZCV is def'd inside a call, so we can't |
| ; move the insert point before it's definition. |
| $nzcv = IMPLICIT_DEF |
| ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp |
| |
| $zab0 = IMPLICIT_DEF |
| FAKE_USE $nzcv |
| |
| RET_ReallyLR |
| ... |