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llvm/llvm-project/refs/heads/users/mgcarrasco/spirv/debug-function-2/./llvm/test/CodeGen/AMDGPU/fminnum.ll
blob: 526c4a1708a4c23a95ba3a96eb094a4370f6b9b6 [file] [log] [blame] [edit]
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck -enable-var-scope -check-prefixes=GFX8,GFX8-SDAG %s
; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck -enable-var-scope -check-prefixes=GFX8,GFX8-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx908 -mattr=-flat-for-global < %s | FileCheck -enable-var-scope -check-prefixes=GFX9,GFX9-SDAG %s
; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx908 -mattr=-flat-for-global < %s | FileCheck -enable-var-scope -check-prefixes=GFX9,GFX9-GISEL %s
; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1200 -mattr=-flat-for-global < %s | FileCheck -enable-var-scope -check-prefixes=GFX12,GFX12-SDAG %s
; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1200 -mattr=-flat-for-global < %s | FileCheck -enable-var-scope -check-prefixes=GFX12,GFX12-GISEL %s
define amdgpu_kernel void @test_fmin_f32_ieee_mode_on(ptr addrspace(1) %out, float %a, float %b) #0 {
; GFX8-SDAG-LABEL: test_fmin_f32_ieee_mode_on:
; GFX8-SDAG: ; %bb.0:
; GFX8-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX8-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-SDAG-NEXT: s_mov_b64 s[4:5], s[2:3]
; GFX8-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, s5
; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s4
; GFX8-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX8-SDAG-NEXT: s_mov_b32 s2, -1
; GFX8-SDAG-NEXT: v_min_f32_e32 v0, v1, v0
; GFX8-SDAG-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX8-SDAG-NEXT: s_endpgm
;
; GFX8-GISEL-LABEL: test_fmin_f32_ieee_mode_on:
; GFX8-GISEL: ; %bb.0:
; GFX8-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX8-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-GISEL-NEXT: v_mul_f32_e64 v0, 1.0, s2
; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s3
; GFX8-GISEL-NEXT: s_mov_b32 s2, -1
; GFX8-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
; GFX8-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX8-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX8-GISEL-NEXT: s_endpgm
;
; GFX9-SDAG-LABEL: test_fmin_f32_ieee_mode_on:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX9-SDAG-NEXT: s_mov_b32 s7, 0xf000
; GFX9-SDAG-NEXT: s_mov_b32 s6, -1
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: v_max_f32_e64 v0, s3, s3
; GFX9-SDAG-NEXT: v_max_f32_e64 v1, s2, s2
; GFX9-SDAG-NEXT: s_mov_b32 s4, s0
; GFX9-SDAG-NEXT: s_mov_b32 s5, s1
; GFX9-SDAG-NEXT: v_min_f32_e32 v0, v1, v0
; GFX9-SDAG-NEXT: buffer_store_dword v0, off, s[4:7], 0
; GFX9-SDAG-NEXT: s_endpgm
;
; GFX9-GISEL-LABEL: test_fmin_f32_ieee_mode_on:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: v_max_f32_e64 v0, s2, s2
; GFX9-GISEL-NEXT: v_max_f32_e64 v1, s3, s3
; GFX9-GISEL-NEXT: s_mov_b32 s2, -1
; GFX9-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
; GFX9-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX9-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX9-GISEL-NEXT: s_endpgm
;
; GFX12-SDAG-LABEL: test_fmin_f32_ieee_mode_on:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, s3, s3
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, s2, s2
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, v1, v0
; GFX12-SDAG-NEXT: buffer_store_b32 v0, off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: test_fmin_f32_ieee_mode_on:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v0, s2, s2
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, s3, s3
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s2, v0
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s3, v1
; GFX12-GISEL-NEXT: s_min_num_f32 s2, s2, s3
; GFX12-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s2
; GFX12-GISEL-NEXT: s_mov_b32 s2, -1
; GFX12-GISEL-NEXT: buffer_store_b32 v0, off, s[0:3], null
; GFX12-GISEL-NEXT: s_endpgm
%val = call float @llvm.minnum.f32(float %a, float %b)
store float %val, ptr addrspace(1) %out, align 4
ret void
}
define float @test_fmin_nnan_f32_ieee_mode_on(float %a, float %b) #0 {
; GFX8-LABEL: test_fmin_nnan_f32_ieee_mode_on:
; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_min_f32_e32 v0, v0, v1
; GFX8-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-LABEL: test_fmin_nnan_f32_ieee_mode_on:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: v_min_f32_e32 v0, v0, v1
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-LABEL: test_fmin_nnan_f32_ieee_mode_on:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-NEXT: s_wait_expcnt 0x0
; GFX12-NEXT: s_wait_samplecnt 0x0
; GFX12-NEXT: s_wait_bvhcnt 0x0
; GFX12-NEXT: s_wait_kmcnt 0x0
; GFX12-NEXT: v_min_num_f32_e32 v0, v0, v1
; GFX12-NEXT: s_setpc_b64 s[30:31]
%val = call nnan float @llvm.minnum.f32(float %a, float %b)
ret float %val
}
define amdgpu_ps float @test_fmin_nnan_f32_ieee_mode_off(float %a, float %b) #0 {
; GFX8-LABEL: test_fmin_nnan_f32_ieee_mode_off:
; GFX8: ; %bb.0:
; GFX8-NEXT: v_min_f32_e32 v0, v0, v1
; GFX8-NEXT: ; return to shader part epilog
;
; GFX9-LABEL: test_fmin_nnan_f32_ieee_mode_off:
; GFX9: ; %bb.0:
; GFX9-NEXT: v_min_f32_e32 v0, v0, v1
; GFX9-NEXT: ; return to shader part epilog
;
; GFX12-LABEL: test_fmin_nnan_f32_ieee_mode_off:
; GFX12: ; %bb.0:
; GFX12-NEXT: v_min_num_f32_e32 v0, v0, v1
; GFX12-NEXT: ; return to shader part epilog
%val = call nnan float @llvm.minnum.f32(float %a, float %b)
ret float %val
}
define amdgpu_ps float @test_fmin_f32_ieee_mode_off(float %a, float %b) #0 {
; GFX8-LABEL: test_fmin_f32_ieee_mode_off:
; GFX8: ; %bb.0:
; GFX8-NEXT: v_min_f32_e32 v0, v0, v1
; GFX8-NEXT: ; return to shader part epilog
;
; GFX9-LABEL: test_fmin_f32_ieee_mode_off:
; GFX9: ; %bb.0:
; GFX9-NEXT: v_min_f32_e32 v0, v0, v1
; GFX9-NEXT: ; return to shader part epilog
;
; GFX12-LABEL: test_fmin_f32_ieee_mode_off:
; GFX12: ; %bb.0:
; GFX12-NEXT: v_min_num_f32_e32 v0, v0, v1
; GFX12-NEXT: ; return to shader part epilog
%val = call float @llvm.minnum.f32(float %a, float %b)
ret float %val
}
define amdgpu_kernel void @test_fmin_v2f32(ptr addrspace(1) %out, <2 x float> %a, <2 x float> %b) #0 {
; GFX8-SDAG-LABEL: test_fmin_v2f32:
; GFX8-SDAG: ; %bb.0:
; GFX8-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2c
; GFX8-SDAG-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x24
; GFX8-SDAG-NEXT: s_mov_b32 s7, 0xf000
; GFX8-SDAG-NEXT: s_mov_b32 s6, -1
; GFX8-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, s3
; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s1
; GFX8-SDAG-NEXT: v_min_f32_e32 v1, v1, v0
; GFX8-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, s2
; GFX8-SDAG-NEXT: v_mul_f32_e64 v2, 1.0, s0
; GFX8-SDAG-NEXT: v_min_f32_e32 v0, v2, v0
; GFX8-SDAG-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; GFX8-SDAG-NEXT: s_endpgm
;
; GFX8-GISEL-LABEL: test_fmin_v2f32:
; GFX8-GISEL: ; %bb.0:
; GFX8-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2c
; GFX8-GISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x24
; GFX8-GISEL-NEXT: s_mov_b32 s6, -1
; GFX8-GISEL-NEXT: s_mov_b32 s7, 0xf000
; GFX8-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-GISEL-NEXT: v_mul_f32_e64 v0, 1.0, s0
; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s2
; GFX8-GISEL-NEXT: v_mul_f32_e64 v2, 1.0, s1
; GFX8-GISEL-NEXT: v_mul_f32_e64 v3, 1.0, s3
; GFX8-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
; GFX8-GISEL-NEXT: v_min_f32_e32 v1, v2, v3
; GFX8-GISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; GFX8-GISEL-NEXT: s_endpgm
;
; GFX9-SDAG-LABEL: test_fmin_v2f32:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2c
; GFX9-SDAG-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x24
; GFX9-SDAG-NEXT: s_mov_b32 s11, 0xf000
; GFX9-SDAG-NEXT: s_mov_b32 s10, -1
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: v_max_f32_e64 v0, s3, s3
; GFX9-SDAG-NEXT: v_max_f32_e64 v1, s1, s1
; GFX9-SDAG-NEXT: v_min_f32_e32 v1, v1, v0
; GFX9-SDAG-NEXT: v_max_f32_e64 v0, s2, s2
; GFX9-SDAG-NEXT: v_max_f32_e64 v2, s0, s0
; GFX9-SDAG-NEXT: v_min_f32_e32 v0, v2, v0
; GFX9-SDAG-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0
; GFX9-SDAG-NEXT: s_endpgm
;
; GFX9-GISEL-LABEL: test_fmin_v2f32:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2c
; GFX9-GISEL-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x24
; GFX9-GISEL-NEXT: s_mov_b32 s10, -1
; GFX9-GISEL-NEXT: s_mov_b32 s11, 0xf000
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: v_max_f32_e64 v0, s0, s0
; GFX9-GISEL-NEXT: v_max_f32_e64 v1, s2, s2
; GFX9-GISEL-NEXT: v_max_f32_e64 v2, s1, s1
; GFX9-GISEL-NEXT: v_max_f32_e64 v3, s3, s3
; GFX9-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
; GFX9-GISEL-NEXT: v_min_f32_e32 v1, v2, v3
; GFX9-GISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0
; GFX9-GISEL-NEXT: s_endpgm
;
; GFX12-SDAG-LABEL: test_fmin_v2f32:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_clause 0x1
; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x2c
; GFX12-SDAG-NEXT: s_load_b64 s[4:5], s[4:5], 0x24
; GFX12-SDAG-NEXT: s_mov_b32 s7, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s6, -1
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, s3, s3
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, s1, s1
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v2, s2, s2
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v3, s0, s0
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_dual_min_num_f32 v1, v1, v0 :: v_dual_min_num_f32 v0, v3, v2
; GFX12-SDAG-NEXT: buffer_store_b64 v[0:1], off, s[4:7], null
; GFX12-SDAG-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: test_fmin_v2f32:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_clause 0x1
; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x2c
; GFX12-GISEL-NEXT: s_load_b64 s[4:5], s[4:5], 0x24
; GFX12-GISEL-NEXT: s_mov_b32 s6, -1
; GFX12-GISEL-NEXT: s_mov_b32 s7, 0x31016000
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v0, s0, s0
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, s2, s2
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v2, s1, s1
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v3, s3, s3
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s0, v0
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s1, v1
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s2, v2
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s3, v3
; GFX12-GISEL-NEXT: s_min_num_f32 s0, s0, s1
; GFX12-GISEL-NEXT: s_min_num_f32 s1, s2, s3
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX12-GISEL-NEXT: buffer_store_b64 v[0:1], off, s[4:7], null
; GFX12-GISEL-NEXT: s_endpgm
%val = call <2 x float> @llvm.minnum.v2f32(<2 x float> %a, <2 x float> %b)
store <2 x float> %val, ptr addrspace(1) %out, align 8
ret void
}
define amdgpu_kernel void @test_fmin_v4f32(ptr addrspace(1) %out, <4 x float> %a, <4 x float> %b) #0 {
; GFX8-SDAG-LABEL: test_fmin_v4f32:
; GFX8-SDAG: ; %bb.0:
; GFX8-SDAG-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x34
; GFX8-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX8-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX8-SDAG-NEXT: s_mov_b32 s2, -1
; GFX8-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, s15
; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s11
; GFX8-SDAG-NEXT: v_min_f32_e32 v3, v1, v0
; GFX8-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, s14
; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s10
; GFX8-SDAG-NEXT: v_min_f32_e32 v2, v1, v0
; GFX8-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, s13
; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s9
; GFX8-SDAG-NEXT: v_min_f32_e32 v1, v1, v0
; GFX8-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, s12
; GFX8-SDAG-NEXT: v_mul_f32_e64 v4, 1.0, s8
; GFX8-SDAG-NEXT: v_min_f32_e32 v0, v4, v0
; GFX8-SDAG-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GFX8-SDAG-NEXT: s_endpgm
;
; GFX8-GISEL-LABEL: test_fmin_v4f32:
; GFX8-GISEL: ; %bb.0:
; GFX8-GISEL-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x34
; GFX8-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX8-GISEL-NEXT: s_mov_b32 s2, -1
; GFX8-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX8-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-GISEL-NEXT: v_mul_f32_e64 v0, 1.0, s8
; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s12
; GFX8-GISEL-NEXT: v_mul_f32_e64 v2, 1.0, s9
; GFX8-GISEL-NEXT: v_mul_f32_e64 v3, 1.0, s13
; GFX8-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
; GFX8-GISEL-NEXT: v_min_f32_e32 v1, v2, v3
; GFX8-GISEL-NEXT: v_mul_f32_e64 v2, 1.0, s10
; GFX8-GISEL-NEXT: v_mul_f32_e64 v3, 1.0, s14
; GFX8-GISEL-NEXT: v_min_f32_e32 v2, v2, v3
; GFX8-GISEL-NEXT: v_mul_f32_e64 v3, 1.0, s11
; GFX8-GISEL-NEXT: v_mul_f32_e64 v4, 1.0, s15
; GFX8-GISEL-NEXT: v_min_f32_e32 v3, v3, v4
; GFX8-GISEL-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GFX8-GISEL-NEXT: s_endpgm
;
; GFX9-SDAG-LABEL: test_fmin_v4f32:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x34
; GFX9-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX9-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX9-SDAG-NEXT: s_mov_b32 s2, -1
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: v_max_f32_e64 v0, s15, s15
; GFX9-SDAG-NEXT: v_max_f32_e64 v1, s11, s11
; GFX9-SDAG-NEXT: v_min_f32_e32 v3, v1, v0
; GFX9-SDAG-NEXT: v_max_f32_e64 v0, s14, s14
; GFX9-SDAG-NEXT: v_max_f32_e64 v1, s10, s10
; GFX9-SDAG-NEXT: v_min_f32_e32 v2, v1, v0
; GFX9-SDAG-NEXT: v_max_f32_e64 v0, s13, s13
; GFX9-SDAG-NEXT: v_max_f32_e64 v1, s9, s9
; GFX9-SDAG-NEXT: v_min_f32_e32 v1, v1, v0
; GFX9-SDAG-NEXT: v_max_f32_e64 v0, s12, s12
; GFX9-SDAG-NEXT: v_max_f32_e64 v4, s8, s8
; GFX9-SDAG-NEXT: v_min_f32_e32 v0, v4, v0
; GFX9-SDAG-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GFX9-SDAG-NEXT: s_endpgm
;
; GFX9-GISEL-LABEL: test_fmin_v4f32:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x34
; GFX9-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX9-GISEL-NEXT: s_mov_b32 s2, -1
; GFX9-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: v_max_f32_e64 v0, s8, s8
; GFX9-GISEL-NEXT: v_max_f32_e64 v1, s12, s12
; GFX9-GISEL-NEXT: v_max_f32_e64 v2, s9, s9
; GFX9-GISEL-NEXT: v_max_f32_e64 v3, s13, s13
; GFX9-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
; GFX9-GISEL-NEXT: v_min_f32_e32 v1, v2, v3
; GFX9-GISEL-NEXT: v_max_f32_e64 v2, s10, s10
; GFX9-GISEL-NEXT: v_max_f32_e64 v3, s14, s14
; GFX9-GISEL-NEXT: v_min_f32_e32 v2, v2, v3
; GFX9-GISEL-NEXT: v_max_f32_e64 v3, s11, s11
; GFX9-GISEL-NEXT: v_max_f32_e64 v4, s15, s15
; GFX9-GISEL-NEXT: v_min_f32_e32 v3, v3, v4
; GFX9-GISEL-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GFX9-GISEL-NEXT: s_endpgm
;
; GFX12-SDAG-LABEL: test_fmin_v4f32:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_clause 0x1
; GFX12-SDAG-NEXT: s_load_b256 s[8:15], s[4:5], 0x34
; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, s15, s15
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, s11, s11
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v2, s14, s14
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v4, s10, s10
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v5, s13, s13
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v6, s9, s9
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v7, s12, s12
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v8, s8, s8
; GFX12-SDAG-NEXT: v_dual_min_num_f32 v3, v1, v0 :: v_dual_min_num_f32 v2, v4, v2
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX12-SDAG-NEXT: v_dual_min_num_f32 v1, v6, v5 :: v_dual_min_num_f32 v0, v8, v7
; GFX12-SDAG-NEXT: buffer_store_b128 v[0:3], off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: test_fmin_v4f32:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_clause 0x1
; GFX12-GISEL-NEXT: s_load_b256 s[8:15], s[4:5], 0x34
; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v0, s8, s8
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, s12, s12
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v2, s9, s9
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v3, s13, s13
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v4, s10, s10
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v5, s14, s14
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v6, s11, s11
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v7, s15, s15
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s2, v0
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s3, v1
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s5, v2
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s6, v3
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s7, v4
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s8, v5
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s9, v6
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s10, v7
; GFX12-GISEL-NEXT: s_min_num_f32 s4, s2, s3
; GFX12-GISEL-NEXT: s_min_num_f32 s5, s5, s6
; GFX12-GISEL-NEXT: s_min_num_f32 s6, s7, s8
; GFX12-GISEL-NEXT: s_mov_b32 s2, -1
; GFX12-GISEL-NEXT: s_min_num_f32 s7, s9, s10
; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_2)
; GFX12-GISEL-NEXT: v_dual_mov_b32 v2, s6 :: v_dual_mov_b32 v3, s7
; GFX12-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-GISEL-NEXT: buffer_store_b128 v[0:3], off, s[0:3], null
; GFX12-GISEL-NEXT: s_endpgm
%val = call <4 x float> @llvm.minnum.v4f32(<4 x float> %a, <4 x float> %b)
store <4 x float> %val, ptr addrspace(1) %out, align 16
ret void
}
define amdgpu_kernel void @test_fmin_v8f32(ptr addrspace(1) %out, <8 x float> %a, <8 x float> %b) #0 {
; GFX8-SDAG-LABEL: test_fmin_v8f32:
; GFX8-SDAG: ; %bb.0:
; GFX8-SDAG-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x44
; GFX8-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX8-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX8-SDAG-NEXT: s_mov_b32 s2, -1
; GFX8-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, s19
; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s11
; GFX8-SDAG-NEXT: v_min_f32_e32 v3, v1, v0
; GFX8-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, s18
; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s10
; GFX8-SDAG-NEXT: v_min_f32_e32 v2, v1, v0
; GFX8-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, s17
; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s9
; GFX8-SDAG-NEXT: v_min_f32_e32 v1, v1, v0
; GFX8-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, s16
; GFX8-SDAG-NEXT: v_mul_f32_e64 v4, 1.0, s8
; GFX8-SDAG-NEXT: v_min_f32_e32 v0, v4, v0
; GFX8-SDAG-NEXT: v_mul_f32_e64 v4, 1.0, s23
; GFX8-SDAG-NEXT: v_mul_f32_e64 v5, 1.0, s15
; GFX8-SDAG-NEXT: v_min_f32_e32 v7, v5, v4
; GFX8-SDAG-NEXT: v_mul_f32_e64 v4, 1.0, s22
; GFX8-SDAG-NEXT: v_mul_f32_e64 v5, 1.0, s14
; GFX8-SDAG-NEXT: v_min_f32_e32 v6, v5, v4
; GFX8-SDAG-NEXT: v_mul_f32_e64 v4, 1.0, s21
; GFX8-SDAG-NEXT: v_mul_f32_e64 v5, 1.0, s13
; GFX8-SDAG-NEXT: v_min_f32_e32 v5, v5, v4
; GFX8-SDAG-NEXT: v_mul_f32_e64 v4, 1.0, s20
; GFX8-SDAG-NEXT: v_mul_f32_e64 v8, 1.0, s12
; GFX8-SDAG-NEXT: v_min_f32_e32 v4, v8, v4
; GFX8-SDAG-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; GFX8-SDAG-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GFX8-SDAG-NEXT: s_endpgm
;
; GFX8-GISEL-LABEL: test_fmin_v8f32:
; GFX8-GISEL: ; %bb.0:
; GFX8-GISEL-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x44
; GFX8-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX8-GISEL-NEXT: s_mov_b32 s2, -1
; GFX8-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX8-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-GISEL-NEXT: v_mul_f32_e64 v0, 1.0, s8
; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s16
; GFX8-GISEL-NEXT: v_mul_f32_e64 v2, 1.0, s9
; GFX8-GISEL-NEXT: v_mul_f32_e64 v3, 1.0, s17
; GFX8-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
; GFX8-GISEL-NEXT: v_min_f32_e32 v1, v2, v3
; GFX8-GISEL-NEXT: v_mul_f32_e64 v2, 1.0, s10
; GFX8-GISEL-NEXT: v_mul_f32_e64 v3, 1.0, s18
; GFX8-GISEL-NEXT: v_min_f32_e32 v2, v2, v3
; GFX8-GISEL-NEXT: v_mul_f32_e64 v3, 1.0, s11
; GFX8-GISEL-NEXT: v_mul_f32_e64 v4, 1.0, s19
; GFX8-GISEL-NEXT: v_min_f32_e32 v3, v3, v4
; GFX8-GISEL-NEXT: v_mul_f32_e64 v4, 1.0, s12
; GFX8-GISEL-NEXT: v_mul_f32_e64 v5, 1.0, s20
; GFX8-GISEL-NEXT: v_min_f32_e32 v4, v4, v5
; GFX8-GISEL-NEXT: v_mul_f32_e64 v5, 1.0, s13
; GFX8-GISEL-NEXT: v_mul_f32_e64 v6, 1.0, s21
; GFX8-GISEL-NEXT: v_min_f32_e32 v5, v5, v6
; GFX8-GISEL-NEXT: v_mul_f32_e64 v6, 1.0, s14
; GFX8-GISEL-NEXT: v_mul_f32_e64 v7, 1.0, s22
; GFX8-GISEL-NEXT: v_min_f32_e32 v6, v6, v7
; GFX8-GISEL-NEXT: v_mul_f32_e64 v7, 1.0, s15
; GFX8-GISEL-NEXT: v_mul_f32_e64 v8, 1.0, s23
; GFX8-GISEL-NEXT: v_min_f32_e32 v7, v7, v8
; GFX8-GISEL-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GFX8-GISEL-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; GFX8-GISEL-NEXT: s_endpgm
;
; GFX9-SDAG-LABEL: test_fmin_v8f32:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x44
; GFX9-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX9-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX9-SDAG-NEXT: s_mov_b32 s2, -1
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: v_max_f32_e64 v0, s19, s19
; GFX9-SDAG-NEXT: v_max_f32_e64 v1, s11, s11
; GFX9-SDAG-NEXT: v_min_f32_e32 v3, v1, v0
; GFX9-SDAG-NEXT: v_max_f32_e64 v0, s18, s18
; GFX9-SDAG-NEXT: v_max_f32_e64 v1, s10, s10
; GFX9-SDAG-NEXT: v_min_f32_e32 v2, v1, v0
; GFX9-SDAG-NEXT: v_max_f32_e64 v0, s17, s17
; GFX9-SDAG-NEXT: v_max_f32_e64 v1, s9, s9
; GFX9-SDAG-NEXT: v_min_f32_e32 v1, v1, v0
; GFX9-SDAG-NEXT: v_max_f32_e64 v0, s16, s16
; GFX9-SDAG-NEXT: v_max_f32_e64 v4, s8, s8
; GFX9-SDAG-NEXT: v_min_f32_e32 v0, v4, v0
; GFX9-SDAG-NEXT: v_max_f32_e64 v4, s23, s23
; GFX9-SDAG-NEXT: v_max_f32_e64 v5, s15, s15
; GFX9-SDAG-NEXT: v_min_f32_e32 v7, v5, v4
; GFX9-SDAG-NEXT: v_max_f32_e64 v4, s22, s22
; GFX9-SDAG-NEXT: v_max_f32_e64 v5, s14, s14
; GFX9-SDAG-NEXT: v_min_f32_e32 v6, v5, v4
; GFX9-SDAG-NEXT: v_max_f32_e64 v4, s21, s21
; GFX9-SDAG-NEXT: v_max_f32_e64 v5, s13, s13
; GFX9-SDAG-NEXT: v_min_f32_e32 v5, v5, v4
; GFX9-SDAG-NEXT: v_max_f32_e64 v4, s20, s20
; GFX9-SDAG-NEXT: v_max_f32_e64 v8, s12, s12
; GFX9-SDAG-NEXT: v_min_f32_e32 v4, v8, v4
; GFX9-SDAG-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; GFX9-SDAG-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GFX9-SDAG-NEXT: s_endpgm
;
; GFX9-GISEL-LABEL: test_fmin_v8f32:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x44
; GFX9-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX9-GISEL-NEXT: s_mov_b32 s2, -1
; GFX9-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: v_max_f32_e64 v0, s8, s8
; GFX9-GISEL-NEXT: v_max_f32_e64 v1, s16, s16
; GFX9-GISEL-NEXT: v_max_f32_e64 v2, s9, s9
; GFX9-GISEL-NEXT: v_max_f32_e64 v3, s17, s17
; GFX9-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
; GFX9-GISEL-NEXT: v_min_f32_e32 v1, v2, v3
; GFX9-GISEL-NEXT: v_max_f32_e64 v2, s10, s10
; GFX9-GISEL-NEXT: v_max_f32_e64 v3, s18, s18
; GFX9-GISEL-NEXT: v_min_f32_e32 v2, v2, v3
; GFX9-GISEL-NEXT: v_max_f32_e64 v3, s11, s11
; GFX9-GISEL-NEXT: v_max_f32_e64 v4, s19, s19
; GFX9-GISEL-NEXT: v_min_f32_e32 v3, v3, v4
; GFX9-GISEL-NEXT: v_max_f32_e64 v4, s12, s12
; GFX9-GISEL-NEXT: v_max_f32_e64 v5, s20, s20
; GFX9-GISEL-NEXT: v_min_f32_e32 v4, v4, v5
; GFX9-GISEL-NEXT: v_max_f32_e64 v5, s13, s13
; GFX9-GISEL-NEXT: v_max_f32_e64 v6, s21, s21
; GFX9-GISEL-NEXT: v_min_f32_e32 v5, v5, v6
; GFX9-GISEL-NEXT: v_max_f32_e64 v6, s14, s14
; GFX9-GISEL-NEXT: v_max_f32_e64 v7, s22, s22
; GFX9-GISEL-NEXT: v_min_f32_e32 v6, v6, v7
; GFX9-GISEL-NEXT: v_max_f32_e64 v7, s15, s15
; GFX9-GISEL-NEXT: v_max_f32_e64 v8, s23, s23
; GFX9-GISEL-NEXT: v_min_f32_e32 v7, v7, v8
; GFX9-GISEL-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GFX9-GISEL-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; GFX9-GISEL-NEXT: s_endpgm
;
; GFX12-SDAG-LABEL: test_fmin_v8f32:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_clause 0x1
; GFX12-SDAG-NEXT: s_load_b512 s[8:23], s[4:5], 0x44
; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, s19, s19
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, s11, s11
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v2, s18, s18
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v4, s10, s10
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v5, s17, s17
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v6, s9, s9
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v7, s23, s23
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v10, s15, s15
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v11, s22, s22
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v12, s14, s14
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v13, s21, s21
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v14, s13, s13
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v15, s20, s20
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v16, s12, s12
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v8, s16, s16
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v9, s8, s8
; GFX12-SDAG-NEXT: v_dual_min_num_f32 v3, v1, v0 :: v_dual_min_num_f32 v2, v4, v2
; GFX12-SDAG-NEXT: v_dual_min_num_f32 v1, v6, v5 :: v_dual_min_num_f32 v6, v12, v11
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3)
; GFX12-SDAG-NEXT: v_dual_min_num_f32 v7, v10, v7 :: v_dual_min_num_f32 v0, v9, v8
; GFX12-SDAG-NEXT: v_dual_min_num_f32 v5, v14, v13 :: v_dual_min_num_f32 v4, v16, v15
; GFX12-SDAG-NEXT: s_clause 0x1
; GFX12-SDAG-NEXT: buffer_store_b128 v[4:7], off, s[0:3], null offset:16
; GFX12-SDAG-NEXT: buffer_store_b128 v[0:3], off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: test_fmin_v8f32:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_clause 0x1
; GFX12-GISEL-NEXT: s_load_b512 s[8:23], s[4:5], 0x44
; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v0, s8, s8
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, s16, s16
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v2, s9, s9
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v3, s17, s17
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v4, s10, s10
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v5, s18, s18
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v6, s11, s11
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v7, s19, s19
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v8, s12, s12
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v9, s20, s20
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v10, s13, s13
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v11, s21, s21
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v12, s14, s14
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v13, s22, s22
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v14, s15, s15
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v15, s23, s23
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s2, v0
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s3, v1
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s5, v2
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s6, v3
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s7, v4
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s8, v5
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s9, v6
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s10, v7
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s11, v8
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s12, v9
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s13, v10
; GFX12-GISEL-NEXT: s_min_num_f32 s4, s2, s3
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s2, v11
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s3, v12
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s14, v13
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s15, v14
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s16, v15
; GFX12-GISEL-NEXT: s_min_num_f32 s5, s5, s6
; GFX12-GISEL-NEXT: s_min_num_f32 s6, s7, s8
; GFX12-GISEL-NEXT: s_min_num_f32 s7, s9, s10
; GFX12-GISEL-NEXT: s_min_num_f32 s8, s11, s12
; GFX12-GISEL-NEXT: s_min_num_f32 s9, s13, s2
; GFX12-GISEL-NEXT: s_min_num_f32 s10, s3, s14
; GFX12-GISEL-NEXT: s_min_num_f32 s11, s15, s16
; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
; GFX12-GISEL-NEXT: v_dual_mov_b32 v2, s6 :: v_dual_mov_b32 v3, s7
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: v_dual_mov_b32 v4, s8 :: v_dual_mov_b32 v5, s9
; GFX12-GISEL-NEXT: v_dual_mov_b32 v6, s10 :: v_dual_mov_b32 v7, s11
; GFX12-GISEL-NEXT: s_mov_b32 s2, -1
; GFX12-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-GISEL-NEXT: s_clause 0x1
; GFX12-GISEL-NEXT: buffer_store_b128 v[0:3], off, s[0:3], null
; GFX12-GISEL-NEXT: buffer_store_b128 v[4:7], off, s[0:3], null offset:16
; GFX12-GISEL-NEXT: s_endpgm
%val = call <8 x float> @llvm.minnum.v8f32(<8 x float> %a, <8 x float> %b)
store <8 x float> %val, ptr addrspace(1) %out, align 32
ret void
}
define amdgpu_kernel void @test_fmin_v16f32(ptr addrspace(1) %out, <16 x float> %a, <16 x float> %b) #0 {
; GFX8-SDAG-LABEL: test_fmin_v16f32:
; GFX8-SDAG: ; %bb.0:
; GFX8-SDAG-NEXT: s_load_dwordx16 s[36:51], s[4:5], 0xa4
; GFX8-SDAG-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x64
; GFX8-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX8-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX8-SDAG-NEXT: s_mov_b32 s2, -1
; GFX8-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, s39
; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s11
; GFX8-SDAG-NEXT: v_min_f32_e32 v3, v1, v0
; GFX8-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, s38
; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s10
; GFX8-SDAG-NEXT: v_min_f32_e32 v2, v1, v0
; GFX8-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, s37
; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s9
; GFX8-SDAG-NEXT: v_min_f32_e32 v1, v1, v0
; GFX8-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, s36
; GFX8-SDAG-NEXT: v_mul_f32_e64 v4, 1.0, s8
; GFX8-SDAG-NEXT: v_min_f32_e32 v0, v4, v0
; GFX8-SDAG-NEXT: v_mul_f32_e64 v4, 1.0, s43
; GFX8-SDAG-NEXT: v_mul_f32_e64 v5, 1.0, s15
; GFX8-SDAG-NEXT: v_min_f32_e32 v7, v5, v4
; GFX8-SDAG-NEXT: v_mul_f32_e64 v4, 1.0, s42
; GFX8-SDAG-NEXT: v_mul_f32_e64 v5, 1.0, s14
; GFX8-SDAG-NEXT: v_min_f32_e32 v6, v5, v4
; GFX8-SDAG-NEXT: v_mul_f32_e64 v4, 1.0, s41
; GFX8-SDAG-NEXT: v_mul_f32_e64 v5, 1.0, s13
; GFX8-SDAG-NEXT: v_min_f32_e32 v5, v5, v4
; GFX8-SDAG-NEXT: v_mul_f32_e64 v4, 1.0, s40
; GFX8-SDAG-NEXT: v_mul_f32_e64 v8, 1.0, s12
; GFX8-SDAG-NEXT: v_min_f32_e32 v4, v8, v4
; GFX8-SDAG-NEXT: v_mul_f32_e64 v8, 1.0, s47
; GFX8-SDAG-NEXT: v_mul_f32_e64 v9, 1.0, s19
; GFX8-SDAG-NEXT: v_min_f32_e32 v11, v9, v8
; GFX8-SDAG-NEXT: v_mul_f32_e64 v8, 1.0, s46
; GFX8-SDAG-NEXT: v_mul_f32_e64 v9, 1.0, s18
; GFX8-SDAG-NEXT: v_min_f32_e32 v10, v9, v8
; GFX8-SDAG-NEXT: v_mul_f32_e64 v8, 1.0, s45
; GFX8-SDAG-NEXT: v_mul_f32_e64 v9, 1.0, s17
; GFX8-SDAG-NEXT: v_min_f32_e32 v9, v9, v8
; GFX8-SDAG-NEXT: v_mul_f32_e64 v8, 1.0, s44
; GFX8-SDAG-NEXT: v_mul_f32_e64 v12, 1.0, s16
; GFX8-SDAG-NEXT: v_min_f32_e32 v8, v12, v8
; GFX8-SDAG-NEXT: v_mul_f32_e64 v12, 1.0, s51
; GFX8-SDAG-NEXT: v_mul_f32_e64 v13, 1.0, s23
; GFX8-SDAG-NEXT: v_min_f32_e32 v15, v13, v12
; GFX8-SDAG-NEXT: v_mul_f32_e64 v12, 1.0, s50
; GFX8-SDAG-NEXT: v_mul_f32_e64 v13, 1.0, s22
; GFX8-SDAG-NEXT: v_min_f32_e32 v14, v13, v12
; GFX8-SDAG-NEXT: v_mul_f32_e64 v12, 1.0, s49
; GFX8-SDAG-NEXT: v_mul_f32_e64 v13, 1.0, s21
; GFX8-SDAG-NEXT: v_min_f32_e32 v13, v13, v12
; GFX8-SDAG-NEXT: v_mul_f32_e64 v12, 1.0, s48
; GFX8-SDAG-NEXT: v_mul_f32_e64 v16, 1.0, s20
; GFX8-SDAG-NEXT: v_min_f32_e32 v12, v16, v12
; GFX8-SDAG-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:48
; GFX8-SDAG-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:32
; GFX8-SDAG-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; GFX8-SDAG-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GFX8-SDAG-NEXT: s_endpgm
;
; GFX8-GISEL-LABEL: test_fmin_v16f32:
; GFX8-GISEL: ; %bb.0:
; GFX8-GISEL-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x64
; GFX8-GISEL-NEXT: s_load_dwordx16 s[36:51], s[4:5], 0xa4
; GFX8-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX8-GISEL-NEXT: s_mov_b32 s2, -1
; GFX8-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX8-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-GISEL-NEXT: v_mul_f32_e64 v0, 1.0, s8
; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s36
; GFX8-GISEL-NEXT: v_mul_f32_e64 v2, 1.0, s9
; GFX8-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s37
; GFX8-GISEL-NEXT: v_min_f32_e32 v1, v2, v1
; GFX8-GISEL-NEXT: v_mul_f32_e64 v2, 1.0, s10
; GFX8-GISEL-NEXT: v_mul_f32_e64 v3, 1.0, s38
; GFX8-GISEL-NEXT: v_min_f32_e32 v2, v2, v3
; GFX8-GISEL-NEXT: v_mul_f32_e64 v3, 1.0, s11
; GFX8-GISEL-NEXT: v_mul_f32_e64 v4, 1.0, s39
; GFX8-GISEL-NEXT: v_min_f32_e32 v3, v3, v4
; GFX8-GISEL-NEXT: v_mul_f32_e64 v4, 1.0, s12
; GFX8-GISEL-NEXT: v_mul_f32_e64 v5, 1.0, s40
; GFX8-GISEL-NEXT: v_min_f32_e32 v4, v4, v5
; GFX8-GISEL-NEXT: v_mul_f32_e64 v5, 1.0, s13
; GFX8-GISEL-NEXT: v_mul_f32_e64 v6, 1.0, s41
; GFX8-GISEL-NEXT: v_min_f32_e32 v5, v5, v6
; GFX8-GISEL-NEXT: v_mul_f32_e64 v6, 1.0, s14
; GFX8-GISEL-NEXT: v_mul_f32_e64 v7, 1.0, s42
; GFX8-GISEL-NEXT: v_min_f32_e32 v6, v6, v7
; GFX8-GISEL-NEXT: v_mul_f32_e64 v7, 1.0, s15
; GFX8-GISEL-NEXT: v_mul_f32_e64 v8, 1.0, s43
; GFX8-GISEL-NEXT: v_min_f32_e32 v7, v7, v8
; GFX8-GISEL-NEXT: v_mul_f32_e64 v8, 1.0, s16
; GFX8-GISEL-NEXT: v_mul_f32_e64 v9, 1.0, s44
; GFX8-GISEL-NEXT: v_min_f32_e32 v8, v8, v9
; GFX8-GISEL-NEXT: v_mul_f32_e64 v9, 1.0, s17
; GFX8-GISEL-NEXT: v_mul_f32_e64 v10, 1.0, s45
; GFX8-GISEL-NEXT: v_min_f32_e32 v9, v9, v10
; GFX8-GISEL-NEXT: v_mul_f32_e64 v10, 1.0, s18
; GFX8-GISEL-NEXT: v_mul_f32_e64 v11, 1.0, s46
; GFX8-GISEL-NEXT: v_min_f32_e32 v10, v10, v11
; GFX8-GISEL-NEXT: v_mul_f32_e64 v11, 1.0, s19
; GFX8-GISEL-NEXT: v_mul_f32_e64 v12, 1.0, s47
; GFX8-GISEL-NEXT: v_min_f32_e32 v11, v11, v12
; GFX8-GISEL-NEXT: v_mul_f32_e64 v12, 1.0, s20
; GFX8-GISEL-NEXT: v_mul_f32_e64 v13, 1.0, s48
; GFX8-GISEL-NEXT: v_min_f32_e32 v12, v12, v13
; GFX8-GISEL-NEXT: v_mul_f32_e64 v13, 1.0, s21
; GFX8-GISEL-NEXT: v_mul_f32_e64 v14, 1.0, s49
; GFX8-GISEL-NEXT: v_min_f32_e32 v13, v13, v14
; GFX8-GISEL-NEXT: v_mul_f32_e64 v14, 1.0, s22
; GFX8-GISEL-NEXT: v_mul_f32_e64 v15, 1.0, s50
; GFX8-GISEL-NEXT: v_min_f32_e32 v14, v14, v15
; GFX8-GISEL-NEXT: v_mul_f32_e64 v15, 1.0, s23
; GFX8-GISEL-NEXT: v_mul_f32_e64 v16, 1.0, s51
; GFX8-GISEL-NEXT: v_min_f32_e32 v15, v15, v16
; GFX8-GISEL-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GFX8-GISEL-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; GFX8-GISEL-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:32
; GFX8-GISEL-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:48
; GFX8-GISEL-NEXT: s_endpgm
;
; GFX9-SDAG-LABEL: test_fmin_v16f32:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_load_dwordx16 s[36:51], s[4:5], 0xa4
; GFX9-SDAG-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x64
; GFX9-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX9-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX9-SDAG-NEXT: s_mov_b32 s2, -1
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: v_max_f32_e64 v0, s39, s39
; GFX9-SDAG-NEXT: v_max_f32_e64 v1, s11, s11
; GFX9-SDAG-NEXT: v_min_f32_e32 v3, v1, v0
; GFX9-SDAG-NEXT: v_max_f32_e64 v0, s38, s38
; GFX9-SDAG-NEXT: v_max_f32_e64 v1, s10, s10
; GFX9-SDAG-NEXT: v_min_f32_e32 v2, v1, v0
; GFX9-SDAG-NEXT: v_max_f32_e64 v0, s37, s37
; GFX9-SDAG-NEXT: v_max_f32_e64 v1, s9, s9
; GFX9-SDAG-NEXT: v_min_f32_e32 v1, v1, v0
; GFX9-SDAG-NEXT: v_max_f32_e64 v0, s36, s36
; GFX9-SDAG-NEXT: v_max_f32_e64 v4, s8, s8
; GFX9-SDAG-NEXT: v_min_f32_e32 v0, v4, v0
; GFX9-SDAG-NEXT: v_max_f32_e64 v4, s43, s43
; GFX9-SDAG-NEXT: v_max_f32_e64 v5, s15, s15
; GFX9-SDAG-NEXT: v_min_f32_e32 v7, v5, v4
; GFX9-SDAG-NEXT: v_max_f32_e64 v4, s42, s42
; GFX9-SDAG-NEXT: v_max_f32_e64 v5, s14, s14
; GFX9-SDAG-NEXT: v_min_f32_e32 v6, v5, v4
; GFX9-SDAG-NEXT: v_max_f32_e64 v4, s41, s41
; GFX9-SDAG-NEXT: v_max_f32_e64 v5, s13, s13
; GFX9-SDAG-NEXT: v_min_f32_e32 v5, v5, v4
; GFX9-SDAG-NEXT: v_max_f32_e64 v4, s40, s40
; GFX9-SDAG-NEXT: v_max_f32_e64 v8, s12, s12
; GFX9-SDAG-NEXT: v_min_f32_e32 v4, v8, v4
; GFX9-SDAG-NEXT: v_max_f32_e64 v8, s47, s47
; GFX9-SDAG-NEXT: v_max_f32_e64 v9, s19, s19
; GFX9-SDAG-NEXT: v_min_f32_e32 v11, v9, v8
; GFX9-SDAG-NEXT: v_max_f32_e64 v8, s46, s46
; GFX9-SDAG-NEXT: v_max_f32_e64 v9, s18, s18
; GFX9-SDAG-NEXT: v_min_f32_e32 v10, v9, v8
; GFX9-SDAG-NEXT: v_max_f32_e64 v8, s45, s45
; GFX9-SDAG-NEXT: v_max_f32_e64 v9, s17, s17
; GFX9-SDAG-NEXT: v_min_f32_e32 v9, v9, v8
; GFX9-SDAG-NEXT: v_max_f32_e64 v8, s44, s44
; GFX9-SDAG-NEXT: v_max_f32_e64 v12, s16, s16
; GFX9-SDAG-NEXT: v_min_f32_e32 v8, v12, v8
; GFX9-SDAG-NEXT: v_max_f32_e64 v12, s51, s51
; GFX9-SDAG-NEXT: v_max_f32_e64 v13, s23, s23
; GFX9-SDAG-NEXT: v_min_f32_e32 v15, v13, v12
; GFX9-SDAG-NEXT: v_max_f32_e64 v12, s50, s50
; GFX9-SDAG-NEXT: v_max_f32_e64 v13, s22, s22
; GFX9-SDAG-NEXT: v_min_f32_e32 v14, v13, v12
; GFX9-SDAG-NEXT: v_max_f32_e64 v12, s49, s49
; GFX9-SDAG-NEXT: v_max_f32_e64 v13, s21, s21
; GFX9-SDAG-NEXT: v_min_f32_e32 v13, v13, v12
; GFX9-SDAG-NEXT: v_max_f32_e64 v12, s48, s48
; GFX9-SDAG-NEXT: v_max_f32_e64 v16, s20, s20
; GFX9-SDAG-NEXT: v_min_f32_e32 v12, v16, v12
; GFX9-SDAG-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:48
; GFX9-SDAG-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:32
; GFX9-SDAG-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; GFX9-SDAG-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GFX9-SDAG-NEXT: s_endpgm
;
; GFX9-GISEL-LABEL: test_fmin_v16f32:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x64
; GFX9-GISEL-NEXT: s_load_dwordx16 s[36:51], s[4:5], 0xa4
; GFX9-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX9-GISEL-NEXT: s_mov_b32 s2, -1
; GFX9-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: v_max_f32_e64 v0, s8, s8
; GFX9-GISEL-NEXT: v_max_f32_e64 v1, s36, s36
; GFX9-GISEL-NEXT: v_max_f32_e64 v2, s9, s9
; GFX9-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
; GFX9-GISEL-NEXT: v_max_f32_e64 v1, s37, s37
; GFX9-GISEL-NEXT: v_min_f32_e32 v1, v2, v1
; GFX9-GISEL-NEXT: v_max_f32_e64 v2, s10, s10
; GFX9-GISEL-NEXT: v_max_f32_e64 v3, s38, s38
; GFX9-GISEL-NEXT: v_min_f32_e32 v2, v2, v3
; GFX9-GISEL-NEXT: v_max_f32_e64 v3, s11, s11
; GFX9-GISEL-NEXT: v_max_f32_e64 v4, s39, s39
; GFX9-GISEL-NEXT: v_min_f32_e32 v3, v3, v4
; GFX9-GISEL-NEXT: v_max_f32_e64 v4, s12, s12
; GFX9-GISEL-NEXT: v_max_f32_e64 v5, s40, s40
; GFX9-GISEL-NEXT: v_min_f32_e32 v4, v4, v5
; GFX9-GISEL-NEXT: v_max_f32_e64 v5, s13, s13
; GFX9-GISEL-NEXT: v_max_f32_e64 v6, s41, s41
; GFX9-GISEL-NEXT: v_min_f32_e32 v5, v5, v6
; GFX9-GISEL-NEXT: v_max_f32_e64 v6, s14, s14
; GFX9-GISEL-NEXT: v_max_f32_e64 v7, s42, s42
; GFX9-GISEL-NEXT: v_min_f32_e32 v6, v6, v7
; GFX9-GISEL-NEXT: v_max_f32_e64 v7, s15, s15
; GFX9-GISEL-NEXT: v_max_f32_e64 v8, s43, s43
; GFX9-GISEL-NEXT: v_min_f32_e32 v7, v7, v8
; GFX9-GISEL-NEXT: v_max_f32_e64 v8, s16, s16
; GFX9-GISEL-NEXT: v_max_f32_e64 v9, s44, s44
; GFX9-GISEL-NEXT: v_min_f32_e32 v8, v8, v9
; GFX9-GISEL-NEXT: v_max_f32_e64 v9, s17, s17
; GFX9-GISEL-NEXT: v_max_f32_e64 v10, s45, s45
; GFX9-GISEL-NEXT: v_min_f32_e32 v9, v9, v10
; GFX9-GISEL-NEXT: v_max_f32_e64 v10, s18, s18
; GFX9-GISEL-NEXT: v_max_f32_e64 v11, s46, s46
; GFX9-GISEL-NEXT: v_min_f32_e32 v10, v10, v11
; GFX9-GISEL-NEXT: v_max_f32_e64 v11, s19, s19
; GFX9-GISEL-NEXT: v_max_f32_e64 v12, s47, s47
; GFX9-GISEL-NEXT: v_min_f32_e32 v11, v11, v12
; GFX9-GISEL-NEXT: v_max_f32_e64 v12, s20, s20
; GFX9-GISEL-NEXT: v_max_f32_e64 v13, s48, s48
; GFX9-GISEL-NEXT: v_min_f32_e32 v12, v12, v13
; GFX9-GISEL-NEXT: v_max_f32_e64 v13, s21, s21
; GFX9-GISEL-NEXT: v_max_f32_e64 v14, s49, s49
; GFX9-GISEL-NEXT: v_min_f32_e32 v13, v13, v14
; GFX9-GISEL-NEXT: v_max_f32_e64 v14, s22, s22
; GFX9-GISEL-NEXT: v_max_f32_e64 v15, s50, s50
; GFX9-GISEL-NEXT: v_min_f32_e32 v14, v14, v15
; GFX9-GISEL-NEXT: v_max_f32_e64 v15, s23, s23
; GFX9-GISEL-NEXT: v_max_f32_e64 v16, s51, s51
; GFX9-GISEL-NEXT: v_min_f32_e32 v15, v15, v16
; GFX9-GISEL-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GFX9-GISEL-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; GFX9-GISEL-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 offset:32
; GFX9-GISEL-NEXT: buffer_store_dwordx4 v[12:15], off, s[0:3], 0 offset:48
; GFX9-GISEL-NEXT: s_endpgm
;
; GFX12-SDAG-LABEL: test_fmin_v16f32:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_clause 0x2
; GFX12-SDAG-NEXT: s_load_b512 s[36:51], s[4:5], 0xa4
; GFX12-SDAG-NEXT: s_load_b512 s[8:23], s[4:5], 0x64
; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, s39, s39
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, s11, s11
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v2, s38, s38
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v4, s10, s10
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v5, s37, s37
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v6, s9, s9
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v7, s43, s43
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v8, s15, s15
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v9, s42, s42
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v10, s14, s14
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v11, s41, s41
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v12, s13, s13
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v13, s47, s47
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v14, s19, s19
; GFX12-SDAG-NEXT: v_dual_min_num_f32 v3, v1, v0 :: v_dual_min_num_f32 v2, v4, v2
; GFX12-SDAG-NEXT: v_min_num_f32_e32 v7, v8, v7
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, s46, s46
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v4, s18, s18
; GFX12-SDAG-NEXT: v_min_num_f32_e32 v1, v6, v5
; GFX12-SDAG-NEXT: v_min_num_f32_e32 v6, v10, v9
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v8, s45, s45
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v9, s17, s17
; GFX12-SDAG-NEXT: v_min_num_f32_e32 v5, v12, v11
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v18, s40, s40
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v19, s12, s12
; GFX12-SDAG-NEXT: v_min_num_f32_e32 v10, v4, v0
; GFX12-SDAG-NEXT: v_min_num_f32_e32 v9, v9, v8
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v4, s51, s51
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v8, s23, s23
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v12, s50, s50
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v20, s49, s49
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v21, s21, s21
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v22, s48, s48
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v23, s20, s20
; GFX12-SDAG-NEXT: v_min_num_f32_e32 v11, v14, v13
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v13, s22, s22
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, s44, s44
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v24, s16, s16
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v16, s36, s36
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v17, s8, s8
; GFX12-SDAG-NEXT: v_min_num_f32_e32 v15, v8, v4
; GFX12-SDAG-NEXT: v_min_num_f32_e32 v14, v13, v12
; GFX12-SDAG-NEXT: v_dual_min_num_f32 v13, v21, v20 :: v_dual_min_num_f32 v12, v23, v22
; GFX12-SDAG-NEXT: v_min_num_f32_e32 v8, v24, v0
; GFX12-SDAG-NEXT: v_min_num_f32_e32 v4, v19, v18
; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, v17, v16
; GFX12-SDAG-NEXT: s_clause 0x3
; GFX12-SDAG-NEXT: buffer_store_b128 v[12:15], off, s[0:3], null offset:48
; GFX12-SDAG-NEXT: buffer_store_b128 v[8:11], off, s[0:3], null offset:32
; GFX12-SDAG-NEXT: buffer_store_b128 v[4:7], off, s[0:3], null offset:16
; GFX12-SDAG-NEXT: buffer_store_b128 v[0:3], off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: test_fmin_v16f32:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_clause 0x2
; GFX12-GISEL-NEXT: s_load_b512 s[36:51], s[4:5], 0x64
; GFX12-GISEL-NEXT: s_load_b512 s[8:23], s[4:5], 0xa4
; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v0, s36, s36
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, s8, s8
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v2, s37, s37
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v3, s9, s9
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v4, s38, s38
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v5, s10, s10
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v6, s39, s39
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v7, s11, s11
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v8, s40, s40
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v9, s12, s12
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v11, s13, s13
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s2, v0
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s3, v1
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s4, v2
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s5, v3
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s6, v4
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s7, v5
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s11, v6
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s12, v7
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s13, v8
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s24, v9
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v0, s42, s42
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, s14, s14
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v2, s43, s43
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v3, s15, s15
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v4, s44, s44
; GFX12-GISEL-NEXT: s_min_num_f32 s8, s2, s3
; GFX12-GISEL-NEXT: s_min_num_f32 s9, s4, s5
; GFX12-GISEL-NEXT: s_min_num_f32 s10, s6, s7
; GFX12-GISEL-NEXT: s_min_num_f32 s11, s11, s12
; GFX12-GISEL-NEXT: s_min_num_f32 s4, s13, s24
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s2, v0
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s3, v1
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s7, v2
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s12, v3
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s13, v4
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v0, s16, s16
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, s45, s45
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v2, s17, s17
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v3, s46, s46
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v4, s18, s18
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s14, v0
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s15, v1
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s16, v2
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s17, v3
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s18, v4
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v0, s47, s47
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, s19, s19
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v2, s48, s48
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v3, s20, s20
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v4, s49, s49
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v10, s41, s41
; GFX12-GISEL-NEXT: s_min_num_f32 s6, s2, s3
; GFX12-GISEL-NEXT: s_min_num_f32 s7, s7, s12
; GFX12-GISEL-NEXT: s_min_num_f32 s12, s13, s14
; GFX12-GISEL-NEXT: s_min_num_f32 s13, s15, s16
; GFX12-GISEL-NEXT: s_min_num_f32 s14, s17, s18
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s2, v0
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s3, v1
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s16, v2
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s17, v3
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s18, v4
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v0, s21, s21
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, s50, s50
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v2, s22, s22
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v3, s51, s51
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v4, s23, s23
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s25, v10
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s26, v11
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s19, v0
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s20, v1
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s21, v2
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s22, v3
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s23, v4
; GFX12-GISEL-NEXT: s_min_num_f32 s5, s25, s26
; GFX12-GISEL-NEXT: s_min_num_f32 s15, s2, s3
; GFX12-GISEL-NEXT: s_min_num_f32 s16, s16, s17
; GFX12-GISEL-NEXT: s_min_num_f32 s17, s18, s19
; GFX12-GISEL-NEXT: s_min_num_f32 s18, s20, s21
; GFX12-GISEL-NEXT: s_min_num_f32 s19, s22, s23
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: v_dual_mov_b32 v0, s8 :: v_dual_mov_b32 v1, s9
; GFX12-GISEL-NEXT: v_dual_mov_b32 v2, s10 :: v_dual_mov_b32 v3, s11
; GFX12-GISEL-NEXT: v_dual_mov_b32 v4, s4 :: v_dual_mov_b32 v5, s5
; GFX12-GISEL-NEXT: v_dual_mov_b32 v6, s6 :: v_dual_mov_b32 v7, s7
; GFX12-GISEL-NEXT: v_dual_mov_b32 v8, s12 :: v_dual_mov_b32 v9, s13
; GFX12-GISEL-NEXT: v_dual_mov_b32 v10, s14 :: v_dual_mov_b32 v11, s15
; GFX12-GISEL-NEXT: v_dual_mov_b32 v12, s16 :: v_dual_mov_b32 v13, s17
; GFX12-GISEL-NEXT: s_mov_b32 s2, -1
; GFX12-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-GISEL-NEXT: v_dual_mov_b32 v14, s18 :: v_dual_mov_b32 v15, s19
; GFX12-GISEL-NEXT: s_clause 0x3
; GFX12-GISEL-NEXT: buffer_store_b128 v[0:3], off, s[0:3], null
; GFX12-GISEL-NEXT: buffer_store_b128 v[4:7], off, s[0:3], null offset:16
; GFX12-GISEL-NEXT: buffer_store_b128 v[8:11], off, s[0:3], null offset:32
; GFX12-GISEL-NEXT: buffer_store_b128 v[12:15], off, s[0:3], null offset:48
; GFX12-GISEL-NEXT: s_endpgm
%val = call <16 x float> @llvm.minnum.v16f32(<16 x float> %a, <16 x float> %b)
store <16 x float> %val, ptr addrspace(1) %out, align 64
ret void
}
define amdgpu_kernel void @constant_fold_fmin_f32(ptr addrspace(1) %out) #0 {
; GFX8-SDAG-LABEL: constant_fold_fmin_f32:
; GFX8-SDAG: ; %bb.0:
; GFX8-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX8-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX8-SDAG-NEXT: s_mov_b32 s2, -1
; GFX8-SDAG-NEXT: v_mov_b32_e32 v0, 1.0
; GFX8-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-SDAG-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX8-SDAG-NEXT: s_endpgm
;
; GFX8-GISEL-LABEL: constant_fold_fmin_f32:
; GFX8-GISEL: ; %bb.0:
; GFX8-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX8-GISEL-NEXT: v_mov_b32_e32 v0, 1.0
; GFX8-GISEL-NEXT: s_mov_b32 s2, -1
; GFX8-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX8-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX8-GISEL-NEXT: s_endpgm
;
; GFX9-SDAG-LABEL: constant_fold_fmin_f32:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX9-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX9-SDAG-NEXT: s_mov_b32 s2, -1
; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, 1.0
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX9-SDAG-NEXT: s_endpgm
;
; GFX9-GISEL-LABEL: constant_fold_fmin_f32:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX9-GISEL-NEXT: v_mov_b32_e32 v0, 1.0
; GFX9-GISEL-NEXT: s_mov_b32 s2, -1
; GFX9-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX9-GISEL-NEXT: s_endpgm
;
; GFX12-SDAG-LABEL: constant_fold_fmin_f32:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, 1.0
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: buffer_store_b32 v0, off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: constant_fold_fmin_f32:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, 1.0
; GFX12-GISEL-NEXT: s_mov_b32 s2, -1
; GFX12-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: buffer_store_b32 v0, off, s[0:3], null
; GFX12-GISEL-NEXT: s_endpgm
%val = call float @llvm.minnum.f32(float 1.0, float 2.0)
store float %val, ptr addrspace(1) %out, align 4
ret void
}
define amdgpu_kernel void @constant_fold_fmin_f32_nan_nan(ptr addrspace(1) %out) #0 {
; GFX8-SDAG-LABEL: constant_fold_fmin_f32_nan_nan:
; GFX8-SDAG: ; %bb.0:
; GFX8-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX8-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX8-SDAG-NEXT: s_mov_b32 s2, -1
; GFX8-SDAG-NEXT: v_mov_b32_e32 v0, 0x7fc00000
; GFX8-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-SDAG-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX8-SDAG-NEXT: s_endpgm
;
; GFX8-GISEL-LABEL: constant_fold_fmin_f32_nan_nan:
; GFX8-GISEL: ; %bb.0:
; GFX8-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX8-GISEL-NEXT: v_mov_b32_e32 v0, 0x7fc00000
; GFX8-GISEL-NEXT: s_mov_b32 s2, -1
; GFX8-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX8-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX8-GISEL-NEXT: s_endpgm
;
; GFX9-SDAG-LABEL: constant_fold_fmin_f32_nan_nan:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX9-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX9-SDAG-NEXT: s_mov_b32 s2, -1
; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, 0x7fc00000
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX9-SDAG-NEXT: s_endpgm
;
; GFX9-GISEL-LABEL: constant_fold_fmin_f32_nan_nan:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX9-GISEL-NEXT: v_mov_b32_e32 v0, 0x7fc00000
; GFX9-GISEL-NEXT: s_mov_b32 s2, -1
; GFX9-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX9-GISEL-NEXT: s_endpgm
;
; GFX12-SDAG-LABEL: constant_fold_fmin_f32_nan_nan:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, 0x7fc00000
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: buffer_store_b32 v0, off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: constant_fold_fmin_f32_nan_nan:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, 0x7fc00000
; GFX12-GISEL-NEXT: s_mov_b32 s2, -1
; GFX12-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: buffer_store_b32 v0, off, s[0:3], null
; GFX12-GISEL-NEXT: s_endpgm
%val = call float @llvm.minnum.f32(float 0x7FF8000000000000, float 0x7FF8000000000000)
store float %val, ptr addrspace(1) %out, align 4
ret void
}
define amdgpu_kernel void @constant_fold_fmin_f32_val_nan(ptr addrspace(1) %out) #0 {
; GFX8-SDAG-LABEL: constant_fold_fmin_f32_val_nan:
; GFX8-SDAG: ; %bb.0:
; GFX8-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX8-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX8-SDAG-NEXT: s_mov_b32 s2, -1
; GFX8-SDAG-NEXT: v_mov_b32_e32 v0, 1.0
; GFX8-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-SDAG-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX8-SDAG-NEXT: s_endpgm
;
; GFX8-GISEL-LABEL: constant_fold_fmin_f32_val_nan:
; GFX8-GISEL: ; %bb.0:
; GFX8-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX8-GISEL-NEXT: v_mov_b32_e32 v0, 1.0
; GFX8-GISEL-NEXT: s_mov_b32 s2, -1
; GFX8-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX8-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX8-GISEL-NEXT: s_endpgm
;
; GFX9-SDAG-LABEL: constant_fold_fmin_f32_val_nan:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX9-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX9-SDAG-NEXT: s_mov_b32 s2, -1
; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, 1.0
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX9-SDAG-NEXT: s_endpgm
;
; GFX9-GISEL-LABEL: constant_fold_fmin_f32_val_nan:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX9-GISEL-NEXT: v_mov_b32_e32 v0, 1.0
; GFX9-GISEL-NEXT: s_mov_b32 s2, -1
; GFX9-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX9-GISEL-NEXT: s_endpgm
;
; GFX12-SDAG-LABEL: constant_fold_fmin_f32_val_nan:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, 1.0
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: buffer_store_b32 v0, off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: constant_fold_fmin_f32_val_nan:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, 1.0
; GFX12-GISEL-NEXT: s_mov_b32 s2, -1
; GFX12-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: buffer_store_b32 v0, off, s[0:3], null
; GFX12-GISEL-NEXT: s_endpgm
%val = call float @llvm.minnum.f32(float 1.0, float 0x7FF8000000000000)
store float %val, ptr addrspace(1) %out, align 4
ret void
}
define amdgpu_kernel void @constant_fold_fmin_f32_nan_val(ptr addrspace(1) %out) #0 {
; GFX8-SDAG-LABEL: constant_fold_fmin_f32_nan_val:
; GFX8-SDAG: ; %bb.0:
; GFX8-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX8-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX8-SDAG-NEXT: s_mov_b32 s2, -1
; GFX8-SDAG-NEXT: v_mov_b32_e32 v0, 1.0
; GFX8-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-SDAG-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX8-SDAG-NEXT: s_endpgm
;
; GFX8-GISEL-LABEL: constant_fold_fmin_f32_nan_val:
; GFX8-GISEL: ; %bb.0:
; GFX8-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX8-GISEL-NEXT: v_mov_b32_e32 v0, 1.0
; GFX8-GISEL-NEXT: s_mov_b32 s2, -1
; GFX8-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX8-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX8-GISEL-NEXT: s_endpgm
;
; GFX9-SDAG-LABEL: constant_fold_fmin_f32_nan_val:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX9-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX9-SDAG-NEXT: s_mov_b32 s2, -1
; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, 1.0
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX9-SDAG-NEXT: s_endpgm
;
; GFX9-GISEL-LABEL: constant_fold_fmin_f32_nan_val:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX9-GISEL-NEXT: v_mov_b32_e32 v0, 1.0
; GFX9-GISEL-NEXT: s_mov_b32 s2, -1
; GFX9-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX9-GISEL-NEXT: s_endpgm
;
; GFX12-SDAG-LABEL: constant_fold_fmin_f32_nan_val:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, 1.0
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: buffer_store_b32 v0, off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: constant_fold_fmin_f32_nan_val:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, 1.0
; GFX12-GISEL-NEXT: s_mov_b32 s2, -1
; GFX12-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: buffer_store_b32 v0, off, s[0:3], null
; GFX12-GISEL-NEXT: s_endpgm
%val = call float @llvm.minnum.f32(float 0x7FF8000000000000, float 1.0)
store float %val, ptr addrspace(1) %out, align 4
ret void
}
define amdgpu_kernel void @constant_fold_fmin_f32_p0_p0(ptr addrspace(1) %out) #0 {
; GFX8-SDAG-LABEL: constant_fold_fmin_f32_p0_p0:
; GFX8-SDAG: ; %bb.0:
; GFX8-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX8-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX8-SDAG-NEXT: s_mov_b32 s2, -1
; GFX8-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX8-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-SDAG-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX8-SDAG-NEXT: s_endpgm
;
; GFX8-GISEL-LABEL: constant_fold_fmin_f32_p0_p0:
; GFX8-GISEL: ; %bb.0:
; GFX8-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX8-GISEL-NEXT: v_mov_b32_e32 v0, 0
; GFX8-GISEL-NEXT: s_mov_b32 s2, -1
; GFX8-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX8-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX8-GISEL-NEXT: s_endpgm
;
; GFX9-SDAG-LABEL: constant_fold_fmin_f32_p0_p0:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX9-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX9-SDAG-NEXT: s_mov_b32 s2, -1
; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX9-SDAG-NEXT: s_endpgm
;
; GFX9-GISEL-LABEL: constant_fold_fmin_f32_p0_p0:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX9-GISEL-NEXT: v_mov_b32_e32 v0, 0
; GFX9-GISEL-NEXT: s_mov_b32 s2, -1
; GFX9-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX9-GISEL-NEXT: s_endpgm
;
; GFX12-SDAG-LABEL: constant_fold_fmin_f32_p0_p0:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX12-SDAG-NEXT: v_mov_b32_e32 v0, 0
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: buffer_store_b32 v0, off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: constant_fold_fmin_f32_p0_p0:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, 0
; GFX12-GISEL-NEXT: s_mov_b32 s2, -1
; GFX12-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: buffer_store_b32 v0, off, s[0:3], null
; GFX12-GISEL-NEXT: s_endpgm
%val = call float @llvm.minnum.f32(float 0.0, float 0.0)
store float %val, ptr addrspace(1) %out, align 4
ret void
}
define amdgpu_kernel void @constant_fold_fmin_f32_p0_n0(ptr addrspace(1) %out) #0 {
; GFX8-SDAG-LABEL: constant_fold_fmin_f32_p0_n0:
; GFX8-SDAG: ; %bb.0:
; GFX8-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX8-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX8-SDAG-NEXT: s_mov_b32 s2, -1
; GFX8-SDAG-NEXT: v_bfrev_b32_e32 v0, 1
; GFX8-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-SDAG-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX8-SDAG-NEXT: s_endpgm
;
; GFX8-GISEL-LABEL: constant_fold_fmin_f32_p0_n0:
; GFX8-GISEL: ; %bb.0:
; GFX8-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX8-GISEL-NEXT: v_bfrev_b32_e32 v0, 1
; GFX8-GISEL-NEXT: s_mov_b32 s2, -1
; GFX8-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX8-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX8-GISEL-NEXT: s_endpgm
;
; GFX9-SDAG-LABEL: constant_fold_fmin_f32_p0_n0:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX9-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX9-SDAG-NEXT: s_mov_b32 s2, -1
; GFX9-SDAG-NEXT: v_bfrev_b32_e32 v0, 1
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX9-SDAG-NEXT: s_endpgm
;
; GFX9-GISEL-LABEL: constant_fold_fmin_f32_p0_n0:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX9-GISEL-NEXT: v_bfrev_b32_e32 v0, 1
; GFX9-GISEL-NEXT: s_mov_b32 s2, -1
; GFX9-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX9-GISEL-NEXT: s_endpgm
;
; GFX12-SDAG-LABEL: constant_fold_fmin_f32_p0_n0:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX12-SDAG-NEXT: v_bfrev_b32_e32 v0, 1
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: buffer_store_b32 v0, off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: constant_fold_fmin_f32_p0_n0:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX12-GISEL-NEXT: v_bfrev_b32_e32 v0, 1
; GFX12-GISEL-NEXT: s_mov_b32 s2, -1
; GFX12-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: buffer_store_b32 v0, off, s[0:3], null
; GFX12-GISEL-NEXT: s_endpgm
%val = call float @llvm.minnum.f32(float 0.0, float -0.0)
store float %val, ptr addrspace(1) %out, align 4
ret void
}
define amdgpu_kernel void @constant_fold_fmin_f32_n0_p0(ptr addrspace(1) %out) #0 {
; GFX8-SDAG-LABEL: constant_fold_fmin_f32_n0_p0:
; GFX8-SDAG: ; %bb.0:
; GFX8-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX8-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX8-SDAG-NEXT: s_mov_b32 s2, -1
; GFX8-SDAG-NEXT: v_bfrev_b32_e32 v0, 1
; GFX8-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-SDAG-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX8-SDAG-NEXT: s_endpgm
;
; GFX8-GISEL-LABEL: constant_fold_fmin_f32_n0_p0:
; GFX8-GISEL: ; %bb.0:
; GFX8-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX8-GISEL-NEXT: v_bfrev_b32_e32 v0, 1
; GFX8-GISEL-NEXT: s_mov_b32 s2, -1
; GFX8-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX8-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX8-GISEL-NEXT: s_endpgm
;
; GFX9-SDAG-LABEL: constant_fold_fmin_f32_n0_p0:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX9-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX9-SDAG-NEXT: s_mov_b32 s2, -1
; GFX9-SDAG-NEXT: v_bfrev_b32_e32 v0, 1
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX9-SDAG-NEXT: s_endpgm
;
; GFX9-GISEL-LABEL: constant_fold_fmin_f32_n0_p0:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX9-GISEL-NEXT: v_bfrev_b32_e32 v0, 1
; GFX9-GISEL-NEXT: s_mov_b32 s2, -1
; GFX9-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX9-GISEL-NEXT: s_endpgm
;
; GFX12-SDAG-LABEL: constant_fold_fmin_f32_n0_p0:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX12-SDAG-NEXT: v_bfrev_b32_e32 v0, 1
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: buffer_store_b32 v0, off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: constant_fold_fmin_f32_n0_p0:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX12-GISEL-NEXT: v_bfrev_b32_e32 v0, 1
; GFX12-GISEL-NEXT: s_mov_b32 s2, -1
; GFX12-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: buffer_store_b32 v0, off, s[0:3], null
; GFX12-GISEL-NEXT: s_endpgm
%val = call float @llvm.minnum.f32(float -0.0, float 0.0)
store float %val, ptr addrspace(1) %out, align 4
ret void
}
define amdgpu_kernel void @constant_fold_fmin_f32_n0_n0(ptr addrspace(1) %out) #0 {
; GFX8-SDAG-LABEL: constant_fold_fmin_f32_n0_n0:
; GFX8-SDAG: ; %bb.0:
; GFX8-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX8-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX8-SDAG-NEXT: s_mov_b32 s2, -1
; GFX8-SDAG-NEXT: v_bfrev_b32_e32 v0, 1
; GFX8-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-SDAG-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX8-SDAG-NEXT: s_endpgm
;
; GFX8-GISEL-LABEL: constant_fold_fmin_f32_n0_n0:
; GFX8-GISEL: ; %bb.0:
; GFX8-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX8-GISEL-NEXT: v_bfrev_b32_e32 v0, 1
; GFX8-GISEL-NEXT: s_mov_b32 s2, -1
; GFX8-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX8-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX8-GISEL-NEXT: s_endpgm
;
; GFX9-SDAG-LABEL: constant_fold_fmin_f32_n0_n0:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX9-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX9-SDAG-NEXT: s_mov_b32 s2, -1
; GFX9-SDAG-NEXT: v_bfrev_b32_e32 v0, 1
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX9-SDAG-NEXT: s_endpgm
;
; GFX9-GISEL-LABEL: constant_fold_fmin_f32_n0_n0:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX9-GISEL-NEXT: v_bfrev_b32_e32 v0, 1
; GFX9-GISEL-NEXT: s_mov_b32 s2, -1
; GFX9-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX9-GISEL-NEXT: s_endpgm
;
; GFX12-SDAG-LABEL: constant_fold_fmin_f32_n0_n0:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX12-SDAG-NEXT: v_bfrev_b32_e32 v0, 1
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: buffer_store_b32 v0, off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: constant_fold_fmin_f32_n0_n0:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX12-GISEL-NEXT: v_bfrev_b32_e32 v0, 1
; GFX12-GISEL-NEXT: s_mov_b32 s2, -1
; GFX12-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: buffer_store_b32 v0, off, s[0:3], null
; GFX12-GISEL-NEXT: s_endpgm
%val = call float @llvm.minnum.f32(float -0.0, float -0.0)
store float %val, ptr addrspace(1) %out, align 4
ret void
}
define amdgpu_ps float @fmin_var_immediate_f32_no_ieee(float %a) #0 {
; GFX8-LABEL: fmin_var_immediate_f32_no_ieee:
; GFX8: ; %bb.0:
; GFX8-NEXT: v_min_f32_e32 v0, 2.0, v0
; GFX8-NEXT: ; return to shader part epilog
;
; GFX9-LABEL: fmin_var_immediate_f32_no_ieee:
; GFX9: ; %bb.0:
; GFX9-NEXT: v_min_f32_e32 v0, 2.0, v0
; GFX9-NEXT: ; return to shader part epilog
;
; GFX12-LABEL: fmin_var_immediate_f32_no_ieee:
; GFX12: ; %bb.0:
; GFX12-NEXT: v_min_num_f32_e32 v0, 2.0, v0
; GFX12-NEXT: ; return to shader part epilog
%val = call float @llvm.minnum.f32(float %a, float 2.0)
ret float %val
}
define amdgpu_ps float @fmin_immediate_var_f32_no_ieee(float inreg %a) #0 {
; GFX8-LABEL: fmin_immediate_var_f32_no_ieee:
; GFX8: ; %bb.0:
; GFX8-NEXT: v_min_f32_e64 v0, s0, 2.0
; GFX8-NEXT: ; return to shader part epilog
;
; GFX9-LABEL: fmin_immediate_var_f32_no_ieee:
; GFX9: ; %bb.0:
; GFX9-NEXT: v_min_f32_e64 v0, s0, 2.0
; GFX9-NEXT: ; return to shader part epilog
;
; GFX12-LABEL: fmin_immediate_var_f32_no_ieee:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_min_num_f32 s0, s0, 2.0
; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
; GFX12-NEXT: v_mov_b32_e32 v0, s0
; GFX12-NEXT: ; return to shader part epilog
%val = call float @llvm.minnum.f32(float 2.0, float %a)
ret float %val
}
define amdgpu_ps float @fmin_var_literal_f32_no_ieee(float inreg %a) #0 {
; GFX8-LABEL: fmin_var_literal_f32_no_ieee:
; GFX8: ; %bb.0:
; GFX8-NEXT: v_mov_b32_e32 v0, 0x42c60000
; GFX8-NEXT: v_min_f32_e32 v0, s0, v0
; GFX8-NEXT: ; return to shader part epilog
;
; GFX9-LABEL: fmin_var_literal_f32_no_ieee:
; GFX9: ; %bb.0:
; GFX9-NEXT: v_mov_b32_e32 v0, 0x42c60000
; GFX9-NEXT: v_min_f32_e32 v0, s0, v0
; GFX9-NEXT: ; return to shader part epilog
;
; GFX12-LABEL: fmin_var_literal_f32_no_ieee:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_min_num_f32 s0, s0, 0x42c60000
; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
; GFX12-NEXT: v_mov_b32_e32 v0, s0
; GFX12-NEXT: ; return to shader part epilog
%val = call float @llvm.minnum.f32(float %a, float 99.0)
ret float %val
}
define amdgpu_ps float @fmin_literal_var_f32_no_ieee(float inreg %a) #0 {
; GFX8-LABEL: fmin_literal_var_f32_no_ieee:
; GFX8: ; %bb.0:
; GFX8-NEXT: v_mov_b32_e32 v0, 0x42c60000
; GFX8-NEXT: v_min_f32_e32 v0, s0, v0
; GFX8-NEXT: ; return to shader part epilog
;
; GFX9-LABEL: fmin_literal_var_f32_no_ieee:
; GFX9: ; %bb.0:
; GFX9-NEXT: v_mov_b32_e32 v0, 0x42c60000
; GFX9-NEXT: v_min_f32_e32 v0, s0, v0
; GFX9-NEXT: ; return to shader part epilog
;
; GFX12-LABEL: fmin_literal_var_f32_no_ieee:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_min_num_f32 s0, s0, 0x42c60000
; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
; GFX12-NEXT: v_mov_b32_e32 v0, s0
; GFX12-NEXT: ; return to shader part epilog
%val = call float @llvm.minnum.f32(float 99.0, float %a)
ret float %val
}
define <3 x float> @test_func_fmin_v3f32(<3 x float> %a, <3 x float> %b) nounwind {
; GFX8-SDAG-LABEL: test_func_fmin_v3f32:
; GFX8-SDAG: ; %bb.0:
; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v3
; GFX8-SDAG-NEXT: v_mul_f32_e32 v0, 1.0, v0
; GFX8-SDAG-NEXT: v_min_f32_e32 v0, v0, v3
; GFX8-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v4
; GFX8-SDAG-NEXT: v_mul_f32_e32 v1, 1.0, v1
; GFX8-SDAG-NEXT: v_min_f32_e32 v1, v1, v3
; GFX8-SDAG-NEXT: v_mul_f32_e32 v3, 1.0, v5
; GFX8-SDAG-NEXT: v_mul_f32_e32 v2, 1.0, v2
; GFX8-SDAG-NEXT: v_min_f32_e32 v2, v2, v3
; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX8-GISEL-LABEL: test_func_fmin_v3f32:
; GFX8-GISEL: ; %bb.0:
; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-GISEL-NEXT: v_mul_f32_e32 v0, 1.0, v0
; GFX8-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v3
; GFX8-GISEL-NEXT: v_min_f32_e32 v0, v0, v3
; GFX8-GISEL-NEXT: v_mul_f32_e32 v1, 1.0, v1
; GFX8-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v4
; GFX8-GISEL-NEXT: v_min_f32_e32 v1, v1, v3
; GFX8-GISEL-NEXT: v_mul_f32_e32 v2, 1.0, v2
; GFX8-GISEL-NEXT: v_mul_f32_e32 v3, 1.0, v5
; GFX8-GISEL-NEXT: v_min_f32_e32 v2, v2, v3
; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-SDAG-LABEL: test_func_fmin_v3f32:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT: v_max_f32_e32 v3, v3, v3
; GFX9-SDAG-NEXT: v_max_f32_e32 v0, v0, v0
; GFX9-SDAG-NEXT: v_min_f32_e32 v0, v0, v3
; GFX9-SDAG-NEXT: v_max_f32_e32 v3, v4, v4
; GFX9-SDAG-NEXT: v_max_f32_e32 v1, v1, v1
; GFX9-SDAG-NEXT: v_min_f32_e32 v1, v1, v3
; GFX9-SDAG-NEXT: v_max_f32_e32 v3, v5, v5
; GFX9-SDAG-NEXT: v_max_f32_e32 v2, v2, v2
; GFX9-SDAG-NEXT: v_min_f32_e32 v2, v2, v3
; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-GISEL-LABEL: test_func_fmin_v3f32:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-GISEL-NEXT: v_max_f32_e32 v0, v0, v0
; GFX9-GISEL-NEXT: v_max_f32_e32 v3, v3, v3
; GFX9-GISEL-NEXT: v_min_f32_e32 v0, v0, v3
; GFX9-GISEL-NEXT: v_max_f32_e32 v1, v1, v1
; GFX9-GISEL-NEXT: v_max_f32_e32 v3, v4, v4
; GFX9-GISEL-NEXT: v_min_f32_e32 v1, v1, v3
; GFX9-GISEL-NEXT: v_max_f32_e32 v2, v2, v2
; GFX9-GISEL-NEXT: v_max_f32_e32 v3, v5, v5
; GFX9-GISEL-NEXT: v_min_f32_e32 v2, v2, v3
; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-SDAG-LABEL: test_func_fmin_v3f32:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-SDAG-NEXT: s_wait_expcnt 0x0
; GFX12-SDAG-NEXT: s_wait_samplecnt 0x0
; GFX12-SDAG-NEXT: s_wait_bvhcnt 0x0
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: v_dual_max_num_f32 v3, v3, v3 :: v_dual_max_num_f32 v0, v0, v0
; GFX12-SDAG-NEXT: v_dual_max_num_f32 v4, v4, v4 :: v_dual_max_num_f32 v1, v1, v1
; GFX12-SDAG-NEXT: v_dual_max_num_f32 v5, v5, v5 :: v_dual_max_num_f32 v2, v2, v2
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-SDAG-NEXT: v_dual_min_num_f32 v0, v0, v3 :: v_dual_min_num_f32 v1, v1, v4
; GFX12-SDAG-NEXT: v_min_num_f32_e32 v2, v2, v5
; GFX12-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX12-GISEL-LABEL: test_func_fmin_v3f32:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_wait_loadcnt_dscnt 0x0
; GFX12-GISEL-NEXT: s_wait_expcnt 0x0
; GFX12-GISEL-NEXT: s_wait_samplecnt 0x0
; GFX12-GISEL-NEXT: s_wait_bvhcnt 0x0
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: v_dual_max_num_f32 v0, v0, v0 :: v_dual_max_num_f32 v3, v3, v3
; GFX12-GISEL-NEXT: v_dual_max_num_f32 v1, v1, v1 :: v_dual_max_num_f32 v4, v4, v4
; GFX12-GISEL-NEXT: v_dual_max_num_f32 v2, v2, v2 :: v_dual_max_num_f32 v5, v5, v5
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-GISEL-NEXT: v_dual_min_num_f32 v0, v0, v3 :: v_dual_min_num_f32 v1, v1, v4
; GFX12-GISEL-NEXT: v_min_num_f32_e32 v2, v2, v5
; GFX12-GISEL-NEXT: s_setpc_b64 s[30:31]
%val = call <3 x float> @llvm.minnum.v3f32(<3 x float> %a, <3 x float> %b)
ret <3 x float> %val
}
define amdgpu_kernel void @test_fmin_f16_v_ieee_on(ptr addrspace(1) %out, half %a, half %b) #0 {
; GFX8-SDAG-LABEL: test_fmin_f16_v_ieee_on:
; GFX8-SDAG: ; %bb.0:
; GFX8-SDAG-NEXT: s_load_dword s6, s[4:5], 0x2c
; GFX8-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX8-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX8-SDAG-NEXT: s_mov_b32 s2, -1
; GFX8-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-SDAG-NEXT: s_lshr_b32 s4, s6, 16
; GFX8-SDAG-NEXT: v_max_f16_e64 v0, s4, s4
; GFX8-SDAG-NEXT: v_max_f16_e64 v1, s6, s6
; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v1, v0
; GFX8-SDAG-NEXT: buffer_store_short v0, off, s[0:3], 0
; GFX8-SDAG-NEXT: s_endpgm
;
; GFX8-GISEL-LABEL: test_fmin_f16_v_ieee_on:
; GFX8-GISEL: ; %bb.0:
; GFX8-GISEL-NEXT: s_load_dword s3, s[4:5], 0x2c
; GFX8-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX8-GISEL-NEXT: s_mov_b32 s2, -1
; GFX8-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-GISEL-NEXT: s_lshr_b32 s4, s3, 16
; GFX8-GISEL-NEXT: v_max_f16_e64 v0, s3, s3
; GFX8-GISEL-NEXT: v_max_f16_e64 v1, s4, s4
; GFX8-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
; GFX8-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX8-GISEL-NEXT: buffer_store_short v0, off, s[0:3], 0
; GFX8-GISEL-NEXT: s_endpgm
;
; GFX9-SDAG-LABEL: test_fmin_f16_v_ieee_on:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_load_dword s6, s[4:5], 0x2c
; GFX9-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX9-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX9-SDAG-NEXT: s_mov_b32 s2, -1
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: s_lshr_b32 s4, s6, 16
; GFX9-SDAG-NEXT: v_max_f16_e64 v0, s4, s4
; GFX9-SDAG-NEXT: v_max_f16_e64 v1, s6, s6
; GFX9-SDAG-NEXT: v_min_f16_e32 v0, v1, v0
; GFX9-SDAG-NEXT: buffer_store_short v0, off, s[0:3], 0
; GFX9-SDAG-NEXT: s_endpgm
;
; GFX9-GISEL-LABEL: test_fmin_f16_v_ieee_on:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_load_dword s3, s[4:5], 0x2c
; GFX9-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX9-GISEL-NEXT: s_mov_b32 s2, -1
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: s_lshr_b32 s4, s3, 16
; GFX9-GISEL-NEXT: v_max_f16_e64 v0, s3, s3
; GFX9-GISEL-NEXT: v_max_f16_e64 v1, s4, s4
; GFX9-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
; GFX9-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX9-GISEL-NEXT: buffer_store_short v0, off, s[0:3], 0
; GFX9-GISEL-NEXT: s_endpgm
;
; GFX12-SDAG-LABEL: test_fmin_f16_v_ieee_on:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x24
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: s_lshr_b32 s3, s2, 16
; GFX12-SDAG-NEXT: v_max_num_f16_e64 v1, s2, s2
; GFX12-SDAG-NEXT: v_max_num_f16_e64 v0, s3, s3
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_min_num_f16_e32 v0, v1, v0
; GFX12-SDAG-NEXT: buffer_store_b16 v0, off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: test_fmin_f16_v_ieee_on:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_load_b96 s[0:2], s[4:5], 0x24
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: s_lshr_b32 s3, s2, 16
; GFX12-GISEL-NEXT: v_max_num_f16_e64 v0, s2, s2
; GFX12-GISEL-NEXT: v_max_num_f16_e64 v1, s3, s3
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s2, v0
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s3, v1
; GFX12-GISEL-NEXT: s_min_num_f16 s2, s2, s3
; GFX12-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s2
; GFX12-GISEL-NEXT: s_mov_b32 s2, -1
; GFX12-GISEL-NEXT: buffer_store_b16 v0, off, s[0:3], null
; GFX12-GISEL-NEXT: s_endpgm
%val = call half @llvm.minnum.f16(half %a, half %b)
store half %val, ptr addrspace(1) %out, align 2
ret void
}
define amdgpu_ps half @test_fmin_f16_v_ieee_off(half %a, half %b) #0 {
; GFX8-LABEL: test_fmin_f16_v_ieee_off:
; GFX8: ; %bb.0:
; GFX8-NEXT: v_min_f16_e32 v0, v0, v1
; GFX8-NEXT: ; return to shader part epilog
;
; GFX9-LABEL: test_fmin_f16_v_ieee_off:
; GFX9: ; %bb.0:
; GFX9-NEXT: v_min_f16_e32 v0, v0, v1
; GFX9-NEXT: ; return to shader part epilog
;
; GFX12-LABEL: test_fmin_f16_v_ieee_off:
; GFX12: ; %bb.0:
; GFX12-NEXT: v_min_num_f16_e32 v0, v0, v1
; GFX12-NEXT: ; return to shader part epilog
%val = call half @llvm.minnum.f16(half %a, half %b)
ret half %val
}
define amdgpu_kernel void @test_fmin_f16_s_ieee_on(ptr addrspace(1) %out, half inreg %a, half inreg %b) #0 {
; GFX8-SDAG-LABEL: test_fmin_f16_s_ieee_on:
; GFX8-SDAG: ; %bb.0:
; GFX8-SDAG-NEXT: s_load_dword s6, s[4:5], 0x2c
; GFX8-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX8-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX8-SDAG-NEXT: s_mov_b32 s2, -1
; GFX8-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-SDAG-NEXT: s_lshr_b32 s4, s6, 16
; GFX8-SDAG-NEXT: v_max_f16_e64 v0, s4, s4
; GFX8-SDAG-NEXT: v_max_f16_e64 v1, s6, s6
; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v1, v0
; GFX8-SDAG-NEXT: buffer_store_short v0, off, s[0:3], 0
; GFX8-SDAG-NEXT: s_endpgm
;
; GFX8-GISEL-LABEL: test_fmin_f16_s_ieee_on:
; GFX8-GISEL: ; %bb.0:
; GFX8-GISEL-NEXT: s_mov_b32 s6, -1
; GFX8-GISEL-NEXT: s_mov_b32 s7, 0xf000
; GFX8-GISEL-NEXT: buffer_load_ushort v0, off, s[4:7], 0 offset:46
; GFX8-GISEL-NEXT: s_load_dword s0, s[4:5], 0x2c
; GFX8-GISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x24
; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX8-GISEL-NEXT: v_readfirstlane_b32 s1, v0
; GFX8-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-GISEL-NEXT: v_max_f16_e64 v0, s0, s0
; GFX8-GISEL-NEXT: v_max_f16_e64 v1, s1, s1
; GFX8-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
; GFX8-GISEL-NEXT: buffer_store_short v0, off, s[4:7], 0
; GFX8-GISEL-NEXT: s_endpgm
;
; GFX9-SDAG-LABEL: test_fmin_f16_s_ieee_on:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_load_dword s6, s[4:5], 0x2c
; GFX9-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX9-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX9-SDAG-NEXT: s_mov_b32 s2, -1
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: s_lshr_b32 s4, s6, 16
; GFX9-SDAG-NEXT: v_max_f16_e64 v0, s4, s4
; GFX9-SDAG-NEXT: v_max_f16_e64 v1, s6, s6
; GFX9-SDAG-NEXT: v_min_f16_e32 v0, v1, v0
; GFX9-SDAG-NEXT: buffer_store_short v0, off, s[0:3], 0
; GFX9-SDAG-NEXT: s_endpgm
;
; GFX9-GISEL-LABEL: test_fmin_f16_s_ieee_on:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_mov_b32 s6, -1
; GFX9-GISEL-NEXT: s_mov_b32 s7, 0xf000
; GFX9-GISEL-NEXT: buffer_load_ushort v0, off, s[4:7], 0 offset:46
; GFX9-GISEL-NEXT: s_load_dword s2, s[4:5], 0x2c
; GFX9-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: v_max_f16_e64 v1, s2, s2
; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
; GFX9-GISEL-NEXT: v_readfirstlane_b32 s2, v0
; GFX9-GISEL-NEXT: v_max_f16_e64 v0, s2, s2
; GFX9-GISEL-NEXT: v_min_f16_e32 v0, v1, v0
; GFX9-GISEL-NEXT: s_mov_b64 s[2:3], s[6:7]
; GFX9-GISEL-NEXT: s_nop 1
; GFX9-GISEL-NEXT: buffer_store_short v0, off, s[0:3], 0
; GFX9-GISEL-NEXT: s_endpgm
;
; GFX12-SDAG-LABEL: test_fmin_f16_s_ieee_on:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b96 s[0:2], s[4:5], 0x24
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: s_lshr_b32 s3, s2, 16
; GFX12-SDAG-NEXT: v_max_num_f16_e64 v1, s2, s2
; GFX12-SDAG-NEXT: v_max_num_f16_e64 v0, s3, s3
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_min_num_f16_e32 v0, v1, v0
; GFX12-SDAG-NEXT: buffer_store_b16 v0, off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: test_fmin_f16_s_ieee_on:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_clause 0x2
; GFX12-GISEL-NEXT: s_load_u16 s2, s[4:5], 0x2c
; GFX12-GISEL-NEXT: s_load_u16 s3, s[4:5], 0x2e
; GFX12-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: v_max_num_f16_e64 v0, s2, s2
; GFX12-GISEL-NEXT: v_max_num_f16_e64 v1, s3, s3
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s2, v0
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s3, v1
; GFX12-GISEL-NEXT: s_min_num_f16 s2, s2, s3
; GFX12-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s2
; GFX12-GISEL-NEXT: s_mov_b32 s2, -1
; GFX12-GISEL-NEXT: buffer_store_b16 v0, off, s[0:3], null
; GFX12-GISEL-NEXT: s_endpgm
%val = call half @llvm.minnum.f16(half %a, half %b)
store half %val, ptr addrspace(1) %out, align 2
ret void
}
define amdgpu_ps half @test_fmin_f16_s_ieee_off(half inreg %a, half inreg %b) #0 {
; GFX8-LABEL: test_fmin_f16_s_ieee_off:
; GFX8: ; %bb.0:
; GFX8-NEXT: v_mov_b32_e32 v0, s1
; GFX8-NEXT: v_min_f16_e32 v0, s0, v0
; GFX8-NEXT: ; return to shader part epilog
;
; GFX9-LABEL: test_fmin_f16_s_ieee_off:
; GFX9: ; %bb.0:
; GFX9-NEXT: v_mov_b32_e32 v0, s1
; GFX9-NEXT: v_min_f16_e32 v0, s0, v0
; GFX9-NEXT: ; return to shader part epilog
;
; GFX12-LABEL: test_fmin_f16_s_ieee_off:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_min_num_f16 s0, s0, s1
; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
; GFX12-NEXT: v_mov_b32_e32 v0, s0
; GFX12-NEXT: ; return to shader part epilog
%val = call half @llvm.minnum.f16(half %a, half %b)
ret half %val
}
define amdgpu_kernel void @test_fmin_f32_s_ieee_on(ptr addrspace(1) %out, float inreg %a, float inreg %b) #0 {
; GFX8-SDAG-LABEL: test_fmin_f32_s_ieee_on:
; GFX8-SDAG: ; %bb.0:
; GFX8-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX8-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-SDAG-NEXT: s_mov_b64 s[4:5], s[2:3]
; GFX8-SDAG-NEXT: v_mul_f32_e64 v0, 1.0, s5
; GFX8-SDAG-NEXT: v_mul_f32_e64 v1, 1.0, s4
; GFX8-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX8-SDAG-NEXT: s_mov_b32 s2, -1
; GFX8-SDAG-NEXT: v_min_f32_e32 v0, v1, v0
; GFX8-SDAG-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX8-SDAG-NEXT: s_endpgm
;
; GFX8-GISEL-LABEL: test_fmin_f32_s_ieee_on:
; GFX8-GISEL: ; %bb.0:
; GFX8-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX8-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-GISEL-NEXT: v_mul_f32_e64 v0, 1.0, s2
; GFX8-GISEL-NEXT: v_mul_f32_e64 v1, 1.0, s3
; GFX8-GISEL-NEXT: s_mov_b32 s2, -1
; GFX8-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
; GFX8-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX8-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX8-GISEL-NEXT: s_endpgm
;
; GFX9-SDAG-LABEL: test_fmin_f32_s_ieee_on:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX9-SDAG-NEXT: s_mov_b32 s7, 0xf000
; GFX9-SDAG-NEXT: s_mov_b32 s6, -1
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: v_max_f32_e64 v0, s3, s3
; GFX9-SDAG-NEXT: v_max_f32_e64 v1, s2, s2
; GFX9-SDAG-NEXT: s_mov_b32 s4, s0
; GFX9-SDAG-NEXT: s_mov_b32 s5, s1
; GFX9-SDAG-NEXT: v_min_f32_e32 v0, v1, v0
; GFX9-SDAG-NEXT: buffer_store_dword v0, off, s[4:7], 0
; GFX9-SDAG-NEXT: s_endpgm
;
; GFX9-GISEL-LABEL: test_fmin_f32_s_ieee_on:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: v_max_f32_e64 v0, s2, s2
; GFX9-GISEL-NEXT: v_max_f32_e64 v1, s3, s3
; GFX9-GISEL-NEXT: s_mov_b32 s2, -1
; GFX9-GISEL-NEXT: v_min_f32_e32 v0, v0, v1
; GFX9-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX9-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX9-GISEL-NEXT: s_endpgm
;
; GFX12-SDAG-LABEL: test_fmin_f32_s_ieee_on:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v0, s3, s3
; GFX12-SDAG-NEXT: v_max_num_f32_e64 v1, s2, s2
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_min_num_f32_e32 v0, v1, v0
; GFX12-SDAG-NEXT: buffer_store_b32 v0, off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: test_fmin_f32_s_ieee_on:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v0, s2, s2
; GFX12-GISEL-NEXT: v_max_num_f32_e64 v1, s3, s3
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s2, v0
; GFX12-GISEL-NEXT: v_readfirstlane_b32 s3, v1
; GFX12-GISEL-NEXT: s_min_num_f32 s2, s2, s3
; GFX12-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-GISEL-NEXT: s_wait_alu depctr_sa_sdst(0)
; GFX12-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX12-GISEL-NEXT: v_mov_b32_e32 v0, s2
; GFX12-GISEL-NEXT: s_mov_b32 s2, -1
; GFX12-GISEL-NEXT: buffer_store_b32 v0, off, s[0:3], null
; GFX12-GISEL-NEXT: s_endpgm
%val = call float @llvm.minnum.f32(float %a, float %b)
store float %val, ptr addrspace(1) %out, align 4
ret void
}
define amdgpu_ps float @test_fmin_f32_s_ieee_off(float inreg %a, float inreg %b) #0 {
; GFX8-LABEL: test_fmin_f32_s_ieee_off:
; GFX8: ; %bb.0:
; GFX8-NEXT: v_mov_b32_e32 v0, s1
; GFX8-NEXT: v_min_f32_e32 v0, s0, v0
; GFX8-NEXT: ; return to shader part epilog
;
; GFX9-LABEL: test_fmin_f32_s_ieee_off:
; GFX9: ; %bb.0:
; GFX9-NEXT: v_mov_b32_e32 v0, s1
; GFX9-NEXT: v_min_f32_e32 v0, s0, v0
; GFX9-NEXT: ; return to shader part epilog
;
; GFX12-LABEL: test_fmin_f32_s_ieee_off:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_min_num_f32 s0, s0, s1
; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_3)
; GFX12-NEXT: v_mov_b32_e32 v0, s0
; GFX12-NEXT: ; return to shader part epilog
%val = call float @llvm.minnum.f32(float %a, float %b)
ret float %val
}
define amdgpu_kernel void @test_fmin_v2f16_v_ieee_on(ptr addrspace(1) %out, <2 x half> %a, <2 x half> %b) #0 {
; GFX8-SDAG-LABEL: test_fmin_v2f16_v_ieee_on:
; GFX8-SDAG: ; %bb.0:
; GFX8-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX8-SDAG-NEXT: s_mov_b32 s7, 0xf000
; GFX8-SDAG-NEXT: s_mov_b32 s6, -1
; GFX8-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-SDAG-NEXT: s_mov_b32 s4, s0
; GFX8-SDAG-NEXT: s_lshr_b32 s0, s3, 16
; GFX8-SDAG-NEXT: v_max_f16_e64 v0, s0, s0
; GFX8-SDAG-NEXT: s_lshr_b32 s0, s2, 16
; GFX8-SDAG-NEXT: v_max_f16_e64 v1, s0, s0
; GFX8-SDAG-NEXT: v_min_f16_sdwa v0, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX8-SDAG-NEXT: v_max_f16_e64 v1, s3, s3
; GFX8-SDAG-NEXT: v_max_f16_e64 v2, s2, s2
; GFX8-SDAG-NEXT: v_min_f16_e32 v1, v2, v1
; GFX8-SDAG-NEXT: s_mov_b32 s5, s1
; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v1, v0
; GFX8-SDAG-NEXT: buffer_store_dword v0, off, s[4:7], 0
; GFX8-SDAG-NEXT: s_endpgm
;
; GFX8-GISEL-LABEL: test_fmin_v2f16_v_ieee_on:
; GFX8-GISEL: ; %bb.0:
; GFX8-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX8-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-GISEL-NEXT: v_max_f16_e64 v0, s2, s2
; GFX8-GISEL-NEXT: v_max_f16_e64 v1, s3, s3
; GFX8-GISEL-NEXT: s_lshr_b32 s4, s2, 16
; GFX8-GISEL-NEXT: s_lshr_b32 s5, s3, 16
; GFX8-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
; GFX8-GISEL-NEXT: v_max_f16_e64 v1, s4, s4
; GFX8-GISEL-NEXT: v_readfirstlane_b32 s2, v0
; GFX8-GISEL-NEXT: v_max_f16_e64 v0, s5, s5
; GFX8-GISEL-NEXT: v_min_f16_e32 v0, v1, v0
; GFX8-GISEL-NEXT: v_readfirstlane_b32 s3, v0
; GFX8-GISEL-NEXT: s_and_b32 s3, 0xffff, s3
; GFX8-GISEL-NEXT: s_and_b32 s2, 0xffff, s2
; GFX8-GISEL-NEXT: s_lshl_b32 s3, s3, 16
; GFX8-GISEL-NEXT: s_or_b32 s2, s2, s3
; GFX8-GISEL-NEXT: v_mov_b32_e32 v0, s2
; GFX8-GISEL-NEXT: s_mov_b32 s2, -1
; GFX8-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX8-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX8-GISEL-NEXT: s_endpgm
;
; GFX9-SDAG-LABEL: test_fmin_v2f16_v_ieee_on:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX9-SDAG-NEXT: s_mov_b32 s7, 0xf000
; GFX9-SDAG-NEXT: s_mov_b32 s6, -1
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: v_pk_max_f16 v0, s3, s3
; GFX9-SDAG-NEXT: v_pk_max_f16 v1, s2, s2
; GFX9-SDAG-NEXT: s_mov_b32 s4, s0
; GFX9-SDAG-NEXT: s_mov_b32 s5, s1
; GFX9-SDAG-NEXT: v_pk_min_f16 v0, v1, v0
; GFX9-SDAG-NEXT: buffer_store_dword v0, off, s[4:7], 0
; GFX9-SDAG-NEXT: s_endpgm
;
; GFX9-GISEL-LABEL: test_fmin_v2f16_v_ieee_on:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: v_pk_max_f16 v0, s2, s2
; GFX9-GISEL-NEXT: v_pk_max_f16 v1, s3, s3
; GFX9-GISEL-NEXT: s_mov_b32 s2, -1
; GFX9-GISEL-NEXT: v_pk_min_f16 v0, v0, v1
; GFX9-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX9-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX9-GISEL-NEXT: s_endpgm
;
; GFX12-SDAG-LABEL: test_fmin_v2f16_v_ieee_on:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, s3, s3
; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, s2, s2
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v1, v0
; GFX12-SDAG-NEXT: buffer_store_b32 v0, off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: test_fmin_v2f16_v_ieee_on:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, s2, s2
; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, s3, s3
; GFX12-GISEL-NEXT: s_mov_b32 s2, -1
; GFX12-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v1
; GFX12-GISEL-NEXT: buffer_store_b32 v0, off, s[0:3], null
; GFX12-GISEL-NEXT: s_endpgm
%val = call <2 x half> @llvm.minnum.v2f16(<2 x half> %a, <2 x half> %b)
store <2 x half> %val, ptr addrspace(1) %out, align 4
ret void
}
define amdgpu_ps <2 x half> @test_fmin_v2f16_v_ieee_off(<2 x half> %a, <2 x half> %b) #0 {
; GFX8-SDAG-LABEL: test_fmin_v2f16_v_ieee_off:
; GFX8-SDAG: ; %bb.0:
; GFX8-SDAG-NEXT: v_min_f16_sdwa v2, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-SDAG-NEXT: v_min_f16_e32 v0, v0, v1
; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v0, v2
; GFX8-SDAG-NEXT: ; return to shader part epilog
;
; GFX8-GISEL-LABEL: test_fmin_v2f16_v_ieee_off:
; GFX8-GISEL: ; %bb.0:
; GFX8-GISEL-NEXT: v_min_f16_e32 v2, v0, v1
; GFX8-GISEL-NEXT: v_min_f16_sdwa v0, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v2, v0
; GFX8-GISEL-NEXT: ; return to shader part epilog
;
; GFX9-LABEL: test_fmin_v2f16_v_ieee_off:
; GFX9: ; %bb.0:
; GFX9-NEXT: v_pk_min_f16 v0, v0, v1
; GFX9-NEXT: ; return to shader part epilog
;
; GFX12-LABEL: test_fmin_v2f16_v_ieee_off:
; GFX12: ; %bb.0:
; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v1
; GFX12-NEXT: ; return to shader part epilog
%val = call <2 x half> @llvm.minnum.v2f16(<2 x half> %a, <2 x half> %b)
ret <2 x half> %val
}
define amdgpu_kernel void @test_fmin_v2f16_s_ieee_on(ptr addrspace(1) %out, <2 x half> inreg %a, <2 x half> inreg %b) #0 {
; GFX8-SDAG-LABEL: test_fmin_v2f16_s_ieee_on:
; GFX8-SDAG: ; %bb.0:
; GFX8-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX8-SDAG-NEXT: s_mov_b32 s7, 0xf000
; GFX8-SDAG-NEXT: s_mov_b32 s6, -1
; GFX8-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-SDAG-NEXT: s_mov_b32 s4, s0
; GFX8-SDAG-NEXT: s_lshr_b32 s0, s3, 16
; GFX8-SDAG-NEXT: v_max_f16_e64 v0, s0, s0
; GFX8-SDAG-NEXT: s_lshr_b32 s0, s2, 16
; GFX8-SDAG-NEXT: v_max_f16_e64 v1, s0, s0
; GFX8-SDAG-NEXT: v_min_f16_sdwa v0, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX8-SDAG-NEXT: v_max_f16_e64 v1, s3, s3
; GFX8-SDAG-NEXT: v_max_f16_e64 v2, s2, s2
; GFX8-SDAG-NEXT: v_min_f16_e32 v1, v2, v1
; GFX8-SDAG-NEXT: s_mov_b32 s5, s1
; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v1, v0
; GFX8-SDAG-NEXT: buffer_store_dword v0, off, s[4:7], 0
; GFX8-SDAG-NEXT: s_endpgm
;
; GFX8-GISEL-LABEL: test_fmin_v2f16_s_ieee_on:
; GFX8-GISEL: ; %bb.0:
; GFX8-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX8-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-GISEL-NEXT: v_max_f16_e64 v0, s2, s2
; GFX8-GISEL-NEXT: v_max_f16_e64 v1, s3, s3
; GFX8-GISEL-NEXT: s_lshr_b32 s4, s2, 16
; GFX8-GISEL-NEXT: s_lshr_b32 s5, s3, 16
; GFX8-GISEL-NEXT: v_min_f16_e32 v0, v0, v1
; GFX8-GISEL-NEXT: v_max_f16_e64 v1, s4, s4
; GFX8-GISEL-NEXT: v_readfirstlane_b32 s2, v0
; GFX8-GISEL-NEXT: v_max_f16_e64 v0, s5, s5
; GFX8-GISEL-NEXT: v_min_f16_e32 v0, v1, v0
; GFX8-GISEL-NEXT: v_readfirstlane_b32 s3, v0
; GFX8-GISEL-NEXT: s_and_b32 s3, 0xffff, s3
; GFX8-GISEL-NEXT: s_and_b32 s2, 0xffff, s2
; GFX8-GISEL-NEXT: s_lshl_b32 s3, s3, 16
; GFX8-GISEL-NEXT: s_or_b32 s2, s2, s3
; GFX8-GISEL-NEXT: v_mov_b32_e32 v0, s2
; GFX8-GISEL-NEXT: s_mov_b32 s2, -1
; GFX8-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX8-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX8-GISEL-NEXT: s_endpgm
;
; GFX9-SDAG-LABEL: test_fmin_v2f16_s_ieee_on:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX9-SDAG-NEXT: s_mov_b32 s7, 0xf000
; GFX9-SDAG-NEXT: s_mov_b32 s6, -1
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: v_pk_max_f16 v0, s3, s3
; GFX9-SDAG-NEXT: v_pk_max_f16 v1, s2, s2
; GFX9-SDAG-NEXT: s_mov_b32 s4, s0
; GFX9-SDAG-NEXT: s_mov_b32 s5, s1
; GFX9-SDAG-NEXT: v_pk_min_f16 v0, v1, v0
; GFX9-SDAG-NEXT: buffer_store_dword v0, off, s[4:7], 0
; GFX9-SDAG-NEXT: s_endpgm
;
; GFX9-GISEL-LABEL: test_fmin_v2f16_s_ieee_on:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: v_pk_max_f16 v0, s2, s2
; GFX9-GISEL-NEXT: v_pk_max_f16 v1, s3, s3
; GFX9-GISEL-NEXT: s_mov_b32 s2, -1
; GFX9-GISEL-NEXT: v_pk_min_f16 v0, v0, v1
; GFX9-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX9-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX9-GISEL-NEXT: s_endpgm
;
; GFX12-SDAG-LABEL: test_fmin_v2f16_s_ieee_on:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: v_pk_max_num_f16 v0, s3, s3
; GFX12-SDAG-NEXT: v_pk_max_num_f16 v1, s2, s2
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_pk_min_num_f16 v0, v1, v0
; GFX12-SDAG-NEXT: buffer_store_b32 v0, off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: test_fmin_v2f16_s_ieee_on:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: v_pk_max_num_f16 v0, s2, s2
; GFX12-GISEL-NEXT: v_pk_max_num_f16 v1, s3, s3
; GFX12-GISEL-NEXT: s_mov_b32 s2, -1
; GFX12-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_pk_min_num_f16 v0, v0, v1
; GFX12-GISEL-NEXT: buffer_store_b32 v0, off, s[0:3], null
; GFX12-GISEL-NEXT: s_endpgm
%val = call <2 x half> @llvm.minnum.v2f16(<2 x half> %a, <2 x half> %b)
store <2 x half> %val, ptr addrspace(1) %out, align 4
ret void
}
define amdgpu_ps <2 x half> @test_fmin_v2f16_s_ieee_off(<2 x half> inreg %a, <2 x half> inreg %b) #0 {
; GFX8-SDAG-LABEL: test_fmin_v2f16_s_ieee_off:
; GFX8-SDAG: ; %bb.0:
; GFX8-SDAG-NEXT: s_lshr_b32 s2, s1, 16
; GFX8-SDAG-NEXT: s_lshr_b32 s3, s0, 16
; GFX8-SDAG-NEXT: v_mov_b32_e32 v0, s2
; GFX8-SDAG-NEXT: v_mov_b32_e32 v1, s3
; GFX8-SDAG-NEXT: v_min_f16_sdwa v0, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX8-SDAG-NEXT: v_mov_b32_e32 v1, s1
; GFX8-SDAG-NEXT: v_min_f16_e32 v1, s0, v1
; GFX8-SDAG-NEXT: v_or_b32_e32 v0, v1, v0
; GFX8-SDAG-NEXT: ; return to shader part epilog
;
; GFX8-GISEL-LABEL: test_fmin_v2f16_s_ieee_off:
; GFX8-GISEL: ; %bb.0:
; GFX8-GISEL-NEXT: v_mov_b32_e32 v0, s1
; GFX8-GISEL-NEXT: s_lshr_b32 s3, s1, 16
; GFX8-GISEL-NEXT: v_min_f16_e32 v0, s0, v0
; GFX8-GISEL-NEXT: s_lshr_b32 s2, s0, 16
; GFX8-GISEL-NEXT: v_readfirstlane_b32 s0, v0
; GFX8-GISEL-NEXT: v_mov_b32_e32 v0, s3
; GFX8-GISEL-NEXT: v_min_f16_e32 v0, s2, v0
; GFX8-GISEL-NEXT: v_readfirstlane_b32 s1, v0
; GFX8-GISEL-NEXT: s_and_b32 s1, 0xffff, s1
; GFX8-GISEL-NEXT: s_and_b32 s0, 0xffff, s0
; GFX8-GISEL-NEXT: s_lshl_b32 s1, s1, 16
; GFX8-GISEL-NEXT: s_or_b32 s0, s0, s1
; GFX8-GISEL-NEXT: v_mov_b32_e32 v0, s0
; GFX8-GISEL-NEXT: ; return to shader part epilog
;
; GFX9-LABEL: test_fmin_v2f16_s_ieee_off:
; GFX9: ; %bb.0:
; GFX9-NEXT: v_mov_b32_e32 v0, s1
; GFX9-NEXT: v_pk_min_f16 v0, s0, v0
; GFX9-NEXT: ; return to shader part epilog
;
; GFX12-LABEL: test_fmin_v2f16_s_ieee_off:
; GFX12: ; %bb.0:
; GFX12-NEXT: v_pk_min_num_f16 v0, s0, s1
; GFX12-NEXT: ; return to shader part epilog
%val = call <2 x half> @llvm.minnum.v2f16(<2 x half> %a, <2 x half> %b)
ret <2 x half> %val
}
define amdgpu_kernel void @test_fmin_f64_v_ieee_on(ptr addrspace(1) %out, double %a, double %b) #0 {
; GFX8-SDAG-LABEL: test_fmin_f64_v_ieee_on:
; GFX8-SDAG: ; %bb.0:
; GFX8-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
; GFX8-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX8-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-SDAG-NEXT: v_max_f64 v[0:1], s[6:7], s[6:7]
; GFX8-SDAG-NEXT: v_max_f64 v[2:3], s[2:3], s[2:3]
; GFX8-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX8-SDAG-NEXT: s_mov_b32 s2, -1
; GFX8-SDAG-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
; GFX8-SDAG-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GFX8-SDAG-NEXT: s_endpgm
;
; GFX8-GISEL-LABEL: test_fmin_f64_v_ieee_on:
; GFX8-GISEL: ; %bb.0:
; GFX8-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX8-GISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34
; GFX8-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-GISEL-NEXT: v_max_f64 v[0:1], s[2:3], s[2:3]
; GFX8-GISEL-NEXT: v_max_f64 v[2:3], s[4:5], s[4:5]
; GFX8-GISEL-NEXT: s_mov_b32 s2, -1
; GFX8-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX8-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-GISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GFX8-GISEL-NEXT: s_endpgm
;
; GFX9-SDAG-LABEL: test_fmin_f64_v_ieee_on:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
; GFX9-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: v_max_f64 v[0:1], s[6:7], s[6:7]
; GFX9-SDAG-NEXT: v_max_f64 v[2:3], s[2:3], s[2:3]
; GFX9-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX9-SDAG-NEXT: s_mov_b32 s2, -1
; GFX9-SDAG-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
; GFX9-SDAG-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GFX9-SDAG-NEXT: s_endpgm
;
; GFX9-GISEL-LABEL: test_fmin_f64_v_ieee_on:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX9-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: v_max_f64 v[0:1], s[2:3], s[2:3]
; GFX9-GISEL-NEXT: v_max_f64 v[2:3], s[6:7], s[6:7]
; GFX9-GISEL-NEXT: s_mov_b32 s2, -1
; GFX9-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX9-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX9-GISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GFX9-GISEL-NEXT: s_endpgm
;
; GFX12-SDAG-LABEL: test_fmin_f64_v_ieee_on:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_clause 0x1
; GFX12-SDAG-NEXT: s_load_b64 s[6:7], s[4:5], 0x34
; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: v_max_num_f64_e64 v[0:1], s[6:7], s[6:7]
; GFX12-SDAG-NEXT: v_max_num_f64_e64 v[2:3], s[2:3], s[2:3]
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[2:3], v[0:1]
; GFX12-SDAG-NEXT: buffer_store_b64 v[0:1], off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: test_fmin_f64_v_ieee_on:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_clause 0x1
; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-GISEL-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[0:1], s[2:3], s[2:3]
; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[4:5], s[4:5]
; GFX12-GISEL-NEXT: s_mov_b32 s2, -1
; GFX12-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-GISEL-NEXT: buffer_store_b64 v[0:1], off, s[0:3], null
; GFX12-GISEL-NEXT: s_endpgm
%val = call double @llvm.minnum.f64(double %a, double %b)
store double %val, ptr addrspace(1) %out, align 8
ret void
}
define amdgpu_ps double @test_fmin_f64_v_ieee_off(double %a, double %b) #0 {
; GFX8-LABEL: test_fmin_f64_v_ieee_off:
; GFX8: ; %bb.0:
; GFX8-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-NEXT: v_readfirstlane_b32 s0, v0
; GFX8-NEXT: v_readfirstlane_b32 s1, v1
; GFX8-NEXT: ; return to shader part epilog
;
; GFX9-LABEL: test_fmin_f64_v_ieee_off:
; GFX9: ; %bb.0:
; GFX9-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX9-NEXT: v_readfirstlane_b32 s0, v0
; GFX9-NEXT: v_readfirstlane_b32 s1, v1
; GFX9-NEXT: ; return to shader part epilog
;
; GFX12-LABEL: test_fmin_f64_v_ieee_off:
; GFX12: ; %bb.0:
; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-NEXT: v_readfirstlane_b32 s0, v0
; GFX12-NEXT: v_readfirstlane_b32 s1, v1
; GFX12-NEXT: ; return to shader part epilog
%val = call double @llvm.minnum.f64(double %a, double %b)
ret double %val
}
define amdgpu_kernel void @test_fmin_f64_s_ieee_on(ptr addrspace(1) %out, double inreg %a, double inreg %b) #0 {
; GFX8-SDAG-LABEL: test_fmin_f64_s_ieee_on:
; GFX8-SDAG: ; %bb.0:
; GFX8-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX8-SDAG-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34
; GFX8-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-SDAG-NEXT: v_max_f64 v[2:3], s[2:3], s[2:3]
; GFX8-SDAG-NEXT: v_max_f64 v[0:1], s[4:5], s[4:5]
; GFX8-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX8-SDAG-NEXT: s_mov_b32 s2, -1
; GFX8-SDAG-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
; GFX8-SDAG-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GFX8-SDAG-NEXT: s_endpgm
;
; GFX8-GISEL-LABEL: test_fmin_f64_s_ieee_on:
; GFX8-GISEL: ; %bb.0:
; GFX8-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX8-GISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34
; GFX8-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-GISEL-NEXT: v_max_f64 v[0:1], s[2:3], s[2:3]
; GFX8-GISEL-NEXT: v_max_f64 v[2:3], s[4:5], s[4:5]
; GFX8-GISEL-NEXT: s_mov_b32 s2, -1
; GFX8-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX8-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX8-GISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GFX8-GISEL-NEXT: s_endpgm
;
; GFX9-SDAG-LABEL: test_fmin_f64_s_ieee_on:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX9-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
; GFX9-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-SDAG-NEXT: v_max_f64 v[2:3], s[2:3], s[2:3]
; GFX9-SDAG-NEXT: v_max_f64 v[0:1], s[6:7], s[6:7]
; GFX9-SDAG-NEXT: s_mov_b32 s3, 0xf000
; GFX9-SDAG-NEXT: s_mov_b32 s2, -1
; GFX9-SDAG-NEXT: v_min_f64 v[0:1], v[2:3], v[0:1]
; GFX9-SDAG-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GFX9-SDAG-NEXT: s_endpgm
;
; GFX9-GISEL-LABEL: test_fmin_f64_s_ieee_on:
; GFX9-GISEL: ; %bb.0:
; GFX9-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX9-GISEL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x34
; GFX9-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-GISEL-NEXT: v_max_f64 v[0:1], s[2:3], s[2:3]
; GFX9-GISEL-NEXT: v_max_f64 v[2:3], s[6:7], s[6:7]
; GFX9-GISEL-NEXT: s_mov_b32 s2, -1
; GFX9-GISEL-NEXT: s_mov_b32 s3, 0xf000
; GFX9-GISEL-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]
; GFX9-GISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GFX9-GISEL-NEXT: s_endpgm
;
; GFX12-SDAG-LABEL: test_fmin_f64_s_ieee_on:
; GFX12-SDAG: ; %bb.0:
; GFX12-SDAG-NEXT: s_clause 0x1
; GFX12-SDAG-NEXT: s_load_b64 s[6:7], s[4:5], 0x34
; GFX12-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-SDAG-NEXT: s_wait_kmcnt 0x0
; GFX12-SDAG-NEXT: v_max_num_f64_e64 v[0:1], s[6:7], s[6:7]
; GFX12-SDAG-NEXT: v_max_num_f64_e64 v[2:3], s[2:3], s[2:3]
; GFX12-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-SDAG-NEXT: s_mov_b32 s2, -1
; GFX12-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-SDAG-NEXT: v_min_num_f64_e32 v[0:1], v[2:3], v[0:1]
; GFX12-SDAG-NEXT: buffer_store_b64 v[0:1], off, s[0:3], null
; GFX12-SDAG-NEXT: s_endpgm
;
; GFX12-GISEL-LABEL: test_fmin_f64_s_ieee_on:
; GFX12-GISEL: ; %bb.0:
; GFX12-GISEL-NEXT: s_clause 0x1
; GFX12-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX12-GISEL-NEXT: s_load_b64 s[4:5], s[4:5], 0x34
; GFX12-GISEL-NEXT: s_wait_kmcnt 0x0
; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[0:1], s[2:3], s[2:3]
; GFX12-GISEL-NEXT: v_max_num_f64_e64 v[2:3], s[4:5], s[4:5]
; GFX12-GISEL-NEXT: s_mov_b32 s2, -1
; GFX12-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX12-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX12-GISEL-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]
; GFX12-GISEL-NEXT: buffer_store_b64 v[0:1], off, s[0:3], null
; GFX12-GISEL-NEXT: s_endpgm
%val = call double @llvm.minnum.f64(double %a, double %b)
store double %val, ptr addrspace(1) %out, align 8
ret void
}
define amdgpu_ps double @test_fmin_f64_s_ieee_off(double inreg %a, double inreg %b) #0 {
; GFX8-LABEL: test_fmin_f64_s_ieee_off:
; GFX8: ; %bb.0:
; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: v_min_f64 v[0:1], s[0:1], v[0:1]
; GFX8-NEXT: v_readfirstlane_b32 s0, v0
; GFX8-NEXT: v_readfirstlane_b32 s1, v1
; GFX8-NEXT: ; return to shader part epilog
;
; GFX9-LABEL: test_fmin_f64_s_ieee_off:
; GFX9: ; %bb.0:
; GFX9-NEXT: v_mov_b32_e32 v0, s2
; GFX9-NEXT: v_mov_b32_e32 v1, s3
; GFX9-NEXT: v_min_f64 v[0:1], s[0:1], v[0:1]
; GFX9-NEXT: v_readfirstlane_b32 s0, v0
; GFX9-NEXT: v_readfirstlane_b32 s1, v1
; GFX9-NEXT: ; return to shader part epilog
;
; GFX12-LABEL: test_fmin_f64_s_ieee_off:
; GFX12: ; %bb.0:
; GFX12-NEXT: v_min_num_f64_e64 v[0:1], s[0:1], s[2:3]
; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX12-NEXT: v_readfirstlane_b32 s0, v0
; GFX12-NEXT: v_readfirstlane_b32 s1, v1
; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)
; GFX12-NEXT: ; return to shader part epilog
%val = call double @llvm.minnum.f64(double %a, double %b)
ret double %val
}
declare float @llvm.minnum.f32(float, float) #1
declare <2 x float> @llvm.minnum.v2f32(<2 x float>, <2 x float>) #1
declare <3 x float> @llvm.minnum.v3f32(<3 x float>, <3 x float>) #1
declare <4 x float> @llvm.minnum.v4f32(<4 x float>, <4 x float>) #1
declare <8 x float> @llvm.minnum.v8f32(<8 x float>, <8 x float>) #1
declare <16 x float> @llvm.minnum.v16f32(<16 x float>, <16 x float>) #1
declare half @llvm.minnum.f16(half, half) #1
declare double @llvm.minnum.f64(double, double) #1
declare <2 x half> @llvm.minnum.v2f16(<2 x half>, <2 x half>) #1
attributes #0 = { nounwind denormal_fpenv(float: preservesign) }
attributes #1 = { nounwind readnone }