| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 |
| ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -o - -global-isel -global-isel-abort=1 < %s 2>&1 | FileCheck %s |
| |
| define i32 @test_01(ptr %p, i64 %len, i32 %x) { |
| ; CHECK-LABEL: test_01: |
| ; CHECK: # %bb.0: # %entry |
| ; CHECK-NEXT: movl $1, %eax |
| ; CHECK-NEXT: .p2align 4 |
| ; CHECK-NEXT: .LBB0_1: # %loop |
| ; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 |
| ; CHECK-NEXT: subq %rax, %rsi |
| ; CHECK-NEXT: setb %cl |
| ; CHECK-NEXT: testb $1, %cl |
| ; CHECK-NEXT: jne .LBB0_4 |
| ; CHECK-NEXT: # %bb.2: # %backedge |
| ; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1 |
| ; CHECK-NEXT: imulq $4, %rsi, %rcx |
| ; CHECK-NEXT: addq %rdi, %rcx |
| ; CHECK-NEXT: cmpl %edx, (%rcx) |
| ; CHECK-NEXT: sete %cl |
| ; CHECK-NEXT: testb $1, %cl |
| ; CHECK-NEXT: je .LBB0_1 |
| ; CHECK-NEXT: # %bb.3: # %failure |
| ; CHECK-NEXT: .LBB0_4: # %exit |
| ; CHECK-NEXT: movl $-1, %eax |
| ; CHECK-NEXT: retq |
| |
| entry: |
| %scevgep = getelementptr i32, ptr %p, i64 -1 |
| br label %loop |
| |
| loop: ; preds = %backedge, %entry |
| %iv = phi i64 [ %iv.next, %backedge ], [ %len, %entry ] |
| %iv.next = add i64 %iv, -1 |
| %cond_1 = icmp eq i64 %iv, 0 |
| br i1 %cond_1, label %exit, label %backedge |
| |
| backedge: ; preds = %loop |
| %scevgep1 = getelementptr i32, ptr %scevgep, i64 %iv |
| %loaded = load atomic i32, ptr %scevgep1 unordered, align 4 |
| %cond_2 = icmp eq i32 %loaded, %x |
| br i1 %cond_2, label %failure, label %loop |
| |
| exit: ; preds = %loop |
| ret i32 -1 |
| |
| failure: |
| unreachable |
| } |
| |