llvm/test/CodeGen/PowerPC/vec-nmsub.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -verify-machineinstrs < %s -mcpu=pwr5 -mtriple=ppc32-- -mattr=+altivec | FileCheck %s

define dso_local <4 x float> @intrinsic(<4 x float> noundef %a, <4 x float> noundef %b, <4 x float> noundef %c) local_unnamed_addr {
; CHECK-LABEL: intrinsic:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    vnmsubfp 2, 2, 3, 4
; CHECK-NEXT:    blr
entry:
  %0 = tail call <4 x float> @llvm.ppc.altivec.vnmsubfp(<4 x float> %a, <4 x float> %b, <4 x float> %c)
  ret <4 x float> %0
}

define <4 x float> @manual_llvm_fma(<4 x float> %a, <4 x float> %b, <4 x float> %c) unnamed_addr {
; CHECK-LABEL: manual_llvm_fma:
; CHECK:       # %bb.0: # %start
; CHECK-NEXT:    vnmsubfp 2, 2, 3, 4
; CHECK-NEXT:    blr
start:
  %0 = fneg <4 x float> %c
  %1 = tail call <4 x float> @llvm.fma.v4f32(<4 x float> %a, <4 x float> %b, <4 x float> %0)
  %2 = fneg <4 x float> %1
  ret <4 x float> %2
}

define dso_local <4 x float> @manual_vmaddfp(<4 x float> noundef %a, <4 x float> noundef %b, <4 x float> noundef %c) local_unnamed_addr {
; CHECK-LABEL: manual_vmaddfp:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    vnmsubfp 2, 2, 3, 4
; CHECK-NEXT:    blr
entry:
  %fneg.i3 = fneg <4 x float> %c
  %0 = tail call <4 x float> @llvm.ppc.altivec.vmaddfp(<4 x float> %a, <4 x float> %b, <4 x float> %fneg.i3)
  %fneg.i = fneg <4 x float> %0
  ret <4 x float> %fneg.i
}