blob: cba56e3d5798f5d4af536420d41f140ed0c944fb [file] [log] [blame] [edit]
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -verify-machineinstrs < %s -O3 -mcpu=ppc -mtriple powerpc-ibm-aix \
; RUN: -ppc-asm-full-reg-names | FileCheck %s
define i32 @foo(i32 noundef signext %x) {
; CHECK-LABEL: foo:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr r0
; CHECK-NEXT: stwu r1, -64(r1)
; CHECK-NEXT: stw r0, 72(r1)
; CHECK-NEXT: cmpwi r3, 8
; CHECK-NEXT: stw r31, 60(r1) # 4-byte Folded Spill
; CHECK-NEXT: mr r31, r3
; CHECK-NEXT: li r3, 0
; CHECK-NEXT: ble cr0, L..BB0_4
; CHECK-NEXT: # %bb.1: # %entry
; CHECK-NEXT: cmpwi r31, 11
; CHECK-NEXT: bge cr0, L..BB0_7
; CHECK-NEXT: # %bb.2: # %entry
; CHECK-NEXT: cmplwi r31, 9
; CHECK-NEXT: beq cr0, L..BB0_9
; CHECK-NEXT: # %bb.3: # %entry
; CHECK-NEXT: cmplwi r31, 10
; CHECK-NEXT: beq cr0, L..BB0_11
; CHECK-NEXT: b L..BB0_13
; CHECK-NEXT: L..BB0_4: # %entry
; CHECK-NEXT: cmplwi r31, 4
; CHECK-NEXT: beq cr0, L..BB0_12
; CHECK-NEXT: # %bb.5: # %entry
; CHECK-NEXT: cmplwi r31, 7
; CHECK-NEXT: beq cr0, L..BB0_11
; CHECK-NEXT: # %bb.6: # %entry
; CHECK-NEXT: cmplwi r31, 8
; CHECK-NEXT: beq cr0, L..BB0_10
; CHECK-NEXT: b L..BB0_13
; CHECK-NEXT: L..BB0_7: # %entry
; CHECK-NEXT: beq cr0, L..BB0_10
; CHECK-NEXT: # %bb.8: # %entry
; CHECK-NEXT: cmplwi r31, 12
; CHECK-NEXT: bne cr0, L..BB0_13
; CHECK-NEXT: L..BB0_9: # %sw.bb2
; CHECK-NEXT: mr r3, r31
; CHECK-NEXT: bl .foo3[PR]
; CHECK-NEXT: nop
; CHECK-NEXT: mr r3, r31
; CHECK-NEXT: b L..BB0_13
; CHECK-NEXT: L..BB0_10: # %sw.bb1
; CHECK-NEXT: mr r3, r31
; CHECK-NEXT: bl .foo2[PR]
; CHECK-NEXT: nop
; CHECK-NEXT: mr r3, r31
; CHECK-NEXT: b L..BB0_13
; CHECK-NEXT: L..BB0_11: # %sw.bb
; CHECK-NEXT: mr r3, r31
; CHECK-NEXT: bl .foo1[PR]
; CHECK-NEXT: nop
; CHECK-NEXT: mr r3, r31
; CHECK-NEXT: b L..BB0_13
; CHECK-NEXT: L..BB0_12: # %sw.bb3
; CHECK-NEXT: li r3, 4
; CHECK-NEXT: bl .foo4[PR]
; CHECK-NEXT: nop
; CHECK-NEXT: li r3, 4
; CHECK-NEXT: L..BB0_13: # %return
; CHECK-NEXT: lwz r31, 60(r1) # 4-byte Folded Reload
; CHECK-NEXT: addi r1, r1, 64
; CHECK-NEXT: lwz r0, 8(r1)
; CHECK-NEXT: mtlr r0
; CHECK-NEXT: blr
entry:
switch i32 %x, label %return [
i32 7, label %sw.bb
i32 10, label %sw.bb
i32 8, label %sw.bb1
i32 11, label %sw.bb1
i32 9, label %sw.bb2
i32 12, label %sw.bb2
i32 4, label %sw.bb3
]
sw.bb: ; preds = %entry, %entry
tail call void @foo1(i32 noundef signext %x)
br label %return
sw.bb1: ; preds = %entry, %entry
tail call void @foo2(i32 noundef signext %x)
br label %return
sw.bb2: ; preds = %entry, %entry
tail call void @foo3(i32 noundef signext %x)
br label %return
sw.bb3: ; preds = %entry
tail call void @foo4(i32 noundef signext 4)
br label %return
return: ; preds = %sw.bb, %sw.bb1, %sw.bb2, %sw.bb3, %entry
%retval.0 = phi i32 [ 0, %entry ], [ 4, %sw.bb3 ], [ %x, %sw.bb2 ], [ %x, %sw.bb1 ], [ %x, %sw.bb ]
ret i32 %retval.0
}
define i32 @goo(i32 noundef signext %x) {
; CHECK-LABEL: goo:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr r0
; CHECK-NEXT: stwu r1, -64(r1)
; CHECK-NEXT: stw r0, 72(r1)
; CHECK-NEXT: cmplwi r3, 12
; CHECK-NEXT: stw r31, 60(r1) # 4-byte Folded Spill
; CHECK-NEXT: mr r31, r3
; CHECK-NEXT: bgt cr0, L..BB1_7
; CHECK-NEXT: # %bb.1: # %entry
; CHECK-NEXT: li r3, 1
; CHECK-NEXT: slw r3, r3, r31
; CHECK-NEXT: andi. r4, r3, 5632
; CHECK-NEXT: bne cr0, L..BB1_4
; CHECK-NEXT: # %bb.2: # %entry
; CHECK-NEXT: andi. r3, r3, 2304
; CHECK-NEXT: beq cr0, L..BB1_5
; CHECK-NEXT: # %bb.3: # %sw.bb1
; CHECK-NEXT: mr r3, r31
; CHECK-NEXT: bl .foo2[PR]
; CHECK-NEXT: nop
; CHECK-NEXT: b L..BB1_9
; CHECK-NEXT: L..BB1_4: # %sw.bb2
; CHECK-NEXT: mr r3, r31
; CHECK-NEXT: bl .foo3[PR]
; CHECK-NEXT: nop
; CHECK-NEXT: b L..BB1_9
; CHECK-NEXT: L..BB1_5: # %entry
; CHECK-NEXT: cmplwi r31, 7
; CHECK-NEXT: bne cr0, L..BB1_7
; CHECK-NEXT: # %bb.6: # %sw.bb
; CHECK-NEXT: li r3, 7
; CHECK-NEXT: li r31, 7
; CHECK-NEXT: bl .foo1[PR]
; CHECK-NEXT: nop
; CHECK-NEXT: b L..BB1_9
; CHECK-NEXT: L..BB1_7: # %entry
; CHECK-NEXT: cmplwi r31, 4
; CHECK-NEXT: li r31, 0
; CHECK-NEXT: bne cr0, L..BB1_9
; CHECK-NEXT: # %bb.8: # %sw.bb3
; CHECK-NEXT: li r3, 4
; CHECK-NEXT: li r31, 4
; CHECK-NEXT: bl .foo4[PR]
; CHECK-NEXT: nop
; CHECK-NEXT: L..BB1_9: # %return
; CHECK-NEXT: mr r3, r31
; CHECK-NEXT: lwz r31, 60(r1) # 4-byte Folded Reload
; CHECK-NEXT: addi r1, r1, 64
; CHECK-NEXT: lwz r0, 8(r1)
; CHECK-NEXT: mtlr r0
; CHECK-NEXT: blr
entry:
switch i32 %x, label %return [
i32 7, label %sw.bb
i32 8, label %sw.bb1
i32 11, label %sw.bb1
i32 9, label %sw.bb2
i32 10, label %sw.bb2
i32 12, label %sw.bb2
i32 4, label %sw.bb3
]
sw.bb: ; preds = %entry
tail call void @foo1(i32 noundef signext 7)
br label %return
sw.bb1: ; preds = %entry, %entry
tail call void @foo2(i32 noundef signext %x)
br label %return
sw.bb2: ; preds = %entry, %entry, %entry
tail call void @foo3(i32 noundef signext %x)
br label %return
sw.bb3: ; preds = %entry
tail call void @foo4(i32 noundef signext 4)
br label %return
return: ; preds = %sw.bb, %sw.bb1, %sw.bb2, %sw.bb3, %entry
%retval.0 = phi i32 [ 0, %entry ], [ 4, %sw.bb3 ], [ %x, %sw.bb2 ], [ %x, %sw.bb1 ], [ 7, %sw.bb ]
ret i32 %retval.0
}
declare void @foo1(i32 noundef signext)
declare void @foo2(i32 noundef signext)
declare void @foo3(i32 noundef signext)
declare void @foo4(i32 noundef signext)