llvm/test/CodeGen/AArch64/GlobalISel/select.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
# RUN: llc -O0 -mtriple=aarch64-apple-ios -run-pass=instruction-select -global-isel-abort=1 -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=IOS
# RUN: llc -O0 -mtriple=aarch64-linux-gnu -relocation-model=pic -run-pass=instruction-select -global-isel-abort=1 -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=LINUX-PIC

--- |
  target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"

  define void @frame_index() {
    %ptr0 = alloca i64
    ret void
  }

  define ptr @ptr_mask(ptr %in) { ret ptr undef }

  @var_local = global i8 0
  define ptr @global_local() { ret ptr undef }

  @var_got = external global i8
  define ptr @global_got() { ret ptr undef }

  define void @icmp() { ret void }
  define void @fcmp() { ret void }

  define void @phi() { ret void }

  define void @select() { ret void }
...

---
name:            frame_index
legalized:       true
regBankSelected: true
stack:
  - { id: 0, name: ptr0, offset: 0, size: 8, alignment: 8 }
body:             |
  bb.0:
    ; CHECK-LABEL: name: frame_index
    ; CHECK: [[ADDXri:%[0-9]+]]:gpr64sp = ADDXri %stack.0.ptr0, 0, 0
    ; CHECK-NEXT: $x0 = COPY [[ADDXri]]
    %0:gpr(p0) = G_FRAME_INDEX %stack.0.ptr0
    $x0 = COPY %0(p0)
...

---

---
name:            ptr_mask
legalized:       true
regBankSelected: true
body:             |
  bb.0:
      liveins: $x0
    ; CHECK-LABEL: name: ptr_mask
    ; CHECK: liveins: $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
    ; CHECK-NEXT: [[ANDXri:%[0-9]+]]:gpr64sp = ANDXri [[COPY]], 8060
    ; CHECK-NEXT: $x0 = COPY [[ANDXri]]
    %0:gpr(p0) = COPY $x0
    %const:gpr(s64) = G_CONSTANT i64 -8
    %1:gpr(p0) = G_PTRMASK %0, %const
    $x0 = COPY %1(p0)
...

---
# Global defined in the same linkage unit so no GOT is needed
name:            global_local
legalized:       true
regBankSelected: true
body:             |
  bb.0:
    ; IOS-LABEL: name: global_local
    ; IOS: [[MOVaddr:%[0-9]+]]:gpr64common = MOVaddr target-flags(aarch64-page) @var_local, target-flags(aarch64-pageoff, aarch64-nc) @var_local
    ; IOS-NEXT: $x0 = COPY [[MOVaddr]]
    ;
    ; LINUX-PIC-LABEL: name: global_local
    ; LINUX-PIC: [[LOADgot:%[0-9]+]]:gpr64common = LOADgot target-flags(aarch64-got) @var_local
    ; LINUX-PIC-NEXT: $x0 = COPY [[LOADgot]]
    %0:gpr(p0) = G_GLOBAL_VALUE @var_local
    $x0 = COPY %0(p0)
...

---
name:            global_got
legalized:       true
regBankSelected: true
body:             |
  bb.0:
    ; CHECK-LABEL: name: global_got
    ; CHECK: [[LOADgot:%[0-9]+]]:gpr64common = LOADgot target-flags(aarch64-got) @var_got
    ; CHECK-NEXT: $x0 = COPY [[LOADgot]]
    %0:gpr(p0) = G_GLOBAL_VALUE @var_got
    $x0 = COPY %0(p0)
...

---
name:            icmp
legalized:       true
regBankSelected: true
body:             |
  bb.0:
    liveins: $w0, $x0

    ; CHECK-LABEL: name: icmp
    ; CHECK: liveins: $w0, $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
    ; CHECK-NEXT: [[SUBSWrr:%[0-9]+]]:gpr32 = SUBSWrr [[COPY]], [[COPY]], implicit-def $nzcv
    ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY [[CSINCWr]]
    ; CHECK-NEXT: $w0 = COPY [[COPY1]]
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64 = COPY $x0
    ; CHECK-NEXT: [[SUBSXrr:%[0-9]+]]:gpr64 = SUBSXrr [[COPY2]], [[COPY2]], implicit-def $nzcv
    ; CHECK-NEXT: [[CSINCWr1:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 3, implicit $nzcv
    ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32all = COPY [[CSINCWr1]]
    ; CHECK-NEXT: $w0 = COPY [[COPY3]]
    ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr64 = COPY $x0
    ; CHECK-NEXT: [[SUBSXrr1:%[0-9]+]]:gpr64 = SUBSXrr [[COPY4]], [[COPY4]], implicit-def $nzcv
    ; CHECK-NEXT: [[CSINCWr2:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 0, implicit $nzcv
    ; CHECK-NEXT: [[COPY5:%[0-9]+]]:gpr32all = COPY [[CSINCWr2]]
    ; CHECK-NEXT: $w0 = COPY [[COPY5]]
    %0:gpr(s32) = COPY $w0
    %1:gpr(s32) = G_ICMP intpred(eq), %0, %0
    %6:gpr(s8) = G_TRUNC %1(s32)
    %9:gpr(s32) = G_ANYEXT %6
    $w0 = COPY %9(s32)

    %2:gpr(s64) = COPY $x0
    %3:gpr(s32) = G_ICMP intpred(uge), %2, %2
    %7:gpr(s8) = G_TRUNC %3(s32)
    %10:gpr(s32) = G_ANYEXT %7
    $w0 = COPY %10(s32)

    %4:gpr(p0) = COPY $x0
    %5:gpr(s32) = G_ICMP intpred(ne), %4, %4
    %8:gpr(s8) = G_TRUNC %5(s32)
    %11:gpr(s32) = G_ANYEXT %8
    $w0 = COPY %11(s32)
...

---
name:            fcmp
legalized:       true
regBankSelected: true
body:             |
  bb.0:
    liveins: $w0, $x0

    ; CHECK-LABEL: name: fcmp
    ; CHECK: liveins: $w0, $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $s0
    ; CHECK-NEXT: nofpexcept FCMPSrr [[COPY]], [[COPY]], implicit-def $nzcv, implicit $fpcr
    ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 5, implicit $nzcv
    ; CHECK-NEXT: [[CSINCWr1:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 13, implicit $nzcv
    ; CHECK-NEXT: [[ORRWrr:%[0-9]+]]:gpr32 = ORRWrr [[CSINCWr]], [[CSINCWr1]]
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY [[ORRWrr]]
    ; CHECK-NEXT: $w0 = COPY [[COPY1]]
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr64 = COPY $d0
    ; CHECK-NEXT: nofpexcept FCMPDrr [[COPY2]], [[COPY2]], implicit-def $nzcv, implicit $fpcr
    ; CHECK-NEXT: [[CSINCWr2:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 4, implicit $nzcv
    ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32all = COPY [[CSINCWr2]]
    ; CHECK-NEXT: $w0 = COPY [[COPY3]]
    ; CHECK-NEXT: [[COPY4:%[0-9]+]]:fpr32 = COPY $s0
    ; CHECK-NEXT: nofpexcept FCMPSrr [[COPY4]], [[COPY4]], implicit-def $nzcv, implicit $fpcr
    ; CHECK-NEXT: [[CSINCWr3:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 15, implicit $nzcv
    ; CHECK-NEXT: [[COPY5:%[0-9]+]]:gpr32all = COPY [[CSINCWr3]]
    ; CHECK-NEXT: $w0 = COPY [[COPY5]]
    ; CHECK-NEXT: [[COPY6:%[0-9]+]]:fpr64 = COPY $d0
    ; CHECK-NEXT: nofpexcept FCMPDrr [[COPY6]], [[COPY6]], implicit-def $nzcv, implicit $fpcr
    ; CHECK-NEXT: [[CSINCWr4:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 14, implicit $nzcv
    ; CHECK-NEXT: [[COPY7:%[0-9]+]]:gpr32all = COPY [[CSINCWr4]]
    ; CHECK-NEXT: $w0 = COPY [[COPY7]]
    %0:fpr(s32) = COPY $s0
    %1:gpr(s32) = G_FCMP floatpred(one), %0, %0
    %2:gpr(s8) = G_TRUNC %1(s32)
    %3:gpr(s32) = G_ANYEXT %2
    $w0 = COPY %3(s32)

    %4:fpr(s64) = COPY $d0
    %5:gpr(s32) = G_FCMP floatpred(uge), %4, %4
    %6:gpr(s8) = G_TRUNC %5(s32)
    %7:gpr(s32) = G_ANYEXT %6
    $w0 = COPY %7(s32)

    %8:fpr(s32) = COPY $s0
    %9:gpr(s32) = G_FCMP floatpred(true), %8, %8
    %10:gpr(s8) = G_TRUNC %9(s32)
    %11:gpr(s32) = G_ANYEXT %10
    $w0 = COPY %11(s32)

    %12:fpr(s64) = COPY $d0
    %13:gpr(s32) = G_FCMP floatpred(false), %12, %12
    %14:gpr(s8) = G_TRUNC %13(s32)
    %15:gpr(s32) = G_ANYEXT %14
    $w0 = COPY %15(s32)

...

---
name:            phi
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  ; CHECK-LABEL: name: phi
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
  ; CHECK-NEXT:   liveins: $s0, $w0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:fpr32 = COPY $s0
  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:gpr32 = COPY $w0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[PHI:%[0-9]+]]:fpr32 = PHI [[COPY]], %bb.0, [[PHI]], %bb.1
  ; CHECK-NEXT:   TBNZW [[COPY1]], 0, %bb.1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   $s0 = COPY [[PHI]]
  ; CHECK-NEXT:   RET_ReallyLR implicit $s0
  bb.0:
    liveins: $s0, $w0
    successors: %bb.1
    %0:fpr(s32) = COPY $s0
    %3:gpr(s32) = COPY $w0

  bb.1:
    successors: %bb.1, %bb.2
    %2:fpr(s32) = PHI %0, %bb.0, %2, %bb.1
    G_BRCOND %3, %bb.1

  bb.2:
    $s0 = COPY %2
    RET_ReallyLR implicit $s0
...

---
name:            select
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $w0, $w1, $w2
    ; CHECK-LABEL: name: select
    ; CHECK: liveins: $w0, $w1, $w2
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
    ; CHECK-NEXT: [[ANDSWri:%[0-9]+]]:gpr32 = ANDSWri [[COPY]], 0, implicit-def $nzcv
    ; CHECK-NEXT: [[CSELWr:%[0-9]+]]:gpr32 = CSELWr [[COPY1]], [[COPY2]], 1, implicit $nzcv
    ; CHECK-NEXT: $w0 = COPY [[CSELWr]]
    ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr64 = COPY $x0
    ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr64 = COPY $x1
    ; CHECK-NEXT: [[ANDSWri1:%[0-9]+]]:gpr32 = ANDSWri [[COPY]], 0, implicit-def $nzcv
    ; CHECK-NEXT: [[CSELXr:%[0-9]+]]:gpr64 = CSELXr [[COPY3]], [[COPY4]], 1, implicit $nzcv
    ; CHECK-NEXT: $x0 = COPY [[CSELXr]]
    ; CHECK-NEXT: [[COPY5:%[0-9]+]]:gpr64 = COPY $x0
    ; CHECK-NEXT: [[COPY6:%[0-9]+]]:gpr64 = COPY $x1
    ; CHECK-NEXT: [[ANDSWri2:%[0-9]+]]:gpr32 = ANDSWri [[COPY]], 0, implicit-def $nzcv
    ; CHECK-NEXT: [[CSELXr1:%[0-9]+]]:gpr64 = CSELXr [[COPY5]], [[COPY6]], 1, implicit $nzcv
    ; CHECK-NEXT: $x0 = COPY [[CSELXr1]]
    %10:gpr(s32) = COPY $w0

    %1:gpr(s32) = COPY $w1
    %2:gpr(s32) = COPY $w2
    %3:gpr(s32) = G_SELECT %10, %1, %2
    $w0 = COPY %3(s32)

    %4:gpr(s64) = COPY $x0
    %5:gpr(s64) = COPY $x1
    %6:gpr(s64) = G_SELECT %10, %4, %5
    $x0 = COPY %6(s64)

    %7:gpr(p0) = COPY $x0
    %8:gpr(p0) = COPY $x1
    %9:gpr(p0) = G_SELECT %10, %7, %8
    $x0 = COPY %9(p0)
...