llvm/test/CodeGen/AArch64/GlobalISel/select-cttz.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=arm64-unknown-unknown -global-isel -run-pass=instruction-select -global-isel-abort=1 %s -o - | FileCheck %s
# RUN: llc -O0 -mtriple=arm64-unknown-unknown -global-isel -mattr=+cssc -run-pass=instruction-select -global-isel-abort=1 %s -o - | FileCheck %s --check-prefix=CHECK-CSSC
...
---
name:            s32
alignment:       4
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $w0
    ; CHECK-LABEL: name: s32
    ; CHECK: liveins: $w0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
    ; CHECK-NEXT: [[RBITWr:%[0-9]+]]:gpr32 = RBITWr [[COPY]]
    ; CHECK-NEXT: [[CLZWr:%[0-9]+]]:gpr32 = CLZWr [[RBITWr]]
    ; CHECK-NEXT: $w0 = COPY [[CLZWr]]
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    ;
    ; CHECK-CSSC-LABEL: name: s32
    ; CHECK-CSSC: liveins: $w0
    ; CHECK-CSSC-NEXT: {{  $}}
    ; CHECK-CSSC-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
    ; CHECK-CSSC-NEXT: [[CTZWr:%[0-9]+]]:gpr32 = CTZWr [[COPY]]
    ; CHECK-CSSC-NEXT: $w0 = COPY [[CTZWr]]
    ; CHECK-CSSC-NEXT: RET_ReallyLR implicit $w0
    %0:gpr(s32) = COPY $w0
    %1:gpr(s32) = G_CTTZ %0(s32)
    $w0 = COPY %1(s32)
    RET_ReallyLR implicit $w0

...
---
name:            s64
alignment:       4
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $x0
    ; CHECK-LABEL: name: s64
    ; CHECK: liveins: $x0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
    ; CHECK-NEXT: [[RBITXr:%[0-9]+]]:gpr64 = RBITXr [[COPY]]
    ; CHECK-NEXT: [[CLZXr:%[0-9]+]]:gpr64 = CLZXr [[RBITXr]]
    ; CHECK-NEXT: $x0 = COPY [[CLZXr]]
    ; CHECK-NEXT: RET_ReallyLR implicit $x0
    ;
    ; CHECK-CSSC-LABEL: name: s64
    ; CHECK-CSSC: liveins: $x0
    ; CHECK-CSSC-NEXT: {{  $}}
    ; CHECK-CSSC-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
    ; CHECK-CSSC-NEXT: [[CTZXr:%[0-9]+]]:gpr64 = CTZXr [[COPY]]
    ; CHECK-CSSC-NEXT: $x0 = COPY [[CTZXr]]
    ; CHECK-CSSC-NEXT: RET_ReallyLR implicit $x0
    %0:gpr(s64) = COPY $x0
    %1:gpr(s64) = G_CTTZ %0(s64)
    $x0 = COPY %1(s64)
    RET_ReallyLR implicit $x0

...