llvm/test/CodeGen/AMDGPU/GlobalISel/combine-sext-trunc-sextinreg.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1030 -run-pass=amdgpu-regbank-combiner %s -o - | FileCheck %s

# Check (sext (trunc (sext_inreg x))) can be folded, as it's a pattern that can arise when
# CGP widening of uniform i16 ops is disabled.
# Two separate combines make it happen (sext_trunc and sext_inreg_of_sext_inreg).

---
name: trunc_s16_inreg_8
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0
    ; CHECK-LABEL: name: trunc_s16_inreg_8
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %copy:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: %inreg:_(s32) = G_SEXT_INREG %copy, 8
    ; CHECK-NEXT: $vgpr0 = COPY %inreg(s32)
    %copy:_(s32) = COPY $vgpr0
    %inreg:_(s32) = G_SEXT_INREG %copy, 8
    %trunc:_(s16) = G_TRUNC %inreg
    %sext:_(s32) = G_SEXT %trunc
    $vgpr0 = COPY %sext
...

---
name: trunc_s16_inreg_16
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0
    ; CHECK-LABEL: name: trunc_s16_inreg_16
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %copy:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: %inreg:_(s32) = G_SEXT_INREG %copy, 16
    ; CHECK-NEXT: $vgpr0 = COPY %inreg(s32)
    %copy:_(s32) = COPY $vgpr0
    %inreg:_(s32) = G_SEXT_INREG %copy, 16
    %trunc:_(s16) = G_TRUNC %inreg
    %sext:_(s32) = G_SEXT %trunc
    $vgpr0 = COPY %sext
...

---
name: trunc_s8_inreg_16
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0
    ; CHECK-LABEL: name: trunc_s8_inreg_16
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %copy:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: %sext:_(s32) = G_SEXT_INREG %copy, 8
    ; CHECK-NEXT: $vgpr0 = COPY %sext(s32)
    %copy:_(s32) = COPY $vgpr0
    %inreg:_(s32) = G_SEXT_INREG %copy, 16
    %trunc:_(s8) = G_TRUNC %inreg
    %sext:_(s32) = G_SEXT %trunc
    $vgpr0 = COPY %sext
...

# TODO?: We could handle this by inserting a trunc, but I'm not sure how useful that'd be.
---
name: mismatching_types
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $vgpr0
    ; CHECK-LABEL: name: mismatching_types
    ; CHECK: liveins: $vgpr0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %copy:_(s32) = COPY $vgpr0
    ; CHECK-NEXT: %inreg:_(s32) = G_SEXT_INREG %copy, 8
    ; CHECK-NEXT: %trunc:_(s8) = G_TRUNC %inreg(s32)
    ; CHECK-NEXT: %sext:_(s16) = G_SEXT %trunc(s8)
    ; CHECK-NEXT: %anyext:_(s32) = G_ANYEXT %sext(s16)
    ; CHECK-NEXT: $vgpr0 = COPY %anyext(s32)
    %copy:_(s32) = COPY $vgpr0
    %inreg:_(s32) = G_SEXT_INREG %copy, 8
    %trunc:_(s8) = G_TRUNC %inreg
    %sext:_(s16) = G_SEXT %trunc
    %anyext:_(s32) = G_ANYEXT %sext
    $vgpr0 = COPY %anyext
...