llvm/test/Transforms/LoopInterchange/currentLimitation.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt < %s -passes=loop-interchange -cache-line-size=64 -verify-loop-info \
; RUN:     -verify-dom-info -S | FileCheck %s
; RUN: opt < %s -passes=loop-interchange -cache-line-size=64 \
; RUN:     -da-disable-delinearization-checks -verify-loop-info -verify-dom-info -S \
; RUN:     | FileCheck %s

target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"

@A = common global [100 x [100 x i32]] zeroinitializer
@B = common global [100 x [100 x [100 x i32]]] zeroinitializer
@C = common global [100 x [100 x i64]] zeroinitializer

;;--------------------------------------Test case 01------------------------------------
;; Without -da-disable-delinearization-checks this is not interchanged due to
;; dependence. Even with that flag it must not be interchanged: it is a guarded,
;; imperfect nest (see below).
;;  for(int i=0;i<N-1;i++)
;;    if(N-1>1)                       // guard: inner loop skipped when N<=2
;;      for(int j=1;j<N-1;j++)
;;        A[j+1][i+1] = A[j+1][i+1] + k;


; Guarded nest: %for.cond1.preheader runs the inner loop only when
; %cmp324 = (N-1 > 1). The inner exit (inner IV == N-2) only terminates under
; that guard, so interchanging it loops forever for N == 2.
define void @interchange_01(i32 %k, i32 %N) {
; CHECK-LABEL: define void @interchange_01(
; CHECK-SAME: i32 [[K:%.*]], i32 [[N:%.*]]) {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    [[SUB:%.*]] = add nsw i32 [[N]], -1
; CHECK-NEXT:    [[CMP26:%.*]] = icmp sgt i32 [[N]], 1
; CHECK-NEXT:    br i1 [[CMP26]], label %[[FOR_COND1_PREHEADER_LR_PH:.*]], label %[[FOR_END17:.*]]
; CHECK:       [[FOR_COND1_PREHEADER_LR_PH]]:
; CHECK-NEXT:    [[CMP324:%.*]] = icmp sgt i32 [[SUB]], 1
; CHECK-NEXT:    [[TMP0:%.*]] = add i32 [[N]], -2
; CHECK-NEXT:    [[TMP1:%.*]] = sext i32 [[SUB]] to i64
; CHECK-NEXT:    br label %[[FOR_COND1_PREHEADER:.*]]
; CHECK:       [[FOR_COND_LOOPEXIT_LOOPEXIT:.*]]:
; CHECK-NEXT:    br label %[[FOR_COND_LOOPEXIT:.*]]
; CHECK:       [[FOR_COND_LOOPEXIT]]:
; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i64 [[INDVARS_IV_NEXT29:%.*]], [[TMP1]]
; CHECK-NEXT:    br i1 [[CMP]], label %[[FOR_COND1_PREHEADER]], label %[[FOR_END17_LOOPEXIT:.*]]
; CHECK:       [[FOR_COND1_PREHEADER]]:
; CHECK-NEXT:    [[INDVARS_IV28:%.*]] = phi i64 [ 0, %[[FOR_COND1_PREHEADER_LR_PH]] ], [ [[INDVARS_IV_NEXT29]], %[[FOR_COND_LOOPEXIT]] ]
; CHECK-NEXT:    [[INDVARS_IV_NEXT29]] = add nuw nsw i64 [[INDVARS_IV28]], 1
; CHECK-NEXT:    br i1 [[CMP324]], label %[[FOR_BODY4_PREHEADER:.*]], label %[[FOR_COND_LOOPEXIT]]
; CHECK:       [[FOR_BODY4_PREHEADER]]:
; CHECK-NEXT:    br label %[[FOR_BODY4:.*]]
; CHECK:       [[FOR_BODY4]]:
; CHECK-NEXT:    [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], %[[FOR_BODY4]] ], [ 1, %[[FOR_BODY4_PREHEADER]] ]
; CHECK-NEXT:    [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; CHECK-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds [100 x [100 x i32]], ptr @A, i64 0, i64 [[INDVARS_IV_NEXT]], i64 [[INDVARS_IV_NEXT29]]
; CHECK-NEXT:    [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX7]], align 4
; CHECK-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP2]], [[K]]
; CHECK-NEXT:    store i32 [[ADD8]], ptr [[ARRAYIDX7]], align 4
; CHECK-NEXT:    [[LFTR_WIDEIV:%.*]] = trunc i64 [[INDVARS_IV]] to i32
; CHECK-NEXT:    [[EXITCOND:%.*]] = icmp eq i32 [[LFTR_WIDEIV]], [[TMP0]]
; CHECK-NEXT:    br i1 [[EXITCOND]], label %[[FOR_COND_LOOPEXIT_LOOPEXIT]], label %[[FOR_BODY4]]
; CHECK:       [[FOR_END17_LOOPEXIT]]:
; CHECK-NEXT:    br label %[[FOR_END17]]
; CHECK:       [[FOR_END17]]:
; CHECK-NEXT:    ret void
;
  entry:
  %sub = add nsw i32 %N, -1
  %cmp26 = icmp sgt i32 %N, 1
  br i1 %cmp26, label %for.cond1.preheader.lr.ph, label %for.end17

  for.cond1.preheader.lr.ph:
  %cmp324 = icmp sgt i32 %sub, 1
  %0 = add i32 %N, -2
  %1 = sext i32 %sub to i64
  br label %for.cond1.preheader

  for.cond.loopexit:
  %cmp = icmp slt i64 %indvars.iv.next29, %1
  br i1 %cmp, label %for.cond1.preheader, label %for.end17

  for.cond1.preheader:
  %indvars.iv28 = phi i64 [ 0, %for.cond1.preheader.lr.ph ], [ %indvars.iv.next29, %for.cond.loopexit ]
  %indvars.iv.next29 = add nuw nsw i64 %indvars.iv28, 1
  br i1 %cmp324, label %for.body4, label %for.cond.loopexit

  for.body4:
  %indvars.iv = phi i64 [ %indvars.iv.next, %for.body4 ], [ 1, %for.cond1.preheader ]
  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
  %arrayidx7 = getelementptr inbounds [100 x [100 x i32]], ptr @A, i64 0, i64 %indvars.iv.next, i64 %indvars.iv.next29
  %2 = load i32, ptr %arrayidx7
  %add8 = add nsw i32 %2, %k
  store i32 %add8, ptr %arrayidx7
  %lftr.wideiv = trunc i64 %indvars.iv to i32
  %exitcond = icmp eq i32 %lftr.wideiv, %0
  br i1 %exitcond, label %for.cond.loopexit, label %for.body4

  for.end17:
  ret void
}

; When currently cannot interchange this loop, because transform currently
; expects the latches to be the exiting blocks too.

;
define void @interchange_02(i64 %k, i64 %N) {
; CHECK-LABEL: define void @interchange_02(
; CHECK-SAME: i64 [[K:%.*]], i64 [[N:%.*]]) {
; CHECK-NEXT:  [[ENTRY:.*]]:
; CHECK-NEXT:    br label %[[FOR1_HEADER:.*]]
; CHECK:       [[FOR1_HEADER]]:
; CHECK-NEXT:    [[J23:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[J_NEXT24:%.*]], %[[FOR1_INC10:.*]] ]
; CHECK-NEXT:    br label %[[FOR2:.*]]
; CHECK:       [[FOR2]]:
; CHECK-NEXT:    [[J:%.*]] = phi i64 [ [[J_NEXT:%.*]], %[[LATCH:.*]] ], [ 0, %[[FOR1_HEADER]] ]
; CHECK-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds [100 x [100 x i64]], ptr @C, i64 0, i64 [[J]], i64 [[J23]]
; CHECK-NEXT:    [[LV:%.*]] = load i64, ptr [[ARRAYIDX5]], align 8
; CHECK-NEXT:    [[ADD:%.*]] = add nsw i64 [[LV]], [[K]]
; CHECK-NEXT:    store i64 [[ADD]], ptr [[ARRAYIDX5]], align 8
; CHECK-NEXT:    [[EXITCOND:%.*]] = icmp eq i64 [[J]], 99
; CHECK-NEXT:    br i1 [[EXITCOND]], label %[[FOR1_INC10]], label %[[LATCH]]
; CHECK:       [[LATCH]]:
; CHECK-NEXT:    [[J_NEXT]] = add nuw nsw i64 [[J]], 1
; CHECK-NEXT:    br label %[[FOR2]]
; CHECK:       [[FOR1_INC10]]:
; CHECK-NEXT:    [[J_NEXT24]] = add nuw nsw i64 [[J23]], 1
; CHECK-NEXT:    [[EXITCOND26:%.*]] = icmp eq i64 [[J23]], 99
; CHECK-NEXT:    br i1 [[EXITCOND26]], label %[[FOR_END12:.*]], label %[[FOR1_HEADER]]
; CHECK:       [[FOR_END12]]:
; CHECK-NEXT:    ret void
;
entry:
  br label %for1.header

for1.header:
  %j23 = phi i64 [ 0, %entry ], [ %j.next24, %for1.inc10 ]
  br label %for2

for2:
  %j = phi i64 [ %j.next, %latch ], [ 0, %for1.header ]
  %arrayidx5 = getelementptr inbounds [100 x [100 x i64]], ptr @C, i64 0, i64 %j, i64 %j23
  %lv = load i64, ptr %arrayidx5
  %add = add nsw i64 %lv, %k
  store i64 %add, ptr %arrayidx5
  %exitcond = icmp eq i64 %j, 99
  br i1 %exitcond, label %for1.inc10, label %latch
latch:
  %j.next = add nuw nsw i64 %j, 1
  br label %for2

for1.inc10:
  %j.next24 = add nuw nsw i64 %j23, 1
  %exitcond26 = icmp eq i64 %j23, 99
  br i1 %exitcond26, label %for.end12, label %for1.header

for.end12:
  ret void
}