llvm/test/CodeGen/X86/pr222714.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s

; The index 'and' is narrowed to i32 and its zext selected as SUBREG_TO_REG;
; shrinkAndImmediate must not then replace the 'and' with its truncate operand.

define i64 @pr222714(i64 %x, ptr %p) {
; CHECK-LABEL: pr222714:
; CHECK:       # %bb.0:
; CHECK-NEXT:    shlq $30, %rdi
; CHECK-NEXT:    movabsq $17179869183, %rax # imm = 0x3FFFFFFFF
; CHECK-NEXT:    movabsq $-4294967295, %rcx # imm = 0xFFFFFFFF00000001
; CHECK-NEXT:    addq %rcx, %rax
; CHECK-NEXT:    testq %rdi, %rdi
; CHECK-NEXT:    cmovneq %rcx, %rax
; CHECK-NEXT:    movzwl %ax, %ecx
; CHECK-NEXT:    movl %eax, %eax
; CHECK-NEXT:    addq (%rsi,%rcx,8), %rax
; CHECK-NEXT:    retq
  %m = and i64 %x, 17179869183
  %c = icmp eq i64 %m, 0
  %s = select i1 %c, i64 17179869183, i64 0
  %a = add i64 %s, -4294967295
  %idx = and i64 %a, 1
  %gep = getelementptr inbounds i64, ptr %p, i64 %idx
  %ld = load i64, ptr %gep, align 8
  %lo = and i64 %a, 255
  %r = add i64 %ld, %lo
  ret i64 %r
}