| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6 | |
| ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 -verify-machineinstrs | FileCheck %s --check-prefix=X64 | |
| ; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -mattr=+avx2 -verify-machineinstrs | FileCheck %s --check-prefix=X86 | |
| ; The variable-index extract needs a 32-byte aligned stack temporary, so the | |
| ; stack is realigned. The callee load from a local must not be folded into the | |
| ; tail call, which executes after the epilogue. | |
| @g2 = global i16 0, align 2 | |
| define void @f25() nounwind { | |
| ; X64-LABEL: f25: | |
| ; X64: # %bb.0: # %entry | |
| ; X64-NEXT: pushq %rbp | |
| ; X64-NEXT: movq %rsp, %rbp | |
| ; X64-NEXT: andq $-32, %rsp | |
| ; X64-NEXT: subq $96, %rsp | |
| ; X64-NEXT: movq g2@GOTPCREL(%rip), %rax | |
| ; X64-NEXT: movzwl (%rax), %ecx | |
| ; X64-NEXT: andl $7, %ecx | |
| ; X64-NEXT: vmovss {{.*#+}} xmm0 = [60,0,0,0] | |
| ; X64-NEXT: vmovaps %ymm0, {{[0-9]+}}(%rsp) | |
| ; X64-NEXT: movl 32(%rsp,%rcx,4), %ecx | |
| ; X64-NEXT: movw %cx, (%rax) | |
| ; X64-NEXT: movq {{[0-9]+}}(%rsp), %rax | |
| ; X64-NEXT: movq %rbp, %rsp | |
| ; X64-NEXT: popq %rbp | |
| ; X64-NEXT: vzeroupper | |
| ; X64-NEXT: jmpq *%rax # TAILCALL | |
| ; | |
| ; X86-LABEL: f25: | |
| ; X86: # %bb.0: # %entry | |
| ; X86-NEXT: pushl %ebp | |
| ; X86-NEXT: movl %esp, %ebp | |
| ; X86-NEXT: andl $-32, %esp | |
| ; X86-NEXT: subl $96, %esp | |
| ; X86-NEXT: movzwl g2, %eax | |
| ; X86-NEXT: andl $7, %eax | |
| ; X86-NEXT: vmovss {{.*#+}} xmm0 = [60,0,0,0] | |
| ; X86-NEXT: vmovaps %ymm0, {{[0-9]+}}(%esp) | |
| ; X86-NEXT: movl 32(%esp,%eax,4), %eax | |
| ; X86-NEXT: movw %ax, g2 | |
| ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax | |
| ; X86-NEXT: movl %ebp, %esp | |
| ; X86-NEXT: popl %ebp | |
| ; X86-NEXT: vzeroupper | |
| ; X86-NEXT: jmpl *%eax # TAILCALL | |
| entry: | |
| %fp5 = alloca ptr, align 8 | |
| %0 = load i16, ptr @g2, align 2 | |
| %vecext = extractelement <8 x i32> <i32 60, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>, i16 %0 | |
| %conv = trunc i32 %vecext to i16 | |
| store i16 %conv, ptr @g2, align 2 | |
| %fp = load volatile ptr, ptr %fp5, align 8 | |
| tail call void %fp() | |
| ret void | |
| } |