| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py |
| ; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-I,RV32I |
| ; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-I,RV64I |
| ; RUN: llc -mtriple=riscv32 -mattr=+m -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-M,RV32IM |
| ; RUN: llc -mtriple=riscv64 -mattr=+m -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-M,RV64IM |
| ; RUN: llc -mtriple=riscv32 -mattr=+m,+zbs -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-ZBS,RV32IMZBS |
| ; RUN: llc -mtriple=riscv64 -mattr=+m,+zbs -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-ZBS,RV64IMZBS |
| |
| define i4 @clmulh_i4(i4 %a, i4 %b) nounwind { |
| ; CHECK-I-LABEL: clmulh_i4: |
| ; CHECK-I: # %bb.0: |
| ; CHECK-I-NEXT: andi a2, a1, 4 |
| ; CHECK-I-NEXT: andi a0, a0, 15 |
| ; CHECK-I-NEXT: seqz a2, a2 |
| ; CHECK-I-NEXT: slli a3, a0, 2 |
| ; CHECK-I-NEXT: addi a2, a2, -1 |
| ; CHECK-I-NEXT: andi a4, a1, 2 |
| ; CHECK-I-NEXT: and a2, a2, a3 |
| ; CHECK-I-NEXT: slli a3, a0, 1 |
| ; CHECK-I-NEXT: seqz a4, a4 |
| ; CHECK-I-NEXT: addi a4, a4, -1 |
| ; CHECK-I-NEXT: andi a1, a1, 8 |
| ; CHECK-I-NEXT: and a3, a4, a3 |
| ; CHECK-I-NEXT: seqz a1, a1 |
| ; CHECK-I-NEXT: slli a0, a0, 3 |
| ; CHECK-I-NEXT: addi a1, a1, -1 |
| ; CHECK-I-NEXT: xor a2, a3, a2 |
| ; CHECK-I-NEXT: and a0, a1, a0 |
| ; CHECK-I-NEXT: xor a0, a2, a0 |
| ; CHECK-I-NEXT: srli a0, a0, 4 |
| ; CHECK-I-NEXT: ret |
| ; |
| ; RV32IM-LABEL: clmulh_i4: |
| ; RV32IM: # %bb.0: |
| ; RV32IM-NEXT: andi a2, a1, 1 |
| ; RV32IM-NEXT: andi a3, a0, 2 |
| ; RV32IM-NEXT: andi a4, a1, 2 |
| ; RV32IM-NEXT: andi a5, a0, 1 |
| ; RV32IM-NEXT: mul a6, a3, a2 |
| ; RV32IM-NEXT: mul a7, a5, a4 |
| ; RV32IM-NEXT: andi t0, a1, 8 |
| ; RV32IM-NEXT: andi t1, a0, 4 |
| ; RV32IM-NEXT: andi a1, a1, 4 |
| ; RV32IM-NEXT: andi a0, a0, 8 |
| ; RV32IM-NEXT: mul a3, a3, t0 |
| ; RV32IM-NEXT: mul a2, a5, a2 |
| ; RV32IM-NEXT: mul a5, t1, a1 |
| ; RV32IM-NEXT: mul a4, a0, a4 |
| ; RV32IM-NEXT: mul t1, t1, t0 |
| ; RV32IM-NEXT: mul a1, a0, a1 |
| ; RV32IM-NEXT: mul a0, a0, t0 |
| ; RV32IM-NEXT: xor a6, a7, a6 |
| ; RV32IM-NEXT: or a2, a2, a3 |
| ; RV32IM-NEXT: xor a4, a5, a4 |
| ; RV32IM-NEXT: or a3, a6, t1 |
| ; RV32IM-NEXT: xor a2, a2, a4 |
| ; RV32IM-NEXT: xor a1, a3, a1 |
| ; RV32IM-NEXT: or a0, a2, a0 |
| ; RV32IM-NEXT: or a0, a0, a1 |
| ; RV32IM-NEXT: srli a0, a0, 4 |
| ; RV32IM-NEXT: ret |
| ; |
| ; RV64IM-LABEL: clmulh_i4: |
| ; RV64IM: # %bb.0: |
| ; RV64IM-NEXT: andi a2, a0, 8 |
| ; RV64IM-NEXT: andi a3, a1, 8 |
| ; RV64IM-NEXT: andi a4, a1, 1 |
| ; RV64IM-NEXT: andi a5, a0, 2 |
| ; RV64IM-NEXT: andi a6, a1, 2 |
| ; RV64IM-NEXT: andi a7, a0, 1 |
| ; RV64IM-NEXT: mul t0, a5, a4 |
| ; RV64IM-NEXT: mul t1, a7, a6 |
| ; RV64IM-NEXT: andi a0, a0, 4 |
| ; RV64IM-NEXT: andi a1, a1, 4 |
| ; RV64IM-NEXT: mul a5, a5, a3 |
| ; RV64IM-NEXT: mul a4, a7, a4 |
| ; RV64IM-NEXT: mul a7, a0, a1 |
| ; RV64IM-NEXT: mul a6, a2, a6 |
| ; RV64IM-NEXT: mul a0, a0, a3 |
| ; RV64IM-NEXT: mul a1, a2, a1 |
| ; RV64IM-NEXT: mul a2, a2, a3 |
| ; RV64IM-NEXT: xor a3, t1, t0 |
| ; RV64IM-NEXT: or a4, a4, a5 |
| ; RV64IM-NEXT: xor a5, a7, a6 |
| ; RV64IM-NEXT: or a0, a3, a0 |
| ; RV64IM-NEXT: xor a4, a4, a5 |
| ; RV64IM-NEXT: xor a0, a0, a1 |
| ; RV64IM-NEXT: or a2, a4, a2 |
| ; RV64IM-NEXT: or a0, a2, a0 |
| ; RV64IM-NEXT: srli a0, a0, 4 |
| ; RV64IM-NEXT: ret |
| ; |
| ; RV32IMZBS-LABEL: clmulh_i4: |
| ; RV32IMZBS: # %bb.0: |
| ; RV32IMZBS-NEXT: andi a2, a1, 1 |
| ; RV32IMZBS-NEXT: andi a3, a0, 2 |
| ; RV32IMZBS-NEXT: andi a4, a1, 2 |
| ; RV32IMZBS-NEXT: andi a5, a0, 1 |
| ; RV32IMZBS-NEXT: mul a6, a3, a2 |
| ; RV32IMZBS-NEXT: mul a7, a5, a4 |
| ; RV32IMZBS-NEXT: andi t0, a1, 8 |
| ; RV32IMZBS-NEXT: andi t1, a0, 4 |
| ; RV32IMZBS-NEXT: andi a1, a1, 4 |
| ; RV32IMZBS-NEXT: andi a0, a0, 8 |
| ; RV32IMZBS-NEXT: mul a3, a3, t0 |
| ; RV32IMZBS-NEXT: mul a2, a5, a2 |
| ; RV32IMZBS-NEXT: mul a5, t1, a1 |
| ; RV32IMZBS-NEXT: mul a4, a0, a4 |
| ; RV32IMZBS-NEXT: mul t1, t1, t0 |
| ; RV32IMZBS-NEXT: mul a1, a0, a1 |
| ; RV32IMZBS-NEXT: mul a0, a0, t0 |
| ; RV32IMZBS-NEXT: xor a6, a7, a6 |
| ; RV32IMZBS-NEXT: or a2, a2, a3 |
| ; RV32IMZBS-NEXT: xor a4, a5, a4 |
| ; RV32IMZBS-NEXT: or a3, a6, t1 |
| ; RV32IMZBS-NEXT: xor a2, a2, a4 |
| ; RV32IMZBS-NEXT: xor a1, a3, a1 |
| ; RV32IMZBS-NEXT: or a0, a2, a0 |
| ; RV32IMZBS-NEXT: or a0, a0, a1 |
| ; RV32IMZBS-NEXT: srli a0, a0, 4 |
| ; RV32IMZBS-NEXT: ret |
| ; |
| ; RV64IMZBS-LABEL: clmulh_i4: |
| ; RV64IMZBS: # %bb.0: |
| ; RV64IMZBS-NEXT: andi a2, a0, 8 |
| ; RV64IMZBS-NEXT: andi a3, a1, 8 |
| ; RV64IMZBS-NEXT: andi a4, a1, 1 |
| ; RV64IMZBS-NEXT: andi a5, a0, 2 |
| ; RV64IMZBS-NEXT: andi a6, a1, 2 |
| ; RV64IMZBS-NEXT: andi a7, a0, 1 |
| ; RV64IMZBS-NEXT: mul t0, a5, a4 |
| ; RV64IMZBS-NEXT: mul t1, a7, a6 |
| ; RV64IMZBS-NEXT: andi a0, a0, 4 |
| ; RV64IMZBS-NEXT: andi a1, a1, 4 |
| ; RV64IMZBS-NEXT: mul a5, a5, a3 |
| ; RV64IMZBS-NEXT: mul a4, a7, a4 |
| ; RV64IMZBS-NEXT: mul a7, a0, a1 |
| ; RV64IMZBS-NEXT: mul a6, a2, a6 |
| ; RV64IMZBS-NEXT: mul a0, a0, a3 |
| ; RV64IMZBS-NEXT: mul a1, a2, a1 |
| ; RV64IMZBS-NEXT: mul a2, a2, a3 |
| ; RV64IMZBS-NEXT: xor a3, t1, t0 |
| ; RV64IMZBS-NEXT: or a4, a4, a5 |
| ; RV64IMZBS-NEXT: xor a5, a7, a6 |
| ; RV64IMZBS-NEXT: or a0, a3, a0 |
| ; RV64IMZBS-NEXT: xor a4, a4, a5 |
| ; RV64IMZBS-NEXT: xor a0, a0, a1 |
| ; RV64IMZBS-NEXT: or a2, a4, a2 |
| ; RV64IMZBS-NEXT: or a0, a2, a0 |
| ; RV64IMZBS-NEXT: srli a0, a0, 4 |
| ; RV64IMZBS-NEXT: ret |
| %a.ext = zext i4 %a to i8 |
| %b.ext = zext i4 %b to i8 |
| %clmul = call i8 @llvm.clmul.i8(i8 %a.ext, i8 %b.ext) |
| %res.ext = lshr i8 %clmul, 4 |
| %res = trunc i8 %res.ext to i4 |
| ret i4 %res |
| } |
| |
| define i4 @clmulh_i4_bitreverse(i4 %a, i4 %b) nounwind { |
| ; CHECK-I-LABEL: clmulh_i4_bitreverse: |
| ; CHECK-I: # %bb.0: |
| ; CHECK-I-NEXT: andi a2, a1, 4 |
| ; CHECK-I-NEXT: andi a0, a0, 15 |
| ; CHECK-I-NEXT: seqz a2, a2 |
| ; CHECK-I-NEXT: slli a3, a0, 2 |
| ; CHECK-I-NEXT: addi a2, a2, -1 |
| ; CHECK-I-NEXT: andi a4, a1, 2 |
| ; CHECK-I-NEXT: and a2, a2, a3 |
| ; CHECK-I-NEXT: slli a3, a0, 1 |
| ; CHECK-I-NEXT: seqz a4, a4 |
| ; CHECK-I-NEXT: addi a4, a4, -1 |
| ; CHECK-I-NEXT: andi a1, a1, 8 |
| ; CHECK-I-NEXT: and a3, a4, a3 |
| ; CHECK-I-NEXT: seqz a1, a1 |
| ; CHECK-I-NEXT: slli a0, a0, 3 |
| ; CHECK-I-NEXT: addi a1, a1, -1 |
| ; CHECK-I-NEXT: xor a2, a3, a2 |
| ; CHECK-I-NEXT: and a0, a1, a0 |
| ; CHECK-I-NEXT: xor a0, a2, a0 |
| ; CHECK-I-NEXT: srli a0, a0, 4 |
| ; CHECK-I-NEXT: ret |
| ; |
| ; RV32IM-LABEL: clmulh_i4_bitreverse: |
| ; RV32IM: # %bb.0: |
| ; RV32IM-NEXT: andi a2, a1, 1 |
| ; RV32IM-NEXT: andi a3, a0, 2 |
| ; RV32IM-NEXT: andi a4, a1, 2 |
| ; RV32IM-NEXT: andi a5, a0, 1 |
| ; RV32IM-NEXT: mul a6, a3, a2 |
| ; RV32IM-NEXT: mul a7, a5, a4 |
| ; RV32IM-NEXT: andi t0, a1, 8 |
| ; RV32IM-NEXT: andi t1, a0, 4 |
| ; RV32IM-NEXT: andi a1, a1, 4 |
| ; RV32IM-NEXT: andi a0, a0, 8 |
| ; RV32IM-NEXT: mul a3, a3, t0 |
| ; RV32IM-NEXT: mul a2, a5, a2 |
| ; RV32IM-NEXT: mul a5, t1, a1 |
| ; RV32IM-NEXT: mul a4, a0, a4 |
| ; RV32IM-NEXT: mul t1, t1, t0 |
| ; RV32IM-NEXT: mul a1, a0, a1 |
| ; RV32IM-NEXT: mul a0, a0, t0 |
| ; RV32IM-NEXT: xor a6, a7, a6 |
| ; RV32IM-NEXT: or a2, a2, a3 |
| ; RV32IM-NEXT: xor a4, a5, a4 |
| ; RV32IM-NEXT: or a3, a6, t1 |
| ; RV32IM-NEXT: xor a2, a2, a4 |
| ; RV32IM-NEXT: xor a1, a3, a1 |
| ; RV32IM-NEXT: or a0, a2, a0 |
| ; RV32IM-NEXT: or a0, a0, a1 |
| ; RV32IM-NEXT: srli a0, a0, 4 |
| ; RV32IM-NEXT: ret |
| ; |
| ; RV64IM-LABEL: clmulh_i4_bitreverse: |
| ; RV64IM: # %bb.0: |
| ; RV64IM-NEXT: andi a2, a0, 8 |
| ; RV64IM-NEXT: andi a3, a1, 8 |
| ; RV64IM-NEXT: andi a4, a1, 1 |
| ; RV64IM-NEXT: andi a5, a0, 2 |
| ; RV64IM-NEXT: andi a6, a1, 2 |
| ; RV64IM-NEXT: andi a7, a0, 1 |
| ; RV64IM-NEXT: mul t0, a5, a4 |
| ; RV64IM-NEXT: mul t1, a7, a6 |
| ; RV64IM-NEXT: andi a0, a0, 4 |
| ; RV64IM-NEXT: andi a1, a1, 4 |
| ; RV64IM-NEXT: mul a5, a5, a3 |
| ; RV64IM-NEXT: mul a4, a7, a4 |
| ; RV64IM-NEXT: mul a7, a0, a1 |
| ; RV64IM-NEXT: mul a6, a2, a6 |
| ; RV64IM-NEXT: mul a0, a0, a3 |
| ; RV64IM-NEXT: mul a1, a2, a1 |
| ; RV64IM-NEXT: mul a2, a2, a3 |
| ; RV64IM-NEXT: xor a3, t1, t0 |
| ; RV64IM-NEXT: or a4, a4, a5 |
| ; RV64IM-NEXT: xor a5, a7, a6 |
| ; RV64IM-NEXT: or a0, a3, a0 |
| ; RV64IM-NEXT: xor a4, a4, a5 |
| ; RV64IM-NEXT: xor a0, a0, a1 |
| ; RV64IM-NEXT: or a2, a4, a2 |
| ; RV64IM-NEXT: or a0, a2, a0 |
| ; RV64IM-NEXT: srli a0, a0, 4 |
| ; RV64IM-NEXT: ret |
| ; |
| ; RV32IMZBS-LABEL: clmulh_i4_bitreverse: |
| ; RV32IMZBS: # %bb.0: |
| ; RV32IMZBS-NEXT: andi a2, a1, 1 |
| ; RV32IMZBS-NEXT: andi a3, a0, 2 |
| ; RV32IMZBS-NEXT: andi a4, a1, 2 |
| ; RV32IMZBS-NEXT: andi a5, a0, 1 |
| ; RV32IMZBS-NEXT: mul a6, a3, a2 |
| ; RV32IMZBS-NEXT: mul a7, a5, a4 |
| ; RV32IMZBS-NEXT: andi t0, a1, 8 |
| ; RV32IMZBS-NEXT: andi t1, a0, 4 |
| ; RV32IMZBS-NEXT: andi a1, a1, 4 |
| ; RV32IMZBS-NEXT: andi a0, a0, 8 |
| ; RV32IMZBS-NEXT: mul a3, a3, t0 |
| ; RV32IMZBS-NEXT: mul a2, a5, a2 |
| ; RV32IMZBS-NEXT: mul a5, t1, a1 |
| ; RV32IMZBS-NEXT: mul a4, a0, a4 |
| ; RV32IMZBS-NEXT: mul t1, t1, t0 |
| ; RV32IMZBS-NEXT: mul a1, a0, a1 |
| ; RV32IMZBS-NEXT: mul a0, a0, t0 |
| ; RV32IMZBS-NEXT: xor a6, a7, a6 |
| ; RV32IMZBS-NEXT: or a2, a2, a3 |
| ; RV32IMZBS-NEXT: xor a4, a5, a4 |
| ; RV32IMZBS-NEXT: or a3, a6, t1 |
| ; RV32IMZBS-NEXT: xor a2, a2, a4 |
| ; RV32IMZBS-NEXT: xor a1, a3, a1 |
| ; RV32IMZBS-NEXT: or a0, a2, a0 |
| ; RV32IMZBS-NEXT: or a0, a0, a1 |
| ; RV32IMZBS-NEXT: srli a0, a0, 4 |
| ; RV32IMZBS-NEXT: ret |
| ; |
| ; RV64IMZBS-LABEL: clmulh_i4_bitreverse: |
| ; RV64IMZBS: # %bb.0: |
| ; RV64IMZBS-NEXT: andi a2, a0, 8 |
| ; RV64IMZBS-NEXT: andi a3, a1, 8 |
| ; RV64IMZBS-NEXT: andi a4, a1, 1 |
| ; RV64IMZBS-NEXT: andi a5, a0, 2 |
| ; RV64IMZBS-NEXT: andi a6, a1, 2 |
| ; RV64IMZBS-NEXT: andi a7, a0, 1 |
| ; RV64IMZBS-NEXT: mul t0, a5, a4 |
| ; RV64IMZBS-NEXT: mul t1, a7, a6 |
| ; RV64IMZBS-NEXT: andi a0, a0, 4 |
| ; RV64IMZBS-NEXT: andi a1, a1, 4 |
| ; RV64IMZBS-NEXT: mul a5, a5, a3 |
| ; RV64IMZBS-NEXT: mul a4, a7, a4 |
| ; RV64IMZBS-NEXT: mul a7, a0, a1 |
| ; RV64IMZBS-NEXT: mul a6, a2, a6 |
| ; RV64IMZBS-NEXT: mul a0, a0, a3 |
| ; RV64IMZBS-NEXT: mul a1, a2, a1 |
| ; RV64IMZBS-NEXT: mul a2, a2, a3 |
| ; RV64IMZBS-NEXT: xor a3, t1, t0 |
| ; RV64IMZBS-NEXT: or a4, a4, a5 |
| ; RV64IMZBS-NEXT: xor a5, a7, a6 |
| ; RV64IMZBS-NEXT: or a0, a3, a0 |
| ; RV64IMZBS-NEXT: xor a4, a4, a5 |
| ; RV64IMZBS-NEXT: xor a0, a0, a1 |
| ; RV64IMZBS-NEXT: or a2, a4, a2 |
| ; RV64IMZBS-NEXT: or a0, a2, a0 |
| ; RV64IMZBS-NEXT: srli a0, a0, 4 |
| ; RV64IMZBS-NEXT: ret |
| %a.rev = call i4 @llvm.bitreverse.i4(i4 %a) |
| %b.rev = call i4 @llvm.bitreverse.i4(i4 %b) |
| %clmul = call i4 @llvm.clmul.i4(i4 %a.rev, i4 %b.rev) |
| %clmul.rev = call i4 @llvm.bitreverse.i4(i4 %clmul) |
| %res = lshr i4 %clmul.rev, 1 |
| ret i4 %res |
| } |
| |
| |
| define i8 @clmulh_i8(i8 %a, i8 %b) nounwind { |
| ; CHECK-I-LABEL: clmulh_i8: |
| ; CHECK-I: # %bb.0: |
| ; CHECK-I-NEXT: zext.b a0, a0 |
| ; CHECK-I-NEXT: andi a2, a1, 2 |
| ; CHECK-I-NEXT: andi a3, a1, 1 |
| ; CHECK-I-NEXT: seqz a2, a2 |
| ; CHECK-I-NEXT: slli a4, a0, 1 |
| ; CHECK-I-NEXT: addi a2, a2, -1 |
| ; CHECK-I-NEXT: seqz a3, a3 |
| ; CHECK-I-NEXT: and a2, a2, a4 |
| ; CHECK-I-NEXT: addi a3, a3, -1 |
| ; CHECK-I-NEXT: andi a4, a1, 4 |
| ; CHECK-I-NEXT: slli a5, a0, 2 |
| ; CHECK-I-NEXT: seqz a4, a4 |
| ; CHECK-I-NEXT: addi a4, a4, -1 |
| ; CHECK-I-NEXT: andi a6, a1, 8 |
| ; CHECK-I-NEXT: and a4, a4, a5 |
| ; CHECK-I-NEXT: seqz a5, a6 |
| ; CHECK-I-NEXT: slli a6, a0, 3 |
| ; CHECK-I-NEXT: addi a5, a5, -1 |
| ; CHECK-I-NEXT: and a5, a5, a6 |
| ; CHECK-I-NEXT: and a3, a3, a0 |
| ; CHECK-I-NEXT: xor a2, a3, a2 |
| ; CHECK-I-NEXT: xor a4, a4, a5 |
| ; CHECK-I-NEXT: xor a2, a2, a4 |
| ; CHECK-I-NEXT: andi a3, a1, 16 |
| ; CHECK-I-NEXT: slli a4, a0, 4 |
| ; CHECK-I-NEXT: seqz a3, a3 |
| ; CHECK-I-NEXT: addi a3, a3, -1 |
| ; CHECK-I-NEXT: andi a5, a1, 32 |
| ; CHECK-I-NEXT: and a3, a3, a4 |
| ; CHECK-I-NEXT: seqz a4, a5 |
| ; CHECK-I-NEXT: slli a5, a0, 5 |
| ; CHECK-I-NEXT: addi a4, a4, -1 |
| ; CHECK-I-NEXT: and a4, a4, a5 |
| ; CHECK-I-NEXT: andi a5, a1, 64 |
| ; CHECK-I-NEXT: xor a3, a3, a4 |
| ; CHECK-I-NEXT: seqz a4, a5 |
| ; CHECK-I-NEXT: slli a5, a0, 6 |
| ; CHECK-I-NEXT: addi a4, a4, -1 |
| ; CHECK-I-NEXT: and a4, a4, a5 |
| ; CHECK-I-NEXT: andi a1, a1, 128 |
| ; CHECK-I-NEXT: xor a3, a3, a4 |
| ; CHECK-I-NEXT: seqz a1, a1 |
| ; CHECK-I-NEXT: slli a0, a0, 7 |
| ; CHECK-I-NEXT: addi a1, a1, -1 |
| ; CHECK-I-NEXT: xor a2, a2, a3 |
| ; CHECK-I-NEXT: and a0, a1, a0 |
| ; CHECK-I-NEXT: xor a0, a2, a0 |
| ; CHECK-I-NEXT: srli a0, a0, 8 |
| ; CHECK-I-NEXT: ret |
| ; |
| ; RV32IM-LABEL: clmulh_i8: |
| ; RV32IM: # %bb.0: |
| ; RV32IM-NEXT: andi a2, a1, 17 |
| ; RV32IM-NEXT: andi a3, a0, 34 |
| ; RV32IM-NEXT: andi a4, a1, 34 |
| ; RV32IM-NEXT: andi a5, a0, 17 |
| ; RV32IM-NEXT: mul a6, a3, a2 |
| ; RV32IM-NEXT: mul a7, a5, a4 |
| ; RV32IM-NEXT: andi t0, a1, 136 |
| ; RV32IM-NEXT: andi t1, a0, 68 |
| ; RV32IM-NEXT: andi a1, a1, 68 |
| ; RV32IM-NEXT: andi a0, a0, 136 |
| ; RV32IM-NEXT: mul t2, t1, t0 |
| ; RV32IM-NEXT: mul t3, a0, a1 |
| ; RV32IM-NEXT: mul t4, a3, t0 |
| ; RV32IM-NEXT: mul t5, a5, a2 |
| ; RV32IM-NEXT: xor a6, a7, a6 |
| ; RV32IM-NEXT: xor a7, t2, t3 |
| ; RV32IM-NEXT: mul t2, t1, a1 |
| ; RV32IM-NEXT: xor a6, a6, a7 |
| ; RV32IM-NEXT: mul a7, a0, a4 |
| ; RV32IM-NEXT: mul t3, a3, a4 |
| ; RV32IM-NEXT: mul t6, a5, a1 |
| ; RV32IM-NEXT: mul a1, a3, a1 |
| ; RV32IM-NEXT: mul a3, t1, a2 |
| ; RV32IM-NEXT: mul a5, a5, t0 |
| ; RV32IM-NEXT: mul t0, a0, t0 |
| ; RV32IM-NEXT: mul a4, t1, a4 |
| ; RV32IM-NEXT: li t1, 17 |
| ; RV32IM-NEXT: mul a0, a0, a2 |
| ; RV32IM-NEXT: slli a2, t1, 9 |
| ; RV32IM-NEXT: and a2, a6, a2 |
| ; RV32IM-NEXT: xor a6, t5, t4 |
| ; RV32IM-NEXT: xor a7, t2, a7 |
| ; RV32IM-NEXT: xor a6, a6, a7 |
| ; RV32IM-NEXT: slli a7, t1, 8 |
| ; RV32IM-NEXT: xor t2, t6, t3 |
| ; RV32IM-NEXT: xor a3, a3, t0 |
| ; RV32IM-NEXT: and a6, a6, a7 |
| ; RV32IM-NEXT: xor a3, t2, a3 |
| ; RV32IM-NEXT: xor a1, a5, a1 |
| ; RV32IM-NEXT: xor a0, a4, a0 |
| ; RV32IM-NEXT: slli t1, t1, 10 |
| ; RV32IM-NEXT: xor a0, a1, a0 |
| ; RV32IM-NEXT: and a1, a3, t1 |
| ; RV32IM-NEXT: andi a0, a0, -2048 |
| ; RV32IM-NEXT: or a2, a6, a2 |
| ; RV32IM-NEXT: or a0, a1, a0 |
| ; RV32IM-NEXT: or a0, a2, a0 |
| ; RV32IM-NEXT: srli a0, a0, 8 |
| ; RV32IM-NEXT: ret |
| ; |
| ; RV64IM-LABEL: clmulh_i8: |
| ; RV64IM: # %bb.0: |
| ; RV64IM-NEXT: addi sp, sp, -32 |
| ; RV64IM-NEXT: sd s0, 24(sp) # 8-byte Folded Spill |
| ; RV64IM-NEXT: sd s1, 16(sp) # 8-byte Folded Spill |
| ; RV64IM-NEXT: sd s2, 8(sp) # 8-byte Folded Spill |
| ; RV64IM-NEXT: andi a2, a0, 136 |
| ; RV64IM-NEXT: andi a3, a1, 136 |
| ; RV64IM-NEXT: andi a4, a1, 17 |
| ; RV64IM-NEXT: andi a5, a0, 34 |
| ; RV64IM-NEXT: andi a6, a1, 34 |
| ; RV64IM-NEXT: andi a7, a0, 17 |
| ; RV64IM-NEXT: mul t0, a5, a4 |
| ; RV64IM-NEXT: mul t1, a7, a6 |
| ; RV64IM-NEXT: andi a0, a0, 68 |
| ; RV64IM-NEXT: andi a1, a1, 68 |
| ; RV64IM-NEXT: mul t2, a0, a3 |
| ; RV64IM-NEXT: mul t3, a2, a1 |
| ; RV64IM-NEXT: li t4, 17 |
| ; RV64IM-NEXT: slli t5, t4, 9 |
| ; RV64IM-NEXT: xor t0, t1, t0 |
| ; RV64IM-NEXT: xor t1, t2, t3 |
| ; RV64IM-NEXT: mul t2, a5, a3 |
| ; RV64IM-NEXT: xor t0, t0, t1 |
| ; RV64IM-NEXT: mul t1, a7, a4 |
| ; RV64IM-NEXT: mul t3, a0, a1 |
| ; RV64IM-NEXT: mul t6, a2, a6 |
| ; RV64IM-NEXT: and t0, t0, t5 |
| ; RV64IM-NEXT: mul t5, a5, a6 |
| ; RV64IM-NEXT: mul s0, a7, a1 |
| ; RV64IM-NEXT: mul s1, a0, a4 |
| ; RV64IM-NEXT: mul s2, a2, a3 |
| ; RV64IM-NEXT: mul a1, a5, a1 |
| ; RV64IM-NEXT: mul a3, a7, a3 |
| ; RV64IM-NEXT: mul a0, a0, a6 |
| ; RV64IM-NEXT: mul a2, a2, a4 |
| ; RV64IM-NEXT: xor a4, t1, t2 |
| ; RV64IM-NEXT: xor a5, t3, t6 |
| ; RV64IM-NEXT: xor a4, a4, a5 |
| ; RV64IM-NEXT: slli a5, t4, 8 |
| ; RV64IM-NEXT: xor a6, s0, t5 |
| ; RV64IM-NEXT: lui a7, %hi(.LCPI2_0) |
| ; RV64IM-NEXT: xor t1, s1, s2 |
| ; RV64IM-NEXT: ld a7, %lo(.LCPI2_0)(a7) |
| ; RV64IM-NEXT: and a4, a4, a5 |
| ; RV64IM-NEXT: xor a5, a6, t1 |
| ; RV64IM-NEXT: xor a1, a3, a1 |
| ; RV64IM-NEXT: xor a0, a0, a2 |
| ; RV64IM-NEXT: slli t4, t4, 10 |
| ; RV64IM-NEXT: xor a0, a1, a0 |
| ; RV64IM-NEXT: and a1, a5, t4 |
| ; RV64IM-NEXT: and a0, a0, a7 |
| ; RV64IM-NEXT: or a2, a4, t0 |
| ; RV64IM-NEXT: or a0, a1, a0 |
| ; RV64IM-NEXT: or a0, a2, a0 |
| ; RV64IM-NEXT: srli a0, a0, 8 |
| ; RV64IM-NEXT: ld s0, 24(sp) # 8-byte Folded Reload |
| ; RV64IM-NEXT: ld s1, 16(sp) # 8-byte Folded Reload |
| ; RV64IM-NEXT: ld s2, 8(sp) # 8-byte Folded Reload |
| ; RV64IM-NEXT: addi sp, sp, 32 |
| ; RV64IM-NEXT: ret |
| ; |
| ; RV32IMZBS-LABEL: clmulh_i8: |
| ; RV32IMZBS: # %bb.0: |
| ; RV32IMZBS-NEXT: andi a2, a1, 17 |
| ; RV32IMZBS-NEXT: andi a3, a0, 34 |
| ; RV32IMZBS-NEXT: andi a4, a1, 34 |
| ; RV32IMZBS-NEXT: andi a5, a0, 17 |
| ; RV32IMZBS-NEXT: mul a6, a3, a2 |
| ; RV32IMZBS-NEXT: mul a7, a5, a4 |
| ; RV32IMZBS-NEXT: andi t0, a1, 136 |
| ; RV32IMZBS-NEXT: andi t1, a0, 68 |
| ; RV32IMZBS-NEXT: andi a1, a1, 68 |
| ; RV32IMZBS-NEXT: andi a0, a0, 136 |
| ; RV32IMZBS-NEXT: mul t2, t1, t0 |
| ; RV32IMZBS-NEXT: mul t3, a0, a1 |
| ; RV32IMZBS-NEXT: mul t4, a3, t0 |
| ; RV32IMZBS-NEXT: mul t5, a5, a2 |
| ; RV32IMZBS-NEXT: xor a6, a7, a6 |
| ; RV32IMZBS-NEXT: xor a7, t2, t3 |
| ; RV32IMZBS-NEXT: mul t2, t1, a1 |
| ; RV32IMZBS-NEXT: xor a6, a6, a7 |
| ; RV32IMZBS-NEXT: mul a7, a0, a4 |
| ; RV32IMZBS-NEXT: mul t3, a3, a4 |
| ; RV32IMZBS-NEXT: mul t6, a5, a1 |
| ; RV32IMZBS-NEXT: mul a1, a3, a1 |
| ; RV32IMZBS-NEXT: mul a3, t1, a2 |
| ; RV32IMZBS-NEXT: mul a5, a5, t0 |
| ; RV32IMZBS-NEXT: mul t0, a0, t0 |
| ; RV32IMZBS-NEXT: mul a4, t1, a4 |
| ; RV32IMZBS-NEXT: li t1, 17 |
| ; RV32IMZBS-NEXT: mul a0, a0, a2 |
| ; RV32IMZBS-NEXT: slli a2, t1, 9 |
| ; RV32IMZBS-NEXT: and a2, a6, a2 |
| ; RV32IMZBS-NEXT: xor a6, t5, t4 |
| ; RV32IMZBS-NEXT: xor a7, t2, a7 |
| ; RV32IMZBS-NEXT: xor a6, a6, a7 |
| ; RV32IMZBS-NEXT: slli a7, t1, 8 |
| ; RV32IMZBS-NEXT: xor t2, t6, t3 |
| ; RV32IMZBS-NEXT: xor a3, a3, t0 |
| ; RV32IMZBS-NEXT: and a6, a6, a7 |
| ; RV32IMZBS-NEXT: xor a3, t2, a3 |
| ; RV32IMZBS-NEXT: xor a1, a5, a1 |
| ; RV32IMZBS-NEXT: xor a0, a4, a0 |
| ; RV32IMZBS-NEXT: slli t1, t1, 10 |
| ; RV32IMZBS-NEXT: xor a0, a1, a0 |
| ; RV32IMZBS-NEXT: and a1, a3, t1 |
| ; RV32IMZBS-NEXT: andi a0, a0, -2048 |
| ; RV32IMZBS-NEXT: or a2, a6, a2 |
| ; RV32IMZBS-NEXT: or a0, a1, a0 |
| ; RV32IMZBS-NEXT: or a0, a2, a0 |
| ; RV32IMZBS-NEXT: srli a0, a0, 8 |
| ; RV32IMZBS-NEXT: ret |
| ; |
| ; RV64IMZBS-LABEL: clmulh_i8: |
| ; RV64IMZBS: # %bb.0: |
| ; RV64IMZBS-NEXT: addi sp, sp, -32 |
| ; RV64IMZBS-NEXT: sd s0, 24(sp) # 8-byte Folded Spill |
| ; RV64IMZBS-NEXT: sd s1, 16(sp) # 8-byte Folded Spill |
| ; RV64IMZBS-NEXT: sd s2, 8(sp) # 8-byte Folded Spill |
| ; RV64IMZBS-NEXT: andi a2, a0, 136 |
| ; RV64IMZBS-NEXT: andi a3, a1, 136 |
| ; RV64IMZBS-NEXT: andi a4, a1, 17 |
| ; RV64IMZBS-NEXT: andi a5, a0, 34 |
| ; RV64IMZBS-NEXT: andi a6, a1, 34 |
| ; RV64IMZBS-NEXT: andi a7, a0, 17 |
| ; RV64IMZBS-NEXT: mul t0, a5, a4 |
| ; RV64IMZBS-NEXT: mul t1, a7, a6 |
| ; RV64IMZBS-NEXT: andi a0, a0, 68 |
| ; RV64IMZBS-NEXT: andi a1, a1, 68 |
| ; RV64IMZBS-NEXT: mul t2, a0, a3 |
| ; RV64IMZBS-NEXT: mul t3, a2, a1 |
| ; RV64IMZBS-NEXT: li t4, 17 |
| ; RV64IMZBS-NEXT: slli t5, t4, 9 |
| ; RV64IMZBS-NEXT: xor t0, t1, t0 |
| ; RV64IMZBS-NEXT: xor t1, t2, t3 |
| ; RV64IMZBS-NEXT: mul t2, a5, a3 |
| ; RV64IMZBS-NEXT: xor t0, t0, t1 |
| ; RV64IMZBS-NEXT: mul t1, a7, a4 |
| ; RV64IMZBS-NEXT: mul t3, a0, a1 |
| ; RV64IMZBS-NEXT: mul t6, a2, a6 |
| ; RV64IMZBS-NEXT: and t0, t0, t5 |
| ; RV64IMZBS-NEXT: mul t5, a5, a6 |
| ; RV64IMZBS-NEXT: mul s0, a7, a1 |
| ; RV64IMZBS-NEXT: mul s1, a0, a4 |
| ; RV64IMZBS-NEXT: mul s2, a2, a3 |
| ; RV64IMZBS-NEXT: mul a1, a5, a1 |
| ; RV64IMZBS-NEXT: mul a3, a7, a3 |
| ; RV64IMZBS-NEXT: mul a0, a0, a6 |
| ; RV64IMZBS-NEXT: mul a2, a2, a4 |
| ; RV64IMZBS-NEXT: xor a4, t1, t2 |
| ; RV64IMZBS-NEXT: xor a5, t3, t6 |
| ; RV64IMZBS-NEXT: xor a4, a4, a5 |
| ; RV64IMZBS-NEXT: slli a5, t4, 8 |
| ; RV64IMZBS-NEXT: xor a6, s0, t5 |
| ; RV64IMZBS-NEXT: lui a7, %hi(.LCPI2_0) |
| ; RV64IMZBS-NEXT: xor t1, s1, s2 |
| ; RV64IMZBS-NEXT: ld a7, %lo(.LCPI2_0)(a7) |
| ; RV64IMZBS-NEXT: and a4, a4, a5 |
| ; RV64IMZBS-NEXT: xor a5, a6, t1 |
| ; RV64IMZBS-NEXT: xor a1, a3, a1 |
| ; RV64IMZBS-NEXT: xor a0, a0, a2 |
| ; RV64IMZBS-NEXT: slli t4, t4, 10 |
| ; RV64IMZBS-NEXT: xor a0, a1, a0 |
| ; RV64IMZBS-NEXT: and a1, a5, t4 |
| ; RV64IMZBS-NEXT: and a0, a0, a7 |
| ; RV64IMZBS-NEXT: or a2, a4, t0 |
| ; RV64IMZBS-NEXT: or a0, a1, a0 |
| ; RV64IMZBS-NEXT: or a0, a2, a0 |
| ; RV64IMZBS-NEXT: srli a0, a0, 8 |
| ; RV64IMZBS-NEXT: ld s0, 24(sp) # 8-byte Folded Reload |
| ; RV64IMZBS-NEXT: ld s1, 16(sp) # 8-byte Folded Reload |
| ; RV64IMZBS-NEXT: ld s2, 8(sp) # 8-byte Folded Reload |
| ; RV64IMZBS-NEXT: addi sp, sp, 32 |
| ; RV64IMZBS-NEXT: ret |
| %a.ext = zext i8 %a to i16 |
| %b.ext = zext i8 %b to i16 |
| %clmul = call i16 @llvm.clmul.i16(i16 %a.ext, i16 %b.ext) |
| %res.ext = lshr i16 %clmul, 8 |
| %res = trunc i16 %res.ext to i8 |
| ret i8 %res |
| } |
| |
| define i16 @clmulh_i16(i16 %a, i16 %b) nounwind { |
| ; RV32I-LABEL: clmulh_i16: |
| ; RV32I: # %bb.0: |
| ; RV32I-NEXT: slli a0, a0, 16 |
| ; RV32I-NEXT: andi a2, a1, 2 |
| ; RV32I-NEXT: srli a0, a0, 16 |
| ; RV32I-NEXT: seqz a2, a2 |
| ; RV32I-NEXT: andi a3, a1, 1 |
| ; RV32I-NEXT: slli a4, a0, 1 |
| ; RV32I-NEXT: seqz a3, a3 |
| ; RV32I-NEXT: addi a2, a2, -1 |
| ; RV32I-NEXT: addi a3, a3, -1 |
| ; RV32I-NEXT: and a2, a2, a4 |
| ; RV32I-NEXT: and a3, a3, a0 |
| ; RV32I-NEXT: xor a2, a3, a2 |
| ; RV32I-NEXT: andi a3, a1, 4 |
| ; RV32I-NEXT: slli a4, a0, 2 |
| ; RV32I-NEXT: seqz a3, a3 |
| ; RV32I-NEXT: addi a3, a3, -1 |
| ; RV32I-NEXT: andi a5, a1, 8 |
| ; RV32I-NEXT: and a3, a3, a4 |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: slli a5, a0, 3 |
| ; RV32I-NEXT: addi a4, a4, -1 |
| ; RV32I-NEXT: and a4, a4, a5 |
| ; RV32I-NEXT: andi a5, a1, 16 |
| ; RV32I-NEXT: xor a3, a3, a4 |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: slli a5, a0, 4 |
| ; RV32I-NEXT: addi a4, a4, -1 |
| ; RV32I-NEXT: and a4, a4, a5 |
| ; RV32I-NEXT: andi a5, a1, 32 |
| ; RV32I-NEXT: slli a6, a0, 5 |
| ; RV32I-NEXT: seqz a5, a5 |
| ; RV32I-NEXT: addi a5, a5, -1 |
| ; RV32I-NEXT: andi a7, a1, 64 |
| ; RV32I-NEXT: and a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: slli a7, a0, 6 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: and a5, a6, a7 |
| ; RV32I-NEXT: xor a2, a2, a3 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: andi a3, a1, 128 |
| ; RV32I-NEXT: slli a4, a0, 7 |
| ; RV32I-NEXT: seqz a3, a3 |
| ; RV32I-NEXT: addi a3, a3, -1 |
| ; RV32I-NEXT: andi a5, a1, 256 |
| ; RV32I-NEXT: and a3, a3, a4 |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: slli a5, a0, 8 |
| ; RV32I-NEXT: addi a4, a4, -1 |
| ; RV32I-NEXT: and a4, a4, a5 |
| ; RV32I-NEXT: andi a5, a1, 512 |
| ; RV32I-NEXT: xor a3, a3, a4 |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: slli a5, a0, 9 |
| ; RV32I-NEXT: addi a4, a4, -1 |
| ; RV32I-NEXT: and a4, a4, a5 |
| ; RV32I-NEXT: andi a5, a1, 1024 |
| ; RV32I-NEXT: xor a3, a3, a4 |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: slli a5, a0, 10 |
| ; RV32I-NEXT: addi a4, a4, -1 |
| ; RV32I-NEXT: and a4, a4, a5 |
| ; RV32I-NEXT: li a5, 1 |
| ; RV32I-NEXT: xor a3, a3, a4 |
| ; RV32I-NEXT: slli a5, a5, 11 |
| ; RV32I-NEXT: xor a2, a2, a3 |
| ; RV32I-NEXT: and a5, a1, a5 |
| ; RV32I-NEXT: seqz a3, a5 |
| ; RV32I-NEXT: lui a4, 1 |
| ; RV32I-NEXT: addi a3, a3, -1 |
| ; RV32I-NEXT: and a4, a1, a4 |
| ; RV32I-NEXT: slli a5, a0, 11 |
| ; RV32I-NEXT: seqz a4, a4 |
| ; RV32I-NEXT: and a3, a3, a5 |
| ; RV32I-NEXT: addi a4, a4, -1 |
| ; RV32I-NEXT: slli a5, a0, 12 |
| ; RV32I-NEXT: lui a6, 2 |
| ; RV32I-NEXT: and a4, a4, a5 |
| ; RV32I-NEXT: and a5, a1, a6 |
| ; RV32I-NEXT: xor a3, a3, a4 |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: addi a4, a4, -1 |
| ; RV32I-NEXT: slli a5, a0, 13 |
| ; RV32I-NEXT: and a4, a4, a5 |
| ; RV32I-NEXT: lui a5, 4 |
| ; RV32I-NEXT: xor a3, a3, a4 |
| ; RV32I-NEXT: and a5, a1, a5 |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: lui a5, 8 |
| ; RV32I-NEXT: addi a4, a4, -1 |
| ; RV32I-NEXT: and a1, a1, a5 |
| ; RV32I-NEXT: slli a5, a0, 14 |
| ; RV32I-NEXT: seqz a1, a1 |
| ; RV32I-NEXT: addi a1, a1, -1 |
| ; RV32I-NEXT: slli a0, a0, 15 |
| ; RV32I-NEXT: and a4, a4, a5 |
| ; RV32I-NEXT: and a0, a1, a0 |
| ; RV32I-NEXT: xor a2, a2, a3 |
| ; RV32I-NEXT: xor a0, a4, a0 |
| ; RV32I-NEXT: xor a0, a2, a0 |
| ; RV32I-NEXT: srli a0, a0, 16 |
| ; RV32I-NEXT: ret |
| ; |
| ; RV64I-LABEL: clmulh_i16: |
| ; RV64I: # %bb.0: |
| ; RV64I-NEXT: slli a0, a0, 48 |
| ; RV64I-NEXT: andi a2, a1, 2 |
| ; RV64I-NEXT: srli a0, a0, 48 |
| ; RV64I-NEXT: seqz a2, a2 |
| ; RV64I-NEXT: andi a3, a1, 1 |
| ; RV64I-NEXT: slli a4, a0, 1 |
| ; RV64I-NEXT: seqz a3, a3 |
| ; RV64I-NEXT: addi a2, a2, -1 |
| ; RV64I-NEXT: addi a3, a3, -1 |
| ; RV64I-NEXT: and a2, a2, a4 |
| ; RV64I-NEXT: and a3, a3, a0 |
| ; RV64I-NEXT: xor a2, a3, a2 |
| ; RV64I-NEXT: andi a3, a1, 4 |
| ; RV64I-NEXT: slli a4, a0, 2 |
| ; RV64I-NEXT: seqz a3, a3 |
| ; RV64I-NEXT: addi a3, a3, -1 |
| ; RV64I-NEXT: andi a5, a1, 8 |
| ; RV64I-NEXT: and a3, a3, a4 |
| ; RV64I-NEXT: seqz a4, a5 |
| ; RV64I-NEXT: slli a5, a0, 3 |
| ; RV64I-NEXT: addi a4, a4, -1 |
| ; RV64I-NEXT: and a4, a4, a5 |
| ; RV64I-NEXT: andi a5, a1, 16 |
| ; RV64I-NEXT: xor a3, a3, a4 |
| ; RV64I-NEXT: seqz a4, a5 |
| ; RV64I-NEXT: slli a5, a0, 4 |
| ; RV64I-NEXT: addi a4, a4, -1 |
| ; RV64I-NEXT: and a4, a4, a5 |
| ; RV64I-NEXT: andi a5, a1, 32 |
| ; RV64I-NEXT: slli a6, a0, 5 |
| ; RV64I-NEXT: seqz a5, a5 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: andi a7, a1, 64 |
| ; RV64I-NEXT: and a5, a5, a6 |
| ; RV64I-NEXT: seqz a6, a7 |
| ; RV64I-NEXT: slli a7, a0, 6 |
| ; RV64I-NEXT: addi a6, a6, -1 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: and a5, a6, a7 |
| ; RV64I-NEXT: xor a2, a2, a3 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: xor a2, a2, a4 |
| ; RV64I-NEXT: andi a3, a1, 128 |
| ; RV64I-NEXT: slli a4, a0, 7 |
| ; RV64I-NEXT: seqz a3, a3 |
| ; RV64I-NEXT: addi a3, a3, -1 |
| ; RV64I-NEXT: andi a5, a1, 256 |
| ; RV64I-NEXT: and a3, a3, a4 |
| ; RV64I-NEXT: seqz a4, a5 |
| ; RV64I-NEXT: slli a5, a0, 8 |
| ; RV64I-NEXT: addi a4, a4, -1 |
| ; RV64I-NEXT: and a4, a4, a5 |
| ; RV64I-NEXT: andi a5, a1, 512 |
| ; RV64I-NEXT: xor a3, a3, a4 |
| ; RV64I-NEXT: seqz a4, a5 |
| ; RV64I-NEXT: slli a5, a0, 9 |
| ; RV64I-NEXT: addi a4, a4, -1 |
| ; RV64I-NEXT: and a4, a4, a5 |
| ; RV64I-NEXT: andi a5, a1, 1024 |
| ; RV64I-NEXT: xor a3, a3, a4 |
| ; RV64I-NEXT: seqz a4, a5 |
| ; RV64I-NEXT: slli a5, a0, 10 |
| ; RV64I-NEXT: addi a4, a4, -1 |
| ; RV64I-NEXT: and a4, a4, a5 |
| ; RV64I-NEXT: li a5, 1 |
| ; RV64I-NEXT: xor a3, a3, a4 |
| ; RV64I-NEXT: slli a5, a5, 11 |
| ; RV64I-NEXT: xor a2, a2, a3 |
| ; RV64I-NEXT: and a5, a1, a5 |
| ; RV64I-NEXT: seqz a3, a5 |
| ; RV64I-NEXT: lui a4, 1 |
| ; RV64I-NEXT: addi a3, a3, -1 |
| ; RV64I-NEXT: and a4, a1, a4 |
| ; RV64I-NEXT: slli a5, a0, 11 |
| ; RV64I-NEXT: seqz a4, a4 |
| ; RV64I-NEXT: and a3, a3, a5 |
| ; RV64I-NEXT: addi a4, a4, -1 |
| ; RV64I-NEXT: slli a5, a0, 12 |
| ; RV64I-NEXT: lui a6, 2 |
| ; RV64I-NEXT: and a4, a4, a5 |
| ; RV64I-NEXT: and a5, a1, a6 |
| ; RV64I-NEXT: xor a3, a3, a4 |
| ; RV64I-NEXT: seqz a4, a5 |
| ; RV64I-NEXT: addi a4, a4, -1 |
| ; RV64I-NEXT: slli a5, a0, 13 |
| ; RV64I-NEXT: and a4, a4, a5 |
| ; RV64I-NEXT: lui a5, 4 |
| ; RV64I-NEXT: xor a3, a3, a4 |
| ; RV64I-NEXT: and a5, a1, a5 |
| ; RV64I-NEXT: seqz a4, a5 |
| ; RV64I-NEXT: lui a5, 8 |
| ; RV64I-NEXT: addi a4, a4, -1 |
| ; RV64I-NEXT: and a1, a1, a5 |
| ; RV64I-NEXT: slli a5, a0, 14 |
| ; RV64I-NEXT: seqz a1, a1 |
| ; RV64I-NEXT: addi a1, a1, -1 |
| ; RV64I-NEXT: slli a0, a0, 15 |
| ; RV64I-NEXT: and a4, a4, a5 |
| ; RV64I-NEXT: and a0, a1, a0 |
| ; RV64I-NEXT: xor a2, a2, a3 |
| ; RV64I-NEXT: xor a0, a4, a0 |
| ; RV64I-NEXT: xor a0, a2, a0 |
| ; RV64I-NEXT: srli a0, a0, 16 |
| ; RV64I-NEXT: ret |
| ; |
| ; RV32IM-LABEL: clmulh_i16: |
| ; RV32IM: # %bb.0: |
| ; RV32IM-NEXT: addi sp, sp, -16 |
| ; RV32IM-NEXT: sw s0, 12(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: lui a2, 1 |
| ; RV32IM-NEXT: lui a3, 2 |
| ; RV32IM-NEXT: addi a2, a2, 273 |
| ; RV32IM-NEXT: addi a3, a3, 546 |
| ; RV32IM-NEXT: and a4, a1, a2 |
| ; RV32IM-NEXT: and a5, a0, a3 |
| ; RV32IM-NEXT: and a3, a1, a3 |
| ; RV32IM-NEXT: and a2, a0, a2 |
| ; RV32IM-NEXT: mul a6, a5, a4 |
| ; RV32IM-NEXT: mul a7, a2, a3 |
| ; RV32IM-NEXT: lui t0, 9 |
| ; RV32IM-NEXT: lui t1, 4 |
| ; RV32IM-NEXT: addi t0, t0, -1912 |
| ; RV32IM-NEXT: addi t1, t1, 1092 |
| ; RV32IM-NEXT: and t2, a1, t0 |
| ; RV32IM-NEXT: and t3, a0, t1 |
| ; RV32IM-NEXT: and a1, a1, t1 |
| ; RV32IM-NEXT: and a0, a0, t0 |
| ; RV32IM-NEXT: mul t0, t3, t2 |
| ; RV32IM-NEXT: mul t1, a0, a1 |
| ; RV32IM-NEXT: mul t4, a5, t2 |
| ; RV32IM-NEXT: mul t5, a2, a4 |
| ; RV32IM-NEXT: xor a6, a7, a6 |
| ; RV32IM-NEXT: xor a7, t0, t1 |
| ; RV32IM-NEXT: mul t0, t3, a1 |
| ; RV32IM-NEXT: mul t1, a0, a3 |
| ; RV32IM-NEXT: xor a6, a6, a7 |
| ; RV32IM-NEXT: xor a7, t5, t4 |
| ; RV32IM-NEXT: mul t4, a5, a3 |
| ; RV32IM-NEXT: mul t5, a2, a1 |
| ; RV32IM-NEXT: mul t6, t3, a4 |
| ; RV32IM-NEXT: mul s0, a0, t2 |
| ; RV32IM-NEXT: mul a1, a5, a1 |
| ; RV32IM-NEXT: mul a2, a2, t2 |
| ; RV32IM-NEXT: mul a3, t3, a3 |
| ; RV32IM-NEXT: mul a0, a0, a4 |
| ; RV32IM-NEXT: xor a4, t0, t1 |
| ; RV32IM-NEXT: lui a5, 139808 |
| ; RV32IM-NEXT: xor a4, a7, a4 |
| ; RV32IM-NEXT: lui a7, 69904 |
| ; RV32IM-NEXT: and a5, a6, a5 |
| ; RV32IM-NEXT: and a4, a4, a7 |
| ; RV32IM-NEXT: xor a6, t5, t4 |
| ; RV32IM-NEXT: xor a7, t6, s0 |
| ; RV32IM-NEXT: xor a6, a6, a7 |
| ; RV32IM-NEXT: lui a7, 279616 |
| ; RV32IM-NEXT: xor a1, a2, a1 |
| ; RV32IM-NEXT: xor a0, a3, a0 |
| ; RV32IM-NEXT: xor a0, a1, a0 |
| ; RV32IM-NEXT: lui a1, 34944 |
| ; RV32IM-NEXT: and a2, a6, a7 |
| ; RV32IM-NEXT: and a0, a0, a1 |
| ; RV32IM-NEXT: or a4, a4, a5 |
| ; RV32IM-NEXT: or a0, a2, a0 |
| ; RV32IM-NEXT: or a0, a4, a0 |
| ; RV32IM-NEXT: srli a0, a0, 16 |
| ; RV32IM-NEXT: lw s0, 12(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: addi sp, sp, 16 |
| ; RV32IM-NEXT: ret |
| ; |
| ; RV64IM-LABEL: clmulh_i16: |
| ; RV64IM: # %bb.0: |
| ; RV64IM-NEXT: lui a2, %hi(.LCPI3_0) |
| ; RV64IM-NEXT: lui a3, 1 |
| ; RV64IM-NEXT: lui a4, 2 |
| ; RV64IM-NEXT: addi a5, a3, 273 |
| ; RV64IM-NEXT: addi a4, a4, 546 |
| ; RV64IM-NEXT: and a3, a1, a5 |
| ; RV64IM-NEXT: and a6, a0, a4 |
| ; RV64IM-NEXT: ld a2, %lo(.LCPI3_0)(a2) |
| ; RV64IM-NEXT: mul a7, a6, a3 |
| ; RV64IM-NEXT: and a4, a1, a4 |
| ; RV64IM-NEXT: and a5, a0, a5 |
| ; RV64IM-NEXT: mul t0, a5, a4 |
| ; RV64IM-NEXT: lui t1, 16 |
| ; RV64IM-NEXT: lui t2, 4 |
| ; RV64IM-NEXT: addi t1, t1, -1 |
| ; RV64IM-NEXT: addi t2, t2, 1092 |
| ; RV64IM-NEXT: and t3, a1, t1 |
| ; RV64IM-NEXT: and t4, a0, t2 |
| ; RV64IM-NEXT: and t3, t3, a2 |
| ; RV64IM-NEXT: mul t5, t4, t3 |
| ; RV64IM-NEXT: and a0, a0, t1 |
| ; RV64IM-NEXT: and a1, a1, t2 |
| ; RV64IM-NEXT: and a0, a0, a2 |
| ; RV64IM-NEXT: mul t1, a0, a1 |
| ; RV64IM-NEXT: mul t2, a5, a3 |
| ; RV64IM-NEXT: mul t6, t4, a1 |
| ; RV64IM-NEXT: xor a7, t0, a7 |
| ; RV64IM-NEXT: xor a7, a7, t5 |
| ; RV64IM-NEXT: xor a7, a7, t1 |
| ; RV64IM-NEXT: mul t0, a6, t3 |
| ; RV64IM-NEXT: xor t1, t2, t6 |
| ; RV64IM-NEXT: mul t2, a0, a4 |
| ; RV64IM-NEXT: mul t5, a6, a4 |
| ; RV64IM-NEXT: mul a6, a6, a1 |
| ; RV64IM-NEXT: mul a1, a5, a1 |
| ; RV64IM-NEXT: mul a4, t4, a4 |
| ; RV64IM-NEXT: mul t4, t4, a3 |
| ; RV64IM-NEXT: mul a5, a5, t3 |
| ; RV64IM-NEXT: mul t3, a0, t3 |
| ; RV64IM-NEXT: mul a0, a0, a3 |
| ; RV64IM-NEXT: lui a3, 139808 |
| ; RV64IM-NEXT: and a3, a7, a3 |
| ; RV64IM-NEXT: xor a7, t1, t0 |
| ; RV64IM-NEXT: xor a7, a7, t2 |
| ; RV64IM-NEXT: lui t0, 69904 |
| ; RV64IM-NEXT: and a7, a7, t0 |
| ; RV64IM-NEXT: xor a1, a1, t5 |
| ; RV64IM-NEXT: xor a1, a1, t4 |
| ; RV64IM-NEXT: xor a4, a6, a4 |
| ; RV64IM-NEXT: xor a1, a1, t3 |
| ; RV64IM-NEXT: xor a4, a5, a4 |
| ; RV64IM-NEXT: lui a5, 279616 |
| ; RV64IM-NEXT: xor a0, a4, a0 |
| ; RV64IM-NEXT: and a1, a1, a5 |
| ; RV64IM-NEXT: and a0, a0, a2 |
| ; RV64IM-NEXT: or a2, a7, a3 |
| ; RV64IM-NEXT: or a0, a1, a0 |
| ; RV64IM-NEXT: or a0, a2, a0 |
| ; RV64IM-NEXT: srli a0, a0, 16 |
| ; RV64IM-NEXT: ret |
| ; |
| ; RV32IMZBS-LABEL: clmulh_i16: |
| ; RV32IMZBS: # %bb.0: |
| ; RV32IMZBS-NEXT: addi sp, sp, -16 |
| ; RV32IMZBS-NEXT: sw s0, 12(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: lui a2, 1 |
| ; RV32IMZBS-NEXT: lui a3, 2 |
| ; RV32IMZBS-NEXT: addi a2, a2, 273 |
| ; RV32IMZBS-NEXT: addi a3, a3, 546 |
| ; RV32IMZBS-NEXT: and a4, a1, a2 |
| ; RV32IMZBS-NEXT: and a5, a0, a3 |
| ; RV32IMZBS-NEXT: and a3, a1, a3 |
| ; RV32IMZBS-NEXT: and a2, a0, a2 |
| ; RV32IMZBS-NEXT: mul a6, a5, a4 |
| ; RV32IMZBS-NEXT: mul a7, a2, a3 |
| ; RV32IMZBS-NEXT: lui t0, 9 |
| ; RV32IMZBS-NEXT: lui t1, 4 |
| ; RV32IMZBS-NEXT: addi t0, t0, -1912 |
| ; RV32IMZBS-NEXT: addi t1, t1, 1092 |
| ; RV32IMZBS-NEXT: and t2, a1, t0 |
| ; RV32IMZBS-NEXT: and t3, a0, t1 |
| ; RV32IMZBS-NEXT: and a1, a1, t1 |
| ; RV32IMZBS-NEXT: and a0, a0, t0 |
| ; RV32IMZBS-NEXT: mul t0, t3, t2 |
| ; RV32IMZBS-NEXT: mul t1, a0, a1 |
| ; RV32IMZBS-NEXT: mul t4, a5, t2 |
| ; RV32IMZBS-NEXT: mul t5, a2, a4 |
| ; RV32IMZBS-NEXT: xor a6, a7, a6 |
| ; RV32IMZBS-NEXT: xor a7, t0, t1 |
| ; RV32IMZBS-NEXT: mul t0, t3, a1 |
| ; RV32IMZBS-NEXT: mul t1, a0, a3 |
| ; RV32IMZBS-NEXT: xor a6, a6, a7 |
| ; RV32IMZBS-NEXT: xor a7, t5, t4 |
| ; RV32IMZBS-NEXT: mul t4, a5, a3 |
| ; RV32IMZBS-NEXT: mul t5, a2, a1 |
| ; RV32IMZBS-NEXT: mul t6, t3, a4 |
| ; RV32IMZBS-NEXT: mul s0, a0, t2 |
| ; RV32IMZBS-NEXT: mul a1, a5, a1 |
| ; RV32IMZBS-NEXT: mul a2, a2, t2 |
| ; RV32IMZBS-NEXT: mul a3, t3, a3 |
| ; RV32IMZBS-NEXT: mul a0, a0, a4 |
| ; RV32IMZBS-NEXT: xor a4, t0, t1 |
| ; RV32IMZBS-NEXT: lui a5, 139808 |
| ; RV32IMZBS-NEXT: xor a4, a7, a4 |
| ; RV32IMZBS-NEXT: lui a7, 69904 |
| ; RV32IMZBS-NEXT: and a5, a6, a5 |
| ; RV32IMZBS-NEXT: and a4, a4, a7 |
| ; RV32IMZBS-NEXT: xor a6, t5, t4 |
| ; RV32IMZBS-NEXT: xor a7, t6, s0 |
| ; RV32IMZBS-NEXT: xor a6, a6, a7 |
| ; RV32IMZBS-NEXT: lui a7, 279616 |
| ; RV32IMZBS-NEXT: xor a1, a2, a1 |
| ; RV32IMZBS-NEXT: xor a0, a3, a0 |
| ; RV32IMZBS-NEXT: xor a0, a1, a0 |
| ; RV32IMZBS-NEXT: lui a1, 34944 |
| ; RV32IMZBS-NEXT: and a2, a6, a7 |
| ; RV32IMZBS-NEXT: and a0, a0, a1 |
| ; RV32IMZBS-NEXT: or a4, a4, a5 |
| ; RV32IMZBS-NEXT: or a0, a2, a0 |
| ; RV32IMZBS-NEXT: or a0, a4, a0 |
| ; RV32IMZBS-NEXT: srli a0, a0, 16 |
| ; RV32IMZBS-NEXT: lw s0, 12(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: addi sp, sp, 16 |
| ; RV32IMZBS-NEXT: ret |
| ; |
| ; RV64IMZBS-LABEL: clmulh_i16: |
| ; RV64IMZBS: # %bb.0: |
| ; RV64IMZBS-NEXT: lui a2, %hi(.LCPI3_0) |
| ; RV64IMZBS-NEXT: lui a3, 1 |
| ; RV64IMZBS-NEXT: lui a4, 2 |
| ; RV64IMZBS-NEXT: addi a5, a3, 273 |
| ; RV64IMZBS-NEXT: addi a4, a4, 546 |
| ; RV64IMZBS-NEXT: and a3, a1, a5 |
| ; RV64IMZBS-NEXT: and a6, a0, a4 |
| ; RV64IMZBS-NEXT: ld a2, %lo(.LCPI3_0)(a2) |
| ; RV64IMZBS-NEXT: mul a7, a6, a3 |
| ; RV64IMZBS-NEXT: and a4, a1, a4 |
| ; RV64IMZBS-NEXT: and a5, a0, a5 |
| ; RV64IMZBS-NEXT: mul t0, a5, a4 |
| ; RV64IMZBS-NEXT: lui t1, 16 |
| ; RV64IMZBS-NEXT: lui t2, 4 |
| ; RV64IMZBS-NEXT: addi t1, t1, -1 |
| ; RV64IMZBS-NEXT: addi t2, t2, 1092 |
| ; RV64IMZBS-NEXT: and t3, a1, t1 |
| ; RV64IMZBS-NEXT: and t4, a0, t2 |
| ; RV64IMZBS-NEXT: and t3, t3, a2 |
| ; RV64IMZBS-NEXT: mul t5, t4, t3 |
| ; RV64IMZBS-NEXT: and a0, a0, t1 |
| ; RV64IMZBS-NEXT: and a1, a1, t2 |
| ; RV64IMZBS-NEXT: and a0, a0, a2 |
| ; RV64IMZBS-NEXT: mul t1, a0, a1 |
| ; RV64IMZBS-NEXT: mul t2, a5, a3 |
| ; RV64IMZBS-NEXT: mul t6, t4, a1 |
| ; RV64IMZBS-NEXT: xor a7, t0, a7 |
| ; RV64IMZBS-NEXT: xor a7, a7, t5 |
| ; RV64IMZBS-NEXT: xor a7, a7, t1 |
| ; RV64IMZBS-NEXT: mul t0, a6, t3 |
| ; RV64IMZBS-NEXT: xor t1, t2, t6 |
| ; RV64IMZBS-NEXT: mul t2, a0, a4 |
| ; RV64IMZBS-NEXT: mul t5, a6, a4 |
| ; RV64IMZBS-NEXT: mul a6, a6, a1 |
| ; RV64IMZBS-NEXT: mul a1, a5, a1 |
| ; RV64IMZBS-NEXT: mul a4, t4, a4 |
| ; RV64IMZBS-NEXT: mul t4, t4, a3 |
| ; RV64IMZBS-NEXT: mul a5, a5, t3 |
| ; RV64IMZBS-NEXT: mul t3, a0, t3 |
| ; RV64IMZBS-NEXT: mul a0, a0, a3 |
| ; RV64IMZBS-NEXT: lui a3, 139808 |
| ; RV64IMZBS-NEXT: and a3, a7, a3 |
| ; RV64IMZBS-NEXT: xor a7, t1, t0 |
| ; RV64IMZBS-NEXT: xor a7, a7, t2 |
| ; RV64IMZBS-NEXT: lui t0, 69904 |
| ; RV64IMZBS-NEXT: and a7, a7, t0 |
| ; RV64IMZBS-NEXT: xor a1, a1, t5 |
| ; RV64IMZBS-NEXT: xor a1, a1, t4 |
| ; RV64IMZBS-NEXT: xor a4, a6, a4 |
| ; RV64IMZBS-NEXT: xor a1, a1, t3 |
| ; RV64IMZBS-NEXT: xor a4, a5, a4 |
| ; RV64IMZBS-NEXT: lui a5, 279616 |
| ; RV64IMZBS-NEXT: xor a0, a4, a0 |
| ; RV64IMZBS-NEXT: and a1, a1, a5 |
| ; RV64IMZBS-NEXT: and a0, a0, a2 |
| ; RV64IMZBS-NEXT: or a2, a7, a3 |
| ; RV64IMZBS-NEXT: or a0, a1, a0 |
| ; RV64IMZBS-NEXT: or a0, a2, a0 |
| ; RV64IMZBS-NEXT: srli a0, a0, 16 |
| ; RV64IMZBS-NEXT: ret |
| %a.ext = zext i16 %a to i32 |
| %b.ext = zext i16 %b to i32 |
| %clmul = call i32 @llvm.clmul.i32(i32 %a.ext, i32 %b.ext) |
| %res.ext = lshr i32 %clmul, 16 |
| %res = trunc i32 %res.ext to i16 |
| ret i16 %res |
| } |
| |
| define i32 @clmulh_i32(i32 %a, i32 %b) nounwind { |
| ; RV32I-LABEL: clmulh_i32: |
| ; RV32I: # %bb.0: |
| ; RV32I-NEXT: lui t0, 16 |
| ; RV32I-NEXT: srli a3, a0, 8 |
| ; RV32I-NEXT: addi a2, t0, -256 |
| ; RV32I-NEXT: and a3, a3, a2 |
| ; RV32I-NEXT: srli a4, a0, 24 |
| ; RV32I-NEXT: and a5, a0, a2 |
| ; RV32I-NEXT: slli a5, a5, 8 |
| ; RV32I-NEXT: slli a0, a0, 24 |
| ; RV32I-NEXT: or a3, a3, a4 |
| ; RV32I-NEXT: or a0, a0, a5 |
| ; RV32I-NEXT: or a3, a0, a3 |
| ; RV32I-NEXT: lui a0, 61681 |
| ; RV32I-NEXT: srli a4, a3, 4 |
| ; RV32I-NEXT: addi a0, a0, -241 |
| ; RV32I-NEXT: and a4, a4, a0 |
| ; RV32I-NEXT: and a3, a3, a0 |
| ; RV32I-NEXT: slli a3, a3, 4 |
| ; RV32I-NEXT: lui a5, 209715 |
| ; RV32I-NEXT: or a4, a4, a3 |
| ; RV32I-NEXT: addi a3, a5, 819 |
| ; RV32I-NEXT: srli a5, a4, 2 |
| ; RV32I-NEXT: and a4, a4, a3 |
| ; RV32I-NEXT: and a5, a5, a3 |
| ; RV32I-NEXT: slli a4, a4, 2 |
| ; RV32I-NEXT: or a6, a5, a4 |
| ; RV32I-NEXT: srli a7, a6, 1 |
| ; RV32I-NEXT: lui a5, 349525 |
| ; RV32I-NEXT: addi a4, a5, 1365 |
| ; RV32I-NEXT: srli t1, a1, 8 |
| ; RV32I-NEXT: and a7, a7, a4 |
| ; RV32I-NEXT: and t1, t1, a2 |
| ; RV32I-NEXT: srli t2, a1, 24 |
| ; RV32I-NEXT: and t3, a1, a2 |
| ; RV32I-NEXT: slli t3, t3, 8 |
| ; RV32I-NEXT: slli a1, a1, 24 |
| ; RV32I-NEXT: or t1, t1, t2 |
| ; RV32I-NEXT: or a1, a1, t3 |
| ; RV32I-NEXT: and a6, a6, a4 |
| ; RV32I-NEXT: or a1, a1, t1 |
| ; RV32I-NEXT: srli t1, a1, 4 |
| ; RV32I-NEXT: and a1, a1, a0 |
| ; RV32I-NEXT: and t1, t1, a0 |
| ; RV32I-NEXT: slli a1, a1, 4 |
| ; RV32I-NEXT: slli a6, a6, 1 |
| ; RV32I-NEXT: or a1, t1, a1 |
| ; RV32I-NEXT: srli t1, a1, 2 |
| ; RV32I-NEXT: and a1, a1, a3 |
| ; RV32I-NEXT: and t1, t1, a3 |
| ; RV32I-NEXT: slli t2, a1, 2 |
| ; RV32I-NEXT: or a1, a7, a6 |
| ; RV32I-NEXT: or a6, t1, t2 |
| ; RV32I-NEXT: srli a7, a6, 1 |
| ; RV32I-NEXT: and a6, a6, a4 |
| ; RV32I-NEXT: and a7, a7, a4 |
| ; RV32I-NEXT: slli a6, a6, 1 |
| ; RV32I-NEXT: slli t1, a1, 1 |
| ; RV32I-NEXT: or a7, a7, a6 |
| ; RV32I-NEXT: andi t2, a7, 2 |
| ; RV32I-NEXT: andi t3, a7, 1 |
| ; RV32I-NEXT: seqz t2, t2 |
| ; RV32I-NEXT: seqz t3, t3 |
| ; RV32I-NEXT: addi t2, t2, -1 |
| ; RV32I-NEXT: addi t3, t3, -1 |
| ; RV32I-NEXT: and t1, t2, t1 |
| ; RV32I-NEXT: and t2, t3, a1 |
| ; RV32I-NEXT: slli t3, a1, 2 |
| ; RV32I-NEXT: andi t4, a7, 4 |
| ; RV32I-NEXT: seqz t4, t4 |
| ; RV32I-NEXT: andi t5, a7, 8 |
| ; RV32I-NEXT: addi t4, t4, -1 |
| ; RV32I-NEXT: seqz t5, t5 |
| ; RV32I-NEXT: slli t6, a1, 3 |
| ; RV32I-NEXT: addi t5, t5, -1 |
| ; RV32I-NEXT: and t3, t4, t3 |
| ; RV32I-NEXT: and t4, t5, t6 |
| ; RV32I-NEXT: xor t1, t2, t1 |
| ; RV32I-NEXT: xor t2, t3, t4 |
| ; RV32I-NEXT: xor t1, t1, t2 |
| ; RV32I-NEXT: andi t2, a7, 16 |
| ; RV32I-NEXT: slli t3, a1, 4 |
| ; RV32I-NEXT: seqz t2, t2 |
| ; RV32I-NEXT: addi t2, t2, -1 |
| ; RV32I-NEXT: andi t4, a7, 32 |
| ; RV32I-NEXT: and t2, t2, t3 |
| ; RV32I-NEXT: seqz t3, t4 |
| ; RV32I-NEXT: slli t4, a1, 5 |
| ; RV32I-NEXT: addi t3, t3, -1 |
| ; RV32I-NEXT: and t3, t3, t4 |
| ; RV32I-NEXT: andi t4, a7, 64 |
| ; RV32I-NEXT: xor t2, t2, t3 |
| ; RV32I-NEXT: seqz t3, t4 |
| ; RV32I-NEXT: slli t4, a1, 6 |
| ; RV32I-NEXT: addi t3, t3, -1 |
| ; RV32I-NEXT: and t3, t3, t4 |
| ; RV32I-NEXT: andi t4, a7, 128 |
| ; RV32I-NEXT: xor t2, t2, t3 |
| ; RV32I-NEXT: seqz t3, t4 |
| ; RV32I-NEXT: slli t4, a1, 7 |
| ; RV32I-NEXT: addi t3, t3, -1 |
| ; RV32I-NEXT: and t3, t3, t4 |
| ; RV32I-NEXT: andi t4, a7, 256 |
| ; RV32I-NEXT: slli t5, a1, 8 |
| ; RV32I-NEXT: seqz t4, t4 |
| ; RV32I-NEXT: addi t4, t4, -1 |
| ; RV32I-NEXT: andi t6, a7, 512 |
| ; RV32I-NEXT: and t4, t4, t5 |
| ; RV32I-NEXT: seqz t5, t6 |
| ; RV32I-NEXT: slli t6, a1, 9 |
| ; RV32I-NEXT: addi t5, t5, -1 |
| ; RV32I-NEXT: xor t3, t3, t4 |
| ; RV32I-NEXT: and t4, t5, t6 |
| ; RV32I-NEXT: xor t1, t1, t2 |
| ; RV32I-NEXT: xor t2, t3, t4 |
| ; RV32I-NEXT: slli t3, a1, 10 |
| ; RV32I-NEXT: andi t4, a7, 1024 |
| ; RV32I-NEXT: seqz t4, t4 |
| ; RV32I-NEXT: li t5, 1 |
| ; RV32I-NEXT: addi t4, t4, -1 |
| ; RV32I-NEXT: slli t5, t5, 11 |
| ; RV32I-NEXT: and t3, t4, t3 |
| ; RV32I-NEXT: and t4, a7, t5 |
| ; RV32I-NEXT: xor t2, t2, t3 |
| ; RV32I-NEXT: seqz t3, t4 |
| ; RV32I-NEXT: slli t4, a1, 11 |
| ; RV32I-NEXT: addi t3, t3, -1 |
| ; RV32I-NEXT: and t3, t3, t4 |
| ; RV32I-NEXT: lui t4, 1 |
| ; RV32I-NEXT: slli t5, a1, 12 |
| ; RV32I-NEXT: and t4, a7, t4 |
| ; RV32I-NEXT: seqz t4, t4 |
| ; RV32I-NEXT: lui t6, 2 |
| ; RV32I-NEXT: addi t4, t4, -1 |
| ; RV32I-NEXT: and t6, a7, t6 |
| ; RV32I-NEXT: and t4, t4, t5 |
| ; RV32I-NEXT: seqz t5, t6 |
| ; RV32I-NEXT: slli t6, a1, 13 |
| ; RV32I-NEXT: addi t5, t5, -1 |
| ; RV32I-NEXT: xor t3, t3, t4 |
| ; RV32I-NEXT: and t4, t5, t6 |
| ; RV32I-NEXT: xor t3, t3, t4 |
| ; RV32I-NEXT: lui t4, 4 |
| ; RV32I-NEXT: slli t5, a1, 14 |
| ; RV32I-NEXT: and t4, a7, t4 |
| ; RV32I-NEXT: seqz t4, t4 |
| ; RV32I-NEXT: lui t6, 8 |
| ; RV32I-NEXT: addi t4, t4, -1 |
| ; RV32I-NEXT: and t6, a7, t6 |
| ; RV32I-NEXT: and t4, t4, t5 |
| ; RV32I-NEXT: seqz t5, t6 |
| ; RV32I-NEXT: slli t6, a1, 15 |
| ; RV32I-NEXT: addi t5, t5, -1 |
| ; RV32I-NEXT: xor t3, t3, t4 |
| ; RV32I-NEXT: and t4, t5, t6 |
| ; RV32I-NEXT: xor t1, t1, t2 |
| ; RV32I-NEXT: xor t2, t3, t4 |
| ; RV32I-NEXT: xor t1, t1, t2 |
| ; RV32I-NEXT: slli t2, a1, 16 |
| ; RV32I-NEXT: and t0, a7, t0 |
| ; RV32I-NEXT: lui t3, 32 |
| ; RV32I-NEXT: seqz t0, t0 |
| ; RV32I-NEXT: and t3, a7, t3 |
| ; RV32I-NEXT: addi t0, t0, -1 |
| ; RV32I-NEXT: seqz t3, t3 |
| ; RV32I-NEXT: slli t4, a1, 17 |
| ; RV32I-NEXT: addi t3, t3, -1 |
| ; RV32I-NEXT: and t0, t0, t2 |
| ; RV32I-NEXT: and t2, t3, t4 |
| ; RV32I-NEXT: xor t0, t0, t2 |
| ; RV32I-NEXT: lui t2, 64 |
| ; RV32I-NEXT: slli t3, a1, 18 |
| ; RV32I-NEXT: and t2, a7, t2 |
| ; RV32I-NEXT: seqz t2, t2 |
| ; RV32I-NEXT: lui t4, 128 |
| ; RV32I-NEXT: addi t2, t2, -1 |
| ; RV32I-NEXT: and t4, a7, t4 |
| ; RV32I-NEXT: and t2, t2, t3 |
| ; RV32I-NEXT: seqz t3, t4 |
| ; RV32I-NEXT: slli t4, a1, 19 |
| ; RV32I-NEXT: addi t3, t3, -1 |
| ; RV32I-NEXT: xor t0, t0, t2 |
| ; RV32I-NEXT: and t2, t3, t4 |
| ; RV32I-NEXT: xor t0, t0, t2 |
| ; RV32I-NEXT: lui t2, 256 |
| ; RV32I-NEXT: slli t3, a1, 20 |
| ; RV32I-NEXT: and t2, a7, t2 |
| ; RV32I-NEXT: seqz t2, t2 |
| ; RV32I-NEXT: lui t4, 512 |
| ; RV32I-NEXT: addi t2, t2, -1 |
| ; RV32I-NEXT: and t4, a7, t4 |
| ; RV32I-NEXT: and t2, t2, t3 |
| ; RV32I-NEXT: seqz t3, t4 |
| ; RV32I-NEXT: slli t4, a1, 21 |
| ; RV32I-NEXT: addi t3, t3, -1 |
| ; RV32I-NEXT: xor t0, t0, t2 |
| ; RV32I-NEXT: and t2, t3, t4 |
| ; RV32I-NEXT: xor t0, t0, t2 |
| ; RV32I-NEXT: lui t2, 1024 |
| ; RV32I-NEXT: xor t0, t1, t0 |
| ; RV32I-NEXT: and t1, a7, t2 |
| ; RV32I-NEXT: slli t2, a1, 22 |
| ; RV32I-NEXT: seqz t1, t1 |
| ; RV32I-NEXT: addi t1, t1, -1 |
| ; RV32I-NEXT: lui t3, 2048 |
| ; RV32I-NEXT: and t1, t1, t2 |
| ; RV32I-NEXT: and t2, a7, t3 |
| ; RV32I-NEXT: slli t3, a1, 23 |
| ; RV32I-NEXT: seqz t2, t2 |
| ; RV32I-NEXT: addi t2, t2, -1 |
| ; RV32I-NEXT: lui t4, 4096 |
| ; RV32I-NEXT: and t2, t2, t3 |
| ; RV32I-NEXT: and t3, a7, t4 |
| ; RV32I-NEXT: xor t1, t1, t2 |
| ; RV32I-NEXT: seqz t2, t3 |
| ; RV32I-NEXT: slli t3, a1, 24 |
| ; RV32I-NEXT: addi t2, t2, -1 |
| ; RV32I-NEXT: and t2, t2, t3 |
| ; RV32I-NEXT: lui t3, 8192 |
| ; RV32I-NEXT: xor t1, t1, t2 |
| ; RV32I-NEXT: and t2, a7, t3 |
| ; RV32I-NEXT: slli t3, a1, 25 |
| ; RV32I-NEXT: seqz t2, t2 |
| ; RV32I-NEXT: addi t2, t2, -1 |
| ; RV32I-NEXT: lui t4, 16384 |
| ; RV32I-NEXT: and t2, t2, t3 |
| ; RV32I-NEXT: and t3, a7, t4 |
| ; RV32I-NEXT: xor t1, t1, t2 |
| ; RV32I-NEXT: seqz t2, t3 |
| ; RV32I-NEXT: slli t3, a1, 26 |
| ; RV32I-NEXT: addi t2, t2, -1 |
| ; RV32I-NEXT: and t2, t2, t3 |
| ; RV32I-NEXT: lui t3, 32768 |
| ; RV32I-NEXT: xor t1, t1, t2 |
| ; RV32I-NEXT: and t2, a7, t3 |
| ; RV32I-NEXT: slli t3, a1, 27 |
| ; RV32I-NEXT: seqz t2, t2 |
| ; RV32I-NEXT: addi t2, t2, -1 |
| ; RV32I-NEXT: lui t4, 65536 |
| ; RV32I-NEXT: and t2, t2, t3 |
| ; RV32I-NEXT: and t3, a7, t4 |
| ; RV32I-NEXT: xor t1, t1, t2 |
| ; RV32I-NEXT: seqz t2, t3 |
| ; RV32I-NEXT: slli t3, a1, 28 |
| ; RV32I-NEXT: addi t2, t2, -1 |
| ; RV32I-NEXT: and t2, t2, t3 |
| ; RV32I-NEXT: lui t3, 131072 |
| ; RV32I-NEXT: xor t1, t1, t2 |
| ; RV32I-NEXT: and t2, a7, t3 |
| ; RV32I-NEXT: slli t3, a1, 29 |
| ; RV32I-NEXT: seqz t2, t2 |
| ; RV32I-NEXT: addi t2, t2, -1 |
| ; RV32I-NEXT: lui t4, 262144 |
| ; RV32I-NEXT: and t2, t2, t3 |
| ; RV32I-NEXT: and a7, a7, t4 |
| ; RV32I-NEXT: slli t3, a1, 30 |
| ; RV32I-NEXT: seqz a7, a7 |
| ; RV32I-NEXT: addi a7, a7, -1 |
| ; RV32I-NEXT: srli a6, a6, 31 |
| ; RV32I-NEXT: and a7, a7, t3 |
| ; RV32I-NEXT: seqz a6, a6 |
| ; RV32I-NEXT: slli a1, a1, 31 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: xor a7, t2, a7 |
| ; RV32I-NEXT: and a1, a6, a1 |
| ; RV32I-NEXT: xor a6, t0, t1 |
| ; RV32I-NEXT: xor a1, a7, a1 |
| ; RV32I-NEXT: xor a1, a6, a1 |
| ; RV32I-NEXT: srli a6, a1, 8 |
| ; RV32I-NEXT: and a6, a6, a2 |
| ; RV32I-NEXT: srli a7, a1, 24 |
| ; RV32I-NEXT: and a2, a1, a2 |
| ; RV32I-NEXT: slli a1, a1, 24 |
| ; RV32I-NEXT: slli a2, a2, 8 |
| ; RV32I-NEXT: or a6, a6, a7 |
| ; RV32I-NEXT: or a1, a1, a2 |
| ; RV32I-NEXT: or a1, a1, a6 |
| ; RV32I-NEXT: srli a2, a1, 4 |
| ; RV32I-NEXT: and a1, a1, a0 |
| ; RV32I-NEXT: and a0, a2, a0 |
| ; RV32I-NEXT: slli a1, a1, 4 |
| ; RV32I-NEXT: or a0, a0, a1 |
| ; RV32I-NEXT: srli a1, a0, 2 |
| ; RV32I-NEXT: and a0, a0, a3 |
| ; RV32I-NEXT: and a1, a1, a3 |
| ; RV32I-NEXT: slli a0, a0, 2 |
| ; RV32I-NEXT: or a0, a1, a0 |
| ; RV32I-NEXT: srli a1, a0, 1 |
| ; RV32I-NEXT: addi a2, a5, 1364 |
| ; RV32I-NEXT: and a0, a0, a4 |
| ; RV32I-NEXT: and a1, a1, a2 |
| ; RV32I-NEXT: slli a0, a0, 1 |
| ; RV32I-NEXT: or a0, a1, a0 |
| ; RV32I-NEXT: srli a0, a0, 1 |
| ; RV32I-NEXT: ret |
| ; |
| ; RV64I-LABEL: clmulh_i32: |
| ; RV64I: # %bb.0: |
| ; RV64I-NEXT: slli a0, a0, 32 |
| ; RV64I-NEXT: andi a2, a1, 2 |
| ; RV64I-NEXT: srli a3, a0, 32 |
| ; RV64I-NEXT: srli a4, a0, 31 |
| ; RV64I-NEXT: andi a5, a1, 1 |
| ; RV64I-NEXT: seqz a2, a2 |
| ; RV64I-NEXT: seqz a5, a5 |
| ; RV64I-NEXT: addi a2, a2, -1 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: and a2, a2, a4 |
| ; RV64I-NEXT: and a3, a5, a3 |
| ; RV64I-NEXT: xor a2, a3, a2 |
| ; RV64I-NEXT: srli a3, a0, 30 |
| ; RV64I-NEXT: andi a4, a1, 4 |
| ; RV64I-NEXT: seqz a4, a4 |
| ; RV64I-NEXT: andi a5, a1, 8 |
| ; RV64I-NEXT: addi a4, a4, -1 |
| ; RV64I-NEXT: seqz a5, a5 |
| ; RV64I-NEXT: srli a6, a0, 29 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: and a3, a4, a3 |
| ; RV64I-NEXT: and a4, a5, a6 |
| ; RV64I-NEXT: xor a3, a3, a4 |
| ; RV64I-NEXT: andi a4, a1, 16 |
| ; RV64I-NEXT: xor a2, a2, a3 |
| ; RV64I-NEXT: seqz a3, a4 |
| ; RV64I-NEXT: srli a4, a0, 28 |
| ; RV64I-NEXT: addi a3, a3, -1 |
| ; RV64I-NEXT: and a3, a3, a4 |
| ; RV64I-NEXT: andi a4, a1, 32 |
| ; RV64I-NEXT: srli a5, a0, 27 |
| ; RV64I-NEXT: seqz a4, a4 |
| ; RV64I-NEXT: addi a4, a4, -1 |
| ; RV64I-NEXT: andi a6, a1, 64 |
| ; RV64I-NEXT: and a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a6 |
| ; RV64I-NEXT: srli a6, a0, 26 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: xor a3, a3, a4 |
| ; RV64I-NEXT: and a4, a5, a6 |
| ; RV64I-NEXT: xor a3, a3, a4 |
| ; RV64I-NEXT: andi a4, a1, 128 |
| ; RV64I-NEXT: xor a2, a2, a3 |
| ; RV64I-NEXT: seqz a3, a4 |
| ; RV64I-NEXT: srli a4, a0, 25 |
| ; RV64I-NEXT: addi a3, a3, -1 |
| ; RV64I-NEXT: and a3, a3, a4 |
| ; RV64I-NEXT: andi a4, a1, 256 |
| ; RV64I-NEXT: srli a5, a0, 24 |
| ; RV64I-NEXT: seqz a4, a4 |
| ; RV64I-NEXT: addi a4, a4, -1 |
| ; RV64I-NEXT: andi a6, a1, 512 |
| ; RV64I-NEXT: and a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a6 |
| ; RV64I-NEXT: srli a6, a0, 23 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: xor a3, a3, a4 |
| ; RV64I-NEXT: and a4, a5, a6 |
| ; RV64I-NEXT: xor a3, a3, a4 |
| ; RV64I-NEXT: andi a4, a1, 1024 |
| ; RV64I-NEXT: srli a5, a0, 22 |
| ; RV64I-NEXT: seqz a4, a4 |
| ; RV64I-NEXT: addi a4, a4, -1 |
| ; RV64I-NEXT: li a6, 1 |
| ; RV64I-NEXT: and a4, a4, a5 |
| ; RV64I-NEXT: slli a6, a6, 11 |
| ; RV64I-NEXT: xor a3, a3, a4 |
| ; RV64I-NEXT: and a4, a1, a6 |
| ; RV64I-NEXT: xor a2, a2, a3 |
| ; RV64I-NEXT: seqz a3, a4 |
| ; RV64I-NEXT: addi a3, a3, -1 |
| ; RV64I-NEXT: lui a4, 1 |
| ; RV64I-NEXT: srli a5, a0, 21 |
| ; RV64I-NEXT: and a4, a1, a4 |
| ; RV64I-NEXT: and a3, a3, a5 |
| ; RV64I-NEXT: seqz a4, a4 |
| ; RV64I-NEXT: addi a4, a4, -1 |
| ; RV64I-NEXT: lui a5, 2 |
| ; RV64I-NEXT: srli a6, a0, 20 |
| ; RV64I-NEXT: and a5, a1, a5 |
| ; RV64I-NEXT: and a4, a4, a6 |
| ; RV64I-NEXT: seqz a5, a5 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: srli a6, a0, 19 |
| ; RV64I-NEXT: xor a3, a3, a4 |
| ; RV64I-NEXT: and a4, a5, a6 |
| ; RV64I-NEXT: xor a3, a3, a4 |
| ; RV64I-NEXT: lui a4, 4 |
| ; RV64I-NEXT: xor a2, a2, a3 |
| ; RV64I-NEXT: and a4, a1, a4 |
| ; RV64I-NEXT: seqz a3, a4 |
| ; RV64I-NEXT: lui a4, 8 |
| ; RV64I-NEXT: addi a3, a3, -1 |
| ; RV64I-NEXT: and a4, a1, a4 |
| ; RV64I-NEXT: srli a5, a0, 18 |
| ; RV64I-NEXT: seqz a4, a4 |
| ; RV64I-NEXT: and a3, a3, a5 |
| ; RV64I-NEXT: addi a4, a4, -1 |
| ; RV64I-NEXT: srli a5, a0, 17 |
| ; RV64I-NEXT: lui a6, 16 |
| ; RV64I-NEXT: and a4, a4, a5 |
| ; RV64I-NEXT: and a5, a1, a6 |
| ; RV64I-NEXT: xor a3, a3, a4 |
| ; RV64I-NEXT: seqz a4, a5 |
| ; RV64I-NEXT: addi a4, a4, -1 |
| ; RV64I-NEXT: lui a5, 32 |
| ; RV64I-NEXT: srli a6, a0, 16 |
| ; RV64I-NEXT: and a5, a1, a5 |
| ; RV64I-NEXT: and a4, a4, a6 |
| ; RV64I-NEXT: seqz a5, a5 |
| ; RV64I-NEXT: xor a3, a3, a4 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: srli a4, a0, 15 |
| ; RV64I-NEXT: lui a6, 64 |
| ; RV64I-NEXT: and a4, a5, a4 |
| ; RV64I-NEXT: and a5, a1, a6 |
| ; RV64I-NEXT: xor a3, a3, a4 |
| ; RV64I-NEXT: seqz a4, a5 |
| ; RV64I-NEXT: addi a4, a4, -1 |
| ; RV64I-NEXT: srli a5, a0, 14 |
| ; RV64I-NEXT: and a4, a4, a5 |
| ; RV64I-NEXT: lui a5, 128 |
| ; RV64I-NEXT: xor a3, a3, a4 |
| ; RV64I-NEXT: and a5, a1, a5 |
| ; RV64I-NEXT: xor a2, a2, a3 |
| ; RV64I-NEXT: seqz a3, a5 |
| ; RV64I-NEXT: addi a3, a3, -1 |
| ; RV64I-NEXT: lui a4, 256 |
| ; RV64I-NEXT: srli a5, a0, 13 |
| ; RV64I-NEXT: and a4, a1, a4 |
| ; RV64I-NEXT: and a3, a3, a5 |
| ; RV64I-NEXT: seqz a4, a4 |
| ; RV64I-NEXT: addi a4, a4, -1 |
| ; RV64I-NEXT: lui a5, 512 |
| ; RV64I-NEXT: srli a6, a0, 12 |
| ; RV64I-NEXT: and a5, a1, a5 |
| ; RV64I-NEXT: and a4, a4, a6 |
| ; RV64I-NEXT: seqz a5, a5 |
| ; RV64I-NEXT: xor a3, a3, a4 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: srli a4, a0, 11 |
| ; RV64I-NEXT: lui a6, 1024 |
| ; RV64I-NEXT: and a4, a5, a4 |
| ; RV64I-NEXT: and a5, a1, a6 |
| ; RV64I-NEXT: xor a3, a3, a4 |
| ; RV64I-NEXT: seqz a4, a5 |
| ; RV64I-NEXT: addi a4, a4, -1 |
| ; RV64I-NEXT: lui a5, 2048 |
| ; RV64I-NEXT: srli a6, a0, 10 |
| ; RV64I-NEXT: and a5, a1, a5 |
| ; RV64I-NEXT: and a4, a4, a6 |
| ; RV64I-NEXT: seqz a5, a5 |
| ; RV64I-NEXT: xor a3, a3, a4 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: srli a4, a0, 9 |
| ; RV64I-NEXT: lui a6, 4096 |
| ; RV64I-NEXT: and a4, a5, a4 |
| ; RV64I-NEXT: and a5, a1, a6 |
| ; RV64I-NEXT: xor a3, a3, a4 |
| ; RV64I-NEXT: seqz a4, a5 |
| ; RV64I-NEXT: addi a4, a4, -1 |
| ; RV64I-NEXT: srli a5, a0, 8 |
| ; RV64I-NEXT: and a4, a4, a5 |
| ; RV64I-NEXT: lui a5, 8192 |
| ; RV64I-NEXT: xor a3, a3, a4 |
| ; RV64I-NEXT: and a5, a1, a5 |
| ; RV64I-NEXT: seqz a4, a5 |
| ; RV64I-NEXT: lui a5, 16384 |
| ; RV64I-NEXT: addi a4, a4, -1 |
| ; RV64I-NEXT: and a5, a1, a5 |
| ; RV64I-NEXT: srli a6, a0, 7 |
| ; RV64I-NEXT: seqz a5, a5 |
| ; RV64I-NEXT: and a4, a4, a6 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: srli a6, a0, 6 |
| ; RV64I-NEXT: lui a7, 32768 |
| ; RV64I-NEXT: and a5, a5, a6 |
| ; RV64I-NEXT: and a6, a1, a7 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a6 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: lui a6, 65536 |
| ; RV64I-NEXT: srli a7, a0, 5 |
| ; RV64I-NEXT: and a6, a1, a6 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: seqz a6, a6 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: addi a6, a6, -1 |
| ; RV64I-NEXT: srli a5, a0, 4 |
| ; RV64I-NEXT: lui a7, 131072 |
| ; RV64I-NEXT: and a5, a6, a5 |
| ; RV64I-NEXT: and a6, a1, a7 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a6 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: lui a6, 262144 |
| ; RV64I-NEXT: srli a7, a0, 3 |
| ; RV64I-NEXT: and a6, a1, a6 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: seqz a6, a6 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: addi a6, a6, -1 |
| ; RV64I-NEXT: srli a5, a0, 2 |
| ; RV64I-NEXT: sraiw a1, a1, 31 |
| ; RV64I-NEXT: and a5, a6, a5 |
| ; RV64I-NEXT: seqz a1, a1 |
| ; RV64I-NEXT: srli a0, a0, 1 |
| ; RV64I-NEXT: addi a1, a1, -1 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: and a0, a1, a0 |
| ; RV64I-NEXT: xor a2, a2, a3 |
| ; RV64I-NEXT: xor a0, a4, a0 |
| ; RV64I-NEXT: xor a0, a2, a0 |
| ; RV64I-NEXT: srli a0, a0, 32 |
| ; RV64I-NEXT: ret |
| ; |
| ; RV32IM-LABEL: clmulh_i32: |
| ; RV32IM: # %bb.0: |
| ; RV32IM-NEXT: addi sp, sp, -48 |
| ; RV32IM-NEXT: sw s0, 44(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: sw s1, 40(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: sw s2, 36(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: sw s3, 32(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: sw s4, 28(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: sw s5, 24(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: sw s6, 20(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: sw s7, 16(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: sw s8, 12(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: sw s9, 8(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: sw s10, 4(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: sw s11, 0(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: lui a2, 16 |
| ; RV32IM-NEXT: srli a3, a1, 8 |
| ; RV32IM-NEXT: addi a2, a2, -256 |
| ; RV32IM-NEXT: and a3, a3, a2 |
| ; RV32IM-NEXT: srli a4, a1, 24 |
| ; RV32IM-NEXT: and a5, a1, a2 |
| ; RV32IM-NEXT: slli a5, a5, 8 |
| ; RV32IM-NEXT: slli a1, a1, 24 |
| ; RV32IM-NEXT: or a3, a3, a4 |
| ; RV32IM-NEXT: or a1, a1, a5 |
| ; RV32IM-NEXT: or a3, a1, a3 |
| ; RV32IM-NEXT: lui a1, 61681 |
| ; RV32IM-NEXT: srli a4, a3, 4 |
| ; RV32IM-NEXT: addi a1, a1, -241 |
| ; RV32IM-NEXT: and a4, a4, a1 |
| ; RV32IM-NEXT: and a3, a3, a1 |
| ; RV32IM-NEXT: slli a3, a3, 4 |
| ; RV32IM-NEXT: lui a5, 209715 |
| ; RV32IM-NEXT: or a4, a4, a3 |
| ; RV32IM-NEXT: addi a3, a5, 819 |
| ; RV32IM-NEXT: srli a5, a4, 2 |
| ; RV32IM-NEXT: and a4, a4, a3 |
| ; RV32IM-NEXT: and a5, a5, a3 |
| ; RV32IM-NEXT: slli a4, a4, 2 |
| ; RV32IM-NEXT: or a6, a5, a4 |
| ; RV32IM-NEXT: lui a4, 349525 |
| ; RV32IM-NEXT: srli a7, a6, 1 |
| ; RV32IM-NEXT: addi a5, a4, 1365 |
| ; RV32IM-NEXT: and a7, a7, a5 |
| ; RV32IM-NEXT: srli t0, a0, 8 |
| ; RV32IM-NEXT: and a6, a6, a5 |
| ; RV32IM-NEXT: and t0, t0, a2 |
| ; RV32IM-NEXT: srli t1, a0, 24 |
| ; RV32IM-NEXT: and t2, a0, a2 |
| ; RV32IM-NEXT: slli t2, t2, 8 |
| ; RV32IM-NEXT: slli a0, a0, 24 |
| ; RV32IM-NEXT: or t0, t0, t1 |
| ; RV32IM-NEXT: or a0, a0, t2 |
| ; RV32IM-NEXT: slli a6, a6, 1 |
| ; RV32IM-NEXT: or a0, a0, t0 |
| ; RV32IM-NEXT: srli t0, a0, 4 |
| ; RV32IM-NEXT: and a0, a0, a1 |
| ; RV32IM-NEXT: and t0, t0, a1 |
| ; RV32IM-NEXT: slli a0, a0, 4 |
| ; RV32IM-NEXT: or a6, a7, a6 |
| ; RV32IM-NEXT: or a0, t0, a0 |
| ; RV32IM-NEXT: srli a7, a0, 2 |
| ; RV32IM-NEXT: and a0, a0, a3 |
| ; RV32IM-NEXT: and a7, a7, a3 |
| ; RV32IM-NEXT: slli a0, a0, 2 |
| ; RV32IM-NEXT: lui t0, 69905 |
| ; RV32IM-NEXT: or a7, a7, a0 |
| ; RV32IM-NEXT: addi a0, t0, 273 |
| ; RV32IM-NEXT: srli t0, a7, 1 |
| ; RV32IM-NEXT: and t0, t0, a5 |
| ; RV32IM-NEXT: and a7, a7, a5 |
| ; RV32IM-NEXT: slli a7, a7, 1 |
| ; RV32IM-NEXT: lui t1, 139810 |
| ; RV32IM-NEXT: or a7, t0, a7 |
| ; RV32IM-NEXT: addi t0, t1, 546 |
| ; RV32IM-NEXT: and t1, a6, a0 |
| ; RV32IM-NEXT: and t2, a7, t0 |
| ; RV32IM-NEXT: and t3, a6, t0 |
| ; RV32IM-NEXT: and t4, a7, a0 |
| ; RV32IM-NEXT: mul t5, t2, t1 |
| ; RV32IM-NEXT: mul t6, t4, t3 |
| ; RV32IM-NEXT: lui s0, 559241 |
| ; RV32IM-NEXT: lui s1, 279620 |
| ; RV32IM-NEXT: addi s0, s0, -1912 |
| ; RV32IM-NEXT: addi s1, s1, 1092 |
| ; RV32IM-NEXT: and s2, a6, s0 |
| ; RV32IM-NEXT: and s3, a7, s1 |
| ; RV32IM-NEXT: and a6, a6, s1 |
| ; RV32IM-NEXT: and a7, a7, s0 |
| ; RV32IM-NEXT: mul s4, s3, s2 |
| ; RV32IM-NEXT: mul s5, a7, a6 |
| ; RV32IM-NEXT: mul s6, t2, s2 |
| ; RV32IM-NEXT: mul s7, t4, t1 |
| ; RV32IM-NEXT: mul s8, s3, a6 |
| ; RV32IM-NEXT: mul s9, a7, t3 |
| ; RV32IM-NEXT: mul s10, t2, t3 |
| ; RV32IM-NEXT: mul s11, t4, a6 |
| ; RV32IM-NEXT: mul a6, t2, a6 |
| ; RV32IM-NEXT: mul t2, s3, t1 |
| ; RV32IM-NEXT: mul t4, t4, s2 |
| ; RV32IM-NEXT: mul s2, a7, s2 |
| ; RV32IM-NEXT: mul t3, s3, t3 |
| ; RV32IM-NEXT: mul a7, a7, t1 |
| ; RV32IM-NEXT: xor t1, t6, t5 |
| ; RV32IM-NEXT: xor t5, s4, s5 |
| ; RV32IM-NEXT: xor t6, s7, s6 |
| ; RV32IM-NEXT: xor s3, s8, s9 |
| ; RV32IM-NEXT: xor t1, t1, t5 |
| ; RV32IM-NEXT: xor t5, t6, s3 |
| ; RV32IM-NEXT: and t0, t1, t0 |
| ; RV32IM-NEXT: and a0, t5, a0 |
| ; RV32IM-NEXT: xor t1, s11, s10 |
| ; RV32IM-NEXT: xor t2, t2, s2 |
| ; RV32IM-NEXT: xor a6, t4, a6 |
| ; RV32IM-NEXT: xor a7, t3, a7 |
| ; RV32IM-NEXT: xor t1, t1, t2 |
| ; RV32IM-NEXT: xor a6, a6, a7 |
| ; RV32IM-NEXT: and a7, t1, s1 |
| ; RV32IM-NEXT: and a6, a6, s0 |
| ; RV32IM-NEXT: or a0, a0, t0 |
| ; RV32IM-NEXT: or a6, a7, a6 |
| ; RV32IM-NEXT: or a0, a0, a6 |
| ; RV32IM-NEXT: srli a6, a0, 8 |
| ; RV32IM-NEXT: and a6, a6, a2 |
| ; RV32IM-NEXT: srli a7, a0, 24 |
| ; RV32IM-NEXT: and a2, a0, a2 |
| ; RV32IM-NEXT: slli a0, a0, 24 |
| ; RV32IM-NEXT: slli a2, a2, 8 |
| ; RV32IM-NEXT: or a6, a6, a7 |
| ; RV32IM-NEXT: or a0, a0, a2 |
| ; RV32IM-NEXT: or a0, a0, a6 |
| ; RV32IM-NEXT: srli a2, a0, 4 |
| ; RV32IM-NEXT: and a0, a0, a1 |
| ; RV32IM-NEXT: and a1, a2, a1 |
| ; RV32IM-NEXT: slli a0, a0, 4 |
| ; RV32IM-NEXT: or a0, a1, a0 |
| ; RV32IM-NEXT: srli a1, a0, 2 |
| ; RV32IM-NEXT: and a0, a0, a3 |
| ; RV32IM-NEXT: and a1, a1, a3 |
| ; RV32IM-NEXT: slli a0, a0, 2 |
| ; RV32IM-NEXT: or a0, a1, a0 |
| ; RV32IM-NEXT: srli a1, a0, 1 |
| ; RV32IM-NEXT: addi a2, a4, 1364 |
| ; RV32IM-NEXT: and a0, a0, a5 |
| ; RV32IM-NEXT: and a1, a1, a2 |
| ; RV32IM-NEXT: slli a0, a0, 1 |
| ; RV32IM-NEXT: or a0, a1, a0 |
| ; RV32IM-NEXT: srli a0, a0, 1 |
| ; RV32IM-NEXT: lw s0, 44(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: lw s1, 40(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: lw s2, 36(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: lw s3, 32(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: lw s4, 28(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: lw s5, 24(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: lw s6, 20(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: lw s7, 16(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: lw s8, 12(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: lw s9, 8(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: lw s10, 4(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: lw s11, 0(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: addi sp, sp, 48 |
| ; RV32IM-NEXT: ret |
| ; |
| ; RV64IM-LABEL: clmulh_i32: |
| ; RV64IM: # %bb.0: |
| ; RV64IM-NEXT: addi sp, sp, -32 |
| ; RV64IM-NEXT: sd s0, 24(sp) # 8-byte Folded Spill |
| ; RV64IM-NEXT: sd s1, 16(sp) # 8-byte Folded Spill |
| ; RV64IM-NEXT: sd s2, 8(sp) # 8-byte Folded Spill |
| ; RV64IM-NEXT: lui a2, %hi(.LCPI4_0) |
| ; RV64IM-NEXT: ld a2, %lo(.LCPI4_0)(a2) |
| ; RV64IM-NEXT: lui a3, 69905 |
| ; RV64IM-NEXT: lui a4, 139810 |
| ; RV64IM-NEXT: addi a3, a3, 273 |
| ; RV64IM-NEXT: addi a5, a4, 546 |
| ; RV64IM-NEXT: and a4, a1, a3 |
| ; RV64IM-NEXT: and a6, a0, a5 |
| ; RV64IM-NEXT: and a7, a0, a2 |
| ; RV64IM-NEXT: and t0, a1, a2 |
| ; RV64IM-NEXT: mul t1, a6, a4 |
| ; RV64IM-NEXT: and a5, a1, a5 |
| ; RV64IM-NEXT: and t2, a0, a3 |
| ; RV64IM-NEXT: lui t3, 279620 |
| ; RV64IM-NEXT: mul t4, t2, a5 |
| ; RV64IM-NEXT: addi t3, t3, 1092 |
| ; RV64IM-NEXT: and a0, a0, t3 |
| ; RV64IM-NEXT: slli t0, t0, 32 |
| ; RV64IM-NEXT: srli t5, t0, 32 |
| ; RV64IM-NEXT: slli a7, a7, 32 |
| ; RV64IM-NEXT: and a1, a1, t3 |
| ; RV64IM-NEXT: srli t3, a7, 32 |
| ; RV64IM-NEXT: mul t6, a0, t5 |
| ; RV64IM-NEXT: mul s0, t3, a1 |
| ; RV64IM-NEXT: mul s1, t2, a4 |
| ; RV64IM-NEXT: mul s2, a0, a1 |
| ; RV64IM-NEXT: xor t1, t4, t1 |
| ; RV64IM-NEXT: xor t1, t1, t6 |
| ; RV64IM-NEXT: mul t4, a6, t5 |
| ; RV64IM-NEXT: xor t1, t1, s0 |
| ; RV64IM-NEXT: xor t6, s1, s2 |
| ; RV64IM-NEXT: mul s0, t3, a5 |
| ; RV64IM-NEXT: mul s1, a6, a5 |
| ; RV64IM-NEXT: mul a6, a6, a1 |
| ; RV64IM-NEXT: mul a1, t2, a1 |
| ; RV64IM-NEXT: mul a5, a0, a5 |
| ; RV64IM-NEXT: mul a0, a0, a4 |
| ; RV64IM-NEXT: mulhu a7, a7, t0 |
| ; RV64IM-NEXT: mul t0, t2, t5 |
| ; RV64IM-NEXT: slli t2, a3, 33 |
| ; RV64IM-NEXT: mul a4, t3, a4 |
| ; RV64IM-NEXT: and t1, t1, t2 |
| ; RV64IM-NEXT: xor t2, t6, t4 |
| ; RV64IM-NEXT: xor t2, t2, s0 |
| ; RV64IM-NEXT: slli t3, a3, 32 |
| ; RV64IM-NEXT: and t2, t2, t3 |
| ; RV64IM-NEXT: xor a1, a1, s1 |
| ; RV64IM-NEXT: xor a0, a1, a0 |
| ; RV64IM-NEXT: xor a1, a6, a5 |
| ; RV64IM-NEXT: xor a0, a0, a7 |
| ; RV64IM-NEXT: xor a1, t0, a1 |
| ; RV64IM-NEXT: slli a3, a3, 34 |
| ; RV64IM-NEXT: xor a1, a1, a4 |
| ; RV64IM-NEXT: and a0, a0, a3 |
| ; RV64IM-NEXT: and a1, a1, a2 |
| ; RV64IM-NEXT: or a2, t2, t1 |
| ; RV64IM-NEXT: or a0, a0, a1 |
| ; RV64IM-NEXT: or a0, a2, a0 |
| ; RV64IM-NEXT: srli a0, a0, 32 |
| ; RV64IM-NEXT: ld s0, 24(sp) # 8-byte Folded Reload |
| ; RV64IM-NEXT: ld s1, 16(sp) # 8-byte Folded Reload |
| ; RV64IM-NEXT: ld s2, 8(sp) # 8-byte Folded Reload |
| ; RV64IM-NEXT: addi sp, sp, 32 |
| ; RV64IM-NEXT: ret |
| ; |
| ; RV32IMZBS-LABEL: clmulh_i32: |
| ; RV32IMZBS: # %bb.0: |
| ; RV32IMZBS-NEXT: addi sp, sp, -48 |
| ; RV32IMZBS-NEXT: sw s0, 44(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: sw s1, 40(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: sw s2, 36(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: sw s3, 32(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: sw s4, 28(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: sw s5, 24(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: sw s6, 20(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: sw s7, 16(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: sw s8, 12(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: sw s9, 8(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: sw s10, 4(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: sw s11, 0(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: lui a2, 16 |
| ; RV32IMZBS-NEXT: srli a3, a1, 8 |
| ; RV32IMZBS-NEXT: addi a2, a2, -256 |
| ; RV32IMZBS-NEXT: and a3, a3, a2 |
| ; RV32IMZBS-NEXT: srli a4, a1, 24 |
| ; RV32IMZBS-NEXT: and a5, a1, a2 |
| ; RV32IMZBS-NEXT: slli a5, a5, 8 |
| ; RV32IMZBS-NEXT: slli a1, a1, 24 |
| ; RV32IMZBS-NEXT: or a3, a3, a4 |
| ; RV32IMZBS-NEXT: or a1, a1, a5 |
| ; RV32IMZBS-NEXT: or a3, a1, a3 |
| ; RV32IMZBS-NEXT: lui a1, 61681 |
| ; RV32IMZBS-NEXT: srli a4, a3, 4 |
| ; RV32IMZBS-NEXT: addi a1, a1, -241 |
| ; RV32IMZBS-NEXT: and a4, a4, a1 |
| ; RV32IMZBS-NEXT: and a3, a3, a1 |
| ; RV32IMZBS-NEXT: slli a3, a3, 4 |
| ; RV32IMZBS-NEXT: lui a5, 209715 |
| ; RV32IMZBS-NEXT: or a4, a4, a3 |
| ; RV32IMZBS-NEXT: addi a3, a5, 819 |
| ; RV32IMZBS-NEXT: srli a5, a4, 2 |
| ; RV32IMZBS-NEXT: and a4, a4, a3 |
| ; RV32IMZBS-NEXT: and a5, a5, a3 |
| ; RV32IMZBS-NEXT: slli a4, a4, 2 |
| ; RV32IMZBS-NEXT: or a6, a5, a4 |
| ; RV32IMZBS-NEXT: lui a4, 349525 |
| ; RV32IMZBS-NEXT: srli a7, a6, 1 |
| ; RV32IMZBS-NEXT: addi a5, a4, 1365 |
| ; RV32IMZBS-NEXT: and a7, a7, a5 |
| ; RV32IMZBS-NEXT: srli t0, a0, 8 |
| ; RV32IMZBS-NEXT: and a6, a6, a5 |
| ; RV32IMZBS-NEXT: and t0, t0, a2 |
| ; RV32IMZBS-NEXT: srli t1, a0, 24 |
| ; RV32IMZBS-NEXT: and t2, a0, a2 |
| ; RV32IMZBS-NEXT: slli t2, t2, 8 |
| ; RV32IMZBS-NEXT: slli a0, a0, 24 |
| ; RV32IMZBS-NEXT: or t0, t0, t1 |
| ; RV32IMZBS-NEXT: or a0, a0, t2 |
| ; RV32IMZBS-NEXT: slli a6, a6, 1 |
| ; RV32IMZBS-NEXT: or a0, a0, t0 |
| ; RV32IMZBS-NEXT: srli t0, a0, 4 |
| ; RV32IMZBS-NEXT: and a0, a0, a1 |
| ; RV32IMZBS-NEXT: and t0, t0, a1 |
| ; RV32IMZBS-NEXT: slli a0, a0, 4 |
| ; RV32IMZBS-NEXT: or a6, a7, a6 |
| ; RV32IMZBS-NEXT: or a0, t0, a0 |
| ; RV32IMZBS-NEXT: srli a7, a0, 2 |
| ; RV32IMZBS-NEXT: and a0, a0, a3 |
| ; RV32IMZBS-NEXT: and a7, a7, a3 |
| ; RV32IMZBS-NEXT: slli a0, a0, 2 |
| ; RV32IMZBS-NEXT: lui t0, 69905 |
| ; RV32IMZBS-NEXT: or a7, a7, a0 |
| ; RV32IMZBS-NEXT: addi a0, t0, 273 |
| ; RV32IMZBS-NEXT: srli t0, a7, 1 |
| ; RV32IMZBS-NEXT: and t0, t0, a5 |
| ; RV32IMZBS-NEXT: and a7, a7, a5 |
| ; RV32IMZBS-NEXT: slli a7, a7, 1 |
| ; RV32IMZBS-NEXT: lui t1, 139810 |
| ; RV32IMZBS-NEXT: or a7, t0, a7 |
| ; RV32IMZBS-NEXT: addi t0, t1, 546 |
| ; RV32IMZBS-NEXT: and t1, a6, a0 |
| ; RV32IMZBS-NEXT: and t2, a7, t0 |
| ; RV32IMZBS-NEXT: and t3, a6, t0 |
| ; RV32IMZBS-NEXT: and t4, a7, a0 |
| ; RV32IMZBS-NEXT: mul t5, t2, t1 |
| ; RV32IMZBS-NEXT: mul t6, t4, t3 |
| ; RV32IMZBS-NEXT: lui s0, 559241 |
| ; RV32IMZBS-NEXT: lui s1, 279620 |
| ; RV32IMZBS-NEXT: addi s0, s0, -1912 |
| ; RV32IMZBS-NEXT: addi s1, s1, 1092 |
| ; RV32IMZBS-NEXT: and s2, a6, s0 |
| ; RV32IMZBS-NEXT: and s3, a7, s1 |
| ; RV32IMZBS-NEXT: and a6, a6, s1 |
| ; RV32IMZBS-NEXT: and a7, a7, s0 |
| ; RV32IMZBS-NEXT: mul s4, s3, s2 |
| ; RV32IMZBS-NEXT: mul s5, a7, a6 |
| ; RV32IMZBS-NEXT: mul s6, t2, s2 |
| ; RV32IMZBS-NEXT: mul s7, t4, t1 |
| ; RV32IMZBS-NEXT: mul s8, s3, a6 |
| ; RV32IMZBS-NEXT: mul s9, a7, t3 |
| ; RV32IMZBS-NEXT: mul s10, t2, t3 |
| ; RV32IMZBS-NEXT: mul s11, t4, a6 |
| ; RV32IMZBS-NEXT: mul a6, t2, a6 |
| ; RV32IMZBS-NEXT: mul t2, s3, t1 |
| ; RV32IMZBS-NEXT: mul t4, t4, s2 |
| ; RV32IMZBS-NEXT: mul s2, a7, s2 |
| ; RV32IMZBS-NEXT: mul t3, s3, t3 |
| ; RV32IMZBS-NEXT: mul a7, a7, t1 |
| ; RV32IMZBS-NEXT: xor t1, t6, t5 |
| ; RV32IMZBS-NEXT: xor t5, s4, s5 |
| ; RV32IMZBS-NEXT: xor t6, s7, s6 |
| ; RV32IMZBS-NEXT: xor s3, s8, s9 |
| ; RV32IMZBS-NEXT: xor t1, t1, t5 |
| ; RV32IMZBS-NEXT: xor t5, t6, s3 |
| ; RV32IMZBS-NEXT: and t0, t1, t0 |
| ; RV32IMZBS-NEXT: and a0, t5, a0 |
| ; RV32IMZBS-NEXT: xor t1, s11, s10 |
| ; RV32IMZBS-NEXT: xor t2, t2, s2 |
| ; RV32IMZBS-NEXT: xor a6, t4, a6 |
| ; RV32IMZBS-NEXT: xor a7, t3, a7 |
| ; RV32IMZBS-NEXT: xor t1, t1, t2 |
| ; RV32IMZBS-NEXT: xor a6, a6, a7 |
| ; RV32IMZBS-NEXT: and a7, t1, s1 |
| ; RV32IMZBS-NEXT: and a6, a6, s0 |
| ; RV32IMZBS-NEXT: or a0, a0, t0 |
| ; RV32IMZBS-NEXT: or a6, a7, a6 |
| ; RV32IMZBS-NEXT: or a0, a0, a6 |
| ; RV32IMZBS-NEXT: srli a6, a0, 8 |
| ; RV32IMZBS-NEXT: and a6, a6, a2 |
| ; RV32IMZBS-NEXT: srli a7, a0, 24 |
| ; RV32IMZBS-NEXT: and a2, a0, a2 |
| ; RV32IMZBS-NEXT: slli a0, a0, 24 |
| ; RV32IMZBS-NEXT: slli a2, a2, 8 |
| ; RV32IMZBS-NEXT: or a6, a6, a7 |
| ; RV32IMZBS-NEXT: or a0, a0, a2 |
| ; RV32IMZBS-NEXT: or a0, a0, a6 |
| ; RV32IMZBS-NEXT: srli a2, a0, 4 |
| ; RV32IMZBS-NEXT: and a0, a0, a1 |
| ; RV32IMZBS-NEXT: and a1, a2, a1 |
| ; RV32IMZBS-NEXT: slli a0, a0, 4 |
| ; RV32IMZBS-NEXT: or a0, a1, a0 |
| ; RV32IMZBS-NEXT: srli a1, a0, 2 |
| ; RV32IMZBS-NEXT: and a0, a0, a3 |
| ; RV32IMZBS-NEXT: and a1, a1, a3 |
| ; RV32IMZBS-NEXT: slli a0, a0, 2 |
| ; RV32IMZBS-NEXT: or a0, a1, a0 |
| ; RV32IMZBS-NEXT: srli a1, a0, 1 |
| ; RV32IMZBS-NEXT: addi a2, a4, 1364 |
| ; RV32IMZBS-NEXT: and a0, a0, a5 |
| ; RV32IMZBS-NEXT: and a1, a1, a2 |
| ; RV32IMZBS-NEXT: slli a0, a0, 1 |
| ; RV32IMZBS-NEXT: or a0, a1, a0 |
| ; RV32IMZBS-NEXT: srli a0, a0, 1 |
| ; RV32IMZBS-NEXT: lw s0, 44(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: lw s1, 40(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: lw s2, 36(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: lw s3, 32(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: lw s4, 28(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: lw s5, 24(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: lw s6, 20(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: lw s7, 16(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: lw s8, 12(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: lw s9, 8(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: lw s10, 4(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: lw s11, 0(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: addi sp, sp, 48 |
| ; RV32IMZBS-NEXT: ret |
| ; |
| ; RV64IMZBS-LABEL: clmulh_i32: |
| ; RV64IMZBS: # %bb.0: |
| ; RV64IMZBS-NEXT: addi sp, sp, -32 |
| ; RV64IMZBS-NEXT: sd s0, 24(sp) # 8-byte Folded Spill |
| ; RV64IMZBS-NEXT: sd s1, 16(sp) # 8-byte Folded Spill |
| ; RV64IMZBS-NEXT: sd s2, 8(sp) # 8-byte Folded Spill |
| ; RV64IMZBS-NEXT: lui a2, %hi(.LCPI4_0) |
| ; RV64IMZBS-NEXT: ld a2, %lo(.LCPI4_0)(a2) |
| ; RV64IMZBS-NEXT: lui a3, 69905 |
| ; RV64IMZBS-NEXT: lui a4, 139810 |
| ; RV64IMZBS-NEXT: addi a3, a3, 273 |
| ; RV64IMZBS-NEXT: addi a5, a4, 546 |
| ; RV64IMZBS-NEXT: and a4, a1, a3 |
| ; RV64IMZBS-NEXT: and a6, a0, a5 |
| ; RV64IMZBS-NEXT: and a7, a0, a2 |
| ; RV64IMZBS-NEXT: and t0, a1, a2 |
| ; RV64IMZBS-NEXT: mul t1, a6, a4 |
| ; RV64IMZBS-NEXT: and a5, a1, a5 |
| ; RV64IMZBS-NEXT: and t2, a0, a3 |
| ; RV64IMZBS-NEXT: lui t3, 279620 |
| ; RV64IMZBS-NEXT: mul t4, t2, a5 |
| ; RV64IMZBS-NEXT: addi t3, t3, 1092 |
| ; RV64IMZBS-NEXT: and a0, a0, t3 |
| ; RV64IMZBS-NEXT: slli t0, t0, 32 |
| ; RV64IMZBS-NEXT: srli t5, t0, 32 |
| ; RV64IMZBS-NEXT: slli a7, a7, 32 |
| ; RV64IMZBS-NEXT: and a1, a1, t3 |
| ; RV64IMZBS-NEXT: srli t3, a7, 32 |
| ; RV64IMZBS-NEXT: mul t6, a0, t5 |
| ; RV64IMZBS-NEXT: mul s0, t3, a1 |
| ; RV64IMZBS-NEXT: mul s1, t2, a4 |
| ; RV64IMZBS-NEXT: mul s2, a0, a1 |
| ; RV64IMZBS-NEXT: xor t1, t4, t1 |
| ; RV64IMZBS-NEXT: xor t1, t1, t6 |
| ; RV64IMZBS-NEXT: mul t4, a6, t5 |
| ; RV64IMZBS-NEXT: xor t1, t1, s0 |
| ; RV64IMZBS-NEXT: xor t6, s1, s2 |
| ; RV64IMZBS-NEXT: mul s0, t3, a5 |
| ; RV64IMZBS-NEXT: mul s1, a6, a5 |
| ; RV64IMZBS-NEXT: mul a6, a6, a1 |
| ; RV64IMZBS-NEXT: mul a1, t2, a1 |
| ; RV64IMZBS-NEXT: mul a5, a0, a5 |
| ; RV64IMZBS-NEXT: mul a0, a0, a4 |
| ; RV64IMZBS-NEXT: mulhu a7, a7, t0 |
| ; RV64IMZBS-NEXT: mul t0, t2, t5 |
| ; RV64IMZBS-NEXT: slli t2, a3, 33 |
| ; RV64IMZBS-NEXT: mul a4, t3, a4 |
| ; RV64IMZBS-NEXT: and t1, t1, t2 |
| ; RV64IMZBS-NEXT: xor t2, t6, t4 |
| ; RV64IMZBS-NEXT: xor t2, t2, s0 |
| ; RV64IMZBS-NEXT: slli t3, a3, 32 |
| ; RV64IMZBS-NEXT: and t2, t2, t3 |
| ; RV64IMZBS-NEXT: xor a1, a1, s1 |
| ; RV64IMZBS-NEXT: xor a0, a1, a0 |
| ; RV64IMZBS-NEXT: xor a1, a6, a5 |
| ; RV64IMZBS-NEXT: xor a0, a0, a7 |
| ; RV64IMZBS-NEXT: xor a1, t0, a1 |
| ; RV64IMZBS-NEXT: slli a3, a3, 34 |
| ; RV64IMZBS-NEXT: xor a1, a1, a4 |
| ; RV64IMZBS-NEXT: and a0, a0, a3 |
| ; RV64IMZBS-NEXT: and a1, a1, a2 |
| ; RV64IMZBS-NEXT: or a2, t2, t1 |
| ; RV64IMZBS-NEXT: or a0, a0, a1 |
| ; RV64IMZBS-NEXT: or a0, a2, a0 |
| ; RV64IMZBS-NEXT: srli a0, a0, 32 |
| ; RV64IMZBS-NEXT: ld s0, 24(sp) # 8-byte Folded Reload |
| ; RV64IMZBS-NEXT: ld s1, 16(sp) # 8-byte Folded Reload |
| ; RV64IMZBS-NEXT: ld s2, 8(sp) # 8-byte Folded Reload |
| ; RV64IMZBS-NEXT: addi sp, sp, 32 |
| ; RV64IMZBS-NEXT: ret |
| %a.ext = zext i32 %a to i64 |
| %b.ext = zext i32 %b to i64 |
| %clmul = call i64 @llvm.clmul.i64(i64 %a.ext, i64 %b.ext) |
| %res.ext = lshr i64 %clmul, 32 |
| %res = trunc i64 %res.ext to i32 |
| ret i32 %res |
| } |
| |
| declare i8 @use(i8, i1) |
| |
| define void @commutative_clmulh_i8(i8 %x, i8 %y, ptr %p0, ptr %p1) { |
| ; CHECK-I-LABEL: commutative_clmulh_i8: |
| ; CHECK-I: # %bb.0: |
| ; CHECK-I-NEXT: zext.b a1, a1 |
| ; CHECK-I-NEXT: andi a4, a0, 2 |
| ; CHECK-I-NEXT: slli a5, a1, 1 |
| ; CHECK-I-NEXT: seqz a4, a4 |
| ; CHECK-I-NEXT: addi a4, a4, -1 |
| ; CHECK-I-NEXT: andi a6, a0, 1 |
| ; CHECK-I-NEXT: and a4, a4, a5 |
| ; CHECK-I-NEXT: seqz a5, a6 |
| ; CHECK-I-NEXT: addi a5, a5, -1 |
| ; CHECK-I-NEXT: andi a6, a0, 4 |
| ; CHECK-I-NEXT: slli a7, a1, 2 |
| ; CHECK-I-NEXT: seqz a6, a6 |
| ; CHECK-I-NEXT: addi a6, a6, -1 |
| ; CHECK-I-NEXT: andi t0, a0, 8 |
| ; CHECK-I-NEXT: and a6, a6, a7 |
| ; CHECK-I-NEXT: seqz a7, t0 |
| ; CHECK-I-NEXT: slli t0, a1, 3 |
| ; CHECK-I-NEXT: addi a7, a7, -1 |
| ; CHECK-I-NEXT: and a7, a7, t0 |
| ; CHECK-I-NEXT: and a5, a5, a1 |
| ; CHECK-I-NEXT: xor a4, a5, a4 |
| ; CHECK-I-NEXT: xor a5, a6, a7 |
| ; CHECK-I-NEXT: xor a4, a4, a5 |
| ; CHECK-I-NEXT: andi a5, a0, 16 |
| ; CHECK-I-NEXT: slli a6, a1, 4 |
| ; CHECK-I-NEXT: seqz a5, a5 |
| ; CHECK-I-NEXT: addi a5, a5, -1 |
| ; CHECK-I-NEXT: andi a7, a0, 32 |
| ; CHECK-I-NEXT: and a5, a5, a6 |
| ; CHECK-I-NEXT: seqz a6, a7 |
| ; CHECK-I-NEXT: slli a7, a1, 5 |
| ; CHECK-I-NEXT: addi a6, a6, -1 |
| ; CHECK-I-NEXT: and a6, a6, a7 |
| ; CHECK-I-NEXT: andi a7, a0, 64 |
| ; CHECK-I-NEXT: xor a5, a5, a6 |
| ; CHECK-I-NEXT: seqz a6, a7 |
| ; CHECK-I-NEXT: slli a7, a1, 6 |
| ; CHECK-I-NEXT: addi a6, a6, -1 |
| ; CHECK-I-NEXT: and a6, a6, a7 |
| ; CHECK-I-NEXT: andi a0, a0, 128 |
| ; CHECK-I-NEXT: xor a5, a5, a6 |
| ; CHECK-I-NEXT: seqz a0, a0 |
| ; CHECK-I-NEXT: slli a1, a1, 7 |
| ; CHECK-I-NEXT: addi a0, a0, -1 |
| ; CHECK-I-NEXT: xor a4, a4, a5 |
| ; CHECK-I-NEXT: and a0, a0, a1 |
| ; CHECK-I-NEXT: xor a0, a4, a0 |
| ; CHECK-I-NEXT: srli a0, a0, 8 |
| ; CHECK-I-NEXT: sb a0, 0(a2) |
| ; CHECK-I-NEXT: sb a0, 0(a3) |
| ; CHECK-I-NEXT: ret |
| ; |
| ; RV32IM-LABEL: commutative_clmulh_i8: |
| ; RV32IM: # %bb.0: |
| ; RV32IM-NEXT: addi sp, sp, -16 |
| ; RV32IM-NEXT: .cfi_def_cfa_offset 16 |
| ; RV32IM-NEXT: sw s0, 12(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: sw s1, 8(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: .cfi_offset s0, -4 |
| ; RV32IM-NEXT: .cfi_offset s1, -8 |
| ; RV32IM-NEXT: andi a4, a0, 17 |
| ; RV32IM-NEXT: andi a5, a1, 34 |
| ; RV32IM-NEXT: andi a6, a0, 34 |
| ; RV32IM-NEXT: andi a7, a1, 17 |
| ; RV32IM-NEXT: mul t0, a5, a4 |
| ; RV32IM-NEXT: mul t1, a7, a6 |
| ; RV32IM-NEXT: andi t2, a0, 136 |
| ; RV32IM-NEXT: andi t3, a1, 68 |
| ; RV32IM-NEXT: andi a0, a0, 68 |
| ; RV32IM-NEXT: andi a1, a1, 136 |
| ; RV32IM-NEXT: mul t4, t3, t2 |
| ; RV32IM-NEXT: mul t5, a1, a0 |
| ; RV32IM-NEXT: xor t0, t1, t0 |
| ; RV32IM-NEXT: xor t1, t4, t5 |
| ; RV32IM-NEXT: mul t4, a5, t2 |
| ; RV32IM-NEXT: xor t0, t0, t1 |
| ; RV32IM-NEXT: mul t1, a7, a4 |
| ; RV32IM-NEXT: mul t5, t3, a0 |
| ; RV32IM-NEXT: mul t6, a1, a6 |
| ; RV32IM-NEXT: mul s0, a5, a6 |
| ; RV32IM-NEXT: mul s1, a7, a0 |
| ; RV32IM-NEXT: mul a0, a5, a0 |
| ; RV32IM-NEXT: mul a5, t3, a4 |
| ; RV32IM-NEXT: mul a7, a7, t2 |
| ; RV32IM-NEXT: mul t2, a1, t2 |
| ; RV32IM-NEXT: mul a6, t3, a6 |
| ; RV32IM-NEXT: li t3, 17 |
| ; RV32IM-NEXT: mul a1, a1, a4 |
| ; RV32IM-NEXT: slli a4, t3, 9 |
| ; RV32IM-NEXT: and a4, t0, a4 |
| ; RV32IM-NEXT: xor t0, t1, t4 |
| ; RV32IM-NEXT: xor t1, t5, t6 |
| ; RV32IM-NEXT: xor t0, t0, t1 |
| ; RV32IM-NEXT: slli t1, t3, 8 |
| ; RV32IM-NEXT: xor s0, s1, s0 |
| ; RV32IM-NEXT: xor a5, a5, t2 |
| ; RV32IM-NEXT: and t0, t0, t1 |
| ; RV32IM-NEXT: xor a5, s0, a5 |
| ; RV32IM-NEXT: xor a0, a7, a0 |
| ; RV32IM-NEXT: xor a1, a6, a1 |
| ; RV32IM-NEXT: slli t3, t3, 10 |
| ; RV32IM-NEXT: xor a0, a0, a1 |
| ; RV32IM-NEXT: and a1, a5, t3 |
| ; RV32IM-NEXT: andi a0, a0, -2048 |
| ; RV32IM-NEXT: or a4, t0, a4 |
| ; RV32IM-NEXT: or a0, a1, a0 |
| ; RV32IM-NEXT: or a0, a4, a0 |
| ; RV32IM-NEXT: srli a0, a0, 8 |
| ; RV32IM-NEXT: sb a0, 0(a2) |
| ; RV32IM-NEXT: sb a0, 0(a3) |
| ; RV32IM-NEXT: lw s0, 12(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: lw s1, 8(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: .cfi_restore s0 |
| ; RV32IM-NEXT: .cfi_restore s1 |
| ; RV32IM-NEXT: addi sp, sp, 16 |
| ; RV32IM-NEXT: .cfi_def_cfa_offset 0 |
| ; RV32IM-NEXT: ret |
| ; |
| ; RV64IM-LABEL: commutative_clmulh_i8: |
| ; RV64IM: # %bb.0: |
| ; RV64IM-NEXT: addi sp, sp, -48 |
| ; RV64IM-NEXT: .cfi_def_cfa_offset 48 |
| ; RV64IM-NEXT: sd s0, 40(sp) # 8-byte Folded Spill |
| ; RV64IM-NEXT: sd s1, 32(sp) # 8-byte Folded Spill |
| ; RV64IM-NEXT: sd s2, 24(sp) # 8-byte Folded Spill |
| ; RV64IM-NEXT: sd s3, 16(sp) # 8-byte Folded Spill |
| ; RV64IM-NEXT: sd s4, 8(sp) # 8-byte Folded Spill |
| ; RV64IM-NEXT: .cfi_offset s0, -8 |
| ; RV64IM-NEXT: .cfi_offset s1, -16 |
| ; RV64IM-NEXT: .cfi_offset s2, -24 |
| ; RV64IM-NEXT: .cfi_offset s3, -32 |
| ; RV64IM-NEXT: .cfi_offset s4, -40 |
| ; RV64IM-NEXT: andi a4, a1, 136 |
| ; RV64IM-NEXT: andi a5, a0, 136 |
| ; RV64IM-NEXT: andi a6, a0, 17 |
| ; RV64IM-NEXT: andi a7, a1, 34 |
| ; RV64IM-NEXT: andi t0, a0, 34 |
| ; RV64IM-NEXT: andi t1, a1, 17 |
| ; RV64IM-NEXT: mul t2, a7, a6 |
| ; RV64IM-NEXT: mul t3, t1, t0 |
| ; RV64IM-NEXT: andi a1, a1, 68 |
| ; RV64IM-NEXT: andi a0, a0, 68 |
| ; RV64IM-NEXT: mul t4, a1, a5 |
| ; RV64IM-NEXT: mul t5, a4, a0 |
| ; RV64IM-NEXT: xor t2, t3, t2 |
| ; RV64IM-NEXT: xor t3, t4, t5 |
| ; RV64IM-NEXT: li t4, 17 |
| ; RV64IM-NEXT: xor t2, t2, t3 |
| ; RV64IM-NEXT: slli t3, t4, 9 |
| ; RV64IM-NEXT: mul t5, a7, a5 |
| ; RV64IM-NEXT: mul t6, t1, a6 |
| ; RV64IM-NEXT: mul s0, a1, a0 |
| ; RV64IM-NEXT: mul s1, a4, t0 |
| ; RV64IM-NEXT: and t2, t2, t3 |
| ; RV64IM-NEXT: mul t3, a7, t0 |
| ; RV64IM-NEXT: mul s2, t1, a0 |
| ; RV64IM-NEXT: mul s3, a1, a6 |
| ; RV64IM-NEXT: mul s4, a4, a5 |
| ; RV64IM-NEXT: mul a0, a7, a0 |
| ; RV64IM-NEXT: mul a5, t1, a5 |
| ; RV64IM-NEXT: mul a1, a1, t0 |
| ; RV64IM-NEXT: mul a4, a4, a6 |
| ; RV64IM-NEXT: xor a6, t6, t5 |
| ; RV64IM-NEXT: xor s0, s0, s1 |
| ; RV64IM-NEXT: xor a6, a6, s0 |
| ; RV64IM-NEXT: slli a7, t4, 8 |
| ; RV64IM-NEXT: xor t0, s2, t3 |
| ; RV64IM-NEXT: lui t1, %hi(.LCPI5_0) |
| ; RV64IM-NEXT: xor t3, s3, s4 |
| ; RV64IM-NEXT: ld t1, %lo(.LCPI5_0)(t1) |
| ; RV64IM-NEXT: and a6, a6, a7 |
| ; RV64IM-NEXT: xor a7, t0, t3 |
| ; RV64IM-NEXT: xor a0, a5, a0 |
| ; RV64IM-NEXT: xor a1, a1, a4 |
| ; RV64IM-NEXT: slli t4, t4, 10 |
| ; RV64IM-NEXT: xor a0, a0, a1 |
| ; RV64IM-NEXT: and a1, a7, t4 |
| ; RV64IM-NEXT: and a0, a0, t1 |
| ; RV64IM-NEXT: or a4, a6, t2 |
| ; RV64IM-NEXT: or a0, a1, a0 |
| ; RV64IM-NEXT: or a0, a4, a0 |
| ; RV64IM-NEXT: srli a0, a0, 8 |
| ; RV64IM-NEXT: sb a0, 0(a2) |
| ; RV64IM-NEXT: sb a0, 0(a3) |
| ; RV64IM-NEXT: ld s0, 40(sp) # 8-byte Folded Reload |
| ; RV64IM-NEXT: ld s1, 32(sp) # 8-byte Folded Reload |
| ; RV64IM-NEXT: ld s2, 24(sp) # 8-byte Folded Reload |
| ; RV64IM-NEXT: ld s3, 16(sp) # 8-byte Folded Reload |
| ; RV64IM-NEXT: ld s4, 8(sp) # 8-byte Folded Reload |
| ; RV64IM-NEXT: .cfi_restore s0 |
| ; RV64IM-NEXT: .cfi_restore s1 |
| ; RV64IM-NEXT: .cfi_restore s2 |
| ; RV64IM-NEXT: .cfi_restore s3 |
| ; RV64IM-NEXT: .cfi_restore s4 |
| ; RV64IM-NEXT: addi sp, sp, 48 |
| ; RV64IM-NEXT: .cfi_def_cfa_offset 0 |
| ; RV64IM-NEXT: ret |
| ; |
| ; RV32IMZBS-LABEL: commutative_clmulh_i8: |
| ; RV32IMZBS: # %bb.0: |
| ; RV32IMZBS-NEXT: addi sp, sp, -16 |
| ; RV32IMZBS-NEXT: .cfi_def_cfa_offset 16 |
| ; RV32IMZBS-NEXT: sw s0, 12(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: sw s1, 8(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: .cfi_offset s0, -4 |
| ; RV32IMZBS-NEXT: .cfi_offset s1, -8 |
| ; RV32IMZBS-NEXT: andi a4, a0, 17 |
| ; RV32IMZBS-NEXT: andi a5, a1, 34 |
| ; RV32IMZBS-NEXT: andi a6, a0, 34 |
| ; RV32IMZBS-NEXT: andi a7, a1, 17 |
| ; RV32IMZBS-NEXT: mul t0, a5, a4 |
| ; RV32IMZBS-NEXT: mul t1, a7, a6 |
| ; RV32IMZBS-NEXT: andi t2, a0, 136 |
| ; RV32IMZBS-NEXT: andi t3, a1, 68 |
| ; RV32IMZBS-NEXT: andi a0, a0, 68 |
| ; RV32IMZBS-NEXT: andi a1, a1, 136 |
| ; RV32IMZBS-NEXT: mul t4, t3, t2 |
| ; RV32IMZBS-NEXT: mul t5, a1, a0 |
| ; RV32IMZBS-NEXT: xor t0, t1, t0 |
| ; RV32IMZBS-NEXT: xor t1, t4, t5 |
| ; RV32IMZBS-NEXT: mul t4, a5, t2 |
| ; RV32IMZBS-NEXT: xor t0, t0, t1 |
| ; RV32IMZBS-NEXT: mul t1, a7, a4 |
| ; RV32IMZBS-NEXT: mul t5, t3, a0 |
| ; RV32IMZBS-NEXT: mul t6, a1, a6 |
| ; RV32IMZBS-NEXT: mul s0, a5, a6 |
| ; RV32IMZBS-NEXT: mul s1, a7, a0 |
| ; RV32IMZBS-NEXT: mul a0, a5, a0 |
| ; RV32IMZBS-NEXT: mul a5, t3, a4 |
| ; RV32IMZBS-NEXT: mul a7, a7, t2 |
| ; RV32IMZBS-NEXT: mul t2, a1, t2 |
| ; RV32IMZBS-NEXT: mul a6, t3, a6 |
| ; RV32IMZBS-NEXT: li t3, 17 |
| ; RV32IMZBS-NEXT: mul a1, a1, a4 |
| ; RV32IMZBS-NEXT: slli a4, t3, 9 |
| ; RV32IMZBS-NEXT: and a4, t0, a4 |
| ; RV32IMZBS-NEXT: xor t0, t1, t4 |
| ; RV32IMZBS-NEXT: xor t1, t5, t6 |
| ; RV32IMZBS-NEXT: xor t0, t0, t1 |
| ; RV32IMZBS-NEXT: slli t1, t3, 8 |
| ; RV32IMZBS-NEXT: xor s0, s1, s0 |
| ; RV32IMZBS-NEXT: xor a5, a5, t2 |
| ; RV32IMZBS-NEXT: and t0, t0, t1 |
| ; RV32IMZBS-NEXT: xor a5, s0, a5 |
| ; RV32IMZBS-NEXT: xor a0, a7, a0 |
| ; RV32IMZBS-NEXT: xor a1, a6, a1 |
| ; RV32IMZBS-NEXT: slli t3, t3, 10 |
| ; RV32IMZBS-NEXT: xor a0, a0, a1 |
| ; RV32IMZBS-NEXT: and a1, a5, t3 |
| ; RV32IMZBS-NEXT: andi a0, a0, -2048 |
| ; RV32IMZBS-NEXT: or a4, t0, a4 |
| ; RV32IMZBS-NEXT: or a0, a1, a0 |
| ; RV32IMZBS-NEXT: or a0, a4, a0 |
| ; RV32IMZBS-NEXT: srli a0, a0, 8 |
| ; RV32IMZBS-NEXT: sb a0, 0(a2) |
| ; RV32IMZBS-NEXT: sb a0, 0(a3) |
| ; RV32IMZBS-NEXT: lw s0, 12(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: lw s1, 8(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: .cfi_restore s0 |
| ; RV32IMZBS-NEXT: .cfi_restore s1 |
| ; RV32IMZBS-NEXT: addi sp, sp, 16 |
| ; RV32IMZBS-NEXT: .cfi_def_cfa_offset 0 |
| ; RV32IMZBS-NEXT: ret |
| ; |
| ; RV64IMZBS-LABEL: commutative_clmulh_i8: |
| ; RV64IMZBS: # %bb.0: |
| ; RV64IMZBS-NEXT: addi sp, sp, -48 |
| ; RV64IMZBS-NEXT: .cfi_def_cfa_offset 48 |
| ; RV64IMZBS-NEXT: sd s0, 40(sp) # 8-byte Folded Spill |
| ; RV64IMZBS-NEXT: sd s1, 32(sp) # 8-byte Folded Spill |
| ; RV64IMZBS-NEXT: sd s2, 24(sp) # 8-byte Folded Spill |
| ; RV64IMZBS-NEXT: sd s3, 16(sp) # 8-byte Folded Spill |
| ; RV64IMZBS-NEXT: sd s4, 8(sp) # 8-byte Folded Spill |
| ; RV64IMZBS-NEXT: .cfi_offset s0, -8 |
| ; RV64IMZBS-NEXT: .cfi_offset s1, -16 |
| ; RV64IMZBS-NEXT: .cfi_offset s2, -24 |
| ; RV64IMZBS-NEXT: .cfi_offset s3, -32 |
| ; RV64IMZBS-NEXT: .cfi_offset s4, -40 |
| ; RV64IMZBS-NEXT: andi a4, a1, 136 |
| ; RV64IMZBS-NEXT: andi a5, a0, 136 |
| ; RV64IMZBS-NEXT: andi a6, a0, 17 |
| ; RV64IMZBS-NEXT: andi a7, a1, 34 |
| ; RV64IMZBS-NEXT: andi t0, a0, 34 |
| ; RV64IMZBS-NEXT: andi t1, a1, 17 |
| ; RV64IMZBS-NEXT: mul t2, a7, a6 |
| ; RV64IMZBS-NEXT: mul t3, t1, t0 |
| ; RV64IMZBS-NEXT: andi a1, a1, 68 |
| ; RV64IMZBS-NEXT: andi a0, a0, 68 |
| ; RV64IMZBS-NEXT: mul t4, a1, a5 |
| ; RV64IMZBS-NEXT: mul t5, a4, a0 |
| ; RV64IMZBS-NEXT: xor t2, t3, t2 |
| ; RV64IMZBS-NEXT: xor t3, t4, t5 |
| ; RV64IMZBS-NEXT: li t4, 17 |
| ; RV64IMZBS-NEXT: xor t2, t2, t3 |
| ; RV64IMZBS-NEXT: slli t3, t4, 9 |
| ; RV64IMZBS-NEXT: mul t5, a7, a5 |
| ; RV64IMZBS-NEXT: mul t6, t1, a6 |
| ; RV64IMZBS-NEXT: mul s0, a1, a0 |
| ; RV64IMZBS-NEXT: mul s1, a4, t0 |
| ; RV64IMZBS-NEXT: and t2, t2, t3 |
| ; RV64IMZBS-NEXT: mul t3, a7, t0 |
| ; RV64IMZBS-NEXT: mul s2, t1, a0 |
| ; RV64IMZBS-NEXT: mul s3, a1, a6 |
| ; RV64IMZBS-NEXT: mul s4, a4, a5 |
| ; RV64IMZBS-NEXT: mul a0, a7, a0 |
| ; RV64IMZBS-NEXT: mul a5, t1, a5 |
| ; RV64IMZBS-NEXT: mul a1, a1, t0 |
| ; RV64IMZBS-NEXT: mul a4, a4, a6 |
| ; RV64IMZBS-NEXT: xor a6, t6, t5 |
| ; RV64IMZBS-NEXT: xor s0, s0, s1 |
| ; RV64IMZBS-NEXT: xor a6, a6, s0 |
| ; RV64IMZBS-NEXT: slli a7, t4, 8 |
| ; RV64IMZBS-NEXT: xor t0, s2, t3 |
| ; RV64IMZBS-NEXT: lui t1, %hi(.LCPI5_0) |
| ; RV64IMZBS-NEXT: xor t3, s3, s4 |
| ; RV64IMZBS-NEXT: ld t1, %lo(.LCPI5_0)(t1) |
| ; RV64IMZBS-NEXT: and a6, a6, a7 |
| ; RV64IMZBS-NEXT: xor a7, t0, t3 |
| ; RV64IMZBS-NEXT: xor a0, a5, a0 |
| ; RV64IMZBS-NEXT: xor a1, a1, a4 |
| ; RV64IMZBS-NEXT: slli t4, t4, 10 |
| ; RV64IMZBS-NEXT: xor a0, a0, a1 |
| ; RV64IMZBS-NEXT: and a1, a7, t4 |
| ; RV64IMZBS-NEXT: and a0, a0, t1 |
| ; RV64IMZBS-NEXT: or a4, a6, t2 |
| ; RV64IMZBS-NEXT: or a0, a1, a0 |
| ; RV64IMZBS-NEXT: or a0, a4, a0 |
| ; RV64IMZBS-NEXT: srli a0, a0, 8 |
| ; RV64IMZBS-NEXT: sb a0, 0(a2) |
| ; RV64IMZBS-NEXT: sb a0, 0(a3) |
| ; RV64IMZBS-NEXT: ld s0, 40(sp) # 8-byte Folded Reload |
| ; RV64IMZBS-NEXT: ld s1, 32(sp) # 8-byte Folded Reload |
| ; RV64IMZBS-NEXT: ld s2, 24(sp) # 8-byte Folded Reload |
| ; RV64IMZBS-NEXT: ld s3, 16(sp) # 8-byte Folded Reload |
| ; RV64IMZBS-NEXT: ld s4, 8(sp) # 8-byte Folded Reload |
| ; RV64IMZBS-NEXT: .cfi_restore s0 |
| ; RV64IMZBS-NEXT: .cfi_restore s1 |
| ; RV64IMZBS-NEXT: .cfi_restore s2 |
| ; RV64IMZBS-NEXT: .cfi_restore s3 |
| ; RV64IMZBS-NEXT: .cfi_restore s4 |
| ; RV64IMZBS-NEXT: addi sp, sp, 48 |
| ; RV64IMZBS-NEXT: .cfi_def_cfa_offset 0 |
| ; RV64IMZBS-NEXT: ret |
| %x.ext = zext i8 %x to i16 |
| %y.ext = zext i8 %y to i16 |
| %clmul_xy = call i16 @llvm.clmul.i16(i16 %x.ext, i16 %y.ext) |
| %clmul_yx = call i16 @llvm.clmul.i16(i16 %y.ext, i16 %x.ext) |
| %clmul_xy_lshr = lshr i16 %clmul_xy, 8 |
| %clmul_yx_lshr = lshr i16 %clmul_yx, 8 |
| %clmulh_xy = trunc i16 %clmul_xy_lshr to i8 |
| %clmulh_yx = trunc i16 %clmul_yx_lshr to i8 |
| store i8 %clmulh_xy, ptr %p0 |
| store i8 %clmulh_yx, ptr %p1 |
| ret void |
| } |
| |
| define void @commutative_clmulh_v2i64(<2 x i64> %x, <2 x i64> %y, ptr %p0, ptr %p1) nounwind { |
| ; RV32I-LABEL: commutative_clmulh_v2i64: |
| ; RV32I: # %bb.0: |
| ; RV32I-NEXT: addi sp, sp, -288 |
| ; RV32I-NEXT: sw ra, 284(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: sw s0, 280(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: sw s1, 276(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: sw s2, 272(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: sw s3, 268(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: sw s4, 264(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: sw s5, 260(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: sw s6, 256(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: sw s7, 252(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: sw s8, 248(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: sw s9, 244(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: sw s10, 240(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: sw s11, 236(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: sw a3, 228(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: sw a2, 224(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: mv t1, a0 |
| ; RV32I-NEXT: lw a0, 4(a1) |
| ; RV32I-NEXT: lui a2, 16 |
| ; RV32I-NEXT: lw a3, 8(a1) |
| ; RV32I-NEXT: sw a3, 216(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: lw a3, 12(a1) |
| ; RV32I-NEXT: sw a3, 208(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: addi s4, a2, -256 |
| ; RV32I-NEXT: lui t4, 16 |
| ; RV32I-NEXT: srli a2, a0, 8 |
| ; RV32I-NEXT: srli a3, a0, 24 |
| ; RV32I-NEXT: and a4, a0, s4 |
| ; RV32I-NEXT: slli a0, a0, 24 |
| ; RV32I-NEXT: and a2, a2, s4 |
| ; RV32I-NEXT: slli a4, a4, 8 |
| ; RV32I-NEXT: or a2, a2, a3 |
| ; RV32I-NEXT: or a0, a0, a4 |
| ; RV32I-NEXT: lui a3, 61681 |
| ; RV32I-NEXT: or a0, a0, a2 |
| ; RV32I-NEXT: addi s3, a3, -241 |
| ; RV32I-NEXT: srli a2, a0, 4 |
| ; RV32I-NEXT: and a0, a0, s3 |
| ; RV32I-NEXT: and a2, a2, s3 |
| ; RV32I-NEXT: slli a0, a0, 4 |
| ; RV32I-NEXT: or a0, a2, a0 |
| ; RV32I-NEXT: lui a2, 209715 |
| ; RV32I-NEXT: srli a3, a0, 2 |
| ; RV32I-NEXT: addi s2, a2, 819 |
| ; RV32I-NEXT: and a2, a3, s2 |
| ; RV32I-NEXT: and a0, a0, s2 |
| ; RV32I-NEXT: slli a0, a0, 2 |
| ; RV32I-NEXT: lui a3, 349525 |
| ; RV32I-NEXT: or a0, a2, a0 |
| ; RV32I-NEXT: addi s9, a3, 1365 |
| ; RV32I-NEXT: srli a2, a0, 1 |
| ; RV32I-NEXT: and a0, a0, s9 |
| ; RV32I-NEXT: and a2, a2, s9 |
| ; RV32I-NEXT: slli a0, a0, 1 |
| ; RV32I-NEXT: or t0, a2, a0 |
| ; RV32I-NEXT: srli a0, t0, 8 |
| ; RV32I-NEXT: and a0, a0, s4 |
| ; RV32I-NEXT: srli a2, t0, 24 |
| ; RV32I-NEXT: and a4, t0, s4 |
| ; RV32I-NEXT: slli a5, t0, 24 |
| ; RV32I-NEXT: sw a5, 200(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a4, a4, 8 |
| ; RV32I-NEXT: or a0, a0, a2 |
| ; RV32I-NEXT: or a2, a5, a4 |
| ; RV32I-NEXT: lw a4, 4(t1) |
| ; RV32I-NEXT: lw a5, 8(t1) |
| ; RV32I-NEXT: sw a5, 220(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: lw a5, 12(t1) |
| ; RV32I-NEXT: sw a5, 204(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: or a0, a2, a0 |
| ; RV32I-NEXT: srli a2, a0, 4 |
| ; RV32I-NEXT: and a0, a0, s3 |
| ; RV32I-NEXT: and a2, a2, s3 |
| ; RV32I-NEXT: slli a0, a0, 4 |
| ; RV32I-NEXT: or a0, a2, a0 |
| ; RV32I-NEXT: srli a2, a4, 8 |
| ; RV32I-NEXT: srli a5, a0, 2 |
| ; RV32I-NEXT: and a2, a2, s4 |
| ; RV32I-NEXT: srli a6, a4, 24 |
| ; RV32I-NEXT: and a7, a4, s4 |
| ; RV32I-NEXT: slli a7, a7, 8 |
| ; RV32I-NEXT: slli a4, a4, 24 |
| ; RV32I-NEXT: or a2, a2, a6 |
| ; RV32I-NEXT: or a4, a4, a7 |
| ; RV32I-NEXT: and a5, a5, s2 |
| ; RV32I-NEXT: or a2, a4, a2 |
| ; RV32I-NEXT: srli a4, a2, 4 |
| ; RV32I-NEXT: and a2, a2, s3 |
| ; RV32I-NEXT: and a4, a4, s3 |
| ; RV32I-NEXT: slli a2, a2, 4 |
| ; RV32I-NEXT: and a0, a0, s2 |
| ; RV32I-NEXT: or a2, a4, a2 |
| ; RV32I-NEXT: srli a4, a2, 2 |
| ; RV32I-NEXT: and a2, a2, s2 |
| ; RV32I-NEXT: and a4, a4, s2 |
| ; RV32I-NEXT: slli a2, a2, 2 |
| ; RV32I-NEXT: slli a0, a0, 2 |
| ; RV32I-NEXT: or a2, a4, a2 |
| ; RV32I-NEXT: srli a4, a2, 1 |
| ; RV32I-NEXT: and a2, a2, s9 |
| ; RV32I-NEXT: and a4, a4, s9 |
| ; RV32I-NEXT: slli s11, a2, 1 |
| ; RV32I-NEXT: or a5, a5, a0 |
| ; RV32I-NEXT: or a0, a4, s11 |
| ; RV32I-NEXT: srli a2, a5, 1 |
| ; RV32I-NEXT: srli a4, a0, 8 |
| ; RV32I-NEXT: and a2, a2, s9 |
| ; RV32I-NEXT: and a4, a4, s4 |
| ; RV32I-NEXT: srli a6, a0, 24 |
| ; RV32I-NEXT: and a7, a0, s4 |
| ; RV32I-NEXT: slli t2, a0, 24 |
| ; RV32I-NEXT: slli a7, a7, 8 |
| ; RV32I-NEXT: or a4, a4, a6 |
| ; RV32I-NEXT: or a6, t2, a7 |
| ; RV32I-NEXT: and a5, a5, s9 |
| ; RV32I-NEXT: or a4, a6, a4 |
| ; RV32I-NEXT: srli a6, a4, 4 |
| ; RV32I-NEXT: and a4, a4, s3 |
| ; RV32I-NEXT: and a6, a6, s3 |
| ; RV32I-NEXT: slli a4, a4, 4 |
| ; RV32I-NEXT: slli a5, a5, 1 |
| ; RV32I-NEXT: or a4, a6, a4 |
| ; RV32I-NEXT: srli a6, a4, 2 |
| ; RV32I-NEXT: and a4, a4, s2 |
| ; RV32I-NEXT: and a6, a6, s2 |
| ; RV32I-NEXT: slli a4, a4, 2 |
| ; RV32I-NEXT: or a2, a2, a5 |
| ; RV32I-NEXT: or a4, a6, a4 |
| ; RV32I-NEXT: srli a5, a4, 1 |
| ; RV32I-NEXT: and t2, a4, s9 |
| ; RV32I-NEXT: and a4, a5, s9 |
| ; RV32I-NEXT: slli t2, t2, 1 |
| ; RV32I-NEXT: slli a5, a2, 1 |
| ; RV32I-NEXT: or t3, a4, t2 |
| ; RV32I-NEXT: andi a4, t3, 2 |
| ; RV32I-NEXT: andi a6, t3, 1 |
| ; RV32I-NEXT: seqz a4, a4 |
| ; RV32I-NEXT: seqz a6, a6 |
| ; RV32I-NEXT: addi a4, a4, -1 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: and a4, a4, a5 |
| ; RV32I-NEXT: and a5, a6, a2 |
| ; RV32I-NEXT: xor a4, a5, a4 |
| ; RV32I-NEXT: andi a5, t3, 4 |
| ; RV32I-NEXT: slli a6, a2, 2 |
| ; RV32I-NEXT: seqz a5, a5 |
| ; RV32I-NEXT: addi a5, a5, -1 |
| ; RV32I-NEXT: andi a7, t3, 8 |
| ; RV32I-NEXT: and a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: slli a7, a2, 3 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: andi a7, t3, 16 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: slli a7, a2, 4 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: andi a7, t3, 32 |
| ; RV32I-NEXT: slli s0, a2, 5 |
| ; RV32I-NEXT: seqz a7, a7 |
| ; RV32I-NEXT: addi a7, a7, -1 |
| ; RV32I-NEXT: andi s1, t3, 64 |
| ; RV32I-NEXT: and a7, a7, s0 |
| ; RV32I-NEXT: seqz s0, s1 |
| ; RV32I-NEXT: slli s1, a2, 6 |
| ; RV32I-NEXT: addi s0, s0, -1 |
| ; RV32I-NEXT: xor a6, a6, a7 |
| ; RV32I-NEXT: and s0, s0, s1 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: xor a5, a6, s0 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: slli a5, a2, 7 |
| ; RV32I-NEXT: andi a6, t3, 128 |
| ; RV32I-NEXT: seqz a6, a6 |
| ; RV32I-NEXT: andi a7, t3, 256 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: seqz a7, a7 |
| ; RV32I-NEXT: slli s0, a2, 8 |
| ; RV32I-NEXT: addi a7, a7, -1 |
| ; RV32I-NEXT: and a5, a6, a5 |
| ; RV32I-NEXT: and a6, a7, s0 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: andi a6, t3, 512 |
| ; RV32I-NEXT: slli a7, a2, 9 |
| ; RV32I-NEXT: seqz a6, a6 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: andi s0, t3, 1024 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: seqz a7, s0 |
| ; RV32I-NEXT: slli s0, a2, 10 |
| ; RV32I-NEXT: addi a7, a7, -1 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: and a6, a7, s0 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: li a6, 1 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: slli t5, a6, 11 |
| ; RV32I-NEXT: slli a5, a2, 11 |
| ; RV32I-NEXT: and a6, t3, t5 |
| ; RV32I-NEXT: seqz a6, a6 |
| ; RV32I-NEXT: lui a7, 1 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: and a7, t3, a7 |
| ; RV32I-NEXT: and a5, a6, a5 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: slli a7, a2, 12 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: lui a7, 2 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: and a6, t3, a7 |
| ; RV32I-NEXT: slli a7, a2, 13 |
| ; RV32I-NEXT: seqz a6, a6 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: lui t6, 4 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: and a7, t3, t6 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: lui t6, 8 |
| ; RV32I-NEXT: slli a7, a2, 14 |
| ; RV32I-NEXT: and s0, t3, t6 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: seqz a7, s0 |
| ; RV32I-NEXT: addi a7, a7, -1 |
| ; RV32I-NEXT: slli s0, a2, 15 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: and a6, a7, s0 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: and a6, t3, t4 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: seqz a5, a6 |
| ; RV32I-NEXT: addi a5, a5, -1 |
| ; RV32I-NEXT: lui a7, 32 |
| ; RV32I-NEXT: slli a6, a2, 16 |
| ; RV32I-NEXT: and a7, t3, a7 |
| ; RV32I-NEXT: lui s8, 32 |
| ; RV32I-NEXT: and a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: lui t4, 64 |
| ; RV32I-NEXT: slli a7, a2, 17 |
| ; RV32I-NEXT: and s0, t3, t4 |
| ; RV32I-NEXT: lui s5, 64 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: seqz a7, s0 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: addi a7, a7, -1 |
| ; RV32I-NEXT: slli a6, a2, 18 |
| ; RV32I-NEXT: lui t4, 128 |
| ; RV32I-NEXT: and a6, a7, a6 |
| ; RV32I-NEXT: and a7, t3, t4 |
| ; RV32I-NEXT: lui s1, 128 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: lui t4, 256 |
| ; RV32I-NEXT: slli a7, a2, 19 |
| ; RV32I-NEXT: and s0, t3, t4 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: seqz a7, s0 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: addi a7, a7, -1 |
| ; RV32I-NEXT: slli a6, a2, 20 |
| ; RV32I-NEXT: lui t4, 512 |
| ; RV32I-NEXT: and a6, a7, a6 |
| ; RV32I-NEXT: and a7, t3, t4 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a7, a2, 21 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: lui a7, 1024 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: and a6, t3, a7 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: seqz a5, a6 |
| ; RV32I-NEXT: addi a5, a5, -1 |
| ; RV32I-NEXT: lui a7, 2048 |
| ; RV32I-NEXT: slli a6, a2, 22 |
| ; RV32I-NEXT: and a7, t3, a7 |
| ; RV32I-NEXT: and a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: lui t4, 4096 |
| ; RV32I-NEXT: slli a7, a2, 23 |
| ; RV32I-NEXT: and s0, t3, t4 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: seqz a7, s0 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: addi a7, a7, -1 |
| ; RV32I-NEXT: slli a6, a2, 24 |
| ; RV32I-NEXT: lui t4, 8192 |
| ; RV32I-NEXT: and a6, a7, a6 |
| ; RV32I-NEXT: and a7, t3, t4 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: lui t4, 16384 |
| ; RV32I-NEXT: slli a7, a2, 25 |
| ; RV32I-NEXT: and s0, t3, t4 |
| ; RV32I-NEXT: lui ra, 16384 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: seqz a7, s0 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: addi a7, a7, -1 |
| ; RV32I-NEXT: slli a6, a2, 26 |
| ; RV32I-NEXT: lui t4, 32768 |
| ; RV32I-NEXT: and a6, a7, a6 |
| ; RV32I-NEXT: and a7, t3, t4 |
| ; RV32I-NEXT: lui s6, 32768 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: lui t4, 65536 |
| ; RV32I-NEXT: slli a7, a2, 27 |
| ; RV32I-NEXT: and s0, t3, t4 |
| ; RV32I-NEXT: lui s7, 65536 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: seqz a7, s0 |
| ; RV32I-NEXT: addi a7, a7, -1 |
| ; RV32I-NEXT: slli s0, a2, 28 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: and a6, a7, s0 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: lui a6, 131072 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: and a5, t3, a6 |
| ; RV32I-NEXT: seqz a5, a5 |
| ; RV32I-NEXT: lui a6, 262144 |
| ; RV32I-NEXT: addi a5, a5, -1 |
| ; RV32I-NEXT: and a6, t3, a6 |
| ; RV32I-NEXT: seqz a6, a6 |
| ; RV32I-NEXT: slli a7, a2, 29 |
| ; RV32I-NEXT: and a5, a5, a7 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: srli a7, t2, 31 |
| ; RV32I-NEXT: slli t2, a2, 30 |
| ; RV32I-NEXT: and a6, a6, t2 |
| ; RV32I-NEXT: seqz a7, a7 |
| ; RV32I-NEXT: slli a2, a2, 31 |
| ; RV32I-NEXT: addi a7, a7, -1 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: and a2, a7, a2 |
| ; RV32I-NEXT: xor a2, a5, a2 |
| ; RV32I-NEXT: lw a1, 0(a1) |
| ; RV32I-NEXT: xor a2, a4, a2 |
| ; RV32I-NEXT: srli a4, a2, 8 |
| ; RV32I-NEXT: and a4, a4, s4 |
| ; RV32I-NEXT: srli a5, a2, 24 |
| ; RV32I-NEXT: or a4, a4, a5 |
| ; RV32I-NEXT: srli a5, a1, 8 |
| ; RV32I-NEXT: and a5, a5, s4 |
| ; RV32I-NEXT: srli a6, a1, 24 |
| ; RV32I-NEXT: or a5, a5, a6 |
| ; RV32I-NEXT: and a6, a1, s4 |
| ; RV32I-NEXT: slli a6, a6, 8 |
| ; RV32I-NEXT: slli a1, a1, 24 |
| ; RV32I-NEXT: or a1, a1, a6 |
| ; RV32I-NEXT: and a6, a2, s4 |
| ; RV32I-NEXT: slli a2, a2, 24 |
| ; RV32I-NEXT: slli a6, a6, 8 |
| ; RV32I-NEXT: or a2, a2, a6 |
| ; RV32I-NEXT: or a1, a1, a5 |
| ; RV32I-NEXT: srli a5, a1, 4 |
| ; RV32I-NEXT: and a1, a1, s3 |
| ; RV32I-NEXT: and a5, a5, s3 |
| ; RV32I-NEXT: slli a1, a1, 4 |
| ; RV32I-NEXT: or a2, a2, a4 |
| ; RV32I-NEXT: or a1, a5, a1 |
| ; RV32I-NEXT: srli a4, a2, 4 |
| ; RV32I-NEXT: and a2, a2, s3 |
| ; RV32I-NEXT: and a4, a4, s3 |
| ; RV32I-NEXT: slli a2, a2, 4 |
| ; RV32I-NEXT: srli a5, a1, 2 |
| ; RV32I-NEXT: and a1, a1, s2 |
| ; RV32I-NEXT: and a5, a5, s2 |
| ; RV32I-NEXT: slli a1, a1, 2 |
| ; RV32I-NEXT: or a2, a4, a2 |
| ; RV32I-NEXT: or a1, a5, a1 |
| ; RV32I-NEXT: srli a4, a2, 2 |
| ; RV32I-NEXT: and a2, a2, s2 |
| ; RV32I-NEXT: and a4, a4, s2 |
| ; RV32I-NEXT: slli a2, a2, 2 |
| ; RV32I-NEXT: srli a5, a1, 1 |
| ; RV32I-NEXT: and a1, a1, s9 |
| ; RV32I-NEXT: and a5, a5, s9 |
| ; RV32I-NEXT: slli a1, a1, 1 |
| ; RV32I-NEXT: or a4, a4, a2 |
| ; RV32I-NEXT: or a2, a5, a1 |
| ; RV32I-NEXT: addi a3, a3, 1364 |
| ; RV32I-NEXT: sw a3, 232(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: srli a1, a4, 1 |
| ; RV32I-NEXT: and a1, a1, a3 |
| ; RV32I-NEXT: and a3, a4, s9 |
| ; RV32I-NEXT: slli a3, a3, 1 |
| ; RV32I-NEXT: andi a4, a0, 2 |
| ; RV32I-NEXT: seqz a4, a4 |
| ; RV32I-NEXT: andi a5, a0, 1 |
| ; RV32I-NEXT: addi a6, a4, -1 |
| ; RV32I-NEXT: sw a6, 196(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: addi a5, a4, -1 |
| ; RV32I-NEXT: sw a5, 192(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a4, a2, 1 |
| ; RV32I-NEXT: and a4, a6, a4 |
| ; RV32I-NEXT: and a5, a5, a2 |
| ; RV32I-NEXT: or a1, a1, a3 |
| ; RV32I-NEXT: sw a1, 212(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: xor a4, a5, a4 |
| ; RV32I-NEXT: andi a1, a0, 4 |
| ; RV32I-NEXT: andi a3, a0, 8 |
| ; RV32I-NEXT: seqz a1, a1 |
| ; RV32I-NEXT: seqz a3, a3 |
| ; RV32I-NEXT: addi a5, a1, -1 |
| ; RV32I-NEXT: sw a5, 188(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: addi a6, a3, -1 |
| ; RV32I-NEXT: sw a6, 184(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a1, a2, 2 |
| ; RV32I-NEXT: slli a3, a2, 3 |
| ; RV32I-NEXT: and a1, a5, a1 |
| ; RV32I-NEXT: and a3, a6, a3 |
| ; RV32I-NEXT: xor a1, a1, a3 |
| ; RV32I-NEXT: andi a3, a0, 16 |
| ; RV32I-NEXT: xor a1, a4, a1 |
| ; RV32I-NEXT: seqz a3, a3 |
| ; RV32I-NEXT: addi a5, a3, -1 |
| ; RV32I-NEXT: sw a5, 180(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: andi a3, a0, 32 |
| ; RV32I-NEXT: seqz a3, a3 |
| ; RV32I-NEXT: slli a4, a2, 4 |
| ; RV32I-NEXT: and a4, a5, a4 |
| ; RV32I-NEXT: addi a6, a3, -1 |
| ; RV32I-NEXT: sw a6, 176(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a3, a2, 5 |
| ; RV32I-NEXT: andi a5, a0, 64 |
| ; RV32I-NEXT: and a3, a6, a3 |
| ; RV32I-NEXT: seqz a5, a5 |
| ; RV32I-NEXT: addi a6, a5, -1 |
| ; RV32I-NEXT: sw a6, 172(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a5, a2, 6 |
| ; RV32I-NEXT: xor a3, a4, a3 |
| ; RV32I-NEXT: and a4, a6, a5 |
| ; RV32I-NEXT: xor a3, a3, a4 |
| ; RV32I-NEXT: andi a4, a0, 128 |
| ; RV32I-NEXT: xor a1, a1, a3 |
| ; RV32I-NEXT: seqz a3, a4 |
| ; RV32I-NEXT: addi a5, a3, -1 |
| ; RV32I-NEXT: sw a5, 168(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: andi a3, a0, 256 |
| ; RV32I-NEXT: seqz a3, a3 |
| ; RV32I-NEXT: slli a4, a2, 7 |
| ; RV32I-NEXT: and a4, a5, a4 |
| ; RV32I-NEXT: addi a6, a3, -1 |
| ; RV32I-NEXT: sw a6, 164(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a3, a2, 8 |
| ; RV32I-NEXT: andi a5, a0, 512 |
| ; RV32I-NEXT: and a3, a6, a3 |
| ; RV32I-NEXT: seqz a5, a5 |
| ; RV32I-NEXT: xor a3, a4, a3 |
| ; RV32I-NEXT: addi a6, a5, -1 |
| ; RV32I-NEXT: sw a6, 160(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a4, a2, 9 |
| ; RV32I-NEXT: andi a5, a0, 1024 |
| ; RV32I-NEXT: and a4, a6, a4 |
| ; RV32I-NEXT: seqz a5, a5 |
| ; RV32I-NEXT: addi a6, a5, -1 |
| ; RV32I-NEXT: sw a6, 156(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a5, a2, 10 |
| ; RV32I-NEXT: xor a3, a3, a4 |
| ; RV32I-NEXT: and a4, a6, a5 |
| ; RV32I-NEXT: xor a3, a3, a4 |
| ; RV32I-NEXT: sw t5, 136(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: and a4, a0, t5 |
| ; RV32I-NEXT: xor a1, a1, a3 |
| ; RV32I-NEXT: seqz a3, a4 |
| ; RV32I-NEXT: addi a5, a3, -1 |
| ; RV32I-NEXT: sw a5, 152(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: lui s10, 1 |
| ; RV32I-NEXT: and a3, a0, s10 |
| ; RV32I-NEXT: seqz a3, a3 |
| ; RV32I-NEXT: slli a4, a2, 11 |
| ; RV32I-NEXT: and a4, a5, a4 |
| ; RV32I-NEXT: addi a6, a3, -1 |
| ; RV32I-NEXT: sw a6, 148(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a3, a2, 12 |
| ; RV32I-NEXT: lui t4, 2 |
| ; RV32I-NEXT: and a5, a0, t4 |
| ; RV32I-NEXT: and a3, a6, a3 |
| ; RV32I-NEXT: seqz a5, a5 |
| ; RV32I-NEXT: xor a3, a4, a3 |
| ; RV32I-NEXT: addi a6, a5, -1 |
| ; RV32I-NEXT: sw a6, 144(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a4, a2, 13 |
| ; RV32I-NEXT: lui t6, 4 |
| ; RV32I-NEXT: and a5, a0, t6 |
| ; RV32I-NEXT: and a4, a6, a4 |
| ; RV32I-NEXT: seqz a5, a5 |
| ; RV32I-NEXT: xor a3, a3, a4 |
| ; RV32I-NEXT: addi a6, a5, -1 |
| ; RV32I-NEXT: sw a6, 140(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a4, a2, 14 |
| ; RV32I-NEXT: lui s0, 8 |
| ; RV32I-NEXT: and a5, a0, s0 |
| ; RV32I-NEXT: and a4, a6, a4 |
| ; RV32I-NEXT: seqz a5, a5 |
| ; RV32I-NEXT: addi a6, a5, -1 |
| ; RV32I-NEXT: sw a6, 132(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a5, a2, 15 |
| ; RV32I-NEXT: xor a3, a3, a4 |
| ; RV32I-NEXT: and a4, a6, a5 |
| ; RV32I-NEXT: xor a3, a3, a4 |
| ; RV32I-NEXT: lui t2, 16 |
| ; RV32I-NEXT: and a4, a0, t2 |
| ; RV32I-NEXT: xor a1, a1, a3 |
| ; RV32I-NEXT: seqz a3, a4 |
| ; RV32I-NEXT: addi a5, a3, -1 |
| ; RV32I-NEXT: sw a5, 128(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: and a3, a0, s8 |
| ; RV32I-NEXT: seqz a3, a3 |
| ; RV32I-NEXT: slli a4, a2, 16 |
| ; RV32I-NEXT: and a4, a5, a4 |
| ; RV32I-NEXT: addi a6, a3, -1 |
| ; RV32I-NEXT: sw a6, 124(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a3, a2, 17 |
| ; RV32I-NEXT: and a5, a0, s5 |
| ; RV32I-NEXT: and a3, a6, a3 |
| ; RV32I-NEXT: seqz a5, a5 |
| ; RV32I-NEXT: xor a3, a4, a3 |
| ; RV32I-NEXT: addi a6, a5, -1 |
| ; RV32I-NEXT: sw a6, 120(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a4, a2, 18 |
| ; RV32I-NEXT: and a5, a0, s1 |
| ; RV32I-NEXT: and a4, a6, a4 |
| ; RV32I-NEXT: seqz a5, a5 |
| ; RV32I-NEXT: xor a3, a3, a4 |
| ; RV32I-NEXT: addi a6, a5, -1 |
| ; RV32I-NEXT: sw a6, 116(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a4, a2, 19 |
| ; RV32I-NEXT: lui a5, 256 |
| ; RV32I-NEXT: and a5, a0, a5 |
| ; RV32I-NEXT: lui s1, 256 |
| ; RV32I-NEXT: and a4, a6, a4 |
| ; RV32I-NEXT: seqz a5, a5 |
| ; RV32I-NEXT: xor a3, a3, a4 |
| ; RV32I-NEXT: addi a6, a5, -1 |
| ; RV32I-NEXT: sw a6, 112(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a4, a2, 20 |
| ; RV32I-NEXT: lui a5, 512 |
| ; RV32I-NEXT: and a5, a0, a5 |
| ; RV32I-NEXT: and a4, a6, a4 |
| ; RV32I-NEXT: seqz a5, a5 |
| ; RV32I-NEXT: xor a3, a3, a4 |
| ; RV32I-NEXT: addi a6, a5, -1 |
| ; RV32I-NEXT: sw a6, 108(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a4, a2, 21 |
| ; RV32I-NEXT: lui a5, 1024 |
| ; RV32I-NEXT: and a5, a0, a5 |
| ; RV32I-NEXT: and a4, a6, a4 |
| ; RV32I-NEXT: seqz a5, a5 |
| ; RV32I-NEXT: xor a3, a3, a4 |
| ; RV32I-NEXT: addi a6, a5, -1 |
| ; RV32I-NEXT: sw a6, 104(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a4, a2, 22 |
| ; RV32I-NEXT: lui a5, 2048 |
| ; RV32I-NEXT: and a5, a0, a5 |
| ; RV32I-NEXT: and a4, a6, a4 |
| ; RV32I-NEXT: seqz a5, a5 |
| ; RV32I-NEXT: addi a6, a5, -1 |
| ; RV32I-NEXT: sw a6, 100(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a5, a2, 23 |
| ; RV32I-NEXT: and a5, a6, a5 |
| ; RV32I-NEXT: lui a6, 4096 |
| ; RV32I-NEXT: and a6, a0, a6 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: seqz a5, a6 |
| ; RV32I-NEXT: addi a6, a5, -1 |
| ; RV32I-NEXT: sw a6, 96(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a5, a2, 24 |
| ; RV32I-NEXT: and a5, a6, a5 |
| ; RV32I-NEXT: lui a6, 8192 |
| ; RV32I-NEXT: and a6, a0, a6 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: seqz a5, a6 |
| ; RV32I-NEXT: addi a6, a5, -1 |
| ; RV32I-NEXT: sw a6, 92(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a5, a2, 25 |
| ; RV32I-NEXT: and a5, a6, a5 |
| ; RV32I-NEXT: and a6, a0, ra |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: seqz a5, a6 |
| ; RV32I-NEXT: addi a6, a5, -1 |
| ; RV32I-NEXT: sw a6, 88(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a5, a2, 26 |
| ; RV32I-NEXT: and a5, a6, a5 |
| ; RV32I-NEXT: and a6, a0, s6 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: seqz a5, a6 |
| ; RV32I-NEXT: lw a6, 0(t1) |
| ; RV32I-NEXT: addi t1, a5, -1 |
| ; RV32I-NEXT: sw t1, 84(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a5, a2, 27 |
| ; RV32I-NEXT: and a7, a0, s7 |
| ; RV32I-NEXT: and a5, t1, a5 |
| ; RV32I-NEXT: seqz a7, a7 |
| ; RV32I-NEXT: addi t1, a7, -1 |
| ; RV32I-NEXT: sw t1, 80(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a7, a2, 28 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: and a5, t1, a7 |
| ; RV32I-NEXT: xor a1, a1, a3 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: srli a3, a6, 8 |
| ; RV32I-NEXT: and a5, a6, s4 |
| ; RV32I-NEXT: and a3, a3, s4 |
| ; RV32I-NEXT: slli a5, a5, 8 |
| ; RV32I-NEXT: srli a7, a6, 24 |
| ; RV32I-NEXT: slli a6, a6, 24 |
| ; RV32I-NEXT: or a3, a3, a7 |
| ; RV32I-NEXT: or a5, a6, a5 |
| ; RV32I-NEXT: xor a1, a1, a4 |
| ; RV32I-NEXT: sw a1, 64(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: or a3, a5, a3 |
| ; RV32I-NEXT: lui t3, 131072 |
| ; RV32I-NEXT: and a1, a0, t3 |
| ; RV32I-NEXT: lui a4, 262144 |
| ; RV32I-NEXT: and a0, a0, a4 |
| ; RV32I-NEXT: seqz a1, a1 |
| ; RV32I-NEXT: seqz a0, a0 |
| ; RV32I-NEXT: addi a4, a1, -1 |
| ; RV32I-NEXT: sw a4, 72(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: addi a5, a0, -1 |
| ; RV32I-NEXT: sw a5, 68(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a0, a2, 29 |
| ; RV32I-NEXT: slli a1, a2, 30 |
| ; RV32I-NEXT: and a0, a4, a0 |
| ; RV32I-NEXT: and a1, a5, a1 |
| ; RV32I-NEXT: srli a4, a3, 4 |
| ; RV32I-NEXT: and a3, a3, s3 |
| ; RV32I-NEXT: and a4, a4, s3 |
| ; RV32I-NEXT: slli a3, a3, 4 |
| ; RV32I-NEXT: xor a1, a0, a1 |
| ; RV32I-NEXT: or a3, a4, a3 |
| ; RV32I-NEXT: srli a0, a3, 2 |
| ; RV32I-NEXT: and a3, a3, s2 |
| ; RV32I-NEXT: and a0, a0, s2 |
| ; RV32I-NEXT: slli a3, a3, 2 |
| ; RV32I-NEXT: or a0, a0, a3 |
| ; RV32I-NEXT: srli a3, s11, 31 |
| ; RV32I-NEXT: slli a2, a2, 31 |
| ; RV32I-NEXT: seqz a3, a3 |
| ; RV32I-NEXT: srli a4, a0, 1 |
| ; RV32I-NEXT: and ra, a0, s9 |
| ; RV32I-NEXT: and a0, a4, s9 |
| ; RV32I-NEXT: slli ra, ra, 1 |
| ; RV32I-NEXT: addi a3, a3, -1 |
| ; RV32I-NEXT: sw a3, 76(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: or a0, a0, ra |
| ; RV32I-NEXT: and a2, a3, a2 |
| ; RV32I-NEXT: andi a3, a0, 2 |
| ; RV32I-NEXT: seqz a3, a3 |
| ; RV32I-NEXT: andi a4, a0, 1 |
| ; RV32I-NEXT: addi a3, a3, -1 |
| ; RV32I-NEXT: seqz a4, a4 |
| ; RV32I-NEXT: addi a4, a4, -1 |
| ; RV32I-NEXT: slli a5, t0, 1 |
| ; RV32I-NEXT: sw a5, 60(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: and a3, a3, a5 |
| ; RV32I-NEXT: and a4, a4, t0 |
| ; RV32I-NEXT: xor a1, a1, a2 |
| ; RV32I-NEXT: sw a1, 36(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: xor a3, a4, a3 |
| ; RV32I-NEXT: andi a1, a0, 4 |
| ; RV32I-NEXT: andi a2, a0, 8 |
| ; RV32I-NEXT: seqz a1, a1 |
| ; RV32I-NEXT: seqz a2, a2 |
| ; RV32I-NEXT: addi a1, a1, -1 |
| ; RV32I-NEXT: addi a2, a2, -1 |
| ; RV32I-NEXT: slli a4, t0, 2 |
| ; RV32I-NEXT: sw a4, 56(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a5, t0, 3 |
| ; RV32I-NEXT: sw a5, 52(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: and a1, a1, a4 |
| ; RV32I-NEXT: and a2, a2, a5 |
| ; RV32I-NEXT: xor a1, a1, a2 |
| ; RV32I-NEXT: andi a2, a0, 16 |
| ; RV32I-NEXT: xor a1, a3, a1 |
| ; RV32I-NEXT: seqz a2, a2 |
| ; RV32I-NEXT: addi a2, a2, -1 |
| ; RV32I-NEXT: andi a3, a0, 32 |
| ; RV32I-NEXT: seqz a3, a3 |
| ; RV32I-NEXT: slli a4, t0, 4 |
| ; RV32I-NEXT: sw a4, 48(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: and a2, a2, a4 |
| ; RV32I-NEXT: addi a3, a3, -1 |
| ; RV32I-NEXT: slli a5, t0, 5 |
| ; RV32I-NEXT: sw a5, 44(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: andi a4, a0, 64 |
| ; RV32I-NEXT: and a3, a3, a5 |
| ; RV32I-NEXT: seqz a4, a4 |
| ; RV32I-NEXT: addi a4, a4, -1 |
| ; RV32I-NEXT: slli a5, t0, 6 |
| ; RV32I-NEXT: sw a5, 40(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: xor a2, a2, a3 |
| ; RV32I-NEXT: and a3, a4, a5 |
| ; RV32I-NEXT: xor a2, a2, a3 |
| ; RV32I-NEXT: andi a3, a0, 128 |
| ; RV32I-NEXT: xor a1, a1, a2 |
| ; RV32I-NEXT: seqz a2, a3 |
| ; RV32I-NEXT: addi a2, a2, -1 |
| ; RV32I-NEXT: andi a3, a0, 256 |
| ; RV32I-NEXT: seqz a3, a3 |
| ; RV32I-NEXT: slli a4, t0, 7 |
| ; RV32I-NEXT: sw a4, 32(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: and a2, a2, a4 |
| ; RV32I-NEXT: addi a3, a3, -1 |
| ; RV32I-NEXT: slli a5, t0, 8 |
| ; RV32I-NEXT: sw a5, 28(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: andi a4, a0, 512 |
| ; RV32I-NEXT: and a3, a3, a5 |
| ; RV32I-NEXT: seqz a4, a4 |
| ; RV32I-NEXT: xor a2, a2, a3 |
| ; RV32I-NEXT: addi a4, a4, -1 |
| ; RV32I-NEXT: slli a5, t0, 9 |
| ; RV32I-NEXT: sw a5, 24(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: andi a3, a0, 1024 |
| ; RV32I-NEXT: and a4, a4, a5 |
| ; RV32I-NEXT: seqz a3, a3 |
| ; RV32I-NEXT: addi a3, a3, -1 |
| ; RV32I-NEXT: slli a5, t0, 10 |
| ; RV32I-NEXT: sw a5, 20(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: and a3, a3, a5 |
| ; RV32I-NEXT: xor a2, a2, a3 |
| ; RV32I-NEXT: and a3, a0, t5 |
| ; RV32I-NEXT: xor a1, a1, a2 |
| ; RV32I-NEXT: seqz a2, a3 |
| ; RV32I-NEXT: addi a2, a2, -1 |
| ; RV32I-NEXT: and a3, a0, s10 |
| ; RV32I-NEXT: seqz a3, a3 |
| ; RV32I-NEXT: slli a4, t0, 11 |
| ; RV32I-NEXT: sw a4, 16(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: and a2, a2, a4 |
| ; RV32I-NEXT: addi a3, a3, -1 |
| ; RV32I-NEXT: slli a5, t0, 12 |
| ; RV32I-NEXT: sw a5, 12(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: and a4, a0, t4 |
| ; RV32I-NEXT: and a3, a3, a5 |
| ; RV32I-NEXT: seqz a4, a4 |
| ; RV32I-NEXT: xor a2, a2, a3 |
| ; RV32I-NEXT: addi a4, a4, -1 |
| ; RV32I-NEXT: slli a5, t0, 13 |
| ; RV32I-NEXT: sw a5, 8(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: and a3, a0, t6 |
| ; RV32I-NEXT: and a4, a4, a5 |
| ; RV32I-NEXT: seqz a3, a3 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: addi a3, a3, -1 |
| ; RV32I-NEXT: slli s11, t0, 14 |
| ; RV32I-NEXT: and a4, a0, s0 |
| ; RV32I-NEXT: and a3, a3, s11 |
| ; RV32I-NEXT: seqz a4, a4 |
| ; RV32I-NEXT: addi a4, a4, -1 |
| ; RV32I-NEXT: slli s10, t0, 15 |
| ; RV32I-NEXT: xor a2, a2, a3 |
| ; RV32I-NEXT: and a3, a4, s10 |
| ; RV32I-NEXT: xor a2, a2, a3 |
| ; RV32I-NEXT: and a3, a0, t2 |
| ; RV32I-NEXT: xor a1, a1, a2 |
| ; RV32I-NEXT: seqz a2, a3 |
| ; RV32I-NEXT: addi a2, a2, -1 |
| ; RV32I-NEXT: and a3, a0, s8 |
| ; RV32I-NEXT: seqz a3, a3 |
| ; RV32I-NEXT: slli s8, t0, 16 |
| ; RV32I-NEXT: and a2, a2, s8 |
| ; RV32I-NEXT: addi a3, a3, -1 |
| ; RV32I-NEXT: slli s7, t0, 17 |
| ; RV32I-NEXT: and a4, a0, s5 |
| ; RV32I-NEXT: and a3, a3, s7 |
| ; RV32I-NEXT: seqz a4, a4 |
| ; RV32I-NEXT: xor a2, a2, a3 |
| ; RV32I-NEXT: addi a4, a4, -1 |
| ; RV32I-NEXT: slli s6, t0, 18 |
| ; RV32I-NEXT: lui a3, 128 |
| ; RV32I-NEXT: and a3, a0, a3 |
| ; RV32I-NEXT: and a4, a4, s6 |
| ; RV32I-NEXT: seqz a3, a3 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: addi a3, a3, -1 |
| ; RV32I-NEXT: slli s5, t0, 19 |
| ; RV32I-NEXT: and a4, a0, s1 |
| ; RV32I-NEXT: and a3, a3, s5 |
| ; RV32I-NEXT: seqz a4, a4 |
| ; RV32I-NEXT: xor a2, a2, a3 |
| ; RV32I-NEXT: addi a4, a4, -1 |
| ; RV32I-NEXT: slli s1, t0, 20 |
| ; RV32I-NEXT: lui a3, 512 |
| ; RV32I-NEXT: and a3, a0, a3 |
| ; RV32I-NEXT: and a4, a4, s1 |
| ; RV32I-NEXT: seqz a3, a3 |
| ; RV32I-NEXT: addi a3, a3, -1 |
| ; RV32I-NEXT: slli s0, t0, 21 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: and a3, a3, s0 |
| ; RV32I-NEXT: xor a2, a2, a3 |
| ; RV32I-NEXT: lui a4, 1024 |
| ; RV32I-NEXT: and a4, a0, a4 |
| ; RV32I-NEXT: xor a6, a1, a2 |
| ; RV32I-NEXT: seqz a1, a4 |
| ; RV32I-NEXT: addi a1, a1, -1 |
| ; RV32I-NEXT: lui a2, 2048 |
| ; RV32I-NEXT: and a2, a0, a2 |
| ; RV32I-NEXT: seqz a2, a2 |
| ; RV32I-NEXT: slli t6, t0, 22 |
| ; RV32I-NEXT: and a1, a1, t6 |
| ; RV32I-NEXT: addi a2, a2, -1 |
| ; RV32I-NEXT: slli t5, t0, 23 |
| ; RV32I-NEXT: lui a4, 4096 |
| ; RV32I-NEXT: and a4, a0, a4 |
| ; RV32I-NEXT: and a2, a2, t5 |
| ; RV32I-NEXT: seqz a4, a4 |
| ; RV32I-NEXT: xor a1, a1, a2 |
| ; RV32I-NEXT: addi a4, a4, -1 |
| ; RV32I-NEXT: lw t4, 200(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a2, a4, t4 |
| ; RV32I-NEXT: lui a4, 8192 |
| ; RV32I-NEXT: and a4, a0, a4 |
| ; RV32I-NEXT: xor a1, a1, a2 |
| ; RV32I-NEXT: seqz a2, a4 |
| ; RV32I-NEXT: addi a2, a2, -1 |
| ; RV32I-NEXT: slli t2, t0, 25 |
| ; RV32I-NEXT: and a2, a2, t2 |
| ; RV32I-NEXT: lui a4, 16384 |
| ; RV32I-NEXT: and a4, a0, a4 |
| ; RV32I-NEXT: xor a1, a1, a2 |
| ; RV32I-NEXT: seqz a2, a4 |
| ; RV32I-NEXT: addi a2, a2, -1 |
| ; RV32I-NEXT: slli t1, t0, 26 |
| ; RV32I-NEXT: and a2, a2, t1 |
| ; RV32I-NEXT: lui a4, 32768 |
| ; RV32I-NEXT: and a4, a0, a4 |
| ; RV32I-NEXT: xor a3, a1, a2 |
| ; RV32I-NEXT: seqz a2, a4 |
| ; RV32I-NEXT: addi a2, a2, -1 |
| ; RV32I-NEXT: slli a7, t0, 27 |
| ; RV32I-NEXT: and a2, a2, a7 |
| ; RV32I-NEXT: lui a1, 65536 |
| ; RV32I-NEXT: and a1, a0, a1 |
| ; RV32I-NEXT: xor a3, a3, a2 |
| ; RV32I-NEXT: seqz a1, a1 |
| ; RV32I-NEXT: addi a1, a1, -1 |
| ; RV32I-NEXT: slli a5, t0, 28 |
| ; RV32I-NEXT: and a2, a1, a5 |
| ; RV32I-NEXT: and a1, a0, t3 |
| ; RV32I-NEXT: xor a2, a3, a2 |
| ; RV32I-NEXT: seqz a1, a1 |
| ; RV32I-NEXT: addi a3, a1, -1 |
| ; RV32I-NEXT: lui a1, 262144 |
| ; RV32I-NEXT: and a0, a0, a1 |
| ; RV32I-NEXT: seqz a0, a0 |
| ; RV32I-NEXT: slli a4, t0, 29 |
| ; RV32I-NEXT: and a3, a3, a4 |
| ; RV32I-NEXT: addi a1, a0, -1 |
| ; RV32I-NEXT: srli a0, ra, 31 |
| ; RV32I-NEXT: slli ra, t0, 30 |
| ; RV32I-NEXT: and a1, a1, ra |
| ; RV32I-NEXT: seqz a0, a0 |
| ; RV32I-NEXT: addi a0, a0, -1 |
| ; RV32I-NEXT: slli t3, t0, 31 |
| ; RV32I-NEXT: xor a1, a3, a1 |
| ; RV32I-NEXT: and a0, a0, t3 |
| ; RV32I-NEXT: xor a2, a6, a2 |
| ; RV32I-NEXT: xor a0, a1, a0 |
| ; RV32I-NEXT: lw a1, 64(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw a3, 36(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: xor a1, a1, a3 |
| ; RV32I-NEXT: xor a0, a2, a0 |
| ; RV32I-NEXT: xor a0, a0, a1 |
| ; RV32I-NEXT: lw a1, 212(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: srli a1, a1, 1 |
| ; RV32I-NEXT: xor a0, a1, a0 |
| ; RV32I-NEXT: srli a1, a0, 8 |
| ; RV32I-NEXT: and a1, a1, s4 |
| ; RV32I-NEXT: srli a2, a0, 24 |
| ; RV32I-NEXT: and a3, a0, s4 |
| ; RV32I-NEXT: slli a0, a0, 24 |
| ; RV32I-NEXT: slli a3, a3, 8 |
| ; RV32I-NEXT: or a1, a1, a2 |
| ; RV32I-NEXT: or a0, a0, a3 |
| ; RV32I-NEXT: or a0, a0, a1 |
| ; RV32I-NEXT: srli a1, a0, 4 |
| ; RV32I-NEXT: and a0, a0, s3 |
| ; RV32I-NEXT: and a1, a1, s3 |
| ; RV32I-NEXT: slli a0, a0, 4 |
| ; RV32I-NEXT: or a0, a1, a0 |
| ; RV32I-NEXT: srli a1, a0, 2 |
| ; RV32I-NEXT: and a0, a0, s2 |
| ; RV32I-NEXT: and a1, a1, s2 |
| ; RV32I-NEXT: slli a0, a0, 2 |
| ; RV32I-NEXT: or a0, a1, a0 |
| ; RV32I-NEXT: srli a1, a0, 1 |
| ; RV32I-NEXT: and a0, a0, s9 |
| ; RV32I-NEXT: lw a2, 232(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a1, a1, a2 |
| ; RV32I-NEXT: slli a0, a0, 1 |
| ; RV32I-NEXT: or a0, a1, a0 |
| ; RV32I-NEXT: sw a0, 212(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: lw a0, 196(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw a1, 60(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a0, a0, a1 |
| ; RV32I-NEXT: lw a1, 192(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a1, a1, t0 |
| ; RV32I-NEXT: lw a2, 188(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw a3, 56(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a2, a2, a3 |
| ; RV32I-NEXT: lw a3, 184(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw a6, 52(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a3, a3, a6 |
| ; RV32I-NEXT: xor a0, a1, a0 |
| ; RV32I-NEXT: xor a2, a2, a3 |
| ; RV32I-NEXT: lw a1, 180(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw a3, 48(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a1, a1, a3 |
| ; RV32I-NEXT: lw a3, 176(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw a6, 44(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a3, a3, a6 |
| ; RV32I-NEXT: xor a1, a1, a3 |
| ; RV32I-NEXT: lw a3, 172(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw a6, 40(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a3, a3, a6 |
| ; RV32I-NEXT: xor a0, a0, a2 |
| ; RV32I-NEXT: xor a1, a1, a3 |
| ; RV32I-NEXT: lw a2, 168(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw a3, 32(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a2, a2, a3 |
| ; RV32I-NEXT: lw a3, 164(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw a6, 28(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a3, a3, a6 |
| ; RV32I-NEXT: xor a2, a2, a3 |
| ; RV32I-NEXT: lw a3, 160(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw a6, 24(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a3, a3, a6 |
| ; RV32I-NEXT: xor a2, a2, a3 |
| ; RV32I-NEXT: lw a3, 156(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw a6, 20(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a3, a3, a6 |
| ; RV32I-NEXT: xor a0, a0, a1 |
| ; RV32I-NEXT: xor a2, a2, a3 |
| ; RV32I-NEXT: lw a1, 152(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw a3, 16(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a1, a1, a3 |
| ; RV32I-NEXT: lw a3, 148(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw a6, 12(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a3, a3, a6 |
| ; RV32I-NEXT: xor a1, a1, a3 |
| ; RV32I-NEXT: lw a3, 144(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw a6, 8(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a3, a3, a6 |
| ; RV32I-NEXT: xor a1, a1, a3 |
| ; RV32I-NEXT: lw a3, 140(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a3, a3, s11 |
| ; RV32I-NEXT: xor a1, a1, a3 |
| ; RV32I-NEXT: lw a3, 132(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a3, a3, s10 |
| ; RV32I-NEXT: xor a0, a0, a2 |
| ; RV32I-NEXT: xor a1, a1, a3 |
| ; RV32I-NEXT: lw a2, 128(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a2, a2, s8 |
| ; RV32I-NEXT: lw a3, 124(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a3, a3, s7 |
| ; RV32I-NEXT: xor a2, a2, a3 |
| ; RV32I-NEXT: lw a3, 120(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a3, a3, s6 |
| ; RV32I-NEXT: xor a2, a2, a3 |
| ; RV32I-NEXT: lw a3, 116(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a3, a3, s5 |
| ; RV32I-NEXT: xor a2, a2, a3 |
| ; RV32I-NEXT: lw a3, 112(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a3, a3, s1 |
| ; RV32I-NEXT: xor a2, a2, a3 |
| ; RV32I-NEXT: lw a3, 108(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a3, a3, s0 |
| ; RV32I-NEXT: xor a0, a0, a1 |
| ; RV32I-NEXT: xor a2, a2, a3 |
| ; RV32I-NEXT: lw a1, 104(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a1, a1, t6 |
| ; RV32I-NEXT: lw a3, 100(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a3, a3, t5 |
| ; RV32I-NEXT: xor a1, a1, a3 |
| ; RV32I-NEXT: lw a3, 96(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a3, a3, t4 |
| ; RV32I-NEXT: xor a1, a1, a3 |
| ; RV32I-NEXT: lw a3, 92(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a3, a3, t2 |
| ; RV32I-NEXT: xor a1, a1, a3 |
| ; RV32I-NEXT: lw a3, 88(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a3, a3, t1 |
| ; RV32I-NEXT: xor a1, a1, a3 |
| ; RV32I-NEXT: lw a3, 84(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a3, a3, a7 |
| ; RV32I-NEXT: xor a1, a1, a3 |
| ; RV32I-NEXT: lw a3, 80(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a3, a3, a5 |
| ; RV32I-NEXT: xor a0, a0, a2 |
| ; RV32I-NEXT: xor a1, a1, a3 |
| ; RV32I-NEXT: lw a2, 72(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a2, a2, a4 |
| ; RV32I-NEXT: lw a3, 68(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a3, a3, ra |
| ; RV32I-NEXT: xor t4, a0, a1 |
| ; RV32I-NEXT: xor a1, a2, a3 |
| ; RV32I-NEXT: lw a4, 208(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: srli a0, a4, 8 |
| ; RV32I-NEXT: and a2, a4, s4 |
| ; RV32I-NEXT: and a0, a0, s4 |
| ; RV32I-NEXT: slli a2, a2, 8 |
| ; RV32I-NEXT: srli a3, a4, 24 |
| ; RV32I-NEXT: slli a4, a4, 24 |
| ; RV32I-NEXT: or a3, a0, a3 |
| ; RV32I-NEXT: or a2, a4, a2 |
| ; RV32I-NEXT: lw a0, 76(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a0, a0, t3 |
| ; RV32I-NEXT: or a2, a2, a3 |
| ; RV32I-NEXT: lw a6, 204(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: srli a3, a6, 8 |
| ; RV32I-NEXT: and a4, a6, s4 |
| ; RV32I-NEXT: and a3, a3, s4 |
| ; RV32I-NEXT: slli a4, a4, 8 |
| ; RV32I-NEXT: srli a5, a6, 24 |
| ; RV32I-NEXT: slli a6, a6, 24 |
| ; RV32I-NEXT: or a3, a3, a5 |
| ; RV32I-NEXT: or a4, a6, a4 |
| ; RV32I-NEXT: srli a5, a2, 4 |
| ; RV32I-NEXT: and a2, a2, s3 |
| ; RV32I-NEXT: and a5, a5, s3 |
| ; RV32I-NEXT: slli a2, a2, 4 |
| ; RV32I-NEXT: or a2, a5, a2 |
| ; RV32I-NEXT: or a3, a4, a3 |
| ; RV32I-NEXT: srli a4, a2, 2 |
| ; RV32I-NEXT: and a2, a2, s2 |
| ; RV32I-NEXT: and a4, a4, s2 |
| ; RV32I-NEXT: slli a2, a2, 2 |
| ; RV32I-NEXT: srli a5, a3, 4 |
| ; RV32I-NEXT: and a3, a3, s3 |
| ; RV32I-NEXT: and a5, a5, s3 |
| ; RV32I-NEXT: slli a3, a3, 4 |
| ; RV32I-NEXT: or a2, a4, a2 |
| ; RV32I-NEXT: or a5, a5, a3 |
| ; RV32I-NEXT: srli a3, a2, 1 |
| ; RV32I-NEXT: and a2, a2, s9 |
| ; RV32I-NEXT: and a3, a3, s9 |
| ; RV32I-NEXT: slli a2, a2, 1 |
| ; RV32I-NEXT: or a3, a3, a2 |
| ; RV32I-NEXT: srli a2, a5, 2 |
| ; RV32I-NEXT: and a2, a2, s2 |
| ; RV32I-NEXT: and a4, a5, s2 |
| ; RV32I-NEXT: slli a4, a4, 2 |
| ; RV32I-NEXT: srli a5, a3, 8 |
| ; RV32I-NEXT: or a2, a2, a4 |
| ; RV32I-NEXT: and a4, a5, s4 |
| ; RV32I-NEXT: srli a5, a2, 1 |
| ; RV32I-NEXT: and a2, a2, s9 |
| ; RV32I-NEXT: and a5, a5, s9 |
| ; RV32I-NEXT: slli a2, a2, 1 |
| ; RV32I-NEXT: sw a2, 204(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: or t1, a5, a2 |
| ; RV32I-NEXT: srli a2, a3, 24 |
| ; RV32I-NEXT: or a2, a4, a2 |
| ; RV32I-NEXT: srli a4, t1, 8 |
| ; RV32I-NEXT: and a4, a4, s4 |
| ; RV32I-NEXT: srli a5, t1, 24 |
| ; RV32I-NEXT: or a4, a4, a5 |
| ; RV32I-NEXT: and a5, t1, s4 |
| ; RV32I-NEXT: slli a5, a5, 8 |
| ; RV32I-NEXT: slli a6, t1, 24 |
| ; RV32I-NEXT: or a5, a6, a5 |
| ; RV32I-NEXT: and a6, a3, s4 |
| ; RV32I-NEXT: slli a6, a6, 8 |
| ; RV32I-NEXT: slli a7, a3, 24 |
| ; RV32I-NEXT: sw a7, 208(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: or a4, a5, a4 |
| ; RV32I-NEXT: or a5, a7, a6 |
| ; RV32I-NEXT: srli a6, a4, 4 |
| ; RV32I-NEXT: and a4, a4, s3 |
| ; RV32I-NEXT: and a6, a6, s3 |
| ; RV32I-NEXT: slli a4, a4, 4 |
| ; RV32I-NEXT: or a2, a5, a2 |
| ; RV32I-NEXT: or a4, a6, a4 |
| ; RV32I-NEXT: srli a5, a2, 4 |
| ; RV32I-NEXT: and a2, a2, s3 |
| ; RV32I-NEXT: and a5, a5, s3 |
| ; RV32I-NEXT: slli a2, a2, 4 |
| ; RV32I-NEXT: srli a6, a4, 2 |
| ; RV32I-NEXT: and a4, a4, s2 |
| ; RV32I-NEXT: and a6, a6, s2 |
| ; RV32I-NEXT: slli a4, a4, 2 |
| ; RV32I-NEXT: or a2, a5, a2 |
| ; RV32I-NEXT: or a4, a6, a4 |
| ; RV32I-NEXT: srli a5, a2, 2 |
| ; RV32I-NEXT: and a2, a2, s2 |
| ; RV32I-NEXT: and a5, a5, s2 |
| ; RV32I-NEXT: slli a2, a2, 2 |
| ; RV32I-NEXT: or a5, a5, a2 |
| ; RV32I-NEXT: srli a2, a4, 1 |
| ; RV32I-NEXT: and a6, a2, s9 |
| ; RV32I-NEXT: and a2, a4, s9 |
| ; RV32I-NEXT: slli a2, a2, 1 |
| ; RV32I-NEXT: srli a4, a5, 1 |
| ; RV32I-NEXT: and a4, a4, s9 |
| ; RV32I-NEXT: or t3, a6, a2 |
| ; RV32I-NEXT: and a5, a5, s9 |
| ; RV32I-NEXT: andi a6, t3, 2 |
| ; RV32I-NEXT: slli a5, a5, 1 |
| ; RV32I-NEXT: seqz a6, a6 |
| ; RV32I-NEXT: or t2, a4, a5 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a4, t2, 1 |
| ; RV32I-NEXT: andi a5, t3, 1 |
| ; RV32I-NEXT: and a4, a6, a4 |
| ; RV32I-NEXT: seqz a5, a5 |
| ; RV32I-NEXT: addi a5, a5, -1 |
| ; RV32I-NEXT: andi a6, t3, 4 |
| ; RV32I-NEXT: and a5, a5, t2 |
| ; RV32I-NEXT: seqz a6, a6 |
| ; RV32I-NEXT: xor a4, a5, a4 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a5, t2, 2 |
| ; RV32I-NEXT: andi a7, t3, 8 |
| ; RV32I-NEXT: and a5, a6, a5 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a7, t2, 3 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: andi a7, t3, 16 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a5, t2, 4 |
| ; RV32I-NEXT: andi a7, t3, 32 |
| ; RV32I-NEXT: and a5, a6, a5 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a7, t2, 5 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: andi a7, t3, 64 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a7, t2, 6 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: andi a7, t3, 128 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a5, t2, 7 |
| ; RV32I-NEXT: andi a7, t3, 256 |
| ; RV32I-NEXT: and a5, a6, a5 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a7, t2, 8 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: andi a7, t3, 512 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a7, t2, 9 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: andi a7, t3, 1024 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a7, t2, 10 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: lw t0, 136(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a7, t3, t0 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a5, t2, 11 |
| ; RV32I-NEXT: lui ra, 1 |
| ; RV32I-NEXT: and a7, t3, ra |
| ; RV32I-NEXT: and a5, a6, a5 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a7, t2, 12 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: lui a7, 2 |
| ; RV32I-NEXT: and a7, t3, a7 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a7, t2, 13 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: lui a7, 4 |
| ; RV32I-NEXT: and a7, t3, a7 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a7, t2, 14 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: lui a7, 8 |
| ; RV32I-NEXT: and a7, t3, a7 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a7, t2, 15 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: lui s10, 16 |
| ; RV32I-NEXT: and a7, t3, s10 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a5, t2, 16 |
| ; RV32I-NEXT: lui s11, 32 |
| ; RV32I-NEXT: and a7, t3, s11 |
| ; RV32I-NEXT: and a5, a6, a5 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a7, t2, 17 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: lui t5, 64 |
| ; RV32I-NEXT: and a7, t3, t5 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a7, t2, 18 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: lui t6, 128 |
| ; RV32I-NEXT: and a7, t3, t6 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a7, t2, 19 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: lui s0, 256 |
| ; RV32I-NEXT: and a7, t3, s0 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a7, t2, 20 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: lui s1, 512 |
| ; RV32I-NEXT: and a7, t3, s1 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a7, t2, 21 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: lui s5, 1024 |
| ; RV32I-NEXT: and a7, t3, s5 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a5, t2, 22 |
| ; RV32I-NEXT: lui s6, 2048 |
| ; RV32I-NEXT: and a7, t3, s6 |
| ; RV32I-NEXT: and a5, a6, a5 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a7, t2, 23 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: lui s7, 4096 |
| ; RV32I-NEXT: and a7, t3, s7 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a7, t2, 24 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: lui s8, 8192 |
| ; RV32I-NEXT: and a7, t3, s8 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a7, t2, 25 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: lui a7, 16384 |
| ; RV32I-NEXT: and a7, t3, a7 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a7, t2, 26 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: lui a7, 32768 |
| ; RV32I-NEXT: and a7, t3, a7 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a7, t2, 27 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: lui a7, 65536 |
| ; RV32I-NEXT: and a7, t3, a7 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a7, t2, 28 |
| ; RV32I-NEXT: and a6, a6, a7 |
| ; RV32I-NEXT: lui a7, 131072 |
| ; RV32I-NEXT: and a7, t3, a7 |
| ; RV32I-NEXT: xor a5, a5, a6 |
| ; RV32I-NEXT: seqz a6, a7 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: lui a7, 262144 |
| ; RV32I-NEXT: and a7, t3, a7 |
| ; RV32I-NEXT: seqz a7, a7 |
| ; RV32I-NEXT: slli t3, t2, 29 |
| ; RV32I-NEXT: and a6, a6, t3 |
| ; RV32I-NEXT: addi a7, a7, -1 |
| ; RV32I-NEXT: srli a2, a2, 31 |
| ; RV32I-NEXT: slli t3, t2, 30 |
| ; RV32I-NEXT: and a7, a7, t3 |
| ; RV32I-NEXT: seqz a2, a2 |
| ; RV32I-NEXT: slli t2, t2, 31 |
| ; RV32I-NEXT: addi a2, a2, -1 |
| ; RV32I-NEXT: xor a6, a6, a7 |
| ; RV32I-NEXT: and a2, a2, t2 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: xor a2, a6, a2 |
| ; RV32I-NEXT: xor a0, a1, a0 |
| ; RV32I-NEXT: xor a2, a4, a2 |
| ; RV32I-NEXT: xor a4, t4, a0 |
| ; RV32I-NEXT: sw a4, 196(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: srli a0, a2, 8 |
| ; RV32I-NEXT: and a0, a0, s4 |
| ; RV32I-NEXT: srli a1, a2, 24 |
| ; RV32I-NEXT: or a0, a0, a1 |
| ; RV32I-NEXT: and a1, a2, s4 |
| ; RV32I-NEXT: slli a2, a2, 24 |
| ; RV32I-NEXT: slli a1, a1, 8 |
| ; RV32I-NEXT: or a1, a2, a1 |
| ; RV32I-NEXT: srli a2, a4, 8 |
| ; RV32I-NEXT: and a2, a2, s4 |
| ; RV32I-NEXT: srli a4, a4, 24 |
| ; RV32I-NEXT: or a2, a2, a4 |
| ; RV32I-NEXT: sw a2, 200(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: or a0, a1, a0 |
| ; RV32I-NEXT: lw a5, 216(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: srli a1, a5, 8 |
| ; RV32I-NEXT: and a2, a5, s4 |
| ; RV32I-NEXT: and a1, a1, s4 |
| ; RV32I-NEXT: slli a2, a2, 8 |
| ; RV32I-NEXT: srli a4, a5, 24 |
| ; RV32I-NEXT: slli a5, a5, 24 |
| ; RV32I-NEXT: or a1, a1, a4 |
| ; RV32I-NEXT: or a2, a5, a2 |
| ; RV32I-NEXT: srli a4, a0, 4 |
| ; RV32I-NEXT: and a0, a0, s3 |
| ; RV32I-NEXT: and a4, a4, s3 |
| ; RV32I-NEXT: slli a0, a0, 4 |
| ; RV32I-NEXT: or a0, a4, a0 |
| ; RV32I-NEXT: or a1, a2, a1 |
| ; RV32I-NEXT: srli a2, a0, 2 |
| ; RV32I-NEXT: and a0, a0, s2 |
| ; RV32I-NEXT: and a2, a2, s2 |
| ; RV32I-NEXT: slli a0, a0, 2 |
| ; RV32I-NEXT: srli a4, a1, 4 |
| ; RV32I-NEXT: and a1, a1, s3 |
| ; RV32I-NEXT: and a4, a4, s3 |
| ; RV32I-NEXT: slli a1, a1, 4 |
| ; RV32I-NEXT: or a0, a2, a0 |
| ; RV32I-NEXT: or a1, a4, a1 |
| ; RV32I-NEXT: srli a2, a1, 2 |
| ; RV32I-NEXT: and a1, a1, s2 |
| ; RV32I-NEXT: and a2, a2, s2 |
| ; RV32I-NEXT: slli a1, a1, 2 |
| ; RV32I-NEXT: or a1, a2, a1 |
| ; RV32I-NEXT: srli a2, a0, 1 |
| ; RV32I-NEXT: lw a4, 232(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a2, a2, a4 |
| ; RV32I-NEXT: and a0, a0, s9 |
| ; RV32I-NEXT: slli a0, a0, 1 |
| ; RV32I-NEXT: srli a4, a1, 1 |
| ; RV32I-NEXT: or a0, a2, a0 |
| ; RV32I-NEXT: sw a0, 172(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: and a0, a4, s9 |
| ; RV32I-NEXT: and a1, a1, s9 |
| ; RV32I-NEXT: andi a2, t1, 2 |
| ; RV32I-NEXT: slli a1, a1, 1 |
| ; RV32I-NEXT: seqz a2, a2 |
| ; RV32I-NEXT: or a0, a0, a1 |
| ; RV32I-NEXT: addi a4, a2, -1 |
| ; RV32I-NEXT: sw a4, 216(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a1, a0, 1 |
| ; RV32I-NEXT: andi a2, t1, 1 |
| ; RV32I-NEXT: and a1, a4, a1 |
| ; RV32I-NEXT: seqz a2, a2 |
| ; RV32I-NEXT: addi a4, a2, -1 |
| ; RV32I-NEXT: sw a4, 192(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: andi a2, t1, 4 |
| ; RV32I-NEXT: seqz a2, a2 |
| ; RV32I-NEXT: and a4, a4, a0 |
| ; RV32I-NEXT: xor a1, a4, a1 |
| ; RV32I-NEXT: addi a5, a2, -1 |
| ; RV32I-NEXT: sw a5, 188(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a2, a0, 2 |
| ; RV32I-NEXT: andi a4, t1, 8 |
| ; RV32I-NEXT: and a2, a5, a2 |
| ; RV32I-NEXT: seqz a4, a4 |
| ; RV32I-NEXT: addi a5, a4, -1 |
| ; RV32I-NEXT: sw a5, 184(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a4, a0, 3 |
| ; RV32I-NEXT: and a4, a5, a4 |
| ; RV32I-NEXT: andi a5, t1, 16 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: xor a1, a1, a2 |
| ; RV32I-NEXT: addi a5, a4, -1 |
| ; RV32I-NEXT: sw a5, 180(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a2, a0, 4 |
| ; RV32I-NEXT: andi a4, t1, 32 |
| ; RV32I-NEXT: and a2, a5, a2 |
| ; RV32I-NEXT: seqz a4, a4 |
| ; RV32I-NEXT: addi a5, a4, -1 |
| ; RV32I-NEXT: sw a5, 176(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a4, a0, 5 |
| ; RV32I-NEXT: and a4, a5, a4 |
| ; RV32I-NEXT: andi a5, t1, 64 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: addi a5, a4, -1 |
| ; RV32I-NEXT: sw a5, 168(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a4, a0, 6 |
| ; RV32I-NEXT: and a4, a5, a4 |
| ; RV32I-NEXT: andi a5, t1, 128 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: xor a1, a1, a2 |
| ; RV32I-NEXT: addi a5, a4, -1 |
| ; RV32I-NEXT: sw a5, 164(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a2, a0, 7 |
| ; RV32I-NEXT: andi a4, t1, 256 |
| ; RV32I-NEXT: and a2, a5, a2 |
| ; RV32I-NEXT: seqz a4, a4 |
| ; RV32I-NEXT: addi a5, a4, -1 |
| ; RV32I-NEXT: sw a5, 160(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a4, a0, 8 |
| ; RV32I-NEXT: and a4, a5, a4 |
| ; RV32I-NEXT: andi a5, t1, 512 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: addi a5, a4, -1 |
| ; RV32I-NEXT: sw a5, 156(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a4, a0, 9 |
| ; RV32I-NEXT: and a4, a5, a4 |
| ; RV32I-NEXT: andi a5, t1, 1024 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: addi a5, a4, -1 |
| ; RV32I-NEXT: sw a5, 152(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a4, a0, 10 |
| ; RV32I-NEXT: and a4, a5, a4 |
| ; RV32I-NEXT: and a5, t1, t0 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: xor a1, a1, a2 |
| ; RV32I-NEXT: addi a5, a4, -1 |
| ; RV32I-NEXT: sw a5, 148(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a2, a0, 11 |
| ; RV32I-NEXT: and a4, t1, ra |
| ; RV32I-NEXT: lui t3, 1 |
| ; RV32I-NEXT: and a2, a5, a2 |
| ; RV32I-NEXT: seqz a4, a4 |
| ; RV32I-NEXT: addi a5, a4, -1 |
| ; RV32I-NEXT: sw a5, 144(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a4, a0, 12 |
| ; RV32I-NEXT: and a4, a5, a4 |
| ; RV32I-NEXT: lui a5, 2 |
| ; RV32I-NEXT: and a5, t1, a5 |
| ; RV32I-NEXT: lui t2, 2 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: addi a5, a4, -1 |
| ; RV32I-NEXT: sw a5, 140(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a4, a0, 13 |
| ; RV32I-NEXT: and a4, a5, a4 |
| ; RV32I-NEXT: lui a5, 4 |
| ; RV32I-NEXT: and a5, t1, a5 |
| ; RV32I-NEXT: lui t4, 4 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: addi a5, a4, -1 |
| ; RV32I-NEXT: sw a5, 132(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a4, a0, 14 |
| ; RV32I-NEXT: and a4, a5, a4 |
| ; RV32I-NEXT: lui a5, 8 |
| ; RV32I-NEXT: and a5, t1, a5 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: addi a5, a4, -1 |
| ; RV32I-NEXT: sw a5, 128(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a4, a0, 15 |
| ; RV32I-NEXT: and a4, a5, a4 |
| ; RV32I-NEXT: and a5, t1, s10 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: xor a1, a1, a2 |
| ; RV32I-NEXT: addi a5, a4, -1 |
| ; RV32I-NEXT: sw a5, 124(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a2, a0, 16 |
| ; RV32I-NEXT: and a4, t1, s11 |
| ; RV32I-NEXT: lui s10, 32 |
| ; RV32I-NEXT: and a2, a5, a2 |
| ; RV32I-NEXT: seqz a4, a4 |
| ; RV32I-NEXT: addi a5, a4, -1 |
| ; RV32I-NEXT: sw a5, 120(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a4, a0, 17 |
| ; RV32I-NEXT: and a4, a5, a4 |
| ; RV32I-NEXT: and a5, t1, t5 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: addi a5, a4, -1 |
| ; RV32I-NEXT: sw a5, 116(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a4, a0, 18 |
| ; RV32I-NEXT: and a4, a5, a4 |
| ; RV32I-NEXT: and a5, t1, t6 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: addi a5, a4, -1 |
| ; RV32I-NEXT: sw a5, 112(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a4, a0, 19 |
| ; RV32I-NEXT: and a4, a5, a4 |
| ; RV32I-NEXT: and a5, t1, s0 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: addi a5, a4, -1 |
| ; RV32I-NEXT: sw a5, 108(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a4, a0, 20 |
| ; RV32I-NEXT: and a4, a5, a4 |
| ; RV32I-NEXT: and a5, t1, s1 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: addi a5, a4, -1 |
| ; RV32I-NEXT: sw a5, 104(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a4, a0, 21 |
| ; RV32I-NEXT: and a4, a5, a4 |
| ; RV32I-NEXT: and a5, t1, s5 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: addi a6, a4, -1 |
| ; RV32I-NEXT: sw a6, 100(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: and a4, t1, s6 |
| ; RV32I-NEXT: seqz a4, a4 |
| ; RV32I-NEXT: slli a5, a0, 22 |
| ; RV32I-NEXT: and a5, a6, a5 |
| ; RV32I-NEXT: addi a7, a4, -1 |
| ; RV32I-NEXT: sw a7, 96(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a4, a0, 23 |
| ; RV32I-NEXT: and a6, t1, s7 |
| ; RV32I-NEXT: and a4, a7, a4 |
| ; RV32I-NEXT: seqz a6, a6 |
| ; RV32I-NEXT: xor a4, a5, a4 |
| ; RV32I-NEXT: addi a7, a6, -1 |
| ; RV32I-NEXT: sw a7, 92(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a5, a0, 24 |
| ; RV32I-NEXT: and a6, t1, s8 |
| ; RV32I-NEXT: and a5, a7, a5 |
| ; RV32I-NEXT: seqz a6, a6 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: addi a7, a6, -1 |
| ; RV32I-NEXT: sw a7, 88(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a5, a0, 25 |
| ; RV32I-NEXT: lui a6, 16384 |
| ; RV32I-NEXT: and a6, t1, a6 |
| ; RV32I-NEXT: and a5, a7, a5 |
| ; RV32I-NEXT: seqz a6, a6 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: addi a7, a6, -1 |
| ; RV32I-NEXT: sw a7, 84(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a5, a0, 26 |
| ; RV32I-NEXT: lui a6, 32768 |
| ; RV32I-NEXT: and a6, t1, a6 |
| ; RV32I-NEXT: and a5, a7, a5 |
| ; RV32I-NEXT: seqz a6, a6 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: addi a7, a6, -1 |
| ; RV32I-NEXT: sw a7, 80(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a5, a0, 27 |
| ; RV32I-NEXT: lui a6, 65536 |
| ; RV32I-NEXT: and a6, t1, a6 |
| ; RV32I-NEXT: and a5, a7, a5 |
| ; RV32I-NEXT: seqz a6, a6 |
| ; RV32I-NEXT: addi a7, a6, -1 |
| ; RV32I-NEXT: sw a7, 76(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a6, a0, 28 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: and a5, a7, a6 |
| ; RV32I-NEXT: xor a1, a1, a2 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: lw a7, 220(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: srli a2, a7, 8 |
| ; RV32I-NEXT: and a5, a7, s4 |
| ; RV32I-NEXT: and a2, a2, s4 |
| ; RV32I-NEXT: slli a5, a5, 8 |
| ; RV32I-NEXT: srli a6, a7, 24 |
| ; RV32I-NEXT: slli a7, a7, 24 |
| ; RV32I-NEXT: or a2, a2, a6 |
| ; RV32I-NEXT: or a5, a7, a5 |
| ; RV32I-NEXT: xor a1, a1, a4 |
| ; RV32I-NEXT: sw a1, 64(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: or a2, a5, a2 |
| ; RV32I-NEXT: lui a7, 131072 |
| ; RV32I-NEXT: and a1, t1, a7 |
| ; RV32I-NEXT: lui a4, 262144 |
| ; RV32I-NEXT: and a4, t1, a4 |
| ; RV32I-NEXT: seqz a1, a1 |
| ; RV32I-NEXT: seqz a4, a4 |
| ; RV32I-NEXT: addi a5, a1, -1 |
| ; RV32I-NEXT: sw a5, 220(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: addi a6, a4, -1 |
| ; RV32I-NEXT: sw a6, 72(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a1, a0, 29 |
| ; RV32I-NEXT: slli a4, a0, 30 |
| ; RV32I-NEXT: and a1, a5, a1 |
| ; RV32I-NEXT: and a4, a6, a4 |
| ; RV32I-NEXT: srli a5, a2, 4 |
| ; RV32I-NEXT: and a2, a2, s3 |
| ; RV32I-NEXT: and a5, a5, s3 |
| ; RV32I-NEXT: slli a2, a2, 4 |
| ; RV32I-NEXT: xor a4, a1, a4 |
| ; RV32I-NEXT: or a2, a5, a2 |
| ; RV32I-NEXT: srli a1, a2, 2 |
| ; RV32I-NEXT: and a2, a2, s2 |
| ; RV32I-NEXT: and a1, a1, s2 |
| ; RV32I-NEXT: slli a2, a2, 2 |
| ; RV32I-NEXT: or a1, a1, a2 |
| ; RV32I-NEXT: lw a2, 204(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: srli a2, a2, 31 |
| ; RV32I-NEXT: slli a5, a0, 31 |
| ; RV32I-NEXT: seqz a0, a2 |
| ; RV32I-NEXT: srli a2, a1, 1 |
| ; RV32I-NEXT: and a1, a1, s9 |
| ; RV32I-NEXT: and a2, a2, s9 |
| ; RV32I-NEXT: slli ra, a1, 1 |
| ; RV32I-NEXT: addi a1, a0, -1 |
| ; RV32I-NEXT: sw a1, 204(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: or a0, a2, ra |
| ; RV32I-NEXT: and a2, a1, a5 |
| ; RV32I-NEXT: andi a5, a0, 2 |
| ; RV32I-NEXT: seqz a5, a5 |
| ; RV32I-NEXT: andi a6, a0, 1 |
| ; RV32I-NEXT: addi a5, a5, -1 |
| ; RV32I-NEXT: seqz a6, a6 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a1, a3, 1 |
| ; RV32I-NEXT: sw a1, 68(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: and a5, a5, a1 |
| ; RV32I-NEXT: and a6, a6, a3 |
| ; RV32I-NEXT: xor a2, a4, a2 |
| ; RV32I-NEXT: sw a2, 32(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: xor a2, a6, a5 |
| ; RV32I-NEXT: andi a4, a0, 4 |
| ; RV32I-NEXT: andi a5, a0, 8 |
| ; RV32I-NEXT: seqz a4, a4 |
| ; RV32I-NEXT: seqz a5, a5 |
| ; RV32I-NEXT: addi a4, a4, -1 |
| ; RV32I-NEXT: addi a5, a5, -1 |
| ; RV32I-NEXT: slli a1, a3, 2 |
| ; RV32I-NEXT: sw a1, 60(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: slli a6, a3, 3 |
| ; RV32I-NEXT: sw a6, 56(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: and a4, a4, a1 |
| ; RV32I-NEXT: and a5, a5, a6 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: andi a5, a0, 16 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: addi a4, a4, -1 |
| ; RV32I-NEXT: andi a5, a0, 32 |
| ; RV32I-NEXT: seqz a5, a5 |
| ; RV32I-NEXT: slli a1, a3, 4 |
| ; RV32I-NEXT: sw a1, 52(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: and a4, a4, a1 |
| ; RV32I-NEXT: addi a5, a5, -1 |
| ; RV32I-NEXT: slli a1, a3, 5 |
| ; RV32I-NEXT: sw a1, 48(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: andi a6, a0, 64 |
| ; RV32I-NEXT: and a5, a5, a1 |
| ; RV32I-NEXT: seqz a6, a6 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a1, a3, 6 |
| ; RV32I-NEXT: sw a1, 44(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: and a5, a6, a1 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: andi a5, a0, 128 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: addi a4, a4, -1 |
| ; RV32I-NEXT: andi a5, a0, 256 |
| ; RV32I-NEXT: seqz a5, a5 |
| ; RV32I-NEXT: slli a1, a3, 7 |
| ; RV32I-NEXT: sw a1, 40(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: and a4, a4, a1 |
| ; RV32I-NEXT: addi a5, a5, -1 |
| ; RV32I-NEXT: slli a1, a3, 8 |
| ; RV32I-NEXT: sw a1, 36(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: andi a6, a0, 512 |
| ; RV32I-NEXT: and a5, a5, a1 |
| ; RV32I-NEXT: seqz a6, a6 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli a1, a3, 9 |
| ; RV32I-NEXT: sw a1, 28(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: andi a5, a0, 1024 |
| ; RV32I-NEXT: and a6, a6, a1 |
| ; RV32I-NEXT: seqz a5, a5 |
| ; RV32I-NEXT: addi a5, a5, -1 |
| ; RV32I-NEXT: slli a1, a3, 10 |
| ; RV32I-NEXT: sw a1, 24(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: xor a4, a4, a6 |
| ; RV32I-NEXT: and a5, a5, a1 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: and a5, a0, t0 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: addi a4, a4, -1 |
| ; RV32I-NEXT: and a5, a0, t3 |
| ; RV32I-NEXT: seqz a5, a5 |
| ; RV32I-NEXT: slli a1, a3, 11 |
| ; RV32I-NEXT: sw a1, 136(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: and a4, a4, a1 |
| ; RV32I-NEXT: addi a5, a5, -1 |
| ; RV32I-NEXT: and a6, a0, t2 |
| ; RV32I-NEXT: slli a1, a3, 12 |
| ; RV32I-NEXT: sw a1, 20(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: and a5, a5, a1 |
| ; RV32I-NEXT: seqz a6, a6 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: and a5, a0, t4 |
| ; RV32I-NEXT: slli a1, a3, 13 |
| ; RV32I-NEXT: sw a1, 16(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: and a6, a6, a1 |
| ; RV32I-NEXT: seqz a5, a5 |
| ; RV32I-NEXT: xor a4, a4, a6 |
| ; RV32I-NEXT: addi a5, a5, -1 |
| ; RV32I-NEXT: lui a1, 8 |
| ; RV32I-NEXT: and a6, a0, a1 |
| ; RV32I-NEXT: slli a1, a3, 14 |
| ; RV32I-NEXT: sw a1, 12(sp) # 4-byte Folded Spill |
| ; RV32I-NEXT: and a5, a5, a1 |
| ; RV32I-NEXT: seqz a6, a6 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: slli s11, a3, 15 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: and a5, a6, s11 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: lui a5, 16 |
| ; RV32I-NEXT: and a5, a0, a5 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: addi a4, a4, -1 |
| ; RV32I-NEXT: and a5, a0, s10 |
| ; RV32I-NEXT: seqz a5, a5 |
| ; RV32I-NEXT: slli s8, a3, 16 |
| ; RV32I-NEXT: and a4, a4, s8 |
| ; RV32I-NEXT: addi a5, a5, -1 |
| ; RV32I-NEXT: and a6, a0, t5 |
| ; RV32I-NEXT: slli s7, a3, 17 |
| ; RV32I-NEXT: and a5, a5, s7 |
| ; RV32I-NEXT: seqz a6, a6 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: and a5, a0, t6 |
| ; RV32I-NEXT: slli s6, a3, 18 |
| ; RV32I-NEXT: and a6, a6, s6 |
| ; RV32I-NEXT: seqz a5, a5 |
| ; RV32I-NEXT: xor a4, a4, a6 |
| ; RV32I-NEXT: addi a5, a5, -1 |
| ; RV32I-NEXT: and a6, a0, s0 |
| ; RV32I-NEXT: slli s5, a3, 19 |
| ; RV32I-NEXT: and a5, a5, s5 |
| ; RV32I-NEXT: seqz a6, a6 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: addi a6, a6, -1 |
| ; RV32I-NEXT: and a5, a0, s1 |
| ; RV32I-NEXT: slli s1, a3, 20 |
| ; RV32I-NEXT: and a6, a6, s1 |
| ; RV32I-NEXT: seqz a5, a5 |
| ; RV32I-NEXT: addi a5, a5, -1 |
| ; RV32I-NEXT: slli s0, a3, 21 |
| ; RV32I-NEXT: xor a4, a4, a6 |
| ; RV32I-NEXT: and a5, a5, s0 |
| ; RV32I-NEXT: xor a4, a4, a5 |
| ; RV32I-NEXT: lui a5, 1024 |
| ; RV32I-NEXT: and a5, a0, a5 |
| ; RV32I-NEXT: xor s10, a2, a4 |
| ; RV32I-NEXT: seqz a2, a5 |
| ; RV32I-NEXT: addi a2, a2, -1 |
| ; RV32I-NEXT: lui a4, 2048 |
| ; RV32I-NEXT: and a4, a0, a4 |
| ; RV32I-NEXT: seqz a4, a4 |
| ; RV32I-NEXT: slli t6, a3, 22 |
| ; RV32I-NEXT: and a2, a2, t6 |
| ; RV32I-NEXT: addi a4, a4, -1 |
| ; RV32I-NEXT: lui a5, 4096 |
| ; RV32I-NEXT: and a5, a0, a5 |
| ; RV32I-NEXT: slli t5, a3, 23 |
| ; RV32I-NEXT: and a4, a4, t5 |
| ; RV32I-NEXT: seqz a5, a5 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: addi a5, a5, -1 |
| ; RV32I-NEXT: lw t4, 208(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a4, a5, t4 |
| ; RV32I-NEXT: lui a5, 8192 |
| ; RV32I-NEXT: and a5, a0, a5 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: addi a4, a4, -1 |
| ; RV32I-NEXT: slli t3, a3, 25 |
| ; RV32I-NEXT: and a4, a4, t3 |
| ; RV32I-NEXT: lui a5, 16384 |
| ; RV32I-NEXT: and a5, a0, a5 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: addi a4, a4, -1 |
| ; RV32I-NEXT: slli t2, a3, 26 |
| ; RV32I-NEXT: and a4, a4, t2 |
| ; RV32I-NEXT: lui a5, 32768 |
| ; RV32I-NEXT: and a5, a0, a5 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: addi a4, a4, -1 |
| ; RV32I-NEXT: slli t1, a3, 27 |
| ; RV32I-NEXT: and a4, a4, t1 |
| ; RV32I-NEXT: lui a5, 65536 |
| ; RV32I-NEXT: and a5, a0, a5 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: seqz a4, a5 |
| ; RV32I-NEXT: addi a4, a4, -1 |
| ; RV32I-NEXT: slli t0, a3, 28 |
| ; RV32I-NEXT: and a4, a4, t0 |
| ; RV32I-NEXT: and a1, a0, a7 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: seqz a1, a1 |
| ; RV32I-NEXT: lui a4, 262144 |
| ; RV32I-NEXT: and a0, a0, a4 |
| ; RV32I-NEXT: addi a1, a1, -1 |
| ; RV32I-NEXT: seqz a0, a0 |
| ; RV32I-NEXT: slli a7, a3, 29 |
| ; RV32I-NEXT: and a1, a1, a7 |
| ; RV32I-NEXT: addi a0, a0, -1 |
| ; RV32I-NEXT: srli a4, ra, 31 |
| ; RV32I-NEXT: slli a6, a3, 30 |
| ; RV32I-NEXT: and a0, a0, a6 |
| ; RV32I-NEXT: seqz a4, a4 |
| ; RV32I-NEXT: addi a4, a4, -1 |
| ; RV32I-NEXT: slli a5, a3, 31 |
| ; RV32I-NEXT: xor a0, a1, a0 |
| ; RV32I-NEXT: and a4, a4, a5 |
| ; RV32I-NEXT: xor a1, s10, a2 |
| ; RV32I-NEXT: xor a0, a0, a4 |
| ; RV32I-NEXT: lw a2, 64(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw a4, 32(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: xor a0, a1, a0 |
| ; RV32I-NEXT: xor a0, a0, a2 |
| ; RV32I-NEXT: lw a1, 172(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: srli a1, a1, 1 |
| ; RV32I-NEXT: xor a0, a1, a0 |
| ; RV32I-NEXT: lw a2, 196(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a1, a2, s4 |
| ; RV32I-NEXT: slli a2, a2, 24 |
| ; RV32I-NEXT: slli a1, a1, 8 |
| ; RV32I-NEXT: or a1, a2, a1 |
| ; RV32I-NEXT: srli a2, a0, 8 |
| ; RV32I-NEXT: lw a4, 200(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: or a1, a1, a4 |
| ; RV32I-NEXT: and a2, a2, s4 |
| ; RV32I-NEXT: srli a4, a0, 24 |
| ; RV32I-NEXT: and s10, a0, s4 |
| ; RV32I-NEXT: slli a0, a0, 24 |
| ; RV32I-NEXT: slli s10, s10, 8 |
| ; RV32I-NEXT: or a2, a2, a4 |
| ; RV32I-NEXT: or a0, a0, s10 |
| ; RV32I-NEXT: srli a4, a1, 4 |
| ; RV32I-NEXT: and a1, a1, s3 |
| ; RV32I-NEXT: and a4, a4, s3 |
| ; RV32I-NEXT: slli a1, a1, 4 |
| ; RV32I-NEXT: or a1, a4, a1 |
| ; RV32I-NEXT: or a0, a0, a2 |
| ; RV32I-NEXT: srli a2, a1, 2 |
| ; RV32I-NEXT: and a1, a1, s2 |
| ; RV32I-NEXT: and a2, a2, s2 |
| ; RV32I-NEXT: slli a1, a1, 2 |
| ; RV32I-NEXT: srli a4, a0, 4 |
| ; RV32I-NEXT: and a0, a0, s3 |
| ; RV32I-NEXT: and a4, a4, s3 |
| ; RV32I-NEXT: slli a0, a0, 4 |
| ; RV32I-NEXT: or s10, a2, a1 |
| ; RV32I-NEXT: or a0, a4, a0 |
| ; RV32I-NEXT: lw a1, 216(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw a2, 68(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a1, a1, a2 |
| ; RV32I-NEXT: lw a2, 192(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a2, a2, a3 |
| ; RV32I-NEXT: lw a3, 188(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw a4, 60(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a3, a3, a4 |
| ; RV32I-NEXT: lw a4, 184(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw ra, 56(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a4, a4, ra |
| ; RV32I-NEXT: xor a1, a2, a1 |
| ; RV32I-NEXT: xor a3, a3, a4 |
| ; RV32I-NEXT: lw a2, 180(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw a4, 52(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a2, a2, a4 |
| ; RV32I-NEXT: lw a4, 176(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw ra, 48(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a4, a4, ra |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: lw a4, 168(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw ra, 44(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a4, a4, ra |
| ; RV32I-NEXT: xor a1, a1, a3 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: lw a3, 164(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw a4, 40(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a3, a3, a4 |
| ; RV32I-NEXT: lw a4, 160(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw ra, 36(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a4, a4, ra |
| ; RV32I-NEXT: xor a3, a3, a4 |
| ; RV32I-NEXT: lw a4, 156(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a4, a4, ra |
| ; RV32I-NEXT: xor a3, a3, a4 |
| ; RV32I-NEXT: lw a4, 152(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw ra, 24(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a4, a4, ra |
| ; RV32I-NEXT: xor a1, a1, a2 |
| ; RV32I-NEXT: xor a3, a3, a4 |
| ; RV32I-NEXT: lw a2, 148(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw a4, 136(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a2, a2, a4 |
| ; RV32I-NEXT: lw a4, 144(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw ra, 20(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a4, a4, ra |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: lw a4, 140(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw ra, 16(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a4, a4, ra |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: lw a4, 132(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a4, a4, ra |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: lw a4, 128(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a4, a4, s11 |
| ; RV32I-NEXT: xor a1, a1, a3 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: lw a3, 124(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a3, a3, s8 |
| ; RV32I-NEXT: lw a4, 120(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a4, a4, s7 |
| ; RV32I-NEXT: xor a3, a3, a4 |
| ; RV32I-NEXT: lw a4, 116(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a4, a4, s6 |
| ; RV32I-NEXT: xor a3, a3, a4 |
| ; RV32I-NEXT: lw a4, 112(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a4, a4, s5 |
| ; RV32I-NEXT: xor a3, a3, a4 |
| ; RV32I-NEXT: lw a4, 108(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a4, a4, s1 |
| ; RV32I-NEXT: xor a3, a3, a4 |
| ; RV32I-NEXT: lw a4, 104(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a4, a4, s0 |
| ; RV32I-NEXT: xor a1, a1, a2 |
| ; RV32I-NEXT: xor a3, a3, a4 |
| ; RV32I-NEXT: lw a2, 100(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a2, a2, t6 |
| ; RV32I-NEXT: lw a4, 96(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a4, a4, t5 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: lw a4, 92(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a4, a4, t4 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: lw a4, 88(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a4, a4, t3 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: lw a4, 84(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a4, a4, t2 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: lw a4, 80(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a4, a4, t1 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: lw a4, 76(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a4, a4, t0 |
| ; RV32I-NEXT: xor a1, a1, a3 |
| ; RV32I-NEXT: xor a2, a2, a4 |
| ; RV32I-NEXT: lw a3, 220(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a3, a3, a7 |
| ; RV32I-NEXT: lw a4, 72(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a4, a4, a6 |
| ; RV32I-NEXT: xor a1, a1, a2 |
| ; RV32I-NEXT: xor a3, a3, a4 |
| ; RV32I-NEXT: lw a2, 204(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a2, a2, a5 |
| ; RV32I-NEXT: srli a4, a0, 2 |
| ; RV32I-NEXT: xor a2, a3, a2 |
| ; RV32I-NEXT: and a3, a4, s2 |
| ; RV32I-NEXT: and a0, a0, s2 |
| ; RV32I-NEXT: xor a1, a1, a2 |
| ; RV32I-NEXT: slli a0, a0, 2 |
| ; RV32I-NEXT: srli a2, a1, 8 |
| ; RV32I-NEXT: or a0, a3, a0 |
| ; RV32I-NEXT: and a2, a2, s4 |
| ; RV32I-NEXT: srli a3, a1, 24 |
| ; RV32I-NEXT: and a4, a1, s4 |
| ; RV32I-NEXT: slli a1, a1, 24 |
| ; RV32I-NEXT: slli a4, a4, 8 |
| ; RV32I-NEXT: or a2, a2, a3 |
| ; RV32I-NEXT: or a1, a1, a4 |
| ; RV32I-NEXT: lw a3, 212(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: srli a3, a3, 1 |
| ; RV32I-NEXT: or a1, a1, a2 |
| ; RV32I-NEXT: srli a2, a1, 4 |
| ; RV32I-NEXT: and a1, a1, s3 |
| ; RV32I-NEXT: and a2, a2, s3 |
| ; RV32I-NEXT: slli a1, a1, 4 |
| ; RV32I-NEXT: srli a4, a0, 1 |
| ; RV32I-NEXT: or a1, a2, a1 |
| ; RV32I-NEXT: lw a2, 232(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: and a2, a4, a2 |
| ; RV32I-NEXT: srli a4, a1, 2 |
| ; RV32I-NEXT: srli a5, s10, 1 |
| ; RV32I-NEXT: and a4, a4, s2 |
| ; RV32I-NEXT: and a1, a1, s2 |
| ; RV32I-NEXT: slli a6, a5, 31 |
| ; RV32I-NEXT: and a0, a0, s9 |
| ; RV32I-NEXT: slli a1, a1, 2 |
| ; RV32I-NEXT: slli a0, a0, 1 |
| ; RV32I-NEXT: or a1, a4, a1 |
| ; RV32I-NEXT: or a0, a2, a0 |
| ; RV32I-NEXT: srli a2, a1, 1 |
| ; RV32I-NEXT: srli a0, a0, 1 |
| ; RV32I-NEXT: slli a4, a2, 31 |
| ; RV32I-NEXT: or a3, a3, a6 |
| ; RV32I-NEXT: or a0, a0, a4 |
| ; RV32I-NEXT: and a4, a5, s9 |
| ; RV32I-NEXT: and a5, s10, s9 |
| ; RV32I-NEXT: and a2, a2, s9 |
| ; RV32I-NEXT: and a1, a1, s9 |
| ; RV32I-NEXT: slli a5, a5, 1 |
| ; RV32I-NEXT: slli a1, a1, 1 |
| ; RV32I-NEXT: or a4, a4, a5 |
| ; RV32I-NEXT: or a1, a2, a1 |
| ; RV32I-NEXT: srli a4, a4, 1 |
| ; RV32I-NEXT: srli a1, a1, 1 |
| ; RV32I-NEXT: lw a2, 224(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: sw a3, 0(a2) |
| ; RV32I-NEXT: sw a4, 4(a2) |
| ; RV32I-NEXT: sw a0, 8(a2) |
| ; RV32I-NEXT: sw a1, 12(a2) |
| ; RV32I-NEXT: lw a2, 228(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: sw a3, 0(a2) |
| ; RV32I-NEXT: sw a4, 4(a2) |
| ; RV32I-NEXT: sw a0, 8(a2) |
| ; RV32I-NEXT: sw a1, 12(a2) |
| ; RV32I-NEXT: lw ra, 284(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw s0, 280(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw s1, 276(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw s2, 272(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw s3, 268(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw s4, 264(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw s5, 260(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw s6, 256(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw s7, 252(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw s8, 248(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw s9, 244(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw s10, 240(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: lw s11, 236(sp) # 4-byte Folded Reload |
| ; RV32I-NEXT: addi sp, sp, 288 |
| ; RV32I-NEXT: ret |
| ; |
| ; RV64I-LABEL: commutative_clmulh_v2i64: |
| ; RV64I: # %bb.0: |
| ; RV64I-NEXT: addi sp, sp, -304 |
| ; RV64I-NEXT: sd ra, 296(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: sd s0, 288(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: sd s1, 280(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: sd s2, 272(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: sd s3, 264(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: sd s4, 256(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: sd s5, 248(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: sd s6, 240(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: sd s7, 232(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: sd s8, 224(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: sd s9, 216(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: sd s10, 208(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: sd s11, 200(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: sd a5, 192(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: sd a4, 184(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: mv a7, a3 |
| ; RV64I-NEXT: mv t5, a1 |
| ; RV64I-NEXT: srli a1, a2, 24 |
| ; RV64I-NEXT: lui s4, 4080 |
| ; RV64I-NEXT: and a1, a1, s4 |
| ; RV64I-NEXT: li t0, 255 |
| ; RV64I-NEXT: srli a5, a2, 8 |
| ; RV64I-NEXT: slli s3, t0, 24 |
| ; RV64I-NEXT: and a5, a5, s3 |
| ; RV64I-NEXT: lui a3, 16 |
| ; RV64I-NEXT: srli a6, a2, 40 |
| ; RV64I-NEXT: addi t0, a3, -256 |
| ; RV64I-NEXT: and a6, a6, t0 |
| ; RV64I-NEXT: srli t1, a2, 56 |
| ; RV64I-NEXT: or a1, a5, a1 |
| ; RV64I-NEXT: or a5, a6, t1 |
| ; RV64I-NEXT: or a1, a1, a5 |
| ; RV64I-NEXT: and a5, a2, s4 |
| ; RV64I-NEXT: srliw a6, a2, 24 |
| ; RV64I-NEXT: slli a5, a5, 24 |
| ; RV64I-NEXT: slli a6, a6, 32 |
| ; RV64I-NEXT: or a5, a5, a6 |
| ; RV64I-NEXT: and a6, a2, t0 |
| ; RV64I-NEXT: slli a6, a6, 40 |
| ; RV64I-NEXT: slli a2, a2, 56 |
| ; RV64I-NEXT: or a2, a2, a6 |
| ; RV64I-NEXT: lui a6, 61681 |
| ; RV64I-NEXT: or a2, a2, a5 |
| ; RV64I-NEXT: addi a6, a6, -241 |
| ; RV64I-NEXT: or a1, a2, a1 |
| ; RV64I-NEXT: slli a2, a6, 32 |
| ; RV64I-NEXT: srli a5, a1, 4 |
| ; RV64I-NEXT: add a6, a6, a2 |
| ; RV64I-NEXT: and a2, a5, a6 |
| ; RV64I-NEXT: and a1, a1, a6 |
| ; RV64I-NEXT: lui a5, 209715 |
| ; RV64I-NEXT: slli a1, a1, 4 |
| ; RV64I-NEXT: addi t1, a5, 819 |
| ; RV64I-NEXT: or a1, a2, a1 |
| ; RV64I-NEXT: slli a2, t1, 32 |
| ; RV64I-NEXT: srli a5, a1, 2 |
| ; RV64I-NEXT: add t1, t1, a2 |
| ; RV64I-NEXT: and a2, a5, t1 |
| ; RV64I-NEXT: and a1, a1, t1 |
| ; RV64I-NEXT: lui a5, 349525 |
| ; RV64I-NEXT: slli a1, a1, 2 |
| ; RV64I-NEXT: addi t2, a5, 1365 |
| ; RV64I-NEXT: or a1, a2, a1 |
| ; RV64I-NEXT: slli a2, t2, 32 |
| ; RV64I-NEXT: srli a5, a1, 1 |
| ; RV64I-NEXT: add t2, t2, a2 |
| ; RV64I-NEXT: and a2, a5, t2 |
| ; RV64I-NEXT: srli a5, a0, 24 |
| ; RV64I-NEXT: srli t3, a0, 8 |
| ; RV64I-NEXT: and a5, a5, s4 |
| ; RV64I-NEXT: and t3, t3, s3 |
| ; RV64I-NEXT: or a5, t3, a5 |
| ; RV64I-NEXT: srli t3, a0, 40 |
| ; RV64I-NEXT: and t3, t3, t0 |
| ; RV64I-NEXT: srli t4, a0, 56 |
| ; RV64I-NEXT: or t3, t3, t4 |
| ; RV64I-NEXT: and t4, a0, s4 |
| ; RV64I-NEXT: slli t4, t4, 24 |
| ; RV64I-NEXT: srliw t6, a0, 24 |
| ; RV64I-NEXT: slli t6, t6, 32 |
| ; RV64I-NEXT: and s0, a0, t0 |
| ; RV64I-NEXT: slli s0, s0, 40 |
| ; RV64I-NEXT: slli a0, a0, 56 |
| ; RV64I-NEXT: or t4, t4, t6 |
| ; RV64I-NEXT: or a0, a0, s0 |
| ; RV64I-NEXT: or a5, a5, t3 |
| ; RV64I-NEXT: or a0, a0, t4 |
| ; RV64I-NEXT: and a1, a1, t2 |
| ; RV64I-NEXT: or a0, a0, a5 |
| ; RV64I-NEXT: srli a5, a0, 4 |
| ; RV64I-NEXT: and a0, a0, a6 |
| ; RV64I-NEXT: and a5, a5, a6 |
| ; RV64I-NEXT: slli a0, a0, 4 |
| ; RV64I-NEXT: slli a1, a1, 1 |
| ; RV64I-NEXT: or a0, a5, a0 |
| ; RV64I-NEXT: srli a5, a0, 2 |
| ; RV64I-NEXT: and a0, a0, t1 |
| ; RV64I-NEXT: and a5, a5, t1 |
| ; RV64I-NEXT: slli a0, a0, 2 |
| ; RV64I-NEXT: or a1, a2, a1 |
| ; RV64I-NEXT: or a0, a5, a0 |
| ; RV64I-NEXT: srli a2, a0, 1 |
| ; RV64I-NEXT: and t4, a0, t2 |
| ; RV64I-NEXT: and a0, a2, t2 |
| ; RV64I-NEXT: slli t4, t4, 1 |
| ; RV64I-NEXT: slli a2, a1, 1 |
| ; RV64I-NEXT: or a0, a0, t4 |
| ; RV64I-NEXT: andi a5, a0, 2 |
| ; RV64I-NEXT: andi t3, a0, 1 |
| ; RV64I-NEXT: seqz a5, a5 |
| ; RV64I-NEXT: seqz t3, t3 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: addi t3, t3, -1 |
| ; RV64I-NEXT: and a2, a5, a2 |
| ; RV64I-NEXT: and a5, t3, a1 |
| ; RV64I-NEXT: slli t3, a1, 2 |
| ; RV64I-NEXT: andi t6, a0, 4 |
| ; RV64I-NEXT: seqz t6, t6 |
| ; RV64I-NEXT: andi s0, a0, 8 |
| ; RV64I-NEXT: addi t6, t6, -1 |
| ; RV64I-NEXT: seqz s0, s0 |
| ; RV64I-NEXT: slli s1, a1, 3 |
| ; RV64I-NEXT: addi s0, s0, -1 |
| ; RV64I-NEXT: and t3, t6, t3 |
| ; RV64I-NEXT: and s0, s0, s1 |
| ; RV64I-NEXT: xor a2, a5, a2 |
| ; RV64I-NEXT: xor a5, t3, s0 |
| ; RV64I-NEXT: xor a2, a2, a5 |
| ; RV64I-NEXT: andi a5, a0, 16 |
| ; RV64I-NEXT: slli t3, a1, 4 |
| ; RV64I-NEXT: seqz a5, a5 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: andi t6, a0, 32 |
| ; RV64I-NEXT: and a5, a5, t3 |
| ; RV64I-NEXT: seqz t3, t6 |
| ; RV64I-NEXT: slli t6, a1, 5 |
| ; RV64I-NEXT: addi t3, t3, -1 |
| ; RV64I-NEXT: and t3, t3, t6 |
| ; RV64I-NEXT: andi t6, a0, 64 |
| ; RV64I-NEXT: xor a5, a5, t3 |
| ; RV64I-NEXT: seqz t3, t6 |
| ; RV64I-NEXT: slli t6, a1, 6 |
| ; RV64I-NEXT: addi t3, t3, -1 |
| ; RV64I-NEXT: and t3, t3, t6 |
| ; RV64I-NEXT: andi t6, a0, 128 |
| ; RV64I-NEXT: xor a5, a5, t3 |
| ; RV64I-NEXT: seqz t3, t6 |
| ; RV64I-NEXT: slli t6, a1, 7 |
| ; RV64I-NEXT: addi t3, t3, -1 |
| ; RV64I-NEXT: and t3, t3, t6 |
| ; RV64I-NEXT: andi t6, a0, 256 |
| ; RV64I-NEXT: slli s0, a1, 8 |
| ; RV64I-NEXT: seqz t6, t6 |
| ; RV64I-NEXT: addi t6, t6, -1 |
| ; RV64I-NEXT: andi s1, a0, 512 |
| ; RV64I-NEXT: and t6, t6, s0 |
| ; RV64I-NEXT: seqz s0, s1 |
| ; RV64I-NEXT: slli s1, a1, 9 |
| ; RV64I-NEXT: addi s0, s0, -1 |
| ; RV64I-NEXT: xor t3, t3, t6 |
| ; RV64I-NEXT: and s0, s0, s1 |
| ; RV64I-NEXT: xor a2, a2, a5 |
| ; RV64I-NEXT: xor a5, t3, s0 |
| ; RV64I-NEXT: slli t6, a1, 10 |
| ; RV64I-NEXT: andi t3, a0, 1024 |
| ; RV64I-NEXT: seqz s0, t3 |
| ; RV64I-NEXT: li t3, 1 |
| ; RV64I-NEXT: addi s0, s0, -1 |
| ; RV64I-NEXT: slli a4, t3, 11 |
| ; RV64I-NEXT: sd a4, 176(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: and t6, s0, t6 |
| ; RV64I-NEXT: and s0, a0, a4 |
| ; RV64I-NEXT: xor a5, a5, t6 |
| ; RV64I-NEXT: seqz t6, s0 |
| ; RV64I-NEXT: slli s0, a1, 11 |
| ; RV64I-NEXT: addi t6, t6, -1 |
| ; RV64I-NEXT: and t6, t6, s0 |
| ; RV64I-NEXT: lui s1, 1 |
| ; RV64I-NEXT: slli s0, a1, 12 |
| ; RV64I-NEXT: and s1, a0, s1 |
| ; RV64I-NEXT: seqz s1, s1 |
| ; RV64I-NEXT: lui a4, 2 |
| ; RV64I-NEXT: addi s1, s1, -1 |
| ; RV64I-NEXT: and s2, a0, a4 |
| ; RV64I-NEXT: and s0, s1, s0 |
| ; RV64I-NEXT: seqz s1, s2 |
| ; RV64I-NEXT: slli s2, a1, 13 |
| ; RV64I-NEXT: addi s1, s1, -1 |
| ; RV64I-NEXT: xor t6, t6, s0 |
| ; RV64I-NEXT: and s0, s1, s2 |
| ; RV64I-NEXT: xor t6, t6, s0 |
| ; RV64I-NEXT: lui s1, 4 |
| ; RV64I-NEXT: slli s0, a1, 14 |
| ; RV64I-NEXT: and s1, a0, s1 |
| ; RV64I-NEXT: seqz s1, s1 |
| ; RV64I-NEXT: lui a4, 8 |
| ; RV64I-NEXT: addi s1, s1, -1 |
| ; RV64I-NEXT: and s2, a0, a4 |
| ; RV64I-NEXT: and s0, s1, s0 |
| ; RV64I-NEXT: seqz s1, s2 |
| ; RV64I-NEXT: slli s2, a1, 15 |
| ; RV64I-NEXT: addi s1, s1, -1 |
| ; RV64I-NEXT: xor t6, t6, s0 |
| ; RV64I-NEXT: and s0, s1, s2 |
| ; RV64I-NEXT: xor a2, a2, a5 |
| ; RV64I-NEXT: xor a5, t6, s0 |
| ; RV64I-NEXT: xor a2, a2, a5 |
| ; RV64I-NEXT: slli a5, a1, 16 |
| ; RV64I-NEXT: and t6, a0, a3 |
| ; RV64I-NEXT: seqz t6, t6 |
| ; RV64I-NEXT: lui s0, 32 |
| ; RV64I-NEXT: addi t6, t6, -1 |
| ; RV64I-NEXT: and s0, a0, s0 |
| ; RV64I-NEXT: and a5, t6, a5 |
| ; RV64I-NEXT: seqz t6, s0 |
| ; RV64I-NEXT: slli s0, a1, 17 |
| ; RV64I-NEXT: addi t6, t6, -1 |
| ; RV64I-NEXT: and t6, t6, s0 |
| ; RV64I-NEXT: lui a3, 64 |
| ; RV64I-NEXT: xor a5, a5, t6 |
| ; RV64I-NEXT: and t6, a0, a3 |
| ; RV64I-NEXT: slli s0, a1, 18 |
| ; RV64I-NEXT: seqz t6, t6 |
| ; RV64I-NEXT: addi t6, t6, -1 |
| ; RV64I-NEXT: lui a3, 128 |
| ; RV64I-NEXT: and t6, t6, s0 |
| ; RV64I-NEXT: and s0, a0, a3 |
| ; RV64I-NEXT: xor a5, a5, t6 |
| ; RV64I-NEXT: seqz t6, s0 |
| ; RV64I-NEXT: slli s0, a1, 19 |
| ; RV64I-NEXT: addi t6, t6, -1 |
| ; RV64I-NEXT: and t6, t6, s0 |
| ; RV64I-NEXT: lui a3, 256 |
| ; RV64I-NEXT: xor a5, a5, t6 |
| ; RV64I-NEXT: and t6, a0, a3 |
| ; RV64I-NEXT: slli s0, a1, 20 |
| ; RV64I-NEXT: seqz t6, t6 |
| ; RV64I-NEXT: addi t6, t6, -1 |
| ; RV64I-NEXT: lui a3, 512 |
| ; RV64I-NEXT: and t6, t6, s0 |
| ; RV64I-NEXT: and s0, a0, a3 |
| ; RV64I-NEXT: xor a5, a5, t6 |
| ; RV64I-NEXT: seqz t6, s0 |
| ; RV64I-NEXT: addi t6, t6, -1 |
| ; RV64I-NEXT: slli s0, a1, 21 |
| ; RV64I-NEXT: and t6, t6, s0 |
| ; RV64I-NEXT: lui a3, 1024 |
| ; RV64I-NEXT: xor a5, a5, t6 |
| ; RV64I-NEXT: and t6, a0, a3 |
| ; RV64I-NEXT: xor a2, a2, a5 |
| ; RV64I-NEXT: seqz a5, t6 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: lui s0, 2048 |
| ; RV64I-NEXT: slli t6, a1, 22 |
| ; RV64I-NEXT: and s0, a0, s0 |
| ; RV64I-NEXT: and a5, a5, t6 |
| ; RV64I-NEXT: seqz t6, s0 |
| ; RV64I-NEXT: addi t6, t6, -1 |
| ; RV64I-NEXT: lui s1, 4096 |
| ; RV64I-NEXT: slli s0, a1, 23 |
| ; RV64I-NEXT: and s1, a0, s1 |
| ; RV64I-NEXT: and t6, t6, s0 |
| ; RV64I-NEXT: seqz s0, s1 |
| ; RV64I-NEXT: xor a5, a5, t6 |
| ; RV64I-NEXT: addi s0, s0, -1 |
| ; RV64I-NEXT: slli t6, a1, 24 |
| ; RV64I-NEXT: lui a3, 8192 |
| ; RV64I-NEXT: and t6, s0, t6 |
| ; RV64I-NEXT: and s0, a0, a3 |
| ; RV64I-NEXT: xor a5, a5, t6 |
| ; RV64I-NEXT: seqz t6, s0 |
| ; RV64I-NEXT: addi t6, t6, -1 |
| ; RV64I-NEXT: lui s1, 16384 |
| ; RV64I-NEXT: slli s0, a1, 25 |
| ; RV64I-NEXT: and s1, a0, s1 |
| ; RV64I-NEXT: and t6, t6, s0 |
| ; RV64I-NEXT: seqz s0, s1 |
| ; RV64I-NEXT: xor a5, a5, t6 |
| ; RV64I-NEXT: addi s0, s0, -1 |
| ; RV64I-NEXT: slli t6, a1, 26 |
| ; RV64I-NEXT: lui a3, 32768 |
| ; RV64I-NEXT: and t6, s0, t6 |
| ; RV64I-NEXT: and s0, a0, a3 |
| ; RV64I-NEXT: xor a5, a5, t6 |
| ; RV64I-NEXT: seqz t6, s0 |
| ; RV64I-NEXT: addi t6, t6, -1 |
| ; RV64I-NEXT: lui s1, 65536 |
| ; RV64I-NEXT: slli s0, a1, 27 |
| ; RV64I-NEXT: and s1, a0, s1 |
| ; RV64I-NEXT: and t6, t6, s0 |
| ; RV64I-NEXT: seqz s0, s1 |
| ; RV64I-NEXT: addi s0, s0, -1 |
| ; RV64I-NEXT: slli s1, a1, 28 |
| ; RV64I-NEXT: xor a5, a5, t6 |
| ; RV64I-NEXT: and s0, s0, s1 |
| ; RV64I-NEXT: xor a5, a5, s0 |
| ; RV64I-NEXT: lui a3, 131072 |
| ; RV64I-NEXT: xor a2, a2, a5 |
| ; RV64I-NEXT: and a5, a0, a3 |
| ; RV64I-NEXT: seqz a5, a5 |
| ; RV64I-NEXT: lui a3, 262144 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: and t6, a0, a3 |
| ; RV64I-NEXT: seqz t6, t6 |
| ; RV64I-NEXT: slli s0, a1, 29 |
| ; RV64I-NEXT: and a5, a5, s0 |
| ; RV64I-NEXT: addi t6, t6, -1 |
| ; RV64I-NEXT: slli s0, a1, 30 |
| ; RV64I-NEXT: sraiw s1, a0, 31 |
| ; RV64I-NEXT: and t6, t6, s0 |
| ; RV64I-NEXT: seqz s0, s1 |
| ; RV64I-NEXT: xor a5, a5, t6 |
| ; RV64I-NEXT: addi s0, s0, -1 |
| ; RV64I-NEXT: slli t6, a1, 31 |
| ; RV64I-NEXT: slli a3, t3, 32 |
| ; RV64I-NEXT: sd a3, 168(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: and t6, s0, t6 |
| ; RV64I-NEXT: and s0, a0, a3 |
| ; RV64I-NEXT: xor a5, a5, t6 |
| ; RV64I-NEXT: seqz t6, s0 |
| ; RV64I-NEXT: addi t6, t6, -1 |
| ; RV64I-NEXT: slli s1, t3, 33 |
| ; RV64I-NEXT: sd s1, 160(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: slli s0, a1, 32 |
| ; RV64I-NEXT: and s1, a0, s1 |
| ; RV64I-NEXT: and t6, t6, s0 |
| ; RV64I-NEXT: seqz s0, s1 |
| ; RV64I-NEXT: xor a5, a5, t6 |
| ; RV64I-NEXT: addi s0, s0, -1 |
| ; RV64I-NEXT: slli t6, a1, 33 |
| ; RV64I-NEXT: slli a3, t3, 34 |
| ; RV64I-NEXT: sd a3, 152(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: and t6, s0, t6 |
| ; RV64I-NEXT: and s0, a0, a3 |
| ; RV64I-NEXT: xor a5, a5, t6 |
| ; RV64I-NEXT: seqz t6, s0 |
| ; RV64I-NEXT: addi t6, t6, -1 |
| ; RV64I-NEXT: slli s1, t3, 35 |
| ; RV64I-NEXT: sd s1, 144(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: slli s0, a1, 34 |
| ; RV64I-NEXT: and s1, a0, s1 |
| ; RV64I-NEXT: and t6, t6, s0 |
| ; RV64I-NEXT: seqz s0, s1 |
| ; RV64I-NEXT: xor a5, a5, t6 |
| ; RV64I-NEXT: addi s0, s0, -1 |
| ; RV64I-NEXT: slli t6, a1, 35 |
| ; RV64I-NEXT: slli a3, t3, 36 |
| ; RV64I-NEXT: sd a3, 136(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: and t6, s0, t6 |
| ; RV64I-NEXT: and s0, a0, a3 |
| ; RV64I-NEXT: xor a5, a5, t6 |
| ; RV64I-NEXT: seqz t6, s0 |
| ; RV64I-NEXT: addi t6, t6, -1 |
| ; RV64I-NEXT: slli s0, a1, 36 |
| ; RV64I-NEXT: and t6, t6, s0 |
| ; RV64I-NEXT: slli a3, t3, 37 |
| ; RV64I-NEXT: sd a3, 128(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: xor a5, a5, t6 |
| ; RV64I-NEXT: and t6, a0, a3 |
| ; RV64I-NEXT: xor a2, a2, a5 |
| ; RV64I-NEXT: seqz a5, t6 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli s0, t3, 38 |
| ; RV64I-NEXT: sd s0, 120(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: slli t6, a1, 37 |
| ; RV64I-NEXT: and s0, a0, s0 |
| ; RV64I-NEXT: and a5, a5, t6 |
| ; RV64I-NEXT: seqz t6, s0 |
| ; RV64I-NEXT: addi t6, t6, -1 |
| ; RV64I-NEXT: slli s1, t3, 39 |
| ; RV64I-NEXT: sd s1, 112(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: slli s0, a1, 38 |
| ; RV64I-NEXT: and s1, a0, s1 |
| ; RV64I-NEXT: and t6, t6, s0 |
| ; RV64I-NEXT: seqz s0, s1 |
| ; RV64I-NEXT: xor a5, a5, t6 |
| ; RV64I-NEXT: addi s0, s0, -1 |
| ; RV64I-NEXT: slli t6, a1, 39 |
| ; RV64I-NEXT: slli a3, t3, 40 |
| ; RV64I-NEXT: sd a3, 104(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: and t6, s0, t6 |
| ; RV64I-NEXT: and s0, a0, a3 |
| ; RV64I-NEXT: xor a5, a5, t6 |
| ; RV64I-NEXT: seqz t6, s0 |
| ; RV64I-NEXT: addi t6, t6, -1 |
| ; RV64I-NEXT: slli s1, t3, 41 |
| ; RV64I-NEXT: sd s1, 96(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: slli s0, a1, 40 |
| ; RV64I-NEXT: and s1, a0, s1 |
| ; RV64I-NEXT: and t6, t6, s0 |
| ; RV64I-NEXT: seqz s0, s1 |
| ; RV64I-NEXT: xor a5, a5, t6 |
| ; RV64I-NEXT: addi s0, s0, -1 |
| ; RV64I-NEXT: slli t6, a1, 41 |
| ; RV64I-NEXT: slli a3, t3, 42 |
| ; RV64I-NEXT: sd a3, 88(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: and t6, s0, t6 |
| ; RV64I-NEXT: and s0, a0, a3 |
| ; RV64I-NEXT: xor a5, a5, t6 |
| ; RV64I-NEXT: seqz t6, s0 |
| ; RV64I-NEXT: addi t6, t6, -1 |
| ; RV64I-NEXT: slli s1, t3, 43 |
| ; RV64I-NEXT: sd s1, 80(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: slli s0, a1, 42 |
| ; RV64I-NEXT: and s1, a0, s1 |
| ; RV64I-NEXT: and t6, t6, s0 |
| ; RV64I-NEXT: seqz s0, s1 |
| ; RV64I-NEXT: xor a5, a5, t6 |
| ; RV64I-NEXT: addi s0, s0, -1 |
| ; RV64I-NEXT: slli t6, a1, 43 |
| ; RV64I-NEXT: slli a3, t3, 44 |
| ; RV64I-NEXT: sd a3, 72(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: and t6, s0, t6 |
| ; RV64I-NEXT: and s0, a0, a3 |
| ; RV64I-NEXT: xor a5, a5, t6 |
| ; RV64I-NEXT: seqz t6, s0 |
| ; RV64I-NEXT: addi t6, t6, -1 |
| ; RV64I-NEXT: slli s1, t3, 45 |
| ; RV64I-NEXT: sd s1, 64(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: slli s0, a1, 44 |
| ; RV64I-NEXT: and s1, a0, s1 |
| ; RV64I-NEXT: and t6, t6, s0 |
| ; RV64I-NEXT: seqz s0, s1 |
| ; RV64I-NEXT: addi s0, s0, -1 |
| ; RV64I-NEXT: slli s1, a1, 45 |
| ; RV64I-NEXT: xor a5, a5, t6 |
| ; RV64I-NEXT: and s0, s0, s1 |
| ; RV64I-NEXT: xor a5, a5, s0 |
| ; RV64I-NEXT: slli a3, t3, 46 |
| ; RV64I-NEXT: sd a3, 56(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: xor a5, a2, a5 |
| ; RV64I-NEXT: and a2, a0, a3 |
| ; RV64I-NEXT: seqz a2, a2 |
| ; RV64I-NEXT: slli a3, t3, 47 |
| ; RV64I-NEXT: sd a3, 48(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: addi a2, a2, -1 |
| ; RV64I-NEXT: and t6, a0, a3 |
| ; RV64I-NEXT: seqz t6, t6 |
| ; RV64I-NEXT: slli s0, a1, 46 |
| ; RV64I-NEXT: and a2, a2, s0 |
| ; RV64I-NEXT: addi t6, t6, -1 |
| ; RV64I-NEXT: slli s0, a1, 47 |
| ; RV64I-NEXT: slli a3, t3, 48 |
| ; RV64I-NEXT: sd a3, 40(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: and t6, t6, s0 |
| ; RV64I-NEXT: and s0, a0, a3 |
| ; RV64I-NEXT: xor a2, a2, t6 |
| ; RV64I-NEXT: seqz t6, s0 |
| ; RV64I-NEXT: addi t6, t6, -1 |
| ; RV64I-NEXT: slli s1, t3, 49 |
| ; RV64I-NEXT: sd s1, 32(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: slli s0, a1, 48 |
| ; RV64I-NEXT: and s1, a0, s1 |
| ; RV64I-NEXT: and t6, t6, s0 |
| ; RV64I-NEXT: seqz s0, s1 |
| ; RV64I-NEXT: xor a2, a2, t6 |
| ; RV64I-NEXT: addi s0, s0, -1 |
| ; RV64I-NEXT: slli t6, a1, 49 |
| ; RV64I-NEXT: slli a3, t3, 50 |
| ; RV64I-NEXT: sd a3, 24(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: and t6, s0, t6 |
| ; RV64I-NEXT: and s0, a0, a3 |
| ; RV64I-NEXT: xor a2, a2, t6 |
| ; RV64I-NEXT: seqz t6, s0 |
| ; RV64I-NEXT: addi t6, t6, -1 |
| ; RV64I-NEXT: slli ra, t3, 51 |
| ; RV64I-NEXT: slli s0, a1, 50 |
| ; RV64I-NEXT: and s1, a0, ra |
| ; RV64I-NEXT: and t6, t6, s0 |
| ; RV64I-NEXT: seqz s0, s1 |
| ; RV64I-NEXT: xor a2, a2, t6 |
| ; RV64I-NEXT: addi s0, s0, -1 |
| ; RV64I-NEXT: slli t6, a1, 51 |
| ; RV64I-NEXT: slli s11, t3, 52 |
| ; RV64I-NEXT: and t6, s0, t6 |
| ; RV64I-NEXT: and s0, a0, s11 |
| ; RV64I-NEXT: xor a2, a2, t6 |
| ; RV64I-NEXT: seqz t6, s0 |
| ; RV64I-NEXT: addi t6, t6, -1 |
| ; RV64I-NEXT: slli s10, t3, 53 |
| ; RV64I-NEXT: slli s0, a1, 52 |
| ; RV64I-NEXT: and s1, a0, s10 |
| ; RV64I-NEXT: and t6, t6, s0 |
| ; RV64I-NEXT: seqz s0, s1 |
| ; RV64I-NEXT: xor a2, a2, t6 |
| ; RV64I-NEXT: addi s0, s0, -1 |
| ; RV64I-NEXT: slli t6, a1, 53 |
| ; RV64I-NEXT: slli s9, t3, 54 |
| ; RV64I-NEXT: and t6, s0, t6 |
| ; RV64I-NEXT: and s0, a0, s9 |
| ; RV64I-NEXT: xor a2, a2, t6 |
| ; RV64I-NEXT: seqz t6, s0 |
| ; RV64I-NEXT: addi t6, t6, -1 |
| ; RV64I-NEXT: slli s8, t3, 55 |
| ; RV64I-NEXT: slli s0, a1, 54 |
| ; RV64I-NEXT: and s1, a0, s8 |
| ; RV64I-NEXT: and t6, t6, s0 |
| ; RV64I-NEXT: seqz s0, s1 |
| ; RV64I-NEXT: xor a2, a2, t6 |
| ; RV64I-NEXT: addi s0, s0, -1 |
| ; RV64I-NEXT: slli t6, a1, 55 |
| ; RV64I-NEXT: slli s7, t3, 56 |
| ; RV64I-NEXT: and t6, s0, t6 |
| ; RV64I-NEXT: and s0, a0, s7 |
| ; RV64I-NEXT: xor a4, a2, t6 |
| ; RV64I-NEXT: seqz t6, s0 |
| ; RV64I-NEXT: addi t6, t6, -1 |
| ; RV64I-NEXT: slli s5, t3, 57 |
| ; RV64I-NEXT: slli s0, a1, 56 |
| ; RV64I-NEXT: and s1, a0, s5 |
| ; RV64I-NEXT: and t6, t6, s0 |
| ; RV64I-NEXT: seqz s0, s1 |
| ; RV64I-NEXT: addi s0, s0, -1 |
| ; RV64I-NEXT: slli s6, t3, 58 |
| ; RV64I-NEXT: slli s1, a1, 57 |
| ; RV64I-NEXT: and a2, a0, s6 |
| ; RV64I-NEXT: and s0, s0, s1 |
| ; RV64I-NEXT: seqz a2, a2 |
| ; RV64I-NEXT: xor t6, t6, s0 |
| ; RV64I-NEXT: addi a2, a2, -1 |
| ; RV64I-NEXT: slli s0, a1, 58 |
| ; RV64I-NEXT: slli s1, t3, 59 |
| ; RV64I-NEXT: and a2, a2, s0 |
| ; RV64I-NEXT: and s0, a0, s1 |
| ; RV64I-NEXT: xor a3, t6, a2 |
| ; RV64I-NEXT: seqz t6, s0 |
| ; RV64I-NEXT: addi t6, t6, -1 |
| ; RV64I-NEXT: slli s2, t3, 60 |
| ; RV64I-NEXT: slli a2, a1, 59 |
| ; RV64I-NEXT: and s0, a0, s2 |
| ; RV64I-NEXT: and a2, t6, a2 |
| ; RV64I-NEXT: seqz t6, s0 |
| ; RV64I-NEXT: xor a2, a3, a2 |
| ; RV64I-NEXT: addi a3, t6, -1 |
| ; RV64I-NEXT: slli s0, a1, 60 |
| ; RV64I-NEXT: slli t6, t3, 61 |
| ; RV64I-NEXT: and a3, a3, s0 |
| ; RV64I-NEXT: and s0, a0, t6 |
| ; RV64I-NEXT: xor a2, a2, a3 |
| ; RV64I-NEXT: seqz a3, s0 |
| ; RV64I-NEXT: addi a3, a3, -1 |
| ; RV64I-NEXT: slli t3, t3, 62 |
| ; RV64I-NEXT: and a0, a0, t3 |
| ; RV64I-NEXT: slli s0, a1, 61 |
| ; RV64I-NEXT: and a3, a3, s0 |
| ; RV64I-NEXT: seqz a0, a0 |
| ; RV64I-NEXT: xor a2, a2, a3 |
| ; RV64I-NEXT: addi a0, a0, -1 |
| ; RV64I-NEXT: srli a3, t4, 63 |
| ; RV64I-NEXT: slli t4, a1, 62 |
| ; RV64I-NEXT: and a0, a0, t4 |
| ; RV64I-NEXT: seqz a3, a3 |
| ; RV64I-NEXT: slli a1, a1, 63 |
| ; RV64I-NEXT: addi a3, a3, -1 |
| ; RV64I-NEXT: xor a0, a2, a0 |
| ; RV64I-NEXT: and a1, a3, a1 |
| ; RV64I-NEXT: xor a4, a5, a4 |
| ; RV64I-NEXT: xor a0, a0, a1 |
| ; RV64I-NEXT: xor a0, a4, a0 |
| ; RV64I-NEXT: srli a1, a0, 40 |
| ; RV64I-NEXT: and a1, a1, t0 |
| ; RV64I-NEXT: srli a2, a0, 24 |
| ; RV64I-NEXT: and a2, a2, s4 |
| ; RV64I-NEXT: srli a3, a0, 8 |
| ; RV64I-NEXT: and a3, a3, s3 |
| ; RV64I-NEXT: srli a4, a0, 56 |
| ; RV64I-NEXT: or a1, a1, a4 |
| ; RV64I-NEXT: or a2, a3, a2 |
| ; RV64I-NEXT: or s0, a2, a1 |
| ; RV64I-NEXT: srliw a1, a0, 24 |
| ; RV64I-NEXT: and a2, a0, s4 |
| ; RV64I-NEXT: slli a1, a1, 32 |
| ; RV64I-NEXT: slli a2, a2, 24 |
| ; RV64I-NEXT: or a1, a2, a1 |
| ; RV64I-NEXT: sd a1, 16(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: and a1, a0, t0 |
| ; RV64I-NEXT: slli a0, a0, 56 |
| ; RV64I-NEXT: slli a1, a1, 40 |
| ; RV64I-NEXT: or a0, a0, a1 |
| ; RV64I-NEXT: sd a0, 8(sp) # 8-byte Folded Spill |
| ; RV64I-NEXT: srli a0, a7, 24 |
| ; RV64I-NEXT: and a0, a0, s4 |
| ; RV64I-NEXT: srli a1, a7, 8 |
| ; RV64I-NEXT: and a1, a1, s3 |
| ; RV64I-NEXT: srli a2, a7, 40 |
| ; RV64I-NEXT: and a2, a2, t0 |
| ; RV64I-NEXT: srli a3, a7, 56 |
| ; RV64I-NEXT: or a0, a1, a0 |
| ; RV64I-NEXT: or a2, a2, a3 |
| ; RV64I-NEXT: or a0, a0, a2 |
| ; RV64I-NEXT: and a1, a7, s4 |
| ; RV64I-NEXT: slli a1, a1, 24 |
| ; RV64I-NEXT: srliw a2, a7, 24 |
| ; RV64I-NEXT: slli a2, a2, 32 |
| ; RV64I-NEXT: and a3, a7, t0 |
| ; RV64I-NEXT: slli a3, a3, 40 |
| ; RV64I-NEXT: slli a7, a7, 56 |
| ; RV64I-NEXT: or a1, a1, a2 |
| ; RV64I-NEXT: or a2, a7, a3 |
| ; RV64I-NEXT: srli a3, t5, 24 |
| ; RV64I-NEXT: srli a4, t5, 8 |
| ; RV64I-NEXT: and a3, a3, s4 |
| ; RV64I-NEXT: and a4, a4, s3 |
| ; RV64I-NEXT: or a3, a4, a3 |
| ; RV64I-NEXT: srli a4, t5, 40 |
| ; RV64I-NEXT: and a4, a4, t0 |
| ; RV64I-NEXT: srli a5, t5, 56 |
| ; RV64I-NEXT: or a4, a4, a5 |
| ; RV64I-NEXT: and a5, t5, s4 |
| ; RV64I-NEXT: slli a5, a5, 24 |
| ; RV64I-NEXT: srliw a7, t5, 24 |
| ; RV64I-NEXT: slli a7, a7, 32 |
| ; RV64I-NEXT: and t4, t5, t0 |
| ; RV64I-NEXT: slli t4, t4, 40 |
| ; RV64I-NEXT: slli t5, t5, 56 |
| ; RV64I-NEXT: or a5, a5, a7 |
| ; RV64I-NEXT: or a7, t5, t4 |
| ; RV64I-NEXT: or a3, a3, a4 |
| ; RV64I-NEXT: or a4, a7, a5 |
| ; RV64I-NEXT: or a1, a2, a1 |
| ; RV64I-NEXT: or a3, a4, a3 |
| ; RV64I-NEXT: srli a2, a3, 4 |
| ; RV64I-NEXT: and a3, a3, a6 |
| ; RV64I-NEXT: and a2, a2, a6 |
| ; RV64I-NEXT: slli a3, a3, 4 |
| ; RV64I-NEXT: or a0, a1, a0 |
| ; RV64I-NEXT: or a2, a2, a3 |
| ; RV64I-NEXT: srli a1, a0, 4 |
| ; RV64I-NEXT: and a0, a0, a6 |
| ; RV64I-NEXT: and a1, a1, a6 |
| ; RV64I-NEXT: slli a0, a0, 4 |
| ; RV64I-NEXT: srli a3, a2, 2 |
| ; RV64I-NEXT: and a2, a2, t1 |
| ; RV64I-NEXT: and a3, a3, t1 |
| ; RV64I-NEXT: slli a2, a2, 2 |
| ; RV64I-NEXT: or a0, a1, a0 |
| ; RV64I-NEXT: or a2, a3, a2 |
| ; RV64I-NEXT: srli a1, a0, 2 |
| ; RV64I-NEXT: and a0, a0, t1 |
| ; RV64I-NEXT: and a1, a1, t1 |
| ; RV64I-NEXT: slli a0, a0, 2 |
| ; RV64I-NEXT: or a1, a1, a0 |
| ; RV64I-NEXT: srli a0, a2, 1 |
| ; RV64I-NEXT: and a3, a0, t2 |
| ; RV64I-NEXT: and a0, a2, t2 |
| ; RV64I-NEXT: slli a0, a0, 1 |
| ; RV64I-NEXT: srli a2, a1, 1 |
| ; RV64I-NEXT: and a2, a2, t2 |
| ; RV64I-NEXT: or a3, a3, a0 |
| ; RV64I-NEXT: and a1, a1, t2 |
| ; RV64I-NEXT: andi a4, a3, 2 |
| ; RV64I-NEXT: slli a1, a1, 1 |
| ; RV64I-NEXT: seqz a4, a4 |
| ; RV64I-NEXT: or a1, a2, a1 |
| ; RV64I-NEXT: addi a4, a4, -1 |
| ; RV64I-NEXT: slli a2, a1, 1 |
| ; RV64I-NEXT: andi a5, a3, 1 |
| ; RV64I-NEXT: and a2, a4, a2 |
| ; RV64I-NEXT: seqz a4, a5 |
| ; RV64I-NEXT: addi a4, a4, -1 |
| ; RV64I-NEXT: andi a5, a3, 4 |
| ; RV64I-NEXT: and a4, a4, a1 |
| ; RV64I-NEXT: seqz a5, a5 |
| ; RV64I-NEXT: xor a2, a4, a2 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a4, a1, 2 |
| ; RV64I-NEXT: andi a7, a3, 8 |
| ; RV64I-NEXT: and a4, a5, a4 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 3 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: andi a7, a3, 16 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: xor a2, a2, a4 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a4, a1, 4 |
| ; RV64I-NEXT: andi a7, a3, 32 |
| ; RV64I-NEXT: and a4, a5, a4 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 5 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: andi a7, a3, 64 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 6 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: andi a7, a3, 128 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: xor a2, a2, a4 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a4, a1, 7 |
| ; RV64I-NEXT: andi a7, a3, 256 |
| ; RV64I-NEXT: and a4, a5, a4 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 8 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: andi a7, a3, 512 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 9 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: andi a7, a3, 1024 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 10 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: ld a7, 176(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: xor a2, a2, a4 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: lui a4, 1 |
| ; RV64I-NEXT: and a4, a3, a4 |
| ; RV64I-NEXT: slli a7, a1, 11 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: seqz a4, a4 |
| ; RV64I-NEXT: addi a4, a4, -1 |
| ; RV64I-NEXT: slli a7, a1, 12 |
| ; RV64I-NEXT: and a4, a4, a7 |
| ; RV64I-NEXT: lui a7, 2 |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: xor a4, a5, a4 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 13 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: lui a7, 4 |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 14 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: lui a7, 8 |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 15 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: lui a7, 16 |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: xor a2, a2, a4 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: lui a4, 32 |
| ; RV64I-NEXT: and a4, a3, a4 |
| ; RV64I-NEXT: slli a7, a1, 16 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: seqz a4, a4 |
| ; RV64I-NEXT: addi a4, a4, -1 |
| ; RV64I-NEXT: slli a7, a1, 17 |
| ; RV64I-NEXT: and a4, a4, a7 |
| ; RV64I-NEXT: lui a7, 64 |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: xor a4, a5, a4 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 18 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: lui a7, 128 |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 19 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: lui a7, 256 |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 20 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: lui a7, 512 |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 21 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: lui a7, 1024 |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: xor a2, a2, a4 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: lui a4, 2048 |
| ; RV64I-NEXT: and a4, a3, a4 |
| ; RV64I-NEXT: slli a7, a1, 22 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: seqz a4, a4 |
| ; RV64I-NEXT: addi a4, a4, -1 |
| ; RV64I-NEXT: slli a7, a1, 23 |
| ; RV64I-NEXT: and a4, a4, a7 |
| ; RV64I-NEXT: lui a7, 4096 |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: xor a4, a5, a4 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 24 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: lui a7, 8192 |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 25 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: lui a7, 16384 |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 26 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: lui a7, 32768 |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 27 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: lui a7, 65536 |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 28 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: lui a7, 131072 |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: xor a2, a2, a4 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: lui a4, 262144 |
| ; RV64I-NEXT: and a4, a3, a4 |
| ; RV64I-NEXT: slli a7, a1, 29 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: seqz a4, a4 |
| ; RV64I-NEXT: addi a4, a4, -1 |
| ; RV64I-NEXT: slli a7, a1, 30 |
| ; RV64I-NEXT: and a4, a4, a7 |
| ; RV64I-NEXT: sraiw a7, a3, 31 |
| ; RV64I-NEXT: xor a4, a5, a4 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 31 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: ld a7, 168(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 32 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: ld a7, 160(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 33 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: ld a7, 152(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 34 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: ld a7, 144(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 35 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: ld a7, 136(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 36 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: ld a7, 128(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: xor a2, a2, a4 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: ld a4, 120(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: and a4, a3, a4 |
| ; RV64I-NEXT: slli a7, a1, 37 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: seqz a4, a4 |
| ; RV64I-NEXT: addi a4, a4, -1 |
| ; RV64I-NEXT: slli a7, a1, 38 |
| ; RV64I-NEXT: and a4, a4, a7 |
| ; RV64I-NEXT: ld a7, 112(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: xor a4, a5, a4 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 39 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: ld a7, 104(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 40 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: ld a7, 96(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 41 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: ld a7, 88(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 42 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: ld a7, 80(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 43 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: ld a7, 72(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 44 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: ld a7, 64(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: slli a7, a1, 45 |
| ; RV64I-NEXT: and a5, a5, a7 |
| ; RV64I-NEXT: ld a7, 56(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: xor a4, a4, a5 |
| ; RV64I-NEXT: seqz a5, a7 |
| ; RV64I-NEXT: addi a5, a5, -1 |
| ; RV64I-NEXT: ld a7, 48(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: seqz a7, a7 |
| ; RV64I-NEXT: slli t4, a1, 46 |
| ; RV64I-NEXT: and a5, a5, t4 |
| ; RV64I-NEXT: addi a7, a7, -1 |
| ; RV64I-NEXT: ld t4, 40(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: and t4, a3, t4 |
| ; RV64I-NEXT: slli t5, a1, 47 |
| ; RV64I-NEXT: and a7, a7, t5 |
| ; RV64I-NEXT: seqz t4, t4 |
| ; RV64I-NEXT: xor a5, a5, a7 |
| ; RV64I-NEXT: addi t4, t4, -1 |
| ; RV64I-NEXT: ld a7, 32(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: and a7, a3, a7 |
| ; RV64I-NEXT: slli t5, a1, 48 |
| ; RV64I-NEXT: and t4, t4, t5 |
| ; RV64I-NEXT: seqz a7, a7 |
| ; RV64I-NEXT: xor a5, a5, t4 |
| ; RV64I-NEXT: addi a7, a7, -1 |
| ; RV64I-NEXT: ld t4, 24(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: and t4, a3, t4 |
| ; RV64I-NEXT: slli t5, a1, 49 |
| ; RV64I-NEXT: and a7, a7, t5 |
| ; RV64I-NEXT: seqz t4, t4 |
| ; RV64I-NEXT: xor a5, a5, a7 |
| ; RV64I-NEXT: addi t4, t4, -1 |
| ; RV64I-NEXT: and a7, a3, ra |
| ; RV64I-NEXT: slli t5, a1, 50 |
| ; RV64I-NEXT: and t4, t4, t5 |
| ; RV64I-NEXT: seqz a7, a7 |
| ; RV64I-NEXT: xor a5, a5, t4 |
| ; RV64I-NEXT: addi a7, a7, -1 |
| ; RV64I-NEXT: and t4, a3, s11 |
| ; RV64I-NEXT: slli t5, a1, 51 |
| ; RV64I-NEXT: and a7, a7, t5 |
| ; RV64I-NEXT: seqz t4, t4 |
| ; RV64I-NEXT: xor a5, a5, a7 |
| ; RV64I-NEXT: addi t4, t4, -1 |
| ; RV64I-NEXT: and a7, a3, s10 |
| ; RV64I-NEXT: slli t5, a1, 52 |
| ; RV64I-NEXT: and t4, t4, t5 |
| ; RV64I-NEXT: seqz a7, a7 |
| ; RV64I-NEXT: addi a7, a7, -1 |
| ; RV64I-NEXT: slli t5, a1, 53 |
| ; RV64I-NEXT: xor a5, a5, t4 |
| ; RV64I-NEXT: and a7, a7, t5 |
| ; RV64I-NEXT: xor a5, a5, a7 |
| ; RV64I-NEXT: and a7, a3, s9 |
| ; RV64I-NEXT: slli t4, a1, 54 |
| ; RV64I-NEXT: seqz a7, a7 |
| ; RV64I-NEXT: addi a7, a7, -1 |
| ; RV64I-NEXT: and t5, a3, s8 |
| ; RV64I-NEXT: and a7, a7, t4 |
| ; RV64I-NEXT: seqz t4, t5 |
| ; RV64I-NEXT: slli t5, a1, 55 |
| ; RV64I-NEXT: addi t4, t4, -1 |
| ; RV64I-NEXT: xor a5, a5, a7 |
| ; RV64I-NEXT: and a7, t4, t5 |
| ; RV64I-NEXT: xor a2, a2, a4 |
| ; RV64I-NEXT: xor a4, a5, a7 |
| ; RV64I-NEXT: slli a5, a1, 56 |
| ; RV64I-NEXT: and a7, a3, s7 |
| ; RV64I-NEXT: seqz a7, a7 |
| ; RV64I-NEXT: and t4, a3, s5 |
| ; RV64I-NEXT: addi a7, a7, -1 |
| ; RV64I-NEXT: seqz t4, t4 |
| ; RV64I-NEXT: slli t5, a1, 57 |
| ; RV64I-NEXT: addi t4, t4, -1 |
| ; RV64I-NEXT: and a5, a7, a5 |
| ; RV64I-NEXT: and a7, t4, t5 |
| ; RV64I-NEXT: xor a5, a5, a7 |
| ; RV64I-NEXT: and a7, a3, s6 |
| ; RV64I-NEXT: slli t4, a1, 58 |
| ; RV64I-NEXT: seqz a7, a7 |
| ; RV64I-NEXT: addi a7, a7, -1 |
| ; RV64I-NEXT: and s1, a3, s1 |
| ; RV64I-NEXT: and a7, a7, t4 |
| ; RV64I-NEXT: seqz t4, s1 |
| ; RV64I-NEXT: slli t5, a1, 59 |
| ; RV64I-NEXT: addi t4, t4, -1 |
| ; RV64I-NEXT: xor a5, a5, a7 |
| ; RV64I-NEXT: and a7, t4, t5 |
| ; RV64I-NEXT: xor a5, a5, a7 |
| ; RV64I-NEXT: and a7, a3, s2 |
| ; RV64I-NEXT: slli t4, a1, 60 |
| ; RV64I-NEXT: seqz a7, a7 |
| ; RV64I-NEXT: addi a7, a7, -1 |
| ; RV64I-NEXT: and t5, a3, t6 |
| ; RV64I-NEXT: and a7, a7, t4 |
| ; RV64I-NEXT: seqz t4, t5 |
| ; RV64I-NEXT: slli t5, a1, 61 |
| ; RV64I-NEXT: addi t4, t4, -1 |
| ; RV64I-NEXT: xor a5, a5, a7 |
| ; RV64I-NEXT: and a7, t4, t5 |
| ; RV64I-NEXT: xor a5, a5, a7 |
| ; RV64I-NEXT: and a3, a3, t3 |
| ; RV64I-NEXT: slli a7, a1, 62 |
| ; RV64I-NEXT: seqz a3, a3 |
| ; RV64I-NEXT: addi a3, a3, -1 |
| ; RV64I-NEXT: srli a0, a0, 63 |
| ; RV64I-NEXT: and a3, a3, a7 |
| ; RV64I-NEXT: seqz a0, a0 |
| ; RV64I-NEXT: slli a1, a1, 63 |
| ; RV64I-NEXT: addi a0, a0, -1 |
| ; RV64I-NEXT: xor a3, a5, a3 |
| ; RV64I-NEXT: and a0, a0, a1 |
| ; RV64I-NEXT: xor a2, a2, a4 |
| ; RV64I-NEXT: xor a0, a3, a0 |
| ; RV64I-NEXT: ld a1, 16(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: ld a3, 8(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: or a1, a3, a1 |
| ; RV64I-NEXT: xor a0, a2, a0 |
| ; RV64I-NEXT: or a1, a1, s0 |
| ; RV64I-NEXT: srli a2, a0, 40 |
| ; RV64I-NEXT: and a2, a2, t0 |
| ; RV64I-NEXT: srli a3, a0, 8 |
| ; RV64I-NEXT: srli a4, a0, 24 |
| ; RV64I-NEXT: and a3, a3, s3 |
| ; RV64I-NEXT: srli a5, a0, 56 |
| ; RV64I-NEXT: and a4, a4, s4 |
| ; RV64I-NEXT: or a2, a2, a5 |
| ; RV64I-NEXT: or a3, a3, a4 |
| ; RV64I-NEXT: or a2, a3, a2 |
| ; RV64I-NEXT: srliw a3, a0, 24 |
| ; RV64I-NEXT: slli a3, a3, 32 |
| ; RV64I-NEXT: and a4, a0, s4 |
| ; RV64I-NEXT: slli a4, a4, 24 |
| ; RV64I-NEXT: and a5, a0, t0 |
| ; RV64I-NEXT: slli a0, a0, 56 |
| ; RV64I-NEXT: slli a5, a5, 40 |
| ; RV64I-NEXT: or a3, a4, a3 |
| ; RV64I-NEXT: or a0, a0, a5 |
| ; RV64I-NEXT: or a0, a0, a3 |
| ; RV64I-NEXT: srli a3, a1, 4 |
| ; RV64I-NEXT: and a3, a3, a6 |
| ; RV64I-NEXT: or a0, a0, a2 |
| ; RV64I-NEXT: and a1, a1, a6 |
| ; RV64I-NEXT: srli a2, a0, 4 |
| ; RV64I-NEXT: and a2, a2, a6 |
| ; RV64I-NEXT: and a0, a0, a6 |
| ; RV64I-NEXT: slli a1, a1, 4 |
| ; RV64I-NEXT: slli a0, a0, 4 |
| ; RV64I-NEXT: or a1, a3, a1 |
| ; RV64I-NEXT: or a0, a2, a0 |
| ; RV64I-NEXT: srli a2, a1, 2 |
| ; RV64I-NEXT: and a1, a1, t1 |
| ; RV64I-NEXT: and a2, a2, t1 |
| ; RV64I-NEXT: slli a1, a1, 2 |
| ; RV64I-NEXT: or a1, a2, a1 |
| ; RV64I-NEXT: srli a2, a0, 2 |
| ; RV64I-NEXT: and a2, a2, t1 |
| ; RV64I-NEXT: and a0, a0, t1 |
| ; RV64I-NEXT: srli a3, a1, 1 |
| ; RV64I-NEXT: slli a0, a0, 2 |
| ; RV64I-NEXT: and a3, a3, t2 |
| ; RV64I-NEXT: or a0, a2, a0 |
| ; RV64I-NEXT: and a1, a1, t2 |
| ; RV64I-NEXT: srli a2, a0, 1 |
| ; RV64I-NEXT: and a2, a2, t2 |
| ; RV64I-NEXT: and a0, a0, t2 |
| ; RV64I-NEXT: slli a1, a1, 1 |
| ; RV64I-NEXT: slli a0, a0, 1 |
| ; RV64I-NEXT: or a1, a3, a1 |
| ; RV64I-NEXT: or a0, a2, a0 |
| ; RV64I-NEXT: srli a1, a1, 1 |
| ; RV64I-NEXT: srli a0, a0, 1 |
| ; RV64I-NEXT: ld a2, 184(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: sd a1, 0(a2) |
| ; RV64I-NEXT: sd a0, 8(a2) |
| ; RV64I-NEXT: ld a2, 192(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: sd a1, 0(a2) |
| ; RV64I-NEXT: sd a0, 8(a2) |
| ; RV64I-NEXT: ld ra, 296(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: ld s0, 288(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: ld s1, 280(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: ld s2, 272(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: ld s3, 264(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: ld s4, 256(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: ld s5, 248(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: ld s6, 240(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: ld s7, 232(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: ld s8, 224(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: ld s9, 216(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: ld s10, 208(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: ld s11, 200(sp) # 8-byte Folded Reload |
| ; RV64I-NEXT: addi sp, sp, 304 |
| ; RV64I-NEXT: ret |
| ; |
| ; RV32IM-LABEL: commutative_clmulh_v2i64: |
| ; RV32IM: # %bb.0: |
| ; RV32IM-NEXT: addi sp, sp, -160 |
| ; RV32IM-NEXT: sw ra, 156(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: sw s0, 152(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: sw s1, 148(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: sw s2, 144(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: sw s3, 140(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: sw s4, 136(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: sw s5, 132(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: sw s6, 128(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: sw s7, 124(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: sw s8, 120(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: sw s9, 116(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: sw s10, 112(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: sw s11, 108(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: sw a3, 76(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: sw a2, 72(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: mv s3, a1 |
| ; RV32IM-NEXT: mv a1, a0 |
| ; RV32IM-NEXT: sw a0, 60(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: lw a4, 4(a0) |
| ; RV32IM-NEXT: lui a5, 16 |
| ; RV32IM-NEXT: lw a0, 8(a0) |
| ; RV32IM-NEXT: sw a0, 68(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: lw a0, 12(a1) |
| ; RV32IM-NEXT: sw a0, 52(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: addi s0, a5, -256 |
| ; RV32IM-NEXT: srli a6, a4, 8 |
| ; RV32IM-NEXT: srli a7, a4, 24 |
| ; RV32IM-NEXT: and t0, a4, s0 |
| ; RV32IM-NEXT: slli a4, a4, 24 |
| ; RV32IM-NEXT: and a6, a6, s0 |
| ; RV32IM-NEXT: slli t0, t0, 8 |
| ; RV32IM-NEXT: or a6, a6, a7 |
| ; RV32IM-NEXT: or a4, a4, t0 |
| ; RV32IM-NEXT: lui a7, 61681 |
| ; RV32IM-NEXT: or a4, a4, a6 |
| ; RV32IM-NEXT: addi t4, a7, -241 |
| ; RV32IM-NEXT: srli a7, a4, 4 |
| ; RV32IM-NEXT: and a4, a4, t4 |
| ; RV32IM-NEXT: and a7, a7, t4 |
| ; RV32IM-NEXT: slli a4, a4, 4 |
| ; RV32IM-NEXT: or a4, a7, a4 |
| ; RV32IM-NEXT: lui a7, 209715 |
| ; RV32IM-NEXT: srli t0, a4, 2 |
| ; RV32IM-NEXT: addi s4, a7, 819 |
| ; RV32IM-NEXT: and t0, t0, s4 |
| ; RV32IM-NEXT: and a4, a4, s4 |
| ; RV32IM-NEXT: slli a4, a4, 2 |
| ; RV32IM-NEXT: lui a0, 349525 |
| ; RV32IM-NEXT: or t0, t0, a4 |
| ; RV32IM-NEXT: addi a0, a0, 1365 |
| ; RV32IM-NEXT: srli t1, t0, 1 |
| ; RV32IM-NEXT: and t0, t0, a0 |
| ; RV32IM-NEXT: and t1, t1, a0 |
| ; RV32IM-NEXT: slli t0, t0, 1 |
| ; RV32IM-NEXT: or s5, t1, t0 |
| ; RV32IM-NEXT: srli t0, s5, 8 |
| ; RV32IM-NEXT: and t0, t0, s0 |
| ; RV32IM-NEXT: srli t1, s5, 24 |
| ; RV32IM-NEXT: and t2, s5, s0 |
| ; RV32IM-NEXT: slli t3, s5, 24 |
| ; RV32IM-NEXT: slli t2, t2, 8 |
| ; RV32IM-NEXT: or t0, t0, t1 |
| ; RV32IM-NEXT: or t1, t3, t2 |
| ; RV32IM-NEXT: or t0, t1, t0 |
| ; RV32IM-NEXT: lw t1, 4(s3) |
| ; RV32IM-NEXT: srli t2, t0, 4 |
| ; RV32IM-NEXT: and t2, t2, t4 |
| ; RV32IM-NEXT: and t0, t0, t4 |
| ; RV32IM-NEXT: slli t0, t0, 4 |
| ; RV32IM-NEXT: lw a1, 8(s3) |
| ; RV32IM-NEXT: sw a1, 64(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: lw a1, 12(s3) |
| ; RV32IM-NEXT: sw a1, 56(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: or t0, t2, t0 |
| ; RV32IM-NEXT: srli t2, t0, 2 |
| ; RV32IM-NEXT: srli t3, t1, 8 |
| ; RV32IM-NEXT: and t2, t2, s4 |
| ; RV32IM-NEXT: and t3, t3, s0 |
| ; RV32IM-NEXT: srli s1, t1, 24 |
| ; RV32IM-NEXT: and s2, t1, s0 |
| ; RV32IM-NEXT: slli s2, s2, 8 |
| ; RV32IM-NEXT: slli t1, t1, 24 |
| ; RV32IM-NEXT: or t3, t3, s1 |
| ; RV32IM-NEXT: or t1, t1, s2 |
| ; RV32IM-NEXT: and t0, t0, s4 |
| ; RV32IM-NEXT: or t1, t1, t3 |
| ; RV32IM-NEXT: srli t3, t1, 4 |
| ; RV32IM-NEXT: and t1, t1, t4 |
| ; RV32IM-NEXT: and t3, t3, t4 |
| ; RV32IM-NEXT: slli t1, t1, 4 |
| ; RV32IM-NEXT: slli t0, t0, 2 |
| ; RV32IM-NEXT: or t1, t3, t1 |
| ; RV32IM-NEXT: srli t3, t1, 2 |
| ; RV32IM-NEXT: and t1, t1, s4 |
| ; RV32IM-NEXT: and t3, t3, s4 |
| ; RV32IM-NEXT: slli t1, t1, 2 |
| ; RV32IM-NEXT: or t0, t2, t0 |
| ; RV32IM-NEXT: or t1, t3, t1 |
| ; RV32IM-NEXT: srli t2, t1, 1 |
| ; RV32IM-NEXT: and t1, t1, a0 |
| ; RV32IM-NEXT: and t2, t2, a0 |
| ; RV32IM-NEXT: slli t1, t1, 1 |
| ; RV32IM-NEXT: srli t3, t0, 1 |
| ; RV32IM-NEXT: or t6, t2, t1 |
| ; RV32IM-NEXT: and t1, t3, a0 |
| ; RV32IM-NEXT: srli t2, t6, 8 |
| ; RV32IM-NEXT: and t0, t0, a0 |
| ; RV32IM-NEXT: and t2, t2, s0 |
| ; RV32IM-NEXT: srli t3, t6, 24 |
| ; RV32IM-NEXT: and s1, t6, s0 |
| ; RV32IM-NEXT: slli s2, t6, 24 |
| ; RV32IM-NEXT: slli s1, s1, 8 |
| ; RV32IM-NEXT: or t2, t2, t3 |
| ; RV32IM-NEXT: or t3, s2, s1 |
| ; RV32IM-NEXT: slli t0, t0, 1 |
| ; RV32IM-NEXT: or t2, t3, t2 |
| ; RV32IM-NEXT: srli t3, t2, 4 |
| ; RV32IM-NEXT: and t2, t2, t4 |
| ; RV32IM-NEXT: and t3, t3, t4 |
| ; RV32IM-NEXT: slli t2, t2, 4 |
| ; RV32IM-NEXT: or s1, t1, t0 |
| ; RV32IM-NEXT: or t0, t3, t2 |
| ; RV32IM-NEXT: srli t1, t0, 2 |
| ; RV32IM-NEXT: and t0, t0, s4 |
| ; RV32IM-NEXT: and t1, t1, s4 |
| ; RV32IM-NEXT: slli t0, t0, 2 |
| ; RV32IM-NEXT: lui t2, 69905 |
| ; RV32IM-NEXT: or t1, t1, t0 |
| ; RV32IM-NEXT: addi s8, t2, 273 |
| ; RV32IM-NEXT: srli t2, t1, 1 |
| ; RV32IM-NEXT: sw a0, 104(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: and t2, t2, a0 |
| ; RV32IM-NEXT: and t1, t1, a0 |
| ; RV32IM-NEXT: slli t1, t1, 1 |
| ; RV32IM-NEXT: lui t3, 139810 |
| ; RV32IM-NEXT: or s2, t2, t1 |
| ; RV32IM-NEXT: addi t2, t3, 546 |
| ; RV32IM-NEXT: and s6, s1, s8 |
| ; RV32IM-NEXT: and s7, s2, t2 |
| ; RV32IM-NEXT: mul t5, s7, s6 |
| ; RV32IM-NEXT: and s9, s1, t2 |
| ; RV32IM-NEXT: and s10, s2, s8 |
| ; RV32IM-NEXT: lui t1, 559241 |
| ; RV32IM-NEXT: addi t1, t1, -1912 |
| ; RV32IM-NEXT: lui t3, 279620 |
| ; RV32IM-NEXT: and s11, s1, t1 |
| ; RV32IM-NEXT: addi t3, t3, 1092 |
| ; RV32IM-NEXT: and ra, s2, t3 |
| ; RV32IM-NEXT: and s1, s1, t3 |
| ; RV32IM-NEXT: and s2, s2, t1 |
| ; RV32IM-NEXT: mul t0, s10, s9 |
| ; RV32IM-NEXT: mul a7, ra, s11 |
| ; RV32IM-NEXT: mul a6, s2, s1 |
| ; RV32IM-NEXT: mul a5, s7, s11 |
| ; RV32IM-NEXT: mul a4, s10, s6 |
| ; RV32IM-NEXT: mul a3, ra, s1 |
| ; RV32IM-NEXT: mul a2, s2, s9 |
| ; RV32IM-NEXT: mul a1, s7, s9 |
| ; RV32IM-NEXT: mul s7, s7, s1 |
| ; RV32IM-NEXT: mul s1, s10, s1 |
| ; RV32IM-NEXT: mul s10, s10, s11 |
| ; RV32IM-NEXT: mul s11, s2, s11 |
| ; RV32IM-NEXT: mul a0, ra, s6 |
| ; RV32IM-NEXT: mul s9, ra, s9 |
| ; RV32IM-NEXT: mul s2, s2, s6 |
| ; RV32IM-NEXT: xor t0, t0, t5 |
| ; RV32IM-NEXT: xor a6, a7, a6 |
| ; RV32IM-NEXT: xor a4, a4, a5 |
| ; RV32IM-NEXT: xor a2, a3, a2 |
| ; RV32IM-NEXT: xor a3, t0, a6 |
| ; RV32IM-NEXT: xor a2, a4, a2 |
| ; RV32IM-NEXT: xor a1, s1, a1 |
| ; RV32IM-NEXT: and a3, a3, t2 |
| ; RV32IM-NEXT: and a2, a2, s8 |
| ; RV32IM-NEXT: xor a0, a0, s11 |
| ; RV32IM-NEXT: xor a4, s10, s7 |
| ; RV32IM-NEXT: xor a5, s9, s2 |
| ; RV32IM-NEXT: xor a0, a1, a0 |
| ; RV32IM-NEXT: xor a4, a4, a5 |
| ; RV32IM-NEXT: and a0, a0, t3 |
| ; RV32IM-NEXT: and a1, a4, t1 |
| ; RV32IM-NEXT: or a2, a2, a3 |
| ; RV32IM-NEXT: or a0, a0, a1 |
| ; RV32IM-NEXT: or a0, a2, a0 |
| ; RV32IM-NEXT: srli a1, a0, 8 |
| ; RV32IM-NEXT: lw a2, 0(s3) |
| ; RV32IM-NEXT: and a1, a1, s0 |
| ; RV32IM-NEXT: srli a3, a0, 24 |
| ; RV32IM-NEXT: and a4, a0, s0 |
| ; RV32IM-NEXT: slli a0, a0, 24 |
| ; RV32IM-NEXT: slli a4, a4, 8 |
| ; RV32IM-NEXT: or a1, a1, a3 |
| ; RV32IM-NEXT: or a0, a0, a4 |
| ; RV32IM-NEXT: or a0, a0, a1 |
| ; RV32IM-NEXT: srli a1, a0, 4 |
| ; RV32IM-NEXT: and a1, a1, t4 |
| ; RV32IM-NEXT: srli a3, a2, 8 |
| ; RV32IM-NEXT: and a0, a0, t4 |
| ; RV32IM-NEXT: and a3, a3, s0 |
| ; RV32IM-NEXT: srli a4, a2, 24 |
| ; RV32IM-NEXT: and a5, a2, s0 |
| ; RV32IM-NEXT: slli a5, a5, 8 |
| ; RV32IM-NEXT: slli a2, a2, 24 |
| ; RV32IM-NEXT: or a3, a3, a4 |
| ; RV32IM-NEXT: or a2, a2, a5 |
| ; RV32IM-NEXT: slli a0, a0, 4 |
| ; RV32IM-NEXT: or a2, a2, a3 |
| ; RV32IM-NEXT: srli a3, a2, 4 |
| ; RV32IM-NEXT: and a2, a2, t4 |
| ; RV32IM-NEXT: and a3, a3, t4 |
| ; RV32IM-NEXT: slli a2, a2, 4 |
| ; RV32IM-NEXT: or a0, a1, a0 |
| ; RV32IM-NEXT: or a2, a3, a2 |
| ; RV32IM-NEXT: srli a1, a2, 2 |
| ; RV32IM-NEXT: and a2, a2, s4 |
| ; RV32IM-NEXT: and a1, a1, s4 |
| ; RV32IM-NEXT: slli a2, a2, 2 |
| ; RV32IM-NEXT: srli a3, a0, 2 |
| ; RV32IM-NEXT: or a1, a1, a2 |
| ; RV32IM-NEXT: srli a2, a1, 1 |
| ; RV32IM-NEXT: lw s6, 104(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: and a1, a1, s6 |
| ; RV32IM-NEXT: and a2, a2, s6 |
| ; RV32IM-NEXT: slli a1, a1, 1 |
| ; RV32IM-NEXT: and a0, a0, s4 |
| ; RV32IM-NEXT: or a2, a2, a1 |
| ; RV32IM-NEXT: mv s3, s8 |
| ; RV32IM-NEXT: and s2, s5, s8 |
| ; RV32IM-NEXT: and a4, a2, t2 |
| ; RV32IM-NEXT: and s1, s5, t2 |
| ; RV32IM-NEXT: and a5, a2, s8 |
| ; RV32IM-NEXT: mul a6, a4, s2 |
| ; RV32IM-NEXT: mul a7, a5, s1 |
| ; RV32IM-NEXT: and a1, a3, s4 |
| ; RV32IM-NEXT: slli a0, a0, 2 |
| ; RV32IM-NEXT: or a0, a1, a0 |
| ; RV32IM-NEXT: srli a3, a0, 1 |
| ; RV32IM-NEXT: lui a1, 349525 |
| ; RV32IM-NEXT: addi a1, a1, 1364 |
| ; RV32IM-NEXT: sw a1, 100(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: and a0, a0, s6 |
| ; RV32IM-NEXT: and a3, a3, a1 |
| ; RV32IM-NEXT: slli a0, a0, 1 |
| ; RV32IM-NEXT: or a0, a3, a0 |
| ; RV32IM-NEXT: sw a0, 40(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: xor a0, a7, a6 |
| ; RV32IM-NEXT: and ra, s5, t1 |
| ; RV32IM-NEXT: and a3, a2, t3 |
| ; RV32IM-NEXT: and a1, s5, t3 |
| ; RV32IM-NEXT: and a2, a2, t1 |
| ; RV32IM-NEXT: mul a6, a3, ra |
| ; RV32IM-NEXT: mul a7, a2, a1 |
| ; RV32IM-NEXT: mul t0, a4, ra |
| ; RV32IM-NEXT: mul t5, a5, s2 |
| ; RV32IM-NEXT: mul s7, a3, a1 |
| ; RV32IM-NEXT: mul s8, a2, s1 |
| ; RV32IM-NEXT: mul s9, a4, s1 |
| ; RV32IM-NEXT: mv s5, s1 |
| ; RV32IM-NEXT: sw s1, 36(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: mul s10, a5, a1 |
| ; RV32IM-NEXT: mv s1, a1 |
| ; RV32IM-NEXT: sw a1, 48(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: sw s2, 32(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: mul s11, a3, s2 |
| ; RV32IM-NEXT: mv a1, ra |
| ; RV32IM-NEXT: sw ra, 44(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: mul ra, a2, ra |
| ; RV32IM-NEXT: mul a4, a4, s1 |
| ; RV32IM-NEXT: mul a5, a5, a1 |
| ; RV32IM-NEXT: mul a3, a3, s5 |
| ; RV32IM-NEXT: mul a2, a2, s2 |
| ; RV32IM-NEXT: xor a6, a6, a7 |
| ; RV32IM-NEXT: xor a7, t5, t0 |
| ; RV32IM-NEXT: xor t0, s7, s8 |
| ; RV32IM-NEXT: lw a1, 60(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: lw t5, 0(a1) |
| ; RV32IM-NEXT: xor a0, a0, a6 |
| ; RV32IM-NEXT: xor a6, a7, t0 |
| ; RV32IM-NEXT: xor a7, s10, s9 |
| ; RV32IM-NEXT: xor t0, s11, ra |
| ; RV32IM-NEXT: xor a7, a7, t0 |
| ; RV32IM-NEXT: xor a4, a5, a4 |
| ; RV32IM-NEXT: xor a2, a3, a2 |
| ; RV32IM-NEXT: srli a3, t5, 8 |
| ; RV32IM-NEXT: sw s0, 84(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: and a3, a3, s0 |
| ; RV32IM-NEXT: srli a5, t5, 24 |
| ; RV32IM-NEXT: or a3, a3, a5 |
| ; RV32IM-NEXT: and a5, t5, s0 |
| ; RV32IM-NEXT: slli a5, a5, 8 |
| ; RV32IM-NEXT: slli t5, t5, 24 |
| ; RV32IM-NEXT: or a5, t5, a5 |
| ; RV32IM-NEXT: and a0, a0, t2 |
| ; RV32IM-NEXT: sw a0, 60(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: and a0, a6, s3 |
| ; RV32IM-NEXT: sw a0, 20(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: or a3, a5, a3 |
| ; RV32IM-NEXT: srli a5, a3, 4 |
| ; RV32IM-NEXT: sw t4, 88(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: and a3, a3, t4 |
| ; RV32IM-NEXT: and a5, a5, t4 |
| ; RV32IM-NEXT: slli a3, a3, 4 |
| ; RV32IM-NEXT: and a0, a7, t3 |
| ; RV32IM-NEXT: sw a0, 16(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: or a3, a5, a3 |
| ; RV32IM-NEXT: srli a5, a3, 2 |
| ; RV32IM-NEXT: and a3, a3, s4 |
| ; RV32IM-NEXT: and a5, a5, s4 |
| ; RV32IM-NEXT: slli a3, a3, 2 |
| ; RV32IM-NEXT: xor a2, a4, a2 |
| ; RV32IM-NEXT: or a3, a5, a3 |
| ; RV32IM-NEXT: srli a4, a3, 1 |
| ; RV32IM-NEXT: and a3, a3, s6 |
| ; RV32IM-NEXT: and a4, a4, s6 |
| ; RV32IM-NEXT: slli a3, a3, 1 |
| ; RV32IM-NEXT: mv t4, t1 |
| ; RV32IM-NEXT: and a0, a2, t1 |
| ; RV32IM-NEXT: sw a0, 12(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: or a3, a4, a3 |
| ; RV32IM-NEXT: and a4, a3, s3 |
| ; RV32IM-NEXT: mv s0, t2 |
| ; RV32IM-NEXT: and a5, a3, t2 |
| ; RV32IM-NEXT: and a6, a3, t1 |
| ; RV32IM-NEXT: and a3, a3, t3 |
| ; RV32IM-NEXT: and s10, t6, t2 |
| ; RV32IM-NEXT: sw t2, 96(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: and s9, t6, s3 |
| ; RV32IM-NEXT: and s8, t6, t3 |
| ; RV32IM-NEXT: sw t3, 92(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: and s7, t6, t1 |
| ; RV32IM-NEXT: mul s5, s7, a3 |
| ; RV32IM-NEXT: mul s2, s8, a3 |
| ; RV32IM-NEXT: mul s1, s9, a3 |
| ; RV32IM-NEXT: mul t2, s10, a3 |
| ; RV32IM-NEXT: mul t5, s10, a4 |
| ; RV32IM-NEXT: mul t6, s9, a5 |
| ; RV32IM-NEXT: mul a7, s8, a6 |
| ; RV32IM-NEXT: mul t0, s10, a6 |
| ; RV32IM-NEXT: mul a0, s9, a4 |
| ; RV32IM-NEXT: mul a1, s7, a5 |
| ; RV32IM-NEXT: mul t1, s7, a6 |
| ; RV32IM-NEXT: mul a6, s9, a6 |
| ; RV32IM-NEXT: mul a2, s10, a5 |
| ; RV32IM-NEXT: mul a3, s8, a4 |
| ; RV32IM-NEXT: mul a5, s8, a5 |
| ; RV32IM-NEXT: mul a4, s7, a4 |
| ; RV32IM-NEXT: lw s11, 60(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: lw s6, 20(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: or s11, s6, s11 |
| ; RV32IM-NEXT: lw s6, 16(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: or s6, s6, ra |
| ; RV32IM-NEXT: xor t5, t6, t5 |
| ; RV32IM-NEXT: xor a7, a7, s5 |
| ; RV32IM-NEXT: xor a0, a0, t0 |
| ; RV32IM-NEXT: xor a1, s2, a1 |
| ; RV32IM-NEXT: xor a7, t5, a7 |
| ; RV32IM-NEXT: xor a0, a0, a1 |
| ; RV32IM-NEXT: xor a1, s1, a2 |
| ; RV32IM-NEXT: xor a2, a3, t1 |
| ; RV32IM-NEXT: xor a3, a6, t2 |
| ; RV32IM-NEXT: xor a4, a5, a4 |
| ; RV32IM-NEXT: xor a1, a1, a2 |
| ; RV32IM-NEXT: xor a3, a3, a4 |
| ; RV32IM-NEXT: and a2, a7, s0 |
| ; RV32IM-NEXT: and a0, a0, s3 |
| ; RV32IM-NEXT: mv s5, s3 |
| ; RV32IM-NEXT: and a1, a1, t3 |
| ; RV32IM-NEXT: and a3, a3, t4 |
| ; RV32IM-NEXT: or a0, a0, a2 |
| ; RV32IM-NEXT: or a1, a1, a3 |
| ; RV32IM-NEXT: or a2, s11, s6 |
| ; RV32IM-NEXT: or a0, a0, a1 |
| ; RV32IM-NEXT: lw a1, 40(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: srli a1, a1, 1 |
| ; RV32IM-NEXT: xor a0, a0, a2 |
| ; RV32IM-NEXT: xor a0, a1, a0 |
| ; RV32IM-NEXT: srli a1, a0, 8 |
| ; RV32IM-NEXT: lw s0, 84(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: and a1, a1, s0 |
| ; RV32IM-NEXT: srli a2, a0, 24 |
| ; RV32IM-NEXT: and a3, a0, s0 |
| ; RV32IM-NEXT: slli a0, a0, 24 |
| ; RV32IM-NEXT: slli a3, a3, 8 |
| ; RV32IM-NEXT: or a1, a1, a2 |
| ; RV32IM-NEXT: or a0, a0, a3 |
| ; RV32IM-NEXT: or a0, a0, a1 |
| ; RV32IM-NEXT: srli a1, a0, 4 |
| ; RV32IM-NEXT: lw ra, 88(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: and a0, a0, ra |
| ; RV32IM-NEXT: and a1, a1, ra |
| ; RV32IM-NEXT: slli a0, a0, 4 |
| ; RV32IM-NEXT: or a0, a1, a0 |
| ; RV32IM-NEXT: srli a1, a0, 2 |
| ; RV32IM-NEXT: and a0, a0, s4 |
| ; RV32IM-NEXT: and a1, a1, s4 |
| ; RV32IM-NEXT: slli a0, a0, 2 |
| ; RV32IM-NEXT: lw t3, 32(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: mul a2, s10, t3 |
| ; RV32IM-NEXT: lw s1, 36(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: mul a3, s9, s1 |
| ; RV32IM-NEXT: lw t6, 44(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: mul a4, s8, t6 |
| ; RV32IM-NEXT: lw s2, 48(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: mul a5, s7, s2 |
| ; RV32IM-NEXT: mul a6, s10, t6 |
| ; RV32IM-NEXT: mul a7, s9, t3 |
| ; RV32IM-NEXT: mul t0, s8, s2 |
| ; RV32IM-NEXT: mul t1, s7, s1 |
| ; RV32IM-NEXT: or a0, a1, a0 |
| ; RV32IM-NEXT: srli a1, a0, 1 |
| ; RV32IM-NEXT: lw s11, 104(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: and a0, a0, s11 |
| ; RV32IM-NEXT: lw t2, 100(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: and a1, a1, t2 |
| ; RV32IM-NEXT: slli a0, a0, 1 |
| ; RV32IM-NEXT: or a0, a1, a0 |
| ; RV32IM-NEXT: sw a0, 60(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: xor a2, a3, a2 |
| ; RV32IM-NEXT: xor a4, a4, a5 |
| ; RV32IM-NEXT: xor a1, a7, a6 |
| ; RV32IM-NEXT: xor a3, t0, t1 |
| ; RV32IM-NEXT: mul a5, s10, s1 |
| ; RV32IM-NEXT: mul a6, s9, s2 |
| ; RV32IM-NEXT: xor a2, a2, a4 |
| ; RV32IM-NEXT: xor s6, a1, a3 |
| ; RV32IM-NEXT: lw a7, 52(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: srli a1, a7, 8 |
| ; RV32IM-NEXT: and a3, a7, s0 |
| ; RV32IM-NEXT: and a1, a1, s0 |
| ; RV32IM-NEXT: slli a3, a3, 8 |
| ; RV32IM-NEXT: srli a4, a7, 24 |
| ; RV32IM-NEXT: slli a7, a7, 24 |
| ; RV32IM-NEXT: or a1, a1, a4 |
| ; RV32IM-NEXT: or a3, a7, a3 |
| ; RV32IM-NEXT: xor t5, a6, a5 |
| ; RV32IM-NEXT: or a1, a3, a1 |
| ; RV32IM-NEXT: srli a3, a1, 4 |
| ; RV32IM-NEXT: and a1, a1, ra |
| ; RV32IM-NEXT: and a3, a3, ra |
| ; RV32IM-NEXT: slli a1, a1, 4 |
| ; RV32IM-NEXT: or a1, a3, a1 |
| ; RV32IM-NEXT: mul a3, s8, t3 |
| ; RV32IM-NEXT: mul a4, s10, s2 |
| ; RV32IM-NEXT: srli a5, a1, 2 |
| ; RV32IM-NEXT: and a5, a5, s4 |
| ; RV32IM-NEXT: and a1, a1, s4 |
| ; RV32IM-NEXT: slli a1, a1, 2 |
| ; RV32IM-NEXT: mul a6, s7, t6 |
| ; RV32IM-NEXT: mul a7, s9, t6 |
| ; RV32IM-NEXT: or a1, a5, a1 |
| ; RV32IM-NEXT: srli a5, a1, 1 |
| ; RV32IM-NEXT: mv s9, s11 |
| ; RV32IM-NEXT: and a1, a1, s11 |
| ; RV32IM-NEXT: and a5, a5, s11 |
| ; RV32IM-NEXT: slli a1, a1, 1 |
| ; RV32IM-NEXT: mul t0, s8, s1 |
| ; RV32IM-NEXT: or t6, a5, a1 |
| ; RV32IM-NEXT: mul a1, s7, t3 |
| ; RV32IM-NEXT: srli a5, t6, 8 |
| ; RV32IM-NEXT: xor s1, a3, a6 |
| ; RV32IM-NEXT: and a3, a5, s0 |
| ; RV32IM-NEXT: srli a5, t6, 24 |
| ; RV32IM-NEXT: and a6, t6, s0 |
| ; RV32IM-NEXT: slli t1, t6, 24 |
| ; RV32IM-NEXT: slli a6, a6, 8 |
| ; RV32IM-NEXT: or a3, a3, a5 |
| ; RV32IM-NEXT: or a5, t1, a6 |
| ; RV32IM-NEXT: xor s2, a7, a4 |
| ; RV32IM-NEXT: or a3, a5, a3 |
| ; RV32IM-NEXT: xor a0, t0, a1 |
| ; RV32IM-NEXT: srli a1, a3, 4 |
| ; RV32IM-NEXT: and a1, a1, ra |
| ; RV32IM-NEXT: and a3, a3, ra |
| ; RV32IM-NEXT: slli a3, a3, 4 |
| ; RV32IM-NEXT: lw a6, 56(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: srli a4, a6, 8 |
| ; RV32IM-NEXT: or a1, a1, a3 |
| ; RV32IM-NEXT: and a3, a4, s0 |
| ; RV32IM-NEXT: srli a4, a6, 24 |
| ; RV32IM-NEXT: and a5, a6, s0 |
| ; RV32IM-NEXT: slli a5, a5, 8 |
| ; RV32IM-NEXT: slli a6, a6, 24 |
| ; RV32IM-NEXT: or a3, a3, a4 |
| ; RV32IM-NEXT: or a4, a6, a5 |
| ; RV32IM-NEXT: srli a5, a1, 2 |
| ; RV32IM-NEXT: or a3, a4, a3 |
| ; RV32IM-NEXT: srli a4, a3, 4 |
| ; RV32IM-NEXT: and a3, a3, ra |
| ; RV32IM-NEXT: and a4, a4, ra |
| ; RV32IM-NEXT: slli a3, a3, 4 |
| ; RV32IM-NEXT: and a5, a5, s4 |
| ; RV32IM-NEXT: or a3, a4, a3 |
| ; RV32IM-NEXT: srli a4, a3, 2 |
| ; RV32IM-NEXT: and a3, a3, s4 |
| ; RV32IM-NEXT: and a4, a4, s4 |
| ; RV32IM-NEXT: slli a3, a3, 2 |
| ; RV32IM-NEXT: and a1, a1, s4 |
| ; RV32IM-NEXT: or a3, a4, a3 |
| ; RV32IM-NEXT: srli a4, a3, 1 |
| ; RV32IM-NEXT: and a3, a3, s11 |
| ; RV32IM-NEXT: and a4, a4, s11 |
| ; RV32IM-NEXT: slli a3, a3, 1 |
| ; RV32IM-NEXT: slli a1, a1, 2 |
| ; RV32IM-NEXT: or a7, a4, a3 |
| ; RV32IM-NEXT: sw a7, 56(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: or a1, a5, a1 |
| ; RV32IM-NEXT: srli a3, a7, 8 |
| ; RV32IM-NEXT: srli a4, a1, 1 |
| ; RV32IM-NEXT: and a3, a3, s0 |
| ; RV32IM-NEXT: srli a5, a7, 24 |
| ; RV32IM-NEXT: and a6, a7, s0 |
| ; RV32IM-NEXT: slli a7, a7, 24 |
| ; RV32IM-NEXT: slli a6, a6, 8 |
| ; RV32IM-NEXT: or a3, a3, a5 |
| ; RV32IM-NEXT: or a5, a7, a6 |
| ; RV32IM-NEXT: and a4, a4, s11 |
| ; RV32IM-NEXT: or a3, a5, a3 |
| ; RV32IM-NEXT: srli a5, a3, 4 |
| ; RV32IM-NEXT: and a3, a3, ra |
| ; RV32IM-NEXT: and a5, a5, ra |
| ; RV32IM-NEXT: slli a3, a3, 4 |
| ; RV32IM-NEXT: and a1, a1, s11 |
| ; RV32IM-NEXT: or a3, a5, a3 |
| ; RV32IM-NEXT: srli a5, a3, 2 |
| ; RV32IM-NEXT: and a3, a3, s4 |
| ; RV32IM-NEXT: and a5, a5, s4 |
| ; RV32IM-NEXT: mv s3, s4 |
| ; RV32IM-NEXT: slli a3, a3, 2 |
| ; RV32IM-NEXT: slli a1, a1, 1 |
| ; RV32IM-NEXT: or a3, a5, a3 |
| ; RV32IM-NEXT: srli a5, a3, 1 |
| ; RV32IM-NEXT: and a3, a3, s11 |
| ; RV32IM-NEXT: and a5, a5, s11 |
| ; RV32IM-NEXT: slli a3, a3, 1 |
| ; RV32IM-NEXT: or a1, a4, a1 |
| ; RV32IM-NEXT: or a3, a5, a3 |
| ; RV32IM-NEXT: mv s8, s5 |
| ; RV32IM-NEXT: and s5, a1, s5 |
| ; RV32IM-NEXT: lw s11, 96(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: and a4, a3, s11 |
| ; RV32IM-NEXT: and a5, a1, s11 |
| ; RV32IM-NEXT: and a6, a1, t4 |
| ; RV32IM-NEXT: lw s4, 92(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: and a1, a1, s4 |
| ; RV32IM-NEXT: and a7, a3, s8 |
| ; RV32IM-NEXT: and t0, a3, s4 |
| ; RV32IM-NEXT: and a3, a3, t4 |
| ; RV32IM-NEXT: mv s10, t4 |
| ; RV32IM-NEXT: mul t1, a4, s5 |
| ; RV32IM-NEXT: mul t2, a7, a5 |
| ; RV32IM-NEXT: mul t3, t0, a6 |
| ; RV32IM-NEXT: mul t4, a3, a1 |
| ; RV32IM-NEXT: xor t5, t5, s1 |
| ; RV32IM-NEXT: xor s1, s2, a0 |
| ; RV32IM-NEXT: and a2, a2, s11 |
| ; RV32IM-NEXT: and s2, s6, s8 |
| ; RV32IM-NEXT: and t5, t5, s4 |
| ; RV32IM-NEXT: mv a0, s4 |
| ; RV32IM-NEXT: and s1, s1, s10 |
| ; RV32IM-NEXT: or a2, s2, a2 |
| ; RV32IM-NEXT: or t5, t5, s1 |
| ; RV32IM-NEXT: or a2, a2, t5 |
| ; RV32IM-NEXT: xor t1, t2, t1 |
| ; RV32IM-NEXT: xor t2, t3, t4 |
| ; RV32IM-NEXT: srli t3, a2, 8 |
| ; RV32IM-NEXT: and t3, t3, s0 |
| ; RV32IM-NEXT: srli t4, a2, 24 |
| ; RV32IM-NEXT: mul t5, a4, a6 |
| ; RV32IM-NEXT: mul s1, a7, s5 |
| ; RV32IM-NEXT: mul s2, t0, a1 |
| ; RV32IM-NEXT: mul s4, a3, a5 |
| ; RV32IM-NEXT: mul s6, a4, a5 |
| ; RV32IM-NEXT: mul s7, a7, a1 |
| ; RV32IM-NEXT: or t3, t3, t4 |
| ; RV32IM-NEXT: xor t1, t1, t2 |
| ; RV32IM-NEXT: mul a1, a4, a1 |
| ; RV32IM-NEXT: mul a4, a7, a6 |
| ; RV32IM-NEXT: mul a6, a3, a6 |
| ; RV32IM-NEXT: mul a7, t0, s5 |
| ; RV32IM-NEXT: mul a5, t0, a5 |
| ; RV32IM-NEXT: mul a3, a3, s5 |
| ; RV32IM-NEXT: xor t0, s1, t5 |
| ; RV32IM-NEXT: xor t2, s2, s4 |
| ; RV32IM-NEXT: xor t0, t0, t2 |
| ; RV32IM-NEXT: xor t2, s7, s6 |
| ; RV32IM-NEXT: slli t4, a2, 24 |
| ; RV32IM-NEXT: and a2, a2, s0 |
| ; RV32IM-NEXT: slli a2, a2, 8 |
| ; RV32IM-NEXT: and t1, t1, s11 |
| ; RV32IM-NEXT: and t0, t0, s8 |
| ; RV32IM-NEXT: xor a6, a7, a6 |
| ; RV32IM-NEXT: xor a1, a4, a1 |
| ; RV32IM-NEXT: xor a3, a5, a3 |
| ; RV32IM-NEXT: xor a4, t2, a6 |
| ; RV32IM-NEXT: xor a1, a1, a3 |
| ; RV32IM-NEXT: and a3, a4, a0 |
| ; RV32IM-NEXT: mv t2, a0 |
| ; RV32IM-NEXT: and a1, a1, s10 |
| ; RV32IM-NEXT: or a4, t0, t1 |
| ; RV32IM-NEXT: or a1, a3, a1 |
| ; RV32IM-NEXT: or a2, t4, a2 |
| ; RV32IM-NEXT: or a1, a4, a1 |
| ; RV32IM-NEXT: or a3, a2, t3 |
| ; RV32IM-NEXT: srli a2, a1, 8 |
| ; RV32IM-NEXT: srli a4, a3, 4 |
| ; RV32IM-NEXT: and a2, a2, s0 |
| ; RV32IM-NEXT: srli a5, a1, 24 |
| ; RV32IM-NEXT: and a6, a1, s0 |
| ; RV32IM-NEXT: slli a1, a1, 24 |
| ; RV32IM-NEXT: slli a6, a6, 8 |
| ; RV32IM-NEXT: or a5, a2, a5 |
| ; RV32IM-NEXT: or a1, a1, a6 |
| ; RV32IM-NEXT: mv a2, ra |
| ; RV32IM-NEXT: and a4, a4, ra |
| ; RV32IM-NEXT: sw a4, 52(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: or a1, a1, a5 |
| ; RV32IM-NEXT: srli a4, a1, 4 |
| ; RV32IM-NEXT: and a1, a1, ra |
| ; RV32IM-NEXT: and a4, a4, ra |
| ; RV32IM-NEXT: slli a1, a1, 4 |
| ; RV32IM-NEXT: and s4, a3, ra |
| ; RV32IM-NEXT: or a1, a4, a1 |
| ; RV32IM-NEXT: slli s4, s4, 4 |
| ; RV32IM-NEXT: sw s4, 48(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: srli a3, a1, 2 |
| ; RV32IM-NEXT: and a3, a3, s3 |
| ; RV32IM-NEXT: lw a0, 64(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: srli a4, a0, 8 |
| ; RV32IM-NEXT: and a1, a1, s3 |
| ; RV32IM-NEXT: and a4, a4, s0 |
| ; RV32IM-NEXT: srli a5, a0, 24 |
| ; RV32IM-NEXT: and a6, a0, s0 |
| ; RV32IM-NEXT: slli a6, a6, 8 |
| ; RV32IM-NEXT: slli a7, a0, 24 |
| ; RV32IM-NEXT: or a4, a4, a5 |
| ; RV32IM-NEXT: or a5, a7, a6 |
| ; RV32IM-NEXT: slli a1, a1, 2 |
| ; RV32IM-NEXT: or a4, a5, a4 |
| ; RV32IM-NEXT: srli a5, a4, 4 |
| ; RV32IM-NEXT: and a4, a4, ra |
| ; RV32IM-NEXT: and a5, a5, ra |
| ; RV32IM-NEXT: slli a4, a4, 4 |
| ; RV32IM-NEXT: or a1, a3, a1 |
| ; RV32IM-NEXT: or a4, a5, a4 |
| ; RV32IM-NEXT: srli a3, a4, 2 |
| ; RV32IM-NEXT: sw s3, 28(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: and a4, a4, s3 |
| ; RV32IM-NEXT: and a3, a3, s3 |
| ; RV32IM-NEXT: slli a4, a4, 2 |
| ; RV32IM-NEXT: srli a5, a1, 1 |
| ; RV32IM-NEXT: or a3, a3, a4 |
| ; RV32IM-NEXT: srli a4, a3, 1 |
| ; RV32IM-NEXT: and a3, a3, s9 |
| ; RV32IM-NEXT: and a4, a4, s9 |
| ; RV32IM-NEXT: slli a3, a3, 1 |
| ; RV32IM-NEXT: and a1, a1, s9 |
| ; RV32IM-NEXT: or a3, a4, a3 |
| ; RV32IM-NEXT: mv s4, s8 |
| ; RV32IM-NEXT: and t5, t6, s8 |
| ; RV32IM-NEXT: and a4, a3, s11 |
| ; RV32IM-NEXT: and s3, t6, s11 |
| ; RV32IM-NEXT: and a6, a3, s8 |
| ; RV32IM-NEXT: mul a7, a4, t5 |
| ; RV32IM-NEXT: mul t0, a6, s3 |
| ; RV32IM-NEXT: sw s10, 80(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: and s2, t6, s10 |
| ; RV32IM-NEXT: and t1, a3, t2 |
| ; RV32IM-NEXT: and s1, t6, t2 |
| ; RV32IM-NEXT: mv t6, t2 |
| ; RV32IM-NEXT: and a3, a3, s10 |
| ; RV32IM-NEXT: mul t2, t1, s2 |
| ; RV32IM-NEXT: mul t3, a3, s1 |
| ; RV32IM-NEXT: mul t4, a4, s2 |
| ; RV32IM-NEXT: mul s6, a6, t5 |
| ; RV32IM-NEXT: mul s7, t1, s1 |
| ; RV32IM-NEXT: mul s8, a3, s3 |
| ; RV32IM-NEXT: mul s9, a4, s3 |
| ; RV32IM-NEXT: mul s10, a6, s1 |
| ; RV32IM-NEXT: mul s11, t1, t5 |
| ; RV32IM-NEXT: sw t5, 64(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: mul ra, a3, s2 |
| ; RV32IM-NEXT: lw a0, 100(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: and a5, a5, a0 |
| ; RV32IM-NEXT: slli a1, a1, 1 |
| ; RV32IM-NEXT: lw a0, 52(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: lw s5, 48(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: or a0, a0, s5 |
| ; RV32IM-NEXT: sw a0, 52(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: or a1, a5, a1 |
| ; RV32IM-NEXT: sw a1, 48(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: xor a1, t0, a7 |
| ; RV32IM-NEXT: xor a5, t2, t3 |
| ; RV32IM-NEXT: xor a7, s6, t4 |
| ; RV32IM-NEXT: xor t0, s7, s8 |
| ; RV32IM-NEXT: xor a1, a1, a5 |
| ; RV32IM-NEXT: xor a5, a7, t0 |
| ; RV32IM-NEXT: xor a7, s10, s9 |
| ; RV32IM-NEXT: xor t0, s11, ra |
| ; RV32IM-NEXT: xor a7, a7, t0 |
| ; RV32IM-NEXT: mul a4, a4, s1 |
| ; RV32IM-NEXT: mul a6, a6, s2 |
| ; RV32IM-NEXT: lw a0, 68(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: srli t0, a0, 8 |
| ; RV32IM-NEXT: and t0, t0, s0 |
| ; RV32IM-NEXT: srli t2, a0, 24 |
| ; RV32IM-NEXT: or t0, t0, t2 |
| ; RV32IM-NEXT: mul t1, t1, s3 |
| ; RV32IM-NEXT: mul a3, a3, t5 |
| ; RV32IM-NEXT: and t2, a0, s0 |
| ; RV32IM-NEXT: slli t2, t2, 8 |
| ; RV32IM-NEXT: slli t3, a0, 24 |
| ; RV32IM-NEXT: or t2, t3, t2 |
| ; RV32IM-NEXT: lw s5, 96(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: and a0, a1, s5 |
| ; RV32IM-NEXT: sw a0, 68(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: and s8, a5, s4 |
| ; RV32IM-NEXT: and a0, a7, t6 |
| ; RV32IM-NEXT: sw a0, 44(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: xor a1, a6, a4 |
| ; RV32IM-NEXT: or a4, t2, t0 |
| ; RV32IM-NEXT: srli a5, a4, 4 |
| ; RV32IM-NEXT: and a4, a4, a2 |
| ; RV32IM-NEXT: and a5, a5, a2 |
| ; RV32IM-NEXT: slli a4, a4, 4 |
| ; RV32IM-NEXT: xor a3, t1, a3 |
| ; RV32IM-NEXT: or a4, a5, a4 |
| ; RV32IM-NEXT: srli a5, a4, 2 |
| ; RV32IM-NEXT: lw s9, 28(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: and a4, a4, s9 |
| ; RV32IM-NEXT: and a5, a5, s9 |
| ; RV32IM-NEXT: slli a4, a4, 2 |
| ; RV32IM-NEXT: xor a1, a1, a3 |
| ; RV32IM-NEXT: or a4, a5, a4 |
| ; RV32IM-NEXT: srli a3, a4, 1 |
| ; RV32IM-NEXT: lw a0, 104(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: and a4, a4, a0 |
| ; RV32IM-NEXT: and a3, a3, a0 |
| ; RV32IM-NEXT: slli a4, a4, 1 |
| ; RV32IM-NEXT: lw a0, 80(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: and s7, a1, a0 |
| ; RV32IM-NEXT: or a3, a3, a4 |
| ; RV32IM-NEXT: mv t1, s4 |
| ; RV32IM-NEXT: and a4, a3, s4 |
| ; RV32IM-NEXT: lw a2, 56(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: and t4, a2, s5 |
| ; RV32IM-NEXT: and a5, a3, s5 |
| ; RV32IM-NEXT: and a6, a3, a0 |
| ; RV32IM-NEXT: and a3, a3, t6 |
| ; RV32IM-NEXT: and s6, a2, s4 |
| ; RV32IM-NEXT: sw s4, 24(sp) # 4-byte Folded Spill |
| ; RV32IM-NEXT: and s4, a2, t6 |
| ; RV32IM-NEXT: and t6, a2, a0 |
| ; RV32IM-NEXT: mul s5, t6, a3 |
| ; RV32IM-NEXT: mul t0, s4, a3 |
| ; RV32IM-NEXT: mul t5, s6, a3 |
| ; RV32IM-NEXT: mul a7, t4, a3 |
| ; RV32IM-NEXT: mul t2, t4, a4 |
| ; RV32IM-NEXT: mul t3, s6, a5 |
| ; RV32IM-NEXT: mul s10, s4, a6 |
| ; RV32IM-NEXT: mul s11, t4, a6 |
| ; RV32IM-NEXT: mul ra, s6, a4 |
| ; RV32IM-NEXT: mul a0, t6, a5 |
| ; RV32IM-NEXT: mul a3, t6, a6 |
| ; RV32IM-NEXT: mul a6, s6, a6 |
| ; RV32IM-NEXT: mul a1, t4, a5 |
| ; RV32IM-NEXT: mul a2, s4, a4 |
| ; RV32IM-NEXT: mul a5, s4, a5 |
| ; RV32IM-NEXT: mul a4, t6, a4 |
| ; RV32IM-NEXT: lw s0, 68(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: or s8, s8, s0 |
| ; RV32IM-NEXT: lw s0, 44(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: or s7, s0, s7 |
| ; RV32IM-NEXT: xor t2, t3, t2 |
| ; RV32IM-NEXT: xor t3, s10, s5 |
| ; RV32IM-NEXT: xor s5, ra, s11 |
| ; RV32IM-NEXT: xor a0, t0, a0 |
| ; RV32IM-NEXT: xor t0, t2, t3 |
| ; RV32IM-NEXT: xor a0, s5, a0 |
| ; RV32IM-NEXT: xor a1, t5, a1 |
| ; RV32IM-NEXT: xor a2, a2, a3 |
| ; RV32IM-NEXT: xor a3, a6, a7 |
| ; RV32IM-NEXT: xor a4, a5, a4 |
| ; RV32IM-NEXT: xor a1, a1, a2 |
| ; RV32IM-NEXT: xor a3, a3, a4 |
| ; RV32IM-NEXT: lw s11, 96(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: and a2, t0, s11 |
| ; RV32IM-NEXT: and a0, a0, t1 |
| ; RV32IM-NEXT: lw ra, 92(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: and a1, a1, ra |
| ; RV32IM-NEXT: lw s10, 80(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: and a3, a3, s10 |
| ; RV32IM-NEXT: or a0, a0, a2 |
| ; RV32IM-NEXT: or a1, a1, a3 |
| ; RV32IM-NEXT: or a2, s8, s7 |
| ; RV32IM-NEXT: or a0, a0, a1 |
| ; RV32IM-NEXT: lw a1, 48(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: srli a1, a1, 1 |
| ; RV32IM-NEXT: xor a0, a0, a2 |
| ; RV32IM-NEXT: lw a3, 52(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: srli a2, a3, 2 |
| ; RV32IM-NEXT: xor a0, a1, a0 |
| ; RV32IM-NEXT: and a1, a2, s9 |
| ; RV32IM-NEXT: srli a2, a0, 8 |
| ; RV32IM-NEXT: and a3, a3, s9 |
| ; RV32IM-NEXT: lw s7, 84(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: and a2, a2, s7 |
| ; RV32IM-NEXT: srli a4, a0, 24 |
| ; RV32IM-NEXT: and a5, a0, s7 |
| ; RV32IM-NEXT: slli a0, a0, 24 |
| ; RV32IM-NEXT: slli a5, a5, 8 |
| ; RV32IM-NEXT: or a2, a2, a4 |
| ; RV32IM-NEXT: or a0, a0, a5 |
| ; RV32IM-NEXT: slli a3, a3, 2 |
| ; RV32IM-NEXT: or a0, a0, a2 |
| ; RV32IM-NEXT: lw t5, 64(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: mul a4, t4, t5 |
| ; RV32IM-NEXT: mul a5, s6, s3 |
| ; RV32IM-NEXT: mul a6, s4, s2 |
| ; RV32IM-NEXT: mul a7, t6, s1 |
| ; RV32IM-NEXT: srli a2, a0, 4 |
| ; RV32IM-NEXT: lw s5, 88(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: and a0, a0, s5 |
| ; RV32IM-NEXT: and t0, a2, s5 |
| ; RV32IM-NEXT: slli a0, a0, 4 |
| ; RV32IM-NEXT: or a2, a1, a3 |
| ; RV32IM-NEXT: or a0, t0, a0 |
| ; RV32IM-NEXT: mul a1, t4, s2 |
| ; RV32IM-NEXT: mul a3, s6, t5 |
| ; RV32IM-NEXT: mul t0, s4, s1 |
| ; RV32IM-NEXT: mul t1, t6, s3 |
| ; RV32IM-NEXT: xor a4, a5, a4 |
| ; RV32IM-NEXT: xor a5, a6, a7 |
| ; RV32IM-NEXT: mul a6, t4, s3 |
| ; RV32IM-NEXT: mul a7, s6, s1 |
| ; RV32IM-NEXT: mul t2, s4, t5 |
| ; RV32IM-NEXT: mul t3, t6, s2 |
| ; RV32IM-NEXT: mul t4, t4, s1 |
| ; RV32IM-NEXT: mul s0, s6, s2 |
| ; RV32IM-NEXT: mul s1, s4, s3 |
| ; RV32IM-NEXT: mul t5, t6, t5 |
| ; RV32IM-NEXT: xor a1, a3, a1 |
| ; RV32IM-NEXT: xor a3, t0, t1 |
| ; RV32IM-NEXT: xor a4, a4, a5 |
| ; RV32IM-NEXT: xor a1, a1, a3 |
| ; RV32IM-NEXT: and a3, a4, s11 |
| ; RV32IM-NEXT: lw a4, 24(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: and a1, a1, a4 |
| ; RV32IM-NEXT: xor a4, a7, a6 |
| ; RV32IM-NEXT: xor a5, t2, t3 |
| ; RV32IM-NEXT: or a1, a1, a3 |
| ; RV32IM-NEXT: xor a4, a4, a5 |
| ; RV32IM-NEXT: xor a3, s0, t4 |
| ; RV32IM-NEXT: xor a5, s1, t5 |
| ; RV32IM-NEXT: and a4, a4, ra |
| ; RV32IM-NEXT: xor a3, a3, a5 |
| ; RV32IM-NEXT: and a3, a3, s10 |
| ; RV32IM-NEXT: srli a5, a0, 2 |
| ; RV32IM-NEXT: or a3, a4, a3 |
| ; RV32IM-NEXT: and a4, a5, s9 |
| ; RV32IM-NEXT: and a0, a0, s9 |
| ; RV32IM-NEXT: or a1, a1, a3 |
| ; RV32IM-NEXT: slli a0, a0, 2 |
| ; RV32IM-NEXT: srli a3, a1, 8 |
| ; RV32IM-NEXT: or a0, a4, a0 |
| ; RV32IM-NEXT: and a3, a3, s7 |
| ; RV32IM-NEXT: srli a4, a1, 24 |
| ; RV32IM-NEXT: and a5, a1, s7 |
| ; RV32IM-NEXT: slli a1, a1, 24 |
| ; RV32IM-NEXT: slli a5, a5, 8 |
| ; RV32IM-NEXT: or a3, a3, a4 |
| ; RV32IM-NEXT: or a1, a1, a5 |
| ; RV32IM-NEXT: lw a4, 60(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: srli a4, a4, 1 |
| ; RV32IM-NEXT: or a1, a1, a3 |
| ; RV32IM-NEXT: srli a3, a1, 4 |
| ; RV32IM-NEXT: and a1, a1, s5 |
| ; RV32IM-NEXT: and a3, a3, s5 |
| ; RV32IM-NEXT: slli a1, a1, 4 |
| ; RV32IM-NEXT: srli a5, a0, 1 |
| ; RV32IM-NEXT: or a1, a3, a1 |
| ; RV32IM-NEXT: lw a3, 100(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: and a3, a5, a3 |
| ; RV32IM-NEXT: srli a5, a1, 2 |
| ; RV32IM-NEXT: srli a6, a2, 1 |
| ; RV32IM-NEXT: and a5, a5, s9 |
| ; RV32IM-NEXT: and a1, a1, s9 |
| ; RV32IM-NEXT: slli a7, a6, 31 |
| ; RV32IM-NEXT: lw t0, 104(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: and a0, a0, t0 |
| ; RV32IM-NEXT: slli a1, a1, 2 |
| ; RV32IM-NEXT: slli a0, a0, 1 |
| ; RV32IM-NEXT: or a1, a5, a1 |
| ; RV32IM-NEXT: or a0, a3, a0 |
| ; RV32IM-NEXT: srli a3, a1, 1 |
| ; RV32IM-NEXT: srli a0, a0, 1 |
| ; RV32IM-NEXT: slli a5, a3, 31 |
| ; RV32IM-NEXT: or a4, a4, a7 |
| ; RV32IM-NEXT: or a0, a0, a5 |
| ; RV32IM-NEXT: and a5, a6, t0 |
| ; RV32IM-NEXT: and a2, a2, t0 |
| ; RV32IM-NEXT: and a3, a3, t0 |
| ; RV32IM-NEXT: and a1, a1, t0 |
| ; RV32IM-NEXT: slli a2, a2, 1 |
| ; RV32IM-NEXT: slli a1, a1, 1 |
| ; RV32IM-NEXT: or a2, a5, a2 |
| ; RV32IM-NEXT: or a1, a3, a1 |
| ; RV32IM-NEXT: srli a2, a2, 1 |
| ; RV32IM-NEXT: srli a1, a1, 1 |
| ; RV32IM-NEXT: lw a3, 72(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: sw a4, 0(a3) |
| ; RV32IM-NEXT: sw a2, 4(a3) |
| ; RV32IM-NEXT: sw a0, 8(a3) |
| ; RV32IM-NEXT: sw a1, 12(a3) |
| ; RV32IM-NEXT: lw a3, 76(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: sw a4, 0(a3) |
| ; RV32IM-NEXT: sw a2, 4(a3) |
| ; RV32IM-NEXT: sw a0, 8(a3) |
| ; RV32IM-NEXT: sw a1, 12(a3) |
| ; RV32IM-NEXT: lw ra, 156(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: lw s0, 152(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: lw s1, 148(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: lw s2, 144(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: lw s3, 140(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: lw s4, 136(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: lw s5, 132(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: lw s6, 128(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: lw s7, 124(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: lw s8, 120(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: lw s9, 116(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: lw s10, 112(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: lw s11, 108(sp) # 4-byte Folded Reload |
| ; RV32IM-NEXT: addi sp, sp, 160 |
| ; RV32IM-NEXT: ret |
| ; |
| ; RV64IM-LABEL: commutative_clmulh_v2i64: |
| ; RV64IM: # %bb.0: |
| ; RV64IM-NEXT: addi sp, sp, -128 |
| ; RV64IM-NEXT: sd ra, 120(sp) # 8-byte Folded Spill |
| ; RV64IM-NEXT: sd s0, 112(sp) # 8-byte Folded Spill |
| ; RV64IM-NEXT: sd s1, 104(sp) # 8-byte Folded Spill |
| ; RV64IM-NEXT: sd s2, 96(sp) # 8-byte Folded Spill |
| ; RV64IM-NEXT: sd s3, 88(sp) # 8-byte Folded Spill |
| ; RV64IM-NEXT: sd s4, 80(sp) # 8-byte Folded Spill |
| ; RV64IM-NEXT: sd s5, 72(sp) # 8-byte Folded Spill |
| ; RV64IM-NEXT: sd s6, 64(sp) # 8-byte Folded Spill |
| ; RV64IM-NEXT: sd s7, 56(sp) # 8-byte Folded Spill |
| ; RV64IM-NEXT: sd s8, 48(sp) # 8-byte Folded Spill |
| ; RV64IM-NEXT: sd s9, 40(sp) # 8-byte Folded Spill |
| ; RV64IM-NEXT: sd s10, 32(sp) # 8-byte Folded Spill |
| ; RV64IM-NEXT: sd s11, 24(sp) # 8-byte Folded Spill |
| ; RV64IM-NEXT: sd a5, 16(sp) # 8-byte Folded Spill |
| ; RV64IM-NEXT: sd a4, 8(sp) # 8-byte Folded Spill |
| ; RV64IM-NEXT: mv a6, a3 |
| ; RV64IM-NEXT: mv a4, a1 |
| ; RV64IM-NEXT: srli a7, a0, 24 |
| ; RV64IM-NEXT: lui a1, 4080 |
| ; RV64IM-NEXT: and t1, a7, a1 |
| ; RV64IM-NEXT: li t0, 255 |
| ; RV64IM-NEXT: srli a7, a0, 8 |
| ; RV64IM-NEXT: slli t0, t0, 24 |
| ; RV64IM-NEXT: and t2, a7, t0 |
| ; RV64IM-NEXT: sd t0, 0(sp) # 8-byte Folded Spill |
| ; RV64IM-NEXT: lui a7, 16 |
| ; RV64IM-NEXT: srli t3, a0, 40 |
| ; RV64IM-NEXT: addi a7, a7, -256 |
| ; RV64IM-NEXT: and t3, t3, a7 |
| ; RV64IM-NEXT: srli t4, a0, 56 |
| ; RV64IM-NEXT: or t1, t2, t1 |
| ; RV64IM-NEXT: or t2, t3, t4 |
| ; RV64IM-NEXT: or t1, t1, t2 |
| ; RV64IM-NEXT: and t2, a0, a1 |
| ; RV64IM-NEXT: srliw t3, a0, 24 |
| ; RV64IM-NEXT: slli t2, t2, 24 |
| ; RV64IM-NEXT: slli t3, t3, 32 |
| ; RV64IM-NEXT: or t2, t2, t3 |
| ; RV64IM-NEXT: and t3, a0, a7 |
| ; RV64IM-NEXT: slli t3, t3, 40 |
| ; RV64IM-NEXT: slli a0, a0, 56 |
| ; RV64IM-NEXT: or a0, a0, t3 |
| ; RV64IM-NEXT: lui t3, 61681 |
| ; RV64IM-NEXT: or a0, a0, t2 |
| ; RV64IM-NEXT: addi t2, t3, -241 |
| ; RV64IM-NEXT: or t1, a0, t1 |
| ; RV64IM-NEXT: slli a0, t2, 32 |
| ; RV64IM-NEXT: srli t3, t1, 4 |
| ; RV64IM-NEXT: add a5, t2, a0 |
| ; RV64IM-NEXT: and t2, t3, a5 |
| ; RV64IM-NEXT: and t1, t1, a5 |
| ; RV64IM-NEXT: lui t3, 209715 |
| ; RV64IM-NEXT: slli t1, t1, 4 |
| ; RV64IM-NEXT: addi t3, t3, 819 |
| ; RV64IM-NEXT: or t2, t2, t1 |
| ; RV64IM-NEXT: slli t1, t3, 32 |
| ; RV64IM-NEXT: srli t4, t2, 2 |
| ; RV64IM-NEXT: add t1, t3, t1 |
| ; RV64IM-NEXT: and t3, t4, t1 |
| ; RV64IM-NEXT: lui t4, 349525 |
| ; RV64IM-NEXT: and t2, t2, t1 |
| ; RV64IM-NEXT: addi t4, t4, 1365 |
| ; RV64IM-NEXT: slli t2, t2, 2 |
| ; RV64IM-NEXT: slli t5, t4, 32 |
| ; RV64IM-NEXT: or t3, t3, t2 |
| ; RV64IM-NEXT: add t2, t4, t5 |
| ; RV64IM-NEXT: srli t4, t3, 1 |
| ; RV64IM-NEXT: and t3, t3, t2 |
| ; RV64IM-NEXT: and t4, t4, t2 |
| ; RV64IM-NEXT: slli t3, t3, 1 |
| ; RV64IM-NEXT: or t6, t4, t3 |
| ; RV64IM-NEXT: srli t3, a2, 24 |
| ; RV64IM-NEXT: srli t4, a2, 8 |
| ; RV64IM-NEXT: and t3, t3, a1 |
| ; RV64IM-NEXT: and t4, t4, t0 |
| ; RV64IM-NEXT: or t3, t4, t3 |
| ; RV64IM-NEXT: srli t4, a2, 40 |
| ; RV64IM-NEXT: and t4, t4, a7 |
| ; RV64IM-NEXT: srli t5, a2, 56 |
| ; RV64IM-NEXT: or t4, t4, t5 |
| ; RV64IM-NEXT: and t5, a2, a1 |
| ; RV64IM-NEXT: slli t5, t5, 24 |
| ; RV64IM-NEXT: srliw s0, a2, 24 |
| ; RV64IM-NEXT: slli s0, s0, 32 |
| ; RV64IM-NEXT: and s1, a2, a7 |
| ; RV64IM-NEXT: slli s1, s1, 40 |
| ; RV64IM-NEXT: slli a2, a2, 56 |
| ; RV64IM-NEXT: or t5, t5, s0 |
| ; RV64IM-NEXT: or a2, a2, s1 |
| ; RV64IM-NEXT: or t3, t3, t4 |
| ; RV64IM-NEXT: or a2, a2, t5 |
| ; RV64IM-NEXT: lui t4, 69905 |
| ; RV64IM-NEXT: or a2, a2, t3 |
| ; RV64IM-NEXT: srli t3, a2, 4 |
| ; RV64IM-NEXT: and a2, a2, a5 |
| ; RV64IM-NEXT: and t3, t3, a5 |
| ; RV64IM-NEXT: slli a2, a2, 4 |
| ; RV64IM-NEXT: addi t4, t4, 273 |
| ; RV64IM-NEXT: or a2, t3, a2 |
| ; RV64IM-NEXT: srli t3, a2, 2 |
| ; RV64IM-NEXT: and a2, a2, t1 |
| ; RV64IM-NEXT: and t3, t3, t1 |
| ; RV64IM-NEXT: slli a2, a2, 2 |
| ; RV64IM-NEXT: slli t5, t4, 32 |
| ; RV64IM-NEXT: or t3, t3, a2 |
| ; RV64IM-NEXT: add t0, t4, t5 |
| ; RV64IM-NEXT: srli t4, t3, 1 |
| ; RV64IM-NEXT: and t4, t4, t2 |
| ; RV64IM-NEXT: lui t5, 139810 |
| ; RV64IM-NEXT: and t3, t3, t2 |
| ; RV64IM-NEXT: addi t5, t5, 546 |
| ; RV64IM-NEXT: slli t3, t3, 1 |
| ; RV64IM-NEXT: slli s0, t5, 32 |
| ; RV64IM-NEXT: or s1, t4, t3 |
| ; RV64IM-NEXT: add t3, t5, s0 |
| ; RV64IM-NEXT: and s0, t6, t0 |
| ; RV64IM-NEXT: and s2, s1, t3 |
| ; RV64IM-NEXT: mul s3, s2, s0 |
| ; RV64IM-NEXT: lui t4, %hi(.LCPI6_0) |
| ; RV64IM-NEXT: ld t4, %lo(.LCPI6_0)(t4) |
| ; RV64IM-NEXT: lui t5, 279620 |
| ; RV64IM-NEXT: and s4, t6, t3 |
| ; RV64IM-NEXT: addi t5, t5, 1092 |
| ; RV64IM-NEXT: and s5, s1, t0 |
| ; RV64IM-NEXT: slli s6, t5, 32 |
| ; RV64IM-NEXT: mul s7, s5, s4 |
| ; RV64IM-NEXT: add t5, t5, s6 |
| ; RV64IM-NEXT: and s6, t6, t4 |
| ; RV64IM-NEXT: and s8, s1, t5 |
| ; RV64IM-NEXT: and t6, t6, t5 |
| ; RV64IM-NEXT: and s1, s1, t4 |
| ; RV64IM-NEXT: mul s9, s8, s6 |
| ; RV64IM-NEXT: mul s10, s1, t6 |
| ; RV64IM-NEXT: mul s11, s2, s6 |
| ; RV64IM-NEXT: mul ra, s5, s0 |
| ; RV64IM-NEXT: mul a3, s8, t6 |
| ; RV64IM-NEXT: mul a2, s1, s4 |
| ; RV64IM-NEXT: mul a1, s2, s4 |
| ; RV64IM-NEXT: mul s2, s2, t6 |
| ; RV64IM-NEXT: mul t6, s5, t6 |
| ; RV64IM-NEXT: mul s5, s5, s6 |
| ; RV64IM-NEXT: mul s6, s1, s6 |
| ; RV64IM-NEXT: mul a0, s8, s0 |
| ; RV64IM-NEXT: mul s4, s8, s4 |
| ; RV64IM-NEXT: mul s0, s1, s0 |
| ; RV64IM-NEXT: xor s1, s7, s3 |
| ; RV64IM-NEXT: xor s3, s9, s10 |
| ; RV64IM-NEXT: xor s7, ra, s11 |
| ; RV64IM-NEXT: xor a2, a3, a2 |
| ; RV64IM-NEXT: xor a3, s1, s3 |
| ; RV64IM-NEXT: xor a2, s7, a2 |
| ; RV64IM-NEXT: and a3, a3, t3 |
| ; RV64IM-NEXT: and a2, a2, t0 |
| ; RV64IM-NEXT: xor a1, t6, a1 |
| ; RV64IM-NEXT: xor a0, a0, s6 |
| ; RV64IM-NEXT: xor t6, s5, s2 |
| ; RV64IM-NEXT: xor s0, s4, s0 |
| ; RV64IM-NEXT: xor a0, a1, a0 |
| ; RV64IM-NEXT: xor a1, t6, s0 |
| ; RV64IM-NEXT: and a0, a0, t5 |
| ; RV64IM-NEXT: and a1, a1, t4 |
| ; RV64IM-NEXT: or a2, a2, a3 |
| ; RV64IM-NEXT: or a0, a0, a1 |
| ; RV64IM-NEXT: or s0, a2, a0 |
| ; RV64IM-NEXT: srli a0, s0, 40 |
| ; RV64IM-NEXT: and a0, a0, a7 |
| ; RV64IM-NEXT: srli a1, s0, 56 |
| ; RV64IM-NEXT: srli a2, s0, 24 |
| ; RV64IM-NEXT: srli a3, s0, 8 |
| ; RV64IM-NEXT: lui s1, 4080 |
| ; RV64IM-NEXT: and a2, a2, s1 |
| ; RV64IM-NEXT: ld s10, 0(sp) # 8-byte Folded Reload |
| ; RV64IM-NEXT: and a3, a3, s10 |
| ; RV64IM-NEXT: or a0, a0, a1 |
| ; RV64IM-NEXT: or a2, a3, a2 |
| ; RV64IM-NEXT: or t6, a2, a0 |
| ; RV64IM-NEXT: srliw a0, s0, 24 |
| ; RV64IM-NEXT: and a1, s0, s1 |
| ; RV64IM-NEXT: lui s9, 4080 |
| ; RV64IM-NEXT: slli a0, a0, 32 |
| ; RV64IM-NEXT: slli a1, a1, 24 |
| ; RV64IM-NEXT: or s1, a1, a0 |
| ; RV64IM-NEXT: slli s2, s0, 56 |
| ; RV64IM-NEXT: srli a0, a4, 24 |
| ; RV64IM-NEXT: srli a1, a4, 8 |
| ; RV64IM-NEXT: and a0, a0, s9 |
| ; RV64IM-NEXT: and a1, a1, s10 |
| ; RV64IM-NEXT: or a0, a1, a0 |
| ; RV64IM-NEXT: srli a1, a4, 40 |
| ; RV64IM-NEXT: and a1, a1, a7 |
| ; RV64IM-NEXT: srli a2, a4, 56 |
| ; RV64IM-NEXT: or a1, a1, a2 |
| ; RV64IM-NEXT: and a2, a4, s9 |
| ; RV64IM-NEXT: slli a2, a2, 24 |
| ; RV64IM-NEXT: srliw a3, a4, 24 |
| ; RV64IM-NEXT: slli a3, a3, 32 |
| ; RV64IM-NEXT: and s3, a4, a7 |
| ; RV64IM-NEXT: slli s3, s3, 40 |
| ; RV64IM-NEXT: slli a4, a4, 56 |
| ; RV64IM-NEXT: or a2, a2, a3 |
| ; RV64IM-NEXT: or a3, a4, s3 |
| ; RV64IM-NEXT: or a0, a0, a1 |
| ; RV64IM-NEXT: or a2, a3, a2 |
| ; RV64IM-NEXT: and a1, s0, a7 |
| ; RV64IM-NEXT: or a0, a2, a0 |
| ; RV64IM-NEXT: srli a2, a0, 4 |
| ; RV64IM-NEXT: and a0, a0, a5 |
| ; RV64IM-NEXT: and a2, a2, a5 |
| ; RV64IM-NEXT: slli a0, a0, 4 |
| ; RV64IM-NEXT: slli a1, a1, 40 |
| ; RV64IM-NEXT: or a0, a2, a0 |
| ; RV64IM-NEXT: srli a2, a0, 2 |
| ; RV64IM-NEXT: and a0, a0, t1 |
| ; RV64IM-NEXT: and a2, a2, t1 |
| ; RV64IM-NEXT: slli a0, a0, 2 |
| ; RV64IM-NEXT: or a1, s2, a1 |
| ; RV64IM-NEXT: or a0, a2, a0 |
| ; RV64IM-NEXT: or a1, a1, s1 |
| ; RV64IM-NEXT: srli a2, a0, 1 |
| ; RV64IM-NEXT: srli a3, a6, 24 |
| ; RV64IM-NEXT: srli a4, a6, 8 |
| ; RV64IM-NEXT: and a3, a3, s9 |
| ; RV64IM-NEXT: and a4, a4, s10 |
| ; RV64IM-NEXT: or a3, a4, a3 |
| ; RV64IM-NEXT: srli a4, a6, 40 |
| ; RV64IM-NEXT: and a4, a4, a7 |
| ; RV64IM-NEXT: srli s0, a6, 56 |
| ; RV64IM-NEXT: or a4, a4, s0 |
| ; RV64IM-NEXT: and s0, a6, s9 |
| ; RV64IM-NEXT: slli s0, s0, 24 |
| ; RV64IM-NEXT: srliw s1, a6, 24 |
| ; RV64IM-NEXT: slli s1, s1, 32 |
| ; RV64IM-NEXT: and s2, a6, a7 |
| ; RV64IM-NEXT: slli s2, s2, 40 |
| ; RV64IM-NEXT: slli a6, a6, 56 |
| ; RV64IM-NEXT: or s0, s0, s1 |
| ; RV64IM-NEXT: or a6, a6, s2 |
| ; RV64IM-NEXT: or a3, a3, a4 |
| ; RV64IM-NEXT: or a4, a6, s0 |
| ; RV64IM-NEXT: and a2, a2, t2 |
| ; RV64IM-NEXT: or a3, a4, a3 |
| ; RV64IM-NEXT: srli a4, a3, 4 |
| ; RV64IM-NEXT: and a3, a3, a5 |
| ; RV64IM-NEXT: and a4, a4, a5 |
| ; RV64IM-NEXT: slli a3, a3, 4 |
| ; RV64IM-NEXT: and a0, a0, t2 |
| ; RV64IM-NEXT: or a3, a4, a3 |
| ; RV64IM-NEXT: srli a4, a3, 2 |
| ; RV64IM-NEXT: and a3, a3, t1 |
| ; RV64IM-NEXT: and a4, a4, t1 |
| ; RV64IM-NEXT: slli a3, a3, 2 |
| ; RV64IM-NEXT: slli a0, a0, 1 |
| ; RV64IM-NEXT: or a3, a4, a3 |
| ; RV64IM-NEXT: srli a4, a3, 1 |
| ; RV64IM-NEXT: and a3, a3, t2 |
| ; RV64IM-NEXT: and a4, a4, t2 |
| ; RV64IM-NEXT: slli a3, a3, 1 |
| ; RV64IM-NEXT: or a0, a2, a0 |
| ; RV64IM-NEXT: or a3, a4, a3 |
| ; RV64IM-NEXT: and a2, a0, t0 |
| ; RV64IM-NEXT: and a4, a3, t3 |
| ; RV64IM-NEXT: and a6, a0, t3 |
| ; RV64IM-NEXT: and s0, a3, t0 |
| ; RV64IM-NEXT: mul s1, a4, a2 |
| ; RV64IM-NEXT: mul s2, s0, a6 |
| ; RV64IM-NEXT: and s3, a0, t4 |
| ; RV64IM-NEXT: and s4, a3, t5 |
| ; RV64IM-NEXT: and a0, a0, t5 |
| ; RV64IM-NEXT: and a3, a3, t4 |
| ; RV64IM-NEXT: mul s5, s4, s3 |
| ; RV64IM-NEXT: mul s6, a3, a0 |
| ; RV64IM-NEXT: mul s7, a4, s3 |
| ; RV64IM-NEXT: mul s8, s0, a2 |
| ; RV64IM-NEXT: or a1, a1, t6 |
| ; RV64IM-NEXT: srli t6, a1, 4 |
| ; RV64IM-NEXT: and a1, a1, a5 |
| ; RV64IM-NEXT: and t6, t6, a5 |
| ; RV64IM-NEXT: slli a1, a1, 4 |
| ; RV64IM-NEXT: or a1, t6, a1 |
| ; RV64IM-NEXT: xor t6, s2, s1 |
| ; RV64IM-NEXT: mul s1, s4, a0 |
| ; RV64IM-NEXT: mul s2, a3, a6 |
| ; RV64IM-NEXT: xor s5, s5, s6 |
| ; RV64IM-NEXT: xor s6, s8, s7 |
| ; RV64IM-NEXT: mul s7, a4, a6 |
| ; RV64IM-NEXT: mul s8, s0, a0 |
| ; RV64IM-NEXT: mul a0, a4, a0 |
| ; RV64IM-NEXT: mul a4, s4, a2 |
| ; RV64IM-NEXT: mul s0, s0, s3 |
| ; RV64IM-NEXT: mul s3, a3, s3 |
| ; RV64IM-NEXT: mul a6, s4, a6 |
| ; RV64IM-NEXT: mul a2, a3, a2 |
| ; RV64IM-NEXT: xor a3, s1, s2 |
| ; RV64IM-NEXT: srli s1, a1, 2 |
| ; RV64IM-NEXT: and s1, s1, t1 |
| ; RV64IM-NEXT: and a1, a1, t1 |
| ; RV64IM-NEXT: xor t6, t6, s5 |
| ; RV64IM-NEXT: xor a3, s6, a3 |
| ; RV64IM-NEXT: and t3, t6, t3 |
| ; RV64IM-NEXT: and a3, a3, t0 |
| ; RV64IM-NEXT: xor t0, s8, s7 |
| ; RV64IM-NEXT: xor a4, a4, s3 |
| ; RV64IM-NEXT: xor a0, s0, a0 |
| ; RV64IM-NEXT: xor a2, a6, a2 |
| ; RV64IM-NEXT: xor a4, t0, a4 |
| ; RV64IM-NEXT: xor a0, a0, a2 |
| ; RV64IM-NEXT: and a2, a4, t5 |
| ; RV64IM-NEXT: and a0, a0, t4 |
| ; RV64IM-NEXT: or a3, a3, t3 |
| ; RV64IM-NEXT: or a0, a2, a0 |
| ; RV64IM-NEXT: slli a1, a1, 2 |
| ; RV64IM-NEXT: or a0, a3, a0 |
| ; RV64IM-NEXT: or a1, s1, a1 |
| ; RV64IM-NEXT: srli a2, a0, 40 |
| ; RV64IM-NEXT: and a2, a2, a7 |
| ; RV64IM-NEXT: srli a3, a0, 56 |
| ; RV64IM-NEXT: srli a4, a1, 1 |
| ; RV64IM-NEXT: or a2, a2, a3 |
| ; RV64IM-NEXT: srli a3, a0, 24 |
| ; RV64IM-NEXT: srli a6, a0, 8 |
| ; RV64IM-NEXT: and a3, a3, s9 |
| ; RV64IM-NEXT: and a6, a6, s10 |
| ; RV64IM-NEXT: or a3, a6, a3 |
| ; RV64IM-NEXT: srliw a6, a0, 24 |
| ; RV64IM-NEXT: slli a6, a6, 32 |
| ; RV64IM-NEXT: and t0, a0, s9 |
| ; RV64IM-NEXT: slli t0, t0, 24 |
| ; RV64IM-NEXT: and a7, a0, a7 |
| ; RV64IM-NEXT: slli a0, a0, 56 |
| ; RV64IM-NEXT: slli a7, a7, 40 |
| ; RV64IM-NEXT: or a6, t0, a6 |
| ; RV64IM-NEXT: or a0, a0, a7 |
| ; RV64IM-NEXT: or a2, a3, a2 |
| ; RV64IM-NEXT: or a0, a0, a6 |
| ; RV64IM-NEXT: and a3, a4, t2 |
| ; RV64IM-NEXT: or a0, a0, a2 |
| ; RV64IM-NEXT: srli a2, a0, 4 |
| ; RV64IM-NEXT: and a0, a0, a5 |
| ; RV64IM-NEXT: and a2, a2, a5 |
| ; RV64IM-NEXT: slli a0, a0, 4 |
| ; RV64IM-NEXT: and a1, a1, t2 |
| ; RV64IM-NEXT: or a0, a2, a0 |
| ; RV64IM-NEXT: srli a2, a0, 2 |
| ; RV64IM-NEXT: and a0, a0, t1 |
| ; RV64IM-NEXT: and a2, a2, t1 |
| ; RV64IM-NEXT: slli a0, a0, 2 |
| ; RV64IM-NEXT: slli a1, a1, 1 |
| ; RV64IM-NEXT: or a0, a2, a0 |
| ; RV64IM-NEXT: srli a2, a0, 1 |
| ; RV64IM-NEXT: and a0, a0, t2 |
| ; RV64IM-NEXT: and a2, a2, t2 |
| ; RV64IM-NEXT: slli a0, a0, 1 |
| ; RV64IM-NEXT: or a1, a3, a1 |
| ; RV64IM-NEXT: or a0, a2, a0 |
| ; RV64IM-NEXT: srli a1, a1, 1 |
| ; RV64IM-NEXT: srli a0, a0, 1 |
| ; RV64IM-NEXT: ld a2, 8(sp) # 8-byte Folded Reload |
| ; RV64IM-NEXT: sd a1, 0(a2) |
| ; RV64IM-NEXT: sd a0, 8(a2) |
| ; RV64IM-NEXT: ld a2, 16(sp) # 8-byte Folded Reload |
| ; RV64IM-NEXT: sd a1, 0(a2) |
| ; RV64IM-NEXT: sd a0, 8(a2) |
| ; RV64IM-NEXT: ld ra, 120(sp) # 8-byte Folded Reload |
| ; RV64IM-NEXT: ld s0, 112(sp) # 8-byte Folded Reload |
| ; RV64IM-NEXT: ld s1, 104(sp) # 8-byte Folded Reload |
| ; RV64IM-NEXT: ld s2, 96(sp) # 8-byte Folded Reload |
| ; RV64IM-NEXT: ld s3, 88(sp) # 8-byte Folded Reload |
| ; RV64IM-NEXT: ld s4, 80(sp) # 8-byte Folded Reload |
| ; RV64IM-NEXT: ld s5, 72(sp) # 8-byte Folded Reload |
| ; RV64IM-NEXT: ld s6, 64(sp) # 8-byte Folded Reload |
| ; RV64IM-NEXT: ld s7, 56(sp) # 8-byte Folded Reload |
| ; RV64IM-NEXT: ld s8, 48(sp) # 8-byte Folded Reload |
| ; RV64IM-NEXT: ld s9, 40(sp) # 8-byte Folded Reload |
| ; RV64IM-NEXT: ld s10, 32(sp) # 8-byte Folded Reload |
| ; RV64IM-NEXT: ld s11, 24(sp) # 8-byte Folded Reload |
| ; RV64IM-NEXT: addi sp, sp, 128 |
| ; RV64IM-NEXT: ret |
| ; |
| ; RV32IMZBS-LABEL: commutative_clmulh_v2i64: |
| ; RV32IMZBS: # %bb.0: |
| ; RV32IMZBS-NEXT: addi sp, sp, -160 |
| ; RV32IMZBS-NEXT: sw ra, 156(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: sw s0, 152(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: sw s1, 148(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: sw s2, 144(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: sw s3, 140(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: sw s4, 136(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: sw s5, 132(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: sw s6, 128(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: sw s7, 124(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: sw s8, 120(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: sw s9, 116(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: sw s10, 112(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: sw s11, 108(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: sw a3, 76(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: sw a2, 72(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: mv s3, a1 |
| ; RV32IMZBS-NEXT: mv a1, a0 |
| ; RV32IMZBS-NEXT: sw a0, 60(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: lw a4, 4(a0) |
| ; RV32IMZBS-NEXT: lui a5, 16 |
| ; RV32IMZBS-NEXT: lw a0, 8(a0) |
| ; RV32IMZBS-NEXT: sw a0, 68(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: lw a0, 12(a1) |
| ; RV32IMZBS-NEXT: sw a0, 52(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: addi s0, a5, -256 |
| ; RV32IMZBS-NEXT: srli a6, a4, 8 |
| ; RV32IMZBS-NEXT: srli a7, a4, 24 |
| ; RV32IMZBS-NEXT: and t0, a4, s0 |
| ; RV32IMZBS-NEXT: slli a4, a4, 24 |
| ; RV32IMZBS-NEXT: and a6, a6, s0 |
| ; RV32IMZBS-NEXT: slli t0, t0, 8 |
| ; RV32IMZBS-NEXT: or a6, a6, a7 |
| ; RV32IMZBS-NEXT: or a4, a4, t0 |
| ; RV32IMZBS-NEXT: lui a7, 61681 |
| ; RV32IMZBS-NEXT: or a4, a4, a6 |
| ; RV32IMZBS-NEXT: addi t4, a7, -241 |
| ; RV32IMZBS-NEXT: srli a7, a4, 4 |
| ; RV32IMZBS-NEXT: and a4, a4, t4 |
| ; RV32IMZBS-NEXT: and a7, a7, t4 |
| ; RV32IMZBS-NEXT: slli a4, a4, 4 |
| ; RV32IMZBS-NEXT: or a4, a7, a4 |
| ; RV32IMZBS-NEXT: lui a7, 209715 |
| ; RV32IMZBS-NEXT: srli t0, a4, 2 |
| ; RV32IMZBS-NEXT: addi s4, a7, 819 |
| ; RV32IMZBS-NEXT: and t0, t0, s4 |
| ; RV32IMZBS-NEXT: and a4, a4, s4 |
| ; RV32IMZBS-NEXT: slli a4, a4, 2 |
| ; RV32IMZBS-NEXT: lui a0, 349525 |
| ; RV32IMZBS-NEXT: or t0, t0, a4 |
| ; RV32IMZBS-NEXT: addi a0, a0, 1365 |
| ; RV32IMZBS-NEXT: srli t1, t0, 1 |
| ; RV32IMZBS-NEXT: and t0, t0, a0 |
| ; RV32IMZBS-NEXT: and t1, t1, a0 |
| ; RV32IMZBS-NEXT: slli t0, t0, 1 |
| ; RV32IMZBS-NEXT: or s5, t1, t0 |
| ; RV32IMZBS-NEXT: srli t0, s5, 8 |
| ; RV32IMZBS-NEXT: and t0, t0, s0 |
| ; RV32IMZBS-NEXT: srli t1, s5, 24 |
| ; RV32IMZBS-NEXT: and t2, s5, s0 |
| ; RV32IMZBS-NEXT: slli t3, s5, 24 |
| ; RV32IMZBS-NEXT: slli t2, t2, 8 |
| ; RV32IMZBS-NEXT: or t0, t0, t1 |
| ; RV32IMZBS-NEXT: or t1, t3, t2 |
| ; RV32IMZBS-NEXT: or t0, t1, t0 |
| ; RV32IMZBS-NEXT: lw t1, 4(s3) |
| ; RV32IMZBS-NEXT: srli t2, t0, 4 |
| ; RV32IMZBS-NEXT: and t2, t2, t4 |
| ; RV32IMZBS-NEXT: and t0, t0, t4 |
| ; RV32IMZBS-NEXT: slli t0, t0, 4 |
| ; RV32IMZBS-NEXT: lw a1, 8(s3) |
| ; RV32IMZBS-NEXT: sw a1, 64(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: lw a1, 12(s3) |
| ; RV32IMZBS-NEXT: sw a1, 56(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: or t0, t2, t0 |
| ; RV32IMZBS-NEXT: srli t2, t0, 2 |
| ; RV32IMZBS-NEXT: srli t3, t1, 8 |
| ; RV32IMZBS-NEXT: and t2, t2, s4 |
| ; RV32IMZBS-NEXT: and t3, t3, s0 |
| ; RV32IMZBS-NEXT: srli s1, t1, 24 |
| ; RV32IMZBS-NEXT: and s2, t1, s0 |
| ; RV32IMZBS-NEXT: slli s2, s2, 8 |
| ; RV32IMZBS-NEXT: slli t1, t1, 24 |
| ; RV32IMZBS-NEXT: or t3, t3, s1 |
| ; RV32IMZBS-NEXT: or t1, t1, s2 |
| ; RV32IMZBS-NEXT: and t0, t0, s4 |
| ; RV32IMZBS-NEXT: or t1, t1, t3 |
| ; RV32IMZBS-NEXT: srli t3, t1, 4 |
| ; RV32IMZBS-NEXT: and t1, t1, t4 |
| ; RV32IMZBS-NEXT: and t3, t3, t4 |
| ; RV32IMZBS-NEXT: slli t1, t1, 4 |
| ; RV32IMZBS-NEXT: slli t0, t0, 2 |
| ; RV32IMZBS-NEXT: or t1, t3, t1 |
| ; RV32IMZBS-NEXT: srli t3, t1, 2 |
| ; RV32IMZBS-NEXT: and t1, t1, s4 |
| ; RV32IMZBS-NEXT: and t3, t3, s4 |
| ; RV32IMZBS-NEXT: slli t1, t1, 2 |
| ; RV32IMZBS-NEXT: or t0, t2, t0 |
| ; RV32IMZBS-NEXT: or t1, t3, t1 |
| ; RV32IMZBS-NEXT: srli t2, t1, 1 |
| ; RV32IMZBS-NEXT: and t1, t1, a0 |
| ; RV32IMZBS-NEXT: and t2, t2, a0 |
| ; RV32IMZBS-NEXT: slli t1, t1, 1 |
| ; RV32IMZBS-NEXT: srli t3, t0, 1 |
| ; RV32IMZBS-NEXT: or t6, t2, t1 |
| ; RV32IMZBS-NEXT: and t1, t3, a0 |
| ; RV32IMZBS-NEXT: srli t2, t6, 8 |
| ; RV32IMZBS-NEXT: and t0, t0, a0 |
| ; RV32IMZBS-NEXT: and t2, t2, s0 |
| ; RV32IMZBS-NEXT: srli t3, t6, 24 |
| ; RV32IMZBS-NEXT: and s1, t6, s0 |
| ; RV32IMZBS-NEXT: slli s2, t6, 24 |
| ; RV32IMZBS-NEXT: slli s1, s1, 8 |
| ; RV32IMZBS-NEXT: or t2, t2, t3 |
| ; RV32IMZBS-NEXT: or t3, s2, s1 |
| ; RV32IMZBS-NEXT: slli t0, t0, 1 |
| ; RV32IMZBS-NEXT: or t2, t3, t2 |
| ; RV32IMZBS-NEXT: srli t3, t2, 4 |
| ; RV32IMZBS-NEXT: and t2, t2, t4 |
| ; RV32IMZBS-NEXT: and t3, t3, t4 |
| ; RV32IMZBS-NEXT: slli t2, t2, 4 |
| ; RV32IMZBS-NEXT: or s1, t1, t0 |
| ; RV32IMZBS-NEXT: or t0, t3, t2 |
| ; RV32IMZBS-NEXT: srli t1, t0, 2 |
| ; RV32IMZBS-NEXT: and t0, t0, s4 |
| ; RV32IMZBS-NEXT: and t1, t1, s4 |
| ; RV32IMZBS-NEXT: slli t0, t0, 2 |
| ; RV32IMZBS-NEXT: lui t2, 69905 |
| ; RV32IMZBS-NEXT: or t1, t1, t0 |
| ; RV32IMZBS-NEXT: addi s8, t2, 273 |
| ; RV32IMZBS-NEXT: srli t2, t1, 1 |
| ; RV32IMZBS-NEXT: sw a0, 104(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: and t2, t2, a0 |
| ; RV32IMZBS-NEXT: and t1, t1, a0 |
| ; RV32IMZBS-NEXT: slli t1, t1, 1 |
| ; RV32IMZBS-NEXT: lui t3, 139810 |
| ; RV32IMZBS-NEXT: or s2, t2, t1 |
| ; RV32IMZBS-NEXT: addi t2, t3, 546 |
| ; RV32IMZBS-NEXT: and s6, s1, s8 |
| ; RV32IMZBS-NEXT: and s7, s2, t2 |
| ; RV32IMZBS-NEXT: mul t5, s7, s6 |
| ; RV32IMZBS-NEXT: and s9, s1, t2 |
| ; RV32IMZBS-NEXT: and s10, s2, s8 |
| ; RV32IMZBS-NEXT: lui t1, 559241 |
| ; RV32IMZBS-NEXT: addi t1, t1, -1912 |
| ; RV32IMZBS-NEXT: lui t3, 279620 |
| ; RV32IMZBS-NEXT: and s11, s1, t1 |
| ; RV32IMZBS-NEXT: addi t3, t3, 1092 |
| ; RV32IMZBS-NEXT: and ra, s2, t3 |
| ; RV32IMZBS-NEXT: and s1, s1, t3 |
| ; RV32IMZBS-NEXT: and s2, s2, t1 |
| ; RV32IMZBS-NEXT: mul t0, s10, s9 |
| ; RV32IMZBS-NEXT: mul a7, ra, s11 |
| ; RV32IMZBS-NEXT: mul a6, s2, s1 |
| ; RV32IMZBS-NEXT: mul a5, s7, s11 |
| ; RV32IMZBS-NEXT: mul a4, s10, s6 |
| ; RV32IMZBS-NEXT: mul a3, ra, s1 |
| ; RV32IMZBS-NEXT: mul a2, s2, s9 |
| ; RV32IMZBS-NEXT: mul a1, s7, s9 |
| ; RV32IMZBS-NEXT: mul s7, s7, s1 |
| ; RV32IMZBS-NEXT: mul s1, s10, s1 |
| ; RV32IMZBS-NEXT: mul s10, s10, s11 |
| ; RV32IMZBS-NEXT: mul s11, s2, s11 |
| ; RV32IMZBS-NEXT: mul a0, ra, s6 |
| ; RV32IMZBS-NEXT: mul s9, ra, s9 |
| ; RV32IMZBS-NEXT: mul s2, s2, s6 |
| ; RV32IMZBS-NEXT: xor t0, t0, t5 |
| ; RV32IMZBS-NEXT: xor a6, a7, a6 |
| ; RV32IMZBS-NEXT: xor a4, a4, a5 |
| ; RV32IMZBS-NEXT: xor a2, a3, a2 |
| ; RV32IMZBS-NEXT: xor a3, t0, a6 |
| ; RV32IMZBS-NEXT: xor a2, a4, a2 |
| ; RV32IMZBS-NEXT: xor a1, s1, a1 |
| ; RV32IMZBS-NEXT: and a3, a3, t2 |
| ; RV32IMZBS-NEXT: and a2, a2, s8 |
| ; RV32IMZBS-NEXT: xor a0, a0, s11 |
| ; RV32IMZBS-NEXT: xor a4, s10, s7 |
| ; RV32IMZBS-NEXT: xor a5, s9, s2 |
| ; RV32IMZBS-NEXT: xor a0, a1, a0 |
| ; RV32IMZBS-NEXT: xor a4, a4, a5 |
| ; RV32IMZBS-NEXT: and a0, a0, t3 |
| ; RV32IMZBS-NEXT: and a1, a4, t1 |
| ; RV32IMZBS-NEXT: or a2, a2, a3 |
| ; RV32IMZBS-NEXT: or a0, a0, a1 |
| ; RV32IMZBS-NEXT: or a0, a2, a0 |
| ; RV32IMZBS-NEXT: srli a1, a0, 8 |
| ; RV32IMZBS-NEXT: lw a2, 0(s3) |
| ; RV32IMZBS-NEXT: and a1, a1, s0 |
| ; RV32IMZBS-NEXT: srli a3, a0, 24 |
| ; RV32IMZBS-NEXT: and a4, a0, s0 |
| ; RV32IMZBS-NEXT: slli a0, a0, 24 |
| ; RV32IMZBS-NEXT: slli a4, a4, 8 |
| ; RV32IMZBS-NEXT: or a1, a1, a3 |
| ; RV32IMZBS-NEXT: or a0, a0, a4 |
| ; RV32IMZBS-NEXT: or a0, a0, a1 |
| ; RV32IMZBS-NEXT: srli a1, a0, 4 |
| ; RV32IMZBS-NEXT: and a1, a1, t4 |
| ; RV32IMZBS-NEXT: srli a3, a2, 8 |
| ; RV32IMZBS-NEXT: and a0, a0, t4 |
| ; RV32IMZBS-NEXT: and a3, a3, s0 |
| ; RV32IMZBS-NEXT: srli a4, a2, 24 |
| ; RV32IMZBS-NEXT: and a5, a2, s0 |
| ; RV32IMZBS-NEXT: slli a5, a5, 8 |
| ; RV32IMZBS-NEXT: slli a2, a2, 24 |
| ; RV32IMZBS-NEXT: or a3, a3, a4 |
| ; RV32IMZBS-NEXT: or a2, a2, a5 |
| ; RV32IMZBS-NEXT: slli a0, a0, 4 |
| ; RV32IMZBS-NEXT: or a2, a2, a3 |
| ; RV32IMZBS-NEXT: srli a3, a2, 4 |
| ; RV32IMZBS-NEXT: and a2, a2, t4 |
| ; RV32IMZBS-NEXT: and a3, a3, t4 |
| ; RV32IMZBS-NEXT: slli a2, a2, 4 |
| ; RV32IMZBS-NEXT: or a0, a1, a0 |
| ; RV32IMZBS-NEXT: or a2, a3, a2 |
| ; RV32IMZBS-NEXT: srli a1, a2, 2 |
| ; RV32IMZBS-NEXT: and a2, a2, s4 |
| ; RV32IMZBS-NEXT: and a1, a1, s4 |
| ; RV32IMZBS-NEXT: slli a2, a2, 2 |
| ; RV32IMZBS-NEXT: srli a3, a0, 2 |
| ; RV32IMZBS-NEXT: or a1, a1, a2 |
| ; RV32IMZBS-NEXT: srli a2, a1, 1 |
| ; RV32IMZBS-NEXT: lw s6, 104(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: and a1, a1, s6 |
| ; RV32IMZBS-NEXT: and a2, a2, s6 |
| ; RV32IMZBS-NEXT: slli a1, a1, 1 |
| ; RV32IMZBS-NEXT: and a0, a0, s4 |
| ; RV32IMZBS-NEXT: or a2, a2, a1 |
| ; RV32IMZBS-NEXT: mv s3, s8 |
| ; RV32IMZBS-NEXT: and s2, s5, s8 |
| ; RV32IMZBS-NEXT: and a4, a2, t2 |
| ; RV32IMZBS-NEXT: and s1, s5, t2 |
| ; RV32IMZBS-NEXT: and a5, a2, s8 |
| ; RV32IMZBS-NEXT: mul a6, a4, s2 |
| ; RV32IMZBS-NEXT: mul a7, a5, s1 |
| ; RV32IMZBS-NEXT: and a1, a3, s4 |
| ; RV32IMZBS-NEXT: slli a0, a0, 2 |
| ; RV32IMZBS-NEXT: or a0, a1, a0 |
| ; RV32IMZBS-NEXT: srli a3, a0, 1 |
| ; RV32IMZBS-NEXT: lui a1, 349525 |
| ; RV32IMZBS-NEXT: addi a1, a1, 1364 |
| ; RV32IMZBS-NEXT: sw a1, 100(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: and a0, a0, s6 |
| ; RV32IMZBS-NEXT: and a3, a3, a1 |
| ; RV32IMZBS-NEXT: slli a0, a0, 1 |
| ; RV32IMZBS-NEXT: or a0, a3, a0 |
| ; RV32IMZBS-NEXT: sw a0, 40(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: xor a0, a7, a6 |
| ; RV32IMZBS-NEXT: and ra, s5, t1 |
| ; RV32IMZBS-NEXT: and a3, a2, t3 |
| ; RV32IMZBS-NEXT: and a1, s5, t3 |
| ; RV32IMZBS-NEXT: and a2, a2, t1 |
| ; RV32IMZBS-NEXT: mul a6, a3, ra |
| ; RV32IMZBS-NEXT: mul a7, a2, a1 |
| ; RV32IMZBS-NEXT: mul t0, a4, ra |
| ; RV32IMZBS-NEXT: mul t5, a5, s2 |
| ; RV32IMZBS-NEXT: mul s7, a3, a1 |
| ; RV32IMZBS-NEXT: mul s8, a2, s1 |
| ; RV32IMZBS-NEXT: mul s9, a4, s1 |
| ; RV32IMZBS-NEXT: mv s5, s1 |
| ; RV32IMZBS-NEXT: sw s1, 36(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: mul s10, a5, a1 |
| ; RV32IMZBS-NEXT: mv s1, a1 |
| ; RV32IMZBS-NEXT: sw a1, 48(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: sw s2, 32(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: mul s11, a3, s2 |
| ; RV32IMZBS-NEXT: mv a1, ra |
| ; RV32IMZBS-NEXT: sw ra, 44(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: mul ra, a2, ra |
| ; RV32IMZBS-NEXT: mul a4, a4, s1 |
| ; RV32IMZBS-NEXT: mul a5, a5, a1 |
| ; RV32IMZBS-NEXT: mul a3, a3, s5 |
| ; RV32IMZBS-NEXT: mul a2, a2, s2 |
| ; RV32IMZBS-NEXT: xor a6, a6, a7 |
| ; RV32IMZBS-NEXT: xor a7, t5, t0 |
| ; RV32IMZBS-NEXT: xor t0, s7, s8 |
| ; RV32IMZBS-NEXT: lw a1, 60(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: lw t5, 0(a1) |
| ; RV32IMZBS-NEXT: xor a0, a0, a6 |
| ; RV32IMZBS-NEXT: xor a6, a7, t0 |
| ; RV32IMZBS-NEXT: xor a7, s10, s9 |
| ; RV32IMZBS-NEXT: xor t0, s11, ra |
| ; RV32IMZBS-NEXT: xor a7, a7, t0 |
| ; RV32IMZBS-NEXT: xor a4, a5, a4 |
| ; RV32IMZBS-NEXT: xor a2, a3, a2 |
| ; RV32IMZBS-NEXT: srli a3, t5, 8 |
| ; RV32IMZBS-NEXT: sw s0, 84(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: and a3, a3, s0 |
| ; RV32IMZBS-NEXT: srli a5, t5, 24 |
| ; RV32IMZBS-NEXT: or a3, a3, a5 |
| ; RV32IMZBS-NEXT: and a5, t5, s0 |
| ; RV32IMZBS-NEXT: slli a5, a5, 8 |
| ; RV32IMZBS-NEXT: slli t5, t5, 24 |
| ; RV32IMZBS-NEXT: or a5, t5, a5 |
| ; RV32IMZBS-NEXT: and a0, a0, t2 |
| ; RV32IMZBS-NEXT: sw a0, 60(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: and a0, a6, s3 |
| ; RV32IMZBS-NEXT: sw a0, 20(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: or a3, a5, a3 |
| ; RV32IMZBS-NEXT: srli a5, a3, 4 |
| ; RV32IMZBS-NEXT: sw t4, 88(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: and a3, a3, t4 |
| ; RV32IMZBS-NEXT: and a5, a5, t4 |
| ; RV32IMZBS-NEXT: slli a3, a3, 4 |
| ; RV32IMZBS-NEXT: and a0, a7, t3 |
| ; RV32IMZBS-NEXT: sw a0, 16(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: or a3, a5, a3 |
| ; RV32IMZBS-NEXT: srli a5, a3, 2 |
| ; RV32IMZBS-NEXT: and a3, a3, s4 |
| ; RV32IMZBS-NEXT: and a5, a5, s4 |
| ; RV32IMZBS-NEXT: slli a3, a3, 2 |
| ; RV32IMZBS-NEXT: xor a2, a4, a2 |
| ; RV32IMZBS-NEXT: or a3, a5, a3 |
| ; RV32IMZBS-NEXT: srli a4, a3, 1 |
| ; RV32IMZBS-NEXT: and a3, a3, s6 |
| ; RV32IMZBS-NEXT: and a4, a4, s6 |
| ; RV32IMZBS-NEXT: slli a3, a3, 1 |
| ; RV32IMZBS-NEXT: mv t4, t1 |
| ; RV32IMZBS-NEXT: and a0, a2, t1 |
| ; RV32IMZBS-NEXT: sw a0, 12(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: or a3, a4, a3 |
| ; RV32IMZBS-NEXT: and a4, a3, s3 |
| ; RV32IMZBS-NEXT: mv s0, t2 |
| ; RV32IMZBS-NEXT: and a5, a3, t2 |
| ; RV32IMZBS-NEXT: and a6, a3, t1 |
| ; RV32IMZBS-NEXT: and a3, a3, t3 |
| ; RV32IMZBS-NEXT: and s10, t6, t2 |
| ; RV32IMZBS-NEXT: sw t2, 96(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: and s9, t6, s3 |
| ; RV32IMZBS-NEXT: and s8, t6, t3 |
| ; RV32IMZBS-NEXT: sw t3, 92(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: and s7, t6, t1 |
| ; RV32IMZBS-NEXT: mul s5, s7, a3 |
| ; RV32IMZBS-NEXT: mul s2, s8, a3 |
| ; RV32IMZBS-NEXT: mul s1, s9, a3 |
| ; RV32IMZBS-NEXT: mul t2, s10, a3 |
| ; RV32IMZBS-NEXT: mul t5, s10, a4 |
| ; RV32IMZBS-NEXT: mul t6, s9, a5 |
| ; RV32IMZBS-NEXT: mul a7, s8, a6 |
| ; RV32IMZBS-NEXT: mul t0, s10, a6 |
| ; RV32IMZBS-NEXT: mul a0, s9, a4 |
| ; RV32IMZBS-NEXT: mul a1, s7, a5 |
| ; RV32IMZBS-NEXT: mul t1, s7, a6 |
| ; RV32IMZBS-NEXT: mul a6, s9, a6 |
| ; RV32IMZBS-NEXT: mul a2, s10, a5 |
| ; RV32IMZBS-NEXT: mul a3, s8, a4 |
| ; RV32IMZBS-NEXT: mul a5, s8, a5 |
| ; RV32IMZBS-NEXT: mul a4, s7, a4 |
| ; RV32IMZBS-NEXT: lw s11, 60(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: lw s6, 20(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: or s11, s6, s11 |
| ; RV32IMZBS-NEXT: lw s6, 16(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: lw ra, 12(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: or s6, s6, ra |
| ; RV32IMZBS-NEXT: xor t5, t6, t5 |
| ; RV32IMZBS-NEXT: xor a7, a7, s5 |
| ; RV32IMZBS-NEXT: xor a0, a0, t0 |
| ; RV32IMZBS-NEXT: xor a1, s2, a1 |
| ; RV32IMZBS-NEXT: xor a7, t5, a7 |
| ; RV32IMZBS-NEXT: xor a0, a0, a1 |
| ; RV32IMZBS-NEXT: xor a1, s1, a2 |
| ; RV32IMZBS-NEXT: xor a2, a3, t1 |
| ; RV32IMZBS-NEXT: xor a3, a6, t2 |
| ; RV32IMZBS-NEXT: xor a4, a5, a4 |
| ; RV32IMZBS-NEXT: xor a1, a1, a2 |
| ; RV32IMZBS-NEXT: xor a3, a3, a4 |
| ; RV32IMZBS-NEXT: and a2, a7, s0 |
| ; RV32IMZBS-NEXT: and a0, a0, s3 |
| ; RV32IMZBS-NEXT: mv s5, s3 |
| ; RV32IMZBS-NEXT: and a1, a1, t3 |
| ; RV32IMZBS-NEXT: and a3, a3, t4 |
| ; RV32IMZBS-NEXT: or a0, a0, a2 |
| ; RV32IMZBS-NEXT: or a1, a1, a3 |
| ; RV32IMZBS-NEXT: or a2, s11, s6 |
| ; RV32IMZBS-NEXT: or a0, a0, a1 |
| ; RV32IMZBS-NEXT: lw a1, 40(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: srli a1, a1, 1 |
| ; RV32IMZBS-NEXT: xor a0, a0, a2 |
| ; RV32IMZBS-NEXT: xor a0, a1, a0 |
| ; RV32IMZBS-NEXT: srli a1, a0, 8 |
| ; RV32IMZBS-NEXT: lw s0, 84(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: and a1, a1, s0 |
| ; RV32IMZBS-NEXT: srli a2, a0, 24 |
| ; RV32IMZBS-NEXT: and a3, a0, s0 |
| ; RV32IMZBS-NEXT: slli a0, a0, 24 |
| ; RV32IMZBS-NEXT: slli a3, a3, 8 |
| ; RV32IMZBS-NEXT: or a1, a1, a2 |
| ; RV32IMZBS-NEXT: or a0, a0, a3 |
| ; RV32IMZBS-NEXT: or a0, a0, a1 |
| ; RV32IMZBS-NEXT: srli a1, a0, 4 |
| ; RV32IMZBS-NEXT: lw ra, 88(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: and a0, a0, ra |
| ; RV32IMZBS-NEXT: and a1, a1, ra |
| ; RV32IMZBS-NEXT: slli a0, a0, 4 |
| ; RV32IMZBS-NEXT: or a0, a1, a0 |
| ; RV32IMZBS-NEXT: srli a1, a0, 2 |
| ; RV32IMZBS-NEXT: and a0, a0, s4 |
| ; RV32IMZBS-NEXT: and a1, a1, s4 |
| ; RV32IMZBS-NEXT: slli a0, a0, 2 |
| ; RV32IMZBS-NEXT: lw t3, 32(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: mul a2, s10, t3 |
| ; RV32IMZBS-NEXT: lw s1, 36(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: mul a3, s9, s1 |
| ; RV32IMZBS-NEXT: lw t6, 44(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: mul a4, s8, t6 |
| ; RV32IMZBS-NEXT: lw s2, 48(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: mul a5, s7, s2 |
| ; RV32IMZBS-NEXT: mul a6, s10, t6 |
| ; RV32IMZBS-NEXT: mul a7, s9, t3 |
| ; RV32IMZBS-NEXT: mul t0, s8, s2 |
| ; RV32IMZBS-NEXT: mul t1, s7, s1 |
| ; RV32IMZBS-NEXT: or a0, a1, a0 |
| ; RV32IMZBS-NEXT: srli a1, a0, 1 |
| ; RV32IMZBS-NEXT: lw s11, 104(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: and a0, a0, s11 |
| ; RV32IMZBS-NEXT: lw t2, 100(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: and a1, a1, t2 |
| ; RV32IMZBS-NEXT: slli a0, a0, 1 |
| ; RV32IMZBS-NEXT: or a0, a1, a0 |
| ; RV32IMZBS-NEXT: sw a0, 60(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: xor a2, a3, a2 |
| ; RV32IMZBS-NEXT: xor a4, a4, a5 |
| ; RV32IMZBS-NEXT: xor a1, a7, a6 |
| ; RV32IMZBS-NEXT: xor a3, t0, t1 |
| ; RV32IMZBS-NEXT: mul a5, s10, s1 |
| ; RV32IMZBS-NEXT: mul a6, s9, s2 |
| ; RV32IMZBS-NEXT: xor a2, a2, a4 |
| ; RV32IMZBS-NEXT: xor s6, a1, a3 |
| ; RV32IMZBS-NEXT: lw a7, 52(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: srli a1, a7, 8 |
| ; RV32IMZBS-NEXT: and a3, a7, s0 |
| ; RV32IMZBS-NEXT: and a1, a1, s0 |
| ; RV32IMZBS-NEXT: slli a3, a3, 8 |
| ; RV32IMZBS-NEXT: srli a4, a7, 24 |
| ; RV32IMZBS-NEXT: slli a7, a7, 24 |
| ; RV32IMZBS-NEXT: or a1, a1, a4 |
| ; RV32IMZBS-NEXT: or a3, a7, a3 |
| ; RV32IMZBS-NEXT: xor t5, a6, a5 |
| ; RV32IMZBS-NEXT: or a1, a3, a1 |
| ; RV32IMZBS-NEXT: srli a3, a1, 4 |
| ; RV32IMZBS-NEXT: and a1, a1, ra |
| ; RV32IMZBS-NEXT: and a3, a3, ra |
| ; RV32IMZBS-NEXT: slli a1, a1, 4 |
| ; RV32IMZBS-NEXT: or a1, a3, a1 |
| ; RV32IMZBS-NEXT: mul a3, s8, t3 |
| ; RV32IMZBS-NEXT: mul a4, s10, s2 |
| ; RV32IMZBS-NEXT: srli a5, a1, 2 |
| ; RV32IMZBS-NEXT: and a5, a5, s4 |
| ; RV32IMZBS-NEXT: and a1, a1, s4 |
| ; RV32IMZBS-NEXT: slli a1, a1, 2 |
| ; RV32IMZBS-NEXT: mul a6, s7, t6 |
| ; RV32IMZBS-NEXT: mul a7, s9, t6 |
| ; RV32IMZBS-NEXT: or a1, a5, a1 |
| ; RV32IMZBS-NEXT: srli a5, a1, 1 |
| ; RV32IMZBS-NEXT: mv s9, s11 |
| ; RV32IMZBS-NEXT: and a1, a1, s11 |
| ; RV32IMZBS-NEXT: and a5, a5, s11 |
| ; RV32IMZBS-NEXT: slli a1, a1, 1 |
| ; RV32IMZBS-NEXT: mul t0, s8, s1 |
| ; RV32IMZBS-NEXT: or t6, a5, a1 |
| ; RV32IMZBS-NEXT: mul a1, s7, t3 |
| ; RV32IMZBS-NEXT: srli a5, t6, 8 |
| ; RV32IMZBS-NEXT: xor s1, a3, a6 |
| ; RV32IMZBS-NEXT: and a3, a5, s0 |
| ; RV32IMZBS-NEXT: srli a5, t6, 24 |
| ; RV32IMZBS-NEXT: and a6, t6, s0 |
| ; RV32IMZBS-NEXT: slli t1, t6, 24 |
| ; RV32IMZBS-NEXT: slli a6, a6, 8 |
| ; RV32IMZBS-NEXT: or a3, a3, a5 |
| ; RV32IMZBS-NEXT: or a5, t1, a6 |
| ; RV32IMZBS-NEXT: xor s2, a7, a4 |
| ; RV32IMZBS-NEXT: or a3, a5, a3 |
| ; RV32IMZBS-NEXT: xor a0, t0, a1 |
| ; RV32IMZBS-NEXT: srli a1, a3, 4 |
| ; RV32IMZBS-NEXT: and a1, a1, ra |
| ; RV32IMZBS-NEXT: and a3, a3, ra |
| ; RV32IMZBS-NEXT: slli a3, a3, 4 |
| ; RV32IMZBS-NEXT: lw a6, 56(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: srli a4, a6, 8 |
| ; RV32IMZBS-NEXT: or a1, a1, a3 |
| ; RV32IMZBS-NEXT: and a3, a4, s0 |
| ; RV32IMZBS-NEXT: srli a4, a6, 24 |
| ; RV32IMZBS-NEXT: and a5, a6, s0 |
| ; RV32IMZBS-NEXT: slli a5, a5, 8 |
| ; RV32IMZBS-NEXT: slli a6, a6, 24 |
| ; RV32IMZBS-NEXT: or a3, a3, a4 |
| ; RV32IMZBS-NEXT: or a4, a6, a5 |
| ; RV32IMZBS-NEXT: srli a5, a1, 2 |
| ; RV32IMZBS-NEXT: or a3, a4, a3 |
| ; RV32IMZBS-NEXT: srli a4, a3, 4 |
| ; RV32IMZBS-NEXT: and a3, a3, ra |
| ; RV32IMZBS-NEXT: and a4, a4, ra |
| ; RV32IMZBS-NEXT: slli a3, a3, 4 |
| ; RV32IMZBS-NEXT: and a5, a5, s4 |
| ; RV32IMZBS-NEXT: or a3, a4, a3 |
| ; RV32IMZBS-NEXT: srli a4, a3, 2 |
| ; RV32IMZBS-NEXT: and a3, a3, s4 |
| ; RV32IMZBS-NEXT: and a4, a4, s4 |
| ; RV32IMZBS-NEXT: slli a3, a3, 2 |
| ; RV32IMZBS-NEXT: and a1, a1, s4 |
| ; RV32IMZBS-NEXT: or a3, a4, a3 |
| ; RV32IMZBS-NEXT: srli a4, a3, 1 |
| ; RV32IMZBS-NEXT: and a3, a3, s11 |
| ; RV32IMZBS-NEXT: and a4, a4, s11 |
| ; RV32IMZBS-NEXT: slli a3, a3, 1 |
| ; RV32IMZBS-NEXT: slli a1, a1, 2 |
| ; RV32IMZBS-NEXT: or a7, a4, a3 |
| ; RV32IMZBS-NEXT: sw a7, 56(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: or a1, a5, a1 |
| ; RV32IMZBS-NEXT: srli a3, a7, 8 |
| ; RV32IMZBS-NEXT: srli a4, a1, 1 |
| ; RV32IMZBS-NEXT: and a3, a3, s0 |
| ; RV32IMZBS-NEXT: srli a5, a7, 24 |
| ; RV32IMZBS-NEXT: and a6, a7, s0 |
| ; RV32IMZBS-NEXT: slli a7, a7, 24 |
| ; RV32IMZBS-NEXT: slli a6, a6, 8 |
| ; RV32IMZBS-NEXT: or a3, a3, a5 |
| ; RV32IMZBS-NEXT: or a5, a7, a6 |
| ; RV32IMZBS-NEXT: and a4, a4, s11 |
| ; RV32IMZBS-NEXT: or a3, a5, a3 |
| ; RV32IMZBS-NEXT: srli a5, a3, 4 |
| ; RV32IMZBS-NEXT: and a3, a3, ra |
| ; RV32IMZBS-NEXT: and a5, a5, ra |
| ; RV32IMZBS-NEXT: slli a3, a3, 4 |
| ; RV32IMZBS-NEXT: and a1, a1, s11 |
| ; RV32IMZBS-NEXT: or a3, a5, a3 |
| ; RV32IMZBS-NEXT: srli a5, a3, 2 |
| ; RV32IMZBS-NEXT: and a3, a3, s4 |
| ; RV32IMZBS-NEXT: and a5, a5, s4 |
| ; RV32IMZBS-NEXT: mv s3, s4 |
| ; RV32IMZBS-NEXT: slli a3, a3, 2 |
| ; RV32IMZBS-NEXT: slli a1, a1, 1 |
| ; RV32IMZBS-NEXT: or a3, a5, a3 |
| ; RV32IMZBS-NEXT: srli a5, a3, 1 |
| ; RV32IMZBS-NEXT: and a3, a3, s11 |
| ; RV32IMZBS-NEXT: and a5, a5, s11 |
| ; RV32IMZBS-NEXT: slli a3, a3, 1 |
| ; RV32IMZBS-NEXT: or a1, a4, a1 |
| ; RV32IMZBS-NEXT: or a3, a5, a3 |
| ; RV32IMZBS-NEXT: mv s8, s5 |
| ; RV32IMZBS-NEXT: and s5, a1, s5 |
| ; RV32IMZBS-NEXT: lw s11, 96(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: and a4, a3, s11 |
| ; RV32IMZBS-NEXT: and a5, a1, s11 |
| ; RV32IMZBS-NEXT: and a6, a1, t4 |
| ; RV32IMZBS-NEXT: lw s4, 92(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: and a1, a1, s4 |
| ; RV32IMZBS-NEXT: and a7, a3, s8 |
| ; RV32IMZBS-NEXT: and t0, a3, s4 |
| ; RV32IMZBS-NEXT: and a3, a3, t4 |
| ; RV32IMZBS-NEXT: mv s10, t4 |
| ; RV32IMZBS-NEXT: mul t1, a4, s5 |
| ; RV32IMZBS-NEXT: mul t2, a7, a5 |
| ; RV32IMZBS-NEXT: mul t3, t0, a6 |
| ; RV32IMZBS-NEXT: mul t4, a3, a1 |
| ; RV32IMZBS-NEXT: xor t5, t5, s1 |
| ; RV32IMZBS-NEXT: xor s1, s2, a0 |
| ; RV32IMZBS-NEXT: and a2, a2, s11 |
| ; RV32IMZBS-NEXT: and s2, s6, s8 |
| ; RV32IMZBS-NEXT: and t5, t5, s4 |
| ; RV32IMZBS-NEXT: mv a0, s4 |
| ; RV32IMZBS-NEXT: and s1, s1, s10 |
| ; RV32IMZBS-NEXT: or a2, s2, a2 |
| ; RV32IMZBS-NEXT: or t5, t5, s1 |
| ; RV32IMZBS-NEXT: or a2, a2, t5 |
| ; RV32IMZBS-NEXT: xor t1, t2, t1 |
| ; RV32IMZBS-NEXT: xor t2, t3, t4 |
| ; RV32IMZBS-NEXT: srli t3, a2, 8 |
| ; RV32IMZBS-NEXT: and t3, t3, s0 |
| ; RV32IMZBS-NEXT: srli t4, a2, 24 |
| ; RV32IMZBS-NEXT: mul t5, a4, a6 |
| ; RV32IMZBS-NEXT: mul s1, a7, s5 |
| ; RV32IMZBS-NEXT: mul s2, t0, a1 |
| ; RV32IMZBS-NEXT: mul s4, a3, a5 |
| ; RV32IMZBS-NEXT: mul s6, a4, a5 |
| ; RV32IMZBS-NEXT: mul s7, a7, a1 |
| ; RV32IMZBS-NEXT: or t3, t3, t4 |
| ; RV32IMZBS-NEXT: xor t1, t1, t2 |
| ; RV32IMZBS-NEXT: mul a1, a4, a1 |
| ; RV32IMZBS-NEXT: mul a4, a7, a6 |
| ; RV32IMZBS-NEXT: mul a6, a3, a6 |
| ; RV32IMZBS-NEXT: mul a7, t0, s5 |
| ; RV32IMZBS-NEXT: mul a5, t0, a5 |
| ; RV32IMZBS-NEXT: mul a3, a3, s5 |
| ; RV32IMZBS-NEXT: xor t0, s1, t5 |
| ; RV32IMZBS-NEXT: xor t2, s2, s4 |
| ; RV32IMZBS-NEXT: xor t0, t0, t2 |
| ; RV32IMZBS-NEXT: xor t2, s7, s6 |
| ; RV32IMZBS-NEXT: slli t4, a2, 24 |
| ; RV32IMZBS-NEXT: and a2, a2, s0 |
| ; RV32IMZBS-NEXT: slli a2, a2, 8 |
| ; RV32IMZBS-NEXT: and t1, t1, s11 |
| ; RV32IMZBS-NEXT: and t0, t0, s8 |
| ; RV32IMZBS-NEXT: xor a6, a7, a6 |
| ; RV32IMZBS-NEXT: xor a1, a4, a1 |
| ; RV32IMZBS-NEXT: xor a3, a5, a3 |
| ; RV32IMZBS-NEXT: xor a4, t2, a6 |
| ; RV32IMZBS-NEXT: xor a1, a1, a3 |
| ; RV32IMZBS-NEXT: and a3, a4, a0 |
| ; RV32IMZBS-NEXT: mv t2, a0 |
| ; RV32IMZBS-NEXT: and a1, a1, s10 |
| ; RV32IMZBS-NEXT: or a4, t0, t1 |
| ; RV32IMZBS-NEXT: or a1, a3, a1 |
| ; RV32IMZBS-NEXT: or a2, t4, a2 |
| ; RV32IMZBS-NEXT: or a1, a4, a1 |
| ; RV32IMZBS-NEXT: or a3, a2, t3 |
| ; RV32IMZBS-NEXT: srli a2, a1, 8 |
| ; RV32IMZBS-NEXT: srli a4, a3, 4 |
| ; RV32IMZBS-NEXT: and a2, a2, s0 |
| ; RV32IMZBS-NEXT: srli a5, a1, 24 |
| ; RV32IMZBS-NEXT: and a6, a1, s0 |
| ; RV32IMZBS-NEXT: slli a1, a1, 24 |
| ; RV32IMZBS-NEXT: slli a6, a6, 8 |
| ; RV32IMZBS-NEXT: or a5, a2, a5 |
| ; RV32IMZBS-NEXT: or a1, a1, a6 |
| ; RV32IMZBS-NEXT: mv a2, ra |
| ; RV32IMZBS-NEXT: and a4, a4, ra |
| ; RV32IMZBS-NEXT: sw a4, 52(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: or a1, a1, a5 |
| ; RV32IMZBS-NEXT: srli a4, a1, 4 |
| ; RV32IMZBS-NEXT: and a1, a1, ra |
| ; RV32IMZBS-NEXT: and a4, a4, ra |
| ; RV32IMZBS-NEXT: slli a1, a1, 4 |
| ; RV32IMZBS-NEXT: and s4, a3, ra |
| ; RV32IMZBS-NEXT: or a1, a4, a1 |
| ; RV32IMZBS-NEXT: slli s4, s4, 4 |
| ; RV32IMZBS-NEXT: sw s4, 48(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: srli a3, a1, 2 |
| ; RV32IMZBS-NEXT: and a3, a3, s3 |
| ; RV32IMZBS-NEXT: lw a0, 64(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: srli a4, a0, 8 |
| ; RV32IMZBS-NEXT: and a1, a1, s3 |
| ; RV32IMZBS-NEXT: and a4, a4, s0 |
| ; RV32IMZBS-NEXT: srli a5, a0, 24 |
| ; RV32IMZBS-NEXT: and a6, a0, s0 |
| ; RV32IMZBS-NEXT: slli a6, a6, 8 |
| ; RV32IMZBS-NEXT: slli a7, a0, 24 |
| ; RV32IMZBS-NEXT: or a4, a4, a5 |
| ; RV32IMZBS-NEXT: or a5, a7, a6 |
| ; RV32IMZBS-NEXT: slli a1, a1, 2 |
| ; RV32IMZBS-NEXT: or a4, a5, a4 |
| ; RV32IMZBS-NEXT: srli a5, a4, 4 |
| ; RV32IMZBS-NEXT: and a4, a4, ra |
| ; RV32IMZBS-NEXT: and a5, a5, ra |
| ; RV32IMZBS-NEXT: slli a4, a4, 4 |
| ; RV32IMZBS-NEXT: or a1, a3, a1 |
| ; RV32IMZBS-NEXT: or a4, a5, a4 |
| ; RV32IMZBS-NEXT: srli a3, a4, 2 |
| ; RV32IMZBS-NEXT: sw s3, 28(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: and a4, a4, s3 |
| ; RV32IMZBS-NEXT: and a3, a3, s3 |
| ; RV32IMZBS-NEXT: slli a4, a4, 2 |
| ; RV32IMZBS-NEXT: srli a5, a1, 1 |
| ; RV32IMZBS-NEXT: or a3, a3, a4 |
| ; RV32IMZBS-NEXT: srli a4, a3, 1 |
| ; RV32IMZBS-NEXT: and a3, a3, s9 |
| ; RV32IMZBS-NEXT: and a4, a4, s9 |
| ; RV32IMZBS-NEXT: slli a3, a3, 1 |
| ; RV32IMZBS-NEXT: and a1, a1, s9 |
| ; RV32IMZBS-NEXT: or a3, a4, a3 |
| ; RV32IMZBS-NEXT: mv s4, s8 |
| ; RV32IMZBS-NEXT: and t5, t6, s8 |
| ; RV32IMZBS-NEXT: and a4, a3, s11 |
| ; RV32IMZBS-NEXT: and s3, t6, s11 |
| ; RV32IMZBS-NEXT: and a6, a3, s8 |
| ; RV32IMZBS-NEXT: mul a7, a4, t5 |
| ; RV32IMZBS-NEXT: mul t0, a6, s3 |
| ; RV32IMZBS-NEXT: sw s10, 80(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: and s2, t6, s10 |
| ; RV32IMZBS-NEXT: and t1, a3, t2 |
| ; RV32IMZBS-NEXT: and s1, t6, t2 |
| ; RV32IMZBS-NEXT: mv t6, t2 |
| ; RV32IMZBS-NEXT: and a3, a3, s10 |
| ; RV32IMZBS-NEXT: mul t2, t1, s2 |
| ; RV32IMZBS-NEXT: mul t3, a3, s1 |
| ; RV32IMZBS-NEXT: mul t4, a4, s2 |
| ; RV32IMZBS-NEXT: mul s6, a6, t5 |
| ; RV32IMZBS-NEXT: mul s7, t1, s1 |
| ; RV32IMZBS-NEXT: mul s8, a3, s3 |
| ; RV32IMZBS-NEXT: mul s9, a4, s3 |
| ; RV32IMZBS-NEXT: mul s10, a6, s1 |
| ; RV32IMZBS-NEXT: mul s11, t1, t5 |
| ; RV32IMZBS-NEXT: sw t5, 64(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: mul ra, a3, s2 |
| ; RV32IMZBS-NEXT: lw a0, 100(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: and a5, a5, a0 |
| ; RV32IMZBS-NEXT: slli a1, a1, 1 |
| ; RV32IMZBS-NEXT: lw a0, 52(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: lw s5, 48(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: or a0, a0, s5 |
| ; RV32IMZBS-NEXT: sw a0, 52(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: or a1, a5, a1 |
| ; RV32IMZBS-NEXT: sw a1, 48(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: xor a1, t0, a7 |
| ; RV32IMZBS-NEXT: xor a5, t2, t3 |
| ; RV32IMZBS-NEXT: xor a7, s6, t4 |
| ; RV32IMZBS-NEXT: xor t0, s7, s8 |
| ; RV32IMZBS-NEXT: xor a1, a1, a5 |
| ; RV32IMZBS-NEXT: xor a5, a7, t0 |
| ; RV32IMZBS-NEXT: xor a7, s10, s9 |
| ; RV32IMZBS-NEXT: xor t0, s11, ra |
| ; RV32IMZBS-NEXT: xor a7, a7, t0 |
| ; RV32IMZBS-NEXT: mul a4, a4, s1 |
| ; RV32IMZBS-NEXT: mul a6, a6, s2 |
| ; RV32IMZBS-NEXT: lw a0, 68(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: srli t0, a0, 8 |
| ; RV32IMZBS-NEXT: and t0, t0, s0 |
| ; RV32IMZBS-NEXT: srli t2, a0, 24 |
| ; RV32IMZBS-NEXT: or t0, t0, t2 |
| ; RV32IMZBS-NEXT: mul t1, t1, s3 |
| ; RV32IMZBS-NEXT: mul a3, a3, t5 |
| ; RV32IMZBS-NEXT: and t2, a0, s0 |
| ; RV32IMZBS-NEXT: slli t2, t2, 8 |
| ; RV32IMZBS-NEXT: slli t3, a0, 24 |
| ; RV32IMZBS-NEXT: or t2, t3, t2 |
| ; RV32IMZBS-NEXT: lw s5, 96(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: and a0, a1, s5 |
| ; RV32IMZBS-NEXT: sw a0, 68(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: and s8, a5, s4 |
| ; RV32IMZBS-NEXT: and a0, a7, t6 |
| ; RV32IMZBS-NEXT: sw a0, 44(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: xor a1, a6, a4 |
| ; RV32IMZBS-NEXT: or a4, t2, t0 |
| ; RV32IMZBS-NEXT: srli a5, a4, 4 |
| ; RV32IMZBS-NEXT: and a4, a4, a2 |
| ; RV32IMZBS-NEXT: and a5, a5, a2 |
| ; RV32IMZBS-NEXT: slli a4, a4, 4 |
| ; RV32IMZBS-NEXT: xor a3, t1, a3 |
| ; RV32IMZBS-NEXT: or a4, a5, a4 |
| ; RV32IMZBS-NEXT: srli a5, a4, 2 |
| ; RV32IMZBS-NEXT: lw s9, 28(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: and a4, a4, s9 |
| ; RV32IMZBS-NEXT: and a5, a5, s9 |
| ; RV32IMZBS-NEXT: slli a4, a4, 2 |
| ; RV32IMZBS-NEXT: xor a1, a1, a3 |
| ; RV32IMZBS-NEXT: or a4, a5, a4 |
| ; RV32IMZBS-NEXT: srli a3, a4, 1 |
| ; RV32IMZBS-NEXT: lw a0, 104(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: and a4, a4, a0 |
| ; RV32IMZBS-NEXT: and a3, a3, a0 |
| ; RV32IMZBS-NEXT: slli a4, a4, 1 |
| ; RV32IMZBS-NEXT: lw a0, 80(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: and s7, a1, a0 |
| ; RV32IMZBS-NEXT: or a3, a3, a4 |
| ; RV32IMZBS-NEXT: mv t1, s4 |
| ; RV32IMZBS-NEXT: and a4, a3, s4 |
| ; RV32IMZBS-NEXT: lw a2, 56(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: and t4, a2, s5 |
| ; RV32IMZBS-NEXT: and a5, a3, s5 |
| ; RV32IMZBS-NEXT: and a6, a3, a0 |
| ; RV32IMZBS-NEXT: and a3, a3, t6 |
| ; RV32IMZBS-NEXT: and s6, a2, s4 |
| ; RV32IMZBS-NEXT: sw s4, 24(sp) # 4-byte Folded Spill |
| ; RV32IMZBS-NEXT: and s4, a2, t6 |
| ; RV32IMZBS-NEXT: and t6, a2, a0 |
| ; RV32IMZBS-NEXT: mul s5, t6, a3 |
| ; RV32IMZBS-NEXT: mul t0, s4, a3 |
| ; RV32IMZBS-NEXT: mul t5, s6, a3 |
| ; RV32IMZBS-NEXT: mul a7, t4, a3 |
| ; RV32IMZBS-NEXT: mul t2, t4, a4 |
| ; RV32IMZBS-NEXT: mul t3, s6, a5 |
| ; RV32IMZBS-NEXT: mul s10, s4, a6 |
| ; RV32IMZBS-NEXT: mul s11, t4, a6 |
| ; RV32IMZBS-NEXT: mul ra, s6, a4 |
| ; RV32IMZBS-NEXT: mul a0, t6, a5 |
| ; RV32IMZBS-NEXT: mul a3, t6, a6 |
| ; RV32IMZBS-NEXT: mul a6, s6, a6 |
| ; RV32IMZBS-NEXT: mul a1, t4, a5 |
| ; RV32IMZBS-NEXT: mul a2, s4, a4 |
| ; RV32IMZBS-NEXT: mul a5, s4, a5 |
| ; RV32IMZBS-NEXT: mul a4, t6, a4 |
| ; RV32IMZBS-NEXT: lw s0, 68(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: or s8, s8, s0 |
| ; RV32IMZBS-NEXT: lw s0, 44(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: or s7, s0, s7 |
| ; RV32IMZBS-NEXT: xor t2, t3, t2 |
| ; RV32IMZBS-NEXT: xor t3, s10, s5 |
| ; RV32IMZBS-NEXT: xor s5, ra, s11 |
| ; RV32IMZBS-NEXT: xor a0, t0, a0 |
| ; RV32IMZBS-NEXT: xor t0, t2, t3 |
| ; RV32IMZBS-NEXT: xor a0, s5, a0 |
| ; RV32IMZBS-NEXT: xor a1, t5, a1 |
| ; RV32IMZBS-NEXT: xor a2, a2, a3 |
| ; RV32IMZBS-NEXT: xor a3, a6, a7 |
| ; RV32IMZBS-NEXT: xor a4, a5, a4 |
| ; RV32IMZBS-NEXT: xor a1, a1, a2 |
| ; RV32IMZBS-NEXT: xor a3, a3, a4 |
| ; RV32IMZBS-NEXT: lw s11, 96(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: and a2, t0, s11 |
| ; RV32IMZBS-NEXT: and a0, a0, t1 |
| ; RV32IMZBS-NEXT: lw ra, 92(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: and a1, a1, ra |
| ; RV32IMZBS-NEXT: lw s10, 80(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: and a3, a3, s10 |
| ; RV32IMZBS-NEXT: or a0, a0, a2 |
| ; RV32IMZBS-NEXT: or a1, a1, a3 |
| ; RV32IMZBS-NEXT: or a2, s8, s7 |
| ; RV32IMZBS-NEXT: or a0, a0, a1 |
| ; RV32IMZBS-NEXT: lw a1, 48(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: srli a1, a1, 1 |
| ; RV32IMZBS-NEXT: xor a0, a0, a2 |
| ; RV32IMZBS-NEXT: lw a3, 52(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: srli a2, a3, 2 |
| ; RV32IMZBS-NEXT: xor a0, a1, a0 |
| ; RV32IMZBS-NEXT: and a1, a2, s9 |
| ; RV32IMZBS-NEXT: srli a2, a0, 8 |
| ; RV32IMZBS-NEXT: and a3, a3, s9 |
| ; RV32IMZBS-NEXT: lw s7, 84(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: and a2, a2, s7 |
| ; RV32IMZBS-NEXT: srli a4, a0, 24 |
| ; RV32IMZBS-NEXT: and a5, a0, s7 |
| ; RV32IMZBS-NEXT: slli a0, a0, 24 |
| ; RV32IMZBS-NEXT: slli a5, a5, 8 |
| ; RV32IMZBS-NEXT: or a2, a2, a4 |
| ; RV32IMZBS-NEXT: or a0, a0, a5 |
| ; RV32IMZBS-NEXT: slli a3, a3, 2 |
| ; RV32IMZBS-NEXT: or a0, a0, a2 |
| ; RV32IMZBS-NEXT: lw t5, 64(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: mul a4, t4, t5 |
| ; RV32IMZBS-NEXT: mul a5, s6, s3 |
| ; RV32IMZBS-NEXT: mul a6, s4, s2 |
| ; RV32IMZBS-NEXT: mul a7, t6, s1 |
| ; RV32IMZBS-NEXT: srli a2, a0, 4 |
| ; RV32IMZBS-NEXT: lw s5, 88(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: and a0, a0, s5 |
| ; RV32IMZBS-NEXT: and t0, a2, s5 |
| ; RV32IMZBS-NEXT: slli a0, a0, 4 |
| ; RV32IMZBS-NEXT: or a2, a1, a3 |
| ; RV32IMZBS-NEXT: or a0, t0, a0 |
| ; RV32IMZBS-NEXT: mul a1, t4, s2 |
| ; RV32IMZBS-NEXT: mul a3, s6, t5 |
| ; RV32IMZBS-NEXT: mul t0, s4, s1 |
| ; RV32IMZBS-NEXT: mul t1, t6, s3 |
| ; RV32IMZBS-NEXT: xor a4, a5, a4 |
| ; RV32IMZBS-NEXT: xor a5, a6, a7 |
| ; RV32IMZBS-NEXT: mul a6, t4, s3 |
| ; RV32IMZBS-NEXT: mul a7, s6, s1 |
| ; RV32IMZBS-NEXT: mul t2, s4, t5 |
| ; RV32IMZBS-NEXT: mul t3, t6, s2 |
| ; RV32IMZBS-NEXT: mul t4, t4, s1 |
| ; RV32IMZBS-NEXT: mul s0, s6, s2 |
| ; RV32IMZBS-NEXT: mul s1, s4, s3 |
| ; RV32IMZBS-NEXT: mul t5, t6, t5 |
| ; RV32IMZBS-NEXT: xor a1, a3, a1 |
| ; RV32IMZBS-NEXT: xor a3, t0, t1 |
| ; RV32IMZBS-NEXT: xor a4, a4, a5 |
| ; RV32IMZBS-NEXT: xor a1, a1, a3 |
| ; RV32IMZBS-NEXT: and a3, a4, s11 |
| ; RV32IMZBS-NEXT: lw a4, 24(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: and a1, a1, a4 |
| ; RV32IMZBS-NEXT: xor a4, a7, a6 |
| ; RV32IMZBS-NEXT: xor a5, t2, t3 |
| ; RV32IMZBS-NEXT: or a1, a1, a3 |
| ; RV32IMZBS-NEXT: xor a4, a4, a5 |
| ; RV32IMZBS-NEXT: xor a3, s0, t4 |
| ; RV32IMZBS-NEXT: xor a5, s1, t5 |
| ; RV32IMZBS-NEXT: and a4, a4, ra |
| ; RV32IMZBS-NEXT: xor a3, a3, a5 |
| ; RV32IMZBS-NEXT: and a3, a3, s10 |
| ; RV32IMZBS-NEXT: srli a5, a0, 2 |
| ; RV32IMZBS-NEXT: or a3, a4, a3 |
| ; RV32IMZBS-NEXT: and a4, a5, s9 |
| ; RV32IMZBS-NEXT: and a0, a0, s9 |
| ; RV32IMZBS-NEXT: or a1, a1, a3 |
| ; RV32IMZBS-NEXT: slli a0, a0, 2 |
| ; RV32IMZBS-NEXT: srli a3, a1, 8 |
| ; RV32IMZBS-NEXT: or a0, a4, a0 |
| ; RV32IMZBS-NEXT: and a3, a3, s7 |
| ; RV32IMZBS-NEXT: srli a4, a1, 24 |
| ; RV32IMZBS-NEXT: and a5, a1, s7 |
| ; RV32IMZBS-NEXT: slli a1, a1, 24 |
| ; RV32IMZBS-NEXT: slli a5, a5, 8 |
| ; RV32IMZBS-NEXT: or a3, a3, a4 |
| ; RV32IMZBS-NEXT: or a1, a1, a5 |
| ; RV32IMZBS-NEXT: lw a4, 60(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: srli a4, a4, 1 |
| ; RV32IMZBS-NEXT: or a1, a1, a3 |
| ; RV32IMZBS-NEXT: srli a3, a1, 4 |
| ; RV32IMZBS-NEXT: and a1, a1, s5 |
| ; RV32IMZBS-NEXT: and a3, a3, s5 |
| ; RV32IMZBS-NEXT: slli a1, a1, 4 |
| ; RV32IMZBS-NEXT: srli a5, a0, 1 |
| ; RV32IMZBS-NEXT: or a1, a3, a1 |
| ; RV32IMZBS-NEXT: lw a3, 100(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: and a3, a5, a3 |
| ; RV32IMZBS-NEXT: srli a5, a1, 2 |
| ; RV32IMZBS-NEXT: srli a6, a2, 1 |
| ; RV32IMZBS-NEXT: and a5, a5, s9 |
| ; RV32IMZBS-NEXT: and a1, a1, s9 |
| ; RV32IMZBS-NEXT: slli a7, a6, 31 |
| ; RV32IMZBS-NEXT: lw t0, 104(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: and a0, a0, t0 |
| ; RV32IMZBS-NEXT: slli a1, a1, 2 |
| ; RV32IMZBS-NEXT: slli a0, a0, 1 |
| ; RV32IMZBS-NEXT: or a1, a5, a1 |
| ; RV32IMZBS-NEXT: or a0, a3, a0 |
| ; RV32IMZBS-NEXT: srli a3, a1, 1 |
| ; RV32IMZBS-NEXT: srli a0, a0, 1 |
| ; RV32IMZBS-NEXT: slli a5, a3, 31 |
| ; RV32IMZBS-NEXT: or a4, a4, a7 |
| ; RV32IMZBS-NEXT: or a0, a0, a5 |
| ; RV32IMZBS-NEXT: and a5, a6, t0 |
| ; RV32IMZBS-NEXT: and a2, a2, t0 |
| ; RV32IMZBS-NEXT: and a3, a3, t0 |
| ; RV32IMZBS-NEXT: and a1, a1, t0 |
| ; RV32IMZBS-NEXT: slli a2, a2, 1 |
| ; RV32IMZBS-NEXT: slli a1, a1, 1 |
| ; RV32IMZBS-NEXT: or a2, a5, a2 |
| ; RV32IMZBS-NEXT: or a1, a3, a1 |
| ; RV32IMZBS-NEXT: srli a2, a2, 1 |
| ; RV32IMZBS-NEXT: srli a1, a1, 1 |
| ; RV32IMZBS-NEXT: lw a3, 72(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: sw a4, 0(a3) |
| ; RV32IMZBS-NEXT: sw a2, 4(a3) |
| ; RV32IMZBS-NEXT: sw a0, 8(a3) |
| ; RV32IMZBS-NEXT: sw a1, 12(a3) |
| ; RV32IMZBS-NEXT: lw a3, 76(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: sw a4, 0(a3) |
| ; RV32IMZBS-NEXT: sw a2, 4(a3) |
| ; RV32IMZBS-NEXT: sw a0, 8(a3) |
| ; RV32IMZBS-NEXT: sw a1, 12(a3) |
| ; RV32IMZBS-NEXT: lw ra, 156(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: lw s0, 152(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: lw s1, 148(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: lw s2, 144(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: lw s3, 140(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: lw s4, 136(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: lw s5, 132(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: lw s6, 128(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: lw s7, 124(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: lw s8, 120(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: lw s9, 116(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: lw s10, 112(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: lw s11, 108(sp) # 4-byte Folded Reload |
| ; RV32IMZBS-NEXT: addi sp, sp, 160 |
| ; RV32IMZBS-NEXT: ret |
| ; |
| ; RV64IMZBS-LABEL: commutative_clmulh_v2i64: |
| ; RV64IMZBS: # %bb.0: |
| ; RV64IMZBS-NEXT: addi sp, sp, -128 |
| ; RV64IMZBS-NEXT: sd ra, 120(sp) # 8-byte Folded Spill |
| ; RV64IMZBS-NEXT: sd s0, 112(sp) # 8-byte Folded Spill |
| ; RV64IMZBS-NEXT: sd s1, 104(sp) # 8-byte Folded Spill |
| ; RV64IMZBS-NEXT: sd s2, 96(sp) # 8-byte Folded Spill |
| ; RV64IMZBS-NEXT: sd s3, 88(sp) # 8-byte Folded Spill |
| ; RV64IMZBS-NEXT: sd s4, 80(sp) # 8-byte Folded Spill |
| ; RV64IMZBS-NEXT: sd s5, 72(sp) # 8-byte Folded Spill |
| ; RV64IMZBS-NEXT: sd s6, 64(sp) # 8-byte Folded Spill |
| ; RV64IMZBS-NEXT: sd s7, 56(sp) # 8-byte Folded Spill |
| ; RV64IMZBS-NEXT: sd s8, 48(sp) # 8-byte Folded Spill |
| ; RV64IMZBS-NEXT: sd s9, 40(sp) # 8-byte Folded Spill |
| ; RV64IMZBS-NEXT: sd s10, 32(sp) # 8-byte Folded Spill |
| ; RV64IMZBS-NEXT: sd s11, 24(sp) # 8-byte Folded Spill |
| ; RV64IMZBS-NEXT: sd a5, 16(sp) # 8-byte Folded Spill |
| ; RV64IMZBS-NEXT: sd a4, 8(sp) # 8-byte Folded Spill |
| ; RV64IMZBS-NEXT: mv a6, a3 |
| ; RV64IMZBS-NEXT: mv a4, a1 |
| ; RV64IMZBS-NEXT: srli a7, a0, 24 |
| ; RV64IMZBS-NEXT: lui a1, 4080 |
| ; RV64IMZBS-NEXT: and t1, a7, a1 |
| ; RV64IMZBS-NEXT: li t0, 255 |
| ; RV64IMZBS-NEXT: srli a7, a0, 8 |
| ; RV64IMZBS-NEXT: slli t0, t0, 24 |
| ; RV64IMZBS-NEXT: and t2, a7, t0 |
| ; RV64IMZBS-NEXT: sd t0, 0(sp) # 8-byte Folded Spill |
| ; RV64IMZBS-NEXT: lui a7, 16 |
| ; RV64IMZBS-NEXT: srli t3, a0, 40 |
| ; RV64IMZBS-NEXT: addi a7, a7, -256 |
| ; RV64IMZBS-NEXT: and t3, t3, a7 |
| ; RV64IMZBS-NEXT: srli t4, a0, 56 |
| ; RV64IMZBS-NEXT: or t1, t2, t1 |
| ; RV64IMZBS-NEXT: or t2, t3, t4 |
| ; RV64IMZBS-NEXT: or t1, t1, t2 |
| ; RV64IMZBS-NEXT: and t2, a0, a1 |
| ; RV64IMZBS-NEXT: srliw t3, a0, 24 |
| ; RV64IMZBS-NEXT: slli t2, t2, 24 |
| ; RV64IMZBS-NEXT: slli t3, t3, 32 |
| ; RV64IMZBS-NEXT: or t2, t2, t3 |
| ; RV64IMZBS-NEXT: and t3, a0, a7 |
| ; RV64IMZBS-NEXT: slli t3, t3, 40 |
| ; RV64IMZBS-NEXT: slli a0, a0, 56 |
| ; RV64IMZBS-NEXT: or a0, a0, t3 |
| ; RV64IMZBS-NEXT: lui t3, 61681 |
| ; RV64IMZBS-NEXT: or a0, a0, t2 |
| ; RV64IMZBS-NEXT: addi t2, t3, -241 |
| ; RV64IMZBS-NEXT: or t1, a0, t1 |
| ; RV64IMZBS-NEXT: slli a0, t2, 32 |
| ; RV64IMZBS-NEXT: srli t3, t1, 4 |
| ; RV64IMZBS-NEXT: add a5, t2, a0 |
| ; RV64IMZBS-NEXT: and t2, t3, a5 |
| ; RV64IMZBS-NEXT: and t1, t1, a5 |
| ; RV64IMZBS-NEXT: lui t3, 209715 |
| ; RV64IMZBS-NEXT: slli t1, t1, 4 |
| ; RV64IMZBS-NEXT: addi t3, t3, 819 |
| ; RV64IMZBS-NEXT: or t2, t2, t1 |
| ; RV64IMZBS-NEXT: slli t1, t3, 32 |
| ; RV64IMZBS-NEXT: srli t4, t2, 2 |
| ; RV64IMZBS-NEXT: add t1, t3, t1 |
| ; RV64IMZBS-NEXT: and t3, t4, t1 |
| ; RV64IMZBS-NEXT: lui t4, 349525 |
| ; RV64IMZBS-NEXT: and t2, t2, t1 |
| ; RV64IMZBS-NEXT: addi t4, t4, 1365 |
| ; RV64IMZBS-NEXT: slli t2, t2, 2 |
| ; RV64IMZBS-NEXT: slli t5, t4, 32 |
| ; RV64IMZBS-NEXT: or t3, t3, t2 |
| ; RV64IMZBS-NEXT: add t2, t4, t5 |
| ; RV64IMZBS-NEXT: srli t4, t3, 1 |
| ; RV64IMZBS-NEXT: and t3, t3, t2 |
| ; RV64IMZBS-NEXT: and t4, t4, t2 |
| ; RV64IMZBS-NEXT: slli t3, t3, 1 |
| ; RV64IMZBS-NEXT: or t6, t4, t3 |
| ; RV64IMZBS-NEXT: srli t3, a2, 24 |
| ; RV64IMZBS-NEXT: srli t4, a2, 8 |
| ; RV64IMZBS-NEXT: and t3, t3, a1 |
| ; RV64IMZBS-NEXT: and t4, t4, t0 |
| ; RV64IMZBS-NEXT: or t3, t4, t3 |
| ; RV64IMZBS-NEXT: srli t4, a2, 40 |
| ; RV64IMZBS-NEXT: and t4, t4, a7 |
| ; RV64IMZBS-NEXT: srli t5, a2, 56 |
| ; RV64IMZBS-NEXT: or t4, t4, t5 |
| ; RV64IMZBS-NEXT: and t5, a2, a1 |
| ; RV64IMZBS-NEXT: slli t5, t5, 24 |
| ; RV64IMZBS-NEXT: srliw s0, a2, 24 |
| ; RV64IMZBS-NEXT: slli s0, s0, 32 |
| ; RV64IMZBS-NEXT: and s1, a2, a7 |
| ; RV64IMZBS-NEXT: slli s1, s1, 40 |
| ; RV64IMZBS-NEXT: slli a2, a2, 56 |
| ; RV64IMZBS-NEXT: or t5, t5, s0 |
| ; RV64IMZBS-NEXT: or a2, a2, s1 |
| ; RV64IMZBS-NEXT: or t3, t3, t4 |
| ; RV64IMZBS-NEXT: or a2, a2, t5 |
| ; RV64IMZBS-NEXT: lui t4, 69905 |
| ; RV64IMZBS-NEXT: or a2, a2, t3 |
| ; RV64IMZBS-NEXT: srli t3, a2, 4 |
| ; RV64IMZBS-NEXT: and a2, a2, a5 |
| ; RV64IMZBS-NEXT: and t3, t3, a5 |
| ; RV64IMZBS-NEXT: slli a2, a2, 4 |
| ; RV64IMZBS-NEXT: addi t4, t4, 273 |
| ; RV64IMZBS-NEXT: or a2, t3, a2 |
| ; RV64IMZBS-NEXT: srli t3, a2, 2 |
| ; RV64IMZBS-NEXT: and a2, a2, t1 |
| ; RV64IMZBS-NEXT: and t3, t3, t1 |
| ; RV64IMZBS-NEXT: slli a2, a2, 2 |
| ; RV64IMZBS-NEXT: slli t5, t4, 32 |
| ; RV64IMZBS-NEXT: or t3, t3, a2 |
| ; RV64IMZBS-NEXT: add t0, t4, t5 |
| ; RV64IMZBS-NEXT: srli t4, t3, 1 |
| ; RV64IMZBS-NEXT: and t4, t4, t2 |
| ; RV64IMZBS-NEXT: lui t5, 139810 |
| ; RV64IMZBS-NEXT: and t3, t3, t2 |
| ; RV64IMZBS-NEXT: addi t5, t5, 546 |
| ; RV64IMZBS-NEXT: slli t3, t3, 1 |
| ; RV64IMZBS-NEXT: slli s0, t5, 32 |
| ; RV64IMZBS-NEXT: or s1, t4, t3 |
| ; RV64IMZBS-NEXT: add t3, t5, s0 |
| ; RV64IMZBS-NEXT: and s0, t6, t0 |
| ; RV64IMZBS-NEXT: and s2, s1, t3 |
| ; RV64IMZBS-NEXT: mul s3, s2, s0 |
| ; RV64IMZBS-NEXT: lui t4, %hi(.LCPI6_0) |
| ; RV64IMZBS-NEXT: ld t4, %lo(.LCPI6_0)(t4) |
| ; RV64IMZBS-NEXT: lui t5, 279620 |
| ; RV64IMZBS-NEXT: and s4, t6, t3 |
| ; RV64IMZBS-NEXT: addi t5, t5, 1092 |
| ; RV64IMZBS-NEXT: and s5, s1, t0 |
| ; RV64IMZBS-NEXT: slli s6, t5, 32 |
| ; RV64IMZBS-NEXT: mul s7, s5, s4 |
| ; RV64IMZBS-NEXT: add t5, t5, s6 |
| ; RV64IMZBS-NEXT: and s6, t6, t4 |
| ; RV64IMZBS-NEXT: and s8, s1, t5 |
| ; RV64IMZBS-NEXT: and t6, t6, t5 |
| ; RV64IMZBS-NEXT: and s1, s1, t4 |
| ; RV64IMZBS-NEXT: mul s9, s8, s6 |
| ; RV64IMZBS-NEXT: mul s10, s1, t6 |
| ; RV64IMZBS-NEXT: mul s11, s2, s6 |
| ; RV64IMZBS-NEXT: mul ra, s5, s0 |
| ; RV64IMZBS-NEXT: mul a3, s8, t6 |
| ; RV64IMZBS-NEXT: mul a2, s1, s4 |
| ; RV64IMZBS-NEXT: mul a1, s2, s4 |
| ; RV64IMZBS-NEXT: mul s2, s2, t6 |
| ; RV64IMZBS-NEXT: mul t6, s5, t6 |
| ; RV64IMZBS-NEXT: mul s5, s5, s6 |
| ; RV64IMZBS-NEXT: mul s6, s1, s6 |
| ; RV64IMZBS-NEXT: mul a0, s8, s0 |
| ; RV64IMZBS-NEXT: mul s4, s8, s4 |
| ; RV64IMZBS-NEXT: mul s0, s1, s0 |
| ; RV64IMZBS-NEXT: xor s1, s7, s3 |
| ; RV64IMZBS-NEXT: xor s3, s9, s10 |
| ; RV64IMZBS-NEXT: xor s7, ra, s11 |
| ; RV64IMZBS-NEXT: xor a2, a3, a2 |
| ; RV64IMZBS-NEXT: xor a3, s1, s3 |
| ; RV64IMZBS-NEXT: xor a2, s7, a2 |
| ; RV64IMZBS-NEXT: and a3, a3, t3 |
| ; RV64IMZBS-NEXT: and a2, a2, t0 |
| ; RV64IMZBS-NEXT: xor a1, t6, a1 |
| ; RV64IMZBS-NEXT: xor a0, a0, s6 |
| ; RV64IMZBS-NEXT: xor t6, s5, s2 |
| ; RV64IMZBS-NEXT: xor s0, s4, s0 |
| ; RV64IMZBS-NEXT: xor a0, a1, a0 |
| ; RV64IMZBS-NEXT: xor a1, t6, s0 |
| ; RV64IMZBS-NEXT: and a0, a0, t5 |
| ; RV64IMZBS-NEXT: and a1, a1, t4 |
| ; RV64IMZBS-NEXT: or a2, a2, a3 |
| ; RV64IMZBS-NEXT: or a0, a0, a1 |
| ; RV64IMZBS-NEXT: or s0, a2, a0 |
| ; RV64IMZBS-NEXT: srli a0, s0, 40 |
| ; RV64IMZBS-NEXT: and a0, a0, a7 |
| ; RV64IMZBS-NEXT: srli a1, s0, 56 |
| ; RV64IMZBS-NEXT: srli a2, s0, 24 |
| ; RV64IMZBS-NEXT: srli a3, s0, 8 |
| ; RV64IMZBS-NEXT: lui s1, 4080 |
| ; RV64IMZBS-NEXT: and a2, a2, s1 |
| ; RV64IMZBS-NEXT: ld s10, 0(sp) # 8-byte Folded Reload |
| ; RV64IMZBS-NEXT: and a3, a3, s10 |
| ; RV64IMZBS-NEXT: or a0, a0, a1 |
| ; RV64IMZBS-NEXT: or a2, a3, a2 |
| ; RV64IMZBS-NEXT: or t6, a2, a0 |
| ; RV64IMZBS-NEXT: srliw a0, s0, 24 |
| ; RV64IMZBS-NEXT: and a1, s0, s1 |
| ; RV64IMZBS-NEXT: lui s9, 4080 |
| ; RV64IMZBS-NEXT: slli a0, a0, 32 |
| ; RV64IMZBS-NEXT: slli a1, a1, 24 |
| ; RV64IMZBS-NEXT: or s1, a1, a0 |
| ; RV64IMZBS-NEXT: slli s2, s0, 56 |
| ; RV64IMZBS-NEXT: srli a0, a4, 24 |
| ; RV64IMZBS-NEXT: srli a1, a4, 8 |
| ; RV64IMZBS-NEXT: and a0, a0, s9 |
| ; RV64IMZBS-NEXT: and a1, a1, s10 |
| ; RV64IMZBS-NEXT: or a0, a1, a0 |
| ; RV64IMZBS-NEXT: srli a1, a4, 40 |
| ; RV64IMZBS-NEXT: and a1, a1, a7 |
| ; RV64IMZBS-NEXT: srli a2, a4, 56 |
| ; RV64IMZBS-NEXT: or a1, a1, a2 |
| ; RV64IMZBS-NEXT: and a2, a4, s9 |
| ; RV64IMZBS-NEXT: slli a2, a2, 24 |
| ; RV64IMZBS-NEXT: srliw a3, a4, 24 |
| ; RV64IMZBS-NEXT: slli a3, a3, 32 |
| ; RV64IMZBS-NEXT: and s3, a4, a7 |
| ; RV64IMZBS-NEXT: slli s3, s3, 40 |
| ; RV64IMZBS-NEXT: slli a4, a4, 56 |
| ; RV64IMZBS-NEXT: or a2, a2, a3 |
| ; RV64IMZBS-NEXT: or a3, a4, s3 |
| ; RV64IMZBS-NEXT: or a0, a0, a1 |
| ; RV64IMZBS-NEXT: or a2, a3, a2 |
| ; RV64IMZBS-NEXT: and a1, s0, a7 |
| ; RV64IMZBS-NEXT: or a0, a2, a0 |
| ; RV64IMZBS-NEXT: srli a2, a0, 4 |
| ; RV64IMZBS-NEXT: and a0, a0, a5 |
| ; RV64IMZBS-NEXT: and a2, a2, a5 |
| ; RV64IMZBS-NEXT: slli a0, a0, 4 |
| ; RV64IMZBS-NEXT: slli a1, a1, 40 |
| ; RV64IMZBS-NEXT: or a0, a2, a0 |
| ; RV64IMZBS-NEXT: srli a2, a0, 2 |
| ; RV64IMZBS-NEXT: and a0, a0, t1 |
| ; RV64IMZBS-NEXT: and a2, a2, t1 |
| ; RV64IMZBS-NEXT: slli a0, a0, 2 |
| ; RV64IMZBS-NEXT: or a1, s2, a1 |
| ; RV64IMZBS-NEXT: or a0, a2, a0 |
| ; RV64IMZBS-NEXT: or a1, a1, s1 |
| ; RV64IMZBS-NEXT: srli a2, a0, 1 |
| ; RV64IMZBS-NEXT: srli a3, a6, 24 |
| ; RV64IMZBS-NEXT: srli a4, a6, 8 |
| ; RV64IMZBS-NEXT: and a3, a3, s9 |
| ; RV64IMZBS-NEXT: and a4, a4, s10 |
| ; RV64IMZBS-NEXT: or a3, a4, a3 |
| ; RV64IMZBS-NEXT: srli a4, a6, 40 |
| ; RV64IMZBS-NEXT: and a4, a4, a7 |
| ; RV64IMZBS-NEXT: srli s0, a6, 56 |
| ; RV64IMZBS-NEXT: or a4, a4, s0 |
| ; RV64IMZBS-NEXT: and s0, a6, s9 |
| ; RV64IMZBS-NEXT: slli s0, s0, 24 |
| ; RV64IMZBS-NEXT: srliw s1, a6, 24 |
| ; RV64IMZBS-NEXT: slli s1, s1, 32 |
| ; RV64IMZBS-NEXT: and s2, a6, a7 |
| ; RV64IMZBS-NEXT: slli s2, s2, 40 |
| ; RV64IMZBS-NEXT: slli a6, a6, 56 |
| ; RV64IMZBS-NEXT: or s0, s0, s1 |
| ; RV64IMZBS-NEXT: or a6, a6, s2 |
| ; RV64IMZBS-NEXT: or a3, a3, a4 |
| ; RV64IMZBS-NEXT: or a4, a6, s0 |
| ; RV64IMZBS-NEXT: and a2, a2, t2 |
| ; RV64IMZBS-NEXT: or a3, a4, a3 |
| ; RV64IMZBS-NEXT: srli a4, a3, 4 |
| ; RV64IMZBS-NEXT: and a3, a3, a5 |
| ; RV64IMZBS-NEXT: and a4, a4, a5 |
| ; RV64IMZBS-NEXT: slli a3, a3, 4 |
| ; RV64IMZBS-NEXT: and a0, a0, t2 |
| ; RV64IMZBS-NEXT: or a3, a4, a3 |
| ; RV64IMZBS-NEXT: srli a4, a3, 2 |
| ; RV64IMZBS-NEXT: and a3, a3, t1 |
| ; RV64IMZBS-NEXT: and a4, a4, t1 |
| ; RV64IMZBS-NEXT: slli a3, a3, 2 |
| ; RV64IMZBS-NEXT: slli a0, a0, 1 |
| ; RV64IMZBS-NEXT: or a3, a4, a3 |
| ; RV64IMZBS-NEXT: srli a4, a3, 1 |
| ; RV64IMZBS-NEXT: and a3, a3, t2 |
| ; RV64IMZBS-NEXT: and a4, a4, t2 |
| ; RV64IMZBS-NEXT: slli a3, a3, 1 |
| ; RV64IMZBS-NEXT: or a0, a2, a0 |
| ; RV64IMZBS-NEXT: or a3, a4, a3 |
| ; RV64IMZBS-NEXT: and a2, a0, t0 |
| ; RV64IMZBS-NEXT: and a4, a3, t3 |
| ; RV64IMZBS-NEXT: and a6, a0, t3 |
| ; RV64IMZBS-NEXT: and s0, a3, t0 |
| ; RV64IMZBS-NEXT: mul s1, a4, a2 |
| ; RV64IMZBS-NEXT: mul s2, s0, a6 |
| ; RV64IMZBS-NEXT: and s3, a0, t4 |
| ; RV64IMZBS-NEXT: and s4, a3, t5 |
| ; RV64IMZBS-NEXT: and a0, a0, t5 |
| ; RV64IMZBS-NEXT: and a3, a3, t4 |
| ; RV64IMZBS-NEXT: mul s5, s4, s3 |
| ; RV64IMZBS-NEXT: mul s6, a3, a0 |
| ; RV64IMZBS-NEXT: mul s7, a4, s3 |
| ; RV64IMZBS-NEXT: mul s8, s0, a2 |
| ; RV64IMZBS-NEXT: or a1, a1, t6 |
| ; RV64IMZBS-NEXT: srli t6, a1, 4 |
| ; RV64IMZBS-NEXT: and a1, a1, a5 |
| ; RV64IMZBS-NEXT: and t6, t6, a5 |
| ; RV64IMZBS-NEXT: slli a1, a1, 4 |
| ; RV64IMZBS-NEXT: or a1, t6, a1 |
| ; RV64IMZBS-NEXT: xor t6, s2, s1 |
| ; RV64IMZBS-NEXT: mul s1, s4, a0 |
| ; RV64IMZBS-NEXT: mul s2, a3, a6 |
| ; RV64IMZBS-NEXT: xor s5, s5, s6 |
| ; RV64IMZBS-NEXT: xor s6, s8, s7 |
| ; RV64IMZBS-NEXT: mul s7, a4, a6 |
| ; RV64IMZBS-NEXT: mul s8, s0, a0 |
| ; RV64IMZBS-NEXT: mul a0, a4, a0 |
| ; RV64IMZBS-NEXT: mul a4, s4, a2 |
| ; RV64IMZBS-NEXT: mul s0, s0, s3 |
| ; RV64IMZBS-NEXT: mul s3, a3, s3 |
| ; RV64IMZBS-NEXT: mul a6, s4, a6 |
| ; RV64IMZBS-NEXT: mul a2, a3, a2 |
| ; RV64IMZBS-NEXT: xor a3, s1, s2 |
| ; RV64IMZBS-NEXT: srli s1, a1, 2 |
| ; RV64IMZBS-NEXT: and s1, s1, t1 |
| ; RV64IMZBS-NEXT: and a1, a1, t1 |
| ; RV64IMZBS-NEXT: xor t6, t6, s5 |
| ; RV64IMZBS-NEXT: xor a3, s6, a3 |
| ; RV64IMZBS-NEXT: and t3, t6, t3 |
| ; RV64IMZBS-NEXT: and a3, a3, t0 |
| ; RV64IMZBS-NEXT: xor t0, s8, s7 |
| ; RV64IMZBS-NEXT: xor a4, a4, s3 |
| ; RV64IMZBS-NEXT: xor a0, s0, a0 |
| ; RV64IMZBS-NEXT: xor a2, a6, a2 |
| ; RV64IMZBS-NEXT: xor a4, t0, a4 |
| ; RV64IMZBS-NEXT: xor a0, a0, a2 |
| ; RV64IMZBS-NEXT: and a2, a4, t5 |
| ; RV64IMZBS-NEXT: and a0, a0, t4 |
| ; RV64IMZBS-NEXT: or a3, a3, t3 |
| ; RV64IMZBS-NEXT: or a0, a2, a0 |
| ; RV64IMZBS-NEXT: slli a1, a1, 2 |
| ; RV64IMZBS-NEXT: or a0, a3, a0 |
| ; RV64IMZBS-NEXT: or a1, s1, a1 |
| ; RV64IMZBS-NEXT: srli a2, a0, 40 |
| ; RV64IMZBS-NEXT: and a2, a2, a7 |
| ; RV64IMZBS-NEXT: srli a3, a0, 56 |
| ; RV64IMZBS-NEXT: srli a4, a1, 1 |
| ; RV64IMZBS-NEXT: or a2, a2, a3 |
| ; RV64IMZBS-NEXT: srli a3, a0, 24 |
| ; RV64IMZBS-NEXT: srli a6, a0, 8 |
| ; RV64IMZBS-NEXT: and a3, a3, s9 |
| ; RV64IMZBS-NEXT: and a6, a6, s10 |
| ; RV64IMZBS-NEXT: or a3, a6, a3 |
| ; RV64IMZBS-NEXT: srliw a6, a0, 24 |
| ; RV64IMZBS-NEXT: slli a6, a6, 32 |
| ; RV64IMZBS-NEXT: and t0, a0, s9 |
| ; RV64IMZBS-NEXT: slli t0, t0, 24 |
| ; RV64IMZBS-NEXT: and a7, a0, a7 |
| ; RV64IMZBS-NEXT: slli a0, a0, 56 |
| ; RV64IMZBS-NEXT: slli a7, a7, 40 |
| ; RV64IMZBS-NEXT: or a6, t0, a6 |
| ; RV64IMZBS-NEXT: or a0, a0, a7 |
| ; RV64IMZBS-NEXT: or a2, a3, a2 |
| ; RV64IMZBS-NEXT: or a0, a0, a6 |
| ; RV64IMZBS-NEXT: and a3, a4, t2 |
| ; RV64IMZBS-NEXT: or a0, a0, a2 |
| ; RV64IMZBS-NEXT: srli a2, a0, 4 |
| ; RV64IMZBS-NEXT: and a0, a0, a5 |
| ; RV64IMZBS-NEXT: and a2, a2, a5 |
| ; RV64IMZBS-NEXT: slli a0, a0, 4 |
| ; RV64IMZBS-NEXT: and a1, a1, t2 |
| ; RV64IMZBS-NEXT: or a0, a2, a0 |
| ; RV64IMZBS-NEXT: srli a2, a0, 2 |
| ; RV64IMZBS-NEXT: and a0, a0, t1 |
| ; RV64IMZBS-NEXT: and a2, a2, t1 |
| ; RV64IMZBS-NEXT: slli a0, a0, 2 |
| ; RV64IMZBS-NEXT: slli a1, a1, 1 |
| ; RV64IMZBS-NEXT: or a0, a2, a0 |
| ; RV64IMZBS-NEXT: srli a2, a0, 1 |
| ; RV64IMZBS-NEXT: and a0, a0, t2 |
| ; RV64IMZBS-NEXT: and a2, a2, t2 |
| ; RV64IMZBS-NEXT: slli a0, a0, 1 |
| ; RV64IMZBS-NEXT: or a1, a3, a1 |
| ; RV64IMZBS-NEXT: or a0, a2, a0 |
| ; RV64IMZBS-NEXT: srli a1, a1, 1 |
| ; RV64IMZBS-NEXT: srli a0, a0, 1 |
| ; RV64IMZBS-NEXT: ld a2, 8(sp) # 8-byte Folded Reload |
| ; RV64IMZBS-NEXT: sd a1, 0(a2) |
| ; RV64IMZBS-NEXT: sd a0, 8(a2) |
| ; RV64IMZBS-NEXT: ld a2, 16(sp) # 8-byte Folded Reload |
| ; RV64IMZBS-NEXT: sd a1, 0(a2) |
| ; RV64IMZBS-NEXT: sd a0, 8(a2) |
| ; RV64IMZBS-NEXT: ld ra, 120(sp) # 8-byte Folded Reload |
| ; RV64IMZBS-NEXT: ld s0, 112(sp) # 8-byte Folded Reload |
| ; RV64IMZBS-NEXT: ld s1, 104(sp) # 8-byte Folded Reload |
| ; RV64IMZBS-NEXT: ld s2, 96(sp) # 8-byte Folded Reload |
| ; RV64IMZBS-NEXT: ld s3, 88(sp) # 8-byte Folded Reload |
| ; RV64IMZBS-NEXT: ld s4, 80(sp) # 8-byte Folded Reload |
| ; RV64IMZBS-NEXT: ld s5, 72(sp) # 8-byte Folded Reload |
| ; RV64IMZBS-NEXT: ld s6, 64(sp) # 8-byte Folded Reload |
| ; RV64IMZBS-NEXT: ld s7, 56(sp) # 8-byte Folded Reload |
| ; RV64IMZBS-NEXT: ld s8, 48(sp) # 8-byte Folded Reload |
| ; RV64IMZBS-NEXT: ld s9, 40(sp) # 8-byte Folded Reload |
| ; RV64IMZBS-NEXT: ld s10, 32(sp) # 8-byte Folded Reload |
| ; RV64IMZBS-NEXT: ld s11, 24(sp) # 8-byte Folded Reload |
| ; RV64IMZBS-NEXT: addi sp, sp, 128 |
| ; RV64IMZBS-NEXT: ret |
| %x.ext = zext <2 x i64> %x to <2 x i128> |
| %y.ext = zext <2 x i64> %y to <2 x i128> |
| %clmul_xy = call <2 x i128> @llvm.clmul.v2i128(<2 x i128> %x.ext, <2 x i128> %y.ext) |
| %clmul_yx = call <2 x i128> @llvm.clmul.v2i128(<2 x i128> %y.ext, <2 x i128> %x.ext) |
| %clmul_xy_lshr = lshr <2 x i128> %clmul_xy, splat (i128 64) |
| %clmul_yx_lshr = lshr <2 x i128> %clmul_yx, splat (i128 64) |
| %clmulh_xy = trunc <2 x i128> %clmul_xy_lshr to <2 x i64> |
| %clmulh_yx = trunc <2 x i128> %clmul_yx_lshr to <2 x i64> |
| store <2 x i64> %clmulh_xy, ptr %p0 |
| store <2 x i64> %clmulh_yx, ptr %p1 |
| ret void |
| } |
| ;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: |
| ; CHECK: {{.*}} |
| ; CHECK-M: {{.*}} |
| ; CHECK-ZBS: {{.*}} |