llvm/test/CodeGen/CSKY/powi.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple=csky < %s | FileCheck %s

declare float @llvm.powi.f32.i32(float, i32)
declare double @llvm.powi.f64.i32(double, i32)

define float @powi_f32(float %a, i32 %b) {
; CHECK-LABEL: powi_f32:
; CHECK:       # %bb.0:
; CHECK-NEXT:    subi16 sp, sp, 4
; CHECK-NEXT:    .cfi_def_cfa_offset 4
; CHECK-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
; CHECK-NEXT:    .cfi_offset lr, -4
; CHECK-NEXT:    subi16 sp, sp, 4
; CHECK-NEXT:    .cfi_def_cfa_offset 8
; CHECK-NEXT:    lrw a2, [.LCPI0_0]
; CHECK-NEXT:    jsr16 a2
; CHECK-NEXT:    addi16 sp, sp, 4
; CHECK-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
; CHECK-NEXT:    addi16 sp, sp, 4
; CHECK-NEXT:    rts16
; CHECK-NEXT:    .p2align 1
; CHECK-NEXT:  # %bb.1:
; CHECK-NEXT:    .p2align 2, 0x0
; CHECK-NEXT:  .LCPI0_0:
; CHECK-NEXT:    .long __powisf2
  %r = call float @llvm.powi.f32.i32(float %a, i32 %b)
  ret float %r
}

define double @powi_f64(double %a, i32 %b) {
; CHECK-LABEL: powi_f64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    subi16 sp, sp, 4
; CHECK-NEXT:    .cfi_def_cfa_offset 4
; CHECK-NEXT:    st32.w lr, (sp, 0) # 4-byte Folded Spill
; CHECK-NEXT:    .cfi_offset lr, -4
; CHECK-NEXT:    subi16 sp, sp, 4
; CHECK-NEXT:    .cfi_def_cfa_offset 8
; CHECK-NEXT:    lrw a3, [.LCPI1_0]
; CHECK-NEXT:    jsr16 a3
; CHECK-NEXT:    addi16 sp, sp, 4
; CHECK-NEXT:    ld32.w lr, (sp, 0) # 4-byte Folded Reload
; CHECK-NEXT:    addi16 sp, sp, 4
; CHECK-NEXT:    rts16
; CHECK-NEXT:    .p2align 1
; CHECK-NEXT:  # %bb.1:
; CHECK-NEXT:    .p2align 2, 0x0
; CHECK-NEXT:  .LCPI1_0:
; CHECK-NEXT:    .long __powidf2
  %r = call double @llvm.powi.f64.i32(double %a, i32 %b)
  ret double %r
}