llvm/test/CodeGen/AMDGPU/eliminate-frame-index-select.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -mtriple=amdgpu10.30 -verify-machineinstrs -run-pass prolog-epilog -o - %s | FileCheck %s
# s_cselect_b32 does not allow vreg & should use the sreg frameindex generated
# by v_readfirstlane_b32 in eliminateFrameIndex.
---
name:            test_s_cselect_b32
tracksRegLiveness: true
stack:
  - { id: 0, size: 12}
machineFunctionInfo:
  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
  frameOffsetReg:  '$sgpr33'
  stackPtrOffsetReg: '$sgpr32'
body:             |
  ; CHECK-LABEL: name: test_s_cselect_b32
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x80000000)
  ; CHECK-NEXT:   liveins: $vgpr41
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION undefined $sgpr4
  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION undefined $sgpr5
  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION undefined $sgpr6
  ; CHECK-NEXT:   BUFFER_STORE_DWORD_OFFSET killed $vgpr41, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: ("amdgpu-thread-private" store (s32) into %stack.1, addrspace 5)
  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION llvm_vector_offset $vgpr41, 32, $exec_lo, 32, 0
  ; CHECK-NEXT:   renamable $vgpr41 = V_MOV_B32_e32 0, implicit $exec
  ; CHECK-NEXT:   renamable $sgpr4 = S_MOV_B32 0
  ; CHECK-NEXT:   renamable $sgpr5 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
  ; CHECK-NEXT:   renamable $sgpr54 = S_ADD_I32 $sgpr5, 8, implicit-def dead $scc
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
  ; CHECK-NEXT:   liveins: $sgpr4, $sgpr54:0x000000000000000F
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   S_CMP_EQ_U32 killed renamable $sgpr4, 0, implicit-def $scc
  ; CHECK-NEXT:   $vgpr0 = V_LSHRREV_B32_e64 5, $sgpr32, implicit $exec
  ; CHECK-NEXT:   $vgpr0 = V_ADD_U32_e32 4, killed $vgpr0, implicit $exec
  ; CHECK-NEXT:   $sgpr5 = V_READFIRSTLANE_B32 $vgpr0, implicit $exec
  ; CHECK-NEXT:   renamable $sgpr4 = S_CSELECT_B32 0, killed $sgpr5, implicit $scc
  ; CHECK-NEXT:   $vgpr0 = V_LSHRREV_B32_e64 5, $sgpr32, implicit $exec
  ; CHECK-NEXT:   $vgpr0 = V_ADD_U32_e32 4, killed $vgpr0, implicit $exec
  ; CHECK-NEXT:   $sgpr4 = V_READFIRSTLANE_B32 $vgpr0, implicit $exec
  ; CHECK-NEXT:   renamable $sgpr6 = S_CSELECT_B32 killed $sgpr4, 0, implicit $scc
  ; CHECK-NEXT:   renamable $sgpr5 = S_CSELECT_B32 4, renamable $sgpr54, implicit $scc
  ; CHECK-NEXT:   S_BRANCH %bb.2
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   $vgpr41 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: ("amdgpu-thread-private" load (s32) from %stack.1, addrspace 5)
  ; CHECK-NEXT:   SI_RETURN
  bb.0:
    renamable $vgpr41 = V_MOV_B32_e32 0, implicit $exec
    renamable $sgpr4 = S_MOV_B32 0
    renamable $sgpr54 = S_ADD_I32 %stack.0, 4, implicit-def dead $scc
  bb.1:
    liveins: $sgpr4, $sgpr54:0x000000000000000F
    S_CMP_EQ_U32 killed renamable $sgpr4, 0, implicit-def $scc
    renamable $sgpr4 = S_CSELECT_B32 0, %stack.0, implicit $scc
    renamable $sgpr6 = S_CSELECT_B32 %stack.0, 0, implicit $scc
    renamable $sgpr5 = S_CSELECT_B32 4, renamable $sgpr54, implicit $scc
    S_BRANCH %bb.2
  bb.2:
    SI_RETURN
...
# ensure register constraints of V_CNDMASK_B32_e32 are respected by
# eliminateFrameIndex.
---
name:            test_v_cndmask_e32
tracksRegLiveness: true
stack:
  - { id: 0, size: 12}
machineFunctionInfo:
  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
  frameOffsetReg:  '$sgpr33'
  stackPtrOffsetReg: '$sgpr32'
body:             |
  bb.0:
    liveins: $sgpr4
    ; CHECK-LABEL: name: test_v_cndmask_e32
    ; CHECK: liveins: $sgpr4
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
    ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
    ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
    ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
    ; CHECK-NEXT: $vcc_lo = V_CMP_EQ_U32_e64 killed $sgpr4, 0, implicit $exec
    ; CHECK-NEXT: renamable $vgpr2 = V_MOV_B32_e32 0, implicit $exec
    ; CHECK-NEXT: $vgpr1 = V_LSHRREV_B32_e64 5, $sgpr32, implicit $exec
    ; CHECK-NEXT: renamable $vgpr0 = V_CNDMASK_B32_e32 killed $vgpr1, killed $vgpr2, implicit $vcc_lo, implicit $vcc_lo, implicit $exec
    ; CHECK-NEXT: SI_RETURN
    V_CMP_EQ_U32_e64 def $vcc_lo, killed $sgpr4, 0, implicit $exec
    renamable $vgpr2 = V_MOV_B32_e32 0, implicit $exec
    renamable $vgpr0 = V_CNDMASK_B32_e32 %stack.0, killed $vgpr2, implicit $vcc_lo, implicit $vcc, implicit $exec
    SI_RETURN
...
# ensure register constraints of V_CNDMASK_B32_e64 are respected by
# eliminateFrameIndex.
---
name:            test_v_cndmask_e64
tracksRegLiveness: true
stack:
  - { id: 0, size: 12}
machineFunctionInfo:
  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
  frameOffsetReg:  '$sgpr33'
  stackPtrOffsetReg: '$sgpr32'
body:             |
  bb.0:
    liveins: $sgpr4
    ; CHECK-LABEL: name: test_v_cndmask_e64
    ; CHECK: liveins: $sgpr4
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
    ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
    ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
    ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
    ; CHECK-NEXT: renamable $vgpr2 = V_MOV_B32_e32 0, implicit $exec
    ; CHECK-NEXT: $vgpr1 = V_LSHRREV_B32_e64 5, $sgpr32, implicit $exec
    ; CHECK-NEXT: renamable $vgpr0 = V_CNDMASK_B32_e64 0, killed $vgpr1, 0, killed $vgpr2, $sgpr4, implicit $exec
    ; CHECK-NEXT: SI_RETURN
    renamable $vgpr2 = V_MOV_B32_e32 0, implicit $exec
    renamable $vgpr0 = V_CNDMASK_B32_e64 0, %stack.0, 0, killed $vgpr2, $sgpr4, implicit $exec
    SI_RETURN
...