llvm/test/CodeGen/AArch64/avoid-ld4.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple=arm64-apple-macosx -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-IAENABLED
; RUN: llc -mtriple=arm64-apple-macosx --lower-interleaved-accesses=false -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-IADISABLED

define <8 x double> @uitofp_load_fadd_intrinsic(ptr %p) {
; CHECK-LABEL: uitofp_load_fadd_intrinsic:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    ld4.8h { v0, v1, v2, v3 }, [x0]
; CHECK-NEXT:    ushll2.4s v4, v0, #0
; CHECK-NEXT:    ushll.4s v5, v0, #0
; CHECK-NEXT:    ushll2.4s v6, v1, #0
; CHECK-NEXT:    ushll.4s v7, v1, #0
; CHECK-NEXT:    ushll2.4s v16, v2, #0
; CHECK-NEXT:    ushll.4s v17, v2, #0
; CHECK-NEXT:    ushll2.4s v18, v3, #0
; CHECK-NEXT:    ushll.4s v0, v3, #0
; CHECK-NEXT:    ushll2.2d v1, v4, #0
; CHECK-NEXT:    ushll2.2d v2, v5, #0
; CHECK-NEXT:    ushll.2d v3, v4, #0
; CHECK-NEXT:    ushll.2d v4, v5, #0
; CHECK-NEXT:    ushll2.2d v5, v6, #0
; CHECK-NEXT:    ushll2.2d v19, v7, #0
; CHECK-NEXT:    ushll.2d v6, v6, #0
; CHECK-NEXT:    ushll.2d v7, v7, #0
; CHECK-NEXT:    ushll2.2d v20, v16, #0
; CHECK-NEXT:    ushll2.2d v21, v17, #0
; CHECK-NEXT:    ushll.2d v16, v16, #0
; CHECK-NEXT:    ushll.2d v17, v17, #0
; CHECK-NEXT:    ushll.2d v22, v0, #0
; CHECK-NEXT:    ushll2.2d v23, v18, #0
; CHECK-NEXT:    ushll2.2d v0, v0, #0
; CHECK-NEXT:    ushll.2d v18, v18, #0
; CHECK-NEXT:    ucvtf.2d v1, v1
; CHECK-NEXT:    ucvtf.2d v2, v2
; CHECK-NEXT:    ucvtf.2d v3, v3
; CHECK-NEXT:    ucvtf.2d v4, v4
; CHECK-NEXT:    ucvtf.2d v5, v5
; CHECK-NEXT:    ucvtf.2d v19, v19
; CHECK-NEXT:    ucvtf.2d v6, v6
; CHECK-NEXT:    ucvtf.2d v7, v7
; CHECK-NEXT:    ucvtf.2d v20, v20
; CHECK-NEXT:    ucvtf.2d v21, v21
; CHECK-NEXT:    ucvtf.2d v16, v16
; CHECK-NEXT:    ucvtf.2d v17, v17
; CHECK-NEXT:    ucvtf.2d v22, v22
; CHECK-NEXT:    ucvtf.2d v23, v23
; CHECK-NEXT:    ucvtf.2d v0, v0
; CHECK-NEXT:    ucvtf.2d v18, v18
; CHECK-NEXT:    fadd.2d v1, v1, v5
; CHECK-NEXT:    fadd.2d v4, v4, v7
; CHECK-NEXT:    fadd.2d v6, v3, v6
; CHECK-NEXT:    fadd.2d v2, v2, v19
; CHECK-NEXT:    fadd.2d v3, v17, v22
; CHECK-NEXT:    fadd.2d v5, v16, v18
; CHECK-NEXT:    fadd.2d v7, v21, v0
; CHECK-NEXT:    fadd.2d v16, v20, v23
; CHECK-NEXT:    fadd.2d v0, v4, v3
; CHECK-NEXT:    fadd.2d v3, v1, v16
; CHECK-NEXT:    fadd.2d v1, v2, v7
; CHECK-NEXT:    fadd.2d v2, v6, v5
; CHECK-NEXT:    ret
    %l = load <32 x i16>, ptr %p
    %deinterleaved = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.vector.deinterleave4.v32i16(<32 x i16> %l)
    %s1 = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } %deinterleaved, 0
    %z1 = uitofp <8 x i16> %s1 to <8 x double>
    %s2 = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } %deinterleaved, 1
    %z2 = uitofp <8 x i16> %s2 to <8 x double>
    %s3 = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } %deinterleaved, 2
    %z3 = uitofp <8 x i16> %s3 to <8 x double>
    %s4 = extractvalue { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } %deinterleaved, 3
    %z4 = uitofp <8 x i16> %s4 to <8 x double>
    %a = fadd <8 x double> %z1, %z2
    %b = fadd <8 x double> %z3, %z4
    %c = fadd <8 x double> %a, %b
    ret <8 x double> %c
}
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; CHECK-IADISABLED: {{.*}}
; CHECK-IAENABLED: {{.*}}