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llvm/llvm-project/refs/heads/users/cdevadas/make-getNumSubRegsForSpillOp-member-function/./llvm/test/CodeGen/AArch64/atomic-ops-lse.ll
blob: ac64495138175f3ffd0ce131ad9f5393a594da65 [file] [edit]
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple=aarch64-none-linux-gnu -disable-post-ra -verify-machineinstrs -mattr=+lse -aarch64-enable-sink-fold=true < %s | FileCheck %s
; RUN: llc -mtriple=aarch64-none-linux-gnu -disable-post-ra -verify-machineinstrs -mattr=+lse -mattr=+outline-atomics -aarch64-enable-sink-fold=true < %s | FileCheck %s
; RUN: llc -mtriple=aarch64-none-linux-gnu -disable-post-ra -verify-machineinstrs -mattr=+outline-atomics -aarch64-enable-sink-fold=true < %s | FileCheck %s --check-prefix=OUTLINE-ATOMICS
; RUN: llc -mtriple=aarch64_be-none-linux-gnu -disable-post-ra -verify-machineinstrs -mattr=+lse -aarch64-enable-sink-fold=true < %s | FileCheck %s
; RUN: llc -mtriple=aarch64-none-linux-gnu -disable-post-ra -verify-machineinstrs -mattr=+lse -aarch64-enable-sink-fold=true < %s | FileCheck %s --check-prefix="CHECK-REG" --allow-unused-prefixes --implicit-check-not="stlxrb {{w|x}}[[NEW:[0-9]+]], {{w|x}}[[NEW:[0-9]+]]], [x{{[0-9]+}}]"
; Point of implicit-check-not is to make sure UNPREDICTABLE instructions aren't created
; (i.e. reusing a register for status & data in store exclusive).
; CHECK-REG: {{.*}}
; RUN: llc -mtriple=aarch64-windows-pc-msvc -disable-post-ra -verify-machineinstrs \
; RUN: -mattr=+lse -aarch64-enable-sink-fold=true < %s | FileCheck %s --implicit-check-not="dmb"
; RUN: llc -mtriple=aarch64-windows-pc-msvc -disable-post-ra -verify-machineinstrs \
; RUN: -mattr=+lse -mattr=+outline-atomics -aarch64-enable-sink-fold=true < %s | FileCheck %s --implicit-check-not="dmb"
; RUN: llc -mtriple=aarch64-windows-pc-msvc -disable-post-ra -verify-machineinstrs \
; RUN: -mattr=+outline-atomics -aarch64-enable-sink-fold=true < %s | FileCheck %s --check-prefixes=MSVC-OUTLINE-ATOMICS
@var8 = dso_local global i8 0
@var16 = dso_local global i16 0
@var32 = dso_local global i32 0
@var64 = dso_local global i64 0
@var128 = dso_local global i128 0
define dso_local i8 @test_atomic_load_add_i8(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i8:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldaddalb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i8:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i8:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw add ptr @var8, i8 %offset seq_cst
ret i8 %old
}
define dso_local i16 @test_atomic_load_add_i16(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i16:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldaddalh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i16:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i16:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw add ptr @var16, i16 %offset seq_cst
ret i16 %old
}
define dso_local i32 @test_atomic_load_add_i32(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i32:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldaddal w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw add ptr @var32, i32 %offset seq_cst
ret i32 %old
}
define dso_local i64 @test_atomic_load_add_i64(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i64:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldaddal x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw add ptr @var64, i64 %offset seq_cst
ret i64 %old
}
define dso_local void @test_atomic_load_add_i32_noret(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i32_noret:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldaddal w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_noret:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_noret:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw add ptr @var32, i32 %offset seq_cst
ret void
}
define dso_local void @test_atomic_load_add_i64_noret(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i64_noret:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldaddal x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_noret:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_noret:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw add ptr @var64, i64 %offset seq_cst
ret void
}
define dso_local i8 @test_atomic_load_or_i8(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i8:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldsetalb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i8:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset1_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i8:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset1_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw or ptr @var8, i8 %offset seq_cst
ret i8 %old
}
define dso_local i16 @test_atomic_load_or_i16(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i16:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldsetalh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i16:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset2_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i16:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset2_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw or ptr @var16, i16 %offset seq_cst
ret i16 %old
}
define dso_local i32 @test_atomic_load_or_i32(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i32:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsetal w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw or ptr @var32, i32 %offset seq_cst
ret i32 %old
}
define dso_local i64 @test_atomic_load_or_i64(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i64:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsetal x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw or ptr @var64, i64 %offset seq_cst
ret i64 %old
}
define dso_local void @test_atomic_load_or_i32_noret(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i32_noret:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsetal w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_noret:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_noret:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw or ptr @var32, i32 %offset seq_cst
ret void
}
define dso_local void @test_atomic_load_or_i64_noret(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i64_noret:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsetal x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_noret:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_noret:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw or ptr @var64, i64 %offset seq_cst
ret void
}
define dso_local i8 @test_atomic_load_xor_i8(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i8:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldeoralb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i8:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor1_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i8:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor1_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xor ptr @var8, i8 %offset seq_cst
ret i8 %old
}
define dso_local i16 @test_atomic_load_xor_i16(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i16:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldeoralh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i16:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor2_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i16:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor2_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xor ptr @var16, i16 %offset seq_cst
ret i16 %old
}
define dso_local i32 @test_atomic_load_xor_i32(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i32:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldeoral w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xor ptr @var32, i32 %offset seq_cst
ret i32 %old
}
define dso_local i64 @test_atomic_load_xor_i64(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i64:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldeoral x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xor ptr @var64, i64 %offset seq_cst
ret i64 %old
}
define dso_local void @test_atomic_load_xor_i32_noret(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i32_noret:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldeoral w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_noret:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_noret:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw xor ptr @var32, i32 %offset seq_cst
ret void
}
define dso_local void @test_atomic_load_xor_i64_noret(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i64_noret:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldeoral x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_noret:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_noret:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw xor ptr @var64, i64 %offset seq_cst
ret void
}
define dso_local i8 @test_atomic_load_min_i8(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i8:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldsminalb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i8:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var8
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
; OUTLINE-ATOMICS-NEXT: .LBB18_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrb w10, [x9]
; OUTLINE-ATOMICS-NEXT: sxtb w8, w10
; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb
; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le
; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB18_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i8:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB18_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrb w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: sxtb w8, w10
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB18_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw min ptr @var8, i8 %offset seq_cst
ret i8 %old
}
define dso_local i16 @test_atomic_load_min_i16(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i16:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldsminalh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i16:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var16
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
; OUTLINE-ATOMICS-NEXT: .LBB19_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]
; OUTLINE-ATOMICS-NEXT: sxth w8, w10
; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth
; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le
; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB19_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i16:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB19_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: sxth w8, w10
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB19_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw min ptr @var16, i16 %offset seq_cst
ret i16 %old
}
define dso_local i32 @test_atomic_load_min_i32(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i32:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsminal w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var32
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB20_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp w8, w0
; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, le
; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB20_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB20_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB20_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw min ptr @var32, i32 %offset seq_cst
ret i32 %old
}
define dso_local i64 @test_atomic_load_min_i64(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i64:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsminal x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var64
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB21_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp x8, x0
; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, le
; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB21_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov x0, x8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: mov x8, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB21_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x0, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x0, x8
; MSVC-OUTLINE-ATOMICS-NEXT: csel x10, x0, x8, le
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB21_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw min ptr @var64, i64 %offset seq_cst
ret i64 %old
}
define dso_local void @test_atomic_load_min_i32_noret(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i32_noret:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsminal w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_noret:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var32
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB22_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w9, w0
; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, le
; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB22_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_noret:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB22_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w9, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB22_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw min ptr @var32, i32 %offset seq_cst
ret void
}
define dso_local void @test_atomic_load_min_i64_noret(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i64_noret:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsminal x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_noret:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var64
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB23_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp x9, x0
; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, le
; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB23_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_noret:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB23_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x9, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB23_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw min ptr @var64, i64 %offset seq_cst
ret void
}
define dso_local i8 @test_atomic_load_umin_i8(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i8:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: lduminalb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i8:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var8
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var8
; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff
; OUTLINE-ATOMICS-NEXT: .LBB24_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrb w0, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w0, w9
; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls
; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB24_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i8:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB24_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrb w0, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w0, w9
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB24_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umin ptr @var8, i8 %offset seq_cst
ret i8 %old
}
define dso_local i16 @test_atomic_load_umin_i16(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i16:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: lduminalh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i16:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var16
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var16
; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff
; OUTLINE-ATOMICS-NEXT: .LBB25_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrh w0, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w0, w9
; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls
; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB25_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i16:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB25_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrh w0, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w0, w9
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB25_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umin ptr @var16, i16 %offset seq_cst
ret i16 %old
}
define dso_local i32 @test_atomic_load_umin_i32(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i32:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: lduminal w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var32
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB26_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp w8, w0
; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, ls
; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB26_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB26_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB26_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umin ptr @var32, i32 %offset seq_cst
ret i32 %old
}
define dso_local i64 @test_atomic_load_umin_i64(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i64:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: lduminal x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var64
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB27_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp x8, x0
; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, ls
; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB27_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov x0, x8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: mov x8, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB27_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x0, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x0, x8
; MSVC-OUTLINE-ATOMICS-NEXT: csel x10, x0, x8, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB27_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umin ptr @var64, i64 %offset seq_cst
ret i64 %old
}
define dso_local void @test_atomic_load_umin_i32_noret(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i32_noret:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: lduminal w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_noret:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var32
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB28_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w9, w0
; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, ls
; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB28_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_noret:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB28_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w9, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB28_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw umin ptr @var32, i32 %offset seq_cst
ret void
}
define dso_local void @test_atomic_load_umin_i64_noret(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i64_noret:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: lduminal x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_noret:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var64
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB29_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp x9, x0
; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, ls
; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB29_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_noret:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB29_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x9, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB29_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw umin ptr @var64, i64 %offset seq_cst
ret void
}
define dso_local i8 @test_atomic_load_max_i8(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i8:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldsmaxalb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i8:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var8
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
; OUTLINE-ATOMICS-NEXT: .LBB30_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrb w10, [x9]
; OUTLINE-ATOMICS-NEXT: sxtb w8, w10
; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb
; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt
; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB30_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i8:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB30_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrb w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: sxtb w8, w10
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB30_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw max ptr @var8, i8 %offset seq_cst
ret i8 %old
}
define dso_local i16 @test_atomic_load_max_i16(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i16:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldsmaxalh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i16:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var16
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
; OUTLINE-ATOMICS-NEXT: .LBB31_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]
; OUTLINE-ATOMICS-NEXT: sxth w8, w10
; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth
; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt
; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB31_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i16:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB31_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: sxth w8, w10
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB31_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw max ptr @var16, i16 %offset seq_cst
ret i16 %old
}
define dso_local i32 @test_atomic_load_max_i32(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i32:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsmaxal w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var32
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB32_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp w8, w0
; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, gt
; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB32_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB32_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB32_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw max ptr @var32, i32 %offset seq_cst
ret i32 %old
}
define dso_local i64 @test_atomic_load_max_i64(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i64:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsmaxal x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var64
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB33_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp x8, x0
; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, gt
; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB33_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov x0, x8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: mov x8, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB33_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x0, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x0, x8
; MSVC-OUTLINE-ATOMICS-NEXT: csel x10, x0, x8, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB33_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw max ptr @var64, i64 %offset seq_cst
ret i64 %old
}
define dso_local void @test_atomic_load_max_i32_noret(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i32_noret:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsmaxal w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_noret:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var32
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB34_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w9, w0
; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, gt
; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB34_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_noret:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB34_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w9, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB34_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw max ptr @var32, i32 %offset seq_cst
ret void
}
define dso_local void @test_atomic_load_max_i64_noret(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i64_noret:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsmaxal x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_noret:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var64
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB35_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp x9, x0
; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, gt
; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB35_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_noret:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB35_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x9, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB35_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw max ptr @var64, i64 %offset seq_cst
ret void
}
define dso_local i8 @test_atomic_load_umax_i8(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i8:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldumaxalb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i8:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var8
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var8
; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff
; OUTLINE-ATOMICS-NEXT: .LBB36_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrb w0, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w0, w9
; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi
; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB36_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i8:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB36_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrb w0, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w0, w9
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB36_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umax ptr @var8, i8 %offset seq_cst
ret i8 %old
}
define dso_local i16 @test_atomic_load_umax_i16(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i16:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldumaxalh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i16:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var16
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var16
; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff
; OUTLINE-ATOMICS-NEXT: .LBB37_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrh w0, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w0, w9
; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi
; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB37_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i16:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB37_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrh w0, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w0, w9
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB37_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umax ptr @var16, i16 %offset seq_cst
ret i16 %old
}
define dso_local i32 @test_atomic_load_umax_i32(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i32:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldumaxal w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var32
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB38_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp w8, w0
; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, hi
; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB38_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB38_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB38_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umax ptr @var32, i32 %offset seq_cst
ret i32 %old
}
define dso_local i64 @test_atomic_load_umax_i64(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i64:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldumaxal x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var64
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB39_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp x8, x0
; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, hi
; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB39_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov x0, x8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: mov x8, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB39_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x0, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x0, x8
; MSVC-OUTLINE-ATOMICS-NEXT: csel x10, x0, x8, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB39_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umax ptr @var64, i64 %offset seq_cst
ret i64 %old
}
define dso_local void @test_atomic_load_umax_i32_noret(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i32_noret:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldumaxal w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_noret:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var32
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB40_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w9, w0
; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, hi
; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB40_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_noret:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB40_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w9, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB40_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw umax ptr @var32, i32 %offset seq_cst
ret void
}
define dso_local void @test_atomic_load_umax_i64_noret(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i64_noret:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldumaxal x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_noret:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var64
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB41_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp x9, x0
; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, hi
; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB41_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_noret:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB41_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x9, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB41_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw umax ptr @var64, i64 %offset seq_cst
ret void
}
define dso_local i8 @test_atomic_load_xchg_i8(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i8:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: swpalb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i8:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp1_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i8:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp1_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xchg ptr @var8, i8 %offset seq_cst
ret i8 %old
}
define dso_local i16 @test_atomic_load_xchg_i16(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i16:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: swpalh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i16:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp2_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i16:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp2_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xchg ptr @var16, i16 %offset seq_cst
ret i16 %old
}
define dso_local i32 @test_atomic_load_xchg_i32(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i32:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: swpal w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xchg ptr @var32, i32 %offset seq_cst
ret i32 %old
}
define dso_local i64 @test_atomic_load_xchg_i64(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i64:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: swpal x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xchg ptr @var64, i64 %offset seq_cst
ret i64 %old
}
define dso_local void @test_atomic_load_xchg_i32_noret(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i32_noret:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: swpal w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_noret:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_noret:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw xchg ptr @var32, i32 %offset seq_cst
ret void
}
define dso_local void @test_atomic_load_xchg_i64_noret(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i64_noret:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: swpal x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_noret:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_noret:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw xchg ptr @var64, i64 %offset seq_cst
ret void
}
define dso_local i8 @test_atomic_cmpxchg_i8(i8 %wanted, i8 %new) nounwind {
; CHECK-LABEL: test_atomic_cmpxchg_i8:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: casab w0, w1, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i8:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x2, var8
; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas1_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i8:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x2, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_cas1_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%pair = cmpxchg ptr @var8, i8 %wanted, i8 %new acquire acquire
%old = extractvalue { i8, i1 } %pair, 0
ret i8 %old
}
define dso_local i1 @test_atomic_cmpxchg_i8_1(i8 %wanted, i8 %new) nounwind {
; CHECK-LABEL: test_atomic_cmpxchg_i8_1:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, w0
; CHECK-NEXT: adrp x9, var8
; CHECK-NEXT: add x9, x9, :lo12:var8
; CHECK-NEXT: casab w8, w1, [x9]
; CHECK-NEXT: cmp w8, w0, uxtb
; CHECK-NEXT: cset w0, eq
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i8_1:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: mov w19, w0
; OUTLINE-ATOMICS-NEXT: adrp x2, var8
; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas1_acq
; OUTLINE-ATOMICS-NEXT: cmp w0, w19, uxtb
; OUTLINE-ATOMICS-NEXT: cset w0, eq
; OUTLINE-ATOMICS-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i8_1:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: stp x19, x30, [sp, #-16]! // 16-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: mov w19, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x2, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_cas1_acq
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w0, w19, uxtb
; MSVC-OUTLINE-ATOMICS-NEXT: cset w0, eq
; MSVC-OUTLINE-ATOMICS-NEXT: ldp x19, x30, [sp], #16 // 16-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%pair = cmpxchg ptr @var8, i8 %wanted, i8 %new acquire acquire
%success = extractvalue { i8, i1 } %pair, 1
ret i1 %success
}
define dso_local i16 @test_atomic_cmpxchg_i16(i16 %wanted, i16 %new) nounwind {
; CHECK-LABEL: test_atomic_cmpxchg_i16:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: casah w0, w1, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i16:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x2, var16
; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas2_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i16:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x2, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_cas2_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%pair = cmpxchg ptr @var16, i16 %wanted, i16 %new acquire acquire
%old = extractvalue { i16, i1 } %pair, 0
ret i16 %old
}
define dso_local i1 @test_atomic_cmpxchg_i16_1(i16 %wanted, i16 %new) nounwind {
; CHECK-LABEL: test_atomic_cmpxchg_i16_1:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, w0
; CHECK-NEXT: adrp x9, var16
; CHECK-NEXT: add x9, x9, :lo12:var16
; CHECK-NEXT: casah w8, w1, [x9]
; CHECK-NEXT: cmp w8, w0, uxth
; CHECK-NEXT: cset w0, eq
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i16_1:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: mov w19, w0
; OUTLINE-ATOMICS-NEXT: adrp x2, var16
; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas2_acq
; OUTLINE-ATOMICS-NEXT: cmp w0, w19, uxth
; OUTLINE-ATOMICS-NEXT: cset w0, eq
; OUTLINE-ATOMICS-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i16_1:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: stp x19, x30, [sp, #-16]! // 16-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: mov w19, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x2, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_cas2_acq
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w0, w19, uxth
; MSVC-OUTLINE-ATOMICS-NEXT: cset w0, eq
; MSVC-OUTLINE-ATOMICS-NEXT: ldp x19, x30, [sp], #16 // 16-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%pair = cmpxchg ptr @var16, i16 %wanted, i16 %new acquire acquire
%success = extractvalue { i16, i1 } %pair, 1
ret i1 %success
}
define dso_local i32 @test_atomic_cmpxchg_i32(i32 %wanted, i32 %new) nounwind {
; CHECK-LABEL: test_atomic_cmpxchg_i32:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: casa w0, w1, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i32:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x2, var32
; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas4_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i32:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x2, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_cas4_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%pair = cmpxchg ptr @var32, i32 %wanted, i32 %new acquire acquire
%old = extractvalue { i32, i1 } %pair, 0
ret i32 %old
}
define dso_local i32 @test_atomic_cmpxchg_i32_monotonic_acquire(i32 %wanted, i32 %new) nounwind {
; CHECK-LABEL: test_atomic_cmpxchg_i32_monotonic_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: casa w0, w1, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i32_monotonic_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x2, var32
; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas4_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i32_monotonic_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x2, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_cas4_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%pair = cmpxchg ptr @var32, i32 %wanted, i32 %new monotonic acquire
%old = extractvalue { i32, i1 } %pair, 0
ret i32 %old
}
define dso_local i64 @test_atomic_cmpxchg_i64(i64 %wanted, i64 %new) nounwind {
; CHECK-LABEL: test_atomic_cmpxchg_i64:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: casa x0, x1, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i64:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x2, var64
; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas8_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i64:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x2, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_cas8_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%pair = cmpxchg ptr @var64, i64 %wanted, i64 %new acquire acquire
%old = extractvalue { i64, i1 } %pair, 0
ret i64 %old
}
define dso_local i128 @test_atomic_cmpxchg_i128(i128 %wanted, i128 %new) nounwind {
; CHECK-LABEL: test_atomic_cmpxchg_i128:
; CHECK: // %bb.0:
; CHECK-NEXT: // kill: def $x3 killed $x3 killed $x2_x3 def $x2_x3
; CHECK-NEXT: // kill: def $x1 killed $x1 killed $x0_x1 def $x0_x1
; CHECK-NEXT: // kill: def $x2 killed $x2 killed $x2_x3 def $x2_x3
; CHECK-NEXT: // kill: def $x0 killed $x0 killed $x0_x1 def $x0_x1
; CHECK-NEXT: adrp x8, var128
; CHECK-NEXT: add x8, x8, :lo12:var128
; CHECK-NEXT: caspa x0, x1, x2, x3, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i128:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x4, var128
; OUTLINE-ATOMICS-NEXT: add x4, x4, :lo12:var128
; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas16_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i128:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x4, var128
; MSVC-OUTLINE-ATOMICS-NEXT: add x4, x4, :lo12:var128
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_cas16_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%pair = cmpxchg ptr @var128, i128 %wanted, i128 %new acquire acquire
%old = extractvalue { i128, i1 } %pair, 0
ret i128 %old
}
define dso_local i128 @test_atomic_cmpxchg_i128_monotonic_seqcst(i128 %wanted, i128 %new) nounwind {
; CHECK-LABEL: test_atomic_cmpxchg_i128_monotonic_seqcst:
; CHECK: // %bb.0:
; CHECK-NEXT: // kill: def $x3 killed $x3 killed $x2_x3 def $x2_x3
; CHECK-NEXT: // kill: def $x1 killed $x1 killed $x0_x1 def $x0_x1
; CHECK-NEXT: // kill: def $x2 killed $x2 killed $x2_x3 def $x2_x3
; CHECK-NEXT: // kill: def $x0 killed $x0 killed $x0_x1 def $x0_x1
; CHECK-NEXT: adrp x8, var128
; CHECK-NEXT: add x8, x8, :lo12:var128
; CHECK-NEXT: caspal x0, x1, x2, x3, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i128_monotonic_seqcst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x4, var128
; OUTLINE-ATOMICS-NEXT: add x4, x4, :lo12:var128
; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas16_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i128_monotonic_seqcst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x4, var128
; MSVC-OUTLINE-ATOMICS-NEXT: add x4, x4, :lo12:var128
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_cas16_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%pair = cmpxchg ptr @var128, i128 %wanted, i128 %new monotonic seq_cst
%old = extractvalue { i128, i1 } %pair, 0
ret i128 %old
}
define dso_local i128 @test_atomic_cmpxchg_i128_release_acquire(i128 %wanted, i128 %new) nounwind {
; CHECK-LABEL: test_atomic_cmpxchg_i128_release_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: // kill: def $x3 killed $x3 killed $x2_x3 def $x2_x3
; CHECK-NEXT: // kill: def $x1 killed $x1 killed $x0_x1 def $x0_x1
; CHECK-NEXT: // kill: def $x2 killed $x2 killed $x2_x3 def $x2_x3
; CHECK-NEXT: // kill: def $x0 killed $x0 killed $x0_x1 def $x0_x1
; CHECK-NEXT: adrp x8, var128
; CHECK-NEXT: add x8, x8, :lo12:var128
; CHECK-NEXT: caspal x0, x1, x2, x3, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i128_release_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x4, var128
; OUTLINE-ATOMICS-NEXT: add x4, x4, :lo12:var128
; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas16_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i128_release_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x4, var128
; MSVC-OUTLINE-ATOMICS-NEXT: add x4, x4, :lo12:var128
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_cas16_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%pair = cmpxchg ptr @var128, i128 %wanted, i128 %new release acquire
%old = extractvalue { i128, i1 } %pair, 0
ret i128 %old
}
define dso_local i8 @test_atomic_load_sub_i8(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i8:
; CHECK: // %bb.0:
; CHECK-NEXT: neg w8, w0
; CHECK-NEXT: adrp x9, var8
; CHECK-NEXT: add x9, x9, :lo12:var8
; CHECK-NEXT: ldaddalb w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i8:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i8:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw sub ptr @var8, i8 %offset seq_cst
ret i8 %old
}
define dso_local i16 @test_atomic_load_sub_i16(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i16:
; CHECK: // %bb.0:
; CHECK-NEXT: neg w8, w0
; CHECK-NEXT: adrp x9, var16
; CHECK-NEXT: add x9, x9, :lo12:var16
; CHECK-NEXT: ldaddalh w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i16:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i16:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw sub ptr @var16, i16 %offset seq_cst
ret i16 %old
}
define dso_local i32 @test_atomic_load_sub_i32(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i32:
; CHECK: // %bb.0:
; CHECK-NEXT: neg w8, w0
; CHECK-NEXT: adrp x9, var32
; CHECK-NEXT: add x9, x9, :lo12:var32
; CHECK-NEXT: ldaddal w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw sub ptr @var32, i32 %offset seq_cst
ret i32 %old
}
define dso_local i64 @test_atomic_load_sub_i64(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i64:
; CHECK: // %bb.0:
; CHECK-NEXT: neg x8, x0
; CHECK-NEXT: adrp x9, var64
; CHECK-NEXT: add x9, x9, :lo12:var64
; CHECK-NEXT: ldaddal x8, x0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg x0, x0
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw sub ptr @var64, i64 %offset seq_cst
ret i64 %old
}
define dso_local void @test_atomic_load_sub_i32_noret(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i32_noret:
; CHECK: // %bb.0:
; CHECK-NEXT: neg w8, w0
; CHECK-NEXT: adrp x9, var32
; CHECK-NEXT: add x9, x9, :lo12:var32
; CHECK-NEXT: ldaddal w8, w8, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_noret:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_noret:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw sub ptr @var32, i32 %offset seq_cst
ret void
}
define dso_local void @test_atomic_load_sub_i64_noret(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i64_noret:
; CHECK: // %bb.0:
; CHECK-NEXT: neg x8, x0
; CHECK-NEXT: adrp x9, var64
; CHECK-NEXT: add x9, x9, :lo12:var64
; CHECK-NEXT: ldaddal x8, x8, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_noret:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg x0, x0
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_noret:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw sub ptr @var64, i64 %offset seq_cst
ret void
}
define dso_local i8 @test_atomic_load_sub_i8_neg_imm() nounwind {
; CHECK-LABEL: test_atomic_load_sub_i8_neg_imm:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #1 // =0x1
; CHECK-NEXT: adrp x9, var8
; CHECK-NEXT: add x9, x9, :lo12:var8
; CHECK-NEXT: ldaddalb w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i8_neg_imm:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i8_neg_imm:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw sub ptr @var8, i8 -1 seq_cst
ret i8 %old
}
define dso_local i16 @test_atomic_load_sub_i16_neg_imm() nounwind {
; CHECK-LABEL: test_atomic_load_sub_i16_neg_imm:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #1 // =0x1
; CHECK-NEXT: adrp x9, var16
; CHECK-NEXT: add x9, x9, :lo12:var16
; CHECK-NEXT: ldaddalh w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i16_neg_imm:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i16_neg_imm:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw sub ptr @var16, i16 -1 seq_cst
ret i16 %old
}
define dso_local i32 @test_atomic_load_sub_i32_neg_imm() nounwind {
; CHECK-LABEL: test_atomic_load_sub_i32_neg_imm:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #1 // =0x1
; CHECK-NEXT: adrp x9, var32
; CHECK-NEXT: add x9, x9, :lo12:var32
; CHECK-NEXT: ldaddal w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_neg_imm:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_neg_imm:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw sub ptr @var32, i32 -1 seq_cst
ret i32 %old
}
define dso_local i64 @test_atomic_load_sub_i64_neg_imm() nounwind {
; CHECK-LABEL: test_atomic_load_sub_i64_neg_imm:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #1 // =0x1
; CHECK-NEXT: adrp x9, var64
; CHECK-NEXT: add x9, x9, :lo12:var64
; CHECK-NEXT: ldaddal x8, x0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_neg_imm:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_neg_imm:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw sub ptr @var64, i64 -1 seq_cst
ret i64 %old
}
define dso_local i8 @test_atomic_load_sub_i8_neg_arg(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i8_neg_arg:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldaddalb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i8_neg_arg:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i8_neg_arg:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%neg = sub i8 0, %offset
%old = atomicrmw sub ptr @var8, i8 %neg seq_cst
ret i8 %old
}
define dso_local i16 @test_atomic_load_sub_i16_neg_arg(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i16_neg_arg:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldaddalh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i16_neg_arg:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i16_neg_arg:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%neg = sub i16 0, %offset
%old = atomicrmw sub ptr @var16, i16 %neg seq_cst
ret i16 %old
}
define dso_local i32 @test_atomic_load_sub_i32_neg_arg(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i32_neg_arg:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldaddal w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_neg_arg:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_neg_arg:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%neg = sub i32 0, %offset
%old = atomicrmw sub ptr @var32, i32 %neg seq_cst
ret i32 %old
}
define dso_local i64 @test_atomic_load_sub_i64_neg_arg(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i64_neg_arg:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldaddal x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_neg_arg:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_neg_arg:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%neg = sub i64 0, %offset
%old = atomicrmw sub ptr @var64, i64 %neg seq_cst
ret i64 %old
}
define dso_local i8 @test_atomic_load_and_i8(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i8:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn w8, w0
; CHECK-NEXT: adrp x9, var8
; CHECK-NEXT: add x9, x9, :lo12:var8
; CHECK-NEXT: ldclralb w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw and ptr @var8, i8 %offset seq_cst
ret i8 %old
}
define dso_local i16 @test_atomic_load_and_i16(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i16:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn w8, w0
; CHECK-NEXT: adrp x9, var16
; CHECK-NEXT: add x9, x9, :lo12:var16
; CHECK-NEXT: ldclralh w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw and ptr @var16, i16 %offset seq_cst
ret i16 %old
}
define dso_local i32 @test_atomic_load_and_i32(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i32:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn w8, w0
; CHECK-NEXT: adrp x9, var32
; CHECK-NEXT: add x9, x9, :lo12:var32
; CHECK-NEXT: ldclral w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw and ptr @var32, i32 %offset seq_cst
ret i32 %old
}
define dso_local i64 @test_atomic_load_and_i64(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i64:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn x8, x0
; CHECK-NEXT: adrp x9, var64
; CHECK-NEXT: add x9, x9, :lo12:var64
; CHECK-NEXT: ldclral x8, x0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw and ptr @var64, i64 %offset seq_cst
ret i64 %old
}
define dso_local i8 @test_atomic_load_and_i8_inv_imm() nounwind {
; CHECK-LABEL: test_atomic_load_and_i8_inv_imm:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #1 // =0x1
; CHECK-NEXT: adrp x9, var8
; CHECK-NEXT: add x9, x9, :lo12:var8
; CHECK-NEXT: ldclralb w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_inv_imm:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_inv_imm:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw and ptr @var8, i8 -2 seq_cst
ret i8 %old
}
define dso_local i16 @test_atomic_load_and_i16_inv_imm() nounwind {
; CHECK-LABEL: test_atomic_load_and_i16_inv_imm:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #1 // =0x1
; CHECK-NEXT: adrp x9, var16
; CHECK-NEXT: add x9, x9, :lo12:var16
; CHECK-NEXT: ldclralh w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_inv_imm:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_inv_imm:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw and ptr @var16, i16 -2 seq_cst
ret i16 %old
}
define dso_local i32 @test_atomic_load_and_i32_inv_imm() nounwind {
; CHECK-LABEL: test_atomic_load_and_i32_inv_imm:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #1 // =0x1
; CHECK-NEXT: adrp x9, var32
; CHECK-NEXT: add x9, x9, :lo12:var32
; CHECK-NEXT: ldclral w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_inv_imm:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_inv_imm:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw and ptr @var32, i32 -2 seq_cst
ret i32 %old
}
define dso_local i64 @test_atomic_load_and_i64_inv_imm() nounwind {
; CHECK-LABEL: test_atomic_load_and_i64_inv_imm:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #1 // =0x1
; CHECK-NEXT: adrp x9, var64
; CHECK-NEXT: add x9, x9, :lo12:var64
; CHECK-NEXT: ldclral x8, x0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_inv_imm:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_inv_imm:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw and ptr @var64, i64 -2 seq_cst
ret i64 %old
}
define dso_local i8 @test_atomic_load_and_i8_inv_arg(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i8_inv_arg:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldclralb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_inv_arg:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_inv_arg:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%inv = xor i8 %offset, -1
%old = atomicrmw and ptr @var8, i8 %inv seq_cst
ret i8 %old
}
define dso_local i16 @test_atomic_load_and_i16_inv_arg(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i16_inv_arg:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldclralh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_inv_arg:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_inv_arg:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%inv = xor i16 %offset, -1
%old = atomicrmw and ptr @var16, i16 %inv seq_cst
ret i16 %old
}
define dso_local i32 @test_atomic_load_and_i32_inv_arg(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i32_inv_arg:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldclral w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_inv_arg:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_inv_arg:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%inv = xor i32 %offset, -1
%old = atomicrmw and ptr @var32, i32 %inv seq_cst
ret i32 %old
}
define dso_local i64 @test_atomic_load_and_i64_inv_arg(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i64_inv_arg:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldclral x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_inv_arg:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_inv_arg:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%inv = xor i64 %offset, -1
%old = atomicrmw and ptr @var64, i64 %inv seq_cst
ret i64 %old
}
define dso_local void @test_atomic_load_and_i32_noret(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i32_noret:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn w8, w0
; CHECK-NEXT: adrp x9, var32
; CHECK-NEXT: add x9, x9, :lo12:var32
; CHECK-NEXT: ldclral w8, w8, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_noret:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_noret:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw and ptr @var32, i32 %offset seq_cst
ret void
}
define dso_local void @test_atomic_load_and_i64_noret(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i64_noret:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn x8, x0
; CHECK-NEXT: adrp x9, var64
; CHECK-NEXT: add x9, x9, :lo12:var64
; CHECK-NEXT: ldclral x8, x8, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_noret:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_noret:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw and ptr @var64, i64 %offset seq_cst
ret void
}
define dso_local i8 @test_atomic_load_add_i8_acq_rel(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i8_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldaddalb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i8_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i8_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw add ptr @var8, i8 %offset acq_rel
ret i8 %old
}
define dso_local i16 @test_atomic_load_add_i16_acq_rel(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i16_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldaddalh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i16_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i16_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw add ptr @var16, i16 %offset acq_rel
ret i16 %old
}
define dso_local i32 @test_atomic_load_add_i32_acq_rel(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i32_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldaddal w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw add ptr @var32, i32 %offset acq_rel
ret i32 %old
}
define dso_local i64 @test_atomic_load_add_i64_acq_rel(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i64_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldaddal x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw add ptr @var64, i64 %offset acq_rel
ret i64 %old
}
define dso_local void @test_atomic_load_add_i32_noret_acq_rel(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i32_noret_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldaddal w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_noret_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_noret_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw add ptr @var32, i32 %offset acq_rel
ret void
}
define dso_local void @test_atomic_load_add_i64_noret_acq_rel(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i64_noret_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldaddal x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_noret_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_noret_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw add ptr @var64, i64 %offset acq_rel
ret void
}
define dso_local i8 @test_atomic_load_add_i8_acquire(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i8_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldaddab w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i8_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i8_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw add ptr @var8, i8 %offset acquire
ret i8 %old
}
define dso_local i16 @test_atomic_load_add_i16_acquire(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i16_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldaddah w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i16_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i16_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw add ptr @var16, i16 %offset acquire
ret i16 %old
}
define dso_local i32 @test_atomic_load_add_i32_acquire(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i32_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldadda w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw add ptr @var32, i32 %offset acquire
ret i32 %old
}
define dso_local i64 @test_atomic_load_add_i64_acquire(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i64_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldadda x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw add ptr @var64, i64 %offset acquire
ret i64 %old
}
define dso_local void @test_atomic_load_add_i32_noret_acquire(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i32_noret_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldadda w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_noret_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_noret_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw add ptr @var32, i32 %offset acquire
ret void
}
define dso_local void @test_atomic_load_add_i64_noret_acquire(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i64_noret_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldadda x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_noret_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_noret_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw add ptr @var64, i64 %offset acquire
ret void
}
define dso_local i8 @test_atomic_load_add_i8_monotonic(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i8_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldaddb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i8_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i8_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw add ptr @var8, i8 %offset monotonic
ret i8 %old
}
define dso_local i16 @test_atomic_load_add_i16_monotonic(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i16_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldaddh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i16_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i16_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw add ptr @var16, i16 %offset monotonic
ret i16 %old
}
define dso_local i32 @test_atomic_load_add_i32_monotonic(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i32_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldadd w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw add ptr @var32, i32 %offset monotonic
ret i32 %old
}
define dso_local i64 @test_atomic_load_add_i64_monotonic(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i64_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldadd x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw add ptr @var64, i64 %offset monotonic
ret i64 %old
}
define dso_local void @test_atomic_load_add_i32_noret_monotonic(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i32_noret_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldadd w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_noret_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_noret_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw add ptr @var32, i32 %offset monotonic
ret void
}
define dso_local void @test_atomic_load_add_i64_noret_monotonic(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i64_noret_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldadd x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_noret_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_noret_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw add ptr @var64, i64 %offset monotonic
ret void
}
define dso_local i8 @test_atomic_load_add_i8_release(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i8_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldaddlb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i8_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i8_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw add ptr @var8, i8 %offset release
ret i8 %old
}
define dso_local i16 @test_atomic_load_add_i16_release(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i16_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldaddlh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i16_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i16_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw add ptr @var16, i16 %offset release
ret i16 %old
}
define dso_local i32 @test_atomic_load_add_i32_release(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i32_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldaddl w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw add ptr @var32, i32 %offset release
ret i32 %old
}
define dso_local i64 @test_atomic_load_add_i64_release(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i64_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldaddl x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw add ptr @var64, i64 %offset release
ret i64 %old
}
define dso_local void @test_atomic_load_add_i32_noret_release(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i32_noret_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldaddl w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_noret_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_noret_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw add ptr @var32, i32 %offset release
ret void
}
define dso_local void @test_atomic_load_add_i64_noret_release(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i64_noret_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldaddl x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_noret_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_noret_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw add ptr @var64, i64 %offset release
ret void
}
define dso_local i8 @test_atomic_load_add_i8_seq_cst(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i8_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldaddalb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i8_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i8_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw add ptr @var8, i8 %offset seq_cst
ret i8 %old
}
define dso_local i16 @test_atomic_load_add_i16_seq_cst(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i16_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldaddalh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i16_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i16_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw add ptr @var16, i16 %offset seq_cst
ret i16 %old
}
define dso_local i32 @test_atomic_load_add_i32_seq_cst(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i32_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldaddal w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw add ptr @var32, i32 %offset seq_cst
ret i32 %old
}
define dso_local i64 @test_atomic_load_add_i64_seq_cst(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i64_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldaddal x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw add ptr @var64, i64 %offset seq_cst
ret i64 %old
}
define dso_local void @test_atomic_load_add_i32_noret_seq_cst(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i32_noret_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldaddal w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_noret_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i32_noret_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw add ptr @var32, i32 %offset seq_cst
ret void
}
define dso_local void @test_atomic_load_add_i64_noret_seq_cst(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_add_i64_noret_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldaddal x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_noret_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_add_i64_noret_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw add ptr @var64, i64 %offset seq_cst
ret void
}
define dso_local i8 @test_atomic_load_and_i8_acq_rel(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i8_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn w8, w0
; CHECK-NEXT: adrp x9, var8
; CHECK-NEXT: add x9, x9, :lo12:var8
; CHECK-NEXT: ldclralb w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw and ptr @var8, i8 %offset acq_rel
ret i8 %old
}
define dso_local i16 @test_atomic_load_and_i16_acq_rel(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i16_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn w8, w0
; CHECK-NEXT: adrp x9, var16
; CHECK-NEXT: add x9, x9, :lo12:var16
; CHECK-NEXT: ldclralh w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw and ptr @var16, i16 %offset acq_rel
ret i16 %old
}
define dso_local i32 @test_atomic_load_and_i32_acq_rel(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i32_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn w8, w0
; CHECK-NEXT: adrp x9, var32
; CHECK-NEXT: add x9, x9, :lo12:var32
; CHECK-NEXT: ldclral w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw and ptr @var32, i32 %offset acq_rel
ret i32 %old
}
define dso_local i64 @test_atomic_load_and_i64_acq_rel(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i64_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn x8, x0
; CHECK-NEXT: adrp x9, var64
; CHECK-NEXT: add x9, x9, :lo12:var64
; CHECK-NEXT: ldclral x8, x0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw and ptr @var64, i64 %offset acq_rel
ret i64 %old
}
define dso_local void @test_atomic_load_and_i32_noret_acq_rel(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i32_noret_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn w8, w0
; CHECK-NEXT: adrp x9, var32
; CHECK-NEXT: add x9, x9, :lo12:var32
; CHECK-NEXT: ldclral w8, w8, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_noret_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_noret_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw and ptr @var32, i32 %offset acq_rel
ret void
}
define dso_local void @test_atomic_load_and_i64_noret_acq_rel(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i64_noret_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn x8, x0
; CHECK-NEXT: adrp x9, var64
; CHECK-NEXT: add x9, x9, :lo12:var64
; CHECK-NEXT: ldclral x8, x8, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_noret_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_noret_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw and ptr @var64, i64 %offset acq_rel
ret void
}
define dso_local i8 @test_atomic_load_and_i8_acquire(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i8_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn w8, w0
; CHECK-NEXT: adrp x9, var8
; CHECK-NEXT: add x9, x9, :lo12:var8
; CHECK-NEXT: ldclrab w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw and ptr @var8, i8 %offset acquire
ret i8 %old
}
define dso_local i16 @test_atomic_load_and_i16_acquire(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i16_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn w8, w0
; CHECK-NEXT: adrp x9, var16
; CHECK-NEXT: add x9, x9, :lo12:var16
; CHECK-NEXT: ldclrah w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw and ptr @var16, i16 %offset acquire
ret i16 %old
}
define dso_local i32 @test_atomic_load_and_i32_acquire(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i32_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn w8, w0
; CHECK-NEXT: adrp x9, var32
; CHECK-NEXT: add x9, x9, :lo12:var32
; CHECK-NEXT: ldclra w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw and ptr @var32, i32 %offset acquire
ret i32 %old
}
define dso_local i64 @test_atomic_load_and_i64_acquire(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i64_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn x8, x0
; CHECK-NEXT: adrp x9, var64
; CHECK-NEXT: add x9, x9, :lo12:var64
; CHECK-NEXT: ldclra x8, x0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw and ptr @var64, i64 %offset acquire
ret i64 %old
}
define dso_local void @test_atomic_load_and_i32_noret_acquire(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i32_noret_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn w8, w0
; CHECK-NEXT: adrp x9, var32
; CHECK-NEXT: add x9, x9, :lo12:var32
; CHECK-NEXT: ldclra w8, w8, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_noret_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_noret_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw and ptr @var32, i32 %offset acquire
ret void
}
define dso_local void @test_atomic_load_and_i64_noret_acquire(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i64_noret_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn x8, x0
; CHECK-NEXT: adrp x9, var64
; CHECK-NEXT: add x9, x9, :lo12:var64
; CHECK-NEXT: ldclra x8, x8, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_noret_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_noret_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw and ptr @var64, i64 %offset acquire
ret void
}
define dso_local i8 @test_atomic_load_and_i8_monotonic(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i8_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn w8, w0
; CHECK-NEXT: adrp x9, var8
; CHECK-NEXT: add x9, x9, :lo12:var8
; CHECK-NEXT: ldclrb w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw and ptr @var8, i8 %offset monotonic
ret i8 %old
}
define dso_local i16 @test_atomic_load_and_i16_monotonic(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i16_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn w8, w0
; CHECK-NEXT: adrp x9, var16
; CHECK-NEXT: add x9, x9, :lo12:var16
; CHECK-NEXT: ldclrh w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw and ptr @var16, i16 %offset monotonic
ret i16 %old
}
define dso_local i32 @test_atomic_load_and_i32_monotonic(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i32_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn w8, w0
; CHECK-NEXT: adrp x9, var32
; CHECK-NEXT: add x9, x9, :lo12:var32
; CHECK-NEXT: ldclr w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw and ptr @var32, i32 %offset monotonic
ret i32 %old
}
define dso_local i64 @test_atomic_load_and_i64_monotonic(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i64_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn x8, x0
; CHECK-NEXT: adrp x9, var64
; CHECK-NEXT: add x9, x9, :lo12:var64
; CHECK-NEXT: ldclr x8, x0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw and ptr @var64, i64 %offset monotonic
ret i64 %old
}
define dso_local void @test_atomic_load_and_i32_noret_monotonic(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i32_noret_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn w8, w0
; CHECK-NEXT: adrp x9, var32
; CHECK-NEXT: add x9, x9, :lo12:var32
; CHECK-NEXT: ldclr w8, w8, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_noret_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_noret_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw and ptr @var32, i32 %offset monotonic
ret void
}
define dso_local void @test_atomic_load_and_i64_noret_monotonic(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i64_noret_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn x8, x0
; CHECK-NEXT: adrp x9, var64
; CHECK-NEXT: add x9, x9, :lo12:var64
; CHECK-NEXT: ldclr x8, x8, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_noret_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_noret_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw and ptr @var64, i64 %offset monotonic
ret void
}
define dso_local i8 @test_atomic_load_and_i8_release(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i8_release:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn w8, w0
; CHECK-NEXT: adrp x9, var8
; CHECK-NEXT: add x9, x9, :lo12:var8
; CHECK-NEXT: ldclrlb w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw and ptr @var8, i8 %offset release
ret i8 %old
}
define dso_local i16 @test_atomic_load_and_i16_release(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i16_release:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn w8, w0
; CHECK-NEXT: adrp x9, var16
; CHECK-NEXT: add x9, x9, :lo12:var16
; CHECK-NEXT: ldclrlh w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw and ptr @var16, i16 %offset release
ret i16 %old
}
define dso_local i32 @test_atomic_load_and_i32_release(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i32_release:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn w8, w0
; CHECK-NEXT: adrp x9, var32
; CHECK-NEXT: add x9, x9, :lo12:var32
; CHECK-NEXT: ldclrl w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw and ptr @var32, i32 %offset release
ret i32 %old
}
define dso_local i64 @test_atomic_load_and_i64_release(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i64_release:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn x8, x0
; CHECK-NEXT: adrp x9, var64
; CHECK-NEXT: add x9, x9, :lo12:var64
; CHECK-NEXT: ldclrl x8, x0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw and ptr @var64, i64 %offset release
ret i64 %old
}
define dso_local void @test_atomic_load_and_i32_noret_release(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i32_noret_release:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn w8, w0
; CHECK-NEXT: adrp x9, var32
; CHECK-NEXT: add x9, x9, :lo12:var32
; CHECK-NEXT: ldclrl w8, w8, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_noret_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_noret_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw and ptr @var32, i32 %offset release
ret void
}
define dso_local void @test_atomic_load_and_i64_noret_release(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i64_noret_release:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn x8, x0
; CHECK-NEXT: adrp x9, var64
; CHECK-NEXT: add x9, x9, :lo12:var64
; CHECK-NEXT: ldclrl x8, x8, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_noret_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_noret_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw and ptr @var64, i64 %offset release
ret void
}
define dso_local i8 @test_atomic_load_and_i8_seq_cst(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i8_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn w8, w0
; CHECK-NEXT: adrp x9, var8
; CHECK-NEXT: add x9, x9, :lo12:var8
; CHECK-NEXT: ldclralb w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw and ptr @var8, i8 %offset seq_cst
ret i8 %old
}
define dso_local i16 @test_atomic_load_and_i16_seq_cst(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i16_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn w8, w0
; CHECK-NEXT: adrp x9, var16
; CHECK-NEXT: add x9, x9, :lo12:var16
; CHECK-NEXT: ldclralh w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw and ptr @var16, i16 %offset seq_cst
ret i16 %old
}
define dso_local i32 @test_atomic_load_and_i32_seq_cst(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i32_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn w8, w0
; CHECK-NEXT: adrp x9, var32
; CHECK-NEXT: add x9, x9, :lo12:var32
; CHECK-NEXT: ldclral w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw and ptr @var32, i32 %offset seq_cst
ret i32 %old
}
define dso_local i64 @test_atomic_load_and_i64_seq_cst(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i64_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn x8, x0
; CHECK-NEXT: adrp x9, var64
; CHECK-NEXT: add x9, x9, :lo12:var64
; CHECK-NEXT: ldclral x8, x0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw and ptr @var64, i64 %offset seq_cst
ret i64 %old
}
define dso_local void @test_atomic_load_and_i32_noret_seq_cst(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i32_noret_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn w8, w0
; CHECK-NEXT: adrp x9, var32
; CHECK-NEXT: add x9, x9, :lo12:var32
; CHECK-NEXT: ldclral w8, w8, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_noret_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_noret_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw and ptr @var32, i32 %offset seq_cst
ret void
}
define dso_local void @test_atomic_load_and_i64_noret_seq_cst(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_and_i64_noret_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn x8, x0
; CHECK-NEXT: adrp x9, var64
; CHECK-NEXT: add x9, x9, :lo12:var64
; CHECK-NEXT: ldclral x8, x8, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_noret_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_noret_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw and ptr @var64, i64 %offset seq_cst
ret void
}
define dso_local i8 @test_atomic_cmpxchg_i8_acquire(i8 %wanted, i8 %new) nounwind {
; CHECK-LABEL: test_atomic_cmpxchg_i8_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: casab w0, w1, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i8_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x2, var8
; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas1_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i8_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x2, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_cas1_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%pair = cmpxchg ptr @var8, i8 %wanted, i8 %new acquire acquire
%old = extractvalue { i8, i1 } %pair, 0
ret i8 %old
}
define dso_local i16 @test_atomic_cmpxchg_i16_acquire(i16 %wanted, i16 %new) nounwind {
; CHECK-LABEL: test_atomic_cmpxchg_i16_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: casah w0, w1, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i16_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x2, var16
; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas2_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i16_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x2, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_cas2_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%pair = cmpxchg ptr @var16, i16 %wanted, i16 %new acquire acquire
%old = extractvalue { i16, i1 } %pair, 0
ret i16 %old
}
define dso_local i32 @test_atomic_cmpxchg_i32_acquire(i32 %wanted, i32 %new) nounwind {
; CHECK-LABEL: test_atomic_cmpxchg_i32_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: casa w0, w1, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i32_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x2, var32
; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas4_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i32_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x2, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_cas4_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%pair = cmpxchg ptr @var32, i32 %wanted, i32 %new acquire acquire
%old = extractvalue { i32, i1 } %pair, 0
ret i32 %old
}
define dso_local i64 @test_atomic_cmpxchg_i64_acquire(i64 %wanted, i64 %new) nounwind {
; CHECK-LABEL: test_atomic_cmpxchg_i64_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: casa x0, x1, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i64_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x2, var64
; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas8_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i64_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x2, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_cas8_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%pair = cmpxchg ptr @var64, i64 %wanted, i64 %new acquire acquire
%old = extractvalue { i64, i1 } %pair, 0
ret i64 %old
}
define dso_local i128 @test_atomic_cmpxchg_i128_acquire(i128 %wanted, i128 %new) nounwind {
; CHECK-LABEL: test_atomic_cmpxchg_i128_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: // kill: def $x3 killed $x3 killed $x2_x3 def $x2_x3
; CHECK-NEXT: // kill: def $x1 killed $x1 killed $x0_x1 def $x0_x1
; CHECK-NEXT: // kill: def $x2 killed $x2 killed $x2_x3 def $x2_x3
; CHECK-NEXT: // kill: def $x0 killed $x0 killed $x0_x1 def $x0_x1
; CHECK-NEXT: adrp x8, var128
; CHECK-NEXT: add x8, x8, :lo12:var128
; CHECK-NEXT: caspa x0, x1, x2, x3, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i128_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x4, var128
; OUTLINE-ATOMICS-NEXT: add x4, x4, :lo12:var128
; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas16_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i128_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x4, var128
; MSVC-OUTLINE-ATOMICS-NEXT: add x4, x4, :lo12:var128
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_cas16_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%pair = cmpxchg ptr @var128, i128 %wanted, i128 %new acquire acquire
%old = extractvalue { i128, i1 } %pair, 0
ret i128 %old
}
define dso_local i8 @test_atomic_cmpxchg_i8_monotonic(i8 %wanted, i8 %new) nounwind {
; CHECK-LABEL: test_atomic_cmpxchg_i8_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: casb w0, w1, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i8_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x2, var8
; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas1_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i8_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x2, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_cas1_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%pair = cmpxchg ptr @var8, i8 %wanted, i8 %new monotonic monotonic
%old = extractvalue { i8, i1 } %pair, 0
ret i8 %old
}
define dso_local i16 @test_atomic_cmpxchg_i16_monotonic(i16 %wanted, i16 %new) nounwind {
; CHECK-LABEL: test_atomic_cmpxchg_i16_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: cash w0, w1, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i16_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x2, var16
; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas2_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i16_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x2, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_cas2_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%pair = cmpxchg ptr @var16, i16 %wanted, i16 %new monotonic monotonic
%old = extractvalue { i16, i1 } %pair, 0
ret i16 %old
}
define dso_local i32 @test_atomic_cmpxchg_i32_monotonic(i32 %wanted, i32 %new) nounwind {
; CHECK-LABEL: test_atomic_cmpxchg_i32_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: cas w0, w1, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i32_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x2, var32
; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas4_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i32_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x2, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_cas4_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%pair = cmpxchg ptr @var32, i32 %wanted, i32 %new monotonic monotonic
%old = extractvalue { i32, i1 } %pair, 0
ret i32 %old
}
define dso_local i64 @test_atomic_cmpxchg_i64_monotonic(i64 %wanted, i64 %new) nounwind {
; CHECK-LABEL: test_atomic_cmpxchg_i64_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: cas x0, x1, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i64_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x2, var64
; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas8_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i64_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x2, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_cas8_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%pair = cmpxchg ptr @var64, i64 %wanted, i64 %new monotonic monotonic
%old = extractvalue { i64, i1 } %pair, 0
ret i64 %old
}
define dso_local i128 @test_atomic_cmpxchg_i128_monotonic(i128 %wanted, i128 %new) nounwind {
; CHECK-LABEL: test_atomic_cmpxchg_i128_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: // kill: def $x3 killed $x3 killed $x2_x3 def $x2_x3
; CHECK-NEXT: // kill: def $x1 killed $x1 killed $x0_x1 def $x0_x1
; CHECK-NEXT: // kill: def $x2 killed $x2 killed $x2_x3 def $x2_x3
; CHECK-NEXT: // kill: def $x0 killed $x0 killed $x0_x1 def $x0_x1
; CHECK-NEXT: adrp x8, var128
; CHECK-NEXT: add x8, x8, :lo12:var128
; CHECK-NEXT: casp x0, x1, x2, x3, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i128_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x4, var128
; OUTLINE-ATOMICS-NEXT: add x4, x4, :lo12:var128
; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas16_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i128_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x4, var128
; MSVC-OUTLINE-ATOMICS-NEXT: add x4, x4, :lo12:var128
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_cas16_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%pair = cmpxchg ptr @var128, i128 %wanted, i128 %new monotonic monotonic
%old = extractvalue { i128, i1 } %pair, 0
ret i128 %old
}
define dso_local i8 @test_atomic_cmpxchg_i8_seq_cst(i8 %wanted, i8 %new) nounwind {
; CHECK-LABEL: test_atomic_cmpxchg_i8_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: casalb w0, w1, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i8_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x2, var8
; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas1_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i8_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x2, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_cas1_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%pair = cmpxchg ptr @var8, i8 %wanted, i8 %new seq_cst seq_cst
%old = extractvalue { i8, i1 } %pair, 0
ret i8 %old
}
define dso_local i16 @test_atomic_cmpxchg_i16_seq_cst(i16 %wanted, i16 %new) nounwind {
; CHECK-LABEL: test_atomic_cmpxchg_i16_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: casalh w0, w1, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i16_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x2, var16
; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas2_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i16_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x2, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_cas2_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%pair = cmpxchg ptr @var16, i16 %wanted, i16 %new seq_cst seq_cst
%old = extractvalue { i16, i1 } %pair, 0
ret i16 %old
}
define dso_local i32 @test_atomic_cmpxchg_i32_seq_cst(i32 %wanted, i32 %new) nounwind {
; CHECK-LABEL: test_atomic_cmpxchg_i32_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: casal w0, w1, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i32_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x2, var32
; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i32_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x2, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_cas4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%pair = cmpxchg ptr @var32, i32 %wanted, i32 %new seq_cst seq_cst
%old = extractvalue { i32, i1 } %pair, 0
ret i32 %old
}
define dso_local i32 @test_atomic_cmpxchg_i32_monotonic_seq_cst(i32 %wanted, i32 %new) nounwind {
; CHECK-LABEL: test_atomic_cmpxchg_i32_monotonic_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: casal w0, w1, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i32_monotonic_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x2, var32
; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i32_monotonic_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x2, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_cas4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%pair = cmpxchg ptr @var32, i32 %wanted, i32 %new monotonic seq_cst
%old = extractvalue { i32, i1 } %pair, 0
ret i32 %old
}
define dso_local i32 @test_atomic_cmpxchg_i32_release_acquire(i32 %wanted, i32 %new) nounwind {
; CHECK-LABEL: test_atomic_cmpxchg_i32_release_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: casal w0, w1, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i32_release_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x2, var32
; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i32_release_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x2, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_cas4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%pair = cmpxchg ptr @var32, i32 %wanted, i32 %new release acquire
%old = extractvalue { i32, i1 } %pair, 0
ret i32 %old
}
define dso_local i64 @test_atomic_cmpxchg_i64_seq_cst(i64 %wanted, i64 %new) nounwind {
; CHECK-LABEL: test_atomic_cmpxchg_i64_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: casal x0, x1, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i64_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x2, var64
; OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i64_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x2, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x2, x2, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_cas8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%pair = cmpxchg ptr @var64, i64 %wanted, i64 %new seq_cst seq_cst
%old = extractvalue { i64, i1 } %pair, 0
ret i64 %old
}
define dso_local i128 @test_atomic_cmpxchg_i128_seq_cst(i128 %wanted, i128 %new) nounwind {
; CHECK-LABEL: test_atomic_cmpxchg_i128_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: // kill: def $x3 killed $x3 killed $x2_x3 def $x2_x3
; CHECK-NEXT: // kill: def $x1 killed $x1 killed $x0_x1 def $x0_x1
; CHECK-NEXT: // kill: def $x2 killed $x2 killed $x2_x3 def $x2_x3
; CHECK-NEXT: // kill: def $x0 killed $x0 killed $x0_x1 def $x0_x1
; CHECK-NEXT: adrp x8, var128
; CHECK-NEXT: add x8, x8, :lo12:var128
; CHECK-NEXT: caspal x0, x1, x2, x3, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i128_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x4, var128
; OUTLINE-ATOMICS-NEXT: add x4, x4, :lo12:var128
; OUTLINE-ATOMICS-NEXT: bl __aarch64_cas16_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i128_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x4, var128
; MSVC-OUTLINE-ATOMICS-NEXT: add x4, x4, :lo12:var128
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_cas16_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%pair = cmpxchg ptr @var128, i128 %wanted, i128 %new seq_cst seq_cst
%old = extractvalue { i128, i1 } %pair, 0
ret i128 %old
}
define dso_local i8 @test_atomic_load_max_i8_acq_rel(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i8_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldsmaxalb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i8_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var8
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
; OUTLINE-ATOMICS-NEXT: .LBB163_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrb w10, [x9]
; OUTLINE-ATOMICS-NEXT: sxtb w8, w10
; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb
; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt
; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB163_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i8_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB163_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrb w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: sxtb w8, w10
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB163_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw max ptr @var8, i8 %offset acq_rel
ret i8 %old
}
define dso_local i16 @test_atomic_load_max_i16_acq_rel(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i16_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldsmaxalh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i16_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var16
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
; OUTLINE-ATOMICS-NEXT: .LBB164_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]
; OUTLINE-ATOMICS-NEXT: sxth w8, w10
; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth
; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt
; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB164_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i16_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB164_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: sxth w8, w10
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB164_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw max ptr @var16, i16 %offset acq_rel
ret i16 %old
}
define dso_local i32 @test_atomic_load_max_i32_acq_rel(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i32_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsmaxal w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var32
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB165_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp w8, w0
; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, gt
; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB165_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB165_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB165_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw max ptr @var32, i32 %offset acq_rel
ret i32 %old
}
define dso_local i64 @test_atomic_load_max_i64_acq_rel(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i64_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsmaxal x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var64
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB166_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp x8, x0
; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, gt
; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB166_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov x0, x8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB166_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x8, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB166_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov x0, x8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw max ptr @var64, i64 %offset acq_rel
ret i64 %old
}
define dso_local void @test_atomic_load_max_i32_noret_acq_rel(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i32_noret_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsmaxal w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_noret_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var32
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB167_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w9, w0
; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, gt
; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB167_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_noret_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB167_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w9, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB167_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw max ptr @var32, i32 %offset acq_rel
ret void
}
define dso_local void @test_atomic_load_max_i64_noret_acq_rel(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i64_noret_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsmaxal x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_noret_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var64
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB168_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp x9, x0
; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, gt
; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB168_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_noret_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB168_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x9, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB168_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw max ptr @var64, i64 %offset acq_rel
ret void
}
define dso_local i8 @test_atomic_load_max_i8_acquire(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i8_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldsmaxab w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i8_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var8
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
; OUTLINE-ATOMICS-NEXT: .LBB169_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrb w10, [x9]
; OUTLINE-ATOMICS-NEXT: sxtb w8, w10
; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb
; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt
; OUTLINE-ATOMICS-NEXT: stxrb w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB169_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i8_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB169_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrb w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: sxtb w8, w10
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stxrb w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB169_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw max ptr @var8, i8 %offset acquire
ret i8 %old
}
define dso_local i16 @test_atomic_load_max_i16_acquire(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i16_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldsmaxah w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i16_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var16
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
; OUTLINE-ATOMICS-NEXT: .LBB170_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]
; OUTLINE-ATOMICS-NEXT: sxth w8, w10
; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth
; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt
; OUTLINE-ATOMICS-NEXT: stxrh w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB170_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i16_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB170_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: sxth w8, w10
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stxrh w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB170_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw max ptr @var16, i16 %offset acquire
ret i16 %old
}
define dso_local i32 @test_atomic_load_max_i32_acquire(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i32_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsmaxa w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var32
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB171_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp w8, w0
; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, gt
; OUTLINE-ATOMICS-NEXT: stxr w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB171_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB171_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB171_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw max ptr @var32, i32 %offset acquire
ret i32 %old
}
define dso_local i64 @test_atomic_load_max_i64_acquire(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i64_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsmaxa x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var64
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB172_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp x8, x0
; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, gt
; OUTLINE-ATOMICS-NEXT: stxr w11, x10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB172_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov x0, x8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB172_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x8, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w11, x10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB172_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov x0, x8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw max ptr @var64, i64 %offset acquire
ret i64 %old
}
define dso_local void @test_atomic_load_max_i32_noret_acquire(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i32_noret_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsmaxa w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_noret_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var32
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB173_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w9, w0
; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, gt
; OUTLINE-ATOMICS-NEXT: stxr w10, w9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB173_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_noret_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB173_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w9, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w10, w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB173_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw max ptr @var32, i32 %offset acquire
ret void
}
define dso_local void @test_atomic_load_max_i64_noret_acquire(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i64_noret_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsmaxa x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_noret_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var64
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB174_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp x9, x0
; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, gt
; OUTLINE-ATOMICS-NEXT: stxr w10, x9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB174_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_noret_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB174_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x9, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w10, x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB174_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw max ptr @var64, i64 %offset acquire
ret void
}
define dso_local i8 @test_atomic_load_max_i8_monotonic(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i8_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldsmaxb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i8_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var8
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
; OUTLINE-ATOMICS-NEXT: .LBB175_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxrb w10, [x9]
; OUTLINE-ATOMICS-NEXT: sxtb w8, w10
; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb
; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt
; OUTLINE-ATOMICS-NEXT: stxrb w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB175_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i8_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB175_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxrb w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: sxtb w8, w10
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stxrb w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB175_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw max ptr @var8, i8 %offset monotonic
ret i8 %old
}
define dso_local i16 @test_atomic_load_max_i16_monotonic(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i16_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldsmaxh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i16_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var16
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
; OUTLINE-ATOMICS-NEXT: .LBB176_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxrh w10, [x9]
; OUTLINE-ATOMICS-NEXT: sxth w8, w10
; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth
; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt
; OUTLINE-ATOMICS-NEXT: stxrh w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB176_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i16_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB176_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxrh w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: sxth w8, w10
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stxrh w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB176_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw max ptr @var16, i16 %offset monotonic
ret i16 %old
}
define dso_local i32 @test_atomic_load_max_i32_monotonic(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i32_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsmax w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var32
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB177_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr w8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp w8, w0
; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, gt
; OUTLINE-ATOMICS-NEXT: stxr w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB177_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB177_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr w8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB177_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw max ptr @var32, i32 %offset monotonic
ret i32 %old
}
define dso_local i64 @test_atomic_load_max_i64_monotonic(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i64_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsmax x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var64
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB178_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr x8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp x8, x0
; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, gt
; OUTLINE-ATOMICS-NEXT: stxr w11, x10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB178_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov x0, x8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB178_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr x8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x8, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w11, x10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB178_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov x0, x8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw max ptr @var64, i64 %offset monotonic
ret i64 %old
}
define dso_local void @test_atomic_load_max_i32_noret_monotonic(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i32_noret_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsmax w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_noret_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var32
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB179_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr w9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w9, w0
; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, gt
; OUTLINE-ATOMICS-NEXT: stxr w10, w9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB179_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_noret_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB179_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w9, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w10, w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB179_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw max ptr @var32, i32 %offset monotonic
ret void
}
define dso_local void @test_atomic_load_max_i64_noret_monotonic(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i64_noret_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsmax x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_noret_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var64
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB180_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr x9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp x9, x0
; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, gt
; OUTLINE-ATOMICS-NEXT: stxr w10, x9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB180_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_noret_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB180_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x9, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w10, x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB180_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw max ptr @var64, i64 %offset monotonic
ret void
}
define dso_local i8 @test_atomic_load_max_i8_release(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i8_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldsmaxlb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i8_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var8
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
; OUTLINE-ATOMICS-NEXT: .LBB181_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxrb w10, [x9]
; OUTLINE-ATOMICS-NEXT: sxtb w8, w10
; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb
; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt
; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB181_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i8_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB181_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxrb w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: sxtb w8, w10
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB181_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw max ptr @var8, i8 %offset release
ret i8 %old
}
define dso_local i16 @test_atomic_load_max_i16_release(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i16_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldsmaxlh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i16_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var16
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
; OUTLINE-ATOMICS-NEXT: .LBB182_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxrh w10, [x9]
; OUTLINE-ATOMICS-NEXT: sxth w8, w10
; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth
; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt
; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB182_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i16_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB182_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxrh w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: sxth w8, w10
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB182_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw max ptr @var16, i16 %offset release
ret i16 %old
}
define dso_local i32 @test_atomic_load_max_i32_release(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i32_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsmaxl w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var32
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB183_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr w8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp w8, w0
; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, gt
; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB183_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB183_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr w8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB183_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw max ptr @var32, i32 %offset release
ret i32 %old
}
define dso_local i64 @test_atomic_load_max_i64_release(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i64_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsmaxl x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var64
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB184_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr x8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp x8, x0
; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, gt
; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB184_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov x0, x8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB184_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr x8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x8, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB184_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov x0, x8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw max ptr @var64, i64 %offset release
ret i64 %old
}
define dso_local void @test_atomic_load_max_i32_noret_release(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i32_noret_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsmaxl w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_noret_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var32
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB185_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr w9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w9, w0
; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, gt
; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB185_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_noret_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB185_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w9, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB185_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw max ptr @var32, i32 %offset release
ret void
}
define dso_local void @test_atomic_load_max_i64_noret_release(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i64_noret_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsmaxl x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_noret_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var64
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB186_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr x9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp x9, x0
; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, gt
; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB186_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_noret_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB186_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x9, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB186_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw max ptr @var64, i64 %offset release
ret void
}
define dso_local i8 @test_atomic_load_max_i8_seq_cst(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i8_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldsmaxalb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i8_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var8
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
; OUTLINE-ATOMICS-NEXT: .LBB187_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrb w10, [x9]
; OUTLINE-ATOMICS-NEXT: sxtb w8, w10
; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb
; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt
; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB187_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i8_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB187_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrb w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: sxtb w8, w10
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB187_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw max ptr @var8, i8 %offset seq_cst
ret i8 %old
}
define dso_local i16 @test_atomic_load_max_i16_seq_cst(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i16_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldsmaxalh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i16_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var16
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
; OUTLINE-ATOMICS-NEXT: .LBB188_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]
; OUTLINE-ATOMICS-NEXT: sxth w8, w10
; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth
; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt
; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB188_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i16_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB188_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: sxth w8, w10
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB188_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw max ptr @var16, i16 %offset seq_cst
ret i16 %old
}
define dso_local i32 @test_atomic_load_max_i32_seq_cst(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i32_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsmaxal w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var32
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB189_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp w8, w0
; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, gt
; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB189_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB189_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB189_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw max ptr @var32, i32 %offset seq_cst
ret i32 %old
}
define dso_local i64 @test_atomic_load_max_i64_seq_cst(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i64_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsmaxal x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var64
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB190_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp x8, x0
; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, gt
; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB190_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov x0, x8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: mov x8, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB190_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x0, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x0, x8
; MSVC-OUTLINE-ATOMICS-NEXT: csel x10, x0, x8, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB190_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw max ptr @var64, i64 %offset seq_cst
ret i64 %old
}
define dso_local void @test_atomic_load_max_i32_noret_seq_cst(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i32_noret_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsmaxal w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_noret_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var32
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB191_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w9, w0
; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, gt
; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB191_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i32_noret_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB191_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w9, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB191_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw max ptr @var32, i32 %offset seq_cst
ret void
}
define dso_local void @test_atomic_load_max_i64_noret_seq_cst(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_max_i64_noret_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsmaxal x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_noret_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var64
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB192_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp x9, x0
; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, gt
; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB192_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_max_i64_noret_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB192_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x9, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, gt
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB192_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw max ptr @var64, i64 %offset seq_cst
ret void
}
define dso_local i8 @test_atomic_load_min_i8_acq_rel(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i8_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldsminalb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i8_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var8
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
; OUTLINE-ATOMICS-NEXT: .LBB193_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrb w10, [x9]
; OUTLINE-ATOMICS-NEXT: sxtb w8, w10
; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb
; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le
; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB193_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i8_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB193_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrb w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: sxtb w8, w10
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB193_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw min ptr @var8, i8 %offset acq_rel
ret i8 %old
}
define dso_local i16 @test_atomic_load_min_i16_acq_rel(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i16_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldsminalh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i16_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var16
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
; OUTLINE-ATOMICS-NEXT: .LBB194_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]
; OUTLINE-ATOMICS-NEXT: sxth w8, w10
; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth
; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le
; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB194_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i16_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB194_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: sxth w8, w10
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB194_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw min ptr @var16, i16 %offset acq_rel
ret i16 %old
}
define dso_local i32 @test_atomic_load_min_i32_acq_rel(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i32_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsminal w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var32
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB195_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp w8, w0
; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, le
; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB195_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB195_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB195_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw min ptr @var32, i32 %offset acq_rel
ret i32 %old
}
define dso_local i64 @test_atomic_load_min_i64_acq_rel(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i64_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsminal x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var64
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB196_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp x8, x0
; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, le
; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB196_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov x0, x8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB196_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x8, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB196_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov x0, x8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw min ptr @var64, i64 %offset acq_rel
ret i64 %old
}
define dso_local void @test_atomic_load_min_i32_noret_acq_rel(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i32_noret_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsminal w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_noret_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var32
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB197_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w9, w0
; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, le
; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB197_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_noret_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB197_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w9, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB197_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw min ptr @var32, i32 %offset acq_rel
ret void
}
define dso_local void @test_atomic_load_min_i64_noret_acq_rel(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i64_noret_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsminal x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_noret_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var64
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB198_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp x9, x0
; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, le
; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB198_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_noret_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB198_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x9, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB198_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw min ptr @var64, i64 %offset acq_rel
ret void
}
define dso_local i8 @test_atomic_load_min_i8_acquire(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i8_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldsminab w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i8_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var8
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
; OUTLINE-ATOMICS-NEXT: .LBB199_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrb w10, [x9]
; OUTLINE-ATOMICS-NEXT: sxtb w8, w10
; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb
; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le
; OUTLINE-ATOMICS-NEXT: stxrb w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB199_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i8_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB199_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrb w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: sxtb w8, w10
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stxrb w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB199_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw min ptr @var8, i8 %offset acquire
ret i8 %old
}
define dso_local i16 @test_atomic_load_min_i16_acquire(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i16_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldsminah w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i16_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var16
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
; OUTLINE-ATOMICS-NEXT: .LBB200_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]
; OUTLINE-ATOMICS-NEXT: sxth w8, w10
; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth
; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le
; OUTLINE-ATOMICS-NEXT: stxrh w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB200_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i16_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB200_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: sxth w8, w10
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stxrh w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB200_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw min ptr @var16, i16 %offset acquire
ret i16 %old
}
define dso_local i32 @test_atomic_load_min_i32_acquire(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i32_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsmina w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var32
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB201_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp w8, w0
; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, le
; OUTLINE-ATOMICS-NEXT: stxr w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB201_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB201_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB201_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw min ptr @var32, i32 %offset acquire
ret i32 %old
}
define dso_local i64 @test_atomic_load_min_i64_acquire(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i64_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsmina x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var64
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB202_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp x8, x0
; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, le
; OUTLINE-ATOMICS-NEXT: stxr w11, x10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB202_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov x0, x8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB202_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x8, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w11, x10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB202_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov x0, x8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw min ptr @var64, i64 %offset acquire
ret i64 %old
}
define dso_local void @test_atomic_load_min_i32_noret_acquire(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i32_noret_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsmina w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_noret_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var32
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB203_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w9, w0
; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, le
; OUTLINE-ATOMICS-NEXT: stxr w10, w9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB203_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_noret_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB203_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w9, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w10, w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB203_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw min ptr @var32, i32 %offset acquire
ret void
}
define dso_local void @test_atomic_load_min_i64_noret_acquire(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i64_noret_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsmina x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_noret_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var64
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB204_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp x9, x0
; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, le
; OUTLINE-ATOMICS-NEXT: stxr w10, x9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB204_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_noret_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB204_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x9, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w10, x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB204_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw min ptr @var64, i64 %offset acquire
ret void
}
define dso_local i8 @test_atomic_load_min_i8_monotonic(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i8_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldsminb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i8_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var8
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
; OUTLINE-ATOMICS-NEXT: .LBB205_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxrb w10, [x9]
; OUTLINE-ATOMICS-NEXT: sxtb w8, w10
; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb
; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le
; OUTLINE-ATOMICS-NEXT: stxrb w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB205_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i8_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB205_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxrb w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: sxtb w8, w10
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stxrb w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB205_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw min ptr @var8, i8 %offset monotonic
ret i8 %old
}
define dso_local i16 @test_atomic_load_min_i16_monotonic(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i16_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldsminh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i16_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var16
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
; OUTLINE-ATOMICS-NEXT: .LBB206_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxrh w10, [x9]
; OUTLINE-ATOMICS-NEXT: sxth w8, w10
; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth
; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le
; OUTLINE-ATOMICS-NEXT: stxrh w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB206_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i16_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB206_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxrh w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: sxth w8, w10
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stxrh w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB206_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw min ptr @var16, i16 %offset monotonic
ret i16 %old
}
define dso_local i32 @test_atomic_load_min_i32_monotonic(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i32_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsmin w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var32
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB207_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr w8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp w8, w0
; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, le
; OUTLINE-ATOMICS-NEXT: stxr w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB207_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB207_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr w8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB207_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw min ptr @var32, i32 %offset monotonic
ret i32 %old
}
define dso_local i64 @test_atomic_load_min_i64_monotonic(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i64_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsmin x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var64
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB208_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr x8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp x8, x0
; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, le
; OUTLINE-ATOMICS-NEXT: stxr w11, x10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB208_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov x0, x8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB208_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr x8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x8, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w11, x10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB208_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov x0, x8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw min ptr @var64, i64 %offset monotonic
ret i64 %old
}
define dso_local void @test_atomic_load_min_i32_noret_monotonic(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i32_noret_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsmin w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_noret_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var32
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB209_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr w9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w9, w0
; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, le
; OUTLINE-ATOMICS-NEXT: stxr w10, w9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB209_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_noret_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB209_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w9, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w10, w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB209_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw min ptr @var32, i32 %offset monotonic
ret void
}
define dso_local void @test_atomic_load_min_i64_noret_monotonic(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i64_noret_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsmin x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_noret_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var64
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB210_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr x9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp x9, x0
; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, le
; OUTLINE-ATOMICS-NEXT: stxr w10, x9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB210_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_noret_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB210_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x9, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w10, x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB210_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw min ptr @var64, i64 %offset monotonic
ret void
}
define dso_local i8 @test_atomic_load_min_i8_release(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i8_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldsminlb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i8_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var8
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
; OUTLINE-ATOMICS-NEXT: .LBB211_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxrb w10, [x9]
; OUTLINE-ATOMICS-NEXT: sxtb w8, w10
; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb
; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le
; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB211_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i8_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB211_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxrb w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: sxtb w8, w10
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB211_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw min ptr @var8, i8 %offset release
ret i8 %old
}
define dso_local i16 @test_atomic_load_min_i16_release(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i16_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldsminlh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i16_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var16
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
; OUTLINE-ATOMICS-NEXT: .LBB212_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxrh w10, [x9]
; OUTLINE-ATOMICS-NEXT: sxth w8, w10
; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth
; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le
; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB212_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i16_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB212_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxrh w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: sxth w8, w10
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB212_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw min ptr @var16, i16 %offset release
ret i16 %old
}
define dso_local i32 @test_atomic_load_min_i32_release(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i32_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsminl w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var32
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB213_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr w8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp w8, w0
; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, le
; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB213_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB213_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr w8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB213_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw min ptr @var32, i32 %offset release
ret i32 %old
}
define dso_local i64 @test_atomic_load_min_i64_release(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i64_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsminl x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var64
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB214_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr x8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp x8, x0
; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, le
; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB214_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov x0, x8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB214_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr x8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x8, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB214_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov x0, x8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw min ptr @var64, i64 %offset release
ret i64 %old
}
define dso_local void @test_atomic_load_min_i32_noret_release(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i32_noret_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsminl w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_noret_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var32
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB215_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr w9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w9, w0
; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, le
; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB215_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_noret_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB215_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w9, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB215_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw min ptr @var32, i32 %offset release
ret void
}
define dso_local void @test_atomic_load_min_i64_noret_release(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i64_noret_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsminl x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_noret_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var64
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB216_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr x9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp x9, x0
; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, le
; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB216_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_noret_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB216_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x9, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB216_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw min ptr @var64, i64 %offset release
ret void
}
define dso_local i8 @test_atomic_load_min_i8_seq_cst(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i8_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldsminalb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i8_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var8
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
; OUTLINE-ATOMICS-NEXT: .LBB217_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrb w10, [x9]
; OUTLINE-ATOMICS-NEXT: sxtb w8, w10
; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb
; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le
; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB217_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i8_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB217_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrb w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: sxtb w8, w10
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxtb
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB217_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw min ptr @var8, i8 %offset seq_cst
ret i8 %old
}
define dso_local i16 @test_atomic_load_min_i16_seq_cst(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i16_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldsminalh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i16_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var16
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
; OUTLINE-ATOMICS-NEXT: .LBB218_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]
; OUTLINE-ATOMICS-NEXT: sxth w8, w10
; OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth
; OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le
; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB218_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i16_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB218_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrh w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: sxth w8, w10
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0, sxth
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w10, w0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB218_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw min ptr @var16, i16 %offset seq_cst
ret i16 %old
}
define dso_local i32 @test_atomic_load_min_i32_seq_cst(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i32_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsminal w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var32
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB219_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp w8, w0
; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, le
; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB219_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB219_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB219_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw min ptr @var32, i32 %offset seq_cst
ret i32 %old
}
define dso_local i64 @test_atomic_load_min_i64_seq_cst(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i64_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsminal x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var64
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB220_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp x8, x0
; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, le
; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB220_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov x0, x8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: mov x8, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB220_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x0, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x0, x8
; MSVC-OUTLINE-ATOMICS-NEXT: csel x10, x0, x8, le
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB220_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw min ptr @var64, i64 %offset seq_cst
ret i64 %old
}
define dso_local void @test_atomic_load_min_i32_noret_seq_cst(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i32_noret_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsminal w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_noret_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var32
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB221_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w9, w0
; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, le
; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB221_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i32_noret_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB221_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w9, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB221_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw min ptr @var32, i32 %offset seq_cst
ret void
}
define dso_local void @test_atomic_load_min_i64_noret_seq_cst(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_min_i64_noret_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsminal x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_noret_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var64
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB222_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp x9, x0
; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, le
; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB222_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_min_i64_noret_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB222_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x9, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, le
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB222_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw min ptr @var64, i64 %offset seq_cst
ret void
}
define dso_local i8 @test_atomic_load_or_i8_acq_rel(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i8_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldsetalb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i8_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset1_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i8_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset1_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw or ptr @var8, i8 %offset acq_rel
ret i8 %old
}
define dso_local i16 @test_atomic_load_or_i16_acq_rel(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i16_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldsetalh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i16_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset2_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i16_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset2_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw or ptr @var16, i16 %offset acq_rel
ret i16 %old
}
define dso_local i32 @test_atomic_load_or_i32_acq_rel(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i32_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsetal w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw or ptr @var32, i32 %offset acq_rel
ret i32 %old
}
define dso_local i64 @test_atomic_load_or_i64_acq_rel(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i64_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsetal x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw or ptr @var64, i64 %offset acq_rel
ret i64 %old
}
define dso_local void @test_atomic_load_or_i32_noret_acq_rel(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i32_noret_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsetal w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_noret_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_noret_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw or ptr @var32, i32 %offset acq_rel
ret void
}
define dso_local void @test_atomic_load_or_i64_noret_acq_rel(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i64_noret_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsetal x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_noret_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_noret_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw or ptr @var64, i64 %offset acq_rel
ret void
}
define dso_local i8 @test_atomic_load_or_i8_acquire(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i8_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldsetab w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i8_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset1_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i8_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset1_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw or ptr @var8, i8 %offset acquire
ret i8 %old
}
define dso_local i16 @test_atomic_load_or_i16_acquire(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i16_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldsetah w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i16_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset2_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i16_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset2_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw or ptr @var16, i16 %offset acquire
ret i16 %old
}
define dso_local i32 @test_atomic_load_or_i32_acquire(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i32_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldseta w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw or ptr @var32, i32 %offset acquire
ret i32 %old
}
define dso_local i64 @test_atomic_load_or_i64_acquire(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i64_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldseta x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw or ptr @var64, i64 %offset acquire
ret i64 %old
}
define dso_local void @test_atomic_load_or_i32_noret_acquire(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i32_noret_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldseta w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_noret_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_noret_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw or ptr @var32, i32 %offset acquire
ret void
}
define dso_local void @test_atomic_load_or_i64_noret_acquire(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i64_noret_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldseta x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_noret_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_noret_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw or ptr @var64, i64 %offset acquire
ret void
}
define dso_local i8 @test_atomic_load_or_i8_monotonic(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i8_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldsetb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i8_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset1_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i8_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset1_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw or ptr @var8, i8 %offset monotonic
ret i8 %old
}
define dso_local i16 @test_atomic_load_or_i16_monotonic(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i16_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldseth w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i16_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset2_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i16_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset2_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw or ptr @var16, i16 %offset monotonic
ret i16 %old
}
define dso_local i32 @test_atomic_load_or_i32_monotonic(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i32_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldset w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw or ptr @var32, i32 %offset monotonic
ret i32 %old
}
define dso_local i64 @test_atomic_load_or_i64_monotonic(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i64_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldset x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw or ptr @var64, i64 %offset monotonic
ret i64 %old
}
define dso_local void @test_atomic_load_or_i32_noret_monotonic(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i32_noret_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldset w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_noret_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_noret_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw or ptr @var32, i32 %offset monotonic
ret void
}
define dso_local void @test_atomic_load_or_i64_noret_monotonic(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i64_noret_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldset x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_noret_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_noret_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw or ptr @var64, i64 %offset monotonic
ret void
}
define dso_local i8 @test_atomic_load_or_i8_release(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i8_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldsetlb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i8_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset1_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i8_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset1_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw or ptr @var8, i8 %offset release
ret i8 %old
}
define dso_local i16 @test_atomic_load_or_i16_release(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i16_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldsetlh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i16_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset2_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i16_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset2_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw or ptr @var16, i16 %offset release
ret i16 %old
}
define dso_local i32 @test_atomic_load_or_i32_release(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i32_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsetl w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw or ptr @var32, i32 %offset release
ret i32 %old
}
define dso_local i64 @test_atomic_load_or_i64_release(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i64_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsetl x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw or ptr @var64, i64 %offset release
ret i64 %old
}
define dso_local void @test_atomic_load_or_i32_noret_release(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i32_noret_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsetl w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_noret_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_noret_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw or ptr @var32, i32 %offset release
ret void
}
define dso_local void @test_atomic_load_or_i64_noret_release(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i64_noret_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsetl x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_noret_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_noret_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw or ptr @var64, i64 %offset release
ret void
}
define dso_local i8 @test_atomic_load_or_i8_seq_cst(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i8_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldsetalb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i8_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset1_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i8_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset1_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw or ptr @var8, i8 %offset seq_cst
ret i8 %old
}
define dso_local i16 @test_atomic_load_or_i16_seq_cst(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i16_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldsetalh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i16_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset2_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i16_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset2_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw or ptr @var16, i16 %offset seq_cst
ret i16 %old
}
define dso_local i32 @test_atomic_load_or_i32_seq_cst(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i32_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsetal w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw or ptr @var32, i32 %offset seq_cst
ret i32 %old
}
define dso_local i64 @test_atomic_load_or_i64_seq_cst(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i64_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsetal x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw or ptr @var64, i64 %offset seq_cst
ret i64 %old
}
define dso_local void @test_atomic_load_or_i32_noret_seq_cst(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i32_noret_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldsetal w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_noret_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i32_noret_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw or ptr @var32, i32 %offset seq_cst
ret void
}
define dso_local void @test_atomic_load_or_i64_noret_seq_cst(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_or_i64_noret_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldsetal x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_noret_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_or_i64_noret_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldset8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw or ptr @var64, i64 %offset seq_cst
ret void
}
define dso_local i8 @test_atomic_load_sub_i8_acq_rel(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i8_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: neg w8, w0
; CHECK-NEXT: adrp x9, var8
; CHECK-NEXT: add x9, x9, :lo12:var8
; CHECK-NEXT: ldaddalb w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i8_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i8_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw sub ptr @var8, i8 %offset acq_rel
ret i8 %old
}
define dso_local i16 @test_atomic_load_sub_i16_acq_rel(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i16_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: neg w8, w0
; CHECK-NEXT: adrp x9, var16
; CHECK-NEXT: add x9, x9, :lo12:var16
; CHECK-NEXT: ldaddalh w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i16_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i16_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw sub ptr @var16, i16 %offset acq_rel
ret i16 %old
}
define dso_local i32 @test_atomic_load_sub_i32_acq_rel(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i32_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: neg w8, w0
; CHECK-NEXT: adrp x9, var32
; CHECK-NEXT: add x9, x9, :lo12:var32
; CHECK-NEXT: ldaddal w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw sub ptr @var32, i32 %offset acq_rel
ret i32 %old
}
define dso_local i64 @test_atomic_load_sub_i64_acq_rel(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i64_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: neg x8, x0
; CHECK-NEXT: adrp x9, var64
; CHECK-NEXT: add x9, x9, :lo12:var64
; CHECK-NEXT: ldaddal x8, x0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg x0, x0
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw sub ptr @var64, i64 %offset acq_rel
ret i64 %old
}
define dso_local void @test_atomic_load_sub_i32_noret_acq_rel(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i32_noret_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: neg w8, w0
; CHECK-NEXT: adrp x9, var32
; CHECK-NEXT: add x9, x9, :lo12:var32
; CHECK-NEXT: ldaddal w8, w8, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_noret_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_noret_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw sub ptr @var32, i32 %offset acq_rel
ret void
}
define dso_local void @test_atomic_load_sub_i64_noret_acq_rel(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i64_noret_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: neg x8, x0
; CHECK-NEXT: adrp x9, var64
; CHECK-NEXT: add x9, x9, :lo12:var64
; CHECK-NEXT: ldaddal x8, x8, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_noret_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg x0, x0
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_noret_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw sub ptr @var64, i64 %offset acq_rel
ret void
}
define dso_local i8 @test_atomic_load_sub_i8_acquire(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i8_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: neg w8, w0
; CHECK-NEXT: adrp x9, var8
; CHECK-NEXT: add x9, x9, :lo12:var8
; CHECK-NEXT: ldaddab w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i8_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i8_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw sub ptr @var8, i8 %offset acquire
ret i8 %old
}
define dso_local i16 @test_atomic_load_sub_i16_acquire(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i16_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: neg w8, w0
; CHECK-NEXT: adrp x9, var16
; CHECK-NEXT: add x9, x9, :lo12:var16
; CHECK-NEXT: ldaddah w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i16_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i16_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw sub ptr @var16, i16 %offset acquire
ret i16 %old
}
define dso_local i32 @test_atomic_load_sub_i32_acquire(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i32_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: neg w8, w0
; CHECK-NEXT: adrp x9, var32
; CHECK-NEXT: add x9, x9, :lo12:var32
; CHECK-NEXT: ldadda w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw sub ptr @var32, i32 %offset acquire
ret i32 %old
}
define dso_local i64 @test_atomic_load_sub_i64_acquire(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i64_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: neg x8, x0
; CHECK-NEXT: adrp x9, var64
; CHECK-NEXT: add x9, x9, :lo12:var64
; CHECK-NEXT: ldadda x8, x0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg x0, x0
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw sub ptr @var64, i64 %offset acquire
ret i64 %old
}
define dso_local void @test_atomic_load_sub_i32_noret_acquire(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i32_noret_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: neg w8, w0
; CHECK-NEXT: adrp x9, var32
; CHECK-NEXT: add x9, x9, :lo12:var32
; CHECK-NEXT: ldadda w8, w8, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_noret_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_noret_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw sub ptr @var32, i32 %offset acquire
ret void
}
define dso_local void @test_atomic_load_sub_i64_noret_acquire(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i64_noret_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: neg x8, x0
; CHECK-NEXT: adrp x9, var64
; CHECK-NEXT: add x9, x9, :lo12:var64
; CHECK-NEXT: ldadda x8, x8, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_noret_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg x0, x0
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_noret_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw sub ptr @var64, i64 %offset acquire
ret void
}
define dso_local i8 @test_atomic_load_sub_i8_monotonic(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i8_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: neg w8, w0
; CHECK-NEXT: adrp x9, var8
; CHECK-NEXT: add x9, x9, :lo12:var8
; CHECK-NEXT: ldaddb w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i8_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i8_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw sub ptr @var8, i8 %offset monotonic
ret i8 %old
}
define dso_local i16 @test_atomic_load_sub_i16_monotonic(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i16_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: neg w8, w0
; CHECK-NEXT: adrp x9, var16
; CHECK-NEXT: add x9, x9, :lo12:var16
; CHECK-NEXT: ldaddh w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i16_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i16_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw sub ptr @var16, i16 %offset monotonic
ret i16 %old
}
define dso_local i32 @test_atomic_load_sub_i32_monotonic(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i32_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: neg w8, w0
; CHECK-NEXT: adrp x9, var32
; CHECK-NEXT: add x9, x9, :lo12:var32
; CHECK-NEXT: ldadd w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw sub ptr @var32, i32 %offset monotonic
ret i32 %old
}
define dso_local i64 @test_atomic_load_sub_i64_monotonic(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i64_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: neg x8, x0
; CHECK-NEXT: adrp x9, var64
; CHECK-NEXT: add x9, x9, :lo12:var64
; CHECK-NEXT: ldadd x8, x0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg x0, x0
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw sub ptr @var64, i64 %offset monotonic
ret i64 %old
}
define dso_local void @test_atomic_load_sub_i32_noret_monotonic(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i32_noret_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: neg w8, w0
; CHECK-NEXT: adrp x9, var32
; CHECK-NEXT: add x9, x9, :lo12:var32
; CHECK-NEXT: ldadd w8, w8, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_noret_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_noret_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw sub ptr @var32, i32 %offset monotonic
ret void
}
define dso_local void @test_atomic_load_sub_i64_noret_monotonic(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i64_noret_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: neg x8, x0
; CHECK-NEXT: adrp x9, var64
; CHECK-NEXT: add x9, x9, :lo12:var64
; CHECK-NEXT: ldadd x8, x8, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_noret_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg x0, x0
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_noret_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw sub ptr @var64, i64 %offset monotonic
ret void
}
define dso_local i8 @test_atomic_load_sub_i8_release(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i8_release:
; CHECK: // %bb.0:
; CHECK-NEXT: neg w8, w0
; CHECK-NEXT: adrp x9, var8
; CHECK-NEXT: add x9, x9, :lo12:var8
; CHECK-NEXT: ldaddlb w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i8_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i8_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw sub ptr @var8, i8 %offset release
ret i8 %old
}
define dso_local i16 @test_atomic_load_sub_i16_release(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i16_release:
; CHECK: // %bb.0:
; CHECK-NEXT: neg w8, w0
; CHECK-NEXT: adrp x9, var16
; CHECK-NEXT: add x9, x9, :lo12:var16
; CHECK-NEXT: ldaddlh w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i16_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i16_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw sub ptr @var16, i16 %offset release
ret i16 %old
}
define dso_local i32 @test_atomic_load_sub_i32_release(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i32_release:
; CHECK: // %bb.0:
; CHECK-NEXT: neg w8, w0
; CHECK-NEXT: adrp x9, var32
; CHECK-NEXT: add x9, x9, :lo12:var32
; CHECK-NEXT: ldaddl w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw sub ptr @var32, i32 %offset release
ret i32 %old
}
define dso_local i64 @test_atomic_load_sub_i64_release(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i64_release:
; CHECK: // %bb.0:
; CHECK-NEXT: neg x8, x0
; CHECK-NEXT: adrp x9, var64
; CHECK-NEXT: add x9, x9, :lo12:var64
; CHECK-NEXT: ldaddl x8, x0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg x0, x0
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw sub ptr @var64, i64 %offset release
ret i64 %old
}
define dso_local void @test_atomic_load_sub_i32_noret_release(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i32_noret_release:
; CHECK: // %bb.0:
; CHECK-NEXT: neg w8, w0
; CHECK-NEXT: adrp x9, var32
; CHECK-NEXT: add x9, x9, :lo12:var32
; CHECK-NEXT: ldaddl w8, w8, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_noret_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_noret_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw sub ptr @var32, i32 %offset release
ret void
}
define dso_local void @test_atomic_load_sub_i64_noret_release(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i64_noret_release:
; CHECK: // %bb.0:
; CHECK-NEXT: neg x8, x0
; CHECK-NEXT: adrp x9, var64
; CHECK-NEXT: add x9, x9, :lo12:var64
; CHECK-NEXT: ldaddl x8, x8, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_noret_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg x0, x0
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_noret_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw sub ptr @var64, i64 %offset release
ret void
}
define dso_local i8 @test_atomic_load_sub_i8_seq_cst(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i8_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: neg w8, w0
; CHECK-NEXT: adrp x9, var8
; CHECK-NEXT: add x9, x9, :lo12:var8
; CHECK-NEXT: ldaddalb w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i8_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i8_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw sub ptr @var8, i8 %offset seq_cst
ret i8 %old
}
define dso_local i16 @test_atomic_load_sub_i16_seq_cst(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i16_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: neg w8, w0
; CHECK-NEXT: adrp x9, var16
; CHECK-NEXT: add x9, x9, :lo12:var16
; CHECK-NEXT: ldaddalh w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i16_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i16_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw sub ptr @var16, i16 %offset seq_cst
ret i16 %old
}
define dso_local i32 @test_atomic_load_sub_i32_seq_cst(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i32_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: neg w8, w0
; CHECK-NEXT: adrp x9, var32
; CHECK-NEXT: add x9, x9, :lo12:var32
; CHECK-NEXT: ldaddal w8, w0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw sub ptr @var32, i32 %offset seq_cst
ret i32 %old
}
define dso_local i64 @test_atomic_load_sub_i64_seq_cst(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i64_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: neg x8, x0
; CHECK-NEXT: adrp x9, var64
; CHECK-NEXT: add x9, x9, :lo12:var64
; CHECK-NEXT: ldaddal x8, x0, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg x0, x0
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw sub ptr @var64, i64 %offset seq_cst
ret i64 %old
}
define dso_local void @test_atomic_load_sub_i32_noret_seq_cst(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i32_noret_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: neg w8, w0
; CHECK-NEXT: adrp x9, var32
; CHECK-NEXT: add x9, x9, :lo12:var32
; CHECK-NEXT: ldaddal w8, w8, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_noret_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_noret_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw sub ptr @var32, i32 %offset seq_cst
ret void
}
define dso_local void @test_atomic_load_sub_i64_noret_seq_cst(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_sub_i64_noret_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: neg x8, x0
; CHECK-NEXT: adrp x9, var64
; CHECK-NEXT: add x9, x9, :lo12:var64
; CHECK-NEXT: ldaddal x8, x8, [x9]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_noret_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: neg x0, x0
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_noret_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: neg x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw sub ptr @var64, i64 %offset seq_cst
ret void
}
define dso_local i8 @test_atomic_load_xchg_i8_acq_rel(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i8_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: swpalb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i8_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp1_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i8_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp1_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xchg ptr @var8, i8 %offset acq_rel
ret i8 %old
}
define dso_local i16 @test_atomic_load_xchg_i16_acq_rel(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i16_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: swpalh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i16_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp2_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i16_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp2_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xchg ptr @var16, i16 %offset acq_rel
ret i16 %old
}
define dso_local i32 @test_atomic_load_xchg_i32_acq_rel(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i32_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: swpal w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xchg ptr @var32, i32 %offset acq_rel
ret i32 %old
}
define dso_local i64 @test_atomic_load_xchg_i64_acq_rel(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i64_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: swpal x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xchg ptr @var64, i64 %offset acq_rel
ret i64 %old
}
define dso_local void @test_atomic_load_xchg_i32_noret_acq_rel(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i32_noret_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: swpal w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_noret_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_noret_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw xchg ptr @var32, i32 %offset acq_rel
ret void
}
define dso_local void @test_atomic_load_xchg_i64_noret_acq_rel(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i64_noret_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: swpal x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_noret_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_noret_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw xchg ptr @var64, i64 %offset acq_rel
ret void
}
define dso_local i8 @test_atomic_load_xchg_i8_acquire(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i8_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: swpab w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i8_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp1_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i8_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp1_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xchg ptr @var8, i8 %offset acquire
ret i8 %old
}
define dso_local i16 @test_atomic_load_xchg_i16_acquire(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i16_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: swpah w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i16_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp2_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i16_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp2_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xchg ptr @var16, i16 %offset acquire
ret i16 %old
}
define dso_local i32 @test_atomic_load_xchg_i32_acquire(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i32_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: swpa w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xchg ptr @var32, i32 %offset acquire
ret i32 %old
}
define dso_local i64 @test_atomic_load_xchg_i64_acquire(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i64_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: swpa x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xchg ptr @var64, i64 %offset acquire
ret i64 %old
}
define dso_local void @test_atomic_load_xchg_i32_noret_acquire(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i32_noret_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: swpa w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_noret_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_noret_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw xchg ptr @var32, i32 %offset acquire
ret void
}
define dso_local void @test_atomic_load_xchg_i64_noret_acquire(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i64_noret_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: swpa x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_noret_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_noret_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw xchg ptr @var64, i64 %offset acquire
ret void
}
define dso_local i8 @test_atomic_load_xchg_i8_monotonic(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i8_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: swpb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i8_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp1_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i8_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp1_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xchg ptr @var8, i8 %offset monotonic
ret i8 %old
}
define dso_local i16 @test_atomic_load_xchg_i16_monotonic(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i16_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: swph w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i16_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp2_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i16_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp2_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xchg ptr @var16, i16 %offset monotonic
ret i16 %old
}
define dso_local i32 @test_atomic_load_xchg_i32_monotonic(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i32_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: swp w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xchg ptr @var32, i32 %offset monotonic
ret i32 %old
}
define dso_local i64 @test_atomic_load_xchg_i64_monotonic(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i64_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: swp x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xchg ptr @var64, i64 %offset monotonic
ret i64 %old
}
define dso_local void @test_atomic_load_xchg_i32_noret_monotonic(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i32_noret_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: swp w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_noret_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_noret_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw xchg ptr @var32, i32 %offset monotonic
ret void
}
define dso_local void @test_atomic_load_xchg_i64_noret_monotonic(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i64_noret_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: swp x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_noret_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_noret_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw xchg ptr @var64, i64 %offset monotonic
ret void
}
define dso_local i8 @test_atomic_load_xchg_i8_release(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i8_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: swplb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i8_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp1_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i8_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp1_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xchg ptr @var8, i8 %offset release
ret i8 %old
}
define dso_local i16 @test_atomic_load_xchg_i16_release(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i16_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: swplh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i16_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp2_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i16_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp2_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xchg ptr @var16, i16 %offset release
ret i16 %old
}
define dso_local i32 @test_atomic_load_xchg_i32_release(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i32_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: swpl w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xchg ptr @var32, i32 %offset release
ret i32 %old
}
define dso_local i64 @test_atomic_load_xchg_i64_release(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i64_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: swpl x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xchg ptr @var64, i64 %offset release
ret i64 %old
}
define dso_local void @test_atomic_load_xchg_i32_noret_release(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i32_noret_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: swpl w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_noret_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_noret_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw xchg ptr @var32, i32 %offset release
ret void
}
define dso_local void @test_atomic_load_xchg_i64_noret_release(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i64_noret_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: swpl x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_noret_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_noret_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw xchg ptr @var64, i64 %offset release
ret void
}
define dso_local i8 @test_atomic_load_xchg_i8_seq_cst(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i8_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: swpalb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i8_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp1_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i8_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp1_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xchg ptr @var8, i8 %offset seq_cst
ret i8 %old
}
define dso_local i16 @test_atomic_load_xchg_i16_seq_cst(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i16_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: swpalh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i16_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp2_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i16_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp2_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xchg ptr @var16, i16 %offset seq_cst
ret i16 %old
}
define dso_local i32 @test_atomic_load_xchg_i32_seq_cst(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i32_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: swpal w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xchg ptr @var32, i32 %offset seq_cst
ret i32 %old
}
define dso_local i64 @test_atomic_load_xchg_i64_seq_cst(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i64_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: swpal x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xchg ptr @var64, i64 %offset seq_cst
ret i64 %old
}
define dso_local void @test_atomic_load_xchg_i32_noret_seq_cst(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i32_noret_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: swpal w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_noret_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i32_noret_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw xchg ptr @var32, i32 %offset seq_cst
ret void
}
define dso_local void @test_atomic_load_xchg_i64_noret_seq_cst(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xchg_i64_noret_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: swpal x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_noret_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xchg_i64_noret_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_swp8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw xchg ptr @var64, i64 %offset seq_cst
ret void
}
define dso_local i8 @test_atomic_load_umax_i8_acq_rel(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i8_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldumaxalb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i8_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var8
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var8
; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff
; OUTLINE-ATOMICS-NEXT: .LBB313_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrb w0, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w0, w9
; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi
; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB313_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i8_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB313_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrb w0, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w0, w9
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB313_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umax ptr @var8, i8 %offset acq_rel
ret i8 %old
}
define dso_local i16 @test_atomic_load_umax_i16_acq_rel(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i16_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldumaxalh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i16_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var16
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var16
; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff
; OUTLINE-ATOMICS-NEXT: .LBB314_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrh w0, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w0, w9
; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi
; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB314_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i16_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB314_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrh w0, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w0, w9
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB314_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umax ptr @var16, i16 %offset acq_rel
ret i16 %old
}
define dso_local i32 @test_atomic_load_umax_i32_acq_rel(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i32_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldumaxal w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var32
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB315_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp w8, w0
; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, hi
; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB315_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB315_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB315_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umax ptr @var32, i32 %offset acq_rel
ret i32 %old
}
define dso_local i64 @test_atomic_load_umax_i64_acq_rel(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i64_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldumaxal x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var64
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB316_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp x8, x0
; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, hi
; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB316_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov x0, x8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB316_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x8, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB316_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov x0, x8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umax ptr @var64, i64 %offset acq_rel
ret i64 %old
}
define dso_local void @test_atomic_load_umax_i32_noret_acq_rel(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i32_noret_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldumaxal w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_noret_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var32
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB317_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w9, w0
; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, hi
; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB317_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_noret_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB317_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w9, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB317_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw umax ptr @var32, i32 %offset acq_rel
ret void
}
define dso_local void @test_atomic_load_umax_i64_noret_acq_rel(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i64_noret_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldumaxal x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_noret_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var64
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB318_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp x9, x0
; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, hi
; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB318_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_noret_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB318_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x9, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB318_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw umax ptr @var64, i64 %offset acq_rel
ret void
}
define dso_local i8 @test_atomic_load_umax_i8_acquire(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i8_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldumaxab w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i8_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var8
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var8
; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff
; OUTLINE-ATOMICS-NEXT: .LBB319_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrb w0, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w0, w9
; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi
; OUTLINE-ATOMICS-NEXT: stxrb w11, w10, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB319_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i8_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB319_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrb w0, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w0, w9
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stxrb w11, w10, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB319_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umax ptr @var8, i8 %offset acquire
ret i8 %old
}
define dso_local i16 @test_atomic_load_umax_i16_acquire(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i16_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldumaxah w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i16_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var16
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var16
; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff
; OUTLINE-ATOMICS-NEXT: .LBB320_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrh w0, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w0, w9
; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi
; OUTLINE-ATOMICS-NEXT: stxrh w11, w10, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB320_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i16_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB320_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrh w0, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w0, w9
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stxrh w11, w10, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB320_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umax ptr @var16, i16 %offset acquire
ret i16 %old
}
define dso_local i32 @test_atomic_load_umax_i32_acquire(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i32_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldumaxa w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var32
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB321_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp w8, w0
; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, hi
; OUTLINE-ATOMICS-NEXT: stxr w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB321_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB321_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB321_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umax ptr @var32, i32 %offset acquire
ret i32 %old
}
define dso_local i64 @test_atomic_load_umax_i64_acquire(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i64_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldumaxa x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var64
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB322_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp x8, x0
; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, hi
; OUTLINE-ATOMICS-NEXT: stxr w11, x10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB322_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov x0, x8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB322_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x8, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w11, x10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB322_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov x0, x8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umax ptr @var64, i64 %offset acquire
ret i64 %old
}
define dso_local void @test_atomic_load_umax_i32_noret_acquire(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i32_noret_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldumaxa w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_noret_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var32
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB323_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w9, w0
; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, hi
; OUTLINE-ATOMICS-NEXT: stxr w10, w9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB323_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_noret_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB323_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w9, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w10, w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB323_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw umax ptr @var32, i32 %offset acquire
ret void
}
define dso_local void @test_atomic_load_umax_i64_noret_acquire(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i64_noret_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldumaxa x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_noret_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var64
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB324_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp x9, x0
; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, hi
; OUTLINE-ATOMICS-NEXT: stxr w10, x9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB324_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_noret_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB324_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x9, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w10, x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB324_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw umax ptr @var64, i64 %offset acquire
ret void
}
define dso_local i8 @test_atomic_load_umax_i8_monotonic(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i8_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldumaxb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i8_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var8
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var8
; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff
; OUTLINE-ATOMICS-NEXT: .LBB325_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxrb w0, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w0, w9
; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi
; OUTLINE-ATOMICS-NEXT: stxrb w11, w10, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB325_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i8_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB325_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxrb w0, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w0, w9
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stxrb w11, w10, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB325_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umax ptr @var8, i8 %offset monotonic
ret i8 %old
}
define dso_local i16 @test_atomic_load_umax_i16_monotonic(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i16_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldumaxh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i16_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var16
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var16
; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff
; OUTLINE-ATOMICS-NEXT: .LBB326_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxrh w0, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w0, w9
; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi
; OUTLINE-ATOMICS-NEXT: stxrh w11, w10, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB326_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i16_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB326_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxrh w0, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w0, w9
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stxrh w11, w10, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB326_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umax ptr @var16, i16 %offset monotonic
ret i16 %old
}
define dso_local i32 @test_atomic_load_umax_i32_monotonic(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i32_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldumax w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var32
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB327_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr w8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp w8, w0
; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, hi
; OUTLINE-ATOMICS-NEXT: stxr w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB327_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB327_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr w8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB327_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umax ptr @var32, i32 %offset monotonic
ret i32 %old
}
define dso_local i64 @test_atomic_load_umax_i64_monotonic(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i64_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldumax x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var64
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB328_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr x8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp x8, x0
; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, hi
; OUTLINE-ATOMICS-NEXT: stxr w11, x10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB328_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov x0, x8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB328_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr x8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x8, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w11, x10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB328_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov x0, x8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umax ptr @var64, i64 %offset monotonic
ret i64 %old
}
define dso_local void @test_atomic_load_umax_i32_noret_monotonic(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i32_noret_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldumax w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_noret_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var32
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB329_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr w9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w9, w0
; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, hi
; OUTLINE-ATOMICS-NEXT: stxr w10, w9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB329_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_noret_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB329_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w9, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w10, w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB329_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw umax ptr @var32, i32 %offset monotonic
ret void
}
define dso_local void @test_atomic_load_umax_i64_noret_monotonic(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i64_noret_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldumax x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_noret_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var64
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB330_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr x9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp x9, x0
; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, hi
; OUTLINE-ATOMICS-NEXT: stxr w10, x9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB330_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_noret_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB330_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x9, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w10, x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB330_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw umax ptr @var64, i64 %offset monotonic
ret void
}
define dso_local i8 @test_atomic_load_umax_i8_release(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i8_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldumaxlb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i8_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var8
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var8
; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff
; OUTLINE-ATOMICS-NEXT: .LBB331_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxrb w0, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w0, w9
; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi
; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB331_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i8_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB331_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxrb w0, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w0, w9
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB331_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umax ptr @var8, i8 %offset release
ret i8 %old
}
define dso_local i16 @test_atomic_load_umax_i16_release(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i16_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldumaxlh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i16_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var16
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var16
; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff
; OUTLINE-ATOMICS-NEXT: .LBB332_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxrh w0, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w0, w9
; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi
; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB332_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i16_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB332_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxrh w0, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w0, w9
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB332_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umax ptr @var16, i16 %offset release
ret i16 %old
}
define dso_local i32 @test_atomic_load_umax_i32_release(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i32_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldumaxl w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var32
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB333_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr w8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp w8, w0
; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, hi
; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB333_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB333_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr w8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB333_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umax ptr @var32, i32 %offset release
ret i32 %old
}
define dso_local i64 @test_atomic_load_umax_i64_release(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i64_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldumaxl x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var64
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB334_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr x8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp x8, x0
; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, hi
; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB334_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov x0, x8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB334_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr x8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x8, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB334_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov x0, x8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umax ptr @var64, i64 %offset release
ret i64 %old
}
define dso_local void @test_atomic_load_umax_i32_noret_release(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i32_noret_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldumaxl w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_noret_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var32
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB335_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr w9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w9, w0
; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, hi
; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB335_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_noret_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB335_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w9, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB335_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw umax ptr @var32, i32 %offset release
ret void
}
define dso_local void @test_atomic_load_umax_i64_noret_release(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i64_noret_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldumaxl x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_noret_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var64
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB336_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr x9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp x9, x0
; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, hi
; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB336_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_noret_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB336_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x9, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB336_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw umax ptr @var64, i64 %offset release
ret void
}
define dso_local i8 @test_atomic_load_umax_i8_seq_cst(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i8_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldumaxalb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i8_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var8
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var8
; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff
; OUTLINE-ATOMICS-NEXT: .LBB337_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrb w0, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w0, w9
; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi
; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB337_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i8_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB337_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrb w0, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w0, w9
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB337_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umax ptr @var8, i8 %offset seq_cst
ret i8 %old
}
define dso_local i16 @test_atomic_load_umax_i16_seq_cst(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i16_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldumaxalh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i16_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var16
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var16
; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff
; OUTLINE-ATOMICS-NEXT: .LBB338_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrh w0, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w0, w9
; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi
; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB338_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i16_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB338_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrh w0, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w0, w9
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB338_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umax ptr @var16, i16 %offset seq_cst
ret i16 %old
}
define dso_local i32 @test_atomic_load_umax_i32_seq_cst(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i32_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldumaxal w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var32
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB339_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp w8, w0
; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, hi
; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB339_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB339_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB339_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umax ptr @var32, i32 %offset seq_cst
ret i32 %old
}
define dso_local i64 @test_atomic_load_umax_i64_seq_cst(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i64_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldumaxal x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var64
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB340_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp x8, x0
; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, hi
; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB340_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov x0, x8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: mov x8, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB340_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x0, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x0, x8
; MSVC-OUTLINE-ATOMICS-NEXT: csel x10, x0, x8, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB340_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umax ptr @var64, i64 %offset seq_cst
ret i64 %old
}
define dso_local void @test_atomic_load_umax_i32_noret_seq_cst(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i32_noret_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldumaxal w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_noret_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var32
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB341_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w9, w0
; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, hi
; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB341_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i32_noret_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB341_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w9, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB341_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw umax ptr @var32, i32 %offset seq_cst
ret void
}
define dso_local void @test_atomic_load_umax_i64_noret_seq_cst(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umax_i64_noret_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldumaxal x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_noret_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var64
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB342_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp x9, x0
; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, hi
; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB342_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umax_i64_noret_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB342_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x9, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, hi
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB342_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw umax ptr @var64, i64 %offset seq_cst
ret void
}
define dso_local i8 @test_atomic_load_umin_i8_acq_rel(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i8_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: lduminalb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i8_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var8
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var8
; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff
; OUTLINE-ATOMICS-NEXT: .LBB343_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrb w0, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w0, w9
; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls
; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB343_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i8_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB343_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrb w0, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w0, w9
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB343_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umin ptr @var8, i8 %offset acq_rel
ret i8 %old
}
define dso_local i16 @test_atomic_load_umin_i16_acq_rel(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i16_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: lduminalh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i16_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var16
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var16
; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff
; OUTLINE-ATOMICS-NEXT: .LBB344_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrh w0, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w0, w9
; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls
; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB344_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i16_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB344_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrh w0, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w0, w9
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB344_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umin ptr @var16, i16 %offset acq_rel
ret i16 %old
}
define dso_local i32 @test_atomic_load_umin_i32_acq_rel(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i32_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: lduminal w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var32
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB345_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp w8, w0
; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, ls
; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB345_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB345_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB345_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umin ptr @var32, i32 %offset acq_rel
ret i32 %old
}
define dso_local i64 @test_atomic_load_umin_i64_acq_rel(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i64_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: lduminal x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var64
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB346_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp x8, x0
; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, ls
; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB346_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov x0, x8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB346_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x8, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB346_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov x0, x8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umin ptr @var64, i64 %offset acq_rel
ret i64 %old
}
define dso_local void @test_atomic_load_umin_i32_noret_acq_rel(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i32_noret_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: lduminal w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_noret_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var32
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB347_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w9, w0
; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, ls
; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB347_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_noret_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB347_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w9, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB347_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw umin ptr @var32, i32 %offset acq_rel
ret void
}
define dso_local void @test_atomic_load_umin_i64_noret_acq_rel(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i64_noret_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: lduminal x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_noret_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var64
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB348_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp x9, x0
; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, ls
; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB348_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_noret_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB348_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x9, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB348_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw umin ptr @var64, i64 %offset acq_rel
ret void
}
define dso_local i8 @test_atomic_load_umin_i8_acquire(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i8_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: lduminab w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i8_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var8
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var8
; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff
; OUTLINE-ATOMICS-NEXT: .LBB349_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrb w0, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w0, w9
; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls
; OUTLINE-ATOMICS-NEXT: stxrb w11, w10, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB349_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i8_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB349_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrb w0, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w0, w9
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stxrb w11, w10, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB349_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umin ptr @var8, i8 %offset acquire
ret i8 %old
}
define dso_local i16 @test_atomic_load_umin_i16_acquire(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i16_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: lduminah w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i16_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var16
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var16
; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff
; OUTLINE-ATOMICS-NEXT: .LBB350_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrh w0, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w0, w9
; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls
; OUTLINE-ATOMICS-NEXT: stxrh w11, w10, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB350_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i16_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB350_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrh w0, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w0, w9
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stxrh w11, w10, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB350_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umin ptr @var16, i16 %offset acquire
ret i16 %old
}
define dso_local i32 @test_atomic_load_umin_i32_acquire(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i32_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldumina w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var32
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB351_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp w8, w0
; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, ls
; OUTLINE-ATOMICS-NEXT: stxr w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB351_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB351_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB351_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umin ptr @var32, i32 %offset acquire
ret i32 %old
}
define dso_local i64 @test_atomic_load_umin_i64_acquire(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i64_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldumina x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var64
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB352_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp x8, x0
; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, ls
; OUTLINE-ATOMICS-NEXT: stxr w11, x10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB352_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov x0, x8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB352_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x8, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w11, x10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB352_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov x0, x8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umin ptr @var64, i64 %offset acquire
ret i64 %old
}
define dso_local void @test_atomic_load_umin_i32_noret_acquire(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i32_noret_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldumina w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_noret_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var32
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB353_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w9, w0
; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, ls
; OUTLINE-ATOMICS-NEXT: stxr w10, w9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB353_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_noret_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB353_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w9, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w10, w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB353_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw umin ptr @var32, i32 %offset acquire
ret void
}
define dso_local void @test_atomic_load_umin_i64_noret_acquire(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i64_noret_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldumina x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_noret_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var64
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB354_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp x9, x0
; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, ls
; OUTLINE-ATOMICS-NEXT: stxr w10, x9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB354_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_noret_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB354_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x9, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w10, x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB354_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw umin ptr @var64, i64 %offset acquire
ret void
}
define dso_local i8 @test_atomic_load_umin_i8_monotonic(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i8_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: lduminb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i8_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var8
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var8
; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff
; OUTLINE-ATOMICS-NEXT: .LBB355_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxrb w0, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w0, w9
; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls
; OUTLINE-ATOMICS-NEXT: stxrb w11, w10, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB355_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i8_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB355_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxrb w0, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w0, w9
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stxrb w11, w10, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB355_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umin ptr @var8, i8 %offset monotonic
ret i8 %old
}
define dso_local i16 @test_atomic_load_umin_i16_monotonic(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i16_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: lduminh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i16_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var16
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var16
; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff
; OUTLINE-ATOMICS-NEXT: .LBB356_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxrh w0, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w0, w9
; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls
; OUTLINE-ATOMICS-NEXT: stxrh w11, w10, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB356_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i16_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB356_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxrh w0, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w0, w9
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stxrh w11, w10, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB356_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umin ptr @var16, i16 %offset monotonic
ret i16 %old
}
define dso_local i32 @test_atomic_load_umin_i32_monotonic(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i32_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldumin w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var32
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB357_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr w8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp w8, w0
; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, ls
; OUTLINE-ATOMICS-NEXT: stxr w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB357_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB357_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr w8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB357_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umin ptr @var32, i32 %offset monotonic
ret i32 %old
}
define dso_local i64 @test_atomic_load_umin_i64_monotonic(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i64_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldumin x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var64
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB358_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr x8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp x8, x0
; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, ls
; OUTLINE-ATOMICS-NEXT: stxr w11, x10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB358_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov x0, x8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB358_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr x8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x8, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w11, x10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB358_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov x0, x8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umin ptr @var64, i64 %offset monotonic
ret i64 %old
}
define dso_local void @test_atomic_load_umin_i32_noret_monotonic(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i32_noret_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldumin w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_noret_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var32
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB359_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr w9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w9, w0
; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, ls
; OUTLINE-ATOMICS-NEXT: stxr w10, w9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB359_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_noret_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB359_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w9, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w10, w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB359_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw umin ptr @var32, i32 %offset monotonic
ret void
}
define dso_local void @test_atomic_load_umin_i64_noret_monotonic(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i64_noret_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldumin x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_noret_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var64
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB360_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr x9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp x9, x0
; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, ls
; OUTLINE-ATOMICS-NEXT: stxr w10, x9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB360_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_noret_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB360_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x9, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stxr w10, x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB360_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw umin ptr @var64, i64 %offset monotonic
ret void
}
define dso_local i8 @test_atomic_load_umin_i8_release(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i8_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: lduminlb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i8_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var8
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var8
; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff
; OUTLINE-ATOMICS-NEXT: .LBB361_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxrb w0, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w0, w9
; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls
; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB361_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i8_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB361_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxrb w0, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w0, w9
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB361_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umin ptr @var8, i8 %offset release
ret i8 %old
}
define dso_local i16 @test_atomic_load_umin_i16_release(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i16_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: lduminlh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i16_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var16
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var16
; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff
; OUTLINE-ATOMICS-NEXT: .LBB362_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxrh w0, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w0, w9
; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls
; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB362_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i16_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB362_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxrh w0, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w0, w9
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB362_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umin ptr @var16, i16 %offset release
ret i16 %old
}
define dso_local i32 @test_atomic_load_umin_i32_release(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i32_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: lduminl w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var32
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB363_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr w8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp w8, w0
; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, ls
; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB363_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB363_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr w8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB363_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umin ptr @var32, i32 %offset release
ret i32 %old
}
define dso_local i64 @test_atomic_load_umin_i64_release(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i64_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: lduminl x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var64
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB364_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr x8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp x8, x0
; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, ls
; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB364_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov x0, x8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB364_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr x8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x8, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB364_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov x0, x8
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umin ptr @var64, i64 %offset release
ret i64 %old
}
define dso_local void @test_atomic_load_umin_i32_noret_release(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i32_noret_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: lduminl w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_noret_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var32
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB365_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr w9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w9, w0
; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, ls
; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB365_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_noret_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB365_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w9, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB365_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw umin ptr @var32, i32 %offset release
ret void
}
define dso_local void @test_atomic_load_umin_i64_noret_release(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i64_noret_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: lduminl x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_noret_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var64
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB366_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxr x9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp x9, x0
; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, ls
; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB366_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_noret_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB366_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxr x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x9, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB366_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw umin ptr @var64, i64 %offset release
ret void
}
define dso_local i8 @test_atomic_load_umin_i8_seq_cst(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i8_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: lduminalb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i8_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var8
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var8
; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff
; OUTLINE-ATOMICS-NEXT: .LBB367_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrb w0, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w0, w9
; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls
; OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB367_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i8_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: and w9, w0, #0xff
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB367_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrb w0, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w0, w9
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrb w11, w10, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB367_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umin ptr @var8, i8 %offset seq_cst
ret i8 %old
}
define dso_local i16 @test_atomic_load_umin_i16_seq_cst(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i16_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: lduminalh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i16_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var16
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var16
; OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff
; OUTLINE-ATOMICS-NEXT: .LBB368_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxrh w0, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w0, w9
; OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls
; OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB368_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i16_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: and w9, w0, #0xffff
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB368_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxrh w0, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w0, w9
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w0, w9, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stlxrh w11, w10, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB368_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: // kill: def $w0 killed $w0 killed $x0
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umin ptr @var16, i16 %offset seq_cst
ret i16 %old
}
define dso_local i32 @test_atomic_load_umin_i32_seq_cst(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i32_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: lduminal w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var32
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB369_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp w8, w0
; OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, ls
; OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB369_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov w0, w8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB369_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w8, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w8, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w10, w8, w0, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, w10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB369_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, w8
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umin ptr @var32, i32 %offset seq_cst
ret i32 %old
}
define dso_local i64 @test_atomic_load_umin_i64_seq_cst(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i64_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: lduminal x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x9, var64
; OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB370_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x8, [x9]
; OUTLINE-ATOMICS-NEXT: cmp x8, x0
; OUTLINE-ATOMICS-NEXT: csel x10, x8, x0, ls
; OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB370_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: mov x0, x8
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: mov x8, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x9, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x9, x9, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB370_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x0, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x0, x8
; MSVC-OUTLINE-ATOMICS-NEXT: csel x10, x0, x8, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w11, x10, [x9]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w11, .LBB370_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw umin ptr @var64, i64 %offset seq_cst
ret i64 %old
}
define dso_local void @test_atomic_load_umin_i32_noret_seq_cst(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i32_noret_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: lduminal w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_noret_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var32
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; OUTLINE-ATOMICS-NEXT: .LBB371_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp w9, w0
; OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, ls
; OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB371_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i32_noret_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB371_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp w9, w0
; MSVC-OUTLINE-ATOMICS-NEXT: csel w9, w9, w0, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, w9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB371_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw umin ptr @var32, i32 %offset seq_cst
ret void
}
define dso_local void @test_atomic_load_umin_i64_noret_seq_cst(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_umin_i64_noret_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: lduminal x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_noret_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var64
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; OUTLINE-ATOMICS-NEXT: .LBB372_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; OUTLINE-ATOMICS-NEXT: cmp x9, x0
; OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, ls
; OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB372_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_umin_i64_noret_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB372_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldaxr x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cmp x9, x0
; MSVC-OUTLINE-ATOMICS-NEXT: csel x9, x9, x0, ls
; MSVC-OUTLINE-ATOMICS-NEXT: stlxr w10, x9, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w10, .LBB372_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw umin ptr @var64, i64 %offset seq_cst
ret void
}
define dso_local i8 @test_atomic_load_xor_i8_acq_rel(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i8_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldeoralb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i8_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor1_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i8_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor1_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xor ptr @var8, i8 %offset acq_rel
ret i8 %old
}
define dso_local i16 @test_atomic_load_xor_i16_acq_rel(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i16_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldeoralh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i16_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor2_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i16_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor2_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xor ptr @var16, i16 %offset acq_rel
ret i16 %old
}
define dso_local i32 @test_atomic_load_xor_i32_acq_rel(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i32_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldeoral w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xor ptr @var32, i32 %offset acq_rel
ret i32 %old
}
define dso_local i64 @test_atomic_load_xor_i64_acq_rel(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i64_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldeoral x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xor ptr @var64, i64 %offset acq_rel
ret i64 %old
}
define dso_local void @test_atomic_load_xor_i32_noret_acq_rel(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i32_noret_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldeoral w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_noret_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_noret_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw xor ptr @var32, i32 %offset acq_rel
ret void
}
define dso_local void @test_atomic_load_xor_i64_noret_acq_rel(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i64_noret_acq_rel:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldeoral x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_noret_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_noret_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw xor ptr @var64, i64 %offset acq_rel
ret void
}
define dso_local i8 @test_atomic_load_xor_i8_acquire(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i8_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldeorab w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i8_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor1_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i8_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor1_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xor ptr @var8, i8 %offset acquire
ret i8 %old
}
define dso_local i16 @test_atomic_load_xor_i16_acquire(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i16_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldeorah w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i16_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor2_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i16_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor2_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xor ptr @var16, i16 %offset acquire
ret i16 %old
}
define dso_local i32 @test_atomic_load_xor_i32_acquire(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i32_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldeora w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xor ptr @var32, i32 %offset acquire
ret i32 %old
}
define dso_local i64 @test_atomic_load_xor_i64_acquire(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i64_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldeora x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xor ptr @var64, i64 %offset acquire
ret i64 %old
}
define dso_local void @test_atomic_load_xor_i32_noret_acquire(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i32_noret_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldeora w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_noret_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_noret_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw xor ptr @var32, i32 %offset acquire
ret void
}
define dso_local void @test_atomic_load_xor_i64_noret_acquire(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i64_noret_acquire:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldeora x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_noret_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_noret_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw xor ptr @var64, i64 %offset acquire
ret void
}
define dso_local i8 @test_atomic_load_xor_i8_monotonic(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i8_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldeorb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i8_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor1_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i8_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor1_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xor ptr @var8, i8 %offset monotonic
ret i8 %old
}
define dso_local i16 @test_atomic_load_xor_i16_monotonic(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i16_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldeorh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i16_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor2_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i16_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor2_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xor ptr @var16, i16 %offset monotonic
ret i16 %old
}
define dso_local i32 @test_atomic_load_xor_i32_monotonic(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i32_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldeor w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xor ptr @var32, i32 %offset monotonic
ret i32 %old
}
define dso_local i64 @test_atomic_load_xor_i64_monotonic(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i64_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldeor x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xor ptr @var64, i64 %offset monotonic
ret i64 %old
}
define dso_local void @test_atomic_load_xor_i32_noret_monotonic(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i32_noret_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldeor w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_noret_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_noret_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw xor ptr @var32, i32 %offset monotonic
ret void
}
define dso_local void @test_atomic_load_xor_i64_noret_monotonic(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i64_noret_monotonic:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldeor x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_noret_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_noret_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw xor ptr @var64, i64 %offset monotonic
ret void
}
define dso_local i8 @test_atomic_load_xor_i8_release(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i8_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldeorlb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i8_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor1_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i8_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor1_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xor ptr @var8, i8 %offset release
ret i8 %old
}
define dso_local i16 @test_atomic_load_xor_i16_release(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i16_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldeorlh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i16_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor2_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i16_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor2_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xor ptr @var16, i16 %offset release
ret i16 %old
}
define dso_local i32 @test_atomic_load_xor_i32_release(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i32_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldeorl w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xor ptr @var32, i32 %offset release
ret i32 %old
}
define dso_local i64 @test_atomic_load_xor_i64_release(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i64_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldeorl x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xor ptr @var64, i64 %offset release
ret i64 %old
}
define dso_local void @test_atomic_load_xor_i32_noret_release(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i32_noret_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldeorl w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_noret_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_noret_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw xor ptr @var32, i32 %offset release
ret void
}
define dso_local void @test_atomic_load_xor_i64_noret_release(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i64_noret_release:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldeorl x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_noret_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_noret_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw xor ptr @var64, i64 %offset release
ret void
}
define dso_local i8 @test_atomic_load_xor_i8_seq_cst(i8 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i8_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var8
; CHECK-NEXT: add x8, x8, :lo12:var8
; CHECK-NEXT: ldeoralb w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i8_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor1_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i8_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor1_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xor ptr @var8, i8 %offset seq_cst
ret i8 %old
}
define dso_local i16 @test_atomic_load_xor_i16_seq_cst(i16 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i16_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var16
; CHECK-NEXT: add x8, x8, :lo12:var16
; CHECK-NEXT: ldeoralh w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i16_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor2_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i16_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor2_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xor ptr @var16, i16 %offset seq_cst
ret i16 %old
}
define dso_local i32 @test_atomic_load_xor_i32_seq_cst(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i32_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldeoral w0, w0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xor ptr @var32, i32 %offset seq_cst
ret i32 %old
}
define dso_local i64 @test_atomic_load_xor_i64_seq_cst(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i64_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldeoral x0, x0, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%old = atomicrmw xor ptr @var64, i64 %offset seq_cst
ret i64 %old
}
define dso_local void @test_atomic_load_xor_i32_noret_seq_cst(i32 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i32_noret_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var32
; CHECK-NEXT: add x8, x8, :lo12:var32
; CHECK-NEXT: ldeoral w0, w8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_noret_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i32_noret_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw xor ptr @var32, i32 %offset seq_cst
ret void
}
define dso_local void @test_atomic_load_xor_i64_noret_seq_cst(i64 %offset) nounwind {
; CHECK-LABEL: test_atomic_load_xor_i64_noret_seq_cst:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, var64
; CHECK-NEXT: add x8, x8, :lo12:var64
; CHECK-NEXT: ldeoral x0, x8, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_noret_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_xor_i64_noret_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldeor8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
atomicrmw xor ptr @var64, i64 %offset seq_cst
ret void
}
define dso_local i128 @test_atomic_load_i128() nounwind {
; CHECK-LABEL: test_atomic_load_i128:
; CHECK: // %bb.0:
; CHECK-NEXT: mov x0, xzr
; CHECK-NEXT: mov x1, xzr
; CHECK-NEXT: adrp x8, var128
; CHECK-NEXT: add x8, x8, :lo12:var128
; CHECK-NEXT: casp x0, x1, x0, x1, [x8]
; CHECK-NEXT: ret
;
; OUTLINE-ATOMICS-LABEL: test_atomic_load_i128:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: adrp x8, var128
; OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var128
; OUTLINE-ATOMICS-NEXT: .LBB403_1: // %atomicrmw.start
; OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; OUTLINE-ATOMICS-NEXT: ldxp x0, x1, [x8]
; OUTLINE-ATOMICS-NEXT: stxp w9, x0, x1, [x8]
; OUTLINE-ATOMICS-NEXT: cbnz w9, .LBB403_1
; OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; OUTLINE-ATOMICS-NEXT: ret
;
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_i128:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x8, var128
; MSVC-OUTLINE-ATOMICS-NEXT: add x8, x8, :lo12:var128
; MSVC-OUTLINE-ATOMICS-NEXT: .LBB403_1: // %atomicrmw.start
; MSVC-OUTLINE-ATOMICS-NEXT: // =>This Inner Loop Header: Depth=1
; MSVC-OUTLINE-ATOMICS-NEXT: ldxp x0, x1, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: stxp w9, x0, x1, [x8]
; MSVC-OUTLINE-ATOMICS-NEXT: cbnz w9, .LBB403_1
; MSVC-OUTLINE-ATOMICS-NEXT: // %bb.2: // %atomicrmw.end
; MSVC-OUTLINE-ATOMICS-NEXT: ret
%pair = load atomic i128, ptr @var128 monotonic, align 16
ret i128 %pair
}