| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6 | |
| ; RUN: opt -S -passes='early-cse<memssa>' < %s | FileCheck %s | |
| target datalayout = "pe1:64:64:64:32" | |
| define ptr @load_from_zero_memset(ptr %p) { | |
| ; CHECK-LABEL: define ptr @load_from_zero_memset( | |
| ; CHECK-SAME: ptr [[P:%.*]]) { | |
| ; CHECK-NEXT: [[ENTRY:.*:]] | |
| ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr [[P]], i8 0, i64 8, i1 false) | |
| ; CHECK-NEXT: ret ptr null | |
| ; | |
| entry: | |
| call void @llvm.memset.p0.i64(ptr %p, i8 0, i64 8, i1 false) | |
| %v = load ptr, ptr %p, align 8 | |
| ret ptr %v | |
| } | |
| define ptr @load_from_nonzero_memset(ptr %p) { | |
| ; CHECK-LABEL: define ptr @load_from_nonzero_memset( | |
| ; CHECK-SAME: ptr [[P:%.*]]) { | |
| ; CHECK-NEXT: [[ENTRY:.*:]] | |
| ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr [[P]], i8 1, i64 8, i1 false) | |
| ; CHECK-NEXT: [[V:%.*]] = load ptr, ptr [[P]], align 8 | |
| ; CHECK-NEXT: ret ptr [[V]] | |
| ; | |
| entry: | |
| call void @llvm.memset.p0.i64(ptr %p, i8 1, i64 8, i1 false) | |
| %v = load ptr, ptr %p, align 8 | |
| ret ptr %v | |
| } | |
| define ptr @load_from_zero_memset_with_clobber(ptr %p) { | |
| ; CHECK-LABEL: define ptr @load_from_zero_memset_with_clobber( | |
| ; CHECK-SAME: ptr [[P:%.*]]) { | |
| ; CHECK-NEXT: [[ENTRY:.*:]] | |
| ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr [[P]], i8 0, i64 8, i1 false) | |
| ; CHECK-NEXT: call void @clobber(ptr [[P]]) | |
| ; CHECK-NEXT: [[V:%.*]] = load ptr, ptr [[P]], align 8 | |
| ; CHECK-NEXT: ret ptr [[V]] | |
| ; | |
| entry: | |
| call void @llvm.memset.p0.i64(ptr %p, i8 0, i64 8, i1 false) | |
| call void @clobber(ptr %p) | |
| %v = load ptr, ptr %p, align 8 | |
| ret ptr %v | |
| } | |
| define ptr @load_from_volatile_zero_memset(ptr %p) { | |
| ; CHECK-LABEL: define ptr @load_from_volatile_zero_memset( | |
| ; CHECK-SAME: ptr [[P:%.*]]) { | |
| ; CHECK-NEXT: [[ENTRY:.*:]] | |
| ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr [[P]], i8 0, i64 8, i1 true) | |
| ; CHECK-NEXT: [[V:%.*]] = load ptr, ptr [[P]], align 8 | |
| ; CHECK-NEXT: ret ptr [[V]] | |
| ; | |
| entry: | |
| call void @llvm.memset.p0.i64(ptr %p, i8 0, i64 8, i1 true) | |
| %v = load ptr, ptr %p, align 8 | |
| ret ptr %v | |
| } | |
| define ptr @load_from_zero_memset_unknown_length(ptr %p, i64 %n) { | |
| ; CHECK-LABEL: define ptr @load_from_zero_memset_unknown_length( | |
| ; CHECK-SAME: ptr [[P:%.*]], i64 [[N:%.*]]) { | |
| ; CHECK-NEXT: [[ENTRY:.*:]] | |
| ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr [[P]], i8 0, i64 [[N]], i1 false) | |
| ; CHECK-NEXT: [[V:%.*]] = load ptr, ptr [[P]], align 8 | |
| ; CHECK-NEXT: ret ptr [[V]] | |
| ; | |
| entry: | |
| call void @llvm.memset.p0.i64(ptr %p, i8 0, i64 %n, i1 false) | |
| %v = load ptr, ptr %p, align 8 | |
| ret ptr %v | |
| } | |
| define ptr addrspace(1) @load_from_zero_memset_external(ptr addrspace(1) %p) { | |
| ; CHECK-LABEL: define ptr addrspace(1) @load_from_zero_memset_external( | |
| ; CHECK-SAME: ptr addrspace(1) [[P:%.*]]) { | |
| ; CHECK-NEXT: [[ENTRY:.*:]] | |
| ; CHECK-NEXT: call void @llvm.memset.p1.i64(ptr addrspace(1) [[P]], i8 0, i64 8, i1 false) | |
| ; CHECK-NEXT: ret ptr addrspace(1) null | |
| ; | |
| entry: | |
| call void @llvm.memset.p1.i64(ptr addrspace(1) %p, i8 0, i64 8, i1 false) | |
| %v = load ptr addrspace(1), ptr addrspace(1) %p, align 8 | |
| ret ptr addrspace(1) %v | |
| } | |
| define <4 x i32> @masked_load_from_zero_memset(ptr %p) { | |
| ; CHECK-LABEL: define <4 x i32> @masked_load_from_zero_memset( | |
| ; CHECK-SAME: ptr [[P:%.*]]) { | |
| ; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr [[P]], i8 0, i64 16, i1 false) | |
| ; CHECK-NEXT: [[V:%.*]] = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 16 [[P]], <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x i32> splat (i32 7)) | |
| ; CHECK-NEXT: ret <4 x i32> [[V]] | |
| ; | |
| call void @llvm.memset.p0.i64(ptr %p, i8 0, i64 16, i1 false) | |
| %v = call <4 x i32> @llvm.masked.load(ptr %p, i32 16, <4 x i1> <i1 true, i1 false, i1 false, i1 false>, <4 x i32> <i32 7, i32 7, i32 7, i32 7>) | |
| ret <4 x i32> %v | |
| } | |
| declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) | |
| declare void @llvm.memset.p1.i64(ptr addrspace(1) nocapture writeonly, i8, i64, i1 immarg) | |
| declare void @clobber(ptr) |