llvm/test/CodeGen/X86/vector-partial-reduce-umla.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE2
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE42
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX2
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX512
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avxvnniint8,+avxvnniint16 | FileCheck %s --check-prefixes=AVXVNNIINT
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512vl,+avx512bw,+avxvnniint8,+avxvnniint16 | FileCheck %s --check-prefixes=AVX512-VEXVNNI
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx10.2 | FileCheck %s --check-prefixes=AVX10,AVX10-512
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx10.2,+prefer-256-bit | FileCheck %s --check-prefixes=AVX10,AVX10-256

; All functions carry "min-legal-vector-width"="256" so that on prefer-256-bit
; targets (x86-64-v4, and the +prefer-256-bit RUN line) the 512-bit types are
; legalized as two 256-bit halves instead of being kept in zmm registers.

; i8 x i8 -> i32, zext x zext: vpdpbuud (AVX-VNNI-INT8, AVX10.2)

define <4 x i32> @partial_reduce_umla_i8_v4i32(<4 x i32> %acc, <16 x i8> %a, <16 x i8> %b) #0 {
; SSE2-LABEL: partial_reduce_umla_i8_v4i32:
; SSE2:       # %bb.0:
; SSE2-NEXT:    pxor %xmm3, %xmm3
; SSE2-NEXT:    movdqa %xmm2, %xmm4
; SSE2-NEXT:    punpckhbw {{.*#+}} xmm4 = xmm4[8],xmm3[8],xmm4[9],xmm3[9],xmm4[10],xmm3[10],xmm4[11],xmm3[11],xmm4[12],xmm3[12],xmm4[13],xmm3[13],xmm4[14],xmm3[14],xmm4[15],xmm3[15]
; SSE2-NEXT:    movdqa %xmm1, %xmm5
; SSE2-NEXT:    punpckhbw {{.*#+}} xmm5 = xmm5[8],xmm3[8],xmm5[9],xmm3[9],xmm5[10],xmm3[10],xmm5[11],xmm3[11],xmm5[12],xmm3[12],xmm5[13],xmm3[13],xmm5[14],xmm3[14],xmm5[15],xmm3[15]
; SSE2-NEXT:    pmullw %xmm4, %xmm5
; SSE2-NEXT:    movdqa %xmm5, %xmm4
; SSE2-NEXT:    punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
; SSE2-NEXT:    punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1],xmm5[2],xmm3[2],xmm5[3],xmm3[3]
; SSE2-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3],xmm2[4],xmm3[4],xmm2[5],xmm3[5],xmm2[6],xmm3[6],xmm2[7],xmm3[7]
; SSE2-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]
; SSE2-NEXT:    pmullw %xmm2, %xmm1
; SSE2-NEXT:    movdqa %xmm1, %xmm2
; SSE2-NEXT:    punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm3[4],xmm2[5],xmm3[5],xmm2[6],xmm3[6],xmm2[7],xmm3[7]
; SSE2-NEXT:    paddd %xmm5, %xmm2
; SSE2-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3]
; SSE2-NEXT:    paddd %xmm1, %xmm0
; SSE2-NEXT:    paddd %xmm2, %xmm0
; SSE2-NEXT:    paddd %xmm4, %xmm0
; SSE2-NEXT:    retq
;
; SSE42-LABEL: partial_reduce_umla_i8_v4i32:
; SSE42:       # %bb.0:
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
; SSE42-NEXT:    pshufd {{.*#+}} xmm4 = xmm1[1,1,1,1]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero
; SSE42-NEXT:    pshufd {{.*#+}} xmm5 = xmm1[2,3,2,3]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm5 = xmm5[0],zero,zero,zero,xmm5[1],zero,zero,zero,xmm5[2],zero,zero,zero,xmm5[3],zero,zero,zero
; SSE42-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[3,3,3,3]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm6 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero
; SSE42-NEXT:    pmaddwd %xmm3, %xmm6
; SSE42-NEXT:    pshufd {{.*#+}} xmm3 = xmm2[1,1,1,1]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero
; SSE42-NEXT:    pmaddwd %xmm4, %xmm3
; SSE42-NEXT:    pshufd {{.*#+}} xmm4 = xmm2[2,3,2,3]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero
; SSE42-NEXT:    pmaddwd %xmm5, %xmm4
; SSE42-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[3,3,3,3]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm2 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero
; SSE42-NEXT:    pmaddwd %xmm1, %xmm2
; SSE42-NEXT:    paddd %xmm4, %xmm2
; SSE42-NEXT:    paddd %xmm6, %xmm0
; SSE42-NEXT:    paddd %xmm3, %xmm0
; SSE42-NEXT:    paddd %xmm2, %xmm0
; SSE42-NEXT:    retq
;
; AVX2-LABEL: partial_reduce_umla_i8_v4i32:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero
; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero
; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm4 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero,xmm2[4],zero,zero,zero,xmm2[5],zero,zero,zero,xmm2[6],zero,zero,zero,xmm2[7],zero,zero,zero
; AVX2-NEXT:    vpmaddwd %ymm4, %ymm3, %ymm3
; AVX2-NEXT:    vpshufd {{.*#+}} xmm2 = xmm2[2,3,2,3]
; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm2 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero,xmm2[4],zero,zero,zero,xmm2[5],zero,zero,zero,xmm2[6],zero,zero,zero,xmm2[7],zero,zero,zero
; AVX2-NEXT:    vpmaddwd %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    vpaddd %xmm3, %xmm0, %xmm0
; AVX2-NEXT:    vextracti128 $1, %ymm3, %xmm2
; AVX2-NEXT:    vpaddd %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    vpaddd %xmm0, %xmm2, %xmm0
; AVX2-NEXT:    vextracti128 $1, %ymm1, %xmm1
; AVX2-NEXT:    vpaddd %xmm0, %xmm1, %xmm0
; AVX2-NEXT:    vzeroupper
; AVX2-NEXT:    retq
;
; AVX512-LABEL: partial_reduce_umla_i8_v4i32:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero
; AVX512-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero
; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm4 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero,xmm2[4],zero,zero,zero,xmm2[5],zero,zero,zero,xmm2[6],zero,zero,zero,xmm2[7],zero,zero,zero
; AVX512-NEXT:    vpmaddwd %ymm4, %ymm3, %ymm3
; AVX512-NEXT:    vpshufd {{.*#+}} xmm2 = xmm2[2,3,2,3]
; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm2 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero,xmm2[4],zero,zero,zero,xmm2[5],zero,zero,zero,xmm2[6],zero,zero,zero,xmm2[7],zero,zero,zero
; AVX512-NEXT:    vpmaddwd %ymm2, %ymm1, %ymm1
; AVX512-NEXT:    vpaddd %xmm3, %xmm0, %xmm0
; AVX512-NEXT:    vextracti128 $1, %ymm3, %xmm2
; AVX512-NEXT:    vpaddd %xmm1, %xmm0, %xmm0
; AVX512-NEXT:    vpaddd %xmm0, %xmm2, %xmm0
; AVX512-NEXT:    vextracti128 $1, %ymm1, %xmm1
; AVX512-NEXT:    vpaddd %xmm0, %xmm1, %xmm0
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    retq
;
; AVXVNNIINT-LABEL: partial_reduce_umla_i8_v4i32:
; AVXVNNIINT:       # %bb.0:
; AVXVNNIINT-NEXT:    vpdpbuud %xmm2, %xmm1, %xmm0
; AVXVNNIINT-NEXT:    retq
;
; AVX512-VEXVNNI-LABEL: partial_reduce_umla_i8_v4i32:
; AVX512-VEXVNNI:       # %bb.0:
; AVX512-VEXVNNI-NEXT:    vpdpbuud %xmm2, %xmm1, %xmm0
; AVX512-VEXVNNI-NEXT:    retq
;
; AVX10-LABEL: partial_reduce_umla_i8_v4i32:
; AVX10:       # %bb.0:
; AVX10-NEXT:    vpdpbuud %xmm2, %xmm1, %xmm0
; AVX10-NEXT:    retq
  %a.ext = zext <16 x i8> %a to <16 x i32>
  %b.ext = zext <16 x i8> %b to <16 x i32>
  %mul = mul <16 x i32> %a.ext, %b.ext
  %res = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> %acc, <16 x i32> %mul)
  ret <4 x i32> %res
}

define <8 x i32> @partial_reduce_umla_i8_v8i32(<8 x i32> %acc, <32 x i8> %a, <32 x i8> %b) #0 {
; SSE2-LABEL: partial_reduce_umla_i8_v8i32:
; SSE2:       # %bb.0:
; SSE2-NEXT:    pxor %xmm7, %xmm7
; SSE2-NEXT:    movdqa %xmm5, %xmm6
; SSE2-NEXT:    punpckhbw {{.*#+}} xmm6 = xmm6[8],xmm7[8],xmm6[9],xmm7[9],xmm6[10],xmm7[10],xmm6[11],xmm7[11],xmm6[12],xmm7[12],xmm6[13],xmm7[13],xmm6[14],xmm7[14],xmm6[15],xmm7[15]
; SSE2-NEXT:    movdqa %xmm3, %xmm8
; SSE2-NEXT:    punpckhbw {{.*#+}} xmm8 = xmm8[8],xmm7[8],xmm8[9],xmm7[9],xmm8[10],xmm7[10],xmm8[11],xmm7[11],xmm8[12],xmm7[12],xmm8[13],xmm7[13],xmm8[14],xmm7[14],xmm8[15],xmm7[15]
; SSE2-NEXT:    pmullw %xmm6, %xmm8
; SSE2-NEXT:    movdqa %xmm8, %xmm6
; SSE2-NEXT:    punpckhwd {{.*#+}} xmm6 = xmm6[4],xmm7[4],xmm6[5],xmm7[5],xmm6[6],xmm7[6],xmm6[7],xmm7[7]
; SSE2-NEXT:    punpcklwd {{.*#+}} xmm8 = xmm8[0],xmm7[0],xmm8[1],xmm7[1],xmm8[2],xmm7[2],xmm8[3],xmm7[3]
; SSE2-NEXT:    punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm7[0],xmm5[1],xmm7[1],xmm5[2],xmm7[2],xmm5[3],xmm7[3],xmm5[4],xmm7[4],xmm5[5],xmm7[5],xmm5[6],xmm7[6],xmm5[7],xmm7[7]
; SSE2-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm7[0],xmm3[1],xmm7[1],xmm3[2],xmm7[2],xmm3[3],xmm7[3],xmm3[4],xmm7[4],xmm3[5],xmm7[5],xmm3[6],xmm7[6],xmm3[7],xmm7[7]
; SSE2-NEXT:    pmullw %xmm5, %xmm3
; SSE2-NEXT:    movdqa %xmm3, %xmm5
; SSE2-NEXT:    punpckhwd {{.*#+}} xmm5 = xmm5[4],xmm7[4],xmm5[5],xmm7[5],xmm5[6],xmm7[6],xmm5[7],xmm7[7]
; SSE2-NEXT:    paddd %xmm8, %xmm5
; SSE2-NEXT:    punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm7[0],xmm3[1],xmm7[1],xmm3[2],xmm7[2],xmm3[3],xmm7[3]
; SSE2-NEXT:    movdqa %xmm4, %xmm8
; SSE2-NEXT:    punpckhbw {{.*#+}} xmm8 = xmm8[8],xmm7[8],xmm8[9],xmm7[9],xmm8[10],xmm7[10],xmm8[11],xmm7[11],xmm8[12],xmm7[12],xmm8[13],xmm7[13],xmm8[14],xmm7[14],xmm8[15],xmm7[15]
; SSE2-NEXT:    movdqa %xmm2, %xmm9
; SSE2-NEXT:    punpckhbw {{.*#+}} xmm9 = xmm9[8],xmm7[8],xmm9[9],xmm7[9],xmm9[10],xmm7[10],xmm9[11],xmm7[11],xmm9[12],xmm7[12],xmm9[13],xmm7[13],xmm9[14],xmm7[14],xmm9[15],xmm7[15]
; SSE2-NEXT:    pmullw %xmm8, %xmm9
; SSE2-NEXT:    movdqa %xmm9, %xmm8
; SSE2-NEXT:    punpckhwd {{.*#+}} xmm8 = xmm8[4],xmm7[4],xmm8[5],xmm7[5],xmm8[6],xmm7[6],xmm8[7],xmm7[7]
; SSE2-NEXT:    punpcklwd {{.*#+}} xmm9 = xmm9[0],xmm7[0],xmm9[1],xmm7[1],xmm9[2],xmm7[2],xmm9[3],xmm7[3]
; SSE2-NEXT:    punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm7[0],xmm4[1],xmm7[1],xmm4[2],xmm7[2],xmm4[3],xmm7[3],xmm4[4],xmm7[4],xmm4[5],xmm7[5],xmm4[6],xmm7[6],xmm4[7],xmm7[7]
; SSE2-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm7[0],xmm2[1],xmm7[1],xmm2[2],xmm7[2],xmm2[3],xmm7[3],xmm2[4],xmm7[4],xmm2[5],xmm7[5],xmm2[6],xmm7[6],xmm2[7],xmm7[7]
; SSE2-NEXT:    pmullw %xmm4, %xmm2
; SSE2-NEXT:    movdqa %xmm2, %xmm4
; SSE2-NEXT:    punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm7[4],xmm4[5],xmm7[5],xmm4[6],xmm7[6],xmm4[7],xmm7[7]
; SSE2-NEXT:    paddd %xmm9, %xmm4
; SSE2-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm7[0],xmm2[1],xmm7[1],xmm2[2],xmm7[2],xmm2[3],xmm7[3]
; SSE2-NEXT:    paddd %xmm2, %xmm0
; SSE2-NEXT:    paddd %xmm4, %xmm0
; SSE2-NEXT:    paddd %xmm8, %xmm0
; SSE2-NEXT:    paddd %xmm3, %xmm1
; SSE2-NEXT:    paddd %xmm5, %xmm1
; SSE2-NEXT:    paddd %xmm6, %xmm1
; SSE2-NEXT:    retq
;
; SSE42-LABEL: partial_reduce_umla_i8_v8i32:
; SSE42:       # %bb.0:
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm6 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero
; SSE42-NEXT:    pshufd {{.*#+}} xmm7 = xmm2[1,1,1,1]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm7 = xmm7[0],zero,zero,zero,xmm7[1],zero,zero,zero,xmm7[2],zero,zero,zero,xmm7[3],zero,zero,zero
; SSE42-NEXT:    pshufd {{.*#+}} xmm8 = xmm2[2,3,2,3]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm8 = xmm8[0],zero,zero,zero,xmm8[1],zero,zero,zero,xmm8[2],zero,zero,zero,xmm8[3],zero,zero,zero
; SSE42-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[3,3,3,3]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm9 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm10 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero
; SSE42-NEXT:    pshufd {{.*#+}} xmm2 = xmm3[1,1,1,1]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm11 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero
; SSE42-NEXT:    pshufd {{.*#+}} xmm2 = xmm3[2,3,2,3]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm12 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero
; SSE42-NEXT:    pshufd {{.*#+}} xmm2 = xmm3[3,3,3,3]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm13 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm2 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero
; SSE42-NEXT:    pmaddwd %xmm6, %xmm2
; SSE42-NEXT:    pshufd {{.*#+}} xmm3 = xmm4[1,1,1,1]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero
; SSE42-NEXT:    pmaddwd %xmm7, %xmm3
; SSE42-NEXT:    pshufd {{.*#+}} xmm6 = xmm4[2,3,2,3]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm6 = xmm6[0],zero,zero,zero,xmm6[1],zero,zero,zero,xmm6[2],zero,zero,zero,xmm6[3],zero,zero,zero
; SSE42-NEXT:    pmaddwd %xmm8, %xmm6
; SSE42-NEXT:    pshufd {{.*#+}} xmm4 = xmm4[3,3,3,3]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero
; SSE42-NEXT:    pmaddwd %xmm9, %xmm4
; SSE42-NEXT:    paddd %xmm6, %xmm4
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm6 = xmm5[0],zero,zero,zero,xmm5[1],zero,zero,zero,xmm5[2],zero,zero,zero,xmm5[3],zero,zero,zero
; SSE42-NEXT:    pmaddwd %xmm10, %xmm6
; SSE42-NEXT:    pshufd {{.*#+}} xmm7 = xmm5[1,1,1,1]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm7 = xmm7[0],zero,zero,zero,xmm7[1],zero,zero,zero,xmm7[2],zero,zero,zero,xmm7[3],zero,zero,zero
; SSE42-NEXT:    pmaddwd %xmm11, %xmm7
; SSE42-NEXT:    pshufd {{.*#+}} xmm8 = xmm5[2,3,2,3]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm8 = xmm8[0],zero,zero,zero,xmm8[1],zero,zero,zero,xmm8[2],zero,zero,zero,xmm8[3],zero,zero,zero
; SSE42-NEXT:    pmaddwd %xmm12, %xmm8
; SSE42-NEXT:    pshufd {{.*#+}} xmm5 = xmm5[3,3,3,3]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm5 = xmm5[0],zero,zero,zero,xmm5[1],zero,zero,zero,xmm5[2],zero,zero,zero,xmm5[3],zero,zero,zero
; SSE42-NEXT:    pmaddwd %xmm13, %xmm5
; SSE42-NEXT:    paddd %xmm8, %xmm5
; SSE42-NEXT:    paddd %xmm2, %xmm0
; SSE42-NEXT:    paddd %xmm3, %xmm0
; SSE42-NEXT:    paddd %xmm4, %xmm0
; SSE42-NEXT:    paddd %xmm6, %xmm1
; SSE42-NEXT:    paddd %xmm7, %xmm1
; SSE42-NEXT:    paddd %xmm5, %xmm1
; SSE42-NEXT:    retq
;
; AVX2-LABEL: partial_reduce_umla_i8_v8i32:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero
; AVX2-NEXT:    vpshufd {{.*#+}} xmm4 = xmm1[2,3,2,3]
; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero,xmm4[4],zero,zero,zero,xmm4[5],zero,zero,zero,xmm4[6],zero,zero,zero,xmm4[7],zero,zero,zero
; AVX2-NEXT:    vextracti128 $1, %ymm1, %xmm1
; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm5 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero
; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero
; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm6 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero,xmm2[4],zero,zero,zero,xmm2[5],zero,zero,zero,xmm2[6],zero,zero,zero,xmm2[7],zero,zero,zero
; AVX2-NEXT:    vpmaddwd %ymm6, %ymm3, %ymm3
; AVX2-NEXT:    vpshufd {{.*#+}} xmm6 = xmm2[2,3,2,3]
; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm6 = xmm6[0],zero,zero,zero,xmm6[1],zero,zero,zero,xmm6[2],zero,zero,zero,xmm6[3],zero,zero,zero,xmm6[4],zero,zero,zero,xmm6[5],zero,zero,zero,xmm6[6],zero,zero,zero,xmm6[7],zero,zero,zero
; AVX2-NEXT:    vpmaddwd %ymm6, %ymm4, %ymm4
; AVX2-NEXT:    vextracti128 $1, %ymm2, %xmm2
; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm6 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero,xmm2[4],zero,zero,zero,xmm2[5],zero,zero,zero,xmm2[6],zero,zero,zero,xmm2[7],zero,zero,zero
; AVX2-NEXT:    vpmaddwd %ymm6, %ymm5, %ymm5
; AVX2-NEXT:    vpshufd {{.*#+}} xmm2 = xmm2[2,3,2,3]
; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm2 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero,xmm2[4],zero,zero,zero,xmm2[5],zero,zero,zero,xmm2[6],zero,zero,zero,xmm2[7],zero,zero,zero
; AVX2-NEXT:    vpmaddwd %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    vpaddd %ymm3, %ymm0, %ymm0
; AVX2-NEXT:    vpaddd %ymm4, %ymm0, %ymm0
; AVX2-NEXT:    vpaddd %ymm5, %ymm0, %ymm0
; AVX2-NEXT:    vpaddd %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    retq
;
; AVX512-LABEL: partial_reduce_umla_i8_v8i32:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero
; AVX512-NEXT:    vpshufd {{.*#+}} xmm4 = xmm1[2,3,2,3]
; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero,xmm4[4],zero,zero,zero,xmm4[5],zero,zero,zero,xmm4[6],zero,zero,zero,xmm4[7],zero,zero,zero
; AVX512-NEXT:    vextracti128 $1, %ymm1, %xmm1
; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm5 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero
; AVX512-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero
; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm6 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero,xmm2[4],zero,zero,zero,xmm2[5],zero,zero,zero,xmm2[6],zero,zero,zero,xmm2[7],zero,zero,zero
; AVX512-NEXT:    vpmaddwd %ymm6, %ymm3, %ymm3
; AVX512-NEXT:    vpshufd {{.*#+}} xmm6 = xmm2[2,3,2,3]
; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm6 = xmm6[0],zero,zero,zero,xmm6[1],zero,zero,zero,xmm6[2],zero,zero,zero,xmm6[3],zero,zero,zero,xmm6[4],zero,zero,zero,xmm6[5],zero,zero,zero,xmm6[6],zero,zero,zero,xmm6[7],zero,zero,zero
; AVX512-NEXT:    vpmaddwd %ymm6, %ymm4, %ymm4
; AVX512-NEXT:    vextracti128 $1, %ymm2, %xmm2
; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm6 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero,xmm2[4],zero,zero,zero,xmm2[5],zero,zero,zero,xmm2[6],zero,zero,zero,xmm2[7],zero,zero,zero
; AVX512-NEXT:    vpmaddwd %ymm6, %ymm5, %ymm5
; AVX512-NEXT:    vpshufd {{.*#+}} xmm2 = xmm2[2,3,2,3]
; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm2 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero,xmm2[4],zero,zero,zero,xmm2[5],zero,zero,zero,xmm2[6],zero,zero,zero,xmm2[7],zero,zero,zero
; AVX512-NEXT:    vpmaddwd %ymm2, %ymm1, %ymm1
; AVX512-NEXT:    vpaddd %ymm3, %ymm0, %ymm0
; AVX512-NEXT:    vpaddd %ymm4, %ymm0, %ymm0
; AVX512-NEXT:    vpaddd %ymm5, %ymm0, %ymm0
; AVX512-NEXT:    vpaddd %ymm1, %ymm0, %ymm0
; AVX512-NEXT:    retq
;
; AVXVNNIINT-LABEL: partial_reduce_umla_i8_v8i32:
; AVXVNNIINT:       # %bb.0:
; AVXVNNIINT-NEXT:    vpdpbuud %ymm2, %ymm1, %ymm0
; AVXVNNIINT-NEXT:    retq
;
; AVX512-VEXVNNI-LABEL: partial_reduce_umla_i8_v8i32:
; AVX512-VEXVNNI:       # %bb.0:
; AVX512-VEXVNNI-NEXT:    vpdpbuud %ymm2, %ymm1, %ymm0
; AVX512-VEXVNNI-NEXT:    retq
;
; AVX10-LABEL: partial_reduce_umla_i8_v8i32:
; AVX10:       # %bb.0:
; AVX10-NEXT:    vpdpbuud %ymm2, %ymm1, %ymm0
; AVX10-NEXT:    retq
  %a.ext = zext <32 x i8> %a to <32 x i32>
  %b.ext = zext <32 x i8> %b to <32 x i32>
  %mul = mul <32 x i32> %a.ext, %b.ext
  %res = call <8 x i32> @llvm.vector.partial.reduce.add.v8i32.v32i32(<8 x i32> %acc, <32 x i32> %mul)
  ret <8 x i32> %res
}

define <16 x i32> @partial_reduce_umla_i8_v16i32(<16 x i32> %acc, <64 x i8> %a, <64 x i8> %b) #0 {
; SSE2-LABEL: partial_reduce_umla_i8_v16i32:
; SSE2:       # %bb.0:
; SSE2-NEXT:    movaps %xmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE2-NEXT:    movaps %xmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE2-NEXT:    movaps %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE2-NEXT:    movdqa %xmm1, %xmm4
; SSE2-NEXT:    movdqa %xmm0, %xmm3
; SSE2-NEXT:    movdqa {{[0-9]+}}(%rsp), %xmm11
; SSE2-NEXT:    movdqa {{[0-9]+}}(%rsp), %xmm10
; SSE2-NEXT:    movdqa {{[0-9]+}}(%rsp), %xmm8
; SSE2-NEXT:    pxor %xmm12, %xmm12
; SSE2-NEXT:    movdqa %xmm8, %xmm9
; SSE2-NEXT:    punpckhbw {{.*#+}} xmm9 = xmm9[8],xmm12[8],xmm9[9],xmm12[9],xmm9[10],xmm12[10],xmm9[11],xmm12[11],xmm9[12],xmm12[12],xmm9[13],xmm12[13],xmm9[14],xmm12[14],xmm9[15],xmm12[15]
; SSE2-NEXT:    movdqa %xmm7, %xmm13
; SSE2-NEXT:    punpckhbw {{.*#+}} xmm13 = xmm13[8],xmm12[8],xmm13[9],xmm12[9],xmm13[10],xmm12[10],xmm13[11],xmm12[11],xmm13[12],xmm12[12],xmm13[13],xmm12[13],xmm13[14],xmm12[14],xmm13[15],xmm12[15]
; SSE2-NEXT:    pmullw %xmm9, %xmm13
; SSE2-NEXT:    movdqa %xmm13, %xmm9
; SSE2-NEXT:    punpcklwd {{.*#+}} xmm13 = xmm13[0],xmm12[0],xmm13[1],xmm12[1],xmm13[2],xmm12[2],xmm13[3],xmm12[3]
; SSE2-NEXT:    punpcklbw {{.*#+}} xmm8 = xmm8[0],xmm12[0],xmm8[1],xmm12[1],xmm8[2],xmm12[2],xmm8[3],xmm12[3],xmm8[4],xmm12[4],xmm8[5],xmm12[5],xmm8[6],xmm12[6],xmm8[7],xmm12[7]
; SSE2-NEXT:    punpcklbw {{.*#+}} xmm7 = xmm7[0],xmm12[0],xmm7[1],xmm12[1],xmm7[2],xmm12[2],xmm7[3],xmm12[3],xmm7[4],xmm12[4],xmm7[5],xmm12[5],xmm7[6],xmm12[6],xmm7[7],xmm12[7]
; SSE2-NEXT:    pmullw %xmm7, %xmm8
; SSE2-NEXT:    movdqa %xmm8, %xmm7
; SSE2-NEXT:    punpckhwd {{.*#+}} xmm7 = xmm7[4],xmm12[4],xmm7[5],xmm12[5],xmm7[6],xmm12[6],xmm7[7],xmm12[7]
; SSE2-NEXT:    paddd %xmm13, %xmm7
; SSE2-NEXT:    movdqa %xmm10, %xmm13
; SSE2-NEXT:    punpckhbw {{.*#+}} xmm13 = xmm13[8],xmm12[8],xmm13[9],xmm12[9],xmm13[10],xmm12[10],xmm13[11],xmm12[11],xmm13[12],xmm12[12],xmm13[13],xmm12[13],xmm13[14],xmm12[14],xmm13[15],xmm12[15]
; SSE2-NEXT:    movdqa %xmm6, %xmm14
; SSE2-NEXT:    punpckhbw {{.*#+}} xmm14 = xmm14[8],xmm12[8],xmm14[9],xmm12[9],xmm14[10],xmm12[10],xmm14[11],xmm12[11],xmm14[12],xmm12[12],xmm14[13],xmm12[13],xmm14[14],xmm12[14],xmm14[15],xmm12[15]
; SSE2-NEXT:    pmullw %xmm13, %xmm14
; SSE2-NEXT:    movdqa %xmm14, %xmm13
; SSE2-NEXT:    punpcklwd {{.*#+}} xmm14 = xmm14[0],xmm12[0],xmm14[1],xmm12[1],xmm14[2],xmm12[2],xmm14[3],xmm12[3]
; SSE2-NEXT:    punpcklbw {{.*#+}} xmm10 = xmm10[0],xmm12[0],xmm10[1],xmm12[1],xmm10[2],xmm12[2],xmm10[3],xmm12[3],xmm10[4],xmm12[4],xmm10[5],xmm12[5],xmm10[6],xmm12[6],xmm10[7],xmm12[7]
; SSE2-NEXT:    punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm12[0],xmm6[1],xmm12[1],xmm6[2],xmm12[2],xmm6[3],xmm12[3],xmm6[4],xmm12[4],xmm6[5],xmm12[5],xmm6[6],xmm12[6],xmm6[7],xmm12[7]
; SSE2-NEXT:    pmullw %xmm6, %xmm10
; SSE2-NEXT:    movdqa %xmm10, %xmm6
; SSE2-NEXT:    punpckhwd {{.*#+}} xmm6 = xmm6[4],xmm12[4],xmm6[5],xmm12[5],xmm6[6],xmm12[6],xmm6[7],xmm12[7]
; SSE2-NEXT:    paddd %xmm14, %xmm6
; SSE2-NEXT:    movdqa %xmm11, %xmm14
; SSE2-NEXT:    punpckhbw {{.*#+}} xmm14 = xmm14[8],xmm12[8],xmm14[9],xmm12[9],xmm14[10],xmm12[10],xmm14[11],xmm12[11],xmm14[12],xmm12[12],xmm14[13],xmm12[13],xmm14[14],xmm12[14],xmm14[15],xmm12[15]
; SSE2-NEXT:    movdqa %xmm5, %xmm15
; SSE2-NEXT:    punpckhbw {{.*#+}} xmm15 = xmm15[8],xmm12[8],xmm15[9],xmm12[9],xmm15[10],xmm12[10],xmm15[11],xmm12[11],xmm15[12],xmm12[12],xmm15[13],xmm12[13],xmm15[14],xmm12[14],xmm15[15],xmm12[15]
; SSE2-NEXT:    pmullw %xmm14, %xmm15
; SSE2-NEXT:    movdqa %xmm15, %xmm14
; SSE2-NEXT:    punpcklwd {{.*#+}} xmm15 = xmm15[0],xmm12[0],xmm15[1],xmm12[1],xmm15[2],xmm12[2],xmm15[3],xmm12[3]
; SSE2-NEXT:    punpcklbw {{.*#+}} xmm11 = xmm11[0],xmm12[0],xmm11[1],xmm12[1],xmm11[2],xmm12[2],xmm11[3],xmm12[3],xmm11[4],xmm12[4],xmm11[5],xmm12[5],xmm11[6],xmm12[6],xmm11[7],xmm12[7]
; SSE2-NEXT:    punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm12[0],xmm5[1],xmm12[1],xmm5[2],xmm12[2],xmm5[3],xmm12[3],xmm5[4],xmm12[4],xmm5[5],xmm12[5],xmm5[6],xmm12[6],xmm5[7],xmm12[7]
; SSE2-NEXT:    pmullw %xmm5, %xmm11
; SSE2-NEXT:    movdqa %xmm11, %xmm5
; SSE2-NEXT:    punpckhwd {{.*#+}} xmm5 = xmm5[4],xmm12[4],xmm5[5],xmm12[5],xmm5[6],xmm12[6],xmm5[7],xmm12[7]
; SSE2-NEXT:    paddd %xmm15, %xmm5
; SSE2-NEXT:    movdqa {{[0-9]+}}(%rsp), %xmm15
; SSE2-NEXT:    movdqa %xmm15, %xmm1
; SSE2-NEXT:    punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm12[8],xmm1[9],xmm12[9],xmm1[10],xmm12[10],xmm1[11],xmm12[11],xmm1[12],xmm12[12],xmm1[13],xmm12[13],xmm1[14],xmm12[14],xmm1[15],xmm12[15]
; SSE2-NEXT:    movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
; SSE2-NEXT:    movdqa %xmm2, %xmm0
; SSE2-NEXT:    punpckhbw {{.*#+}} xmm0 = xmm0[8],xmm12[8],xmm0[9],xmm12[9],xmm0[10],xmm12[10],xmm0[11],xmm12[11],xmm0[12],xmm12[12],xmm0[13],xmm12[13],xmm0[14],xmm12[14],xmm0[15],xmm12[15]
; SSE2-NEXT:    pmullw %xmm1, %xmm0
; SSE2-NEXT:    punpcklbw {{.*#+}} xmm15 = xmm15[0],xmm12[0],xmm15[1],xmm12[1],xmm15[2],xmm12[2],xmm15[3],xmm12[3],xmm15[4],xmm12[4],xmm15[5],xmm12[5],xmm15[6],xmm12[6],xmm15[7],xmm12[7]
; SSE2-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm12[0],xmm2[1],xmm12[1],xmm2[2],xmm12[2],xmm2[3],xmm12[3],xmm2[4],xmm12[4],xmm2[5],xmm12[5],xmm2[6],xmm12[6],xmm2[7],xmm12[7]
; SSE2-NEXT:    pmullw %xmm2, %xmm15
; SSE2-NEXT:    movdqa %xmm0, %xmm2
; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm12[0],xmm0[1],xmm12[1],xmm0[2],xmm12[2],xmm0[3],xmm12[3]
; SSE2-NEXT:    movdqa %xmm15, %xmm1
; SSE2-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm12[4],xmm1[5],xmm12[5],xmm1[6],xmm12[6],xmm1[7],xmm12[7]
; SSE2-NEXT:    paddd %xmm0, %xmm1
; SSE2-NEXT:    punpckhwd {{.*#+}} xmm9 = xmm9[4],xmm12[4],xmm9[5],xmm12[5],xmm9[6],xmm12[6],xmm9[7],xmm12[7]
; SSE2-NEXT:    punpcklwd {{.*#+}} xmm8 = xmm8[0],xmm12[0],xmm8[1],xmm12[1],xmm8[2],xmm12[2],xmm8[3],xmm12[3]
; SSE2-NEXT:    punpckhwd {{.*#+}} xmm13 = xmm13[4],xmm12[4],xmm13[5],xmm12[5],xmm13[6],xmm12[6],xmm13[7],xmm12[7]
; SSE2-NEXT:    punpcklwd {{.*#+}} xmm10 = xmm10[0],xmm12[0],xmm10[1],xmm12[1],xmm10[2],xmm12[2],xmm10[3],xmm12[3]
; SSE2-NEXT:    punpckhwd {{.*#+}} xmm14 = xmm14[4],xmm12[4],xmm14[5],xmm12[5],xmm14[6],xmm12[6],xmm14[7],xmm12[7]
; SSE2-NEXT:    punpcklwd {{.*#+}} xmm11 = xmm11[0],xmm12[0],xmm11[1],xmm12[1],xmm11[2],xmm12[2],xmm11[3],xmm12[3]
; SSE2-NEXT:    punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm12[4],xmm2[5],xmm12[5],xmm2[6],xmm12[6],xmm2[7],xmm12[7]
; SSE2-NEXT:    punpcklwd {{.*#+}} xmm15 = xmm15[0],xmm12[0],xmm15[1],xmm12[1],xmm15[2],xmm12[2],xmm15[3],xmm12[3]
; SSE2-NEXT:    paddd %xmm15, %xmm3
; SSE2-NEXT:    paddd %xmm1, %xmm3
; SSE2-NEXT:    paddd %xmm2, %xmm3
; SSE2-NEXT:    paddd %xmm11, %xmm4
; SSE2-NEXT:    paddd %xmm5, %xmm4
; SSE2-NEXT:    paddd %xmm14, %xmm4
; SSE2-NEXT:    movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
; SSE2-NEXT:    paddd %xmm10, %xmm2
; SSE2-NEXT:    paddd %xmm6, %xmm2
; SSE2-NEXT:    paddd %xmm13, %xmm2
; SSE2-NEXT:    movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
; SSE2-NEXT:    paddd %xmm8, %xmm5
; SSE2-NEXT:    paddd %xmm7, %xmm5
; SSE2-NEXT:    paddd %xmm9, %xmm5
; SSE2-NEXT:    movdqa %xmm3, %xmm0
; SSE2-NEXT:    movdqa %xmm4, %xmm1
; SSE2-NEXT:    movdqa %xmm5, %xmm3
; SSE2-NEXT:    retq
;
; SSE42-LABEL: partial_reduce_umla_i8_v16i32:
; SSE42:       # %bb.0:
; SSE42-NEXT:    movaps %xmm7, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE42-NEXT:    movaps %xmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE42-NEXT:    movaps %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE42-NEXT:    movdqa %xmm1, %xmm7
; SSE42-NEXT:    movdqa %xmm0, %xmm3
; SSE42-NEXT:    movdqa {{[0-9]+}}(%rsp), %xmm8
; SSE42-NEXT:    movdqa {{[0-9]+}}(%rsp), %xmm12
; SSE42-NEXT:    movdqa {{[0-9]+}}(%rsp), %xmm10
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm9 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero
; SSE42-NEXT:    pshufd {{.*#+}} xmm11 = xmm4[1,1,1,1]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm15 = xmm11[0],zero,zero,zero,xmm11[1],zero,zero,zero,xmm11[2],zero,zero,zero,xmm11[3],zero,zero,zero
; SSE42-NEXT:    pshufd {{.*#+}} xmm11 = xmm4[2,3,2,3]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm14 = xmm11[0],zero,zero,zero,xmm11[1],zero,zero,zero,xmm11[2],zero,zero,zero,xmm11[3],zero,zero,zero
; SSE42-NEXT:    pshufd {{.*#+}} xmm4 = xmm4[3,3,3,3]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm13 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm11 = xmm5[0],zero,zero,zero,xmm5[1],zero,zero,zero,xmm5[2],zero,zero,zero,xmm5[3],zero,zero,zero
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm0 = xmm10[0],zero,zero,zero,xmm10[1],zero,zero,zero,xmm10[2],zero,zero,zero,xmm10[3],zero,zero,zero
; SSE42-NEXT:    pmaddwd %xmm9, %xmm0
; SSE42-NEXT:    movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE42-NEXT:    pshufd {{.*#+}} xmm9 = xmm10[1,1,1,1]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm9 = xmm9[0],zero,zero,zero,xmm9[1],zero,zero,zero,xmm9[2],zero,zero,zero,xmm9[3],zero,zero,zero
; SSE42-NEXT:    pmaddwd %xmm15, %xmm9
; SSE42-NEXT:    pshufd {{.*#+}} xmm15 = xmm10[2,3,2,3]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm15 = xmm15[0],zero,zero,zero,xmm15[1],zero,zero,zero,xmm15[2],zero,zero,zero,xmm15[3],zero,zero,zero
; SSE42-NEXT:    pmaddwd %xmm14, %xmm15
; SSE42-NEXT:    pshufd {{.*#+}} xmm14 = xmm5[1,1,1,1]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm14 = xmm14[0],zero,zero,zero,xmm14[1],zero,zero,zero,xmm14[2],zero,zero,zero,xmm14[3],zero,zero,zero
; SSE42-NEXT:    pshufd {{.*#+}} xmm10 = xmm10[3,3,3,3]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm10 = xmm10[0],zero,zero,zero,xmm10[1],zero,zero,zero,xmm10[2],zero,zero,zero,xmm10[3],zero,zero,zero
; SSE42-NEXT:    pmaddwd %xmm13, %xmm10
; SSE42-NEXT:    pshufd {{.*#+}} xmm13 = xmm5[2,3,2,3]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm13 = xmm13[0],zero,zero,zero,xmm13[1],zero,zero,zero,xmm13[2],zero,zero,zero,xmm13[3],zero,zero,zero
; SSE42-NEXT:    pshufd {{.*#+}} xmm5 = xmm5[3,3,3,3]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm2 = xmm5[0],zero,zero,zero,xmm5[1],zero,zero,zero,xmm5[2],zero,zero,zero,xmm5[3],zero,zero,zero
; SSE42-NEXT:    paddd %xmm15, %xmm10
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm5 = xmm12[0],zero,zero,zero,xmm12[1],zero,zero,zero,xmm12[2],zero,zero,zero,xmm12[3],zero,zero,zero
; SSE42-NEXT:    pmaddwd %xmm11, %xmm5
; SSE42-NEXT:    pshufd {{.*#+}} xmm11 = xmm12[1,1,1,1]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm11 = xmm11[0],zero,zero,zero,xmm11[1],zero,zero,zero,xmm11[2],zero,zero,zero,xmm11[3],zero,zero,zero
; SSE42-NEXT:    pmaddwd %xmm14, %xmm11
; SSE42-NEXT:    pshufd {{.*#+}} xmm14 = xmm12[2,3,2,3]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm14 = xmm14[0],zero,zero,zero,xmm14[1],zero,zero,zero,xmm14[2],zero,zero,zero,xmm14[3],zero,zero,zero
; SSE42-NEXT:    pmaddwd %xmm13, %xmm14
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm15 = xmm6[0],zero,zero,zero,xmm6[1],zero,zero,zero,xmm6[2],zero,zero,zero,xmm6[3],zero,zero,zero
; SSE42-NEXT:    pshufd {{.*#+}} xmm12 = xmm12[3,3,3,3]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm12 = xmm12[0],zero,zero,zero,xmm12[1],zero,zero,zero,xmm12[2],zero,zero,zero,xmm12[3],zero,zero,zero
; SSE42-NEXT:    pmaddwd %xmm2, %xmm12
; SSE42-NEXT:    pshufd {{.*#+}} xmm2 = xmm6[1,1,1,1]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm2 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero
; SSE42-NEXT:    paddd %xmm14, %xmm12
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm13 = xmm8[0],zero,zero,zero,xmm8[1],zero,zero,zero,xmm8[2],zero,zero,zero,xmm8[3],zero,zero,zero
; SSE42-NEXT:    pmaddwd %xmm15, %xmm13
; SSE42-NEXT:    pshufd {{.*#+}} xmm14 = xmm8[1,1,1,1]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm14 = xmm14[0],zero,zero,zero,xmm14[1],zero,zero,zero,xmm14[2],zero,zero,zero,xmm14[3],zero,zero,zero
; SSE42-NEXT:    pmaddwd %xmm2, %xmm14
; SSE42-NEXT:    pshufd {{.*#+}} xmm2 = xmm6[2,3,2,3]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm2 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero
; SSE42-NEXT:    pshufd {{.*#+}} xmm15 = xmm8[2,3,2,3]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm15 = xmm15[0],zero,zero,zero,xmm15[1],zero,zero,zero,xmm15[2],zero,zero,zero,xmm15[3],zero,zero,zero
; SSE42-NEXT:    pmaddwd %xmm2, %xmm15
; SSE42-NEXT:    pshufd {{.*#+}} xmm2 = xmm6[3,3,3,3]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm2 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero
; SSE42-NEXT:    pshufd {{.*#+}} xmm6 = xmm8[3,3,3,3]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm6 = xmm6[0],zero,zero,zero,xmm6[1],zero,zero,zero,xmm6[2],zero,zero,zero,xmm6[3],zero,zero,zero
; SSE42-NEXT:    pmaddwd %xmm2, %xmm6
; SSE42-NEXT:    movdqa {{[0-9]+}}(%rsp), %xmm2
; SSE42-NEXT:    paddd %xmm15, %xmm6
; SSE42-NEXT:    movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm15 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm8 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero
; SSE42-NEXT:    pmaddwd %xmm15, %xmm8
; SSE42-NEXT:    pshufd {{.*#+}} xmm15 = xmm1[1,1,1,1]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm0 = xmm15[0],zero,zero,zero,xmm15[1],zero,zero,zero,xmm15[2],zero,zero,zero,xmm15[3],zero,zero,zero
; SSE42-NEXT:    pshufd {{.*#+}} xmm15 = xmm2[1,1,1,1]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm15 = xmm15[0],zero,zero,zero,xmm15[1],zero,zero,zero,xmm15[2],zero,zero,zero,xmm15[3],zero,zero,zero
; SSE42-NEXT:    pmaddwd %xmm0, %xmm15
; SSE42-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
; SSE42-NEXT:    pshufd {{.*#+}} xmm4 = xmm2[2,3,2,3]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero
; SSE42-NEXT:    pmaddwd %xmm0, %xmm4
; SSE42-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[3,3,3,3]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
; SSE42-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[3,3,3,3]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm1 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero
; SSE42-NEXT:    pmaddwd %xmm0, %xmm1
; SSE42-NEXT:    paddd %xmm4, %xmm1
; SSE42-NEXT:    paddd {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Folded Reload
; SSE42-NEXT:    paddd %xmm9, %xmm3
; SSE42-NEXT:    paddd %xmm10, %xmm3
; SSE42-NEXT:    paddd %xmm5, %xmm7
; SSE42-NEXT:    paddd %xmm11, %xmm7
; SSE42-NEXT:    paddd %xmm12, %xmm7
; SSE42-NEXT:    movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
; SSE42-NEXT:    paddd %xmm13, %xmm2
; SSE42-NEXT:    paddd %xmm14, %xmm2
; SSE42-NEXT:    paddd %xmm6, %xmm2
; SSE42-NEXT:    movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 16-byte Reload
; SSE42-NEXT:    paddd %xmm8, %xmm4
; SSE42-NEXT:    paddd %xmm15, %xmm4
; SSE42-NEXT:    paddd %xmm1, %xmm4
; SSE42-NEXT:    movdqa %xmm3, %xmm0
; SSE42-NEXT:    movdqa %xmm7, %xmm1
; SSE42-NEXT:    movdqa %xmm4, %xmm3
; SSE42-NEXT:    retq
;
; AVX2-LABEL: partial_reduce_umla_i8_v16i32:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm6 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero,xmm2[4],zero,zero,zero,xmm2[5],zero,zero,zero,xmm2[6],zero,zero,zero,xmm2[7],zero,zero,zero
; AVX2-NEXT:    vpshufd {{.*#+}} xmm7 = xmm2[2,3,2,3]
; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm7 = xmm7[0],zero,zero,zero,xmm7[1],zero,zero,zero,xmm7[2],zero,zero,zero,xmm7[3],zero,zero,zero,xmm7[4],zero,zero,zero,xmm7[5],zero,zero,zero,xmm7[6],zero,zero,zero,xmm7[7],zero,zero,zero
; AVX2-NEXT:    vextracti128 $1, %ymm2, %xmm2
; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm8 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero,xmm2[4],zero,zero,zero,xmm2[5],zero,zero,zero,xmm2[6],zero,zero,zero,xmm2[7],zero,zero,zero
; AVX2-NEXT:    vpshufd {{.*#+}} xmm2 = xmm2[2,3,2,3]
; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm2 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero,xmm2[4],zero,zero,zero,xmm2[5],zero,zero,zero,xmm2[6],zero,zero,zero,xmm2[7],zero,zero,zero
; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm9 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero,xmm3[4],zero,zero,zero,xmm3[5],zero,zero,zero,xmm3[6],zero,zero,zero,xmm3[7],zero,zero,zero
; AVX2-NEXT:    vpshufd {{.*#+}} xmm10 = xmm3[2,3,2,3]
; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm10 = xmm10[0],zero,zero,zero,xmm10[1],zero,zero,zero,xmm10[2],zero,zero,zero,xmm10[3],zero,zero,zero,xmm10[4],zero,zero,zero,xmm10[5],zero,zero,zero,xmm10[6],zero,zero,zero,xmm10[7],zero,zero,zero
; AVX2-NEXT:    vextracti128 $1, %ymm3, %xmm3
; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm11 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero,xmm3[4],zero,zero,zero,xmm3[5],zero,zero,zero,xmm3[6],zero,zero,zero,xmm3[7],zero,zero,zero
; AVX2-NEXT:    vpshufd {{.*#+}} xmm3 = xmm3[2,3,2,3]
; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero,xmm3[4],zero,zero,zero,xmm3[5],zero,zero,zero,xmm3[6],zero,zero,zero,xmm3[7],zero,zero,zero
; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm12 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero,xmm4[4],zero,zero,zero,xmm4[5],zero,zero,zero,xmm4[6],zero,zero,zero,xmm4[7],zero,zero,zero
; AVX2-NEXT:    vpmaddwd %ymm6, %ymm12, %ymm6
; AVX2-NEXT:    vpshufd {{.*#+}} xmm12 = xmm4[2,3,2,3]
; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm12 = xmm12[0],zero,zero,zero,xmm12[1],zero,zero,zero,xmm12[2],zero,zero,zero,xmm12[3],zero,zero,zero,xmm12[4],zero,zero,zero,xmm12[5],zero,zero,zero,xmm12[6],zero,zero,zero,xmm12[7],zero,zero,zero
; AVX2-NEXT:    vpmaddwd %ymm7, %ymm12, %ymm7
; AVX2-NEXT:    vextracti128 $1, %ymm4, %xmm4
; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm12 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero,xmm4[4],zero,zero,zero,xmm4[5],zero,zero,zero,xmm4[6],zero,zero,zero,xmm4[7],zero,zero,zero
; AVX2-NEXT:    vpmaddwd %ymm12, %ymm8, %ymm8
; AVX2-NEXT:    vpshufd {{.*#+}} xmm4 = xmm4[2,3,2,3]
; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero,xmm4[4],zero,zero,zero,xmm4[5],zero,zero,zero,xmm4[6],zero,zero,zero,xmm4[7],zero,zero,zero
; AVX2-NEXT:    vpmaddwd %ymm4, %ymm2, %ymm2
; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm4 = xmm5[0],zero,zero,zero,xmm5[1],zero,zero,zero,xmm5[2],zero,zero,zero,xmm5[3],zero,zero,zero,xmm5[4],zero,zero,zero,xmm5[5],zero,zero,zero,xmm5[6],zero,zero,zero,xmm5[7],zero,zero,zero
; AVX2-NEXT:    vpmaddwd %ymm4, %ymm9, %ymm4
; AVX2-NEXT:    vpshufd {{.*#+}} xmm9 = xmm5[2,3,2,3]
; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm9 = xmm9[0],zero,zero,zero,xmm9[1],zero,zero,zero,xmm9[2],zero,zero,zero,xmm9[3],zero,zero,zero,xmm9[4],zero,zero,zero,xmm9[5],zero,zero,zero,xmm9[6],zero,zero,zero,xmm9[7],zero,zero,zero
; AVX2-NEXT:    vpmaddwd %ymm9, %ymm10, %ymm9
; AVX2-NEXT:    vextracti128 $1, %ymm5, %xmm5
; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm10 = xmm5[0],zero,zero,zero,xmm5[1],zero,zero,zero,xmm5[2],zero,zero,zero,xmm5[3],zero,zero,zero,xmm5[4],zero,zero,zero,xmm5[5],zero,zero,zero,xmm5[6],zero,zero,zero,xmm5[7],zero,zero,zero
; AVX2-NEXT:    vpmaddwd %ymm10, %ymm11, %ymm10
; AVX2-NEXT:    vpshufd {{.*#+}} xmm5 = xmm5[2,3,2,3]
; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm5 = xmm5[0],zero,zero,zero,xmm5[1],zero,zero,zero,xmm5[2],zero,zero,zero,xmm5[3],zero,zero,zero,xmm5[4],zero,zero,zero,xmm5[5],zero,zero,zero,xmm5[6],zero,zero,zero,xmm5[7],zero,zero,zero
; AVX2-NEXT:    vpmaddwd %ymm5, %ymm3, %ymm3
; AVX2-NEXT:    vpaddd %ymm6, %ymm0, %ymm0
; AVX2-NEXT:    vpaddd %ymm7, %ymm0, %ymm0
; AVX2-NEXT:    vpaddd %ymm0, %ymm8, %ymm0
; AVX2-NEXT:    vpaddd %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpaddd %ymm4, %ymm1, %ymm1
; AVX2-NEXT:    vpaddd %ymm1, %ymm9, %ymm1
; AVX2-NEXT:    vpaddd %ymm1, %ymm10, %ymm1
; AVX2-NEXT:    vpaddd %ymm3, %ymm1, %ymm1
; AVX2-NEXT:    retq
;
; AVX512-LABEL: partial_reduce_umla_i8_v16i32:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm6 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero,xmm2[4],zero,zero,zero,xmm2[5],zero,zero,zero,xmm2[6],zero,zero,zero,xmm2[7],zero,zero,zero
; AVX512-NEXT:    vpshufd {{.*#+}} xmm7 = xmm2[2,3,2,3]
; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm7 = xmm7[0],zero,zero,zero,xmm7[1],zero,zero,zero,xmm7[2],zero,zero,zero,xmm7[3],zero,zero,zero,xmm7[4],zero,zero,zero,xmm7[5],zero,zero,zero,xmm7[6],zero,zero,zero,xmm7[7],zero,zero,zero
; AVX512-NEXT:    vextracti128 $1, %ymm2, %xmm2
; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm8 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero,xmm2[4],zero,zero,zero,xmm2[5],zero,zero,zero,xmm2[6],zero,zero,zero,xmm2[7],zero,zero,zero
; AVX512-NEXT:    vpshufd {{.*#+}} xmm2 = xmm2[2,3,2,3]
; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm2 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero,xmm2[4],zero,zero,zero,xmm2[5],zero,zero,zero,xmm2[6],zero,zero,zero,xmm2[7],zero,zero,zero
; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm9 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero,xmm3[4],zero,zero,zero,xmm3[5],zero,zero,zero,xmm3[6],zero,zero,zero,xmm3[7],zero,zero,zero
; AVX512-NEXT:    vpshufd {{.*#+}} xmm10 = xmm3[2,3,2,3]
; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm10 = xmm10[0],zero,zero,zero,xmm10[1],zero,zero,zero,xmm10[2],zero,zero,zero,xmm10[3],zero,zero,zero,xmm10[4],zero,zero,zero,xmm10[5],zero,zero,zero,xmm10[6],zero,zero,zero,xmm10[7],zero,zero,zero
; AVX512-NEXT:    vextracti128 $1, %ymm3, %xmm3
; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm11 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero,xmm3[4],zero,zero,zero,xmm3[5],zero,zero,zero,xmm3[6],zero,zero,zero,xmm3[7],zero,zero,zero
; AVX512-NEXT:    vpshufd {{.*#+}} xmm3 = xmm3[2,3,2,3]
; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero,xmm3[4],zero,zero,zero,xmm3[5],zero,zero,zero,xmm3[6],zero,zero,zero,xmm3[7],zero,zero,zero
; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm12 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero,xmm4[4],zero,zero,zero,xmm4[5],zero,zero,zero,xmm4[6],zero,zero,zero,xmm4[7],zero,zero,zero
; AVX512-NEXT:    vpmaddwd %ymm6, %ymm12, %ymm6
; AVX512-NEXT:    vpshufd {{.*#+}} xmm12 = xmm4[2,3,2,3]
; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm12 = xmm12[0],zero,zero,zero,xmm12[1],zero,zero,zero,xmm12[2],zero,zero,zero,xmm12[3],zero,zero,zero,xmm12[4],zero,zero,zero,xmm12[5],zero,zero,zero,xmm12[6],zero,zero,zero,xmm12[7],zero,zero,zero
; AVX512-NEXT:    vpmaddwd %ymm7, %ymm12, %ymm7
; AVX512-NEXT:    vextracti128 $1, %ymm4, %xmm4
; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm12 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero,xmm4[4],zero,zero,zero,xmm4[5],zero,zero,zero,xmm4[6],zero,zero,zero,xmm4[7],zero,zero,zero
; AVX512-NEXT:    vpmaddwd %ymm12, %ymm8, %ymm8
; AVX512-NEXT:    vpshufd {{.*#+}} xmm4 = xmm4[2,3,2,3]
; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero,xmm4[4],zero,zero,zero,xmm4[5],zero,zero,zero,xmm4[6],zero,zero,zero,xmm4[7],zero,zero,zero
; AVX512-NEXT:    vpmaddwd %ymm4, %ymm2, %ymm2
; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm4 = xmm5[0],zero,zero,zero,xmm5[1],zero,zero,zero,xmm5[2],zero,zero,zero,xmm5[3],zero,zero,zero,xmm5[4],zero,zero,zero,xmm5[5],zero,zero,zero,xmm5[6],zero,zero,zero,xmm5[7],zero,zero,zero
; AVX512-NEXT:    vpmaddwd %ymm4, %ymm9, %ymm4
; AVX512-NEXT:    vpshufd {{.*#+}} xmm9 = xmm5[2,3,2,3]
; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm9 = xmm9[0],zero,zero,zero,xmm9[1],zero,zero,zero,xmm9[2],zero,zero,zero,xmm9[3],zero,zero,zero,xmm9[4],zero,zero,zero,xmm9[5],zero,zero,zero,xmm9[6],zero,zero,zero,xmm9[7],zero,zero,zero
; AVX512-NEXT:    vpmaddwd %ymm9, %ymm10, %ymm9
; AVX512-NEXT:    vextracti128 $1, %ymm5, %xmm5
; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm10 = xmm5[0],zero,zero,zero,xmm5[1],zero,zero,zero,xmm5[2],zero,zero,zero,xmm5[3],zero,zero,zero,xmm5[4],zero,zero,zero,xmm5[5],zero,zero,zero,xmm5[6],zero,zero,zero,xmm5[7],zero,zero,zero
; AVX512-NEXT:    vpmaddwd %ymm10, %ymm11, %ymm10
; AVX512-NEXT:    vpshufd {{.*#+}} xmm5 = xmm5[2,3,2,3]
; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm5 = xmm5[0],zero,zero,zero,xmm5[1],zero,zero,zero,xmm5[2],zero,zero,zero,xmm5[3],zero,zero,zero,xmm5[4],zero,zero,zero,xmm5[5],zero,zero,zero,xmm5[6],zero,zero,zero,xmm5[7],zero,zero,zero
; AVX512-NEXT:    vpmaddwd %ymm5, %ymm3, %ymm3
; AVX512-NEXT:    vpaddd %ymm6, %ymm0, %ymm0
; AVX512-NEXT:    vpaddd %ymm7, %ymm0, %ymm0
; AVX512-NEXT:    vpaddd %ymm0, %ymm8, %ymm0
; AVX512-NEXT:    vpaddd %ymm2, %ymm0, %ymm0
; AVX512-NEXT:    vpaddd %ymm4, %ymm1, %ymm1
; AVX512-NEXT:    vpaddd %ymm1, %ymm9, %ymm1
; AVX512-NEXT:    vpaddd %ymm1, %ymm10, %ymm1
; AVX512-NEXT:    vpaddd %ymm3, %ymm1, %ymm1
; AVX512-NEXT:    retq
;
; AVXVNNIINT-LABEL: partial_reduce_umla_i8_v16i32:
; AVXVNNIINT:       # %bb.0:
; AVXVNNIINT-NEXT:    vpdpbuud %ymm4, %ymm2, %ymm0
; AVXVNNIINT-NEXT:    vpdpbuud %ymm5, %ymm3, %ymm1
; AVXVNNIINT-NEXT:    retq
;
; AVX512-VEXVNNI-LABEL: partial_reduce_umla_i8_v16i32:
; AVX512-VEXVNNI:       # %bb.0:
; AVX512-VEXVNNI-NEXT:    vextractf64x4 $1, %zmm2, %ymm3
; AVX512-VEXVNNI-NEXT:    vextractf64x4 $1, %zmm1, %ymm4
; AVX512-VEXVNNI-NEXT:    vextractf64x4 $1, %zmm0, %ymm5
; AVX512-VEXVNNI-NEXT:    vpdpbuud %ymm3, %ymm4, %ymm5
; AVX512-VEXVNNI-NEXT:    vpdpbuud %ymm2, %ymm1, %ymm0
; AVX512-VEXVNNI-NEXT:    vinsertf64x4 $1, %ymm5, %zmm0, %zmm0
; AVX512-VEXVNNI-NEXT:    retq
;
; AVX10-512-LABEL: partial_reduce_umla_i8_v16i32:
; AVX10-512:       # %bb.0:
; AVX10-512-NEXT:    vpdpbuud %zmm2, %zmm1, %zmm0
; AVX10-512-NEXT:    retq
;
; AVX10-256-LABEL: partial_reduce_umla_i8_v16i32:
; AVX10-256:       # %bb.0:
; AVX10-256-NEXT:    vpdpbuud %ymm4, %ymm2, %ymm0
; AVX10-256-NEXT:    vpdpbuud %ymm5, %ymm3, %ymm1
; AVX10-256-NEXT:    retq
  %a.ext = zext <64 x i8> %a to <64 x i32>
  %b.ext = zext <64 x i8> %b to <64 x i32>
  %mul = mul <64 x i32> %a.ext, %b.ext
  %res = call <16 x i32> @llvm.vector.partial.reduce.add.v16i32.v64i32(<16 x i32> %acc, <64 x i32> %mul)
  ret <16 x i32> %res
}

; i16 x i16 -> i32, zext x zext: vpdpwuud (AVX-VNNI-INT16, AVX10.2)

define <4 x i32> @partial_reduce_umla_i16_v4i32(<4 x i32> %acc, <8 x i16> %a, <8 x i16> %b) #0 {
; SSE2-LABEL: partial_reduce_umla_i16_v4i32:
; SSE2:       # %bb.0:
; SSE2-NEXT:    movdqa %xmm1, %xmm3
; SSE2-NEXT:    pmulhuw %xmm2, %xmm3
; SSE2-NEXT:    pmullw %xmm2, %xmm1
; SSE2-NEXT:    movdqa %xmm1, %xmm2
; SSE2-NEXT:    punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm3[4],xmm2[5],xmm3[5],xmm2[6],xmm3[6],xmm2[7],xmm3[7]
; SSE2-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3]
; SSE2-NEXT:    paddd %xmm1, %xmm0
; SSE2-NEXT:    paddd %xmm2, %xmm0
; SSE2-NEXT:    retq
;
; SSE42-LABEL: partial_reduce_umla_i16_v4i32:
; SSE42:       # %bb.0:
; SSE42-NEXT:    pxor %xmm3, %xmm3
; SSE42-NEXT:    pmovzxwd {{.*#+}} xmm4 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
; SSE42-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]
; SSE42-NEXT:    pmovzxwd {{.*#+}} xmm5 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero
; SSE42-NEXT:    punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm3[4],xmm2[5],xmm3[5],xmm2[6],xmm3[6],xmm2[7],xmm3[7]
; SSE42-NEXT:    pmulld %xmm1, %xmm2
; SSE42-NEXT:    pmulld %xmm4, %xmm5
; SSE42-NEXT:    paddd %xmm5, %xmm0
; SSE42-NEXT:    paddd %xmm2, %xmm0
; SSE42-NEXT:    retq
;
; AVX2-LABEL: partial_reduce_umla_i16_v4i32:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
; AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero
; AVX2-NEXT:    vpmulld %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    vpaddd %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    vextracti128 $1, %ymm1, %xmm1
; AVX2-NEXT:    vpaddd %xmm0, %xmm1, %xmm0
; AVX2-NEXT:    vzeroupper
; AVX2-NEXT:    retq
;
; AVX512-LABEL: partial_reduce_umla_i16_v4i32:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
; AVX512-NEXT:    vpmovzxwd {{.*#+}} ymm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero
; AVX512-NEXT:    vpmulld %ymm2, %ymm1, %ymm1
; AVX512-NEXT:    vpaddd %xmm1, %xmm0, %xmm0
; AVX512-NEXT:    vextracti128 $1, %ymm1, %xmm1
; AVX512-NEXT:    vpaddd %xmm0, %xmm1, %xmm0
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    retq
;
; AVXVNNIINT-LABEL: partial_reduce_umla_i16_v4i32:
; AVXVNNIINT:       # %bb.0:
; AVXVNNIINT-NEXT:    vpdpwuud %xmm2, %xmm1, %xmm0
; AVXVNNIINT-NEXT:    retq
;
; AVX512-VEXVNNI-LABEL: partial_reduce_umla_i16_v4i32:
; AVX512-VEXVNNI:       # %bb.0:
; AVX512-VEXVNNI-NEXT:    vpdpwuud %xmm2, %xmm1, %xmm0
; AVX512-VEXVNNI-NEXT:    retq
;
; AVX10-LABEL: partial_reduce_umla_i16_v4i32:
; AVX10:       # %bb.0:
; AVX10-NEXT:    vpdpwuud %xmm2, %xmm1, %xmm0
; AVX10-NEXT:    retq
  %a.ext = zext <8 x i16> %a to <8 x i32>
  %b.ext = zext <8 x i16> %b to <8 x i32>
  %mul = mul <8 x i32> %a.ext, %b.ext
  %res = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v8i32(<4 x i32> %acc, <8 x i32> %mul)
  ret <4 x i32> %res
}

define <8 x i32> @partial_reduce_umla_i16_v8i32(<8 x i32> %acc, <16 x i16> %a, <16 x i16> %b) #0 {
; SSE2-LABEL: partial_reduce_umla_i16_v8i32:
; SSE2:       # %bb.0:
; SSE2-NEXT:    movdqa %xmm3, %xmm6
; SSE2-NEXT:    pmulhuw %xmm5, %xmm6
; SSE2-NEXT:    pmullw %xmm5, %xmm3
; SSE2-NEXT:    movdqa %xmm3, %xmm5
; SSE2-NEXT:    punpckhwd {{.*#+}} xmm5 = xmm5[4],xmm6[4],xmm5[5],xmm6[5],xmm5[6],xmm6[6],xmm5[7],xmm6[7]
; SSE2-NEXT:    punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm6[0],xmm3[1],xmm6[1],xmm3[2],xmm6[2],xmm3[3],xmm6[3]
; SSE2-NEXT:    movdqa %xmm2, %xmm6
; SSE2-NEXT:    pmulhuw %xmm4, %xmm6
; SSE2-NEXT:    pmullw %xmm4, %xmm2
; SSE2-NEXT:    movdqa %xmm2, %xmm4
; SSE2-NEXT:    punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm6[4],xmm4[5],xmm6[5],xmm4[6],xmm6[6],xmm4[7],xmm6[7]
; SSE2-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm6[0],xmm2[1],xmm6[1],xmm2[2],xmm6[2],xmm2[3],xmm6[3]
; SSE2-NEXT:    paddd %xmm2, %xmm0
; SSE2-NEXT:    paddd %xmm4, %xmm0
; SSE2-NEXT:    paddd %xmm3, %xmm1
; SSE2-NEXT:    paddd %xmm5, %xmm1
; SSE2-NEXT:    retq
;
; SSE42-LABEL: partial_reduce_umla_i16_v8i32:
; SSE42:       # %bb.0:
; SSE42-NEXT:    pxor %xmm6, %xmm6
; SSE42-NEXT:    pmovzxwd {{.*#+}} xmm7 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero
; SSE42-NEXT:    punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm6[4],xmm2[5],xmm6[5],xmm2[6],xmm6[6],xmm2[7],xmm6[7]
; SSE42-NEXT:    pmovzxwd {{.*#+}} xmm8 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero
; SSE42-NEXT:    punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm6[4],xmm3[5],xmm6[5],xmm3[6],xmm6[6],xmm3[7],xmm6[7]
; SSE42-NEXT:    pmovzxwd {{.*#+}} xmm9 = xmm4[0],zero,xmm4[1],zero,xmm4[2],zero,xmm4[3],zero
; SSE42-NEXT:    punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm6[4],xmm4[5],xmm6[5],xmm4[6],xmm6[6],xmm4[7],xmm6[7]
; SSE42-NEXT:    pmulld %xmm2, %xmm4
; SSE42-NEXT:    pmovzxwd {{.*#+}} xmm2 = xmm5[0],zero,xmm5[1],zero,xmm5[2],zero,xmm5[3],zero
; SSE42-NEXT:    punpckhwd {{.*#+}} xmm5 = xmm5[4],xmm6[4],xmm5[5],xmm6[5],xmm5[6],xmm6[6],xmm5[7],xmm6[7]
; SSE42-NEXT:    pmulld %xmm3, %xmm5
; SSE42-NEXT:    pmulld %xmm7, %xmm9
; SSE42-NEXT:    pmulld %xmm8, %xmm2
; SSE42-NEXT:    paddd %xmm9, %xmm0
; SSE42-NEXT:    paddd %xmm4, %xmm0
; SSE42-NEXT:    paddd %xmm2, %xmm1
; SSE42-NEXT:    paddd %xmm5, %xmm1
; SSE42-NEXT:    retq
;
; AVX2-LABEL: partial_reduce_umla_i16_v8i32:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm3 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
; AVX2-NEXT:    vextracti128 $1, %ymm1, %xmm1
; AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
; AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm4 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero
; AVX2-NEXT:    vpmulld %ymm4, %ymm3, %ymm3
; AVX2-NEXT:    vextracti128 $1, %ymm2, %xmm2
; AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero
; AVX2-NEXT:    vpmulld %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    vpaddd %ymm3, %ymm0, %ymm0
; AVX2-NEXT:    vpaddd %ymm1, %ymm0, %ymm0
; AVX2-NEXT:    retq
;
; AVX512-LABEL: partial_reduce_umla_i16_v8i32:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vpmovzxwd {{.*#+}} ymm3 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
; AVX512-NEXT:    vextracti128 $1, %ymm1, %xmm1
; AVX512-NEXT:    vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
; AVX512-NEXT:    vpmovzxwd {{.*#+}} ymm4 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero
; AVX512-NEXT:    vpmulld %ymm4, %ymm3, %ymm3
; AVX512-NEXT:    vextracti128 $1, %ymm2, %xmm2
; AVX512-NEXT:    vpmovzxwd {{.*#+}} ymm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero
; AVX512-NEXT:    vpmulld %ymm2, %ymm1, %ymm1
; AVX512-NEXT:    vpaddd %ymm3, %ymm0, %ymm0
; AVX512-NEXT:    vpaddd %ymm1, %ymm0, %ymm0
; AVX512-NEXT:    retq
;
; AVXVNNIINT-LABEL: partial_reduce_umla_i16_v8i32:
; AVXVNNIINT:       # %bb.0:
; AVXVNNIINT-NEXT:    vpdpwuud %ymm2, %ymm1, %ymm0
; AVXVNNIINT-NEXT:    retq
;
; AVX512-VEXVNNI-LABEL: partial_reduce_umla_i16_v8i32:
; AVX512-VEXVNNI:       # %bb.0:
; AVX512-VEXVNNI-NEXT:    vpdpwuud %ymm2, %ymm1, %ymm0
; AVX512-VEXVNNI-NEXT:    retq
;
; AVX10-LABEL: partial_reduce_umla_i16_v8i32:
; AVX10:       # %bb.0:
; AVX10-NEXT:    vpdpwuud %ymm2, %ymm1, %ymm0
; AVX10-NEXT:    retq
  %a.ext = zext <16 x i16> %a to <16 x i32>
  %b.ext = zext <16 x i16> %b to <16 x i32>
  %mul = mul <16 x i32> %a.ext, %b.ext
  %res = call <8 x i32> @llvm.vector.partial.reduce.add.v8i32.v16i32(<8 x i32> %acc, <16 x i32> %mul)
  ret <8 x i32> %res
}

define <16 x i32> @partial_reduce_umla_i16_v16i32(<16 x i32> %acc, <32 x i16> %a, <32 x i16> %b) #0 {
; SSE2-LABEL: partial_reduce_umla_i16_v16i32:
; SSE2:       # %bb.0:
; SSE2-NEXT:    movdqa {{[0-9]+}}(%rsp), %xmm11
; SSE2-NEXT:    movdqa {{[0-9]+}}(%rsp), %xmm10
; SSE2-NEXT:    movdqa {{[0-9]+}}(%rsp), %xmm9
; SSE2-NEXT:    movdqa {{[0-9]+}}(%rsp), %xmm8
; SSE2-NEXT:    movdqa %xmm7, %xmm12
; SSE2-NEXT:    pmulhuw %xmm8, %xmm12
; SSE2-NEXT:    pmullw %xmm7, %xmm8
; SSE2-NEXT:    movdqa %xmm8, %xmm7
; SSE2-NEXT:    punpckhwd {{.*#+}} xmm7 = xmm7[4],xmm12[4],xmm7[5],xmm12[5],xmm7[6],xmm12[6],xmm7[7],xmm12[7]
; SSE2-NEXT:    punpcklwd {{.*#+}} xmm8 = xmm8[0],xmm12[0],xmm8[1],xmm12[1],xmm8[2],xmm12[2],xmm8[3],xmm12[3]
; SSE2-NEXT:    movdqa %xmm6, %xmm12
; SSE2-NEXT:    pmulhuw %xmm9, %xmm12
; SSE2-NEXT:    pmullw %xmm6, %xmm9
; SSE2-NEXT:    movdqa %xmm9, %xmm6
; SSE2-NEXT:    punpckhwd {{.*#+}} xmm6 = xmm6[4],xmm12[4],xmm6[5],xmm12[5],xmm6[6],xmm12[6],xmm6[7],xmm12[7]
; SSE2-NEXT:    punpcklwd {{.*#+}} xmm9 = xmm9[0],xmm12[0],xmm9[1],xmm12[1],xmm9[2],xmm12[2],xmm9[3],xmm12[3]
; SSE2-NEXT:    movdqa %xmm5, %xmm12
; SSE2-NEXT:    pmulhuw %xmm10, %xmm12
; SSE2-NEXT:    pmullw %xmm5, %xmm10
; SSE2-NEXT:    movdqa %xmm10, %xmm5
; SSE2-NEXT:    punpckhwd {{.*#+}} xmm5 = xmm5[4],xmm12[4],xmm5[5],xmm12[5],xmm5[6],xmm12[6],xmm5[7],xmm12[7]
; SSE2-NEXT:    punpcklwd {{.*#+}} xmm10 = xmm10[0],xmm12[0],xmm10[1],xmm12[1],xmm10[2],xmm12[2],xmm10[3],xmm12[3]
; SSE2-NEXT:    movdqa %xmm4, %xmm12
; SSE2-NEXT:    pmulhuw %xmm11, %xmm12
; SSE2-NEXT:    pmullw %xmm4, %xmm11
; SSE2-NEXT:    movdqa %xmm11, %xmm4
; SSE2-NEXT:    punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm12[4],xmm4[5],xmm12[5],xmm4[6],xmm12[6],xmm4[7],xmm12[7]
; SSE2-NEXT:    punpcklwd {{.*#+}} xmm11 = xmm11[0],xmm12[0],xmm11[1],xmm12[1],xmm11[2],xmm12[2],xmm11[3],xmm12[3]
; SSE2-NEXT:    paddd %xmm11, %xmm0
; SSE2-NEXT:    paddd %xmm4, %xmm0
; SSE2-NEXT:    paddd %xmm10, %xmm1
; SSE2-NEXT:    paddd %xmm5, %xmm1
; SSE2-NEXT:    paddd %xmm9, %xmm2
; SSE2-NEXT:    paddd %xmm6, %xmm2
; SSE2-NEXT:    paddd %xmm8, %xmm3
; SSE2-NEXT:    paddd %xmm7, %xmm3
; SSE2-NEXT:    retq
;
; SSE42-LABEL: partial_reduce_umla_i16_v16i32:
; SSE42:       # %bb.0:
; SSE42-NEXT:    movdqa %xmm3, %xmm12
; SSE42-NEXT:    movdqa %xmm2, %xmm11
; SSE42-NEXT:    movdqa %xmm1, %xmm3
; SSE42-NEXT:    movdqa %xmm0, %xmm2
; SSE42-NEXT:    movdqa {{[0-9]+}}(%rsp), %xmm8
; SSE42-NEXT:    movdqa {{[0-9]+}}(%rsp), %xmm9
; SSE42-NEXT:    movdqa {{[0-9]+}}(%rsp), %xmm10
; SSE42-NEXT:    pxor %xmm14, %xmm14
; SSE42-NEXT:    pmovzxwd {{.*#+}} xmm0 = xmm4[0],zero,xmm4[1],zero,xmm4[2],zero,xmm4[3],zero
; SSE42-NEXT:    movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE42-NEXT:    punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm14[4],xmm4[5],xmm14[5],xmm4[6],xmm14[6],xmm4[7],xmm14[7]
; SSE42-NEXT:    pmovzxwd {{.*#+}} xmm0 = xmm5[0],zero,xmm5[1],zero,xmm5[2],zero,xmm5[3],zero
; SSE42-NEXT:    movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE42-NEXT:    punpckhwd {{.*#+}} xmm5 = xmm5[4],xmm14[4],xmm5[5],xmm14[5],xmm5[6],xmm14[6],xmm5[7],xmm14[7]
; SSE42-NEXT:    pmovzxwd {{.*#+}} xmm13 = xmm6[0],zero,xmm6[1],zero,xmm6[2],zero,xmm6[3],zero
; SSE42-NEXT:    punpckhwd {{.*#+}} xmm6 = xmm6[4],xmm14[4],xmm6[5],xmm14[5],xmm6[6],xmm14[6],xmm6[7],xmm14[7]
; SSE42-NEXT:    pmovzxwd {{.*#+}} xmm15 = xmm10[0],zero,xmm10[1],zero,xmm10[2],zero,xmm10[3],zero
; SSE42-NEXT:    punpckhwd {{.*#+}} xmm10 = xmm10[4],xmm14[4],xmm10[5],xmm14[5],xmm10[6],xmm14[6],xmm10[7],xmm14[7]
; SSE42-NEXT:    pmulld %xmm4, %xmm10
; SSE42-NEXT:    pmovzxwd {{.*#+}} xmm4 = xmm9[0],zero,xmm9[1],zero,xmm9[2],zero,xmm9[3],zero
; SSE42-NEXT:    punpckhwd {{.*#+}} xmm9 = xmm9[4],xmm14[4],xmm9[5],xmm14[5],xmm9[6],xmm14[6],xmm9[7],xmm14[7]
; SSE42-NEXT:    pmulld %xmm5, %xmm9
; SSE42-NEXT:    pmovzxwd {{.*#+}} xmm5 = xmm8[0],zero,xmm8[1],zero,xmm8[2],zero,xmm8[3],zero
; SSE42-NEXT:    punpckhwd {{.*#+}} xmm8 = xmm8[4],xmm14[4],xmm8[5],xmm14[5],xmm8[6],xmm14[6],xmm8[7],xmm14[7]
; SSE42-NEXT:    pmulld %xmm6, %xmm8
; SSE42-NEXT:    pmovzxwd {{.*#+}} xmm6 = xmm7[0],zero,xmm7[1],zero,xmm7[2],zero,xmm7[3],zero
; SSE42-NEXT:    punpckhwd {{.*#+}} xmm7 = xmm7[4],xmm14[4],xmm7[5],xmm14[5],xmm7[6],xmm14[6],xmm7[7],xmm14[7]
; SSE42-NEXT:    movdqa {{[0-9]+}}(%rsp), %xmm0
; SSE42-NEXT:    pmovzxwd {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
; SSE42-NEXT:    punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm14[4],xmm0[5],xmm14[5],xmm0[6],xmm14[6],xmm0[7],xmm14[7]
; SSE42-NEXT:    pmulld %xmm7, %xmm0
; SSE42-NEXT:    pmulld {{[-0-9]+}}(%r{{[sb]}}p), %xmm15 # 16-byte Folded Reload
; SSE42-NEXT:    pmulld {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 16-byte Folded Reload
; SSE42-NEXT:    pmulld %xmm13, %xmm5
; SSE42-NEXT:    pmulld %xmm6, %xmm1
; SSE42-NEXT:    paddd %xmm15, %xmm2
; SSE42-NEXT:    paddd %xmm10, %xmm2
; SSE42-NEXT:    paddd %xmm4, %xmm3
; SSE42-NEXT:    paddd %xmm9, %xmm3
; SSE42-NEXT:    paddd %xmm5, %xmm11
; SSE42-NEXT:    paddd %xmm8, %xmm11
; SSE42-NEXT:    paddd %xmm1, %xmm12
; SSE42-NEXT:    paddd %xmm0, %xmm12
; SSE42-NEXT:    movdqa %xmm2, %xmm0
; SSE42-NEXT:    movdqa %xmm3, %xmm1
; SSE42-NEXT:    movdqa %xmm11, %xmm2
; SSE42-NEXT:    movdqa %xmm12, %xmm3
; SSE42-NEXT:    retq
;
; AVX2-LABEL: partial_reduce_umla_i16_v16i32:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm6 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero
; AVX2-NEXT:    vextracti128 $1, %ymm2, %xmm2
; AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero
; AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm7 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero,xmm3[4],zero,xmm3[5],zero,xmm3[6],zero,xmm3[7],zero
; AVX2-NEXT:    vextracti128 $1, %ymm3, %xmm3
; AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm8 = xmm4[0],zero,xmm4[1],zero,xmm4[2],zero,xmm4[3],zero,xmm4[4],zero,xmm4[5],zero,xmm4[6],zero,xmm4[7],zero
; AVX2-NEXT:    vpmulld %ymm8, %ymm6, %ymm6
; AVX2-NEXT:    vextracti128 $1, %ymm4, %xmm4
; AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm4 = xmm4[0],zero,xmm4[1],zero,xmm4[2],zero,xmm4[3],zero,xmm4[4],zero,xmm4[5],zero,xmm4[6],zero,xmm4[7],zero
; AVX2-NEXT:    vpmulld %ymm4, %ymm2, %ymm2
; AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm3 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero,xmm3[4],zero,xmm3[5],zero,xmm3[6],zero,xmm3[7],zero
; AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm4 = xmm5[0],zero,xmm5[1],zero,xmm5[2],zero,xmm5[3],zero,xmm5[4],zero,xmm5[5],zero,xmm5[6],zero,xmm5[7],zero
; AVX2-NEXT:    vpmulld %ymm4, %ymm7, %ymm4
; AVX2-NEXT:    vextracti128 $1, %ymm5, %xmm5
; AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm5 = xmm5[0],zero,xmm5[1],zero,xmm5[2],zero,xmm5[3],zero,xmm5[4],zero,xmm5[5],zero,xmm5[6],zero,xmm5[7],zero
; AVX2-NEXT:    vpmulld %ymm5, %ymm3, %ymm3
; AVX2-NEXT:    vpaddd %ymm6, %ymm0, %ymm0
; AVX2-NEXT:    vpaddd %ymm2, %ymm0, %ymm0
; AVX2-NEXT:    vpaddd %ymm4, %ymm1, %ymm1
; AVX2-NEXT:    vpaddd %ymm3, %ymm1, %ymm1
; AVX2-NEXT:    retq
;
; AVX512-LABEL: partial_reduce_umla_i16_v16i32:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vpmovzxwd {{.*#+}} ymm6 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero
; AVX512-NEXT:    vextracti128 $1, %ymm2, %xmm2
; AVX512-NEXT:    vpmovzxwd {{.*#+}} ymm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero
; AVX512-NEXT:    vpmovzxwd {{.*#+}} ymm7 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero,xmm3[4],zero,xmm3[5],zero,xmm3[6],zero,xmm3[7],zero
; AVX512-NEXT:    vextracti128 $1, %ymm3, %xmm3
; AVX512-NEXT:    vpmovzxwd {{.*#+}} ymm8 = xmm4[0],zero,xmm4[1],zero,xmm4[2],zero,xmm4[3],zero,xmm4[4],zero,xmm4[5],zero,xmm4[6],zero,xmm4[7],zero
; AVX512-NEXT:    vpmulld %ymm8, %ymm6, %ymm6
; AVX512-NEXT:    vextracti128 $1, %ymm4, %xmm4
; AVX512-NEXT:    vpmovzxwd {{.*#+}} ymm4 = xmm4[0],zero,xmm4[1],zero,xmm4[2],zero,xmm4[3],zero,xmm4[4],zero,xmm4[5],zero,xmm4[6],zero,xmm4[7],zero
; AVX512-NEXT:    vpmulld %ymm4, %ymm2, %ymm2
; AVX512-NEXT:    vpmovzxwd {{.*#+}} ymm3 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero,xmm3[4],zero,xmm3[5],zero,xmm3[6],zero,xmm3[7],zero
; AVX512-NEXT:    vpmovzxwd {{.*#+}} ymm4 = xmm5[0],zero,xmm5[1],zero,xmm5[2],zero,xmm5[3],zero,xmm5[4],zero,xmm5[5],zero,xmm5[6],zero,xmm5[7],zero
; AVX512-NEXT:    vpmulld %ymm4, %ymm7, %ymm4
; AVX512-NEXT:    vextracti128 $1, %ymm5, %xmm5
; AVX512-NEXT:    vpmovzxwd {{.*#+}} ymm5 = xmm5[0],zero,xmm5[1],zero,xmm5[2],zero,xmm5[3],zero,xmm5[4],zero,xmm5[5],zero,xmm5[6],zero,xmm5[7],zero
; AVX512-NEXT:    vpmulld %ymm5, %ymm3, %ymm3
; AVX512-NEXT:    vpaddd %ymm6, %ymm0, %ymm0
; AVX512-NEXT:    vpaddd %ymm2, %ymm0, %ymm0
; AVX512-NEXT:    vpaddd %ymm4, %ymm1, %ymm1
; AVX512-NEXT:    vpaddd %ymm3, %ymm1, %ymm1
; AVX512-NEXT:    retq
;
; AVXVNNIINT-LABEL: partial_reduce_umla_i16_v16i32:
; AVXVNNIINT:       # %bb.0:
; AVXVNNIINT-NEXT:    vpdpwuud %ymm4, %ymm2, %ymm0
; AVXVNNIINT-NEXT:    vpdpwuud %ymm5, %ymm3, %ymm1
; AVXVNNIINT-NEXT:    retq
;
; AVX512-VEXVNNI-LABEL: partial_reduce_umla_i16_v16i32:
; AVX512-VEXVNNI:       # %bb.0:
; AVX512-VEXVNNI-NEXT:    vextractf64x4 $1, %zmm2, %ymm3
; AVX512-VEXVNNI-NEXT:    vextractf64x4 $1, %zmm1, %ymm4
; AVX512-VEXVNNI-NEXT:    vextractf64x4 $1, %zmm0, %ymm5
; AVX512-VEXVNNI-NEXT:    vpdpwuud %ymm3, %ymm4, %ymm5
; AVX512-VEXVNNI-NEXT:    vpdpwuud %ymm2, %ymm1, %ymm0
; AVX512-VEXVNNI-NEXT:    vinsertf64x4 $1, %ymm5, %zmm0, %zmm0
; AVX512-VEXVNNI-NEXT:    retq
;
; AVX10-512-LABEL: partial_reduce_umla_i16_v16i32:
; AVX10-512:       # %bb.0:
; AVX10-512-NEXT:    vpdpwuud %zmm2, %zmm1, %zmm0
; AVX10-512-NEXT:    retq
;
; AVX10-256-LABEL: partial_reduce_umla_i16_v16i32:
; AVX10-256:       # %bb.0:
; AVX10-256-NEXT:    vpdpwuud %ymm4, %ymm2, %ymm0
; AVX10-256-NEXT:    vpdpwuud %ymm5, %ymm3, %ymm1
; AVX10-256-NEXT:    retq
  %a.ext = zext <32 x i16> %a to <32 x i32>
  %b.ext = zext <32 x i16> %b to <32 x i32>
  %mul = mul <32 x i32> %a.ext, %b.ext
  %res = call <16 x i32> @llvm.vector.partial.reduce.add.v16i32.v32i32(<16 x i32> %acc, <32 x i32> %mul)
  ret <16 x i32> %res
}

; Accumulators narrower than 128 bits are widened by expanding the partial
; reduction.

define <2 x i32> @partial_reduce_umla_i8_v2i32(<2 x i32> %acc, <8 x i8> %a, <8 x i8> %b) #0 {
; SSE2-LABEL: partial_reduce_umla_i8_v2i32:
; SSE2:       # %bb.0:
; SSE2-NEXT:    pxor %xmm3, %xmm3
; SSE2-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3],xmm2[4],xmm3[4],xmm2[5],xmm3[5],xmm2[6],xmm3[6],xmm2[7],xmm3[7]
; SSE2-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]
; SSE2-NEXT:    pmullw %xmm2, %xmm1
; SSE2-NEXT:    movdqa %xmm1, %xmm2
; SSE2-NEXT:    punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm3[4],xmm2[5],xmm3[5],xmm2[6],xmm3[6],xmm2[7],xmm3[7]
; SSE2-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3]
; SSE2-NEXT:    paddd %xmm1, %xmm0
; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm2[2,3,2,3]
; SSE2-NEXT:    paddd %xmm3, %xmm0
; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
; SSE2-NEXT:    paddd %xmm2, %xmm1
; SSE2-NEXT:    paddd %xmm1, %xmm0
; SSE2-NEXT:    retq
;
; SSE42-LABEL: partial_reduce_umla_i8_v2i32:
; SSE42:       # %bb.0:
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
; SSE42-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,1,1]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm4 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero
; SSE42-NEXT:    pmaddwd %xmm3, %xmm4
; SSE42-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[1,1,1,1]
; SSE42-NEXT:    pmovzxbd {{.*#+}} xmm2 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero
; SSE42-NEXT:    pmaddwd %xmm1, %xmm2
; SSE42-NEXT:    pshufd {{.*#+}} xmm1 = xmm4[2,3,2,3]
; SSE42-NEXT:    paddd %xmm2, %xmm1
; SSE42-NEXT:    paddd %xmm4, %xmm0
; SSE42-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[2,3,2,3]
; SSE42-NEXT:    paddd %xmm2, %xmm0
; SSE42-NEXT:    paddd %xmm1, %xmm0
; SSE42-NEXT:    retq
;
; AVX2-LABEL: partial_reduce_umla_i8_v2i32:
; AVX2:       # %bb.0:
; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero
; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm2 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero,xmm2[4],zero,zero,zero,xmm2[5],zero,zero,zero,xmm2[6],zero,zero,zero,xmm2[7],zero,zero,zero
; AVX2-NEXT:    vpmaddwd %ymm2, %ymm1, %ymm1
; AVX2-NEXT:    vpaddd %xmm1, %xmm0, %xmm0
; AVX2-NEXT:    vextracti128 $1, %ymm1, %xmm2
; AVX2-NEXT:    vpshufd {{.*#+}} xmm3 = xmm2[2,3,2,3]
; AVX2-NEXT:    vpaddd %xmm0, %xmm3, %xmm0
; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
; AVX2-NEXT:    vpaddd %xmm2, %xmm1, %xmm1
; AVX2-NEXT:    vpaddd %xmm0, %xmm1, %xmm0
; AVX2-NEXT:    vzeroupper
; AVX2-NEXT:    retq
;
; AVX512-LABEL: partial_reduce_umla_i8_v2i32:
; AVX512:       # %bb.0:
; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero
; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm2 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero,xmm2[4],zero,zero,zero,xmm2[5],zero,zero,zero,xmm2[6],zero,zero,zero,xmm2[7],zero,zero,zero
; AVX512-NEXT:    vpmaddwd %ymm2, %ymm1, %ymm1
; AVX512-NEXT:    vpaddd %xmm1, %xmm0, %xmm0
; AVX512-NEXT:    vextracti128 $1, %ymm1, %xmm2
; AVX512-NEXT:    vpshufd {{.*#+}} xmm3 = xmm2[2,3,2,3]
; AVX512-NEXT:    vpaddd %xmm0, %xmm3, %xmm0
; AVX512-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
; AVX512-NEXT:    vpaddd %xmm2, %xmm1, %xmm1
; AVX512-NEXT:    vpaddd %xmm0, %xmm1, %xmm0
; AVX512-NEXT:    vzeroupper
; AVX512-NEXT:    retq
;
; AVXVNNIINT-LABEL: partial_reduce_umla_i8_v2i32:
; AVXVNNIINT:       # %bb.0:
; AVXVNNIINT-NEXT:    vpmovzxbw {{.*#+}} xmm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero
; AVXVNNIINT-NEXT:    vpmovzxbw {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
; AVXVNNIINT-NEXT:    vpmullw %xmm2, %xmm1, %xmm1
; AVXVNNIINT-NEXT:    vpmovzxwd {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
; AVXVNNIINT-NEXT:    vpaddd %xmm2, %xmm0, %xmm0
; AVXVNNIINT-NEXT:    vpshufd {{.*#+}} xmm2 = xmm2[2,3,2,3]
; AVXVNNIINT-NEXT:    vpaddd %xmm0, %xmm2, %xmm0
; AVXVNNIINT-NEXT:    vpxor %xmm2, %xmm2, %xmm2
; AVXVNNIINT-NEXT:    vpunpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
; AVXVNNIINT-NEXT:    vpshufd {{.*#+}} xmm2 = xmm1[2,3,2,3]
; AVXVNNIINT-NEXT:    vpaddd %xmm1, %xmm2, %xmm1
; AVXVNNIINT-NEXT:    vpaddd %xmm0, %xmm1, %xmm0
; AVXVNNIINT-NEXT:    retq
;
; AVX512-VEXVNNI-LABEL: partial_reduce_umla_i8_v2i32:
; AVX512-VEXVNNI:       # %bb.0:
; AVX512-VEXVNNI-NEXT:    vpmovzxbw {{.*#+}} xmm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero
; AVX512-VEXVNNI-NEXT:    vpmovzxbw {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
; AVX512-VEXVNNI-NEXT:    vpmullw %xmm2, %xmm1, %xmm1
; AVX512-VEXVNNI-NEXT:    vpmovzxwd {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
; AVX512-VEXVNNI-NEXT:    vpaddd %xmm2, %xmm0, %xmm0
; AVX512-VEXVNNI-NEXT:    vpshufd {{.*#+}} xmm2 = xmm2[2,3,2,3]
; AVX512-VEXVNNI-NEXT:    vpaddd %xmm0, %xmm2, %xmm0
; AVX512-VEXVNNI-NEXT:    vpxor %xmm2, %xmm2, %xmm2
; AVX512-VEXVNNI-NEXT:    vpunpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
; AVX512-VEXVNNI-NEXT:    vpshufd {{.*#+}} xmm2 = xmm1[2,3,2,3]
; AVX512-VEXVNNI-NEXT:    vpaddd %xmm1, %xmm2, %xmm1
; AVX512-VEXVNNI-NEXT:    vpaddd %xmm0, %xmm1, %xmm0
; AVX512-VEXVNNI-NEXT:    retq
;
; AVX10-LABEL: partial_reduce_umla_i8_v2i32:
; AVX10:       # %bb.0:
; AVX10-NEXT:    vpmovzxbw {{.*#+}} xmm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero
; AVX10-NEXT:    vpmovzxbw {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
; AVX10-NEXT:    vpmullw %xmm2, %xmm1, %xmm1
; AVX10-NEXT:    vpmovzxwd {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
; AVX10-NEXT:    vpaddd %xmm2, %xmm0, %xmm0
; AVX10-NEXT:    vpshufd {{.*#+}} xmm2 = xmm2[2,3,2,3]
; AVX10-NEXT:    vpaddd %xmm0, %xmm2, %xmm0
; AVX10-NEXT:    vpxor %xmm2, %xmm2, %xmm2
; AVX10-NEXT:    vpunpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
; AVX10-NEXT:    vpshufd {{.*#+}} xmm2 = xmm1[2,3,2,3]
; AVX10-NEXT:    vpaddd %xmm1, %xmm2, %xmm1
; AVX10-NEXT:    vpaddd %xmm0, %xmm1, %xmm0
; AVX10-NEXT:    retq
  %a.ext = zext <8 x i8> %a to <8 x i32>
  %b.ext = zext <8 x i8> %b to <8 x i32>
  %mul = mul <8 x i32> %a.ext, %b.ext
  %res = call <2 x i32> @llvm.vector.partial.reduce.add.v2i32.v8i32(<2 x i32> %acc, <8 x i32> %mul)
  ret <2 x i32> %res
}

attributes #0 = { "min-legal-vector-width"="256" }