llvm/test/CodeGen/RISCV/combine-clmul.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=riscv64 -mattr=+zbc < %s | FileCheck %s

define i64 @combine_i64_cmul_constant() nounwind {
; CHECK-LABEL: combine_i64_cmul_constant:
; CHECK:       # %bb.0:
; CHECK-NEXT:    li a0, 60
; CHECK-NEXT:    ret
  %res = call i64 @llvm.clmul.i64(i64 6, i64 10)
  ret i64 %res
}

define i64 @combine_i64_cmul_larger() nounwind {
; CHECK-LABEL: combine_i64_cmul_larger:
; CHECK:       # %bb.0:
; CHECK-NEXT:    lui a0, 5
; CHECK-NEXT:    addi a0, a0, 1365
; CHECK-NEXT:    ret
  %res = call i64 @llvm.clmul.i64(i64 255, i64 255)
  ret i64 %res
}

define i64 @combine_i64_cmul_rhs(i64 %x) nounwind {
; CHECK-LABEL: combine_i64_cmul_rhs:
; CHECK:       # %bb.0:
; CHECK-NEXT:    slli a0, a0, 5
; CHECK-NEXT:    ret
  %res = call i64 @llvm.clmul.i64(i64 32, i64 %x)
  ret i64 %res
}

define i64 @combine_i64_cmul_zero(i64 %x) nounwind {
; CHECK-LABEL: combine_i64_cmul_zero:
; CHECK:       # %bb.0:
; CHECK-NEXT:    li a0, 0
; CHECK-NEXT:    ret
  %res = call i64 @llvm.clmul.i64(i64 %x, i64 0)
  ret i64 %res
}

define i64 @combine_i64_cmul_zero_rhs(i64 %x) nounwind {
; CHECK-LABEL: combine_i64_cmul_zero_rhs:
; CHECK:       # %bb.0:
; CHECK-NEXT:    li a0, 0
; CHECK-NEXT:    ret
  %res = call i64 @llvm.clmul.i64(i64 0, i64 %x)
  ret i64 %res
}

define i32 @combine_i32_cmul_constant() nounwind {
; CHECK-LABEL: combine_i32_cmul_constant:
; CHECK:       # %bb.0:
; CHECK-NEXT:    li a0, 60
; CHECK-NEXT:    ret
  %res = call i32 @llvm.clmul.i32(i32 6, i32 10)
  ret i32 %res
}

define i32 @combine_i32_cmul_zero(i32 %x) nounwind {
; CHECK-LABEL: combine_i32_cmul_zero:
; CHECK:       # %bb.0:
; CHECK-NEXT:    li a0, 0
; CHECK-NEXT:    ret
  %res = call i32 @llvm.clmul.i32(i32 %x, i32 0)
  ret i32 %res
}

define i8 @combine_i8_cmul_constant() nounwind {
; CHECK-LABEL: combine_i8_cmul_constant:
; CHECK:       # %bb.0:
; CHECK-NEXT:    li a0, 60
; CHECK-NEXT:    ret
  %res = call i8 @llvm.clmul.i8(i8 6, i8 10)
  ret i8 %res
}

define i8 @combine_i8_cmul_zero(i8 %x) nounwind {
; CHECK-LABEL: combine_i8_cmul_zero:
; CHECK:       # %bb.0:
; CHECK-NEXT:    li a0, 0
; CHECK-NEXT:    ret
  %res = call i8 @llvm.clmul.i8(i8 %x, i8 0)
  ret i8 %res
}