llvm/test/CodeGen/LoongArch/pr177863.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6

; RUN: llc --mtriple=loongarch32 -mattr=+lasx --verify-machineinstrs < %s | FileCheck %s --check-prefix=LA32
; RUN: llc --mtriple=loongarch64 -mattr=+lasx --verify-machineinstrs < %s | FileCheck %s --check-prefix=LA64

define <4 x i1> @test(<4 x i64> %shuffle2, <4 x i64> %shuffle4) {
; LA32-LABEL: test:
; LA32:       # %bb.0: # %entry
; LA32-NEXT:    xvseq.d $xr0, $xr1, $xr0
; LA32-NEXT:    xvpickev.w $xr0, $xr0, $xr0
; LA32-NEXT:    xvpermi.d $xr0, $xr0, 216
; LA32-NEXT:    vxori.b $vr0, $vr0, 255
; LA32-NEXT:    ret
;
; LA64-LABEL: test:
; LA64:       # %bb.0: # %entry
; LA64-NEXT:    xvseq.d $xr0, $xr1, $xr0
; LA64-NEXT:    xvpickev.w $xr0, $xr0, $xr0
; LA64-NEXT:    xvpermi.d $xr0, $xr0, 216
; LA64-NEXT:    vxori.b $vr0, $vr0, 255
; LA64-NEXT:    ret
entry:
  %conv5 = trunc nuw <4 x i64> %shuffle4 to <4 x i32>
  %conv3 = trunc nuw <4 x i64> %shuffle2 to <4 x i32>
  %cmp = icmp ne <4 x i32> %conv5, %conv3
  ret <4 x i1> %cmp
}