llvm/test/CodeGen/LoongArch/lasx/vhaddw.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s
; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s

define void @xvhaddw_h_b_illegal(ptr %a, ptr %b, ptr %r) nounwind {
; CHECK-LABEL: xvhaddw_h_b_illegal:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr4, $a0, 0
; CHECK-NEXT:    xvld $xr3, $a0, 32
; CHECK-NEXT:    xvld $xr1, $a1, 0
; CHECK-NEXT:    xvld $xr0, $a1, 32
; CHECK-NEXT:    vpickve2gr.b $a0, $vr4, 1
; CHECK-NEXT:    vinsgr2vr.b $vr2, $a0, 0
; CHECK-NEXT:    vpickve2gr.b $a0, $vr4, 3
; CHECK-NEXT:    vinsgr2vr.b $vr2, $a0, 1
; CHECK-NEXT:    vpickve2gr.b $a0, $vr4, 5
; CHECK-NEXT:    vinsgr2vr.b $vr2, $a0, 2
; CHECK-NEXT:    vpickve2gr.b $a0, $vr4, 7
; CHECK-NEXT:    vinsgr2vr.b $vr2, $a0, 3
; CHECK-NEXT:    vpickve2gr.b $a0, $vr4, 9
; CHECK-NEXT:    vinsgr2vr.b $vr2, $a0, 4
; CHECK-NEXT:    vpickve2gr.b $a0, $vr4, 11
; CHECK-NEXT:    vinsgr2vr.b $vr2, $a0, 5
; CHECK-NEXT:    vpickve2gr.b $a0, $vr4, 13
; CHECK-NEXT:    vinsgr2vr.b $vr2, $a0, 6
; CHECK-NEXT:    vpickve2gr.b $a0, $vr4, 15
; CHECK-NEXT:    xvpermi.d $xr4, $xr4, 14
; CHECK-NEXT:    vinsgr2vr.b $vr2, $a0, 7
; CHECK-NEXT:    vpickve2gr.b $a0, $vr4, 1
; CHECK-NEXT:    vinsgr2vr.b $vr2, $a0, 8
; CHECK-NEXT:    vpickve2gr.b $a0, $vr4, 3
; CHECK-NEXT:    vinsgr2vr.b $vr2, $a0, 9
; CHECK-NEXT:    vpickve2gr.b $a0, $vr4, 5
; CHECK-NEXT:    vinsgr2vr.b $vr2, $a0, 10
; CHECK-NEXT:    vpickve2gr.b $a0, $vr4, 7
; CHECK-NEXT:    vinsgr2vr.b $vr2, $a0, 11
; CHECK-NEXT:    vpickve2gr.b $a0, $vr4, 9
; CHECK-NEXT:    vinsgr2vr.b $vr2, $a0, 12
; CHECK-NEXT:    vpickve2gr.b $a0, $vr4, 11
; CHECK-NEXT:    vinsgr2vr.b $vr2, $a0, 13
; CHECK-NEXT:    vpickve2gr.b $a0, $vr4, 13
; CHECK-NEXT:    vinsgr2vr.b $vr2, $a0, 14
; CHECK-NEXT:    vpickve2gr.b $a0, $vr4, 15
; CHECK-NEXT:    vinsgr2vr.b $vr2, $a0, 15
; CHECK-NEXT:    vpickve2gr.b $a0, $vr3, 1
; CHECK-NEXT:    vinsgr2vr.b $vr4, $a0, 0
; CHECK-NEXT:    vpickve2gr.b $a0, $vr3, 3
; CHECK-NEXT:    vinsgr2vr.b $vr4, $a0, 1
; CHECK-NEXT:    vpickve2gr.b $a0, $vr3, 5
; CHECK-NEXT:    vinsgr2vr.b $vr4, $a0, 2
; CHECK-NEXT:    vpickve2gr.b $a0, $vr3, 7
; CHECK-NEXT:    vinsgr2vr.b $vr4, $a0, 3
; CHECK-NEXT:    vpickve2gr.b $a0, $vr3, 9
; CHECK-NEXT:    vinsgr2vr.b $vr4, $a0, 4
; CHECK-NEXT:    vpickve2gr.b $a0, $vr3, 11
; CHECK-NEXT:    vinsgr2vr.b $vr4, $a0, 5
; CHECK-NEXT:    vpickve2gr.b $a0, $vr3, 13
; CHECK-NEXT:    vinsgr2vr.b $vr4, $a0, 6
; CHECK-NEXT:    vpickve2gr.b $a0, $vr3, 15
; CHECK-NEXT:    xvpermi.d $xr3, $xr3, 14
; CHECK-NEXT:    vinsgr2vr.b $vr4, $a0, 7
; CHECK-NEXT:    vpickve2gr.b $a0, $vr3, 1
; CHECK-NEXT:    vinsgr2vr.b $vr4, $a0, 8
; CHECK-NEXT:    vpickve2gr.b $a0, $vr3, 3
; CHECK-NEXT:    vinsgr2vr.b $vr4, $a0, 9
; CHECK-NEXT:    vpickve2gr.b $a0, $vr3, 5
; CHECK-NEXT:    vinsgr2vr.b $vr4, $a0, 10
; CHECK-NEXT:    vpickve2gr.b $a0, $vr3, 7
; CHECK-NEXT:    vinsgr2vr.b $vr4, $a0, 11
; CHECK-NEXT:    vpickve2gr.b $a0, $vr3, 9
; CHECK-NEXT:    vinsgr2vr.b $vr4, $a0, 12
; CHECK-NEXT:    vpickve2gr.b $a0, $vr3, 11
; CHECK-NEXT:    vinsgr2vr.b $vr4, $a0, 13
; CHECK-NEXT:    vpickve2gr.b $a0, $vr3, 13
; CHECK-NEXT:    vinsgr2vr.b $vr4, $a0, 14
; CHECK-NEXT:    vpickve2gr.b $a0, $vr3, 15
; CHECK-NEXT:    vinsgr2vr.b $vr4, $a0, 15
; CHECK-NEXT:    vpickve2gr.b $a0, $vr1, 0
; CHECK-NEXT:    vinsgr2vr.b $vr3, $a0, 0
; CHECK-NEXT:    vpickve2gr.b $a0, $vr1, 2
; CHECK-NEXT:    vinsgr2vr.b $vr3, $a0, 1
; CHECK-NEXT:    vpickve2gr.b $a0, $vr1, 4
; CHECK-NEXT:    vinsgr2vr.b $vr3, $a0, 2
; CHECK-NEXT:    vpickve2gr.b $a0, $vr1, 6
; CHECK-NEXT:    vinsgr2vr.b $vr3, $a0, 3
; CHECK-NEXT:    vpickve2gr.b $a0, $vr1, 8
; CHECK-NEXT:    vinsgr2vr.b $vr3, $a0, 4
; CHECK-NEXT:    vpickve2gr.b $a0, $vr1, 10
; CHECK-NEXT:    vinsgr2vr.b $vr3, $a0, 5
; CHECK-NEXT:    vpickve2gr.b $a0, $vr1, 12
; CHECK-NEXT:    vinsgr2vr.b $vr3, $a0, 6
; CHECK-NEXT:    vpickve2gr.b $a0, $vr1, 14
; CHECK-NEXT:    xvpermi.d $xr1, $xr1, 14
; CHECK-NEXT:    vinsgr2vr.b $vr3, $a0, 7
; CHECK-NEXT:    vpickve2gr.b $a0, $vr1, 0
; CHECK-NEXT:    vinsgr2vr.b $vr3, $a0, 8
; CHECK-NEXT:    vpickve2gr.b $a0, $vr1, 2
; CHECK-NEXT:    vinsgr2vr.b $vr3, $a0, 9
; CHECK-NEXT:    vpickve2gr.b $a0, $vr1, 4
; CHECK-NEXT:    vinsgr2vr.b $vr3, $a0, 10
; CHECK-NEXT:    vpickve2gr.b $a0, $vr1, 6
; CHECK-NEXT:    vinsgr2vr.b $vr3, $a0, 11
; CHECK-NEXT:    vpickve2gr.b $a0, $vr1, 8
; CHECK-NEXT:    vinsgr2vr.b $vr3, $a0, 12
; CHECK-NEXT:    vpickve2gr.b $a0, $vr1, 10
; CHECK-NEXT:    vinsgr2vr.b $vr3, $a0, 13
; CHECK-NEXT:    vpickve2gr.b $a0, $vr1, 12
; CHECK-NEXT:    vinsgr2vr.b $vr3, $a0, 14
; CHECK-NEXT:    vpickve2gr.b $a0, $vr1, 14
; CHECK-NEXT:    vinsgr2vr.b $vr3, $a0, 15
; CHECK-NEXT:    vpickve2gr.b $a0, $vr0, 0
; CHECK-NEXT:    vinsgr2vr.b $vr1, $a0, 0
; CHECK-NEXT:    vpickve2gr.b $a0, $vr0, 2
; CHECK-NEXT:    vinsgr2vr.b $vr1, $a0, 1
; CHECK-NEXT:    vpickve2gr.b $a0, $vr0, 4
; CHECK-NEXT:    vinsgr2vr.b $vr1, $a0, 2
; CHECK-NEXT:    vpickve2gr.b $a0, $vr0, 6
; CHECK-NEXT:    vinsgr2vr.b $vr1, $a0, 3
; CHECK-NEXT:    vpickve2gr.b $a0, $vr0, 8
; CHECK-NEXT:    vinsgr2vr.b $vr1, $a0, 4
; CHECK-NEXT:    vpickve2gr.b $a0, $vr0, 10
; CHECK-NEXT:    vinsgr2vr.b $vr1, $a0, 5
; CHECK-NEXT:    vpickve2gr.b $a0, $vr0, 12
; CHECK-NEXT:    vinsgr2vr.b $vr1, $a0, 6
; CHECK-NEXT:    vpickve2gr.b $a0, $vr0, 14
; CHECK-NEXT:    xvpermi.d $xr0, $xr0, 14
; CHECK-NEXT:    vinsgr2vr.b $vr1, $a0, 7
; CHECK-NEXT:    vpickve2gr.b $a0, $vr0, 0
; CHECK-NEXT:    vinsgr2vr.b $vr1, $a0, 8
; CHECK-NEXT:    vpickve2gr.b $a0, $vr0, 2
; CHECK-NEXT:    vinsgr2vr.b $vr1, $a0, 9
; CHECK-NEXT:    vpickve2gr.b $a0, $vr0, 4
; CHECK-NEXT:    vinsgr2vr.b $vr1, $a0, 10
; CHECK-NEXT:    vpickve2gr.b $a0, $vr0, 6
; CHECK-NEXT:    vinsgr2vr.b $vr1, $a0, 11
; CHECK-NEXT:    vpickve2gr.b $a0, $vr0, 8
; CHECK-NEXT:    vinsgr2vr.b $vr1, $a0, 12
; CHECK-NEXT:    vpickve2gr.b $a0, $vr0, 10
; CHECK-NEXT:    vinsgr2vr.b $vr1, $a0, 13
; CHECK-NEXT:    vpickve2gr.b $a0, $vr0, 12
; CHECK-NEXT:    vinsgr2vr.b $vr1, $a0, 14
; CHECK-NEXT:    vpickve2gr.b $a0, $vr0, 14
; CHECK-NEXT:    vinsgr2vr.b $vr1, $a0, 15
; CHECK-NEXT:    vext2xv.h.b $xr0, $xr2
; CHECK-NEXT:    vext2xv.h.b $xr2, $xr4
; CHECK-NEXT:    vext2xv.h.b $xr3, $xr3
; CHECK-NEXT:    vext2xv.h.b $xr1, $xr1
; CHECK-NEXT:    xvadd.h $xr1, $xr2, $xr1
; CHECK-NEXT:    xvadd.h $xr0, $xr0, $xr3
; CHECK-NEXT:    xvst $xr0, $a2, 0
; CHECK-NEXT:    xvst $xr1, $a2, 32
; CHECK-NEXT:    ret
entry:
  %0 = load <64 x i8>, ptr %a
  %1 = load <64 x i8>, ptr %b
  %2 = shufflevector <64 x i8> %0, <64 x i8> poison,
                     <32 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15,
                                 i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31,
                                 i32 33, i32 35, i32 37, i32 39, i32 41, i32 43, i32 45, i32 47,
                                 i32 49, i32 51, i32 53, i32 55, i32 57, i32 59, i32 61, i32 63>
  %3 = shufflevector <64 x i8> %1, <64 x i8> poison,
                     <32 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14,
                                 i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30,
                                 i32 32, i32 34, i32 36, i32 38, i32 40, i32 42, i32 44, i32 46,
                                 i32 48, i32 50, i32 52, i32 54, i32 56, i32 58, i32 60, i32 62>
  %4 = sext <32 x i8> %2 to <32 x i16>
  %5 = sext <32 x i8> %3 to <32 x i16>
  %6 = add <32 x i16> %4, %5
  store <32 x i16> %6, ptr %r
  ret void
}

define void @xvhaddw_h_b(ptr %a, ptr %b, ptr %r) nounwind {
; CHECK-LABEL: xvhaddw_h_b:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr0, $a0, 0
; CHECK-NEXT:    xvld $xr1, $a1, 0
; CHECK-NEXT:    xvhaddw.h.b $xr0, $xr0, $xr1
; CHECK-NEXT:    xvst $xr0, $a2, 0
; CHECK-NEXT:    ret
entry:
  %0 = load <32 x i8>, ptr %a
  %1 = load <32 x i8>, ptr %b
  %2 = shufflevector <32 x i8> %0, <32 x i8> poison,
                     <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15,
                                 i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
  %3 = shufflevector <32 x i8> %1, <32 x i8> poison,
                     <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14,
                                 i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
  %4 = sext <16 x i8> %2 to <16 x i16>
  %5 = sext <16 x i8> %3 to <16 x i16>
  %6 = add <16 x i16> %4, %5
  store <16 x i16> %6, ptr %r
  ret void
}

define void @xvhaddw_w_h(ptr %a, ptr %b, ptr %r) nounwind {
; CHECK-LABEL: xvhaddw_w_h:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr0, $a0, 0
; CHECK-NEXT:    xvld $xr1, $a1, 0
; CHECK-NEXT:    xvhaddw.w.h $xr0, $xr0, $xr1
; CHECK-NEXT:    xvst $xr0, $a2, 0
; CHECK-NEXT:    ret
entry:
  %0 = load <16 x i16>, ptr %a
  %1 = load <16 x i16>, ptr %b
  %2 = shufflevector <16 x i16> %0, <16 x i16> poison,
                     <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
  %3 = shufflevector <16 x i16> %1, <16 x i16> poison,
                     <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
  %4 = sext <8 x i16> %2 to <8 x i32>
  %5 = sext <8 x i16> %3 to <8 x i32>
  %6 = add <8 x i32> %4, %5
  store <8 x i32> %6, ptr %r
  ret void
}

define void @xvhaddw_d_w(ptr %a, ptr %b, ptr %r) nounwind {
; CHECK-LABEL: xvhaddw_d_w:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr0, $a0, 0
; CHECK-NEXT:    xvld $xr1, $a1, 0
; CHECK-NEXT:    xvhaddw.d.w $xr0, $xr0, $xr1
; CHECK-NEXT:    xvst $xr0, $a2, 0
; CHECK-NEXT:    ret
entry:
  %0 = load <8 x i32>, ptr %a
  %1 = load <8 x i32>, ptr %b
  %2 = shufflevector <8 x i32> %0, <8 x i32> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
  %3 = shufflevector <8 x i32> %1, <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
  %4 = sext <4 x i32> %2 to <4 x i64>
  %5 = sext <4 x i32> %3 to <4 x i64>
  %6 = add <4 x i64> %4, %5
  store <4 x i64> %6, ptr %r
  ret void
}

define void @xvhaddw_hu_bu(ptr %a, ptr %b, ptr %r) nounwind {
; CHECK-LABEL: xvhaddw_hu_bu:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr0, $a0, 0
; CHECK-NEXT:    xvld $xr1, $a1, 0
; CHECK-NEXT:    xvhaddw.hu.bu $xr0, $xr0, $xr1
; CHECK-NEXT:    xvst $xr0, $a2, 0
; CHECK-NEXT:    ret
entry:
  %0 = load <32 x i8>, ptr %a
  %1 = load <32 x i8>, ptr %b
  %2 = shufflevector <32 x i8> %0, <32 x i8> poison,
                     <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15,
                                 i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
  %3 = shufflevector <32 x i8> %1, <32 x i8> poison,
                     <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14,
                                 i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
  %4 = zext <16 x i8> %2 to <16 x i16>
  %5 = zext <16 x i8> %3 to <16 x i16>
  %6 = add <16 x i16> %4, %5
  store <16 x i16> %6, ptr %r
  ret void
}

define void @xvhaddw_wu_hu(ptr %a, ptr %b, ptr %r) nounwind {
; CHECK-LABEL: xvhaddw_wu_hu:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr0, $a0, 0
; CHECK-NEXT:    xvld $xr1, $a1, 0
; CHECK-NEXT:    xvhaddw.wu.hu $xr0, $xr0, $xr1
; CHECK-NEXT:    xvst $xr0, $a2, 0
; CHECK-NEXT:    ret
entry:
  %0 = load <16 x i16>, ptr %a
  %1 = load <16 x i16>, ptr %b
  %2 = shufflevector <16 x i16> %0, <16 x i16> poison,
                     <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
  %3 = shufflevector <16 x i16> %1, <16 x i16> poison,
                     <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
  %4 = zext <8 x i16> %2 to <8 x i32>
  %5 = zext <8 x i16> %3 to <8 x i32>
  %6 = add <8 x i32> %4, %5
  store <8 x i32> %6, ptr %r
  ret void
}

define void @xvhaddw_du_wu(ptr %a, ptr %b, ptr %r) nounwind {
; CHECK-LABEL: xvhaddw_du_wu:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvld $xr0, $a0, 0
; CHECK-NEXT:    xvld $xr1, $a1, 0
; CHECK-NEXT:    xvhaddw.du.wu $xr0, $xr0, $xr1
; CHECK-NEXT:    xvst $xr0, $a2, 0
; CHECK-NEXT:    ret
entry:
  %0 = load <8 x i32>, ptr %a
  %1 = load <8 x i32>, ptr %b
  %2 = shufflevector <8 x i32> %0, <8 x i32> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
  %3 = shufflevector <8 x i32> %1, <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
  %4 = zext <4 x i32> %2 to <4 x i64>
  %5 = zext <4 x i32> %3 to <4 x i64>
  %6 = add <4 x i64> %4, %5
  store <4 x i64> %6, ptr %r
  ret void
}