| # RUN: llc -mtriple=amdgpu11.00 -run-pass=si-fold-operands -o - %s | FileCheck -check-prefixes=GFX_NO_SRC1_SGPR %s |
| # RUN: llc -mtriple=amdgpu11.50 -run-pass=si-fold-operands -o - %s | FileCheck -check-prefixes=GFX_SRC1_SGPR %s |
| # RUN: llc -mtriple=amdgpu12.00 -run-pass=si-fold-operands -o - %s | FileCheck -check-prefixes=GFX_SRC1_SGPR %s |
| |
| |
| # GFX_NO_SRC1_SGPR: [[VGPR:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| # GFX_NO_SRC1_SGPR: [[SGPR:%[0-9]+]]:sreg_32 = COPY $sgpr0 |
| # GFX_NO_SRC1_SGPR: [[VCOPY:%[0-9]+]]:vgpr_32 = COPY [[SGPR]] |
| # GFX_NO_SRC1_SGPR: {{%[0-9]+}}:vgpr_32, {{%[0-9]+}}:sreg_32_xexec = V_ADD_CO_U32_e64_dpp [[VGPR]], [[VCOPY]], [[VGPR]], 0, 228, 12, 15, 0, implicit $exec |
| # GFX_SRC1_SGPR: [[VGPR:%[0-9]+]]:vgpr_32 = COPY $vgpr0 |
| # GFX_SRC1_SGPR: [[SGPR:%[0-9]+]]:sreg_32 = COPY $sgpr0 |
| # GFX_SRC1_SGPR: {{%[0-9]+}}:vgpr_32, {{%[0-9]+}}:sreg_32_xexec = V_ADD_CO_U32_e64_dpp [[VGPR]], [[VGPR]], [[SGPR]], 0, 228, 12, 15, 0, implicit $exec |
| --- |
| name: sgpr_copy_fold_src1 |
| tracksRegLiveness: true |
| body: | |
| bb.0: |
| liveins: $vgpr0, $sgpr0 |
| |
| %0:vgpr_32 = COPY $vgpr0 |
| %1:sreg_32 = COPY $sgpr0 |
| |
| ; should be combined only on subtargets that allow sgpr for src1 |
| %2:vgpr_32 = COPY %1:sreg_32 |
| %3:vgpr_32, %4:sreg_32_xexec = V_ADD_CO_U32_e64_dpp %0:vgpr_32, %2:vgpr_32, %0:vgpr_32, 0, 228, 12, 15, 0, implicit $exec |
| ... |
