blob: 97a4969dd13ef185f1974094c89229ee3421134e [file] [edit]
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -mtriple=amdgpu12.51 -run-pass=si-fold-operands -o - %s | FileCheck --check-prefix=GFX1251 %s
---
name: pk_add_f64_no_fold_imm
tracksRegLiveness: true
body: |
bb.0:
; GFX1251-LABEL: name: pk_add_f64_no_fold_imm
; GFX1251: [[DEF:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF
; GFX1251-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 4607182418800017408, implicit $exec
; GFX1251-NEXT: [[V_MOV_B1:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 4611686018427387904, implicit $exec
; GFX1251-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128_align2 = REG_SEQUENCE killed [[V_MOV_B]], %subreg.sub0_sub1, killed [[V_MOV_B1]], %subreg.sub2_sub3
; GFX1251-NEXT: [[V_PK_ADD_F64_:%[0-9]+]]:vreg_128_align2 = nofpexcept V_PK_ADD_F64 8, killed [[DEF]], 8, [[REG_SEQUENCE]], 0, 0, 0, implicit $mode, implicit $exec
; GFX1251-NEXT: S_ENDPGM 0, implicit [[V_PK_ADD_F64_]]
%0:vreg_128_align2 = IMPLICIT_DEF
%1:vreg_64_align2 = V_MOV_B64_PSEUDO 4607182418800017408, implicit $exec
%2:vreg_64_align2 = V_MOV_B64_PSEUDO 4611686018427387904, implicit $exec
%3:vreg_128_align2 = REG_SEQUENCE killed %1, %subreg.sub0_sub1, killed %2, %subreg.sub2_sub3
%4:vreg_128_align2 = nofpexcept V_PK_ADD_F64 8, killed %0, 8, %3, 0, 0, 0, implicit $mode, implicit $exec
S_ENDPGM 0, implicit %4
...
---
name: pk_add_f64_fold_splat_1.0
tracksRegLiveness: true
body: |
bb.0:
; GFX1251-LABEL: name: pk_add_f64_fold_splat_1.0
; GFX1251: [[DEF:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF
; GFX1251-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 4607182418800017408, implicit $exec
; GFX1251-NEXT: [[V_MOV_B1:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 4607182418800017408, implicit $exec
; GFX1251-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128_align2 = REG_SEQUENCE killed [[V_MOV_B]], %subreg.sub0_sub1, killed [[V_MOV_B1]], %subreg.sub2_sub3
; GFX1251-NEXT: [[V_PK_ADD_F64_:%[0-9]+]]:vreg_128_align2 = nofpexcept V_PK_ADD_F64 8, killed [[DEF]], 8, 4607182418800017408, 0, 0, 0, implicit $mode, implicit $exec
; GFX1251-NEXT: S_ENDPGM 0, implicit [[V_PK_ADD_F64_]]
%0:vreg_128_align2 = IMPLICIT_DEF
%1:vreg_64_align2 = V_MOV_B64_PSEUDO 4607182418800017408, implicit $exec
%2:vreg_64_align2 = V_MOV_B64_PSEUDO 4607182418800017408, implicit $exec
%3:vreg_128_align2 = REG_SEQUENCE killed %1, %subreg.sub0_sub1, killed %2, %subreg.sub2_sub3
%4:vreg_128_align2 = nofpexcept V_PK_ADD_F64 8, killed %0, 8, %3, 0, 0, 0, implicit $mode, implicit $exec
S_ENDPGM 0, implicit %4
...
---
name: pk_add_f64_fold_splat_100.0
tracksRegLiveness: true
body: |
bb.0:
; GFX1251-LABEL: name: pk_add_f64_fold_splat_100.0
; GFX1251: [[DEF:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF
; GFX1251-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 4636737291354636288, implicit $exec
; GFX1251-NEXT: [[V_MOV_B1:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 4636737291354636288, implicit $exec
; GFX1251-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128_align2 = REG_SEQUENCE killed [[V_MOV_B]], %subreg.sub0_sub1, killed [[V_MOV_B1]], %subreg.sub2_sub3
; GFX1251-NEXT: [[V_PK_ADD_F64_:%[0-9]+]]:vreg_128_align2 = nofpexcept V_PK_ADD_F64 8, killed [[DEF]], 8, 4636737291354636288, 0, 0, 0, implicit $mode, implicit $exec
; GFX1251-NEXT: S_ENDPGM 0, implicit [[V_PK_ADD_F64_]]
%0:vreg_128_align2 = IMPLICIT_DEF
%1:vreg_64_align2 = V_MOV_B64_PSEUDO 4636737291354636288, implicit $exec
%2:vreg_64_align2 = V_MOV_B64_PSEUDO 4636737291354636288, implicit $exec
%3:vreg_128_align2 = REG_SEQUENCE killed %1, %subreg.sub0_sub1, killed %2, %subreg.sub2_sub3
%4:vreg_128_align2 = nofpexcept V_PK_ADD_F64 8, killed %0, 8, %3, 0, 0, 0, implicit $mode, implicit $exec
S_ENDPGM 0, implicit %4
...
---
name: pk_add_f64_no_fold_splat_100.1
tracksRegLiveness: true
body: |
bb.0:
; GFX1251-LABEL: name: pk_add_f64_no_fold_splat_100.1
; GFX1251: [[DEF:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF
; GFX1251-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 4636744328229054054, implicit $exec
; GFX1251-NEXT: [[V_MOV_B1:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 4636744328229054054, implicit $exec
; GFX1251-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128_align2 = REG_SEQUENCE killed [[V_MOV_B]], %subreg.sub0_sub1, killed [[V_MOV_B1]], %subreg.sub2_sub3
; GFX1251-NEXT: [[V_PK_ADD_F64_:%[0-9]+]]:vreg_128_align2 = nofpexcept V_PK_ADD_F64 8, killed [[DEF]], 8, [[REG_SEQUENCE]], 0, 0, 0, implicit $mode, implicit $exec
; GFX1251-NEXT: S_ENDPGM 0, implicit [[V_PK_ADD_F64_]]
%0:vreg_128_align2 = IMPLICIT_DEF
%1:vreg_64_align2 = V_MOV_B64_PSEUDO 4636744328229054054, implicit $exec
%2:vreg_64_align2 = V_MOV_B64_PSEUDO 4636744328229054054, implicit $exec
%3:vreg_128_align2 = REG_SEQUENCE killed %1, %subreg.sub0_sub1, killed %2, %subreg.sub2_sub3
%4:vreg_128_align2 = nofpexcept V_PK_ADD_F64 8, killed %0, 8, %3, 0, 0, 0, implicit $mode, implicit $exec
S_ENDPGM 0, implicit %4
...
---
name: pk_add_f64_no_fold_splat_100
tracksRegLiveness: true
body: |
bb.0:
; GFX1251-LABEL: name: pk_add_f64_no_fold_splat_100
; GFX1251: [[DEF:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF
; GFX1251-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 100, implicit $exec
; GFX1251-NEXT: [[V_MOV_B1:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 100, implicit $exec
; GFX1251-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128_align2 = REG_SEQUENCE killed [[V_MOV_B]], %subreg.sub0_sub1, killed [[V_MOV_B1]], %subreg.sub2_sub3
; GFX1251-NEXT: [[V_PK_ADD_F64_:%[0-9]+]]:vreg_128_align2 = nofpexcept V_PK_ADD_F64 8, killed [[DEF]], 8, [[REG_SEQUENCE]], 0, 0, 0, implicit $mode, implicit $exec
; GFX1251-NEXT: S_ENDPGM 0, implicit [[V_PK_ADD_F64_]]
%0:vreg_128_align2 = IMPLICIT_DEF
%1:vreg_64_align2 = V_MOV_B64_PSEUDO 100, implicit $exec
%2:vreg_64_align2 = V_MOV_B64_PSEUDO 100, implicit $exec
%3:vreg_128_align2 = REG_SEQUENCE killed %1, %subreg.sub0_sub1, killed %2, %subreg.sub2_sub3
%4:vreg_128_align2 = nofpexcept V_PK_ADD_F64 8, killed %0, 8, %3, 0, 0, 0, implicit $mode, implicit $exec
S_ENDPGM 0, implicit %4
...
---
name: pk_add_f64_fold_splat_1
tracksRegLiveness: true
body: |
bb.0:
; GFX1251-LABEL: name: pk_add_f64_fold_splat_1
; GFX1251: [[DEF:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF
; GFX1251-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 1, implicit $exec
; GFX1251-NEXT: [[V_MOV_B1:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 1, implicit $exec
; GFX1251-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128_align2 = REG_SEQUENCE killed [[V_MOV_B]], %subreg.sub0_sub1, killed [[V_MOV_B1]], %subreg.sub2_sub3
; GFX1251-NEXT: [[V_PK_ADD_F64_:%[0-9]+]]:vreg_128_align2 = nofpexcept V_PK_ADD_F64 8, killed [[DEF]], 8, 1, 0, 0, 0, implicit $mode, implicit $exec
; GFX1251-NEXT: S_ENDPGM 0, implicit [[V_PK_ADD_F64_]]
%0:vreg_128_align2 = IMPLICIT_DEF
%1:vreg_64_align2 = V_MOV_B64_PSEUDO 1, implicit $exec
%2:vreg_64_align2 = V_MOV_B64_PSEUDO 1, implicit $exec
%3:vreg_128_align2 = REG_SEQUENCE killed %1, %subreg.sub0_sub1, killed %2, %subreg.sub2_sub3
%4:vreg_128_align2 = nofpexcept V_PK_ADD_F64 8, killed %0, 8, %3, 0, 0, 0, implicit $mode, implicit $exec
S_ENDPGM 0, implicit %4
...
---
name: pk_add_nc_u64_no_fold_imm
tracksRegLiveness: true
body: |
bb.0:
; GFX1251-LABEL: name: pk_add_nc_u64_no_fold_imm
; GFX1251: [[DEF:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF
; GFX1251-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 1, implicit $exec
; GFX1251-NEXT: [[V_MOV_B1:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 2, implicit $exec
; GFX1251-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128_align2 = REG_SEQUENCE killed [[V_MOV_B]], %subreg.sub0_sub1, killed [[V_MOV_B1]], %subreg.sub2_sub3
; GFX1251-NEXT: [[V_PK_ADD_NC_U64_:%[0-9]+]]:vreg_128_align2 = nofpexcept V_PK_ADD_NC_U64 8, killed [[DEF]], 8, [[REG_SEQUENCE]], 0, 0, 0, implicit $mode, implicit $exec
; GFX1251-NEXT: S_ENDPGM 0, implicit [[V_PK_ADD_NC_U64_]]
%0:vreg_128_align2 = IMPLICIT_DEF
%1:vreg_64_align2 = V_MOV_B64_PSEUDO 1, implicit $exec
%2:vreg_64_align2 = V_MOV_B64_PSEUDO 2, implicit $exec
%3:vreg_128_align2 = REG_SEQUENCE killed %1, %subreg.sub0_sub1, killed %2, %subreg.sub2_sub3
%4:vreg_128_align2 = nofpexcept V_PK_ADD_NC_U64 8, killed %0, 8, %3, 0, 0, 0, implicit $mode, implicit $exec
S_ENDPGM 0, implicit %4
...
---
name: pk_add_nc_u64_fold_splat_1
tracksRegLiveness: true
body: |
bb.0:
; GFX1251-LABEL: name: pk_add_nc_u64_fold_splat_1
; GFX1251: [[DEF:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF
; GFX1251-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 1, implicit $exec
; GFX1251-NEXT: [[V_MOV_B1:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 1, implicit $exec
; GFX1251-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128_align2 = REG_SEQUENCE killed [[V_MOV_B]], %subreg.sub0_sub1, killed [[V_MOV_B1]], %subreg.sub2_sub3
; GFX1251-NEXT: [[V_PK_ADD_NC_U64_:%[0-9]+]]:vreg_128_align2 = nofpexcept V_PK_ADD_NC_U64 8, killed [[DEF]], 8, 1, 0, 0, 0, implicit $mode, implicit $exec
; GFX1251-NEXT: S_ENDPGM 0, implicit [[V_PK_ADD_NC_U64_]]
%0:vreg_128_align2 = IMPLICIT_DEF
%1:vreg_64_align2 = V_MOV_B64_PSEUDO 1, implicit $exec
%2:vreg_64_align2 = V_MOV_B64_PSEUDO 1, implicit $exec
%3:vreg_128_align2 = REG_SEQUENCE killed %1, %subreg.sub0_sub1, killed %2, %subreg.sub2_sub3
%4:vreg_128_align2 = nofpexcept V_PK_ADD_NC_U64 8, killed %0, 8, %3, 0, 0, 0, implicit $mode, implicit $exec
S_ENDPGM 0, implicit %4
...
---
name: pk_add_nc_u64_fold_splat_100
tracksRegLiveness: true
body: |
bb.0:
; GFX1251-LABEL: name: pk_add_nc_u64_fold_splat_100
; GFX1251: [[DEF:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF
; GFX1251-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 100, implicit $exec
; GFX1251-NEXT: [[V_MOV_B1:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 100, implicit $exec
; GFX1251-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128_align2 = REG_SEQUENCE killed [[V_MOV_B]], %subreg.sub0_sub1, killed [[V_MOV_B1]], %subreg.sub2_sub3
; GFX1251-NEXT: [[V_PK_ADD_NC_U64_:%[0-9]+]]:vreg_128_align2 = nofpexcept V_PK_ADD_NC_U64 8, killed [[DEF]], 8, 100, 0, 0, 0, implicit $mode, implicit $exec
; GFX1251-NEXT: S_ENDPGM 0, implicit [[V_PK_ADD_NC_U64_]]
%0:vreg_128_align2 = IMPLICIT_DEF
%1:vreg_64_align2 = V_MOV_B64_PSEUDO 100, implicit $exec
%2:vreg_64_align2 = V_MOV_B64_PSEUDO 100, implicit $exec
%3:vreg_128_align2 = REG_SEQUENCE killed %1, %subreg.sub0_sub1, killed %2, %subreg.sub2_sub3
%4:vreg_128_align2 = nofpexcept V_PK_ADD_NC_U64 8, killed %0, 8, %3, 0, 0, 0, implicit $mode, implicit $exec
S_ENDPGM 0, implicit %4
...
---
name: pk_add_nc_u64_no_fold_splat_0x100000000
tracksRegLiveness: true
body: |
bb.0:
; GFX1251-LABEL: name: pk_add_nc_u64_no_fold_splat_0x100000000
; GFX1251: [[DEF:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF
; GFX1251-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 4294967296, implicit $exec
; GFX1251-NEXT: [[V_MOV_B1:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 4294967296, implicit $exec
; GFX1251-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128_align2 = REG_SEQUENCE killed [[V_MOV_B]], %subreg.sub0_sub1, killed [[V_MOV_B1]], %subreg.sub2_sub3
; GFX1251-NEXT: [[V_PK_ADD_NC_U64_:%[0-9]+]]:vreg_128_align2 = nofpexcept V_PK_ADD_NC_U64 8, killed [[DEF]], 8, [[REG_SEQUENCE]], 0, 0, 0, implicit $mode, implicit $exec
; GFX1251-NEXT: S_ENDPGM 0, implicit [[V_PK_ADD_NC_U64_]]
%0:vreg_128_align2 = IMPLICIT_DEF
%1:vreg_64_align2 = V_MOV_B64_PSEUDO 4294967296, implicit $exec
%2:vreg_64_align2 = V_MOV_B64_PSEUDO 4294967296, implicit $exec
%3:vreg_128_align2 = REG_SEQUENCE killed %1, %subreg.sub0_sub1, killed %2, %subreg.sub2_sub3
%4:vreg_128_align2 = nofpexcept V_PK_ADD_NC_U64 8, killed %0, 8, %3, 0, 0, 0, implicit $mode, implicit $exec
S_ENDPGM 0, implicit %4
...
---
name: pk_add_nc_u64_fold_splat_1.0
tracksRegLiveness: true
body: |
bb.0:
; GFX1251-LABEL: name: pk_add_nc_u64_fold_splat_1.0
; GFX1251: [[DEF:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF
; GFX1251-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 4607182418800017408, implicit $exec
; GFX1251-NEXT: [[V_MOV_B1:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 4607182418800017408, implicit $exec
; GFX1251-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128_align2 = REG_SEQUENCE killed [[V_MOV_B]], %subreg.sub0_sub1, killed [[V_MOV_B1]], %subreg.sub2_sub3
; GFX1251-NEXT: [[V_PK_ADD_NC_U64_:%[0-9]+]]:vreg_128_align2 = nofpexcept V_PK_ADD_NC_U64 8, killed [[DEF]], 8, 4607182418800017408, 0, 0, 0, implicit $mode, implicit $exec
; GFX1251-NEXT: S_ENDPGM 0, implicit [[V_PK_ADD_NC_U64_]]
%0:vreg_128_align2 = IMPLICIT_DEF
%1:vreg_64_align2 = V_MOV_B64_PSEUDO 4607182418800017408, implicit $exec
%2:vreg_64_align2 = V_MOV_B64_PSEUDO 4607182418800017408, implicit $exec
%3:vreg_128_align2 = REG_SEQUENCE killed %1, %subreg.sub0_sub1, killed %2, %subreg.sub2_sub3
%4:vreg_128_align2 = nofpexcept V_PK_ADD_NC_U64 8, killed %0, 8, %3, 0, 0, 0, implicit $mode, implicit $exec
S_ENDPGM 0, implicit %4
...
---
name: pk_add_nc_u64_no_fold_splat_100.0
tracksRegLiveness: true
body: |
bb.0:
; GFX1251-LABEL: name: pk_add_nc_u64_no_fold_splat_100.0
; GFX1251: [[DEF:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF
; GFX1251-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 4636737291354636288, implicit $exec
; GFX1251-NEXT: [[V_MOV_B1:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 4636737291354636288, implicit $exec
; GFX1251-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128_align2 = REG_SEQUENCE killed [[V_MOV_B]], %subreg.sub0_sub1, killed [[V_MOV_B1]], %subreg.sub2_sub3
; GFX1251-NEXT: [[V_PK_ADD_NC_U64_:%[0-9]+]]:vreg_128_align2 = nofpexcept V_PK_ADD_NC_U64 8, killed [[DEF]], 8, [[REG_SEQUENCE]], 0, 0, 0, implicit $mode, implicit $exec
; GFX1251-NEXT: S_ENDPGM 0, implicit [[V_PK_ADD_NC_U64_]]
%0:vreg_128_align2 = IMPLICIT_DEF
%1:vreg_64_align2 = V_MOV_B64_PSEUDO 4636737291354636288, implicit $exec
%2:vreg_64_align2 = V_MOV_B64_PSEUDO 4636737291354636288, implicit $exec
%3:vreg_128_align2 = REG_SEQUENCE killed %1, %subreg.sub0_sub1, killed %2, %subreg.sub2_sub3
%4:vreg_128_align2 = nofpexcept V_PK_ADD_NC_U64 8, killed %0, 8, %3, 0, 0, 0, implicit $mode, implicit $exec
S_ENDPGM 0, implicit %4
...
---
name: pk_add_nc_u64_no_fold_splat_100.1
tracksRegLiveness: true
body: |
bb.0:
; GFX1251-LABEL: name: pk_add_nc_u64_no_fold_splat_100.1
; GFX1251: [[DEF:%[0-9]+]]:vreg_128_align2 = IMPLICIT_DEF
; GFX1251-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 4636744328229054054, implicit $exec
; GFX1251-NEXT: [[V_MOV_B1:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 4636744328229054054, implicit $exec
; GFX1251-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128_align2 = REG_SEQUENCE killed [[V_MOV_B]], %subreg.sub0_sub1, killed [[V_MOV_B1]], %subreg.sub2_sub3
; GFX1251-NEXT: [[V_PK_ADD_NC_U64_:%[0-9]+]]:vreg_128_align2 = nofpexcept V_PK_ADD_NC_U64 8, killed [[DEF]], 8, [[REG_SEQUENCE]], 0, 0, 0, implicit $mode, implicit $exec
; GFX1251-NEXT: S_ENDPGM 0, implicit [[V_PK_ADD_NC_U64_]]
%0:vreg_128_align2 = IMPLICIT_DEF
%1:vreg_64_align2 = V_MOV_B64_PSEUDO 4636744328229054054, implicit $exec
%2:vreg_64_align2 = V_MOV_B64_PSEUDO 4636744328229054054, implicit $exec
%3:vreg_128_align2 = REG_SEQUENCE killed %1, %subreg.sub0_sub1, killed %2, %subreg.sub2_sub3
%4:vreg_128_align2 = nofpexcept V_PK_ADD_NC_U64 8, killed %0, 8, %3, 0, 0, 0, implicit $mode, implicit $exec
S_ENDPGM 0, implicit %4
...
---
name: pk_add_u64_fold_imm_undef
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0_vgpr1_vgpr2_vgpr3
; GFX1251-LABEL: name: pk_add_u64_fold_imm_undef
; GFX1251: liveins: $vgpr0_vgpr1_vgpr2_vgpr3
; GFX1251-NEXT: {{ $}}
; GFX1251-NEXT: [[COPY:%[0-9]+]]:vreg_128_align2 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; GFX1251-NEXT: [[S_MOV_B:%[0-9]+]]:sreg_64 = S_MOV_B64_IMM_PSEUDO 100
; GFX1251-NEXT: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
; GFX1251-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE killed [[S_MOV_B]], %subreg.sub0_sub1, killed [[DEF]], %subreg.sub2_sub3
; GFX1251-NEXT: [[V_PK_ADD_NC_U64_:%[0-9]+]]:vreg_128_align2 = V_PK_ADD_NC_U64 8, killed [[COPY]], 0, 100, 0, 0, 0, implicit $exec
; GFX1251-NEXT: S_ENDPGM 0, implicit [[V_PK_ADD_NC_U64_]]
%0:vreg_128_align2 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
%1:sreg_64 = S_MOV_B64_IMM_PSEUDO 100
%2:sreg_64 = IMPLICIT_DEF
%3:sgpr_128 = REG_SEQUENCE killed %1, %subreg.sub0_sub1, killed %2, %subreg.sub2_sub3
%4:vreg_128_align2 = V_PK_ADD_NC_U64 8, killed %0, 0, killed %3, 0, 0, 0, implicit $exec
S_ENDPGM 0, implicit %4
...
---
name: pk_add_u64_fold_undef_imm
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0_vgpr1_vgpr2_vgpr3
; GFX1251-LABEL: name: pk_add_u64_fold_undef_imm
; GFX1251: liveins: $vgpr0_vgpr1_vgpr2_vgpr3
; GFX1251-NEXT: {{ $}}
; GFX1251-NEXT: [[COPY:%[0-9]+]]:vreg_128_align2 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; GFX1251-NEXT: [[S_MOV_B:%[0-9]+]]:sreg_64 = S_MOV_B64_IMM_PSEUDO 100
; GFX1251-NEXT: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
; GFX1251-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE killed [[DEF]], %subreg.sub0_sub1, killed [[S_MOV_B]], %subreg.sub2_sub3
; GFX1251-NEXT: [[V_PK_ADD_NC_U64_:%[0-9]+]]:vreg_128_align2 = V_PK_ADD_NC_U64 8, killed [[COPY]], 0, 100, 0, 0, 0, implicit $exec
; GFX1251-NEXT: S_ENDPGM 0, implicit [[V_PK_ADD_NC_U64_]]
%0:vreg_128_align2 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
%1:sreg_64 = S_MOV_B64_IMM_PSEUDO 100
%2:sreg_64 = IMPLICIT_DEF
%3:sgpr_128 = REG_SEQUENCE killed %2, %subreg.sub0_sub1, killed %1, %subreg.sub2_sub3
%4:vreg_128_align2 = V_PK_ADD_NC_U64 8, killed %0, 0, killed %3, 0, 0, 0, implicit $exec
S_ENDPGM 0, implicit %4
...
# This can be folded to IMPLICIT_DEF itself, just not immediate
---
name: pk_add_u64_no_fold_undef_undef
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0_vgpr1_vgpr2_vgpr3
; GFX1251-LABEL: name: pk_add_u64_no_fold_undef_undef
; GFX1251: liveins: $vgpr0_vgpr1_vgpr2_vgpr3
; GFX1251-NEXT: {{ $}}
; GFX1251-NEXT: [[COPY:%[0-9]+]]:vreg_128_align2 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; GFX1251-NEXT: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
; GFX1251-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE killed [[DEF]], %subreg.sub0_sub1, killed [[DEF]], %subreg.sub2_sub3
; GFX1251-NEXT: [[V_PK_ADD_NC_U64_:%[0-9]+]]:vreg_128_align2 = V_PK_ADD_NC_U64 8, killed [[COPY]], 0, killed [[REG_SEQUENCE]], 0, 0, 0, implicit $exec
; GFX1251-NEXT: S_ENDPGM 0, implicit [[V_PK_ADD_NC_U64_]]
%0:vreg_128_align2 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
%1:sreg_64 = IMPLICIT_DEF
%2:sgpr_128 = REG_SEQUENCE killed %1, %subreg.sub0_sub1, killed %1, %subreg.sub2_sub3
%3:vreg_128_align2 = V_PK_ADD_NC_U64 8, killed %0, 0, killed %2, 0, 0, 0, implicit $exec
S_ENDPGM 0, implicit %3
...