| # RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sme2 -run-pass=prolog-epilog -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s |
| # RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sme2 -start-before=prolog-epilog -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK-OFFSET |
| |
| --- | |
| define void @testcase_valid_offset() "aarch64_pstate_sm_enabled" nounwind { entry: unreachable } |
| define void @testcase_offset_out_of_range() "aarch64_pstate_sm_enabled" nounwind { entry: unreachable } |
| ... |
| --- |
| name: testcase_valid_offset |
| tracksRegLiveness: true |
| stack: |
| - { id: 0, name: '', type: default, offset: 0, size: 512, alignment: 16, stack-id: scalable-vector } |
| body: | |
| bb.0: |
| liveins: $pn8, $z16 |
| |
| ; CHECK-LABEL: name: testcase_valid_offset |
| ; CHECK: liveins: $pn8, $z16, $fp |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: early-clobber $sp = frame-setup STRXpre killed $fp, $sp, -16 :: (store (s64) into %stack.1) |
| ; CHECK-NEXT: $sp = frame-setup ADDVL_XXI $sp, -32, implicit $vg |
| ; CHECK-NEXT: $z16_z24 = LD1B_2Z_IMM_PSEUDO renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: $z16_z24 = LD1B_2Z_IMM_PSEUDO renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: $z16_z24 = LD1H_2Z_IMM_PSEUDO renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: $z16_z24 = LD1H_2Z_IMM_PSEUDO renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: $z16_z24 = LD1W_2Z_IMM_PSEUDO renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: $z16_z24 = LD1W_2Z_IMM_PSEUDO renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: $z16_z24 = LD1D_2Z_IMM_PSEUDO renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: $z16_z24 = LD1D_2Z_IMM_PSEUDO renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: ST1B_2Z_IMM renamable $z16_z17, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: ST1B_2Z_IMM renamable $z16_z17, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: ST1H_2Z_IMM renamable $z16_z17, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: ST1H_2Z_IMM renamable $z16_z17, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: ST1W_2Z_IMM renamable $z16_z17, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: ST1W_2Z_IMM renamable $z16_z17, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: ST1D_2Z_IMM renamable $z16_z17, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: ST1D_2Z_IMM renamable $z16_z17, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: ST1B_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: ST1B_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: ST1H_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: ST1H_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: ST1W_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: ST1W_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: ST1D_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: ST1D_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: $z16_z24 = LDNT1B_2Z_IMM_PSEUDO renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: $z16_z24 = LDNT1B_2Z_IMM_PSEUDO renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: $z16_z24 = LDNT1H_2Z_IMM_PSEUDO renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: $z16_z24 = LDNT1H_2Z_IMM_PSEUDO renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: $z16_z24 = LDNT1W_2Z_IMM_PSEUDO renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: $z16_z24 = LDNT1W_2Z_IMM_PSEUDO renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: $z16_z24 = LDNT1D_2Z_IMM_PSEUDO renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: $z16_z24 = LDNT1D_2Z_IMM_PSEUDO renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: STNT1B_2Z_IMM renamable $z16_z17, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: STNT1B_2Z_IMM renamable $z16_z17, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: STNT1H_2Z_IMM renamable $z16_z17, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: STNT1H_2Z_IMM renamable $z16_z17, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: STNT1W_2Z_IMM renamable $z16_z17, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: STNT1W_2Z_IMM renamable $z16_z17, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: STNT1D_2Z_IMM renamable $z16_z17, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: STNT1D_2Z_IMM renamable $z16_z17, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: STNT1B_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: STNT1B_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: STNT1H_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: STNT1H_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: STNT1W_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: STNT1W_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: STNT1D_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: STNT1D_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LD1B_4Z_IMM_PSEUDO renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LD1B_4Z_IMM_PSEUDO renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LD1H_4Z_IMM_PSEUDO renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LD1H_4Z_IMM_PSEUDO renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LD1W_4Z_IMM_PSEUDO renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LD1W_4Z_IMM_PSEUDO renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LD1D_4Z_IMM_PSEUDO renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LD1D_4Z_IMM_PSEUDO renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: ST1B_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: ST1B_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: ST1H_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: ST1H_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: ST1W_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: ST1W_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: ST1D_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: ST1D_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: ST1B_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: ST1B_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: ST1H_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: ST1H_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: ST1W_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: ST1W_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: ST1D_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: ST1D_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LDNT1B_4Z_IMM_PSEUDO renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LDNT1B_4Z_IMM_PSEUDO renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LDNT1H_4Z_IMM_PSEUDO renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LDNT1H_4Z_IMM_PSEUDO renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LDNT1W_4Z_IMM_PSEUDO renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LDNT1W_4Z_IMM_PSEUDO renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LDNT1D_4Z_IMM_PSEUDO renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LDNT1D_4Z_IMM_PSEUDO renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: STNT1B_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: STNT1B_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: STNT1H_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: STNT1H_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: STNT1W_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: STNT1W_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: STNT1D_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: STNT1D_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: STNT1B_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: STNT1B_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: STNT1H_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: STNT1H_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: STNT1W_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: STNT1W_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: STNT1D_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, $sp, -8 |
| ; CHECK-NEXT: STNT1D_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, $sp, 7 |
| ; CHECK-NEXT: $sp = frame-destroy ADDVL_XXI $sp, 31, implicit $vg |
| ; CHECK-NEXT: $sp = frame-destroy ADDVL_XXI $sp, 1, implicit $vg |
| ; CHECK-NEXT: early-clobber $sp, $fp = frame-destroy LDRXpost $sp, 16 :: (load (s64) from %stack.1) |
| ; CHECK-NEXT: RET_ReallyLR |
| |
| ; CHECK-OFFSET-LABEL: testcase_valid_offset: |
| ; CHECK-OFFSET: str x29, [sp, #-16]! |
| ; CHECK-OFFSET-NEXT: addvl sp, sp, #-32 |
| ; CHECK-OFFSET-NEXT: ld1b { z16.b, z24.b }, pn8/z, [sp, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: ld1b { z16.b, z24.b }, pn8/z, [sp, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: ld1h { z16.h, z24.h }, pn8/z, [sp, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: ld1h { z16.h, z24.h }, pn8/z, [sp, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: ld1w { z16.s, z24.s }, pn8/z, [sp, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: ld1w { z16.s, z24.s }, pn8/z, [sp, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: ld1d { z16.d, z24.d }, pn8/z, [sp, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: ld1d { z16.d, z24.d }, pn8/z, [sp, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: st1b { z16.b, z17.b }, pn8, [sp, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: st1b { z16.b, z17.b }, pn8, [sp, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: st1h { z16.h, z17.h }, pn8, [sp, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: st1h { z16.h, z17.h }, pn8, [sp, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: st1w { z16.s, z17.s }, pn8, [sp, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: st1w { z16.s, z17.s }, pn8, [sp, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: st1d { z16.d, z17.d }, pn8, [sp, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: st1d { z16.d, z17.d }, pn8, [sp, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: st1b { z16.b, z24.b }, pn8, [sp, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: st1b { z16.b, z24.b }, pn8, [sp, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: st1h { z16.h, z24.h }, pn8, [sp, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: st1h { z16.h, z24.h }, pn8, [sp, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: st1w { z16.s, z24.s }, pn8, [sp, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: st1w { z16.s, z24.s }, pn8, [sp, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: st1d { z16.d, z24.d }, pn8, [sp, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: st1d { z16.d, z24.d }, pn8, [sp, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: ldnt1b { z16.b, z24.b }, pn8/z, [sp, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: ldnt1b { z16.b, z24.b }, pn8/z, [sp, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: ldnt1h { z16.h, z24.h }, pn8/z, [sp, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: ldnt1h { z16.h, z24.h }, pn8/z, [sp, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: ldnt1w { z16.s, z24.s }, pn8/z, [sp, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: ldnt1w { z16.s, z24.s }, pn8/z, [sp, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: ldnt1d { z16.d, z24.d }, pn8/z, [sp, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: ldnt1d { z16.d, z24.d }, pn8/z, [sp, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1b { z16.b, z17.b }, pn8, [sp, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1b { z16.b, z17.b }, pn8, [sp, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1h { z16.h, z17.h }, pn8, [sp, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1h { z16.h, z17.h }, pn8, [sp, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1w { z16.s, z17.s }, pn8, [sp, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1w { z16.s, z17.s }, pn8, [sp, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1d { z16.d, z17.d }, pn8, [sp, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1d { z16.d, z17.d }, pn8, [sp, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1b { z16.b, z24.b }, pn8, [sp, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1b { z16.b, z24.b }, pn8, [sp, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1h { z16.h, z24.h }, pn8, [sp, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1h { z16.h, z24.h }, pn8, [sp, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1w { z16.s, z24.s }, pn8, [sp, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1w { z16.s, z24.s }, pn8, [sp, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1d { z16.d, z24.d }, pn8, [sp, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1d { z16.d, z24.d }, pn8, [sp, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: ld1b { z16.b, z20.b, z24.b, z28.b }, pn8/z, [sp, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: ld1b { z16.b, z20.b, z24.b, z28.b }, pn8/z, [sp, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: ld1h { z16.h, z20.h, z24.h, z28.h }, pn8/z, [sp, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: ld1h { z16.h, z20.h, z24.h, z28.h }, pn8/z, [sp, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: ld1w { z16.s, z20.s, z24.s, z28.s }, pn8/z, [sp, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: ld1w { z16.s, z20.s, z24.s, z28.s }, pn8/z, [sp, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: ld1d { z16.d, z20.d, z24.d, z28.d }, pn8/z, [sp, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: ld1d { z16.d, z20.d, z24.d, z28.d }, pn8/z, [sp, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: st1b { z16.b - z19.b }, pn8, [sp, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: st1b { z16.b - z19.b }, pn8, [sp, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: st1h { z16.h - z19.h }, pn8, [sp, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: st1h { z16.h - z19.h }, pn8, [sp, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: st1w { z16.s - z19.s }, pn8, [sp, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: st1w { z16.s - z19.s }, pn8, [sp, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: st1d { z16.d - z19.d }, pn8, [sp, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: st1d { z16.d - z19.d }, pn8, [sp, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: st1b { z16.b, z20.b, z24.b, z28.b }, pn8, [sp, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: st1b { z16.b, z20.b, z24.b, z28.b }, pn8, [sp, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: st1h { z16.h, z20.h, z24.h, z28.h }, pn8, [sp, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: st1h { z16.h, z20.h, z24.h, z28.h }, pn8, [sp, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: st1w { z16.s, z20.s, z24.s, z28.s }, pn8, [sp, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: st1w { z16.s, z20.s, z24.s, z28.s }, pn8, [sp, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: st1d { z16.d, z20.d, z24.d, z28.d }, pn8, [sp, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: st1d { z16.d, z20.d, z24.d, z28.d }, pn8, [sp, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: ldnt1b { z16.b, z20.b, z24.b, z28.b }, pn8/z, [sp, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: ldnt1b { z16.b, z20.b, z24.b, z28.b }, pn8/z, [sp, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: ldnt1h { z16.h, z20.h, z24.h, z28.h }, pn8/z, [sp, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: ldnt1h { z16.h, z20.h, z24.h, z28.h }, pn8/z, [sp, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: ldnt1w { z16.s, z20.s, z24.s, z28.s }, pn8/z, [sp, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: ldnt1w { z16.s, z20.s, z24.s, z28.s }, pn8/z, [sp, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: ldnt1d { z16.d, z20.d, z24.d, z28.d }, pn8/z, [sp, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: ldnt1d { z16.d, z20.d, z24.d, z28.d }, pn8/z, [sp, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1b { z16.b - z19.b }, pn8, [sp, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1b { z16.b - z19.b }, pn8, [sp, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1h { z16.h - z19.h }, pn8, [sp, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1h { z16.h - z19.h }, pn8, [sp, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1w { z16.s - z19.s }, pn8, [sp, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1w { z16.s - z19.s }, pn8, [sp, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1d { z16.d - z19.d }, pn8, [sp, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1d { z16.d - z19.d }, pn8, [sp, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1b { z16.b, z20.b, z24.b, z28.b }, pn8, [sp, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1b { z16.b, z20.b, z24.b, z28.b }, pn8, [sp, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1h { z16.h, z20.h, z24.h, z28.h }, pn8, [sp, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1h { z16.h, z20.h, z24.h, z28.h }, pn8, [sp, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1w { z16.s, z20.s, z24.s, z28.s }, pn8, [sp, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1w { z16.s, z20.s, z24.s, z28.s }, pn8, [sp, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1d { z16.d, z20.d, z24.d, z28.d }, pn8, [sp, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: stnt1d { z16.d, z20.d, z24.d, z28.d }, pn8, [sp, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl sp, sp, #31 |
| ; CHECK-OFFSET-NEXT: addvl sp, sp, #1 |
| ; CHECK-OFFSET-NEXT: ldr x29, [sp], #16 |
| ; CHECK-OFFSET-NEXT: ret |
| |
| ; 2x loads |
| $z16_z24 = LD1B_2Z_IMM_PSEUDO renamable $pn8, %stack.0, -8 |
| $z16_z24 = LD1B_2Z_IMM_PSEUDO renamable $pn8, %stack.0, 7 |
| $z16_z24 = LD1H_2Z_IMM_PSEUDO renamable $pn8, %stack.0, -8 |
| $z16_z24 = LD1H_2Z_IMM_PSEUDO renamable $pn8, %stack.0, 7 |
| $z16_z24 = LD1W_2Z_IMM_PSEUDO renamable $pn8, %stack.0, -8 |
| $z16_z24 = LD1W_2Z_IMM_PSEUDO renamable $pn8, %stack.0, 7 |
| $z16_z24 = LD1D_2Z_IMM_PSEUDO renamable $pn8, %stack.0, -8 |
| $z16_z24 = LD1D_2Z_IMM_PSEUDO renamable $pn8, %stack.0, 7 |
| |
| ; 2x stores |
| ST1B_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, -8 |
| ST1B_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, 7 |
| ST1H_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, -8 |
| ST1H_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, 7 |
| ST1W_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, -8 |
| ST1W_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, 7 |
| ST1D_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, -8 |
| ST1D_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, 7 |
| ST1B_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, -8 |
| ST1B_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, 7 |
| ST1H_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, -8 |
| ST1H_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, 7 |
| ST1W_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, -8 |
| ST1W_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, 7 |
| ST1D_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, -8 |
| ST1D_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, 7 |
| |
| ; 2x non-temporal loads |
| $z16_z24 = LDNT1B_2Z_IMM_PSEUDO renamable $pn8, %stack.0, -8 |
| $z16_z24 = LDNT1B_2Z_IMM_PSEUDO renamable $pn8, %stack.0, 7 |
| $z16_z24 = LDNT1H_2Z_IMM_PSEUDO renamable $pn8, %stack.0, -8 |
| $z16_z24 = LDNT1H_2Z_IMM_PSEUDO renamable $pn8, %stack.0, 7 |
| $z16_z24 = LDNT1W_2Z_IMM_PSEUDO renamable $pn8, %stack.0, -8 |
| $z16_z24 = LDNT1W_2Z_IMM_PSEUDO renamable $pn8, %stack.0, 7 |
| $z16_z24 = LDNT1D_2Z_IMM_PSEUDO renamable $pn8, %stack.0, -8 |
| $z16_z24 = LDNT1D_2Z_IMM_PSEUDO renamable $pn8, %stack.0, 7 |
| |
| ; 2x non-temporal stores |
| STNT1B_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, -8 |
| STNT1B_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, 7 |
| STNT1H_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, -8 |
| STNT1H_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, 7 |
| STNT1W_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, -8 |
| STNT1W_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, 7 |
| STNT1D_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, -8 |
| STNT1D_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, 7 |
| STNT1B_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, -8 |
| STNT1B_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, 7 |
| STNT1H_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, -8 |
| STNT1H_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, 7 |
| STNT1W_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, -8 |
| STNT1W_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, 7 |
| STNT1D_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, -8 |
| STNT1D_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, 7 |
| |
| ; 4x loads |
| $z16_z20_z24_z28 = LD1B_4Z_IMM_PSEUDO renamable $pn8, %stack.0, -8 |
| $z16_z20_z24_z28 = LD1B_4Z_IMM_PSEUDO renamable $pn8, %stack.0, 7 |
| $z16_z20_z24_z28 = LD1H_4Z_IMM_PSEUDO renamable $pn8, %stack.0, -8 |
| $z16_z20_z24_z28 = LD1H_4Z_IMM_PSEUDO renamable $pn8, %stack.0, 7 |
| $z16_z20_z24_z28 = LD1W_4Z_IMM_PSEUDO renamable $pn8, %stack.0, -8 |
| $z16_z20_z24_z28 = LD1W_4Z_IMM_PSEUDO renamable $pn8, %stack.0, 7 |
| $z16_z20_z24_z28 = LD1D_4Z_IMM_PSEUDO renamable $pn8, %stack.0, -8 |
| $z16_z20_z24_z28 = LD1D_4Z_IMM_PSEUDO renamable $pn8, %stack.0, 7 |
| |
| ; 4x stores |
| ST1B_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, -8 |
| ST1B_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, 7 |
| ST1H_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, -8 |
| ST1H_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, 7 |
| ST1W_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, -8 |
| ST1W_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, 7 |
| ST1D_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, -8 |
| ST1D_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, 7 |
| ST1B_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, -8 |
| ST1B_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, 7 |
| ST1H_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, -8 |
| ST1H_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, 7 |
| ST1W_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, -8 |
| ST1W_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, 7 |
| ST1D_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, -8 |
| ST1D_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, 7 |
| |
| ; 4x non-temporal loads |
| $z16_z20_z24_z28 = LDNT1B_4Z_IMM_PSEUDO renamable $pn8, %stack.0, -8 |
| $z16_z20_z24_z28 = LDNT1B_4Z_IMM_PSEUDO renamable $pn8, %stack.0, 7 |
| $z16_z20_z24_z28 = LDNT1H_4Z_IMM_PSEUDO renamable $pn8, %stack.0, -8 |
| $z16_z20_z24_z28 = LDNT1H_4Z_IMM_PSEUDO renamable $pn8, %stack.0, 7 |
| $z16_z20_z24_z28 = LDNT1W_4Z_IMM_PSEUDO renamable $pn8, %stack.0, -8 |
| $z16_z20_z24_z28 = LDNT1W_4Z_IMM_PSEUDO renamable $pn8, %stack.0, 7 |
| $z16_z20_z24_z28 = LDNT1D_4Z_IMM_PSEUDO renamable $pn8, %stack.0, -8 |
| $z16_z20_z24_z28 = LDNT1D_4Z_IMM_PSEUDO renamable $pn8, %stack.0, 7 |
| |
| ; 4x non-temporal stores |
| STNT1B_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, -8 |
| STNT1B_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, 7 |
| STNT1H_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, -8 |
| STNT1H_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, 7 |
| STNT1W_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, -8 |
| STNT1W_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, 7 |
| STNT1D_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, -8 |
| STNT1D_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, 7 |
| STNT1B_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, -8 |
| STNT1B_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, 7 |
| STNT1H_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, -8 |
| STNT1H_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, 7 |
| STNT1W_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, -8 |
| STNT1W_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, 7 |
| STNT1D_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, -8 |
| STNT1D_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, 7 |
| |
| RET_ReallyLR |
| ... |
| --- |
| name: testcase_offset_out_of_range |
| tracksRegLiveness: true |
| stack: |
| - { id: 0, name: '', type: default, offset: 0, size: 512, alignment: 16, stack-id: scalable-vector } |
| body: | |
| bb.0: |
| liveins: $pn8, $z16 |
| |
| ; CHECK-LABEL: name: testcase_offset_out_of_range |
| ; CHECK: liveins: $pn8, $z16, $fp |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: early-clobber $sp = frame-setup STRXpre killed $fp, $sp, -16 :: (store (s64) into %stack.1) |
| ; CHECK-NEXT: $sp = frame-setup ADDVL_XXI $sp, -32, implicit $vg |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -2, implicit $vg |
| ; CHECK-NEXT: $z16_z24 = LD1B_2Z_IMM_PSEUDO renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 2, implicit $vg |
| ; CHECK-NEXT: $z16_z24 = LD1B_2Z_IMM_PSEUDO renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -2, implicit $vg |
| ; CHECK-NEXT: $z16_z24 = LD1H_2Z_IMM_PSEUDO renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 2, implicit $vg |
| ; CHECK-NEXT: $z16_z24 = LD1H_2Z_IMM_PSEUDO renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -2, implicit $vg |
| ; CHECK-NEXT: $z16_z24 = LD1W_2Z_IMM_PSEUDO renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 2, implicit $vg |
| ; CHECK-NEXT: $z16_z24 = LD1W_2Z_IMM_PSEUDO renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -2, implicit $vg |
| ; CHECK-NEXT: $z16_z24 = LD1D_2Z_IMM_PSEUDO renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 2, implicit $vg |
| ; CHECK-NEXT: $z16_z24 = LD1D_2Z_IMM_PSEUDO renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -2, implicit $vg |
| ; CHECK-NEXT: ST1B_2Z_IMM renamable $z16_z17, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 2, implicit $vg |
| ; CHECK-NEXT: ST1B_2Z_IMM renamable $z16_z17, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -2, implicit $vg |
| ; CHECK-NEXT: ST1H_2Z_IMM renamable $z16_z17, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 2, implicit $vg |
| ; CHECK-NEXT: ST1H_2Z_IMM renamable $z16_z17, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -2, implicit $vg |
| ; CHECK-NEXT: ST1W_2Z_IMM renamable $z16_z17, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 2, implicit $vg |
| ; CHECK-NEXT: ST1W_2Z_IMM renamable $z16_z17, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -2, implicit $vg |
| ; CHECK-NEXT: ST1D_2Z_IMM renamable $z16_z17, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 2, implicit $vg |
| ; CHECK-NEXT: ST1D_2Z_IMM renamable $z16_z17, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -2, implicit $vg |
| ; CHECK-NEXT: ST1B_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 2, implicit $vg |
| ; CHECK-NEXT: ST1B_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -2, implicit $vg |
| ; CHECK-NEXT: ST1H_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 2, implicit $vg |
| ; CHECK-NEXT: ST1H_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -2, implicit $vg |
| ; CHECK-NEXT: ST1W_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 2, implicit $vg |
| ; CHECK-NEXT: ST1W_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -2, implicit $vg |
| ; CHECK-NEXT: ST1D_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 2, implicit $vg |
| ; CHECK-NEXT: ST1D_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -2, implicit $vg |
| ; CHECK-NEXT: $z16_z24 = LDNT1B_2Z_IMM_PSEUDO renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 2, implicit $vg |
| ; CHECK-NEXT: $z16_z24 = LDNT1B_2Z_IMM_PSEUDO renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -2, implicit $vg |
| ; CHECK-NEXT: $z16_z24 = LDNT1H_2Z_IMM_PSEUDO renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 2, implicit $vg |
| ; CHECK-NEXT: $z16_z24 = LDNT1H_2Z_IMM_PSEUDO renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -2, implicit $vg |
| ; CHECK-NEXT: $z16_z24 = LDNT1W_2Z_IMM_PSEUDO renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 2, implicit $vg |
| ; CHECK-NEXT: $z16_z24 = LDNT1W_2Z_IMM_PSEUDO renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -2, implicit $vg |
| ; CHECK-NEXT: $z16_z24 = LDNT1D_2Z_IMM_PSEUDO renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 2, implicit $vg |
| ; CHECK-NEXT: $z16_z24 = LDNT1D_2Z_IMM_PSEUDO renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -2, implicit $vg |
| ; CHECK-NEXT: STNT1B_2Z_IMM renamable $z16_z17, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 2, implicit $vg |
| ; CHECK-NEXT: STNT1B_2Z_IMM renamable $z16_z17, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -2, implicit $vg |
| ; CHECK-NEXT: STNT1H_2Z_IMM renamable $z16_z17, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 2, implicit $vg |
| ; CHECK-NEXT: STNT1H_2Z_IMM renamable $z16_z17, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -2, implicit $vg |
| ; CHECK-NEXT: STNT1W_2Z_IMM renamable $z16_z17, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 2, implicit $vg |
| ; CHECK-NEXT: STNT1W_2Z_IMM renamable $z16_z17, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -2, implicit $vg |
| ; CHECK-NEXT: STNT1D_2Z_IMM renamable $z16_z17, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 2, implicit $vg |
| ; CHECK-NEXT: STNT1D_2Z_IMM renamable $z16_z17, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -2, implicit $vg |
| ; CHECK-NEXT: STNT1B_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 2, implicit $vg |
| ; CHECK-NEXT: STNT1B_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -2, implicit $vg |
| ; CHECK-NEXT: STNT1H_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 2, implicit $vg |
| ; CHECK-NEXT: STNT1H_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -2, implicit $vg |
| ; CHECK-NEXT: STNT1W_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 2, implicit $vg |
| ; CHECK-NEXT: STNT1W_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -2, implicit $vg |
| ; CHECK-NEXT: STNT1D_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 2, implicit $vg |
| ; CHECK-NEXT: STNT1D_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -4, implicit $vg |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LD1B_4Z_IMM_PSEUDO renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 4, implicit $vg |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LD1B_4Z_IMM_PSEUDO renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -4, implicit $vg |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LD1H_4Z_IMM_PSEUDO renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 4, implicit $vg |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LD1H_4Z_IMM_PSEUDO renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -4, implicit $vg |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LD1W_4Z_IMM_PSEUDO renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 4, implicit $vg |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LD1W_4Z_IMM_PSEUDO renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -4, implicit $vg |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LD1D_4Z_IMM_PSEUDO renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 4, implicit $vg |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LD1D_4Z_IMM_PSEUDO renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -4, implicit $vg |
| ; CHECK-NEXT: ST1B_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 4, implicit $vg |
| ; CHECK-NEXT: ST1B_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -4, implicit $vg |
| ; CHECK-NEXT: ST1H_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 4, implicit $vg |
| ; CHECK-NEXT: ST1H_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -4, implicit $vg |
| ; CHECK-NEXT: ST1W_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 4, implicit $vg |
| ; CHECK-NEXT: ST1W_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -4, implicit $vg |
| ; CHECK-NEXT: ST1D_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 4, implicit $vg |
| ; CHECK-NEXT: ST1D_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -4, implicit $vg |
| ; CHECK-NEXT: ST1B_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 4, implicit $vg |
| ; CHECK-NEXT: ST1B_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -4, implicit $vg |
| ; CHECK-NEXT: ST1H_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 4, implicit $vg |
| ; CHECK-NEXT: ST1H_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -4, implicit $vg |
| ; CHECK-NEXT: ST1W_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 4, implicit $vg |
| ; CHECK-NEXT: ST1W_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -4, implicit $vg |
| ; CHECK-NEXT: ST1D_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 4, implicit $vg |
| ; CHECK-NEXT: ST1D_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -4, implicit $vg |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LDNT1B_4Z_IMM_PSEUDO renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 4, implicit $vg |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LDNT1B_4Z_IMM_PSEUDO renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -4, implicit $vg |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LDNT1H_4Z_IMM_PSEUDO renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 4, implicit $vg |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LDNT1H_4Z_IMM_PSEUDO renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -4, implicit $vg |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LDNT1W_4Z_IMM_PSEUDO renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 4, implicit $vg |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LDNT1W_4Z_IMM_PSEUDO renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -4, implicit $vg |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LDNT1D_4Z_IMM_PSEUDO renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 4, implicit $vg |
| ; CHECK-NEXT: $z16_z20_z24_z28 = LDNT1D_4Z_IMM_PSEUDO renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -4, implicit $vg |
| ; CHECK-NEXT: STNT1B_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 4, implicit $vg |
| ; CHECK-NEXT: STNT1B_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -4, implicit $vg |
| ; CHECK-NEXT: STNT1H_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 4, implicit $vg |
| ; CHECK-NEXT: STNT1H_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -4, implicit $vg |
| ; CHECK-NEXT: STNT1W_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 4, implicit $vg |
| ; CHECK-NEXT: STNT1W_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -4, implicit $vg |
| ; CHECK-NEXT: STNT1D_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 4, implicit $vg |
| ; CHECK-NEXT: STNT1D_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -4, implicit $vg |
| ; CHECK-NEXT: STNT1B_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 4, implicit $vg |
| ; CHECK-NEXT: STNT1B_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -4, implicit $vg |
| ; CHECK-NEXT: STNT1H_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 4, implicit $vg |
| ; CHECK-NEXT: STNT1H_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -4, implicit $vg |
| ; CHECK-NEXT: STNT1W_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 4, implicit $vg |
| ; CHECK-NEXT: STNT1W_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -4, implicit $vg |
| ; CHECK-NEXT: STNT1D_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, killed $x8, -8 |
| ; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 4, implicit $vg |
| ; CHECK-NEXT: STNT1D_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, killed $x8, 7 |
| ; CHECK-NEXT: $sp = frame-destroy ADDVL_XXI $sp, 31, implicit $vg |
| ; CHECK-NEXT: $sp = frame-destroy ADDVL_XXI $sp, 1, implicit $vg |
| ; CHECK-NEXT: early-clobber $sp, $fp = frame-destroy LDRXpost $sp, 16 :: (load (s64) from %stack.1) |
| ; CHECK-NEXT: RET_ReallyLR |
| |
| ; CHECK-OFFSET-LABEL: testcase_offset_out_of_range: |
| ; CHECK-OFFSET: str x29, [sp, #-16]! |
| ; CHECK-OFFSET-NEXT: addvl sp, sp, #-32 |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-2 |
| ; CHECK-OFFSET-NEXT: ld1b { z16.b, z24.b }, pn8/z, [x8, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #2 |
| ; CHECK-OFFSET-NEXT: ld1b { z16.b, z24.b }, pn8/z, [x8, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-2 |
| ; CHECK-OFFSET-NEXT: ld1h { z16.h, z24.h }, pn8/z, [x8, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #2 |
| ; CHECK-OFFSET-NEXT: ld1h { z16.h, z24.h }, pn8/z, [x8, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-2 |
| ; CHECK-OFFSET-NEXT: ld1w { z16.s, z24.s }, pn8/z, [x8, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #2 |
| ; CHECK-OFFSET-NEXT: ld1w { z16.s, z24.s }, pn8/z, [x8, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-2 |
| ; CHECK-OFFSET-NEXT: ld1d { z16.d, z24.d }, pn8/z, [x8, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #2 |
| ; CHECK-OFFSET-NEXT: ld1d { z16.d, z24.d }, pn8/z, [x8, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-2 |
| ; CHECK-OFFSET-NEXT: st1b { z16.b, z17.b }, pn8, [x8, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #2 |
| ; CHECK-OFFSET-NEXT: st1b { z16.b, z17.b }, pn8, [x8, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-2 |
| ; CHECK-OFFSET-NEXT: st1h { z16.h, z17.h }, pn8, [x8, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #2 |
| ; CHECK-OFFSET-NEXT: st1h { z16.h, z17.h }, pn8, [x8, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-2 |
| ; CHECK-OFFSET-NEXT: st1w { z16.s, z17.s }, pn8, [x8, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #2 |
| ; CHECK-OFFSET-NEXT: st1w { z16.s, z17.s }, pn8, [x8, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-2 |
| ; CHECK-OFFSET-NEXT: st1d { z16.d, z17.d }, pn8, [x8, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #2 |
| ; CHECK-OFFSET-NEXT: st1d { z16.d, z17.d }, pn8, [x8, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-2 |
| ; CHECK-OFFSET-NEXT: st1b { z16.b, z24.b }, pn8, [x8, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #2 |
| ; CHECK-OFFSET-NEXT: st1b { z16.b, z24.b }, pn8, [x8, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-2 |
| ; CHECK-OFFSET-NEXT: st1h { z16.h, z24.h }, pn8, [x8, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #2 |
| ; CHECK-OFFSET-NEXT: st1h { z16.h, z24.h }, pn8, [x8, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-2 |
| ; CHECK-OFFSET-NEXT: st1w { z16.s, z24.s }, pn8, [x8, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #2 |
| ; CHECK-OFFSET-NEXT: st1w { z16.s, z24.s }, pn8, [x8, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-2 |
| ; CHECK-OFFSET-NEXT: st1d { z16.d, z24.d }, pn8, [x8, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #2 |
| ; CHECK-OFFSET-NEXT: st1d { z16.d, z24.d }, pn8, [x8, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-2 |
| ; CHECK-OFFSET-NEXT: ldnt1b { z16.b, z24.b }, pn8/z, [x8, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #2 |
| ; CHECK-OFFSET-NEXT: ldnt1b { z16.b, z24.b }, pn8/z, [x8, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-2 |
| ; CHECK-OFFSET-NEXT: ldnt1h { z16.h, z24.h }, pn8/z, [x8, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #2 |
| ; CHECK-OFFSET-NEXT: ldnt1h { z16.h, z24.h }, pn8/z, [x8, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-2 |
| ; CHECK-OFFSET-NEXT: ldnt1w { z16.s, z24.s }, pn8/z, [x8, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #2 |
| ; CHECK-OFFSET-NEXT: ldnt1w { z16.s, z24.s }, pn8/z, [x8, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-2 |
| ; CHECK-OFFSET-NEXT: ldnt1d { z16.d, z24.d }, pn8/z, [x8, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #2 |
| ; CHECK-OFFSET-NEXT: ldnt1d { z16.d, z24.d }, pn8/z, [x8, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-2 |
| ; CHECK-OFFSET-NEXT: stnt1b { z16.b, z17.b }, pn8, [x8, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #2 |
| ; CHECK-OFFSET-NEXT: stnt1b { z16.b, z17.b }, pn8, [x8, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-2 |
| ; CHECK-OFFSET-NEXT: stnt1h { z16.h, z17.h }, pn8, [x8, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #2 |
| ; CHECK-OFFSET-NEXT: stnt1h { z16.h, z17.h }, pn8, [x8, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-2 |
| ; CHECK-OFFSET-NEXT: stnt1w { z16.s, z17.s }, pn8, [x8, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #2 |
| ; CHECK-OFFSET-NEXT: stnt1w { z16.s, z17.s }, pn8, [x8, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-2 |
| ; CHECK-OFFSET-NEXT: stnt1d { z16.d, z17.d }, pn8, [x8, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #2 |
| ; CHECK-OFFSET-NEXT: stnt1d { z16.d, z17.d }, pn8, [x8, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-2 |
| ; CHECK-OFFSET-NEXT: stnt1b { z16.b, z24.b }, pn8, [x8, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #2 |
| ; CHECK-OFFSET-NEXT: stnt1b { z16.b, z24.b }, pn8, [x8, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-2 |
| ; CHECK-OFFSET-NEXT: stnt1h { z16.h, z24.h }, pn8, [x8, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #2 |
| ; CHECK-OFFSET-NEXT: stnt1h { z16.h, z24.h }, pn8, [x8, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-2 |
| ; CHECK-OFFSET-NEXT: stnt1w { z16.s, z24.s }, pn8, [x8, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #2 |
| ; CHECK-OFFSET-NEXT: stnt1w { z16.s, z24.s }, pn8, [x8, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-2 |
| ; CHECK-OFFSET-NEXT: stnt1d { z16.d, z24.d }, pn8, [x8, #-16, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #2 |
| ; CHECK-OFFSET-NEXT: stnt1d { z16.d, z24.d }, pn8, [x8, #14, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-4 |
| ; CHECK-OFFSET-NEXT: ld1b { z16.b, z20.b, z24.b, z28.b }, pn8/z, [x8, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #4 |
| ; CHECK-OFFSET-NEXT: ld1b { z16.b, z20.b, z24.b, z28.b }, pn8/z, [x8, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-4 |
| ; CHECK-OFFSET-NEXT: ld1h { z16.h, z20.h, z24.h, z28.h }, pn8/z, [x8, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #4 |
| ; CHECK-OFFSET-NEXT: ld1h { z16.h, z20.h, z24.h, z28.h }, pn8/z, [x8, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-4 |
| ; CHECK-OFFSET-NEXT: ld1w { z16.s, z20.s, z24.s, z28.s }, pn8/z, [x8, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #4 |
| ; CHECK-OFFSET-NEXT: ld1w { z16.s, z20.s, z24.s, z28.s }, pn8/z, [x8, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-4 |
| ; CHECK-OFFSET-NEXT: ld1d { z16.d, z20.d, z24.d, z28.d }, pn8/z, [x8, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #4 |
| ; CHECK-OFFSET-NEXT: ld1d { z16.d, z20.d, z24.d, z28.d }, pn8/z, [x8, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-4 |
| ; CHECK-OFFSET-NEXT: st1b { z16.b - z19.b }, pn8, [x8, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #4 |
| ; CHECK-OFFSET-NEXT: st1b { z16.b - z19.b }, pn8, [x8, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-4 |
| ; CHECK-OFFSET-NEXT: st1h { z16.h - z19.h }, pn8, [x8, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #4 |
| ; CHECK-OFFSET-NEXT: st1h { z16.h - z19.h }, pn8, [x8, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-4 |
| ; CHECK-OFFSET-NEXT: st1w { z16.s - z19.s }, pn8, [x8, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #4 |
| ; CHECK-OFFSET-NEXT: st1w { z16.s - z19.s }, pn8, [x8, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-4 |
| ; CHECK-OFFSET-NEXT: st1d { z16.d - z19.d }, pn8, [x8, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #4 |
| ; CHECK-OFFSET-NEXT: st1d { z16.d - z19.d }, pn8, [x8, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-4 |
| ; CHECK-OFFSET-NEXT: st1b { z16.b, z20.b, z24.b, z28.b }, pn8, [x8, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #4 |
| ; CHECK-OFFSET-NEXT: st1b { z16.b, z20.b, z24.b, z28.b }, pn8, [x8, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-4 |
| ; CHECK-OFFSET-NEXT: st1h { z16.h, z20.h, z24.h, z28.h }, pn8, [x8, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #4 |
| ; CHECK-OFFSET-NEXT: st1h { z16.h, z20.h, z24.h, z28.h }, pn8, [x8, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-4 |
| ; CHECK-OFFSET-NEXT: st1w { z16.s, z20.s, z24.s, z28.s }, pn8, [x8, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #4 |
| ; CHECK-OFFSET-NEXT: st1w { z16.s, z20.s, z24.s, z28.s }, pn8, [x8, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-4 |
| ; CHECK-OFFSET-NEXT: st1d { z16.d, z20.d, z24.d, z28.d }, pn8, [x8, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #4 |
| ; CHECK-OFFSET-NEXT: st1d { z16.d, z20.d, z24.d, z28.d }, pn8, [x8, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-4 |
| ; CHECK-OFFSET-NEXT: ldnt1b { z16.b, z20.b, z24.b, z28.b }, pn8/z, [x8, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #4 |
| ; CHECK-OFFSET-NEXT: ldnt1b { z16.b, z20.b, z24.b, z28.b }, pn8/z, [x8, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-4 |
| ; CHECK-OFFSET-NEXT: ldnt1h { z16.h, z20.h, z24.h, z28.h }, pn8/z, [x8, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #4 |
| ; CHECK-OFFSET-NEXT: ldnt1h { z16.h, z20.h, z24.h, z28.h }, pn8/z, [x8, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-4 |
| ; CHECK-OFFSET-NEXT: ldnt1w { z16.s, z20.s, z24.s, z28.s }, pn8/z, [x8, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #4 |
| ; CHECK-OFFSET-NEXT: ldnt1w { z16.s, z20.s, z24.s, z28.s }, pn8/z, [x8, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-4 |
| ; CHECK-OFFSET-NEXT: ldnt1d { z16.d, z20.d, z24.d, z28.d }, pn8/z, [x8, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #4 |
| ; CHECK-OFFSET-NEXT: ldnt1d { z16.d, z20.d, z24.d, z28.d }, pn8/z, [x8, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-4 |
| ; CHECK-OFFSET-NEXT: stnt1b { z16.b - z19.b }, pn8, [x8, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #4 |
| ; CHECK-OFFSET-NEXT: stnt1b { z16.b - z19.b }, pn8, [x8, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-4 |
| ; CHECK-OFFSET-NEXT: stnt1h { z16.h - z19.h }, pn8, [x8, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #4 |
| ; CHECK-OFFSET-NEXT: stnt1h { z16.h - z19.h }, pn8, [x8, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-4 |
| ; CHECK-OFFSET-NEXT: stnt1w { z16.s - z19.s }, pn8, [x8, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #4 |
| ; CHECK-OFFSET-NEXT: stnt1w { z16.s - z19.s }, pn8, [x8, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-4 |
| ; CHECK-OFFSET-NEXT: stnt1d { z16.d - z19.d }, pn8, [x8, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #4 |
| ; CHECK-OFFSET-NEXT: stnt1d { z16.d - z19.d }, pn8, [x8, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-4 |
| ; CHECK-OFFSET-NEXT: stnt1b { z16.b, z20.b, z24.b, z28.b }, pn8, [x8, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #4 |
| ; CHECK-OFFSET-NEXT: stnt1b { z16.b, z20.b, z24.b, z28.b }, pn8, [x8, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-4 |
| ; CHECK-OFFSET-NEXT: stnt1h { z16.h, z20.h, z24.h, z28.h }, pn8, [x8, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #4 |
| ; CHECK-OFFSET-NEXT: stnt1h { z16.h, z20.h, z24.h, z28.h }, pn8, [x8, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-4 |
| ; CHECK-OFFSET-NEXT: stnt1w { z16.s, z20.s, z24.s, z28.s }, pn8, [x8, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #4 |
| ; CHECK-OFFSET-NEXT: stnt1w { z16.s, z20.s, z24.s, z28.s }, pn8, [x8, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #-4 |
| ; CHECK-OFFSET-NEXT: stnt1d { z16.d, z20.d, z24.d, z28.d }, pn8, [x8, #-32, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl x8, sp, #4 |
| ; CHECK-OFFSET-NEXT: stnt1d { z16.d, z20.d, z24.d, z28.d }, pn8, [x8, #28, mul vl] |
| ; CHECK-OFFSET-NEXT: addvl sp, sp, #31 |
| ; CHECK-OFFSET-NEXT: addvl sp, sp, #1 |
| ; CHECK-OFFSET-NEXT: ldr x29, [sp], #16 |
| ; CHECK-OFFSET-NEXT: ret |
| |
| ; 2x loads |
| $z16_z24 = LD1B_2Z_IMM_PSEUDO renamable $pn8, %stack.0, -9 |
| $z16_z24 = LD1B_2Z_IMM_PSEUDO renamable $pn8, %stack.0, 8 |
| $z16_z24 = LD1H_2Z_IMM_PSEUDO renamable $pn8, %stack.0, -9 |
| $z16_z24 = LD1H_2Z_IMM_PSEUDO renamable $pn8, %stack.0, 8 |
| $z16_z24 = LD1W_2Z_IMM_PSEUDO renamable $pn8, %stack.0, -9 |
| $z16_z24 = LD1W_2Z_IMM_PSEUDO renamable $pn8, %stack.0, 8 |
| $z16_z24 = LD1D_2Z_IMM_PSEUDO renamable $pn8, %stack.0, -9 |
| $z16_z24 = LD1D_2Z_IMM_PSEUDO renamable $pn8, %stack.0, 8 |
| |
| ; 2x stores |
| ST1B_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, -9 |
| ST1B_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, 8 |
| ST1H_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, -9 |
| ST1H_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, 8 |
| ST1W_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, -9 |
| ST1W_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, 8 |
| ST1D_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, -9 |
| ST1D_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, 8 |
| ST1B_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, -9 |
| ST1B_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, 8 |
| ST1H_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, -9 |
| ST1H_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, 8 |
| ST1W_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, -9 |
| ST1W_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, 8 |
| ST1D_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, -9 |
| ST1D_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, 8 |
| |
| ; 2x non-temporal loads |
| $z16_z24 = LDNT1B_2Z_IMM_PSEUDO renamable $pn8, %stack.0, -9 |
| $z16_z24 = LDNT1B_2Z_IMM_PSEUDO renamable $pn8, %stack.0, 8 |
| $z16_z24 = LDNT1H_2Z_IMM_PSEUDO renamable $pn8, %stack.0, -9 |
| $z16_z24 = LDNT1H_2Z_IMM_PSEUDO renamable $pn8, %stack.0, 8 |
| $z16_z24 = LDNT1W_2Z_IMM_PSEUDO renamable $pn8, %stack.0, -9 |
| $z16_z24 = LDNT1W_2Z_IMM_PSEUDO renamable $pn8, %stack.0, 8 |
| $z16_z24 = LDNT1D_2Z_IMM_PSEUDO renamable $pn8, %stack.0, -9 |
| $z16_z24 = LDNT1D_2Z_IMM_PSEUDO renamable $pn8, %stack.0, 8 |
| |
| ; 2x non-temporal stores |
| STNT1B_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, -9 |
| STNT1B_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, 8 |
| STNT1H_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, -9 |
| STNT1H_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, 8 |
| STNT1W_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, -9 |
| STNT1W_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, 8 |
| STNT1D_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, -9 |
| STNT1D_2Z_IMM renamable $z16_z17, renamable $pn8, %stack.0, 8 |
| STNT1B_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, -9 |
| STNT1B_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, 8 |
| STNT1H_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, -9 |
| STNT1H_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, 8 |
| STNT1W_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, -9 |
| STNT1W_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, 8 |
| STNT1D_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, -9 |
| STNT1D_2Z_STRIDED_IMM renamable $z16_z24, renamable $pn8, %stack.0, 8 |
| |
| ; 4x loads |
| $z16_z20_z24_z28 = LD1B_4Z_IMM_PSEUDO renamable $pn8, %stack.0, -9 |
| $z16_z20_z24_z28 = LD1B_4Z_IMM_PSEUDO renamable $pn8, %stack.0, 8 |
| $z16_z20_z24_z28 = LD1H_4Z_IMM_PSEUDO renamable $pn8, %stack.0, -9 |
| $z16_z20_z24_z28 = LD1H_4Z_IMM_PSEUDO renamable $pn8, %stack.0, 8 |
| $z16_z20_z24_z28 = LD1W_4Z_IMM_PSEUDO renamable $pn8, %stack.0, -9 |
| $z16_z20_z24_z28 = LD1W_4Z_IMM_PSEUDO renamable $pn8, %stack.0, 8 |
| $z16_z20_z24_z28 = LD1D_4Z_IMM_PSEUDO renamable $pn8, %stack.0, -9 |
| $z16_z20_z24_z28 = LD1D_4Z_IMM_PSEUDO renamable $pn8, %stack.0, 8 |
| |
| ; 4x stores |
| ST1B_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, -9 |
| ST1B_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, 8 |
| ST1H_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, -9 |
| ST1H_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, 8 |
| ST1W_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, -9 |
| ST1W_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, 8 |
| ST1D_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, -9 |
| ST1D_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, 8 |
| ST1B_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, -9 |
| ST1B_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, 8 |
| ST1H_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, -9 |
| ST1H_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, 8 |
| ST1W_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, -9 |
| ST1W_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, 8 |
| ST1D_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, -9 |
| ST1D_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, 8 |
| |
| ; 4x non-temporal loads |
| $z16_z20_z24_z28 = LDNT1B_4Z_IMM_PSEUDO renamable $pn8, %stack.0, -9 |
| $z16_z20_z24_z28 = LDNT1B_4Z_IMM_PSEUDO renamable $pn8, %stack.0, 8 |
| $z16_z20_z24_z28 = LDNT1H_4Z_IMM_PSEUDO renamable $pn8, %stack.0, -9 |
| $z16_z20_z24_z28 = LDNT1H_4Z_IMM_PSEUDO renamable $pn8, %stack.0, 8 |
| $z16_z20_z24_z28 = LDNT1W_4Z_IMM_PSEUDO renamable $pn8, %stack.0, -9 |
| $z16_z20_z24_z28 = LDNT1W_4Z_IMM_PSEUDO renamable $pn8, %stack.0, 8 |
| $z16_z20_z24_z28 = LDNT1D_4Z_IMM_PSEUDO renamable $pn8, %stack.0, -9 |
| $z16_z20_z24_z28 = LDNT1D_4Z_IMM_PSEUDO renamable $pn8, %stack.0, 8 |
| |
| ; 4x non-temporal stores |
| STNT1B_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, -9 |
| STNT1B_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, 8 |
| STNT1H_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, -9 |
| STNT1H_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, 8 |
| STNT1W_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, -9 |
| STNT1W_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, 8 |
| STNT1D_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, -9 |
| STNT1D_4Z_IMM renamable $z16_z17_z18_z19, renamable $pn8, %stack.0, 8 |
| STNT1B_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, -9 |
| STNT1B_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, 8 |
| STNT1H_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, -9 |
| STNT1H_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, 8 |
| STNT1W_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, -9 |
| STNT1W_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, 8 |
| STNT1D_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, -9 |
| STNT1D_4Z_STRIDED_IMM renamable $z16_z20_z24_z28, renamable $pn8, %stack.0, 8 |
| |
| RET_ReallyLR |
| ... |