llvm/test/CodeGen/AArch64/read-fp-reg.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple=aarch64 -fast-isel=0 -global-isel=false -verify-machineinstrs < %s | FileCheck %s

define double @test_getRegFp_d5() {
; CHECK-LABEL: test_getRegFp_d5:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fmov d0, d5
; CHECK-NEXT:    ret
entry:
  %0 = tail call i64 @llvm.read_volatile_register.i64(metadata !0)
  %1 = bitcast i64 %0 to double
  ret double %1
}

define double @test_getRegFp_d31() {
; CHECK-LABEL: test_getRegFp_d31:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fmov d0, d31
; CHECK-NEXT:    ret
entry:
  %0 = tail call i64 @llvm.read_volatile_register.i64(metadata !1)
  %1 = bitcast i64 %0 to double
  ret double %1
}

declare i64 @llvm.read_volatile_register.i64(metadata)

!0 = !{!"d5"}
!1 = !{!"d31"}