| REQUIRES: x86 |
| |
| # RUN: rm -rf %t && split-file %s %t |
| # RUN: llvm-mc -filetype=obj -triple=x86_64 %t/a.s -o %t/a.o |
| |
| ## The error should be triggered only for the second test where the overflow really exists. |
| |
| RUN: ld.lld %t/a.o -T %t/b.lds -o /dev/null 2>&1 |
| RUN: not ld.lld %t/a.o -T %t/c.lds -o /dev/null 2>&1 | FileCheck --check-prefix=ERROR %s |
| |
| # ERROR: error: section '_abss' will not fit in region 'SRAM0': overflowed by 1024 bytes |
| # ERROR: error: section '.c.bss' will not fit in region 'SRAM0': overflowed by 1024 bytes |
| # ERROR: error: section '.text' will not fit in region 'SRAM0': overflowed by 1025 bytes |
| |
| #--- a.s |
| .section .a.bss, "aw", %nobits |
| .globl abss |
| abss: |
| .zero 0xDF0 |
| .size abss, 0xDF0 |
| |
| .section .c.bss, "aw", %nobits |
| .globl cbss |
| |
| .text |
| .globl _start |
| _start: |
| nop |
| |
| #--- b.lds |
| MEMORY |
| { |
| SRAM0 (rw) : ORIGIN = 0x20000400, LENGTH = 10K |
| } |
| |
| SECTIONS |
| { |
| _abss ALIGN(REGION1__PRE_ALIGNMENT) : |
| { |
| REGION1__BEGIN = .; REGION1__ALIGNED_BEGIN = .; REGION1_ALIGNED_BEGIN = .; |
| *(.a.bss) |
| REGION1__END = .; . = ALIGN(REGION1__POST_ALIGNMENT); REGION1_ALIGNED_END = .; |
| } > SRAM0 |
| } |
| |
| REGION1__PRE_ALIGNMENT = 0x00000800; |
| REGION1__PADDED_XOR = ((ABSOLUTE(REGION1__ALIGNED_BEGIN) | (ABSOLUTE(REGION1__END) - 1)) & ~(ABSOLUTE(REGION1__ALIGNED_BEGIN) & (ABSOLUTE(REGION1__END) - 1))); |
| REGION1__PADDED_REGION_SHIFT = LOG2CEIL(REGION1__PADDED_XOR); |
| REGION1__PADDED_SR_SHIFT = REGION1__PADDED_REGION_SHIFT - 3; |
| REGION1__PADDED_SR_SIZE = MAX(1 << REGION1__PADDED_SR_SHIFT, 32); |
| REGION1__POST_ALIGNMENT = REGION1__PADDED_SR_SIZE; |
| |
| #--- c.lds |
| MEMORY |
| { |
| SRAM0 (rw) : ORIGIN = 0x20000400, LENGTH = 4K |
| } |
| |
| SECTIONS |
| { |
| _abss ALIGN(REGION1__PRE_ALIGNMENT) : |
| { |
| REGION1__BEGIN = .; REGION1__ALIGNED_BEGIN = .; REGION1_ALIGNED_BEGIN = .; |
| *(.a.bss) |
| REGION1__END = .; . = ALIGN(REGION1__POST_ALIGNMENT); REGION1_ALIGNED_END = .; |
| } > SRAM0 |
| } |
| |
| REGION1__PRE_ALIGNMENT = 0x00000800; |
| REGION1__PADDED_XOR = ((ABSOLUTE(REGION1__ALIGNED_BEGIN) | (ABSOLUTE(REGION1__END) - 1)) & ~(ABSOLUTE(REGION1__ALIGNED_BEGIN) & (ABSOLUTE(REGION1__END) - 1))); |
| REGION1__PADDED_REGION_SHIFT = LOG2CEIL(REGION1__PADDED_XOR); |
| REGION1__PADDED_SR_SHIFT = REGION1__PADDED_REGION_SHIFT - 3; |
| REGION1__PADDED_SR_SIZE = MAX(1 << REGION1__PADDED_SR_SHIFT, 32); |
| REGION1__POST_ALIGNMENT = REGION1__PADDED_SR_SIZE; |